./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 226f9f7b9067513e57bf1604e9c0eb0a76532837 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:34:25,874 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:34:25,875 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:34:25,884 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:34:25,884 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:34:25,885 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:34:25,886 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:34:25,888 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:34:25,889 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:34:25,890 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:34:25,891 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:34:25,892 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:34:25,892 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:34:25,892 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:34:25,893 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:34:25,894 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:34:25,894 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:34:25,895 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:34:25,896 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:34:25,898 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:34:25,899 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:34:25,900 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:34:25,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:34:25,902 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:34:25,903 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:34:25,904 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:34:25,904 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:34:25,904 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:34:25,904 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:34:25,905 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:34:25,905 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:34:25,906 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:34:25,906 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:34:25,907 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:34:25,908 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:34:25,908 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:34:25,908 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:34:25,909 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:34:25,909 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:34:25,909 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:34:25,910 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:34:25,910 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:34:25,923 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:34:25,924 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:34:25,924 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:34:25,925 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:34:25,925 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:34:25,925 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:34:25,925 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:34:25,925 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:34:25,925 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:34:25,926 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:34:25,926 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:34:25,926 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:34:25,926 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:34:25,926 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:34:25,927 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:34:25,927 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:34:25,927 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:34:25,928 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:34:25,929 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:34:25,929 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:34:25,929 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:34:25,929 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:34:25,929 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:34:25,930 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:34:25,930 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:34:25,930 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:34:25,930 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:34:25,930 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:34:25,931 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:34:25,932 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:34:25,932 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 226f9f7b9067513e57bf1604e9c0eb0a76532837 [2019-12-07 13:34:26,041 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:34:26,049 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:34:26,051 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:34:26,052 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:34:26,052 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:34:26,052 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i [2019-12-07 13:34:26,089 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/data/7d249a68c/f7ec36608b4a4a27bc9d9d106b71e6d8/FLAGcc0151dac [2019-12-07 13:34:26,575 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:34:26,575 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/sv-benchmarks/c/pthread-wmm/mix011_power.oepc.i [2019-12-07 13:34:26,585 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/data/7d249a68c/f7ec36608b4a4a27bc9d9d106b71e6d8/FLAGcc0151dac [2019-12-07 13:34:26,595 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/data/7d249a68c/f7ec36608b4a4a27bc9d9d106b71e6d8 [2019-12-07 13:34:26,596 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:34:26,597 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:34:26,598 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:34:26,598 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:34:26,600 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:34:26,601 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:26,602 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26, skipping insertion in model container [2019-12-07 13:34:26,603 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:26,607 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:34:26,637 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:34:26,887 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:34:26,895 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:34:26,940 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:34:26,984 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:34:26,985 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26 WrapperNode [2019-12-07 13:34:26,985 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:34:26,985 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:34:26,985 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:34:26,985 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:34:26,991 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,004 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,022 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:34:27,022 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:34:27,022 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:34:27,022 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:34:27,029 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,029 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,032 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,032 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,042 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,044 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... [2019-12-07 13:34:27,048 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:34:27,048 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:34:27,048 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:34:27,048 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:34:27,049 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:34:27,088 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:34:27,088 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:34:27,088 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:34:27,089 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:34:27,089 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:34:27,089 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:34:27,089 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:34:27,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:34:27,090 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:34:27,467 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:34:27,467 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:34:27,468 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:34:27 BoogieIcfgContainer [2019-12-07 13:34:27,468 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:34:27,469 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:34:27,469 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:34:27,471 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:34:27,471 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:34:26" (1/3) ... [2019-12-07 13:34:27,471 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ba082ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:34:27, skipping insertion in model container [2019-12-07 13:34:27,471 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:34:26" (2/3) ... [2019-12-07 13:34:27,472 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ba082ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:34:27, skipping insertion in model container [2019-12-07 13:34:27,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:34:27" (3/3) ... [2019-12-07 13:34:27,473 INFO L109 eAbstractionObserver]: Analyzing ICFG mix011_power.oepc.i [2019-12-07 13:34:27,479 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:34:27,479 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:34:27,484 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:34:27,485 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,514 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,518 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:34:27,544 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:34:27,560 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:34:27,560 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:34:27,560 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:34:27,560 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:34:27,560 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:34:27,560 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:34:27,560 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:34:27,560 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:34:27,573 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 13:34:27,574 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 13:34:27,645 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 13:34:27,645 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:34:27,654 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:34:27,671 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 13:34:27,701 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 13:34:27,701 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:34:27,706 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 692 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:34:27,722 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:34:27,723 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:34:30,843 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 13:34:30,933 INFO L206 etLargeBlockEncoding]: Checked pairs total: 90866 [2019-12-07 13:34:30,934 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 13:34:30,936 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 13:34:48,146 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 123302 states. [2019-12-07 13:34:48,148 INFO L276 IsEmpty]: Start isEmpty. Operand 123302 states. [2019-12-07 13:34:48,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:34:48,152 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:34:48,152 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:34:48,152 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:34:48,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:34:48,156 INFO L82 PathProgramCache]: Analyzing trace with hash 918873, now seen corresponding path program 1 times [2019-12-07 13:34:48,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:34:48,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791785129] [2019-12-07 13:34:48,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:34:48,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:34:48,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:34:48,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791785129] [2019-12-07 13:34:48,289 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:34:48,289 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:34:48,289 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710959396] [2019-12-07 13:34:48,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:34:48,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:34:48,301 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:34:48,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:34:48,303 INFO L87 Difference]: Start difference. First operand 123302 states. Second operand 3 states. [2019-12-07 13:34:49,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:34:49,187 INFO L93 Difference]: Finished difference Result 122174 states and 518852 transitions. [2019-12-07 13:34:49,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:34:49,189 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:34:49,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:34:49,674 INFO L225 Difference]: With dead ends: 122174 [2019-12-07 13:34:49,675 INFO L226 Difference]: Without dead ends: 115076 [2019-12-07 13:34:49,675 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:34:56,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115076 states. [2019-12-07 13:34:57,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115076 to 115076. [2019-12-07 13:34:57,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115076 states. [2019-12-07 13:34:58,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115076 states to 115076 states and 488094 transitions. [2019-12-07 13:34:58,105 INFO L78 Accepts]: Start accepts. Automaton has 115076 states and 488094 transitions. Word has length 3 [2019-12-07 13:34:58,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:34:58,105 INFO L462 AbstractCegarLoop]: Abstraction has 115076 states and 488094 transitions. [2019-12-07 13:34:58,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:34:58,105 INFO L276 IsEmpty]: Start isEmpty. Operand 115076 states and 488094 transitions. [2019-12-07 13:34:58,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:34:58,107 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:34:58,107 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:34:58,108 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:34:58,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:34:58,108 INFO L82 PathProgramCache]: Analyzing trace with hash 1360334080, now seen corresponding path program 1 times [2019-12-07 13:34:58,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:34:58,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013454999] [2019-12-07 13:34:58,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:34:58,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:34:58,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:34:58,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013454999] [2019-12-07 13:34:58,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:34:58,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:34:58,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149356470] [2019-12-07 13:34:58,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:34:58,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:34:58,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:34:58,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:34:58,170 INFO L87 Difference]: Start difference. First operand 115076 states and 488094 transitions. Second operand 4 states. [2019-12-07 13:34:59,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:34:59,041 INFO L93 Difference]: Finished difference Result 178684 states and 728513 transitions. [2019-12-07 13:34:59,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:34:59,042 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:34:59,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:34:59,504 INFO L225 Difference]: With dead ends: 178684 [2019-12-07 13:34:59,504 INFO L226 Difference]: Without dead ends: 178635 [2019-12-07 13:34:59,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:07,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178635 states. [2019-12-07 13:35:09,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178635 to 162755. [2019-12-07 13:35:09,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162755 states. [2019-12-07 13:35:10,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162755 states to 162755 states and 672033 transitions. [2019-12-07 13:35:10,137 INFO L78 Accepts]: Start accepts. Automaton has 162755 states and 672033 transitions. Word has length 11 [2019-12-07 13:35:10,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:10,137 INFO L462 AbstractCegarLoop]: Abstraction has 162755 states and 672033 transitions. [2019-12-07 13:35:10,137 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:35:10,137 INFO L276 IsEmpty]: Start isEmpty. Operand 162755 states and 672033 transitions. [2019-12-07 13:35:10,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:35:10,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:10,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:10,144 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:10,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:10,145 INFO L82 PathProgramCache]: Analyzing trace with hash 1888852276, now seen corresponding path program 1 times [2019-12-07 13:35:10,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:35:10,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843065645] [2019-12-07 13:35:10,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:10,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:10,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:10,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843065645] [2019-12-07 13:35:10,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:10,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:10,217 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [964440269] [2019-12-07 13:35:10,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:35:10,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:35:10,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:35:10,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:35:10,217 INFO L87 Difference]: Start difference. First operand 162755 states and 672033 transitions. Second operand 4 states. [2019-12-07 13:35:11,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:11,642 INFO L93 Difference]: Finished difference Result 229896 states and 928060 transitions. [2019-12-07 13:35:11,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:35:11,643 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:35:11,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:12,211 INFO L225 Difference]: With dead ends: 229896 [2019-12-07 13:35:12,211 INFO L226 Difference]: Without dead ends: 229840 [2019-12-07 13:35:12,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:19,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229840 states. [2019-12-07 13:35:24,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229840 to 194046. [2019-12-07 13:35:24,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194046 states. [2019-12-07 13:35:24,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194046 states to 194046 states and 796782 transitions. [2019-12-07 13:35:24,882 INFO L78 Accepts]: Start accepts. Automaton has 194046 states and 796782 transitions. Word has length 13 [2019-12-07 13:35:24,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:24,883 INFO L462 AbstractCegarLoop]: Abstraction has 194046 states and 796782 transitions. [2019-12-07 13:35:24,883 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:35:24,883 INFO L276 IsEmpty]: Start isEmpty. Operand 194046 states and 796782 transitions. [2019-12-07 13:35:24,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:35:24,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:24,891 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:24,891 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:24,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:24,891 INFO L82 PathProgramCache]: Analyzing trace with hash -1220224201, now seen corresponding path program 1 times [2019-12-07 13:35:24,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:35:24,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890375178] [2019-12-07 13:35:24,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:24,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:24,953 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:24,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890375178] [2019-12-07 13:35:24,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:24,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:35:24,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160064980] [2019-12-07 13:35:24,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:35:24,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:35:24,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:35:24,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:35:24,954 INFO L87 Difference]: Start difference. First operand 194046 states and 796782 transitions. Second operand 5 states. [2019-12-07 13:35:26,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:26,282 INFO L93 Difference]: Finished difference Result 261814 states and 1064888 transitions. [2019-12-07 13:35:26,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:35:26,283 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 13:35:26,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:26,981 INFO L225 Difference]: With dead ends: 261814 [2019-12-07 13:35:26,982 INFO L226 Difference]: Without dead ends: 261814 [2019-12-07 13:35:26,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:35:34,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261814 states. [2019-12-07 13:35:40,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261814 to 214683. [2019-12-07 13:35:40,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214683 states. [2019-12-07 13:35:41,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214683 states to 214683 states and 880739 transitions. [2019-12-07 13:35:41,062 INFO L78 Accepts]: Start accepts. Automaton has 214683 states and 880739 transitions. Word has length 16 [2019-12-07 13:35:41,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:41,062 INFO L462 AbstractCegarLoop]: Abstraction has 214683 states and 880739 transitions. [2019-12-07 13:35:41,062 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:35:41,062 INFO L276 IsEmpty]: Start isEmpty. Operand 214683 states and 880739 transitions. [2019-12-07 13:35:41,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:35:41,075 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:41,075 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:41,075 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:41,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:41,076 INFO L82 PathProgramCache]: Analyzing trace with hash 654894503, now seen corresponding path program 1 times [2019-12-07 13:35:41,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:35:41,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961847754] [2019-12-07 13:35:41,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:41,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:41,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:41,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1961847754] [2019-12-07 13:35:41,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:41,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:35:41,116 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694926359] [2019-12-07 13:35:41,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:41,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:35:41,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:41,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:41,117 INFO L87 Difference]: Start difference. First operand 214683 states and 880739 transitions. Second operand 3 states. [2019-12-07 13:35:41,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:41,961 INFO L93 Difference]: Finished difference Result 202380 states and 821245 transitions. [2019-12-07 13:35:41,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:41,962 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:35:41,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:42,491 INFO L225 Difference]: With dead ends: 202380 [2019-12-07 13:35:42,491 INFO L226 Difference]: Without dead ends: 202380 [2019-12-07 13:35:42,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:48,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202380 states. [2019-12-07 13:35:51,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202380 to 199166. [2019-12-07 13:35:51,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199166 states. [2019-12-07 13:35:52,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199166 states to 199166 states and 809319 transitions. [2019-12-07 13:35:52,311 INFO L78 Accepts]: Start accepts. Automaton has 199166 states and 809319 transitions. Word has length 18 [2019-12-07 13:35:52,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:35:52,312 INFO L462 AbstractCegarLoop]: Abstraction has 199166 states and 809319 transitions. [2019-12-07 13:35:52,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:35:52,312 INFO L276 IsEmpty]: Start isEmpty. Operand 199166 states and 809319 transitions. [2019-12-07 13:35:52,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:35:52,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:35:52,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:35:52,323 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:35:52,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:35:52,324 INFO L82 PathProgramCache]: Analyzing trace with hash -536425816, now seen corresponding path program 1 times [2019-12-07 13:35:52,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:35:52,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133387566] [2019-12-07 13:35:52,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:35:52,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:35:52,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:35:52,385 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133387566] [2019-12-07 13:35:52,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:35:52,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:35:52,386 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274541380] [2019-12-07 13:35:52,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:35:52,386 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:35:52,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:35:52,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:35:52,387 INFO L87 Difference]: Start difference. First operand 199166 states and 809319 transitions. Second operand 3 states. [2019-12-07 13:35:54,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:35:54,115 INFO L93 Difference]: Finished difference Result 358205 states and 1444958 transitions. [2019-12-07 13:35:54,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:35:54,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:35:54,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:35:54,893 INFO L225 Difference]: With dead ends: 358205 [2019-12-07 13:35:54,893 INFO L226 Difference]: Without dead ends: 320526 [2019-12-07 13:35:54,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:04,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320526 states. [2019-12-07 13:36:09,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320526 to 307000. [2019-12-07 13:36:09,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307000 states. [2019-12-07 13:36:10,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307000 states to 307000 states and 1247376 transitions. [2019-12-07 13:36:10,400 INFO L78 Accepts]: Start accepts. Automaton has 307000 states and 1247376 transitions. Word has length 18 [2019-12-07 13:36:10,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:10,401 INFO L462 AbstractCegarLoop]: Abstraction has 307000 states and 1247376 transitions. [2019-12-07 13:36:10,401 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:10,401 INFO L276 IsEmpty]: Start isEmpty. Operand 307000 states and 1247376 transitions. [2019-12-07 13:36:10,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:36:10,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:10,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:10,416 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:10,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:10,417 INFO L82 PathProgramCache]: Analyzing trace with hash -1827269975, now seen corresponding path program 1 times [2019-12-07 13:36:10,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:10,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110979462] [2019-12-07 13:36:10,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:10,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:10,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:10,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110979462] [2019-12-07 13:36:10,458 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:10,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:10,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176378386] [2019-12-07 13:36:10,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:10,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:10,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:10,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:10,459 INFO L87 Difference]: Start difference. First operand 307000 states and 1247376 transitions. Second operand 5 states. [2019-12-07 13:36:13,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:13,144 INFO L93 Difference]: Finished difference Result 414280 states and 1655217 transitions. [2019-12-07 13:36:13,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:36:13,145 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:36:13,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:14,178 INFO L225 Difference]: With dead ends: 414280 [2019-12-07 13:36:14,178 INFO L226 Difference]: Without dead ends: 414182 [2019-12-07 13:36:14,178 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:26,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414182 states. [2019-12-07 13:36:31,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414182 to 320855. [2019-12-07 13:36:31,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 320855 states. [2019-12-07 13:36:32,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320855 states to 320855 states and 1301826 transitions. [2019-12-07 13:36:32,791 INFO L78 Accepts]: Start accepts. Automaton has 320855 states and 1301826 transitions. Word has length 19 [2019-12-07 13:36:32,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:32,792 INFO L462 AbstractCegarLoop]: Abstraction has 320855 states and 1301826 transitions. [2019-12-07 13:36:32,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:32,792 INFO L276 IsEmpty]: Start isEmpty. Operand 320855 states and 1301826 transitions. [2019-12-07 13:36:32,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:36:32,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:32,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:32,814 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:32,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:32,814 INFO L82 PathProgramCache]: Analyzing trace with hash -563916010, now seen corresponding path program 1 times [2019-12-07 13:36:32,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:32,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98286347] [2019-12-07 13:36:32,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:32,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:32,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:32,839 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98286347] [2019-12-07 13:36:32,839 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:32,839 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:32,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [10796963] [2019-12-07 13:36:32,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:32,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:32,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:32,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:32,840 INFO L87 Difference]: Start difference. First operand 320855 states and 1301826 transitions. Second operand 3 states. [2019-12-07 13:36:33,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:33,034 INFO L93 Difference]: Finished difference Result 62530 states and 199763 transitions. [2019-12-07 13:36:33,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:33,035 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:36:33,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:33,125 INFO L225 Difference]: With dead ends: 62530 [2019-12-07 13:36:33,125 INFO L226 Difference]: Without dead ends: 62530 [2019-12-07 13:36:33,126 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:33,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62530 states. [2019-12-07 13:36:34,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62530 to 62530. [2019-12-07 13:36:34,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62530 states. [2019-12-07 13:36:34,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62530 states to 62530 states and 199763 transitions. [2019-12-07 13:36:34,503 INFO L78 Accepts]: Start accepts. Automaton has 62530 states and 199763 transitions. Word has length 19 [2019-12-07 13:36:34,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:34,503 INFO L462 AbstractCegarLoop]: Abstraction has 62530 states and 199763 transitions. [2019-12-07 13:36:34,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:34,503 INFO L276 IsEmpty]: Start isEmpty. Operand 62530 states and 199763 transitions. [2019-12-07 13:36:34,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:36:34,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:34,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:34,511 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:34,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:34,511 INFO L82 PathProgramCache]: Analyzing trace with hash -1720601530, now seen corresponding path program 1 times [2019-12-07 13:36:34,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:34,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960140164] [2019-12-07 13:36:34,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:34,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:34,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:34,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960140164] [2019-12-07 13:36:34,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:34,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:34,553 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2025489364] [2019-12-07 13:36:34,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:34,553 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:34,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:34,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:34,553 INFO L87 Difference]: Start difference. First operand 62530 states and 199763 transitions. Second operand 6 states. [2019-12-07 13:36:35,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:35,232 INFO L93 Difference]: Finished difference Result 90479 states and 283039 transitions. [2019-12-07 13:36:35,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:36:35,233 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 13:36:35,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:35,362 INFO L225 Difference]: With dead ends: 90479 [2019-12-07 13:36:35,362 INFO L226 Difference]: Without dead ends: 90472 [2019-12-07 13:36:35,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:36:35,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90472 states. [2019-12-07 13:36:36,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90472 to 68208. [2019-12-07 13:36:36,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68208 states. [2019-12-07 13:36:36,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68208 states to 68208 states and 216338 transitions. [2019-12-07 13:36:36,953 INFO L78 Accepts]: Start accepts. Automaton has 68208 states and 216338 transitions. Word has length 22 [2019-12-07 13:36:36,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:36,953 INFO L462 AbstractCegarLoop]: Abstraction has 68208 states and 216338 transitions. [2019-12-07 13:36:36,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:36,953 INFO L276 IsEmpty]: Start isEmpty. Operand 68208 states and 216338 transitions. [2019-12-07 13:36:36,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:36:36,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:36,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:36,972 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:36,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:36,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1856606199, now seen corresponding path program 1 times [2019-12-07 13:36:36,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:36,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93356358] [2019-12-07 13:36:36,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:36,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:37,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:37,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93356358] [2019-12-07 13:36:37,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:37,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:37,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076849064] [2019-12-07 13:36:37,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:37,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:37,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:37,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:37,012 INFO L87 Difference]: Start difference. First operand 68208 states and 216338 transitions. Second operand 6 states. [2019-12-07 13:36:37,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:37,551 INFO L93 Difference]: Finished difference Result 90837 states and 283016 transitions. [2019-12-07 13:36:37,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:36:37,551 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:36:37,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:37,675 INFO L225 Difference]: With dead ends: 90837 [2019-12-07 13:36:37,676 INFO L226 Difference]: Without dead ends: 90799 [2019-12-07 13:36:37,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:36:38,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90799 states. [2019-12-07 13:36:38,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90799 to 70228. [2019-12-07 13:36:38,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70228 states. [2019-12-07 13:36:38,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70228 states to 70228 states and 222340 transitions. [2019-12-07 13:36:38,915 INFO L78 Accepts]: Start accepts. Automaton has 70228 states and 222340 transitions. Word has length 27 [2019-12-07 13:36:38,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:38,915 INFO L462 AbstractCegarLoop]: Abstraction has 70228 states and 222340 transitions. [2019-12-07 13:36:38,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:38,915 INFO L276 IsEmpty]: Start isEmpty. Operand 70228 states and 222340 transitions. [2019-12-07 13:36:38,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:36:38,941 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:38,941 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:38,941 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:38,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:38,942 INFO L82 PathProgramCache]: Analyzing trace with hash -760516630, now seen corresponding path program 1 times [2019-12-07 13:36:38,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:38,942 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432220493] [2019-12-07 13:36:38,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:38,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:38,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:38,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432220493] [2019-12-07 13:36:38,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:38,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:38,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070436953] [2019-12-07 13:36:38,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:38,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:38,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:38,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:38,977 INFO L87 Difference]: Start difference. First operand 70228 states and 222340 transitions. Second operand 4 states. [2019-12-07 13:36:39,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:39,054 INFO L93 Difference]: Finished difference Result 27189 states and 82712 transitions. [2019-12-07 13:36:39,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:36:39,055 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:36:39,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:39,090 INFO L225 Difference]: With dead ends: 27189 [2019-12-07 13:36:39,090 INFO L226 Difference]: Without dead ends: 27189 [2019-12-07 13:36:39,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:39,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27189 states. [2019-12-07 13:36:39,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27189 to 25490. [2019-12-07 13:36:39,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25490 states. [2019-12-07 13:36:39,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25490 states to 25490 states and 77602 transitions. [2019-12-07 13:36:39,559 INFO L78 Accepts]: Start accepts. Automaton has 25490 states and 77602 transitions. Word has length 30 [2019-12-07 13:36:39,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:39,559 INFO L462 AbstractCegarLoop]: Abstraction has 25490 states and 77602 transitions. [2019-12-07 13:36:39,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:39,559 INFO L276 IsEmpty]: Start isEmpty. Operand 25490 states and 77602 transitions. [2019-12-07 13:36:39,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:36:39,577 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:39,577 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:39,577 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:39,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:39,577 INFO L82 PathProgramCache]: Analyzing trace with hash -1731527828, now seen corresponding path program 1 times [2019-12-07 13:36:39,577 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:39,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134923090] [2019-12-07 13:36:39,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:39,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:39,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:39,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134923090] [2019-12-07 13:36:39,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:39,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:39,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1351009817] [2019-12-07 13:36:39,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:39,631 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:39,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:39,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:39,631 INFO L87 Difference]: Start difference. First operand 25490 states and 77602 transitions. Second operand 7 states. [2019-12-07 13:36:40,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:40,319 INFO L93 Difference]: Finished difference Result 32394 states and 96072 transitions. [2019-12-07 13:36:40,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:36:40,319 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:36:40,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:40,354 INFO L225 Difference]: With dead ends: 32394 [2019-12-07 13:36:40,355 INFO L226 Difference]: Without dead ends: 32394 [2019-12-07 13:36:40,355 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:36:40,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32394 states. [2019-12-07 13:36:40,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32394 to 24997. [2019-12-07 13:36:40,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24997 states. [2019-12-07 13:36:40,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24997 states to 24997 states and 76137 transitions. [2019-12-07 13:36:40,758 INFO L78 Accepts]: Start accepts. Automaton has 24997 states and 76137 transitions. Word has length 33 [2019-12-07 13:36:40,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:40,758 INFO L462 AbstractCegarLoop]: Abstraction has 24997 states and 76137 transitions. [2019-12-07 13:36:40,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:40,759 INFO L276 IsEmpty]: Start isEmpty. Operand 24997 states and 76137 transitions. [2019-12-07 13:36:40,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:36:40,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:40,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:40,780 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:40,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:40,780 INFO L82 PathProgramCache]: Analyzing trace with hash 86698678, now seen corresponding path program 1 times [2019-12-07 13:36:40,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:40,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047729254] [2019-12-07 13:36:40,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:40,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:40,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:40,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047729254] [2019-12-07 13:36:40,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:40,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:36:40,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2112631627] [2019-12-07 13:36:40,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:36:40,985 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:40,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:36:40,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:36:40,985 INFO L87 Difference]: Start difference. First operand 24997 states and 76137 transitions. Second operand 10 states. [2019-12-07 13:36:42,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:42,033 INFO L93 Difference]: Finished difference Result 30394 states and 92220 transitions. [2019-12-07 13:36:42,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 13:36:42,034 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 40 [2019-12-07 13:36:42,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:42,087 INFO L225 Difference]: With dead ends: 30394 [2019-12-07 13:36:42,087 INFO L226 Difference]: Without dead ends: 30394 [2019-12-07 13:36:42,087 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:36:42,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30394 states. [2019-12-07 13:36:42,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30394 to 27189. [2019-12-07 13:36:42,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27189 states. [2019-12-07 13:36:42,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27189 states to 27189 states and 82865 transitions. [2019-12-07 13:36:42,513 INFO L78 Accepts]: Start accepts. Automaton has 27189 states and 82865 transitions. Word has length 40 [2019-12-07 13:36:42,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:42,513 INFO L462 AbstractCegarLoop]: Abstraction has 27189 states and 82865 transitions. [2019-12-07 13:36:42,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:36:42,513 INFO L276 IsEmpty]: Start isEmpty. Operand 27189 states and 82865 transitions. [2019-12-07 13:36:42,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:36:42,542 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:42,542 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:42,542 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:42,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:42,542 INFO L82 PathProgramCache]: Analyzing trace with hash 743961375, now seen corresponding path program 1 times [2019-12-07 13:36:42,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:42,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591652399] [2019-12-07 13:36:42,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:42,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:42,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:42,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591652399] [2019-12-07 13:36:42,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:42,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:42,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [922914104] [2019-12-07 13:36:42,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:42,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:42,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:42,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:42,575 INFO L87 Difference]: Start difference. First operand 27189 states and 82865 transitions. Second operand 3 states. [2019-12-07 13:36:42,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:42,641 INFO L93 Difference]: Finished difference Result 25942 states and 77934 transitions. [2019-12-07 13:36:42,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:42,642 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 13:36:42,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:42,676 INFO L225 Difference]: With dead ends: 25942 [2019-12-07 13:36:42,677 INFO L226 Difference]: Without dead ends: 25942 [2019-12-07 13:36:42,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:42,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25942 states. [2019-12-07 13:36:43,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25942 to 25420. [2019-12-07 13:36:43,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25420 states. [2019-12-07 13:36:43,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25420 states to 25420 states and 76480 transitions. [2019-12-07 13:36:43,056 INFO L78 Accepts]: Start accepts. Automaton has 25420 states and 76480 transitions. Word has length 41 [2019-12-07 13:36:43,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:43,057 INFO L462 AbstractCegarLoop]: Abstraction has 25420 states and 76480 transitions. [2019-12-07 13:36:43,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:43,057 INFO L276 IsEmpty]: Start isEmpty. Operand 25420 states and 76480 transitions. [2019-12-07 13:36:43,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 13:36:43,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:43,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:43,078 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:43,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:43,078 INFO L82 PathProgramCache]: Analyzing trace with hash 21231692, now seen corresponding path program 1 times [2019-12-07 13:36:43,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:43,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509053905] [2019-12-07 13:36:43,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:43,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:43,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:43,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509053905] [2019-12-07 13:36:43,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:43,115 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:43,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861333822] [2019-12-07 13:36:43,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:43,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:43,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:43,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:43,116 INFO L87 Difference]: Start difference. First operand 25420 states and 76480 transitions. Second operand 5 states. [2019-12-07 13:36:43,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:43,182 INFO L93 Difference]: Finished difference Result 23424 states and 72078 transitions. [2019-12-07 13:36:43,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:43,182 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 13:36:43,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:43,208 INFO L225 Difference]: With dead ends: 23424 [2019-12-07 13:36:43,208 INFO L226 Difference]: Without dead ends: 22904 [2019-12-07 13:36:43,209 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:43,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22904 states. [2019-12-07 13:36:43,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22904 to 14692. [2019-12-07 13:36:43,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14692 states. [2019-12-07 13:36:43,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14692 states to 14692 states and 45539 transitions. [2019-12-07 13:36:43,471 INFO L78 Accepts]: Start accepts. Automaton has 14692 states and 45539 transitions. Word has length 42 [2019-12-07 13:36:43,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:43,472 INFO L462 AbstractCegarLoop]: Abstraction has 14692 states and 45539 transitions. [2019-12-07 13:36:43,472 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:43,472 INFO L276 IsEmpty]: Start isEmpty. Operand 14692 states and 45539 transitions. [2019-12-07 13:36:43,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:36:43,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:43,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:43,485 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:43,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:43,485 INFO L82 PathProgramCache]: Analyzing trace with hash -343795694, now seen corresponding path program 1 times [2019-12-07 13:36:43,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:43,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952440036] [2019-12-07 13:36:43,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:43,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:43,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:43,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952440036] [2019-12-07 13:36:43,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:43,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:43,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766251332] [2019-12-07 13:36:43,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:43,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:43,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:43,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:43,514 INFO L87 Difference]: Start difference. First operand 14692 states and 45539 transitions. Second operand 3 states. [2019-12-07 13:36:43,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:43,577 INFO L93 Difference]: Finished difference Result 20608 states and 63077 transitions. [2019-12-07 13:36:43,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:43,577 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:36:43,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:43,599 INFO L225 Difference]: With dead ends: 20608 [2019-12-07 13:36:43,599 INFO L226 Difference]: Without dead ends: 20608 [2019-12-07 13:36:43,599 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:43,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20608 states. [2019-12-07 13:36:43,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20608 to 15896. [2019-12-07 13:36:43,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15896 states. [2019-12-07 13:36:43,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15896 states to 15896 states and 49092 transitions. [2019-12-07 13:36:43,863 INFO L78 Accepts]: Start accepts. Automaton has 15896 states and 49092 transitions. Word has length 66 [2019-12-07 13:36:43,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:43,863 INFO L462 AbstractCegarLoop]: Abstraction has 15896 states and 49092 transitions. [2019-12-07 13:36:43,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:43,863 INFO L276 IsEmpty]: Start isEmpty. Operand 15896 states and 49092 transitions. [2019-12-07 13:36:43,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:36:43,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:43,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:43,877 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:43,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:43,877 INFO L82 PathProgramCache]: Analyzing trace with hash 1357429556, now seen corresponding path program 1 times [2019-12-07 13:36:43,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:43,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [567859995] [2019-12-07 13:36:43,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:43,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:43,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:43,942 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [567859995] [2019-12-07 13:36:43,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:43,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:43,942 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281566486] [2019-12-07 13:36:43,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:43,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:43,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:43,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:43,943 INFO L87 Difference]: Start difference. First operand 15896 states and 49092 transitions. Second operand 7 states. [2019-12-07 13:36:44,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:44,624 INFO L93 Difference]: Finished difference Result 27418 states and 82957 transitions. [2019-12-07 13:36:44,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 13:36:44,625 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 13:36:44,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:44,655 INFO L225 Difference]: With dead ends: 27418 [2019-12-07 13:36:44,655 INFO L226 Difference]: Without dead ends: 27418 [2019-12-07 13:36:44,655 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:36:44,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27418 states. [2019-12-07 13:36:44,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27418 to 17210. [2019-12-07 13:36:44,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17210 states. [2019-12-07 13:36:44,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17210 states to 17210 states and 52770 transitions. [2019-12-07 13:36:44,967 INFO L78 Accepts]: Start accepts. Automaton has 17210 states and 52770 transitions. Word has length 66 [2019-12-07 13:36:44,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:44,967 INFO L462 AbstractCegarLoop]: Abstraction has 17210 states and 52770 transitions. [2019-12-07 13:36:44,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:44,967 INFO L276 IsEmpty]: Start isEmpty. Operand 17210 states and 52770 transitions. [2019-12-07 13:36:44,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:36:44,982 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:44,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:44,982 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:44,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:44,982 INFO L82 PathProgramCache]: Analyzing trace with hash -2094602744, now seen corresponding path program 2 times [2019-12-07 13:36:44,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:44,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787452833] [2019-12-07 13:36:44,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:44,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:45,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:45,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787452833] [2019-12-07 13:36:45,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:45,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:45,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110006704] [2019-12-07 13:36:45,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:45,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:45,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:45,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:45,022 INFO L87 Difference]: Start difference. First operand 17210 states and 52770 transitions. Second operand 3 states. [2019-12-07 13:36:45,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:45,100 INFO L93 Difference]: Finished difference Result 20508 states and 62748 transitions. [2019-12-07 13:36:45,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:45,101 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:36:45,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:45,123 INFO L225 Difference]: With dead ends: 20508 [2019-12-07 13:36:45,123 INFO L226 Difference]: Without dead ends: 20508 [2019-12-07 13:36:45,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:45,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20508 states. [2019-12-07 13:36:45,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20508 to 15595. [2019-12-07 13:36:45,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15595 states. [2019-12-07 13:36:45,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15595 states to 15595 states and 48253 transitions. [2019-12-07 13:36:45,396 INFO L78 Accepts]: Start accepts. Automaton has 15595 states and 48253 transitions. Word has length 66 [2019-12-07 13:36:45,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:45,396 INFO L462 AbstractCegarLoop]: Abstraction has 15595 states and 48253 transitions. [2019-12-07 13:36:45,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:45,396 INFO L276 IsEmpty]: Start isEmpty. Operand 15595 states and 48253 transitions. [2019-12-07 13:36:45,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:45,408 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:45,408 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:45,408 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:45,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:45,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1650479011, now seen corresponding path program 1 times [2019-12-07 13:36:45,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:45,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804157455] [2019-12-07 13:36:45,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:45,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:45,503 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:45,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804157455] [2019-12-07 13:36:45,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:45,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:45,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1061057922] [2019-12-07 13:36:45,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:45,504 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:45,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:45,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:45,504 INFO L87 Difference]: Start difference. First operand 15595 states and 48253 transitions. Second operand 7 states. [2019-12-07 13:36:46,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:46,065 INFO L93 Difference]: Finished difference Result 71282 states and 219409 transitions. [2019-12-07 13:36:46,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:36:46,065 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 13:36:46,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:46,131 INFO L225 Difference]: With dead ends: 71282 [2019-12-07 13:36:46,132 INFO L226 Difference]: Without dead ends: 52500 [2019-12-07 13:36:46,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:36:46,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52500 states. [2019-12-07 13:36:46,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52500 to 18481. [2019-12-07 13:36:46,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18481 states. [2019-12-07 13:36:46,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18481 states to 18481 states and 56778 transitions. [2019-12-07 13:36:46,609 INFO L78 Accepts]: Start accepts. Automaton has 18481 states and 56778 transitions. Word has length 67 [2019-12-07 13:36:46,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:46,609 INFO L462 AbstractCegarLoop]: Abstraction has 18481 states and 56778 transitions. [2019-12-07 13:36:46,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:46,609 INFO L276 IsEmpty]: Start isEmpty. Operand 18481 states and 56778 transitions. [2019-12-07 13:36:46,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:46,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:46,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:46,625 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:46,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:46,625 INFO L82 PathProgramCache]: Analyzing trace with hash -2130416035, now seen corresponding path program 2 times [2019-12-07 13:36:46,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:46,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683930480] [2019-12-07 13:36:46,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:46,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:46,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:46,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683930480] [2019-12-07 13:36:46,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:46,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:46,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637211887] [2019-12-07 13:36:46,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:46,708 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:46,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:46,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:46,708 INFO L87 Difference]: Start difference. First operand 18481 states and 56778 transitions. Second operand 4 states. [2019-12-07 13:36:46,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:46,806 INFO L93 Difference]: Finished difference Result 32336 states and 99500 transitions. [2019-12-07 13:36:46,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:36:46,806 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 13:36:46,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:46,823 INFO L225 Difference]: With dead ends: 32336 [2019-12-07 13:36:46,823 INFO L226 Difference]: Without dead ends: 15450 [2019-12-07 13:36:46,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:46,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15450 states. [2019-12-07 13:36:47,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15450 to 15450. [2019-12-07 13:36:47,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15450 states. [2019-12-07 13:36:47,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15450 states to 15450 states and 47600 transitions. [2019-12-07 13:36:47,042 INFO L78 Accepts]: Start accepts. Automaton has 15450 states and 47600 transitions. Word has length 67 [2019-12-07 13:36:47,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:47,042 INFO L462 AbstractCegarLoop]: Abstraction has 15450 states and 47600 transitions. [2019-12-07 13:36:47,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:47,042 INFO L276 IsEmpty]: Start isEmpty. Operand 15450 states and 47600 transitions. [2019-12-07 13:36:47,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:47,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:47,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:47,056 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:47,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:47,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1169670237, now seen corresponding path program 3 times [2019-12-07 13:36:47,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:47,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516618565] [2019-12-07 13:36:47,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:47,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:47,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:47,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516618565] [2019-12-07 13:36:47,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:47,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:36:47,223 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160156423] [2019-12-07 13:36:47,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:36:47,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:47,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:36:47,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:36:47,224 INFO L87 Difference]: Start difference. First operand 15450 states and 47600 transitions. Second operand 11 states. [2019-12-07 13:36:48,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:48,115 INFO L93 Difference]: Finished difference Result 27795 states and 84333 transitions. [2019-12-07 13:36:48,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:36:48,116 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:36:48,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:48,135 INFO L225 Difference]: With dead ends: 27795 [2019-12-07 13:36:48,135 INFO L226 Difference]: Without dead ends: 19353 [2019-12-07 13:36:48,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=441, Unknown=0, NotChecked=0, Total=552 [2019-12-07 13:36:48,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19353 states. [2019-12-07 13:36:48,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19353 to 16321. [2019-12-07 13:36:48,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16321 states. [2019-12-07 13:36:48,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16321 states to 16321 states and 50003 transitions. [2019-12-07 13:36:48,413 INFO L78 Accepts]: Start accepts. Automaton has 16321 states and 50003 transitions. Word has length 67 [2019-12-07 13:36:48,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:48,413 INFO L462 AbstractCegarLoop]: Abstraction has 16321 states and 50003 transitions. [2019-12-07 13:36:48,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:36:48,413 INFO L276 IsEmpty]: Start isEmpty. Operand 16321 states and 50003 transitions. [2019-12-07 13:36:48,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:48,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:48,426 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:48,426 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:48,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:48,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1087519045, now seen corresponding path program 4 times [2019-12-07 13:36:48,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:48,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972888625] [2019-12-07 13:36:48,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:48,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:48,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:48,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [972888625] [2019-12-07 13:36:48,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:48,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:36:48,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646812123] [2019-12-07 13:36:48,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:36:48,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:48,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:36:48,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:36:48,794 INFO L87 Difference]: Start difference. First operand 16321 states and 50003 transitions. Second operand 16 states. [2019-12-07 13:36:52,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:52,942 INFO L93 Difference]: Finished difference Result 45160 states and 137006 transitions. [2019-12-07 13:36:52,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 13:36:52,942 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 13:36:52,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:52,989 INFO L225 Difference]: With dead ends: 45160 [2019-12-07 13:36:52,989 INFO L226 Difference]: Without dead ends: 42057 [2019-12-07 13:36:52,990 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1115 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=564, Invalid=3468, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 13:36:53,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42057 states. [2019-12-07 13:36:53,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42057 to 19614. [2019-12-07 13:36:53,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19614 states. [2019-12-07 13:36:53,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19614 states to 19614 states and 59797 transitions. [2019-12-07 13:36:53,420 INFO L78 Accepts]: Start accepts. Automaton has 19614 states and 59797 transitions. Word has length 67 [2019-12-07 13:36:53,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:53,421 INFO L462 AbstractCegarLoop]: Abstraction has 19614 states and 59797 transitions. [2019-12-07 13:36:53,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:36:53,421 INFO L276 IsEmpty]: Start isEmpty. Operand 19614 states and 59797 transitions. [2019-12-07 13:36:53,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:53,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:53,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:53,438 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:53,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:53,439 INFO L82 PathProgramCache]: Analyzing trace with hash 709682779, now seen corresponding path program 5 times [2019-12-07 13:36:53,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:53,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652524534] [2019-12-07 13:36:53,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:53,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:53,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:53,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652524534] [2019-12-07 13:36:53,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:53,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:36:53,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108959452] [2019-12-07 13:36:53,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:36:53,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:53,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:36:53,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=204, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:36:53,821 INFO L87 Difference]: Start difference. First operand 19614 states and 59797 transitions. Second operand 16 states. [2019-12-07 13:36:58,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:58,121 INFO L93 Difference]: Finished difference Result 42654 states and 128233 transitions. [2019-12-07 13:36:58,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 13:36:58,122 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 13:36:58,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:58,163 INFO L225 Difference]: With dead ends: 42654 [2019-12-07 13:36:58,164 INFO L226 Difference]: Without dead ends: 36197 [2019-12-07 13:36:58,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 936 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=523, Invalid=3017, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 13:36:58,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36197 states. [2019-12-07 13:36:58,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36197 to 16885. [2019-12-07 13:36:58,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16885 states. [2019-12-07 13:36:58,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16885 states to 16885 states and 51311 transitions. [2019-12-07 13:36:58,535 INFO L78 Accepts]: Start accepts. Automaton has 16885 states and 51311 transitions. Word has length 67 [2019-12-07 13:36:58,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:58,535 INFO L462 AbstractCegarLoop]: Abstraction has 16885 states and 51311 transitions. [2019-12-07 13:36:58,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:36:58,536 INFO L276 IsEmpty]: Start isEmpty. Operand 16885 states and 51311 transitions. [2019-12-07 13:36:58,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:36:58,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:58,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:58,551 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:58,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:58,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1005307485, now seen corresponding path program 6 times [2019-12-07 13:36:58,551 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:58,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096121292] [2019-12-07 13:36:58,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:58,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:58,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:58,892 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096121292] [2019-12-07 13:36:58,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:58,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 13:36:58,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677984064] [2019-12-07 13:36:58,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 13:36:58,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:58,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 13:36:58,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:36:58,893 INFO L87 Difference]: Start difference. First operand 16885 states and 51311 transitions. Second operand 17 states. [2019-12-07 13:37:04,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:04,049 INFO L93 Difference]: Finished difference Result 30427 states and 91933 transitions. [2019-12-07 13:37:04,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 13:37:04,049 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 13:37:04,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:04,077 INFO L225 Difference]: With dead ends: 30427 [2019-12-07 13:37:04,077 INFO L226 Difference]: Without dead ends: 25283 [2019-12-07 13:37:04,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1246 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=558, Invalid=3474, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 13:37:04,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25283 states. [2019-12-07 13:37:04,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25283 to 16922. [2019-12-07 13:37:04,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16922 states. [2019-12-07 13:37:04,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16922 states to 16922 states and 51455 transitions. [2019-12-07 13:37:04,379 INFO L78 Accepts]: Start accepts. Automaton has 16922 states and 51455 transitions. Word has length 67 [2019-12-07 13:37:04,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:04,379 INFO L462 AbstractCegarLoop]: Abstraction has 16922 states and 51455 transitions. [2019-12-07 13:37:04,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 13:37:04,379 INFO L276 IsEmpty]: Start isEmpty. Operand 16922 states and 51455 transitions. [2019-12-07 13:37:04,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:04,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:04,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:04,394 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:04,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:04,394 INFO L82 PathProgramCache]: Analyzing trace with hash -417329779, now seen corresponding path program 7 times [2019-12-07 13:37:04,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:04,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808672281] [2019-12-07 13:37:04,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:04,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:04,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:04,714 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808672281] [2019-12-07 13:37:04,714 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:04,714 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:37:04,714 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482960496] [2019-12-07 13:37:04,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:37:04,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:04,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:37:04,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:37:04,715 INFO L87 Difference]: Start difference. First operand 16922 states and 51455 transitions. Second operand 15 states. [2019-12-07 13:37:07,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:07,795 INFO L93 Difference]: Finished difference Result 43192 states and 130468 transitions. [2019-12-07 13:37:07,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 13:37:07,796 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:37:07,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:07,834 INFO L225 Difference]: With dead ends: 43192 [2019-12-07 13:37:07,835 INFO L226 Difference]: Without dead ends: 40217 [2019-12-07 13:37:07,836 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 997 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=535, Invalid=3005, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 13:37:07,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40217 states. [2019-12-07 13:37:08,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40217 to 20606. [2019-12-07 13:37:08,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20606 states. [2019-12-07 13:37:08,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20606 states to 20606 states and 62400 transitions. [2019-12-07 13:37:08,233 INFO L78 Accepts]: Start accepts. Automaton has 20606 states and 62400 transitions. Word has length 67 [2019-12-07 13:37:08,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:08,233 INFO L462 AbstractCegarLoop]: Abstraction has 20606 states and 62400 transitions. [2019-12-07 13:37:08,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:37:08,233 INFO L276 IsEmpty]: Start isEmpty. Operand 20606 states and 62400 transitions. [2019-12-07 13:37:08,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:08,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:08,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:08,250 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:08,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:08,250 INFO L82 PathProgramCache]: Analyzing trace with hash -795166045, now seen corresponding path program 8 times [2019-12-07 13:37:08,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:08,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011036626] [2019-12-07 13:37:08,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:08,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:08,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:08,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011036626] [2019-12-07 13:37:08,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:08,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:37:08,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809536097] [2019-12-07 13:37:08,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:37:08,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:08,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:37:08,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:37:08,538 INFO L87 Difference]: Start difference. First operand 20606 states and 62400 transitions. Second operand 15 states. [2019-12-07 13:37:11,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:11,045 INFO L93 Difference]: Finished difference Result 32729 states and 98293 transitions. [2019-12-07 13:37:11,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 13:37:11,046 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:37:11,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:11,078 INFO L225 Difference]: With dead ends: 32729 [2019-12-07 13:37:11,078 INFO L226 Difference]: Without dead ends: 28809 [2019-12-07 13:37:11,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=244, Invalid=1162, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 13:37:11,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28809 states. [2019-12-07 13:37:11,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28809 to 20481. [2019-12-07 13:37:11,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20481 states. [2019-12-07 13:37:11,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20481 states to 20481 states and 62087 transitions. [2019-12-07 13:37:11,427 INFO L78 Accepts]: Start accepts. Automaton has 20481 states and 62087 transitions. Word has length 67 [2019-12-07 13:37:11,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:11,427 INFO L462 AbstractCegarLoop]: Abstraction has 20481 states and 62087 transitions. [2019-12-07 13:37:11,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:37:11,427 INFO L276 IsEmpty]: Start isEmpty. Operand 20481 states and 62087 transitions. [2019-12-07 13:37:11,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:11,444 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:11,444 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:11,444 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:11,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:11,445 INFO L82 PathProgramCache]: Analyzing trace with hash -837191095, now seen corresponding path program 9 times [2019-12-07 13:37:11,445 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:11,445 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971226836] [2019-12-07 13:37:11,445 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:11,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:11,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:11,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [971226836] [2019-12-07 13:37:11,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:11,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:37:11,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989104098] [2019-12-07 13:37:11,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:37:11,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:11,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:37:11,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:37:11,574 INFO L87 Difference]: Start difference. First operand 20481 states and 62087 transitions. Second operand 11 states. [2019-12-07 13:37:12,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:12,351 INFO L93 Difference]: Finished difference Result 44550 states and 135153 transitions. [2019-12-07 13:37:12,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 13:37:12,352 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:37:12,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:12,392 INFO L225 Difference]: With dead ends: 44550 [2019-12-07 13:37:12,392 INFO L226 Difference]: Without dead ends: 38576 [2019-12-07 13:37:12,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 291 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=254, Invalid=1006, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 13:37:12,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38576 states. [2019-12-07 13:37:12,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38576 to 19353. [2019-12-07 13:37:12,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19353 states. [2019-12-07 13:37:12,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19353 states to 19353 states and 58816 transitions. [2019-12-07 13:37:12,780 INFO L78 Accepts]: Start accepts. Automaton has 19353 states and 58816 transitions. Word has length 67 [2019-12-07 13:37:12,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:12,780 INFO L462 AbstractCegarLoop]: Abstraction has 19353 states and 58816 transitions. [2019-12-07 13:37:12,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:37:12,780 INFO L276 IsEmpty]: Start isEmpty. Operand 19353 states and 58816 transitions. [2019-12-07 13:37:12,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:12,797 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:12,797 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:12,797 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:12,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:12,797 INFO L82 PathProgramCache]: Analyzing trace with hash -1215027361, now seen corresponding path program 10 times [2019-12-07 13:37:12,797 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:12,797 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108244637] [2019-12-07 13:37:12,797 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:12,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:12,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108244637] [2019-12-07 13:37:12,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:12,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:37:12,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324881534] [2019-12-07 13:37:12,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:37:12,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:12,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:37:12,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:37:12,904 INFO L87 Difference]: Start difference. First operand 19353 states and 58816 transitions. Second operand 10 states. [2019-12-07 13:37:13,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:13,993 INFO L93 Difference]: Finished difference Result 30751 states and 93008 transitions. [2019-12-07 13:37:13,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:37:13,994 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 13:37:13,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:14,036 INFO L225 Difference]: With dead ends: 30751 [2019-12-07 13:37:14,036 INFO L226 Difference]: Without dead ends: 26640 [2019-12-07 13:37:14,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:37:14,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26640 states. [2019-12-07 13:37:14,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26640 to 18280. [2019-12-07 13:37:14,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18280 states. [2019-12-07 13:37:14,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18280 states to 18280 states and 55592 transitions. [2019-12-07 13:37:14,350 INFO L78 Accepts]: Start accepts. Automaton has 18280 states and 55592 transitions. Word has length 67 [2019-12-07 13:37:14,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:14,351 INFO L462 AbstractCegarLoop]: Abstraction has 18280 states and 55592 transitions. [2019-12-07 13:37:14,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:37:14,351 INFO L276 IsEmpty]: Start isEmpty. Operand 18280 states and 55592 transitions. [2019-12-07 13:37:14,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:14,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:14,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:14,366 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:14,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:14,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1574036275, now seen corresponding path program 11 times [2019-12-07 13:37:14,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:14,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693968981] [2019-12-07 13:37:14,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:14,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:14,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:14,781 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [693968981] [2019-12-07 13:37:14,781 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:14,782 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 13:37:14,782 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959804425] [2019-12-07 13:37:14,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 13:37:14,782 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:14,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 13:37:14,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:37:14,782 INFO L87 Difference]: Start difference. First operand 18280 states and 55592 transitions. Second operand 17 states. [2019-12-07 13:37:25,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:25,257 INFO L93 Difference]: Finished difference Result 34701 states and 104030 transitions. [2019-12-07 13:37:25,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2019-12-07 13:37:25,259 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 13:37:25,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:25,312 INFO L225 Difference]: With dead ends: 34701 [2019-12-07 13:37:25,312 INFO L226 Difference]: Without dead ends: 32014 [2019-12-07 13:37:25,313 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1133 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=592, Invalid=3568, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 13:37:25,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32014 states. [2019-12-07 13:37:25,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32014 to 18782. [2019-12-07 13:37:25,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18782 states. [2019-12-07 13:37:25,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18782 states to 18782 states and 56828 transitions. [2019-12-07 13:37:25,665 INFO L78 Accepts]: Start accepts. Automaton has 18782 states and 56828 transitions. Word has length 67 [2019-12-07 13:37:25,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:25,665 INFO L462 AbstractCegarLoop]: Abstraction has 18782 states and 56828 transitions. [2019-12-07 13:37:25,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 13:37:25,665 INFO L276 IsEmpty]: Start isEmpty. Operand 18782 states and 56828 transitions. [2019-12-07 13:37:25,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:25,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:25,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:25,682 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:25,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:25,682 INFO L82 PathProgramCache]: Analyzing trace with hash -140953989, now seen corresponding path program 12 times [2019-12-07 13:37:25,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:25,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012879034] [2019-12-07 13:37:25,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:25,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:26,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:26,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012879034] [2019-12-07 13:37:26,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:26,104 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 13:37:26,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634558924] [2019-12-07 13:37:26,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 13:37:26,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:26,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 13:37:26,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:37:26,105 INFO L87 Difference]: Start difference. First operand 18782 states and 56828 transitions. Second operand 18 states. [2019-12-07 13:37:32,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:32,005 INFO L93 Difference]: Finished difference Result 32480 states and 97535 transitions. [2019-12-07 13:37:32,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 13:37:32,006 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 13:37:32,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:32,040 INFO L225 Difference]: With dead ends: 32480 [2019-12-07 13:37:32,040 INFO L226 Difference]: Without dead ends: 31247 [2019-12-07 13:37:32,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1456 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=668, Invalid=4444, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 13:37:32,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31247 states. [2019-12-07 13:37:32,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31247 to 18604. [2019-12-07 13:37:32,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18604 states. [2019-12-07 13:37:32,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18604 states to 18604 states and 56323 transitions. [2019-12-07 13:37:32,386 INFO L78 Accepts]: Start accepts. Automaton has 18604 states and 56323 transitions. Word has length 67 [2019-12-07 13:37:32,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:32,386 INFO L462 AbstractCegarLoop]: Abstraction has 18604 states and 56323 transitions. [2019-12-07 13:37:32,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 13:37:32,386 INFO L276 IsEmpty]: Start isEmpty. Operand 18604 states and 56323 transitions. [2019-12-07 13:37:32,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:32,402 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:32,402 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:32,402 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:32,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:32,403 INFO L82 PathProgramCache]: Analyzing trace with hash -2140478285, now seen corresponding path program 13 times [2019-12-07 13:37:32,403 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:32,403 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453715013] [2019-12-07 13:37:32,403 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:32,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:32,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:32,640 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453715013] [2019-12-07 13:37:32,640 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:32,640 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:37:32,640 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2101871105] [2019-12-07 13:37:32,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:37:32,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:32,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:37:32,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:37:32,641 INFO L87 Difference]: Start difference. First operand 18604 states and 56323 transitions. Second operand 15 states. [2019-12-07 13:37:37,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:37,435 INFO L93 Difference]: Finished difference Result 44320 states and 131779 transitions. [2019-12-07 13:37:37,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 13:37:37,436 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:37:37,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:37,476 INFO L225 Difference]: With dead ends: 44320 [2019-12-07 13:37:37,476 INFO L226 Difference]: Without dead ends: 37258 [2019-12-07 13:37:37,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1421 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=727, Invalid=3965, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 13:37:37,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37258 states. [2019-12-07 13:37:37,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37258 to 17591. [2019-12-07 13:37:37,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17591 states. [2019-12-07 13:37:37,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17591 states to 17591 states and 53392 transitions. [2019-12-07 13:37:37,870 INFO L78 Accepts]: Start accepts. Automaton has 17591 states and 53392 transitions. Word has length 67 [2019-12-07 13:37:37,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:37,870 INFO L462 AbstractCegarLoop]: Abstraction has 17591 states and 53392 transitions. [2019-12-07 13:37:37,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:37:37,871 INFO L276 IsEmpty]: Start isEmpty. Operand 17591 states and 53392 transitions. [2019-12-07 13:37:37,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:37,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:37,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:37,885 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:37,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:37,886 INFO L82 PathProgramCache]: Analyzing trace with hash -394449869, now seen corresponding path program 14 times [2019-12-07 13:37:37,886 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:37,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907270798] [2019-12-07 13:37:37,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:37,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:38,149 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:38,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907270798] [2019-12-07 13:37:38,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:38,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:37:38,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727735542] [2019-12-07 13:37:38,150 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:37:38,150 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:38,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:37:38,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:37:38,151 INFO L87 Difference]: Start difference. First operand 17591 states and 53392 transitions. Second operand 16 states. [2019-12-07 13:37:38,650 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 13:37:40,774 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 13:37:47,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:47,863 INFO L93 Difference]: Finished difference Result 39346 states and 117600 transitions. [2019-12-07 13:37:47,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 13:37:47,864 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 13:37:47,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:47,918 INFO L225 Difference]: With dead ends: 39346 [2019-12-07 13:37:47,918 INFO L226 Difference]: Without dead ends: 37115 [2019-12-07 13:37:47,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1392 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=754, Invalid=3938, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 13:37:48,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37115 states. [2019-12-07 13:37:48,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37115 to 17591. [2019-12-07 13:37:48,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17591 states. [2019-12-07 13:37:48,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17591 states to 17591 states and 53374 transitions. [2019-12-07 13:37:48,304 INFO L78 Accepts]: Start accepts. Automaton has 17591 states and 53374 transitions. Word has length 67 [2019-12-07 13:37:48,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:48,304 INFO L462 AbstractCegarLoop]: Abstraction has 17591 states and 53374 transitions. [2019-12-07 13:37:48,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:37:48,304 INFO L276 IsEmpty]: Start isEmpty. Operand 17591 states and 53374 transitions. [2019-12-07 13:37:48,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:48,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:48,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:48,320 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:48,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:48,320 INFO L82 PathProgramCache]: Analyzing trace with hash -1284484685, now seen corresponding path program 15 times [2019-12-07 13:37:48,320 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:48,320 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72310755] [2019-12-07 13:37:48,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:48,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:37:48,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:37:48,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72310755] [2019-12-07 13:37:48,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:37:48,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:37:48,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728852685] [2019-12-07 13:37:48,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:37:48,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:37:48,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:37:48,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:37:48,414 INFO L87 Difference]: Start difference. First operand 17591 states and 53374 transitions. Second operand 11 states. [2019-12-07 13:37:48,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:37:48,954 INFO L93 Difference]: Finished difference Result 31727 states and 95978 transitions. [2019-12-07 13:37:48,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 13:37:48,955 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:37:48,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:37:48,981 INFO L225 Difference]: With dead ends: 31727 [2019-12-07 13:37:48,981 INFO L226 Difference]: Without dead ends: 27036 [2019-12-07 13:37:48,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=114, Invalid=438, Unknown=0, NotChecked=0, Total=552 [2019-12-07 13:37:49,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27036 states. [2019-12-07 13:37:49,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27036 to 14727. [2019-12-07 13:37:49,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14727 states. [2019-12-07 13:37:49,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14727 states to 14727 states and 45000 transitions. [2019-12-07 13:37:49,263 INFO L78 Accepts]: Start accepts. Automaton has 14727 states and 45000 transitions. Word has length 67 [2019-12-07 13:37:49,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:37:49,264 INFO L462 AbstractCegarLoop]: Abstraction has 14727 states and 45000 transitions. [2019-12-07 13:37:49,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:37:49,264 INFO L276 IsEmpty]: Start isEmpty. Operand 14727 states and 45000 transitions. [2019-12-07 13:37:49,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:37:49,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:37:49,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:37:49,277 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:37:49,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:37:49,277 INFO L82 PathProgramCache]: Analyzing trace with hash 656134515, now seen corresponding path program 16 times [2019-12-07 13:37:49,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:37:49,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1579465114] [2019-12-07 13:37:49,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:37:49,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:37:49,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:37:49,346 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:37:49,346 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:37:49,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= 0 |v_ULTIMATE.start_main_~#t281~0.offset_26|) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t281~0.base_37|) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (select .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37|) 0) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t281~0.base_37| 4)) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37| 1)) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37|) |v_ULTIMATE.start_main_~#t281~0.offset_26| 0)) |v_#memory_int_23|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_30|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_26|, ULTIMATE.start_main_~#t281~0.base=|v_ULTIMATE.start_main_~#t281~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t281~0.offset=|v_ULTIMATE.start_main_~#t281~0.offset_26|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t283~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t283~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t282~0.offset, ULTIMATE.start_main_~#t281~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t281~0.offset] because there is no mapped edge [2019-12-07 13:37:49,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t282~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t282~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13|) |v_ULTIMATE.start_main_~#t282~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t282~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t282~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t282~0.offset] because there is no mapped edge [2019-12-07 13:37:49,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:37:49,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1495619111 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1495619111 256) 0))) (or (and (= ~a$w_buff1~0_In-1495619111 |P1Thread1of1ForFork2_#t~ite9_Out-1495619111|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-1495619111 |P1Thread1of1ForFork2_#t~ite9_Out-1495619111|)))) InVars {~a~0=~a~0_In-1495619111, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} OutVars{~a~0=~a~0_In-1495619111, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1495619111|, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:37:49,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:37:49,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1020674314 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1020674314 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1020674314|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1020674314 |P0Thread1of1ForFork1_#t~ite5_Out1020674314|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1020674314, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1020674314} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1020674314|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020674314, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1020674314} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:37:49,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1630074572 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1630074572 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1630074572 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1630074572 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1630074572|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1630074572 |P0Thread1of1ForFork1_#t~ite6_Out1630074572|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1630074572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1630074572} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1630074572|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1630074572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1630074572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:37:49,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1222331381 256))) (.cse1 (= ~a$r_buff0_thd1~0_Out1222331381 ~a$r_buff0_thd1~0_In1222331381)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1222331381 256)))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~a$r_buff0_thd1~0_Out1222331381 0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1222331381} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1222331381|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1222331381} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:37:49,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In733260851 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In733260851 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In733260851 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In733260851 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd1~0_In733260851 |P0Thread1of1ForFork1_#t~ite8_Out733260851|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out733260851|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In733260851, ~a$w_buff1_used~0=~a$w_buff1_used~0_In733260851} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out733260851|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In733260851, ~a$w_buff1_used~0=~a$w_buff1_used~0_In733260851} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:37:49,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:37:49,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t283~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t283~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t283~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t283~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12|) |v_ULTIMATE.start_main_~#t283~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_12|, #length=|v_#length_15|, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t283~0.base, #length, ULTIMATE.start_main_~#t283~0.offset] because there is no mapped edge [2019-12-07 13:37:49,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2017911437 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-2017911437| |P2Thread1of1ForFork0_#t~ite20_Out-2017911437|) (= |P2Thread1of1ForFork0_#t~ite21_Out-2017911437| ~a$w_buff0~0_In-2017911437)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-2017911437| |P2Thread1of1ForFork0_#t~ite20_Out-2017911437|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2017911437 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-2017911437 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-2017911437 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In-2017911437 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-2017911437| ~a$w_buff0~0_In-2017911437)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2017911437, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2017911437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2017911437, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2017911437, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2017911437, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2017911437|, ~weak$$choice2~0=~weak$$choice2~0_In-2017911437} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2017911437|, ~a$w_buff0~0=~a$w_buff0~0_In-2017911437, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2017911437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2017911437, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2017911437, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2017911437|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2017911437, ~weak$$choice2~0=~weak$$choice2~0_In-2017911437} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:37:49,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1609144605 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1609144605 256) 0))) (or (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1609144605 256))) (and .cse0 (= (mod ~a$w_buff1_used~0_In1609144605 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In1609144605 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1609144605| |P2Thread1of1ForFork0_#t~ite27_Out1609144605|) (= ~a$w_buff0_used~0_In1609144605 |P2Thread1of1ForFork0_#t~ite26_Out1609144605|)) (and (= ~a$w_buff0_used~0_In1609144605 |P2Thread1of1ForFork0_#t~ite27_Out1609144605|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In1609144605| |P2Thread1of1ForFork0_#t~ite26_Out1609144605|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1609144605|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1609144605, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1609144605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1609144605, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1609144605, ~weak$$choice2~0=~weak$$choice2~0_In1609144605} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1609144605|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1609144605|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1609144605, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1609144605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1609144605, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1609144605, ~weak$$choice2~0=~weak$$choice2~0_In1609144605} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:37:49,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-544989 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-544989| |P2Thread1of1ForFork0_#t~ite30_Out-544989|) (= |P2Thread1of1ForFork0_#t~ite29_Out-544989| ~a$w_buff1_used~0_In-544989) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-544989 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In-544989 256) 0) .cse0) (= 0 (mod ~a$w_buff0_used~0_In-544989 256)) (and (= 0 (mod ~a$w_buff1_used~0_In-544989 256)) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite29_In-544989| |P2Thread1of1ForFork0_#t~ite29_Out-544989|) (= ~a$w_buff1_used~0_In-544989 |P2Thread1of1ForFork0_#t~ite30_Out-544989|) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-544989, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-544989, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-544989, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-544989, ~weak$$choice2~0=~weak$$choice2~0_In-544989, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-544989|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-544989, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-544989, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-544989, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-544989|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-544989, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-544989|, ~weak$$choice2~0=~weak$$choice2~0_In-544989} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:37:49,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:37:49,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:37:49,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-278990392 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-278990392 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-278990392 |P2Thread1of1ForFork0_#t~ite38_Out-278990392|)) (and (or .cse0 .cse1) (= ~a~0_In-278990392 |P2Thread1of1ForFork0_#t~ite38_Out-278990392|)))) InVars {~a~0=~a~0_In-278990392, ~a$w_buff1~0=~a$w_buff1~0_In-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-278990392, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-278990392} OutVars{~a~0=~a~0_In-278990392, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-278990392|, ~a$w_buff1~0=~a$w_buff1~0_In-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-278990392, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-278990392} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:37:49,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:37:49,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1624696167 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1624696167 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-1624696167| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1624696167| ~a$w_buff0_used~0_In-1624696167) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1624696167|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:37:49,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-1232627745 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1232627745 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1232627745 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1232627745 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1232627745| ~a$w_buff1_used~0_In-1232627745) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1232627745| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1232627745|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:37:49,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1212282134 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1212282134 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1212282134| ~a$r_buff0_thd3~0_In-1212282134)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1212282134| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1212282134|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:37:49,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In1001043203 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1001043203 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1001043203 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1001043203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out1001043203| 0)) (and (= ~a$r_buff1_thd3~0_In1001043203 |P2Thread1of1ForFork0_#t~ite43_Out1001043203|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1001043203, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1001043203, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1001043203, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1001043203} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1001043203|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1001043203, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1001043203, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1001043203, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1001043203} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:37:49,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:37:49,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1954047048 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1954047048 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1954047048|) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1954047048| ~a$w_buff0_used~0_In1954047048) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1954047048|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:37:49,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1710602034 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-1710602034 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1710602034 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1710602034 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1710602034|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1710602034| ~a$w_buff1_used~0_In-1710602034) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1710602034, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1710602034, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1710602034, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1710602034} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1710602034, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1710602034, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1710602034, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1710602034|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1710602034} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:37:49,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-664654049 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-664654049 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-664654049| ~a$r_buff0_thd2~0_In-664654049)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-664654049| 0) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-664654049, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-664654049} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-664654049, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-664654049, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-664654049|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:37:49,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-1631062844 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1631062844 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1631062844 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1631062844 256) 0))) (or (and (= ~a$r_buff1_thd2~0_In-1631062844 |P1Thread1of1ForFork2_#t~ite14_Out-1631062844|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1631062844|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1631062844, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1631062844, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1631062844|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:37:49,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:37:49,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:37:49,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1514468270 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1514468270 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In1514468270 |ULTIMATE.start_main_#t~ite47_Out1514468270|) (not .cse1)) (and (= ~a~0_In1514468270 |ULTIMATE.start_main_#t~ite47_Out1514468270|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In1514468270, ~a$w_buff1~0=~a$w_buff1~0_In1514468270, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1514468270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1514468270} OutVars{~a~0=~a~0_In1514468270, ~a$w_buff1~0=~a$w_buff1~0_In1514468270, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1514468270|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1514468270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1514468270} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:37:49,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:37:49,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1225907905 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1225907905 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1225907905| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1225907905| ~a$w_buff0_used~0_In1225907905) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1225907905|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:37:49,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1341677112 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1341677112 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1341677112| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1341677112| ~a$w_buff1_used~0_In-1341677112) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1341677112|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:37:49,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1867999693 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1867999693 256)))) (or (and (= ~a$r_buff0_thd0~0_In1867999693 |ULTIMATE.start_main_#t~ite51_Out1867999693|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1867999693|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1867999693, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1867999693} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1867999693|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1867999693, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1867999693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:37:49,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-2046667674 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-2046667674 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-2046667674 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-2046667674 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-2046667674| 0)) (and (= |ULTIMATE.start_main_#t~ite52_Out-2046667674| ~a$r_buff1_thd0~0_In-2046667674) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2046667674|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:37:49,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:37:49,411 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:37:49 BasicIcfg [2019-12-07 13:37:49,411 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:37:49,411 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:37:49,411 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:37:49,411 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:37:49,412 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:34:27" (3/4) ... [2019-12-07 13:37:49,413 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:37:49,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~a$r_buff1_thd0~0_203 0) (= 0 v_~a$r_buff1_thd1~0_191) (= v_~z~0_36 0) (= 0 |v_ULTIMATE.start_main_~#t281~0.offset_26|) (= v_~a$r_buff0_thd0~0_228 0) (= 0 v_~a$r_buff0_thd1~0_317) (= 0 v_~a$read_delayed_var~0.base_8) (= 0 v_~a$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_42 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t281~0.base_37|) (= v_~a$r_buff0_thd3~0_430 0) (= v_~main$tmp_guard0~0_25 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (select .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37|) 0) (= v_~__unbuffered_cnt~0_111 0) (< 0 |v_#StackHeapBarrier_15|) (= 0 v_~x~0_176) (= v_~__unbuffered_p1_EBX~0_55 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t281~0.base_37| 4)) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t281~0.base_37| 1)) (= 0 |v_#NULL.base_4|) (= v_~a$mem_tmp~0_16 0) (= 0 v_~a$w_buff0_used~0_889) (= v_~a$w_buff0~0_416 0) (= v_~a$r_buff1_thd3~0_333 0) (= 0 v_~a$w_buff1_used~0_596) (= |v_#NULL.offset_4| 0) (= 0 v_~a$w_buff1~0_333) (= 0 v_~a$r_buff1_thd2~0_185) (= v_~a~0_191 0) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~weak$$choice0~0_13) (= v_~weak$$choice2~0_131 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t281~0.base_37|) |v_ULTIMATE.start_main_~#t281~0.offset_26| 0)) |v_#memory_int_23|) (= v_~y~0_31 0) (= 0 v_~a$read_delayed~0_8) (= v_~a$flush_delayed~0_26 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_38|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_228, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_127|, ~a~0=v_~a~0_191, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_83|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_18|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_333, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_889, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_317, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_416, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_203, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_111, ~x~0=v_~x~0_176, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_42, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_67|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_43|, ~a$w_buff1~0=v_~a$w_buff1~0_333, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_30|, ~y~0=v_~y~0_31, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_55, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_191, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_430, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_26|, ULTIMATE.start_main_~#t281~0.base=|v_ULTIMATE.start_main_~#t281~0.base_37|, ~a$flush_delayed~0=v_~a$flush_delayed~0_26, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_25|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_36, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_596, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8, ULTIMATE.start_main_~#t281~0.offset=|v_ULTIMATE.start_main_~#t281~0.offset_26|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t283~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t283~0.base, ~y~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t282~0.offset, ULTIMATE.start_main_~#t281~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t281~0.offset] because there is no mapped edge [2019-12-07 13:37:49,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t282~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t282~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t282~0.base_13|) |v_ULTIMATE.start_main_~#t282~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t282~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t282~0.offset_11|) (= (select |v_#valid_41| |v_ULTIMATE.start_main_~#t282~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t282~0.base=|v_ULTIMATE.start_main_~#t282~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t282~0.offset=|v_ULTIMATE.start_main_~#t282~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t282~0.offset] because there is no mapped edge [2019-12-07 13:37:49,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L750: Formula: (and (= v_~a$r_buff0_thd1~0_28 v_~a$r_buff1_thd1~0_23) (= v_~a$r_buff0_thd2~0_20 v_~a$r_buff1_thd2~0_16) (= v_~a$r_buff0_thd0~0_18 v_~a$r_buff1_thd0~0_17) (= v_~a$r_buff0_thd1~0_27 1) (= 1 v_~x~0_7) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~a$r_buff0_thd3~0_73 v_~a$r_buff1_thd3~0_40)) InVars {~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_28, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18} OutVars{~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_23, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_40, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_16, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_17, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_73, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_27, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_18, ~x~0=v_~x~0_7} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:37:49,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L776-2-->L776-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd2~0_In-1495619111 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1495619111 256) 0))) (or (and (= ~a$w_buff1~0_In-1495619111 |P1Thread1of1ForFork2_#t~ite9_Out-1495619111|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a~0_In-1495619111 |P1Thread1of1ForFork2_#t~ite9_Out-1495619111|)))) InVars {~a~0=~a~0_In-1495619111, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} OutVars{~a~0=~a~0_In-1495619111, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1495619111|, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:37:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_47) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_47, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:37:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1020674314 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1020674314 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1020674314|)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1020674314 |P0Thread1of1ForFork1_#t~ite5_Out1020674314|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1020674314, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1020674314} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1020674314|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1020674314, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1020674314} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:37:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1630074572 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1630074572 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1630074572 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1630074572 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1630074572|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1630074572 |P0Thread1of1ForFork1_#t~ite6_Out1630074572|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1630074572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1630074572} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1630074572|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1630074572, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1630074572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:37:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1222331381 256))) (.cse1 (= ~a$r_buff0_thd1~0_Out1222331381 ~a$r_buff0_thd1~0_In1222331381)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1222331381 256)))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~a$r_buff0_thd1~0_Out1222331381 0)) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1222331381} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1222331381|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1222331381} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:37:49,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In733260851 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In733260851 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In733260851 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In733260851 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$r_buff1_thd1~0_In733260851 |P0Thread1of1ForFork1_#t~ite8_Out733260851|)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out733260851|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In733260851, ~a$w_buff1_used~0=~a$w_buff1_used~0_In733260851} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out733260851|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In733260851, ~a$w_buff1_used~0=~a$w_buff1_used~0_In733260851} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:37:49,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_148 |v_P0Thread1of1ForFork1_#t~ite8_50|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_148, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:37:49,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L837-1-->L839: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12|) 0) (= |v_ULTIMATE.start_main_~#t283~0.offset_10| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t283~0.base_12| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t283~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t283~0.base_12| 0)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t283~0.base_12| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t283~0.base_12|) |v_ULTIMATE.start_main_~#t283~0.offset_10| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t283~0.base=|v_ULTIMATE.start_main_~#t283~0.base_12|, #length=|v_#length_15|, ULTIMATE.start_main_~#t283~0.offset=|v_ULTIMATE.start_main_~#t283~0.offset_10|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t283~0.base, #length, ULTIMATE.start_main_~#t283~0.offset] because there is no mapped edge [2019-12-07 13:37:49,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2017911437 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-2017911437| |P2Thread1of1ForFork0_#t~ite20_Out-2017911437|) (= |P2Thread1of1ForFork0_#t~ite21_Out-2017911437| ~a$w_buff0~0_In-2017911437)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-2017911437| |P2Thread1of1ForFork0_#t~ite20_Out-2017911437|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-2017911437 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-2017911437 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-2017911437 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In-2017911437 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-2017911437| ~a$w_buff0~0_In-2017911437)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-2017911437, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2017911437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2017911437, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2017911437, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2017911437, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-2017911437|, ~weak$$choice2~0=~weak$$choice2~0_In-2017911437} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-2017911437|, ~a$w_buff0~0=~a$w_buff0~0_In-2017911437, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2017911437, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2017911437, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2017911437, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-2017911437|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2017911437, ~weak$$choice2~0=~weak$$choice2~0_In-2017911437} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:37:49,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1609144605 256)))) (or (and (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1609144605 256) 0))) (or (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1609144605 256))) (and .cse0 (= (mod ~a$w_buff1_used~0_In1609144605 256) 0)) (= 0 (mod ~a$w_buff0_used~0_In1609144605 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1609144605| |P2Thread1of1ForFork0_#t~ite27_Out1609144605|) (= ~a$w_buff0_used~0_In1609144605 |P2Thread1of1ForFork0_#t~ite26_Out1609144605|)) (and (= ~a$w_buff0_used~0_In1609144605 |P2Thread1of1ForFork0_#t~ite27_Out1609144605|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In1609144605| |P2Thread1of1ForFork0_#t~ite26_Out1609144605|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1609144605|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1609144605, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1609144605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1609144605, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1609144605, ~weak$$choice2~0=~weak$$choice2~0_In1609144605} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1609144605|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1609144605|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1609144605, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1609144605, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1609144605, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1609144605, ~weak$$choice2~0=~weak$$choice2~0_In1609144605} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:37:49,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L804-->L804-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-544989 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite29_Out-544989| |P2Thread1of1ForFork0_#t~ite30_Out-544989|) (= |P2Thread1of1ForFork0_#t~ite29_Out-544989| ~a$w_buff1_used~0_In-544989) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-544989 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In-544989 256) 0) .cse0) (= 0 (mod ~a$w_buff0_used~0_In-544989 256)) (and (= 0 (mod ~a$w_buff1_used~0_In-544989 256)) .cse0))) .cse1) (and (= |P2Thread1of1ForFork0_#t~ite29_In-544989| |P2Thread1of1ForFork0_#t~ite29_Out-544989|) (= ~a$w_buff1_used~0_In-544989 |P2Thread1of1ForFork0_#t~ite30_Out-544989|) (not .cse1)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-544989, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-544989, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-544989, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-544989, ~weak$$choice2~0=~weak$$choice2~0_In-544989, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-544989|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-544989, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-544989, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-544989, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-544989|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-544989, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-544989|, ~weak$$choice2~0=~weak$$choice2~0_In-544989} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:37:49,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L805-->L806: Formula: (and (not (= (mod v_~weak$$choice2~0_32 256) 0)) (= v_~a$r_buff0_thd3~0_136 v_~a$r_buff0_thd3~0_135)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_32} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_135, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_32} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:37:49,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_12 0) (= v_~a~0_57 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_57, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:37:49,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L812-2-->L812-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-278990392 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-278990392 256)))) (or (and (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-278990392 |P2Thread1of1ForFork0_#t~ite38_Out-278990392|)) (and (or .cse0 .cse1) (= ~a~0_In-278990392 |P2Thread1of1ForFork0_#t~ite38_Out-278990392|)))) InVars {~a~0=~a~0_In-278990392, ~a$w_buff1~0=~a$w_buff1~0_In-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-278990392, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-278990392} OutVars{~a~0=~a~0_In-278990392, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-278990392|, ~a$w_buff1~0=~a$w_buff1~0_In-278990392, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-278990392, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-278990392} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:37:49,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L812-4-->L813: Formula: (= v_~a~0_20 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_20, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:37:49,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1624696167 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1624696167 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-1624696167| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-1624696167| ~a$w_buff0_used~0_In-1624696167) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1624696167|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:37:49,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-1232627745 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1232627745 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In-1232627745 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1232627745 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1232627745| ~a$w_buff1_used~0_In-1232627745) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1232627745| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1232627745, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1232627745, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1232627745, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1232627745, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1232627745|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:37:49,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1212282134 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1212282134 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1212282134| ~a$r_buff0_thd3~0_In-1212282134)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1212282134| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1212282134, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1212282134, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1212282134|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:37:49,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L816-->L816-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In1001043203 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1001043203 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In1001043203 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1001043203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out1001043203| 0)) (and (= ~a$r_buff1_thd3~0_In1001043203 |P2Thread1of1ForFork0_#t~ite43_Out1001043203|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1001043203, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1001043203, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1001043203, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1001043203} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1001043203|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1001043203, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1001043203, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1001043203, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1001043203} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:37:49,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_122 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_122, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:37:49,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1954047048 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1954047048 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1954047048|) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1954047048| ~a$w_buff0_used~0_In1954047048) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1954047048|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:37:49,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1710602034 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-1710602034 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1710602034 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1710602034 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1710602034|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1710602034| ~a$w_buff1_used~0_In-1710602034) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1710602034, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1710602034, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1710602034, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1710602034} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1710602034, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1710602034, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1710602034, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1710602034|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1710602034} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:37:49,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-664654049 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-664654049 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-664654049| ~a$r_buff0_thd2~0_In-664654049)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-664654049| 0) (not .cse0) (not .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-664654049, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-664654049} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-664654049, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-664654049, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-664654049|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In-1631062844 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1631062844 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-1631062844 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1631062844 256) 0))) (or (and (= ~a$r_buff1_thd2~0_In-1631062844 |P1Thread1of1ForFork2_#t~ite14_Out-1631062844|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1631062844|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1631062844, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1631062844, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1631062844|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [855] [855] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_79) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_79, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L839-1-->L845: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L845-2-->L845-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1514468270 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In1514468270 256)))) (or (and (not .cse0) (= ~a$w_buff1~0_In1514468270 |ULTIMATE.start_main_#t~ite47_Out1514468270|) (not .cse1)) (and (= ~a~0_In1514468270 |ULTIMATE.start_main_#t~ite47_Out1514468270|) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In1514468270, ~a$w_buff1~0=~a$w_buff1~0_In1514468270, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1514468270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1514468270} OutVars{~a~0=~a~0_In1514468270, ~a$w_buff1~0=~a$w_buff1~0_In1514468270, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1514468270|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1514468270, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1514468270} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L845-4-->L846: Formula: (= v_~a~0_30 |v_ULTIMATE.start_main_#t~ite47_13|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|} OutVars{~a~0=v_~a~0_30, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_12|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:37:49,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1225907905 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1225907905 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out1225907905| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out1225907905| ~a$w_buff0_used~0_In1225907905) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1225907905|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:37:49,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L847-->L847-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1341677112 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1341677112 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1341677112| 0)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1341677112| ~a$w_buff1_used~0_In-1341677112) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1341677112|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:37:49,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1867999693 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In1867999693 256)))) (or (and (= ~a$r_buff0_thd0~0_In1867999693 |ULTIMATE.start_main_#t~ite51_Out1867999693|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1867999693|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1867999693, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1867999693} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1867999693|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1867999693, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1867999693} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:37:49,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-2046667674 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-2046667674 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-2046667674 256) 0)) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-2046667674 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out-2046667674| 0)) (and (= |ULTIMATE.start_main_#t~ite52_Out-2046667674| ~a$r_buff1_thd0~0_In-2046667674) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2046667674|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:37:49,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~a$r_buff1_thd0~0_158 |v_ULTIMATE.start_main_#t~ite52_40|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_18 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_18 256)) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_21) (= 1 v_~__unbuffered_p1_EAX~0_20) (= 2 v_~x~0_125) (= v_~__unbuffered_p1_EBX~0_21 0) (= v_~__unbuffered_p2_EBX~0_24 0))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_18)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_18, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_24, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_158, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_125, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:37:49,475 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b6416aea-8c25-4c36-8240-244d9983711c/bin/utaipan/witness.graphml [2019-12-07 13:37:49,475 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:37:49,476 INFO L168 Benchmark]: Toolchain (without parser) took 202878.62 ms. Allocated memory was 1.0 GB in the beginning and 9.0 GB in the end (delta: 7.9 GB). Free memory was 938.2 MB in the beginning and 4.4 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,476 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:37:49,476 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.01 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -135.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,477 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,477 INFO L168 Benchmark]: Boogie Preprocessor took 25.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:37:49,477 INFO L168 Benchmark]: RCFGBuilder took 420.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,477 INFO L168 Benchmark]: TraceAbstraction took 201942.08 ms. Allocated memory was 1.1 GB in the beginning and 9.0 GB in the end (delta: 7.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,478 INFO L168 Benchmark]: Witness Printer took 63.79 ms. Allocated memory is still 9.0 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 42.2 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:37:49,479 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.01 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -135.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.51 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 420.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 201942.08 ms. Allocated memory was 1.1 GB in the beginning and 9.0 GB in the end (delta: 7.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 63.79 ms. Allocated memory is still 9.0 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 42.2 MB). Peak memory consumption was 42.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 103 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7568 VarBasedMoverChecksPositive, 290 VarBasedMoverChecksNegative, 97 SemBasedMoverChecksPositive, 263 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 90866 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t281, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t282, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L764] 2 x = 2 [L767] 2 y = 1 [L770] 2 __unbuffered_p1_EAX = y [L773] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L839] FCALL, FORK 0 pthread_create(&t283, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L790] 3 z = 1 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=2, y=1, z=1] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L812] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L845] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, z=1] [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 201.7s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 73.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10859 SDtfs, 17088 SDslu, 52247 SDs, 0 SdLazy, 50921 SolverSat, 1005 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 37.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 828 GetRequests, 48 SyntacticMatches, 31 SemanticMatches, 749 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10722 ImplicationChecksByTransitivity, 14.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=320855occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 102.0s AutomataMinimizationTime, 33 MinimizatonAttempts, 512639 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 1622 NumberOfCodeBlocks, 1622 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1522 ConstructedInterpolants, 0 QuantifiedInterpolants, 771113 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...