./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2fea58fdbf9706d848fbc36539872fbde4e50f84 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:05:51,190 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:05:51,191 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:05:51,199 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:05:51,199 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:05:51,200 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:05:51,201 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:05:51,202 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:05:51,203 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:05:51,204 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:05:51,204 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:05:51,205 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:05:51,205 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:05:51,206 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:05:51,207 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:05:51,208 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:05:51,208 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:05:51,209 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:05:51,210 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:05:51,212 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:05:51,213 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:05:51,213 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:05:51,214 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:05:51,215 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:05:51,216 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:05:51,216 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:05:51,217 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:05:51,217 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:05:51,217 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:05:51,218 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:05:51,218 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:05:51,219 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:05:51,219 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:05:51,219 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:05:51,220 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:05:51,220 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:05:51,220 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:05:51,221 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:05:51,221 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:05:51,221 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:05:51,222 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:05:51,222 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:05:51,232 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:05:51,233 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:05:51,233 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:05:51,233 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:05:51,233 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:05:51,234 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:05:51,235 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:05:51,235 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:05:51,235 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:05:51,235 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:05:51,235 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:05:51,236 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:05:51,237 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:05:51,237 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:05:51,237 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:05:51,238 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2fea58fdbf9706d848fbc36539872fbde4e50f84 [2019-12-07 13:05:51,336 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:05:51,347 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:05:51,350 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:05:51,351 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:05:51,351 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:05:51,352 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i [2019-12-07 13:05:51,397 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/data/4478764d7/dab2410041b74990b07d7365c3b2d206/FLAG23a4ce2ca [2019-12-07 13:05:51,772 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:05:51,773 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/sv-benchmarks/c/pthread-wmm/mix015_pso.oepc.i [2019-12-07 13:05:51,783 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/data/4478764d7/dab2410041b74990b07d7365c3b2d206/FLAG23a4ce2ca [2019-12-07 13:05:51,792 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/data/4478764d7/dab2410041b74990b07d7365c3b2d206 [2019-12-07 13:05:51,794 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:05:51,795 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:05:51,796 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:05:51,796 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:05:51,798 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:05:51,799 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:05:51" (1/1) ... [2019-12-07 13:05:51,801 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42296d0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:51, skipping insertion in model container [2019-12-07 13:05:51,801 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:05:51" (1/1) ... [2019-12-07 13:05:51,806 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:05:51,834 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:05:52,080 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:05:52,088 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:05:52,130 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:05:52,176 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:05:52,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52 WrapperNode [2019-12-07 13:05:52,177 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:05:52,177 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:05:52,177 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:05:52,177 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:05:52,183 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,196 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,214 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:05:52,214 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:05:52,214 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:05:52,214 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:05:52,220 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,221 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,224 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,224 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,231 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,234 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,236 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... [2019-12-07 13:05:52,239 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:05:52,239 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:05:52,240 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:05:52,240 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:05:52,240 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:05:52,283 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:05:52,283 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:05:52,283 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:05:52,284 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:05:52,284 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:05:52,284 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:05:52,284 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:05:52,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:05:52,285 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:05:52,655 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:05:52,655 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:05:52,656 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:05:52 BoogieIcfgContainer [2019-12-07 13:05:52,656 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:05:52,657 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:05:52,657 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:05:52,660 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:05:52,660 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:05:51" (1/3) ... [2019-12-07 13:05:52,660 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9251a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:05:52, skipping insertion in model container [2019-12-07 13:05:52,661 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:05:52" (2/3) ... [2019-12-07 13:05:52,661 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@9251a12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:05:52, skipping insertion in model container [2019-12-07 13:05:52,661 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:05:52" (3/3) ... [2019-12-07 13:05:52,663 INFO L109 eAbstractionObserver]: Analyzing ICFG mix015_pso.oepc.i [2019-12-07 13:05:52,671 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:05:52,671 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:05:52,677 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:05:52,678 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,707 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,717 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,721 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,722 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,723 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,724 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,725 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,726 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,727 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:05:52,745 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:05:52,757 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:05:52,757 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:05:52,757 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:05:52,757 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:05:52,757 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:05:52,757 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:05:52,757 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:05:52,757 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:05:52,768 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 13:05:52,769 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 13:05:52,830 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 13:05:52,830 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:05:52,841 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:05:52,856 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 13:05:52,897 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 13:05:52,897 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:05:52,903 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:05:52,920 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:05:52,921 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:05:55,797 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 13:05:56,337 WARN L192 SmtUtils]: Spent 415.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 13:05:56,397 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80759 [2019-12-07 13:05:56,397 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 13:05:56,402 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 102 transitions [2019-12-07 13:06:11,198 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118022 states. [2019-12-07 13:06:11,200 INFO L276 IsEmpty]: Start isEmpty. Operand 118022 states. [2019-12-07 13:06:11,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:06:11,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:06:11,204 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:06:11,204 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:06:11,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:06:11,208 INFO L82 PathProgramCache]: Analyzing trace with hash 922782, now seen corresponding path program 1 times [2019-12-07 13:06:11,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:06:11,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168795185] [2019-12-07 13:06:11,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:06:11,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:06:11,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:06:11,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168795185] [2019-12-07 13:06:11,347 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:06:11,347 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:06:11,348 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526000003] [2019-12-07 13:06:11,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:06:11,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:06:11,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:06:11,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:06:11,363 INFO L87 Difference]: Start difference. First operand 118022 states. Second operand 3 states. [2019-12-07 13:06:12,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:06:12,141 INFO L93 Difference]: Finished difference Result 116858 states and 495582 transitions. [2019-12-07 13:06:12,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:06:12,142 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:06:12,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:06:12,590 INFO L225 Difference]: With dead ends: 116858 [2019-12-07 13:06:12,590 INFO L226 Difference]: Without dead ends: 110138 [2019-12-07 13:06:12,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:06:18,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110138 states. [2019-12-07 13:06:19,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110138 to 110138. [2019-12-07 13:06:19,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110138 states. [2019-12-07 13:06:19,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110138 states to 110138 states and 466462 transitions. [2019-12-07 13:06:19,863 INFO L78 Accepts]: Start accepts. Automaton has 110138 states and 466462 transitions. Word has length 3 [2019-12-07 13:06:19,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:06:19,863 INFO L462 AbstractCegarLoop]: Abstraction has 110138 states and 466462 transitions. [2019-12-07 13:06:19,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:06:19,864 INFO L276 IsEmpty]: Start isEmpty. Operand 110138 states and 466462 transitions. [2019-12-07 13:06:19,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:06:19,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:06:19,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:06:19,866 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:06:19,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:06:19,867 INFO L82 PathProgramCache]: Analyzing trace with hash 228105342, now seen corresponding path program 1 times [2019-12-07 13:06:19,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:06:19,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075980163] [2019-12-07 13:06:19,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:06:19,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:06:19,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:06:19,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1075980163] [2019-12-07 13:06:19,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:06:19,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:06:19,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666727301] [2019-12-07 13:06:19,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:06:19,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:06:19,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:06:19,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:06:19,931 INFO L87 Difference]: Start difference. First operand 110138 states and 466462 transitions. Second operand 4 states. [2019-12-07 13:06:21,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:06:21,190 INFO L93 Difference]: Finished difference Result 170904 states and 695583 transitions. [2019-12-07 13:06:21,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:06:21,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:06:21,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:06:21,661 INFO L225 Difference]: With dead ends: 170904 [2019-12-07 13:06:21,661 INFO L226 Difference]: Without dead ends: 170855 [2019-12-07 13:06:21,662 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:06:26,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170855 states. [2019-12-07 13:06:30,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170855 to 156295. [2019-12-07 13:06:30,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156295 states. [2019-12-07 13:06:30,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156295 states to 156295 states and 644009 transitions. [2019-12-07 13:06:30,736 INFO L78 Accepts]: Start accepts. Automaton has 156295 states and 644009 transitions. Word has length 11 [2019-12-07 13:06:30,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:06:30,736 INFO L462 AbstractCegarLoop]: Abstraction has 156295 states and 644009 transitions. [2019-12-07 13:06:30,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:06:30,736 INFO L276 IsEmpty]: Start isEmpty. Operand 156295 states and 644009 transitions. [2019-12-07 13:06:30,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:06:30,743 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:06:30,743 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:06:30,743 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:06:30,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:06:30,743 INFO L82 PathProgramCache]: Analyzing trace with hash 891607686, now seen corresponding path program 1 times [2019-12-07 13:06:30,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:06:30,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845157418] [2019-12-07 13:06:30,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:06:30,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:06:30,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:06:30,809 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845157418] [2019-12-07 13:06:30,809 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:06:30,809 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:06:30,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [550260120] [2019-12-07 13:06:30,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:06:30,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:06:30,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:06:30,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:06:30,811 INFO L87 Difference]: Start difference. First operand 156295 states and 644009 transitions. Second operand 4 states. [2019-12-07 13:06:32,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:06:32,197 INFO L93 Difference]: Finished difference Result 220310 states and 887732 transitions. [2019-12-07 13:06:32,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:06:32,198 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:06:32,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:06:32,757 INFO L225 Difference]: With dead ends: 220310 [2019-12-07 13:06:32,757 INFO L226 Difference]: Without dead ends: 220254 [2019-12-07 13:06:32,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:06:38,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220254 states. [2019-12-07 13:06:43,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220254 to 186375. [2019-12-07 13:06:43,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186375 states. [2019-12-07 13:06:43,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186375 states to 186375 states and 763816 transitions. [2019-12-07 13:06:43,706 INFO L78 Accepts]: Start accepts. Automaton has 186375 states and 763816 transitions. Word has length 13 [2019-12-07 13:06:43,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:06:43,707 INFO L462 AbstractCegarLoop]: Abstraction has 186375 states and 763816 transitions. [2019-12-07 13:06:43,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:06:43,707 INFO L276 IsEmpty]: Start isEmpty. Operand 186375 states and 763816 transitions. [2019-12-07 13:06:43,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:06:43,714 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:06:43,714 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:06:43,714 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:06:43,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:06:43,715 INFO L82 PathProgramCache]: Analyzing trace with hash -1993825600, now seen corresponding path program 1 times [2019-12-07 13:06:43,715 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:06:43,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1823626602] [2019-12-07 13:06:43,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:06:43,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:06:43,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:06:43,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1823626602] [2019-12-07 13:06:43,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:06:43,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:06:43,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501044248] [2019-12-07 13:06:43,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:06:43,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:06:43,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:06:43,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:06:43,760 INFO L87 Difference]: Start difference. First operand 186375 states and 763816 transitions. Second operand 4 states. [2019-12-07 13:06:45,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:06:45,329 INFO L93 Difference]: Finished difference Result 228896 states and 935239 transitions. [2019-12-07 13:06:45,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:06:45,330 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:06:45,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:06:45,945 INFO L225 Difference]: With dead ends: 228896 [2019-12-07 13:06:45,945 INFO L226 Difference]: Without dead ends: 228896 [2019-12-07 13:06:45,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:06:51,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228896 states. [2019-12-07 13:06:54,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228896 to 196221. [2019-12-07 13:06:54,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196221 states. [2019-12-07 13:06:55,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196221 states to 196221 states and 805432 transitions. [2019-12-07 13:06:55,346 INFO L78 Accepts]: Start accepts. Automaton has 196221 states and 805432 transitions. Word has length 16 [2019-12-07 13:06:55,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:06:55,346 INFO L462 AbstractCegarLoop]: Abstraction has 196221 states and 805432 transitions. [2019-12-07 13:06:55,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:06:55,346 INFO L276 IsEmpty]: Start isEmpty. Operand 196221 states and 805432 transitions. [2019-12-07 13:06:55,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:06:55,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:06:55,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:06:55,360 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:06:55,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:06:55,360 INFO L82 PathProgramCache]: Analyzing trace with hash 247907846, now seen corresponding path program 1 times [2019-12-07 13:06:55,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:06:55,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073512270] [2019-12-07 13:06:55,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:06:55,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:06:55,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:06:55,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073512270] [2019-12-07 13:06:55,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:06:55,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:06:55,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [950355600] [2019-12-07 13:06:55,428 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:06:55,428 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:06:55,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:06:55,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:06:55,429 INFO L87 Difference]: Start difference. First operand 196221 states and 805432 transitions. Second operand 3 states. [2019-12-07 13:06:56,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:06:56,208 INFO L93 Difference]: Finished difference Result 184863 states and 750224 transitions. [2019-12-07 13:06:56,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:06:56,209 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:06:56,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:06:56,674 INFO L225 Difference]: With dead ends: 184863 [2019-12-07 13:06:56,674 INFO L226 Difference]: Without dead ends: 184863 [2019-12-07 13:06:56,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:03,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184863 states. [2019-12-07 13:07:05,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184863 to 181931. [2019-12-07 13:07:05,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181931 states. [2019-12-07 13:07:06,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181931 states to 181931 states and 739380 transitions. [2019-12-07 13:07:06,519 INFO L78 Accepts]: Start accepts. Automaton has 181931 states and 739380 transitions. Word has length 18 [2019-12-07 13:07:06,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:06,520 INFO L462 AbstractCegarLoop]: Abstraction has 181931 states and 739380 transitions. [2019-12-07 13:07:06,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:06,520 INFO L276 IsEmpty]: Start isEmpty. Operand 181931 states and 739380 transitions. [2019-12-07 13:07:06,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:07:06,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:06,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:06,529 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:06,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:06,529 INFO L82 PathProgramCache]: Analyzing trace with hash 436764514, now seen corresponding path program 1 times [2019-12-07 13:07:06,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:06,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162528942] [2019-12-07 13:07:06,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:06,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:06,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:06,559 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162528942] [2019-12-07 13:07:06,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:06,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:07:06,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702477339] [2019-12-07 13:07:06,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:07:06,560 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:06,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:07:06,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:06,560 INFO L87 Difference]: Start difference. First operand 181931 states and 739380 transitions. Second operand 3 states. [2019-12-07 13:07:06,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:06,665 INFO L93 Difference]: Finished difference Result 34343 states and 110090 transitions. [2019-12-07 13:07:06,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:07:06,665 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:07:06,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:06,712 INFO L225 Difference]: With dead ends: 34343 [2019-12-07 13:07:06,712 INFO L226 Difference]: Without dead ends: 34343 [2019-12-07 13:07:06,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:07,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34343 states. [2019-12-07 13:07:07,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34343 to 34343. [2019-12-07 13:07:07,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34343 states. [2019-12-07 13:07:07,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34343 states to 34343 states and 110090 transitions. [2019-12-07 13:07:07,557 INFO L78 Accepts]: Start accepts. Automaton has 34343 states and 110090 transitions. Word has length 18 [2019-12-07 13:07:07,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:07,558 INFO L462 AbstractCegarLoop]: Abstraction has 34343 states and 110090 transitions. [2019-12-07 13:07:07,558 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:07,558 INFO L276 IsEmpty]: Start isEmpty. Operand 34343 states and 110090 transitions. [2019-12-07 13:07:07,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:07:07,562 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:07,562 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:07,562 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:07,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:07,563 INFO L82 PathProgramCache]: Analyzing trace with hash 674854723, now seen corresponding path program 1 times [2019-12-07 13:07:07,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:07,563 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025900878] [2019-12-07 13:07:07,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:07,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:07,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:07,619 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025900878] [2019-12-07 13:07:07,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:07,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:07,620 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1369125895] [2019-12-07 13:07:07,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:07:07,620 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:07,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:07:07,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:07,620 INFO L87 Difference]: Start difference. First operand 34343 states and 110090 transitions. Second operand 5 states. [2019-12-07 13:07:07,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:07,974 INFO L93 Difference]: Finished difference Result 44978 states and 141898 transitions. [2019-12-07 13:07:07,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:07:07,975 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:07:07,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:08,034 INFO L225 Difference]: With dead ends: 44978 [2019-12-07 13:07:08,034 INFO L226 Difference]: Without dead ends: 44971 [2019-12-07 13:07:08,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:07:08,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44971 states. [2019-12-07 13:07:08,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44971 to 34083. [2019-12-07 13:07:08,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34083 states. [2019-12-07 13:07:08,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34083 states to 34083 states and 109118 transitions. [2019-12-07 13:07:08,660 INFO L78 Accepts]: Start accepts. Automaton has 34083 states and 109118 transitions. Word has length 22 [2019-12-07 13:07:08,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:08,661 INFO L462 AbstractCegarLoop]: Abstraction has 34083 states and 109118 transitions. [2019-12-07 13:07:08,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:07:08,661 INFO L276 IsEmpty]: Start isEmpty. Operand 34083 states and 109118 transitions. [2019-12-07 13:07:08,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:07:08,668 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:08,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:08,669 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:08,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:08,669 INFO L82 PathProgramCache]: Analyzing trace with hash 332765886, now seen corresponding path program 1 times [2019-12-07 13:07:08,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:08,669 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347403661] [2019-12-07 13:07:08,669 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:08,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:08,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:08,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347403661] [2019-12-07 13:07:08,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:08,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:08,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775720646] [2019-12-07 13:07:08,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:07:08,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:08,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:07:08,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:08,723 INFO L87 Difference]: Start difference. First operand 34083 states and 109118 transitions. Second operand 5 states. [2019-12-07 13:07:09,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:09,069 INFO L93 Difference]: Finished difference Result 48327 states and 151757 transitions. [2019-12-07 13:07:09,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:07:09,069 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 13:07:09,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:09,133 INFO L225 Difference]: With dead ends: 48327 [2019-12-07 13:07:09,133 INFO L226 Difference]: Without dead ends: 48314 [2019-12-07 13:07:09,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:07:09,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48314 states. [2019-12-07 13:07:10,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48314 to 39994. [2019-12-07 13:07:10,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39994 states. [2019-12-07 13:07:10,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39994 states to 39994 states and 127549 transitions. [2019-12-07 13:07:10,096 INFO L78 Accepts]: Start accepts. Automaton has 39994 states and 127549 transitions. Word has length 25 [2019-12-07 13:07:10,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:10,097 INFO L462 AbstractCegarLoop]: Abstraction has 39994 states and 127549 transitions. [2019-12-07 13:07:10,097 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:07:10,097 INFO L276 IsEmpty]: Start isEmpty. Operand 39994 states and 127549 transitions. [2019-12-07 13:07:10,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:07:10,108 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:10,108 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:10,108 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:10,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:10,108 INFO L82 PathProgramCache]: Analyzing trace with hash 445555351, now seen corresponding path program 1 times [2019-12-07 13:07:10,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:10,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47234601] [2019-12-07 13:07:10,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:10,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:10,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:10,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47234601] [2019-12-07 13:07:10,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:10,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:10,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698794442] [2019-12-07 13:07:10,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:07:10,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:10,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:07:10,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:10,130 INFO L87 Difference]: Start difference. First operand 39994 states and 127549 transitions. Second operand 3 states. [2019-12-07 13:07:10,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:10,305 INFO L93 Difference]: Finished difference Result 61770 states and 196231 transitions. [2019-12-07 13:07:10,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:07:10,306 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:07:10,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:10,397 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 13:07:10,397 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 13:07:10,397 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:10,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 13:07:11,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 13:07:11,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 13:07:11,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 153444 transitions. [2019-12-07 13:07:11,240 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 153444 transitions. Word has length 27 [2019-12-07 13:07:11,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:11,240 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 153444 transitions. [2019-12-07 13:07:11,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:11,240 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 153444 transitions. [2019-12-07 13:07:11,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:07:11,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:11,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:11,253 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:11,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:11,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1217095067, now seen corresponding path program 1 times [2019-12-07 13:07:11,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:11,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167983570] [2019-12-07 13:07:11,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:11,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:11,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:11,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167983570] [2019-12-07 13:07:11,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:11,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:11,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1574016254] [2019-12-07 13:07:11,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:07:11,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:11,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:07:11,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:11,280 INFO L87 Difference]: Start difference. First operand 48028 states and 153444 transitions. Second operand 3 states. [2019-12-07 13:07:11,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:11,448 INFO L93 Difference]: Finished difference Result 61770 states and 193163 transitions. [2019-12-07 13:07:11,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:07:11,449 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:07:11,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:11,538 INFO L225 Difference]: With dead ends: 61770 [2019-12-07 13:07:11,538 INFO L226 Difference]: Without dead ends: 61770 [2019-12-07 13:07:11,538 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:11,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61770 states. [2019-12-07 13:07:12,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61770 to 48028. [2019-12-07 13:07:12,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48028 states. [2019-12-07 13:07:12,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48028 states to 48028 states and 150376 transitions. [2019-12-07 13:07:12,637 INFO L78 Accepts]: Start accepts. Automaton has 48028 states and 150376 transitions. Word has length 27 [2019-12-07 13:07:12,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:12,637 INFO L462 AbstractCegarLoop]: Abstraction has 48028 states and 150376 transitions. [2019-12-07 13:07:12,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:12,638 INFO L276 IsEmpty]: Start isEmpty. Operand 48028 states and 150376 transitions. [2019-12-07 13:07:12,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:07:12,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:12,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:12,651 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:12,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:12,651 INFO L82 PathProgramCache]: Analyzing trace with hash 1361870049, now seen corresponding path program 1 times [2019-12-07 13:07:12,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:12,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96631143] [2019-12-07 13:07:12,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:12,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:12,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:12,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96631143] [2019-12-07 13:07:12,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:12,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:07:12,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062267110] [2019-12-07 13:07:12,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:07:12,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:12,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:07:12,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:07:12,701 INFO L87 Difference]: Start difference. First operand 48028 states and 150376 transitions. Second operand 6 states. [2019-12-07 13:07:13,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:13,191 INFO L93 Difference]: Finished difference Result 89495 states and 279640 transitions. [2019-12-07 13:07:13,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:07:13,192 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:07:13,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:13,319 INFO L225 Difference]: With dead ends: 89495 [2019-12-07 13:07:13,319 INFO L226 Difference]: Without dead ends: 89476 [2019-12-07 13:07:13,319 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:07:13,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89476 states. [2019-12-07 13:07:14,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89476 to 50180. [2019-12-07 13:07:14,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50180 states. [2019-12-07 13:07:14,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50180 states to 50180 states and 156998 transitions. [2019-12-07 13:07:14,426 INFO L78 Accepts]: Start accepts. Automaton has 50180 states and 156998 transitions. Word has length 27 [2019-12-07 13:07:14,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:14,427 INFO L462 AbstractCegarLoop]: Abstraction has 50180 states and 156998 transitions. [2019-12-07 13:07:14,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:07:14,427 INFO L276 IsEmpty]: Start isEmpty. Operand 50180 states and 156998 transitions. [2019-12-07 13:07:14,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:07:14,444 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:14,444 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:14,444 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:14,444 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:14,445 INFO L82 PathProgramCache]: Analyzing trace with hash -2015671980, now seen corresponding path program 1 times [2019-12-07 13:07:14,445 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:14,445 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117927089] [2019-12-07 13:07:14,445 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:14,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:14,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:14,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117927089] [2019-12-07 13:07:14,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:14,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:07:14,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179872343] [2019-12-07 13:07:14,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:07:14,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:14,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:07:14,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:07:14,496 INFO L87 Difference]: Start difference. First operand 50180 states and 156998 transitions. Second operand 6 states. [2019-12-07 13:07:15,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:15,077 INFO L93 Difference]: Finished difference Result 83334 states and 258731 transitions. [2019-12-07 13:07:15,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:07:15,078 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 13:07:15,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:15,195 INFO L225 Difference]: With dead ends: 83334 [2019-12-07 13:07:15,195 INFO L226 Difference]: Without dead ends: 83312 [2019-12-07 13:07:15,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:07:15,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83312 states. [2019-12-07 13:07:16,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83312 to 49804. [2019-12-07 13:07:16,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49804 states. [2019-12-07 13:07:16,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49804 states to 49804 states and 155755 transitions. [2019-12-07 13:07:16,268 INFO L78 Accepts]: Start accepts. Automaton has 49804 states and 155755 transitions. Word has length 28 [2019-12-07 13:07:16,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:16,268 INFO L462 AbstractCegarLoop]: Abstraction has 49804 states and 155755 transitions. [2019-12-07 13:07:16,268 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:07:16,268 INFO L276 IsEmpty]: Start isEmpty. Operand 49804 states and 155755 transitions. [2019-12-07 13:07:16,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:07:16,285 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:16,285 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:16,285 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:16,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:16,285 INFO L82 PathProgramCache]: Analyzing trace with hash -238960576, now seen corresponding path program 1 times [2019-12-07 13:07:16,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:16,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235936039] [2019-12-07 13:07:16,286 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:16,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:16,327 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:16,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235936039] [2019-12-07 13:07:16,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:16,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:16,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869724448] [2019-12-07 13:07:16,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:07:16,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:16,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:07:16,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:16,329 INFO L87 Difference]: Start difference. First operand 49804 states and 155755 transitions. Second operand 4 states. [2019-12-07 13:07:16,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:16,382 INFO L93 Difference]: Finished difference Result 18907 states and 56660 transitions. [2019-12-07 13:07:16,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:07:16,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 13:07:16,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:16,402 INFO L225 Difference]: With dead ends: 18907 [2019-12-07 13:07:16,402 INFO L226 Difference]: Without dead ends: 18907 [2019-12-07 13:07:16,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:16,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18907 states. [2019-12-07 13:07:16,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18907 to 17941. [2019-12-07 13:07:16,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17941 states. [2019-12-07 13:07:16,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17941 states to 17941 states and 53802 transitions. [2019-12-07 13:07:16,640 INFO L78 Accepts]: Start accepts. Automaton has 17941 states and 53802 transitions. Word has length 29 [2019-12-07 13:07:16,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:16,640 INFO L462 AbstractCegarLoop]: Abstraction has 17941 states and 53802 transitions. [2019-12-07 13:07:16,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:07:16,640 INFO L276 IsEmpty]: Start isEmpty. Operand 17941 states and 53802 transitions. [2019-12-07 13:07:16,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:07:16,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:16,652 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:16,652 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:16,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:16,652 INFO L82 PathProgramCache]: Analyzing trace with hash 405285854, now seen corresponding path program 1 times [2019-12-07 13:07:16,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:16,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106102367] [2019-12-07 13:07:16,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:16,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:16,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:16,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106102367] [2019-12-07 13:07:16,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:16,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:16,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495226204] [2019-12-07 13:07:16,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:07:16,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:16,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:07:16,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:16,696 INFO L87 Difference]: Start difference. First operand 17941 states and 53802 transitions. Second operand 5 states. [2019-12-07 13:07:16,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:16,922 INFO L93 Difference]: Finished difference Result 20466 states and 60692 transitions. [2019-12-07 13:07:16,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:07:16,922 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 13:07:16,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:16,944 INFO L225 Difference]: With dead ends: 20466 [2019-12-07 13:07:16,945 INFO L226 Difference]: Without dead ends: 20466 [2019-12-07 13:07:16,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:07:17,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20466 states. [2019-12-07 13:07:17,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20466 to 17997. [2019-12-07 13:07:17,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17997 states. [2019-12-07 13:07:17,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17997 states to 17997 states and 53962 transitions. [2019-12-07 13:07:17,224 INFO L78 Accepts]: Start accepts. Automaton has 17997 states and 53962 transitions. Word has length 33 [2019-12-07 13:07:17,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:17,224 INFO L462 AbstractCegarLoop]: Abstraction has 17997 states and 53962 transitions. [2019-12-07 13:07:17,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:07:17,225 INFO L276 IsEmpty]: Start isEmpty. Operand 17997 states and 53962 transitions. [2019-12-07 13:07:17,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:07:17,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:17,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:17,236 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:17,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:17,237 INFO L82 PathProgramCache]: Analyzing trace with hash -1258895234, now seen corresponding path program 2 times [2019-12-07 13:07:17,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:17,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780660426] [2019-12-07 13:07:17,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:17,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:17,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:17,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780660426] [2019-12-07 13:07:17,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:17,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:07:17,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936992479] [2019-12-07 13:07:17,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:07:17,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:17,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:07:17,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:07:17,288 INFO L87 Difference]: Start difference. First operand 17997 states and 53962 transitions. Second operand 7 states. [2019-12-07 13:07:17,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:17,962 INFO L93 Difference]: Finished difference Result 34917 states and 103336 transitions. [2019-12-07 13:07:17,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:07:17,963 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:07:17,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:18,002 INFO L225 Difference]: With dead ends: 34917 [2019-12-07 13:07:18,002 INFO L226 Difference]: Without dead ends: 34917 [2019-12-07 13:07:18,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:07:18,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34917 states. [2019-12-07 13:07:18,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34917 to 18320. [2019-12-07 13:07:18,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18320 states. [2019-12-07 13:07:18,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18320 states to 18320 states and 54975 transitions. [2019-12-07 13:07:18,364 INFO L78 Accepts]: Start accepts. Automaton has 18320 states and 54975 transitions. Word has length 33 [2019-12-07 13:07:18,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:18,364 INFO L462 AbstractCegarLoop]: Abstraction has 18320 states and 54975 transitions. [2019-12-07 13:07:18,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:07:18,364 INFO L276 IsEmpty]: Start isEmpty. Operand 18320 states and 54975 transitions. [2019-12-07 13:07:18,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:07:18,380 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:18,380 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:18,380 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:18,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:18,380 INFO L82 PathProgramCache]: Analyzing trace with hash -454706214, now seen corresponding path program 3 times [2019-12-07 13:07:18,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:18,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016770453] [2019-12-07 13:07:18,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:18,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:18,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:18,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1016770453] [2019-12-07 13:07:18,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:18,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:07:18,440 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996051568] [2019-12-07 13:07:18,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:07:18,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:18,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:07:18,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:07:18,440 INFO L87 Difference]: Start difference. First operand 18320 states and 54975 transitions. Second operand 8 states. [2019-12-07 13:07:19,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:19,657 INFO L93 Difference]: Finished difference Result 42046 states and 122991 transitions. [2019-12-07 13:07:19,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:07:19,658 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 13:07:19,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:19,718 INFO L225 Difference]: With dead ends: 42046 [2019-12-07 13:07:19,718 INFO L226 Difference]: Without dead ends: 42046 [2019-12-07 13:07:19,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:07:19,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42046 states. [2019-12-07 13:07:20,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42046 to 18195. [2019-12-07 13:07:20,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18195 states. [2019-12-07 13:07:20,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18195 states to 18195 states and 54590 transitions. [2019-12-07 13:07:20,126 INFO L78 Accepts]: Start accepts. Automaton has 18195 states and 54590 transitions. Word has length 33 [2019-12-07 13:07:20,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:20,126 INFO L462 AbstractCegarLoop]: Abstraction has 18195 states and 54590 transitions. [2019-12-07 13:07:20,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:07:20,126 INFO L276 IsEmpty]: Start isEmpty. Operand 18195 states and 54590 transitions. [2019-12-07 13:07:20,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:07:20,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:20,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:20,141 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:20,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:20,141 INFO L82 PathProgramCache]: Analyzing trace with hash -1655017129, now seen corresponding path program 1 times [2019-12-07 13:07:20,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:20,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910808430] [2019-12-07 13:07:20,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:20,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:20,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:20,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1910808430] [2019-12-07 13:07:20,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:20,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:07:20,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859131195] [2019-12-07 13:07:20,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:07:20,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:20,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:07:20,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:07:20,216 INFO L87 Difference]: Start difference. First operand 18195 states and 54590 transitions. Second operand 7 states. [2019-12-07 13:07:20,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:20,910 INFO L93 Difference]: Finished difference Result 32185 states and 94761 transitions. [2019-12-07 13:07:20,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:07:20,910 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 13:07:20,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:20,946 INFO L225 Difference]: With dead ends: 32185 [2019-12-07 13:07:20,946 INFO L226 Difference]: Without dead ends: 32185 [2019-12-07 13:07:20,946 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:07:21,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32185 states. [2019-12-07 13:07:21,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32185 to 17916. [2019-12-07 13:07:21,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17916 states. [2019-12-07 13:07:21,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17916 states to 17916 states and 53754 transitions. [2019-12-07 13:07:21,300 INFO L78 Accepts]: Start accepts. Automaton has 17916 states and 53754 transitions. Word has length 34 [2019-12-07 13:07:21,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:21,300 INFO L462 AbstractCegarLoop]: Abstraction has 17916 states and 53754 transitions. [2019-12-07 13:07:21,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:07:21,300 INFO L276 IsEmpty]: Start isEmpty. Operand 17916 states and 53754 transitions. [2019-12-07 13:07:21,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:07:21,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:21,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:21,313 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:21,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:21,313 INFO L82 PathProgramCache]: Analyzing trace with hash 2107636055, now seen corresponding path program 2 times [2019-12-07 13:07:21,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:21,313 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494266496] [2019-12-07 13:07:21,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:21,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:21,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494266496] [2019-12-07 13:07:21,411 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:21,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:07:21,411 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440804119] [2019-12-07 13:07:21,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:07:21,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:21,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:07:21,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:07:21,412 INFO L87 Difference]: Start difference. First operand 17916 states and 53754 transitions. Second operand 9 states. [2019-12-07 13:07:22,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:22,478 INFO L93 Difference]: Finished difference Result 35368 states and 103784 transitions. [2019-12-07 13:07:22,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:07:22,478 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2019-12-07 13:07:22,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:22,516 INFO L225 Difference]: With dead ends: 35368 [2019-12-07 13:07:22,516 INFO L226 Difference]: Without dead ends: 35368 [2019-12-07 13:07:22,516 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:07:22,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35368 states. [2019-12-07 13:07:22,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35368 to 17684. [2019-12-07 13:07:22,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17684 states. [2019-12-07 13:07:22,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17684 states to 17684 states and 53090 transitions. [2019-12-07 13:07:22,875 INFO L78 Accepts]: Start accepts. Automaton has 17684 states and 53090 transitions. Word has length 34 [2019-12-07 13:07:22,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:22,876 INFO L462 AbstractCegarLoop]: Abstraction has 17684 states and 53090 transitions. [2019-12-07 13:07:22,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:07:22,876 INFO L276 IsEmpty]: Start isEmpty. Operand 17684 states and 53090 transitions. [2019-12-07 13:07:22,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:07:22,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:22,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:22,890 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:22,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:22,891 INFO L82 PathProgramCache]: Analyzing trace with hash -1063261264, now seen corresponding path program 1 times [2019-12-07 13:07:22,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:22,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401884947] [2019-12-07 13:07:22,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:22,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:22,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:22,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401884947] [2019-12-07 13:07:22,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:22,956 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:07:22,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526378642] [2019-12-07 13:07:22,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:07:22,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:22,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:07:22,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:22,957 INFO L87 Difference]: Start difference. First operand 17684 states and 53090 transitions. Second operand 4 states. [2019-12-07 13:07:23,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:23,010 INFO L93 Difference]: Finished difference Result 17682 states and 53086 transitions. [2019-12-07 13:07:23,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:07:23,010 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 40 [2019-12-07 13:07:23,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:23,029 INFO L225 Difference]: With dead ends: 17682 [2019-12-07 13:07:23,030 INFO L226 Difference]: Without dead ends: 17682 [2019-12-07 13:07:23,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:23,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17682 states. [2019-12-07 13:07:23,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17682 to 17682. [2019-12-07 13:07:23,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17682 states. [2019-12-07 13:07:23,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17682 states to 17682 states and 53086 transitions. [2019-12-07 13:07:23,267 INFO L78 Accepts]: Start accepts. Automaton has 17682 states and 53086 transitions. Word has length 40 [2019-12-07 13:07:23,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:23,267 INFO L462 AbstractCegarLoop]: Abstraction has 17682 states and 53086 transitions. [2019-12-07 13:07:23,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:07:23,267 INFO L276 IsEmpty]: Start isEmpty. Operand 17682 states and 53086 transitions. [2019-12-07 13:07:23,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:07:23,282 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:23,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:23,282 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:23,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:23,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1591146573, now seen corresponding path program 1 times [2019-12-07 13:07:23,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:23,283 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181916106] [2019-12-07 13:07:23,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:23,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:23,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:23,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181916106] [2019-12-07 13:07:23,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:23,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:07:23,475 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1873010276] [2019-12-07 13:07:23,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:07:23,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:23,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:07:23,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:07:23,475 INFO L87 Difference]: Start difference. First operand 17682 states and 53086 transitions. Second operand 8 states. [2019-12-07 13:07:24,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:24,150 INFO L93 Difference]: Finished difference Result 39296 states and 117184 transitions. [2019-12-07 13:07:24,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:07:24,151 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2019-12-07 13:07:24,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:24,201 INFO L225 Difference]: With dead ends: 39296 [2019-12-07 13:07:24,201 INFO L226 Difference]: Without dead ends: 33479 [2019-12-07 13:07:24,202 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:07:24,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33479 states. [2019-12-07 13:07:24,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33479 to 30527. [2019-12-07 13:07:24,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30527 states. [2019-12-07 13:07:24,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30527 states to 30527 states and 91584 transitions. [2019-12-07 13:07:24,662 INFO L78 Accepts]: Start accepts. Automaton has 30527 states and 91584 transitions. Word has length 41 [2019-12-07 13:07:24,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:24,662 INFO L462 AbstractCegarLoop]: Abstraction has 30527 states and 91584 transitions. [2019-12-07 13:07:24,662 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:07:24,662 INFO L276 IsEmpty]: Start isEmpty. Operand 30527 states and 91584 transitions. [2019-12-07 13:07:24,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:07:24,691 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:24,691 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:24,691 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:24,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:24,692 INFO L82 PathProgramCache]: Analyzing trace with hash 2015159781, now seen corresponding path program 2 times [2019-12-07 13:07:24,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:24,692 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196366994] [2019-12-07 13:07:24,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:24,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:24,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:24,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196366994] [2019-12-07 13:07:24,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:24,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:07:24,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2004464951] [2019-12-07 13:07:24,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:07:24,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:24,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:07:24,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:24,740 INFO L87 Difference]: Start difference. First operand 30527 states and 91584 transitions. Second operand 5 states. [2019-12-07 13:07:24,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:24,829 INFO L93 Difference]: Finished difference Result 28163 states and 86474 transitions. [2019-12-07 13:07:24,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:07:24,830 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:07:24,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:24,864 INFO L225 Difference]: With dead ends: 28163 [2019-12-07 13:07:24,864 INFO L226 Difference]: Without dead ends: 27613 [2019-12-07 13:07:24,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:24,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27613 states. [2019-12-07 13:07:25,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27613 to 17666. [2019-12-07 13:07:25,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17666 states. [2019-12-07 13:07:25,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17666 states to 17666 states and 54904 transitions. [2019-12-07 13:07:25,175 INFO L78 Accepts]: Start accepts. Automaton has 17666 states and 54904 transitions. Word has length 41 [2019-12-07 13:07:25,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:25,176 INFO L462 AbstractCegarLoop]: Abstraction has 17666 states and 54904 transitions. [2019-12-07 13:07:25,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:07:25,176 INFO L276 IsEmpty]: Start isEmpty. Operand 17666 states and 54904 transitions. [2019-12-07 13:07:25,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:07:25,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:25,191 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:25,191 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:25,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:25,192 INFO L82 PathProgramCache]: Analyzing trace with hash -961209461, now seen corresponding path program 1 times [2019-12-07 13:07:25,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:25,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1358969079] [2019-12-07 13:07:25,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:25,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:25,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:25,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1358969079] [2019-12-07 13:07:25,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:25,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:07:25,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457797731] [2019-12-07 13:07:25,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:07:25,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:25,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:07:25,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:25,230 INFO L87 Difference]: Start difference. First operand 17666 states and 54904 transitions. Second operand 3 states. [2019-12-07 13:07:25,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:25,308 INFO L93 Difference]: Finished difference Result 20251 states and 62885 transitions. [2019-12-07 13:07:25,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:07:25,309 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 13:07:25,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:25,331 INFO L225 Difference]: With dead ends: 20251 [2019-12-07 13:07:25,331 INFO L226 Difference]: Without dead ends: 20251 [2019-12-07 13:07:25,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:25,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20251 states. [2019-12-07 13:07:25,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20251 to 17433. [2019-12-07 13:07:25,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17433 states. [2019-12-07 13:07:25,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17433 states to 17433 states and 54455 transitions. [2019-12-07 13:07:25,588 INFO L78 Accepts]: Start accepts. Automaton has 17433 states and 54455 transitions. Word has length 65 [2019-12-07 13:07:25,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:25,589 INFO L462 AbstractCegarLoop]: Abstraction has 17433 states and 54455 transitions. [2019-12-07 13:07:25,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:25,589 INFO L276 IsEmpty]: Start isEmpty. Operand 17433 states and 54455 transitions. [2019-12-07 13:07:25,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:07:25,604 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:25,604 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:25,604 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:25,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:25,604 INFO L82 PathProgramCache]: Analyzing trace with hash -2050011334, now seen corresponding path program 1 times [2019-12-07 13:07:25,604 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:25,604 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501610202] [2019-12-07 13:07:25,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:25,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:25,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:25,663 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501610202] [2019-12-07 13:07:25,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:25,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:07:25,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1112976663] [2019-12-07 13:07:25,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:07:25,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:25,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:07:25,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:07:25,664 INFO L87 Difference]: Start difference. First operand 17433 states and 54455 transitions. Second operand 7 states. [2019-12-07 13:07:26,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:26,583 INFO L93 Difference]: Finished difference Result 35155 states and 106912 transitions. [2019-12-07 13:07:26,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:07:26,583 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 13:07:26,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:26,623 INFO L225 Difference]: With dead ends: 35155 [2019-12-07 13:07:26,623 INFO L226 Difference]: Without dead ends: 35155 [2019-12-07 13:07:26,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:07:26,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35155 states. [2019-12-07 13:07:26,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35155 to 17990. [2019-12-07 13:07:26,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17990 states. [2019-12-07 13:07:26,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17990 states to 17990 states and 55908 transitions. [2019-12-07 13:07:26,990 INFO L78 Accepts]: Start accepts. Automaton has 17990 states and 55908 transitions. Word has length 66 [2019-12-07 13:07:26,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:26,991 INFO L462 AbstractCegarLoop]: Abstraction has 17990 states and 55908 transitions. [2019-12-07 13:07:26,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:07:26,991 INFO L276 IsEmpty]: Start isEmpty. Operand 17990 states and 55908 transitions. [2019-12-07 13:07:27,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:07:27,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:27,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:27,007 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:27,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:27,007 INFO L82 PathProgramCache]: Analyzing trace with hash -1986512930, now seen corresponding path program 1 times [2019-12-07 13:07:27,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:27,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023510235] [2019-12-07 13:07:27,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:27,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:27,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:27,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023510235] [2019-12-07 13:07:27,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:27,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:27,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053982920] [2019-12-07 13:07:27,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:07:27,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:27,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:07:27,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:27,049 INFO L87 Difference]: Start difference. First operand 17990 states and 55908 transitions. Second operand 4 states. [2019-12-07 13:07:27,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:27,143 INFO L93 Difference]: Finished difference Result 17801 states and 55129 transitions. [2019-12-07 13:07:27,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:07:27,143 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 13:07:27,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:27,163 INFO L225 Difference]: With dead ends: 17801 [2019-12-07 13:07:27,163 INFO L226 Difference]: Without dead ends: 17801 [2019-12-07 13:07:27,163 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:27,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17801 states. [2019-12-07 13:07:27,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17801 to 15902. [2019-12-07 13:07:27,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15902 states. [2019-12-07 13:07:27,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15902 states to 15902 states and 49292 transitions. [2019-12-07 13:07:27,415 INFO L78 Accepts]: Start accepts. Automaton has 15902 states and 49292 transitions. Word has length 66 [2019-12-07 13:07:27,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:27,415 INFO L462 AbstractCegarLoop]: Abstraction has 15902 states and 49292 transitions. [2019-12-07 13:07:27,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:07:27,415 INFO L276 IsEmpty]: Start isEmpty. Operand 15902 states and 49292 transitions. [2019-12-07 13:07:27,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:07:27,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:27,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:27,429 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:27,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:27,430 INFO L82 PathProgramCache]: Analyzing trace with hash -1443128569, now seen corresponding path program 1 times [2019-12-07 13:07:27,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:27,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142307532] [2019-12-07 13:07:27,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:27,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:27,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:27,481 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142307532] [2019-12-07 13:07:27,481 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:27,481 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:07:27,481 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [659529382] [2019-12-07 13:07:27,481 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:07:27,481 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:27,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:07:27,481 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:27,482 INFO L87 Difference]: Start difference. First operand 15902 states and 49292 transitions. Second operand 3 states. [2019-12-07 13:07:27,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:27,532 INFO L93 Difference]: Finished difference Result 15002 states and 45694 transitions. [2019-12-07 13:07:27,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:07:27,532 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:07:27,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:27,549 INFO L225 Difference]: With dead ends: 15002 [2019-12-07 13:07:27,549 INFO L226 Difference]: Without dead ends: 15002 [2019-12-07 13:07:27,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:07:27,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15002 states. [2019-12-07 13:07:27,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15002 to 14079. [2019-12-07 13:07:27,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14079 states. [2019-12-07 13:07:27,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14079 states to 14079 states and 42983 transitions. [2019-12-07 13:07:27,749 INFO L78 Accepts]: Start accepts. Automaton has 14079 states and 42983 transitions. Word has length 66 [2019-12-07 13:07:27,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:27,750 INFO L462 AbstractCegarLoop]: Abstraction has 14079 states and 42983 transitions. [2019-12-07 13:07:27,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:07:27,750 INFO L276 IsEmpty]: Start isEmpty. Operand 14079 states and 42983 transitions. [2019-12-07 13:07:27,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:27,762 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:27,762 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:27,763 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:27,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:27,763 INFO L82 PathProgramCache]: Analyzing trace with hash 751511131, now seen corresponding path program 1 times [2019-12-07 13:07:27,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:27,763 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121443128] [2019-12-07 13:07:27,763 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:27,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:27,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:27,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121443128] [2019-12-07 13:07:27,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:27,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:07:27,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1678016727] [2019-12-07 13:07:27,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:07:27,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:27,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:07:27,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:27,842 INFO L87 Difference]: Start difference. First operand 14079 states and 42983 transitions. Second operand 5 states. [2019-12-07 13:07:27,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:27,909 INFO L93 Difference]: Finished difference Result 24306 states and 74378 transitions. [2019-12-07 13:07:27,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:07:27,910 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 13:07:27,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:27,920 INFO L225 Difference]: With dead ends: 24306 [2019-12-07 13:07:27,921 INFO L226 Difference]: Without dead ends: 11243 [2019-12-07 13:07:27,921 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:07:27,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11243 states. [2019-12-07 13:07:28,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11243 to 11243. [2019-12-07 13:07:28,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11243 states. [2019-12-07 13:07:28,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11243 states to 11243 states and 34427 transitions. [2019-12-07 13:07:28,078 INFO L78 Accepts]: Start accepts. Automaton has 11243 states and 34427 transitions. Word has length 67 [2019-12-07 13:07:28,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:28,078 INFO L462 AbstractCegarLoop]: Abstraction has 11243 states and 34427 transitions. [2019-12-07 13:07:28,078 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:07:28,078 INFO L276 IsEmpty]: Start isEmpty. Operand 11243 states and 34427 transitions. [2019-12-07 13:07:28,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:28,087 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:28,087 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:28,087 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:28,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:28,087 INFO L82 PathProgramCache]: Analyzing trace with hash 691736411, now seen corresponding path program 2 times [2019-12-07 13:07:28,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:28,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609852641] [2019-12-07 13:07:28,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:28,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:28,123 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:28,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [609852641] [2019-12-07 13:07:28,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:28,124 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:07:28,124 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920578250] [2019-12-07 13:07:28,124 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:07:28,124 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:28,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:07:28,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:07:28,124 INFO L87 Difference]: Start difference. First operand 11243 states and 34427 transitions. Second operand 4 states. [2019-12-07 13:07:28,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:28,171 INFO L93 Difference]: Finished difference Result 19918 states and 61172 transitions. [2019-12-07 13:07:28,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:07:28,171 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 13:07:28,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:28,181 INFO L225 Difference]: With dead ends: 19918 [2019-12-07 13:07:28,181 INFO L226 Difference]: Without dead ends: 9508 [2019-12-07 13:07:28,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:07:28,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9508 states. [2019-12-07 13:07:28,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9508 to 9508. [2019-12-07 13:07:28,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9508 states. [2019-12-07 13:07:28,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9508 states to 9508 states and 29065 transitions. [2019-12-07 13:07:28,314 INFO L78 Accepts]: Start accepts. Automaton has 9508 states and 29065 transitions. Word has length 67 [2019-12-07 13:07:28,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:28,314 INFO L462 AbstractCegarLoop]: Abstraction has 9508 states and 29065 transitions. [2019-12-07 13:07:28,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:07:28,314 INFO L276 IsEmpty]: Start isEmpty. Operand 9508 states and 29065 transitions. [2019-12-07 13:07:28,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:28,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:28,322 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:28,322 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:28,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:28,322 INFO L82 PathProgramCache]: Analyzing trace with hash -1197749059, now seen corresponding path program 3 times [2019-12-07 13:07:28,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:28,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369127435] [2019-12-07 13:07:28,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:28,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:28,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:28,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369127435] [2019-12-07 13:07:28,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:28,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:28,526 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410147240] [2019-12-07 13:07:28,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:07:28,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:28,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:07:28,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:07:28,526 INFO L87 Difference]: Start difference. First operand 9508 states and 29065 transitions. Second operand 13 states. [2019-12-07 13:07:29,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:29,713 INFO L93 Difference]: Finished difference Result 18202 states and 54458 transitions. [2019-12-07 13:07:29,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:07:29,713 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 13:07:29,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:29,725 INFO L225 Difference]: With dead ends: 18202 [2019-12-07 13:07:29,725 INFO L226 Difference]: Without dead ends: 11979 [2019-12-07 13:07:29,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=136, Invalid=620, Unknown=0, NotChecked=0, Total=756 [2019-12-07 13:07:29,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11979 states. [2019-12-07 13:07:29,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11979 to 10575. [2019-12-07 13:07:29,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10575 states. [2019-12-07 13:07:29,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10575 states to 10575 states and 32125 transitions. [2019-12-07 13:07:29,877 INFO L78 Accepts]: Start accepts. Automaton has 10575 states and 32125 transitions. Word has length 67 [2019-12-07 13:07:29,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:29,877 INFO L462 AbstractCegarLoop]: Abstraction has 10575 states and 32125 transitions. [2019-12-07 13:07:29,877 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:07:29,877 INFO L276 IsEmpty]: Start isEmpty. Operand 10575 states and 32125 transitions. [2019-12-07 13:07:29,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:29,886 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:29,886 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:29,886 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:29,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:29,887 INFO L82 PathProgramCache]: Analyzing trace with hash -1290130541, now seen corresponding path program 4 times [2019-12-07 13:07:29,887 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:29,887 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862762769] [2019-12-07 13:07:29,887 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:29,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:30,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:30,108 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862762769] [2019-12-07 13:07:30,108 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:30,108 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:30,108 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021018305] [2019-12-07 13:07:30,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:07:30,109 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:30,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:07:30,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:07:30,109 INFO L87 Difference]: Start difference. First operand 10575 states and 32125 transitions. Second operand 13 states. [2019-12-07 13:07:31,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:31,193 INFO L93 Difference]: Finished difference Result 17976 states and 53576 transitions. [2019-12-07 13:07:31,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 13:07:31,193 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 13:07:31,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:31,205 INFO L225 Difference]: With dead ends: 17976 [2019-12-07 13:07:31,205 INFO L226 Difference]: Without dead ends: 12810 [2019-12-07 13:07:31,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=223, Invalid=899, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 13:07:31,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12810 states. [2019-12-07 13:07:31,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12810 to 10793. [2019-12-07 13:07:31,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10793 states. [2019-12-07 13:07:31,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10793 states to 10793 states and 32695 transitions. [2019-12-07 13:07:31,360 INFO L78 Accepts]: Start accepts. Automaton has 10793 states and 32695 transitions. Word has length 67 [2019-12-07 13:07:31,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:31,360 INFO L462 AbstractCegarLoop]: Abstraction has 10793 states and 32695 transitions. [2019-12-07 13:07:31,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:07:31,360 INFO L276 IsEmpty]: Start isEmpty. Operand 10793 states and 32695 transitions. [2019-12-07 13:07:31,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:31,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:31,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:31,369 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:31,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:31,369 INFO L82 PathProgramCache]: Analyzing trace with hash 2078724657, now seen corresponding path program 5 times [2019-12-07 13:07:31,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:31,369 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [652816029] [2019-12-07 13:07:31,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:31,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:31,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:31,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [652816029] [2019-12-07 13:07:31,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:31,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:31,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238465356] [2019-12-07 13:07:31,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:07:31,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:31,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:07:31,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:07:31,610 INFO L87 Difference]: Start difference. First operand 10793 states and 32695 transitions. Second operand 14 states. [2019-12-07 13:07:32,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:32,823 INFO L93 Difference]: Finished difference Result 16789 states and 49927 transitions. [2019-12-07 13:07:32,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 13:07:32,824 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 13:07:32,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:32,837 INFO L225 Difference]: With dead ends: 16789 [2019-12-07 13:07:32,837 INFO L226 Difference]: Without dead ends: 13820 [2019-12-07 13:07:32,838 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=161, Invalid=769, Unknown=0, NotChecked=0, Total=930 [2019-12-07 13:07:32,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13820 states. [2019-12-07 13:07:32,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13820 to 11167. [2019-12-07 13:07:32,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11167 states. [2019-12-07 13:07:33,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11167 states to 11167 states and 33648 transitions. [2019-12-07 13:07:33,002 INFO L78 Accepts]: Start accepts. Automaton has 11167 states and 33648 transitions. Word has length 67 [2019-12-07 13:07:33,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:33,002 INFO L462 AbstractCegarLoop]: Abstraction has 11167 states and 33648 transitions. [2019-12-07 13:07:33,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:07:33,003 INFO L276 IsEmpty]: Start isEmpty. Operand 11167 states and 33648 transitions. [2019-12-07 13:07:33,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:33,012 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:33,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:33,012 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:33,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:33,013 INFO L82 PathProgramCache]: Analyzing trace with hash 888958687, now seen corresponding path program 6 times [2019-12-07 13:07:33,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:33,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653423771] [2019-12-07 13:07:33,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:33,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:33,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:33,238 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653423771] [2019-12-07 13:07:33,238 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:33,238 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:33,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816981523] [2019-12-07 13:07:33,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:07:33,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:33,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:07:33,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:07:33,238 INFO L87 Difference]: Start difference. First operand 11167 states and 33648 transitions. Second operand 14 states. [2019-12-07 13:07:34,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:34,621 INFO L93 Difference]: Finished difference Result 20965 states and 61846 transitions. [2019-12-07 13:07:34,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 13:07:34,621 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 13:07:34,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:34,636 INFO L225 Difference]: With dead ends: 20965 [2019-12-07 13:07:34,636 INFO L226 Difference]: Without dead ends: 15596 [2019-12-07 13:07:34,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 477 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=291, Invalid=1515, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 13:07:34,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15596 states. [2019-12-07 13:07:34,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15596 to 11308. [2019-12-07 13:07:34,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11308 states. [2019-12-07 13:07:34,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11308 states to 11308 states and 33901 transitions. [2019-12-07 13:07:34,813 INFO L78 Accepts]: Start accepts. Automaton has 11308 states and 33901 transitions. Word has length 67 [2019-12-07 13:07:34,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:34,813 INFO L462 AbstractCegarLoop]: Abstraction has 11308 states and 33901 transitions. [2019-12-07 13:07:34,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:07:34,813 INFO L276 IsEmpty]: Start isEmpty. Operand 11308 states and 33901 transitions. [2019-12-07 13:07:34,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:34,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:34,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:34,822 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:34,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:34,823 INFO L82 PathProgramCache]: Analyzing trace with hash 721495091, now seen corresponding path program 7 times [2019-12-07 13:07:34,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:34,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241133886] [2019-12-07 13:07:34,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:34,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:35,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:35,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1241133886] [2019-12-07 13:07:35,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:35,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:35,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410682107] [2019-12-07 13:07:35,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:07:35,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:35,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:07:35,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:07:35,090 INFO L87 Difference]: Start difference. First operand 11308 states and 33901 transitions. Second operand 14 states. [2019-12-07 13:07:36,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:36,475 INFO L93 Difference]: Finished difference Result 15810 states and 46769 transitions. [2019-12-07 13:07:36,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 13:07:36,475 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 13:07:36,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:36,490 INFO L225 Difference]: With dead ends: 15810 [2019-12-07 13:07:36,490 INFO L226 Difference]: Without dead ends: 15027 [2019-12-07 13:07:36,490 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 452 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=296, Invalid=1596, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 13:07:36,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15027 states. [2019-12-07 13:07:36,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15027 to 13012. [2019-12-07 13:07:36,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13012 states. [2019-12-07 13:07:36,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13012 states to 13012 states and 38801 transitions. [2019-12-07 13:07:36,675 INFO L78 Accepts]: Start accepts. Automaton has 13012 states and 38801 transitions. Word has length 67 [2019-12-07 13:07:36,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:36,675 INFO L462 AbstractCegarLoop]: Abstraction has 13012 states and 38801 transitions. [2019-12-07 13:07:36,675 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:07:36,675 INFO L276 IsEmpty]: Start isEmpty. Operand 13012 states and 38801 transitions. [2019-12-07 13:07:36,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:36,687 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:36,687 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:36,687 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:36,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:36,687 INFO L82 PathProgramCache]: Analyzing trace with hash 957967249, now seen corresponding path program 8 times [2019-12-07 13:07:36,687 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:36,687 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853600366] [2019-12-07 13:07:36,687 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:36,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:36,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:36,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853600366] [2019-12-07 13:07:36,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:36,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:07:36,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103416786] [2019-12-07 13:07:36,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 13:07:36,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:36,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 13:07:36,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:07:36,918 INFO L87 Difference]: Start difference. First operand 13012 states and 38801 transitions. Second operand 14 states. [2019-12-07 13:07:39,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:39,165 INFO L93 Difference]: Finished difference Result 15354 states and 45165 transitions. [2019-12-07 13:07:39,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 13:07:39,166 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 13:07:39,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:39,188 INFO L225 Difference]: With dead ends: 15354 [2019-12-07 13:07:39,188 INFO L226 Difference]: Without dead ends: 13459 [2019-12-07 13:07:39,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 425 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=303, Invalid=1503, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 13:07:39,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13459 states. [2019-12-07 13:07:39,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13459 to 11532. [2019-12-07 13:07:39,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11532 states. [2019-12-07 13:07:39,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11532 states to 11532 states and 34408 transitions. [2019-12-07 13:07:39,359 INFO L78 Accepts]: Start accepts. Automaton has 11532 states and 34408 transitions. Word has length 67 [2019-12-07 13:07:39,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:39,359 INFO L462 AbstractCegarLoop]: Abstraction has 11532 states and 34408 transitions. [2019-12-07 13:07:39,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 13:07:39,359 INFO L276 IsEmpty]: Start isEmpty. Operand 11532 states and 34408 transitions. [2019-12-07 13:07:39,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:39,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:39,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:39,370 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:39,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:39,370 INFO L82 PathProgramCache]: Analyzing trace with hash -468270879, now seen corresponding path program 9 times [2019-12-07 13:07:39,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:39,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425028758] [2019-12-07 13:07:39,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:39,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:39,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:39,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425028758] [2019-12-07 13:07:39,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:39,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:07:39,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830280351] [2019-12-07 13:07:39,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:07:39,630 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:39,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:07:39,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:07:39,631 INFO L87 Difference]: Start difference. First operand 11532 states and 34408 transitions. Second operand 15 states. [2019-12-07 13:07:42,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:42,816 INFO L93 Difference]: Finished difference Result 17123 states and 50593 transitions. [2019-12-07 13:07:42,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 13:07:42,816 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:07:42,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:42,832 INFO L225 Difference]: With dead ends: 17123 [2019-12-07 13:07:42,832 INFO L226 Difference]: Without dead ends: 16080 [2019-12-07 13:07:42,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 761 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=420, Invalid=2442, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 13:07:42,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16080 states. [2019-12-07 13:07:43,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16080 to 12881. [2019-12-07 13:07:43,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12881 states. [2019-12-07 13:07:43,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12881 states to 12881 states and 38495 transitions. [2019-12-07 13:07:43,033 INFO L78 Accepts]: Start accepts. Automaton has 12881 states and 38495 transitions. Word has length 67 [2019-12-07 13:07:43,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:43,033 INFO L462 AbstractCegarLoop]: Abstraction has 12881 states and 38495 transitions. [2019-12-07 13:07:43,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:07:43,033 INFO L276 IsEmpty]: Start isEmpty. Operand 12881 states and 38495 transitions. [2019-12-07 13:07:43,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:43,044 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:43,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:43,044 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:43,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:43,045 INFO L82 PathProgramCache]: Analyzing trace with hash -231798721, now seen corresponding path program 10 times [2019-12-07 13:07:43,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:43,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315144929] [2019-12-07 13:07:43,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:43,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:43,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:43,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315144929] [2019-12-07 13:07:43,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:43,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:07:43,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763251948] [2019-12-07 13:07:43,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:07:43,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:43,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:07:43,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:07:43,320 INFO L87 Difference]: Start difference. First operand 12881 states and 38495 transitions. Second operand 15 states. [2019-12-07 13:07:45,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:45,085 INFO L93 Difference]: Finished difference Result 16545 states and 48463 transitions. [2019-12-07 13:07:45,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 13:07:45,085 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:07:45,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:45,098 INFO L225 Difference]: With dead ends: 16545 [2019-12-07 13:07:45,099 INFO L226 Difference]: Without dead ends: 14418 [2019-12-07 13:07:45,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 690 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=425, Invalid=2227, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 13:07:45,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14418 states. [2019-12-07 13:07:45,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14418 to 11120. [2019-12-07 13:07:45,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11120 states. [2019-12-07 13:07:45,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11120 states to 11120 states and 33371 transitions. [2019-12-07 13:07:45,270 INFO L78 Accepts]: Start accepts. Automaton has 11120 states and 33371 transitions. Word has length 67 [2019-12-07 13:07:45,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:45,270 INFO L462 AbstractCegarLoop]: Abstraction has 11120 states and 33371 transitions. [2019-12-07 13:07:45,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:07:45,270 INFO L276 IsEmpty]: Start isEmpty. Operand 11120 states and 33371 transitions. [2019-12-07 13:07:45,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:45,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:45,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:45,279 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:45,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:45,280 INFO L82 PathProgramCache]: Analyzing trace with hash 88464887, now seen corresponding path program 11 times [2019-12-07 13:07:45,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:45,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56838916] [2019-12-07 13:07:45,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:45,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:45,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:45,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56838916] [2019-12-07 13:07:45,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:45,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:07:45,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401904669] [2019-12-07 13:07:45,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:07:45,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:45,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:07:45,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:07:45,427 INFO L87 Difference]: Start difference. First operand 11120 states and 33371 transitions. Second operand 11 states. [2019-12-07 13:07:45,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:45,969 INFO L93 Difference]: Finished difference Result 19629 states and 58659 transitions. [2019-12-07 13:07:45,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 13:07:45,969 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:07:45,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:45,986 INFO L225 Difference]: With dead ends: 19629 [2019-12-07 13:07:45,986 INFO L226 Difference]: Without dead ends: 17266 [2019-12-07 13:07:45,986 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=709, Unknown=0, NotChecked=0, Total=870 [2019-12-07 13:07:46,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17266 states. [2019-12-07 13:07:46,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17266 to 14922. [2019-12-07 13:07:46,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14922 states. [2019-12-07 13:07:46,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14922 states to 14922 states and 44986 transitions. [2019-12-07 13:07:46,211 INFO L78 Accepts]: Start accepts. Automaton has 14922 states and 44986 transitions. Word has length 67 [2019-12-07 13:07:46,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:46,211 INFO L462 AbstractCegarLoop]: Abstraction has 14922 states and 44986 transitions. [2019-12-07 13:07:46,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:07:46,211 INFO L276 IsEmpty]: Start isEmpty. Operand 14922 states and 44986 transitions. [2019-12-07 13:07:46,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:46,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:46,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:46,224 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:46,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:46,225 INFO L82 PathProgramCache]: Analyzing trace with hash 324937045, now seen corresponding path program 12 times [2019-12-07 13:07:46,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:46,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434282397] [2019-12-07 13:07:46,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:46,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:46,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:46,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434282397] [2019-12-07 13:07:46,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:46,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:07:46,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1666483958] [2019-12-07 13:07:46,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:07:46,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:46,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:07:46,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:07:46,341 INFO L87 Difference]: Start difference. First operand 14922 states and 44986 transitions. Second operand 11 states. [2019-12-07 13:07:46,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:46,792 INFO L93 Difference]: Finished difference Result 17568 states and 51971 transitions. [2019-12-07 13:07:46,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 13:07:46,792 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:07:46,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:46,805 INFO L225 Difference]: With dead ends: 17568 [2019-12-07 13:07:46,806 INFO L226 Difference]: Without dead ends: 13526 [2019-12-07 13:07:46,806 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2019-12-07 13:07:46,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13526 states. [2019-12-07 13:07:46,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13526 to 11367. [2019-12-07 13:07:46,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11367 states. [2019-12-07 13:07:46,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11367 states to 11367 states and 33846 transitions. [2019-12-07 13:07:46,969 INFO L78 Accepts]: Start accepts. Automaton has 11367 states and 33846 transitions. Word has length 67 [2019-12-07 13:07:46,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:46,969 INFO L462 AbstractCegarLoop]: Abstraction has 11367 states and 33846 transitions. [2019-12-07 13:07:46,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:07:46,969 INFO L276 IsEmpty]: Start isEmpty. Operand 11367 states and 33846 transitions. [2019-12-07 13:07:46,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:46,978 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:46,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:46,978 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:46,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:46,979 INFO L82 PathProgramCache]: Analyzing trace with hash 975038819, now seen corresponding path program 13 times [2019-12-07 13:07:46,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:46,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372783895] [2019-12-07 13:07:46,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:46,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:47,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:47,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372783895] [2019-12-07 13:07:47,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:47,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:07:47,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [810175855] [2019-12-07 13:07:47,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:07:47,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:47,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:07:47,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:07:47,255 INFO L87 Difference]: Start difference. First operand 11367 states and 33846 transitions. Second operand 15 states. [2019-12-07 13:07:48,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:48,504 INFO L93 Difference]: Finished difference Result 13790 states and 40330 transitions. [2019-12-07 13:07:48,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 13:07:48,504 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 13:07:48,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:48,517 INFO L225 Difference]: With dead ends: 13790 [2019-12-07 13:07:48,517 INFO L226 Difference]: Without dead ends: 13465 [2019-12-07 13:07:48,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 329 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=235, Invalid=1171, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 13:07:48,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13465 states. [2019-12-07 13:07:48,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13465 to 11375. [2019-12-07 13:07:48,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11375 states. [2019-12-07 13:07:48,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11375 states to 11375 states and 33868 transitions. [2019-12-07 13:07:48,692 INFO L78 Accepts]: Start accepts. Automaton has 11375 states and 33868 transitions. Word has length 67 [2019-12-07 13:07:48,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:48,692 INFO L462 AbstractCegarLoop]: Abstraction has 11375 states and 33868 transitions. [2019-12-07 13:07:48,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:07:48,693 INFO L276 IsEmpty]: Start isEmpty. Operand 11375 states and 33868 transitions. [2019-12-07 13:07:48,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:48,701 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:48,701 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:48,702 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:48,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:48,702 INFO L82 PathProgramCache]: Analyzing trace with hash -478785703, now seen corresponding path program 14 times [2019-12-07 13:07:48,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:48,702 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [790314712] [2019-12-07 13:07:48,702 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:48,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:48,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:48,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [790314712] [2019-12-07 13:07:48,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:48,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 13:07:48,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807325296] [2019-12-07 13:07:48,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 13:07:48,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:48,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 13:07:48,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:07:48,957 INFO L87 Difference]: Start difference. First operand 11375 states and 33868 transitions. Second operand 16 states. [2019-12-07 13:07:50,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:50,071 INFO L93 Difference]: Finished difference Result 13654 states and 39976 transitions. [2019-12-07 13:07:50,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 13:07:50,071 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 13:07:50,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:50,084 INFO L225 Difference]: With dead ends: 13654 [2019-12-07 13:07:50,084 INFO L226 Difference]: Without dead ends: 13439 [2019-12-07 13:07:50,085 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=203, Invalid=1057, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 13:07:50,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13439 states. [2019-12-07 13:07:50,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13439 to 11391. [2019-12-07 13:07:50,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11391 states. [2019-12-07 13:07:50,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11391 states to 11391 states and 33908 transitions. [2019-12-07 13:07:50,246 INFO L78 Accepts]: Start accepts. Automaton has 11391 states and 33908 transitions. Word has length 67 [2019-12-07 13:07:50,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:50,247 INFO L462 AbstractCegarLoop]: Abstraction has 11391 states and 33908 transitions. [2019-12-07 13:07:50,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 13:07:50,247 INFO L276 IsEmpty]: Start isEmpty. Operand 11391 states and 33908 transitions. [2019-12-07 13:07:50,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:50,255 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:50,255 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:50,256 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:50,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:50,256 INFO L82 PathProgramCache]: Analyzing trace with hash -1516551711, now seen corresponding path program 15 times [2019-12-07 13:07:50,256 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:50,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948855191] [2019-12-07 13:07:50,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:50,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:50,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:50,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948855191] [2019-12-07 13:07:50,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:50,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 13:07:50,622 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [359221841] [2019-12-07 13:07:50,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 13:07:50,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:50,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 13:07:50,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:07:50,622 INFO L87 Difference]: Start difference. First operand 11391 states and 33908 transitions. Second operand 17 states. [2019-12-07 13:07:54,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:54,011 INFO L93 Difference]: Finished difference Result 14496 states and 42253 transitions. [2019-12-07 13:07:54,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 13:07:54,011 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 13:07:54,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:54,025 INFO L225 Difference]: With dead ends: 14496 [2019-12-07 13:07:54,025 INFO L226 Difference]: Without dead ends: 14275 [2019-12-07 13:07:54,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 484 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=329, Invalid=1563, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 13:07:54,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14275 states. [2019-12-07 13:07:54,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14275 to 11391. [2019-12-07 13:07:54,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11391 states. [2019-12-07 13:07:54,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11391 states to 11391 states and 33908 transitions. [2019-12-07 13:07:54,196 INFO L78 Accepts]: Start accepts. Automaton has 11391 states and 33908 transitions. Word has length 67 [2019-12-07 13:07:54,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:54,196 INFO L462 AbstractCegarLoop]: Abstraction has 11391 states and 33908 transitions. [2019-12-07 13:07:54,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 13:07:54,196 INFO L276 IsEmpty]: Start isEmpty. Operand 11391 states and 33908 transitions. [2019-12-07 13:07:54,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:54,206 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:54,206 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:54,206 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:54,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:54,207 INFO L82 PathProgramCache]: Analyzing trace with hash -962576569, now seen corresponding path program 16 times [2019-12-07 13:07:54,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:54,207 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2101086363] [2019-12-07 13:07:54,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:54,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:54,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:54,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2101086363] [2019-12-07 13:07:54,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:54,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:07:54,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146017614] [2019-12-07 13:07:54,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:07:54,324 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:54,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:07:54,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:07:54,324 INFO L87 Difference]: Start difference. First operand 11391 states and 33908 transitions. Second operand 10 states. [2019-12-07 13:07:55,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:55,034 INFO L93 Difference]: Finished difference Result 14469 states and 41975 transitions. [2019-12-07 13:07:55,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:07:55,035 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 13:07:55,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:55,049 INFO L225 Difference]: With dead ends: 14469 [2019-12-07 13:07:55,049 INFO L226 Difference]: Without dead ends: 13630 [2019-12-07 13:07:55,049 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:07:55,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13630 states. [2019-12-07 13:07:55,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13630 to 11101. [2019-12-07 13:07:55,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11101 states. [2019-12-07 13:07:55,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11101 states to 11101 states and 33108 transitions. [2019-12-07 13:07:55,213 INFO L78 Accepts]: Start accepts. Automaton has 11101 states and 33108 transitions. Word has length 67 [2019-12-07 13:07:55,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:55,213 INFO L462 AbstractCegarLoop]: Abstraction has 11101 states and 33108 transitions. [2019-12-07 13:07:55,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:07:55,213 INFO L276 IsEmpty]: Start isEmpty. Operand 11101 states and 33108 transitions. [2019-12-07 13:07:55,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:55,222 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:55,222 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:55,222 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:55,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:55,222 INFO L82 PathProgramCache]: Analyzing trace with hash 764043865, now seen corresponding path program 17 times [2019-12-07 13:07:55,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:55,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395005319] [2019-12-07 13:07:55,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:55,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:07:55,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:07:55,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395005319] [2019-12-07 13:07:55,369 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:07:55,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:07:55,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507936516] [2019-12-07 13:07:55,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:07:55,370 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:07:55,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:07:55,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:07:55,370 INFO L87 Difference]: Start difference. First operand 11101 states and 33108 transitions. Second operand 11 states. [2019-12-07 13:07:56,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:07:56,097 INFO L93 Difference]: Finished difference Result 14249 states and 41618 transitions. [2019-12-07 13:07:56,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:07:56,097 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:07:56,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:07:56,111 INFO L225 Difference]: With dead ends: 14249 [2019-12-07 13:07:56,111 INFO L226 Difference]: Without dead ends: 14006 [2019-12-07 13:07:56,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=419, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:07:56,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14006 states. [2019-12-07 13:07:56,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14006 to 10997. [2019-12-07 13:07:56,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10997 states. [2019-12-07 13:07:56,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10997 states to 10997 states and 32834 transitions. [2019-12-07 13:07:56,278 INFO L78 Accepts]: Start accepts. Automaton has 10997 states and 32834 transitions. Word has length 67 [2019-12-07 13:07:56,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:07:56,278 INFO L462 AbstractCegarLoop]: Abstraction has 10997 states and 32834 transitions. [2019-12-07 13:07:56,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:07:56,278 INFO L276 IsEmpty]: Start isEmpty. Operand 10997 states and 32834 transitions. [2019-12-07 13:07:56,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:07:56,287 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:07:56,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:07:56,287 INFO L410 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:07:56,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:07:56,288 INFO L82 PathProgramCache]: Analyzing trace with hash -494782975, now seen corresponding path program 18 times [2019-12-07 13:07:56,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:07:56,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1631373265] [2019-12-07 13:07:56,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:07:56,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:07:56,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:07:56,351 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:07:56,351 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:07:56,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t391~0.base_29|) (= 0 v_~weak$$choice0~0_10) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t391~0.base_29| 4)) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29| 1)) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 |v_ULTIMATE.start_main_~#t391~0.offset_22|) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29|)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29|) |v_ULTIMATE.start_main_~#t391~0.offset_22| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_29|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ULTIMATE.start_main_~#t391~0.base=|v_ULTIMATE.start_main_~#t391~0.base_29|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_15|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_22|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_17|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t391~0.offset=|v_ULTIMATE.start_main_~#t391~0.offset_22|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t392~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t391~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t392~0.offset, #NULL.base, ULTIMATE.start_main_~#t393~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t391~0.offset] because there is no mapped edge [2019-12-07 13:07:56,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t392~0.base_12|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t392~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t392~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t392~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12|) |v_ULTIMATE.start_main_~#t392~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t392~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t392~0.offset] because there is no mapped edge [2019-12-07 13:07:56,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t393~0.offset_11|) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t393~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13|) |v_ULTIMATE.start_main_~#t393~0.offset_11| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t393~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t393~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_11|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_~#t393~0.base] because there is no mapped edge [2019-12-07 13:07:56,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~a$r_buff0_thd3~0_In355081486 ~a$r_buff1_thd3~0_Out355081486) (= ~x~0_Out355081486 1) (= ~a$r_buff0_thd1~0_Out355081486 1) (= ~a$r_buff1_thd1~0_Out355081486 ~a$r_buff0_thd1~0_In355081486) (= ~y~0_In355081486 ~__unbuffered_p0_EBX~0_Out355081486) (= ~a$r_buff0_thd0~0_In355081486 ~a$r_buff1_thd0~0_Out355081486) (= ~__unbuffered_p0_EAX~0_Out355081486 ~x~0_Out355081486) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486 0)) (= ~a$r_buff1_thd2~0_Out355081486 ~a$r_buff0_thd2~0_In355081486)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In355081486, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In355081486, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In355081486, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In355081486, ~y~0=~y~0_In355081486} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out355081486, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out355081486, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out355081486, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out355081486, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In355081486, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In355081486, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out355081486, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In355081486, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out355081486, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out355081486, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486, ~y~0=~y~0_In355081486, ~x~0=~x~0_Out355081486} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:07:56,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In32950811 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In32950811 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out32950811|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In32950811 |P0Thread1of1ForFork1_#t~ite5_Out32950811|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In32950811, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In32950811} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out32950811|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In32950811, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In32950811} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:07:56,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1453676663 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1453676663 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1453676663 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1453676663 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1453676663| ~a$w_buff1_used~0_In-1453676663)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1453676663| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1453676663, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1453676663, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1453676663, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1453676663} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1453676663|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1453676663, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1453676663, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1453676663, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1453676663} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:07:56,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1079591739 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1079591739 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In-1079591739 |P1Thread1of1ForFork2_#t~ite9_Out-1079591739|)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-1079591739| ~a$w_buff1~0_In-1079591739) (not .cse0)))) InVars {~a~0=~a~0_In-1079591739, ~a$w_buff1~0=~a$w_buff1~0_In-1079591739, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1079591739, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1079591739} OutVars{~a~0=~a~0_In-1079591739, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1079591739|, ~a$w_buff1~0=~a$w_buff1~0_In-1079591739, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1079591739, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1079591739} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:07:56,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:07:56,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-430365147 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out-430365147 ~a$r_buff0_thd1~0_In-430365147)) (.cse0 (= (mod ~a$w_buff0_used~0_In-430365147 256) 0))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-430365147 0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-430365147, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-430365147} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-430365147|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-430365147, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-430365147} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:07:56,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In903870733 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In903870733 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In903870733 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In903870733 256) 0))) (or (and (= ~a$r_buff1_thd1~0_In903870733 |P0Thread1of1ForFork1_#t~ite8_Out903870733|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out903870733|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In903870733, ~a$w_buff0_used~0=~a$w_buff0_used~0_In903870733, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In903870733, ~a$w_buff1_used~0=~a$w_buff1_used~0_In903870733} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out903870733|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In903870733, ~a$w_buff0_used~0=~a$w_buff0_used~0_In903870733, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In903870733, ~a$w_buff1_used~0=~a$w_buff1_used~0_In903870733} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:07:56,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:07:56,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In245830440 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In245830440 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In245830440 |P1Thread1of1ForFork2_#t~ite11_Out245830440|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out245830440|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In245830440, ~a$w_buff0_used~0=~a$w_buff0_used~0_In245830440} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In245830440, ~a$w_buff0_used~0=~a$w_buff0_used~0_In245830440, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out245830440|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:07:56,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In291198819 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out291198819| ~a$w_buff0~0_In291198819) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In291198819| |P2Thread1of1ForFork0_#t~ite20_Out291198819|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In291198819 256) 0))) (or (= (mod ~a$w_buff0_used~0_In291198819 256) 0) (and (= 0 (mod ~a$r_buff1_thd3~0_In291198819 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In291198819 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out291198819| |P2Thread1of1ForFork0_#t~ite20_Out291198819|) (= |P2Thread1of1ForFork0_#t~ite20_Out291198819| ~a$w_buff0~0_In291198819)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In291198819, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In291198819, ~a$w_buff0_used~0=~a$w_buff0_used~0_In291198819, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In291198819, ~a$w_buff1_used~0=~a$w_buff1_used~0_In291198819, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In291198819|, ~weak$$choice2~0=~weak$$choice2~0_In291198819} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out291198819|, ~a$w_buff0~0=~a$w_buff0~0_In291198819, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In291198819, ~a$w_buff0_used~0=~a$w_buff0_used~0_In291198819, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In291198819, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out291198819|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In291198819, ~weak$$choice2~0=~weak$$choice2~0_In291198819} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:07:56,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In335071336 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In335071336| |P2Thread1of1ForFork0_#t~ite23_Out335071336|) (= ~a$w_buff1~0_In335071336 |P2Thread1of1ForFork0_#t~ite24_Out335071336|) (not .cse0)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In335071336 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In335071336 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In335071336 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In335071336 256))))) (= |P2Thread1of1ForFork0_#t~ite24_Out335071336| |P2Thread1of1ForFork0_#t~ite23_Out335071336|) (= ~a$w_buff1~0_In335071336 |P2Thread1of1ForFork0_#t~ite23_Out335071336|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In335071336, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In335071336|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In335071336, ~a$w_buff0_used~0=~a$w_buff0_used~0_In335071336, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In335071336, ~a$w_buff1_used~0=~a$w_buff1_used~0_In335071336, ~weak$$choice2~0=~weak$$choice2~0_In335071336} OutVars{~a$w_buff1~0=~a$w_buff1~0_In335071336, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out335071336|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out335071336|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In335071336, ~a$w_buff0_used~0=~a$w_buff0_used~0_In335071336, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In335071336, ~a$w_buff1_used~0=~a$w_buff1_used~0_In335071336, ~weak$$choice2~0=~weak$$choice2~0_In335071336} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:07:56,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In534487050 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In534487050| |P2Thread1of1ForFork0_#t~ite26_Out534487050|) (= |P2Thread1of1ForFork0_#t~ite27_Out534487050| ~a$w_buff0_used~0_In534487050) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out534487050| |P2Thread1of1ForFork0_#t~ite26_Out534487050|) (= |P2Thread1of1ForFork0_#t~ite26_Out534487050| ~a$w_buff0_used~0_In534487050) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In534487050 256)))) (or (and (= (mod ~a$w_buff1_used~0_In534487050 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In534487050 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In534487050 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In534487050|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In534487050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In534487050, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In534487050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In534487050, ~weak$$choice2~0=~weak$$choice2~0_In534487050} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out534487050|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out534487050|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In534487050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In534487050, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In534487050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In534487050, ~weak$$choice2~0=~weak$$choice2~0_In534487050} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:07:56,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:07:56,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:07:56,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In891379897 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In891379897 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out891379897| ~a$w_buff1~0_In891379897) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out891379897| ~a~0_In891379897) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In891379897, ~a$w_buff1~0=~a$w_buff1~0_In891379897, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In891379897, ~a$w_buff1_used~0=~a$w_buff1_used~0_In891379897} OutVars{~a~0=~a~0_In891379897, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out891379897|, ~a$w_buff1~0=~a$w_buff1~0_In891379897, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In891379897, ~a$w_buff1_used~0=~a$w_buff1_used~0_In891379897} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:07:56,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:07:56,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In645708067 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In645708067 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out645708067| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out645708067| ~a$w_buff0_used~0_In645708067)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In645708067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In645708067} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out645708067|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In645708067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In645708067} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:07:56,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1263145371 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1263145371 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1263145371 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1263145371 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1263145371| ~a$w_buff1_used~0_In-1263145371) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1263145371| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1263145371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1263145371, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1263145371, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1263145371} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1263145371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1263145371, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1263145371, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1263145371, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1263145371|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:07:56,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1071190003 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1071190003 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1071190003| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1071190003| ~a$r_buff0_thd3~0_In-1071190003)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1071190003, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1071190003} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1071190003, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1071190003, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1071190003|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:07:56,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1714637779 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1714637779 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1714637779 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In1714637779 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1714637779| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In1714637779 |P2Thread1of1ForFork0_#t~ite43_Out1714637779|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1714637779, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1714637779, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1714637779, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1714637779} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1714637779|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1714637779, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1714637779, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1714637779, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1714637779} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:07:56,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1488197646 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1488197646 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1488197646 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-1488197646 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1488197646|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out-1488197646| ~a$w_buff1_used~0_In-1488197646)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1488197646, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1488197646, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1488197646, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1488197646} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1488197646, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1488197646, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1488197646, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1488197646|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1488197646} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:07:56,364 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1330885207 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1330885207 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1330885207| ~a$r_buff0_thd2~0_In-1330885207)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1330885207| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1330885207, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1330885207} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1330885207, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1330885207, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1330885207|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-1847074248 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1847074248 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1847074248 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-1847074248 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1847074248 |P1Thread1of1ForFork2_#t~ite14_Out-1847074248|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1847074248|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1847074248, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1847074248, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1847074248, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1847074248} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1847074248, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1847074248, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1847074248, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1847074248, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1847074248|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1719958601 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1719958601 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In1719958601 |ULTIMATE.start_main_#t~ite47_Out1719958601|)) (and (= ~a$w_buff1~0_In1719958601 |ULTIMATE.start_main_#t~ite47_Out1719958601|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1719958601, ~a$w_buff1~0=~a$w_buff1~0_In1719958601, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1719958601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1719958601} OutVars{~a~0=~a~0_In1719958601, ~a$w_buff1~0=~a$w_buff1~0_In1719958601, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1719958601|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1719958601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1719958601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:07:56,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1092142575 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1092142575 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-1092142575| ~a$w_buff0_used~0_In-1092142575) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1092142575| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1092142575, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1092142575} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1092142575, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1092142575|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1092142575} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:07:56,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-194800268 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-194800268 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-194800268 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-194800268 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-194800268| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-194800268 |ULTIMATE.start_main_#t~ite50_Out-194800268|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-194800268, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-194800268, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-194800268, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-194800268} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-194800268|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-194800268, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-194800268, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-194800268, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-194800268} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:07:56,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In749681779 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In749681779 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out749681779| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out749681779| ~a$r_buff0_thd0~0_In749681779)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In749681779, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In749681779} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out749681779|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In749681779, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In749681779} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:07:56,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1048170561 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1048170561 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1048170561 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In1048170561 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In1048170561 |ULTIMATE.start_main_#t~ite52_Out1048170561|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1048170561|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1048170561, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1048170561, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1048170561, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1048170561} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1048170561|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1048170561, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1048170561, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1048170561, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1048170561} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:07:56,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:07:56,416 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:07:56 BasicIcfg [2019-12-07 13:07:56,416 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:07:56,416 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:07:56,416 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:07:56,416 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:07:56,417 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:05:52" (3/4) ... [2019-12-07 13:07:56,418 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:07:56,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t391~0.base_29|) (= 0 v_~weak$$choice0~0_10) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t391~0.base_29| 4)) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29| 1)) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_#NULL.offset_6| 0) (= v_~y~0_79 0) (= 0 |v_ULTIMATE.start_main_~#t391~0.offset_22|) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t391~0.base_29|)) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t391~0.base_29|) |v_ULTIMATE.start_main_~#t391~0.offset_22| 0)) |v_#memory_int_21|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_29|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ULTIMATE.start_main_~#t391~0.base=|v_ULTIMATE.start_main_~#t391~0.base_29|, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_15|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_22|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_17|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t391~0.offset=|v_ULTIMATE.start_main_~#t391~0.offset_22|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t392~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t391~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t392~0.offset, #NULL.base, ULTIMATE.start_main_~#t393~0.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t391~0.offset] because there is no mapped edge [2019-12-07 13:07:56,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t392~0.base_12|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t392~0.base_12| 4) |v_#length_13|) (not (= 0 |v_ULTIMATE.start_main_~#t392~0.base_12|)) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t392~0.base_12| 1)) (= 0 |v_ULTIMATE.start_main_~#t392~0.offset_10|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t392~0.base_12|) |v_ULTIMATE.start_main_~#t392~0.offset_10| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t392~0.base=|v_ULTIMATE.start_main_~#t392~0.base_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t392~0.offset=|v_ULTIMATE.start_main_~#t392~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t392~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t392~0.offset] because there is no mapped edge [2019-12-07 13:07:56,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t393~0.offset_11|) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13| 1) |v_#valid_36|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t393~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t393~0.base_13|) |v_ULTIMATE.start_main_~#t393~0.offset_11| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t393~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t393~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t393~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t393~0.offset=|v_ULTIMATE.start_main_~#t393~0.offset_11|, ULTIMATE.start_main_~#t393~0.base=|v_ULTIMATE.start_main_~#t393~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t393~0.offset, ULTIMATE.start_main_~#t393~0.base] because there is no mapped edge [2019-12-07 13:07:56,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~a$r_buff0_thd3~0_In355081486 ~a$r_buff1_thd3~0_Out355081486) (= ~x~0_Out355081486 1) (= ~a$r_buff0_thd1~0_Out355081486 1) (= ~a$r_buff1_thd1~0_Out355081486 ~a$r_buff0_thd1~0_In355081486) (= ~y~0_In355081486 ~__unbuffered_p0_EBX~0_Out355081486) (= ~a$r_buff0_thd0~0_In355081486 ~a$r_buff1_thd0~0_Out355081486) (= ~__unbuffered_p0_EAX~0_Out355081486 ~x~0_Out355081486) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486 0)) (= ~a$r_buff1_thd2~0_Out355081486 ~a$r_buff0_thd2~0_In355081486)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In355081486, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In355081486, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In355081486, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In355081486, ~y~0=~y~0_In355081486} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out355081486, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out355081486, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out355081486, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out355081486, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In355081486, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In355081486, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out355081486, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In355081486, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out355081486, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out355081486, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In355081486, ~y~0=~y~0_In355081486, ~x~0=~x~0_Out355081486} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:07:56,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In32950811 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In32950811 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out32950811|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In32950811 |P0Thread1of1ForFork1_#t~ite5_Out32950811|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In32950811, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In32950811} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out32950811|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In32950811, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In32950811} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:07:56,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1453676663 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1453676663 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1453676663 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-1453676663 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1453676663| ~a$w_buff1_used~0_In-1453676663)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1453676663| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1453676663, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1453676663, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1453676663, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1453676663} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1453676663|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1453676663, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1453676663, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1453676663, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1453676663} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:07:56,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1079591739 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1079591739 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In-1079591739 |P1Thread1of1ForFork2_#t~ite9_Out-1079591739|)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-1079591739| ~a$w_buff1~0_In-1079591739) (not .cse0)))) InVars {~a~0=~a~0_In-1079591739, ~a$w_buff1~0=~a$w_buff1~0_In-1079591739, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1079591739, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1079591739} OutVars{~a~0=~a~0_In-1079591739, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1079591739|, ~a$w_buff1~0=~a$w_buff1~0_In-1079591739, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1079591739, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1079591739} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:07:56,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:07:56,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-430365147 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out-430365147 ~a$r_buff0_thd1~0_In-430365147)) (.cse0 (= (mod ~a$w_buff0_used~0_In-430365147 256) 0))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-430365147 0) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-430365147, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-430365147} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-430365147|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-430365147, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-430365147} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:07:56,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd1~0_In903870733 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In903870733 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In903870733 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In903870733 256) 0))) (or (and (= ~a$r_buff1_thd1~0_In903870733 |P0Thread1of1ForFork1_#t~ite8_Out903870733|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out903870733|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In903870733, ~a$w_buff0_used~0=~a$w_buff0_used~0_In903870733, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In903870733, ~a$w_buff1_used~0=~a$w_buff1_used~0_In903870733} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out903870733|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In903870733, ~a$w_buff0_used~0=~a$w_buff0_used~0_In903870733, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In903870733, ~a$w_buff1_used~0=~a$w_buff1_used~0_In903870733} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:07:56,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:07:56,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In245830440 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In245830440 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In245830440 |P1Thread1of1ForFork2_#t~ite11_Out245830440|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out245830440|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In245830440, ~a$w_buff0_used~0=~a$w_buff0_used~0_In245830440} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In245830440, ~a$w_buff0_used~0=~a$w_buff0_used~0_In245830440, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out245830440|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:07:56,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In291198819 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite21_Out291198819| ~a$w_buff0~0_In291198819) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In291198819| |P2Thread1of1ForFork0_#t~ite20_Out291198819|)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In291198819 256) 0))) (or (= (mod ~a$w_buff0_used~0_In291198819 256) 0) (and (= 0 (mod ~a$r_buff1_thd3~0_In291198819 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In291198819 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite21_Out291198819| |P2Thread1of1ForFork0_#t~ite20_Out291198819|) (= |P2Thread1of1ForFork0_#t~ite20_Out291198819| ~a$w_buff0~0_In291198819)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In291198819, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In291198819, ~a$w_buff0_used~0=~a$w_buff0_used~0_In291198819, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In291198819, ~a$w_buff1_used~0=~a$w_buff1_used~0_In291198819, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In291198819|, ~weak$$choice2~0=~weak$$choice2~0_In291198819} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out291198819|, ~a$w_buff0~0=~a$w_buff0~0_In291198819, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In291198819, ~a$w_buff0_used~0=~a$w_buff0_used~0_In291198819, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In291198819, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out291198819|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In291198819, ~weak$$choice2~0=~weak$$choice2~0_In291198819} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:07:56,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In335071336 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_In335071336| |P2Thread1of1ForFork0_#t~ite23_Out335071336|) (= ~a$w_buff1~0_In335071336 |P2Thread1of1ForFork0_#t~ite24_Out335071336|) (not .cse0)) (and .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In335071336 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In335071336 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In335071336 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In335071336 256))))) (= |P2Thread1of1ForFork0_#t~ite24_Out335071336| |P2Thread1of1ForFork0_#t~ite23_Out335071336|) (= ~a$w_buff1~0_In335071336 |P2Thread1of1ForFork0_#t~ite23_Out335071336|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In335071336, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In335071336|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In335071336, ~a$w_buff0_used~0=~a$w_buff0_used~0_In335071336, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In335071336, ~a$w_buff1_used~0=~a$w_buff1_used~0_In335071336, ~weak$$choice2~0=~weak$$choice2~0_In335071336} OutVars{~a$w_buff1~0=~a$w_buff1~0_In335071336, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out335071336|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out335071336|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In335071336, ~a$w_buff0_used~0=~a$w_buff0_used~0_In335071336, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In335071336, ~a$w_buff1_used~0=~a$w_buff1_used~0_In335071336, ~weak$$choice2~0=~weak$$choice2~0_In335071336} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:07:56,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In534487050 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_In534487050| |P2Thread1of1ForFork0_#t~ite26_Out534487050|) (= |P2Thread1of1ForFork0_#t~ite27_Out534487050| ~a$w_buff0_used~0_In534487050) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out534487050| |P2Thread1of1ForFork0_#t~ite26_Out534487050|) (= |P2Thread1of1ForFork0_#t~ite26_Out534487050| ~a$w_buff0_used~0_In534487050) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In534487050 256)))) (or (and (= (mod ~a$w_buff1_used~0_In534487050 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In534487050 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In534487050 256) 0)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In534487050|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In534487050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In534487050, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In534487050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In534487050, ~weak$$choice2~0=~weak$$choice2~0_In534487050} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out534487050|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out534487050|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In534487050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In534487050, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In534487050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In534487050, ~weak$$choice2~0=~weak$$choice2~0_In534487050} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:07:56,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:07:56,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:07:56,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In891379897 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In891379897 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out891379897| ~a$w_buff1~0_In891379897) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out891379897| ~a~0_In891379897) (or .cse0 .cse1)))) InVars {~a~0=~a~0_In891379897, ~a$w_buff1~0=~a$w_buff1~0_In891379897, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In891379897, ~a$w_buff1_used~0=~a$w_buff1_used~0_In891379897} OutVars{~a~0=~a~0_In891379897, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out891379897|, ~a$w_buff1~0=~a$w_buff1~0_In891379897, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In891379897, ~a$w_buff1_used~0=~a$w_buff1_used~0_In891379897} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:07:56,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:07:56,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In645708067 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In645708067 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out645708067| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out645708067| ~a$w_buff0_used~0_In645708067)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In645708067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In645708067} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out645708067|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In645708067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In645708067} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:07:56,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-1263145371 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1263145371 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1263145371 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In-1263145371 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1263145371| ~a$w_buff1_used~0_In-1263145371) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1263145371| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1263145371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1263145371, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1263145371, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1263145371} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1263145371, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1263145371, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1263145371, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1263145371, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1263145371|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:07:56,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In-1071190003 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1071190003 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1071190003| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1071190003| ~a$r_buff0_thd3~0_In-1071190003)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1071190003, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1071190003} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1071190003, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1071190003, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1071190003|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:07:56,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In1714637779 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1714637779 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1714637779 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In1714637779 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out1714637779| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd3~0_In1714637779 |P2Thread1of1ForFork0_#t~ite43_Out1714637779|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1714637779, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1714637779, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1714637779, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1714637779} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1714637779|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1714637779, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1714637779, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1714637779, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1714637779} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:07:56,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-1488197646 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-1488197646 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1488197646 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In-1488197646 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1488197646|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out-1488197646| ~a$w_buff1_used~0_In-1488197646)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1488197646, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1488197646, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1488197646, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1488197646} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1488197646, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1488197646, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1488197646, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1488197646|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1488197646} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:07:56,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1330885207 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1330885207 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-1330885207| ~a$r_buff0_thd2~0_In-1330885207)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1330885207| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1330885207, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1330885207} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1330885207, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1330885207, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1330885207|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:07:56,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-1847074248 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1847074248 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1847074248 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-1847074248 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1847074248 |P1Thread1of1ForFork2_#t~ite14_Out-1847074248|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1847074248|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1847074248, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1847074248, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1847074248, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1847074248} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1847074248, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1847074248, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1847074248, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1847074248, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1847074248|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:07:56,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:07:56,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:07:56,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:07:56,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In1719958601 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1719958601 256)))) (or (and (or .cse0 .cse1) (= ~a~0_In1719958601 |ULTIMATE.start_main_#t~ite47_Out1719958601|)) (and (= ~a$w_buff1~0_In1719958601 |ULTIMATE.start_main_#t~ite47_Out1719958601|) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1719958601, ~a$w_buff1~0=~a$w_buff1~0_In1719958601, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1719958601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1719958601} OutVars{~a~0=~a~0_In1719958601, ~a$w_buff1~0=~a$w_buff1~0_In1719958601, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1719958601|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1719958601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1719958601} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:07:56,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:07:56,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-1092142575 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1092142575 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-1092142575| ~a$w_buff0_used~0_In-1092142575) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-1092142575| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1092142575, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1092142575} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1092142575, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1092142575|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1092142575} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:07:56,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd0~0_In-194800268 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-194800268 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-194800268 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In-194800268 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-194800268| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In-194800268 |ULTIMATE.start_main_#t~ite50_Out-194800268|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-194800268, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-194800268, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-194800268, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-194800268} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-194800268|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-194800268, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-194800268, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-194800268, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-194800268} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:07:56,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In749681779 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In749681779 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out749681779| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out749681779| ~a$r_buff0_thd0~0_In749681779)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In749681779, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In749681779} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out749681779|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In749681779, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In749681779} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:07:56,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In1048170561 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1048170561 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1048170561 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In1048170561 256) 0))) (or (and (= ~a$r_buff1_thd0~0_In1048170561 |ULTIMATE.start_main_#t~ite52_Out1048170561|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1048170561|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1048170561, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1048170561, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1048170561, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1048170561} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1048170561|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1048170561, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1048170561, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1048170561, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1048170561} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:07:56,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:07:56,480 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6eebcb1e-795b-4d61-b1a5-8fdb63c183d1/bin/utaipan/witness.graphml [2019-12-07 13:07:56,480 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:07:56,481 INFO L168 Benchmark]: Toolchain (without parser) took 124685.82 ms. Allocated memory was 1.0 GB in the beginning and 6.9 GB in the end (delta: 5.9 GB). Free memory was 938.2 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,481 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:07:56,481 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -130.7 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,482 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,482 INFO L168 Benchmark]: Boogie Preprocessor took 25.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,482 INFO L168 Benchmark]: RCFGBuilder took 416.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,482 INFO L168 Benchmark]: TraceAbstraction took 123758.65 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,483 INFO L168 Benchmark]: Witness Printer took 64.00 ms. Allocated memory is still 6.9 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 44.9 MB). Peak memory consumption was 44.9 MB. Max. memory is 11.5 GB. [2019-12-07 13:07:56,484 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 957.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -130.7 MB). Peak memory consumption was 22.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.3 MB). Peak memory consumption was 3.3 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 416.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 123758.65 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. * Witness Printer took 64.00 ms. Allocated memory is still 6.9 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 44.9 MB). Peak memory consumption was 44.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.6s, 179 ProgramPointsBefore, 94 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 33 ChoiceCompositions, 7151 VarBasedMoverChecksPositive, 221 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 258 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 80759 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t391, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t392, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L841] FCALL, FORK 0 pthread_create(&t393, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$w_buff1 = a$w_buff0 [L738] 1 a$w_buff0 = 1 [L739] 1 a$w_buff1_used = a$w_buff0_used [L740] 1 a$w_buff0_used = (_Bool)1 [L758] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L772] 2 y = 1 [L775] 2 __unbuffered_p1_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L758] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L759] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L760] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 123.5s, OverallIterations: 43, TraceHistogramMax: 1, AutomataDifference: 39.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9152 SDtfs, 15478 SDslu, 33516 SDs, 0 SdLazy, 30923 SolverSat, 873 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 18.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 800 GetRequests, 68 SyntacticMatches, 44 SemanticMatches, 688 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5309 ImplicationChecksByTransitivity, 8.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=196221occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 60.0s AutomataMinimizationTime, 42 MinimizatonAttempts, 352946 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 4.1s InterpolantComputationTime, 2022 NumberOfCodeBlocks, 2022 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 1913 ConstructedInterpolants, 0 QuantifiedInterpolants, 1018388 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 42 InterpolantComputations, 42 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...