./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix015_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix015_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ceb9e9320cf1a16017a1b06564d05ef37577775e .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:22:41,317 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:22:41,318 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:22:41,326 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:22:41,326 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:22:41,327 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:22:41,328 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:22:41,329 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:22:41,330 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:22:41,331 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:22:41,331 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:22:41,332 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:22:41,332 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:22:41,333 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:22:41,334 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:22:41,335 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:22:41,335 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:22:41,336 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:22:41,337 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:22:41,339 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:22:41,340 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:22:41,341 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:22:41,342 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:22:41,342 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:22:41,344 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:22:41,344 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:22:41,344 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:22:41,345 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:22:41,345 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:22:41,346 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:22:41,346 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:22:41,346 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:22:41,347 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:22:41,347 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:22:41,348 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:22:41,348 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:22:41,348 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:22:41,348 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:22:41,348 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:22:41,349 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:22:41,349 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:22:41,350 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:22:41,359 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:22:41,360 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:22:41,360 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:22:41,360 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:22:41,360 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:22:41,360 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:22:41,361 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:22:41,361 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:22:41,362 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:22:41,362 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:22:41,363 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:22:41,363 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:41,364 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:22:41,364 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:22:41,365 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:22:41,365 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:22:41,365 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:22:41,365 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:22:41,365 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ceb9e9320cf1a16017a1b06564d05ef37577775e [2019-12-07 19:22:41,469 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:22:41,479 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:22:41,481 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:22:41,483 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:22:41,483 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:22:41,484 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix015_tso.oepc.i [2019-12-07 19:22:41,530 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/data/b439b2a4b/ea9ad02f4763441ca7369f0b1303eca8/FLAG0512f2d15 [2019-12-07 19:22:41,900 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:22:41,900 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/sv-benchmarks/c/pthread-wmm/mix015_tso.oepc.i [2019-12-07 19:22:41,912 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/data/b439b2a4b/ea9ad02f4763441ca7369f0b1303eca8/FLAG0512f2d15 [2019-12-07 19:22:42,292 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/data/b439b2a4b/ea9ad02f4763441ca7369f0b1303eca8 [2019-12-07 19:22:42,294 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:22:42,295 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:22:42,296 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:42,296 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:22:42,298 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:22:42,299 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,301 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77919ae6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42, skipping insertion in model container [2019-12-07 19:22:42,301 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,305 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:22:42,334 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:22:42,574 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:42,581 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:22:42,624 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:42,667 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:22:42,668 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42 WrapperNode [2019-12-07 19:22:42,668 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:42,668 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:42,668 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:22:42,668 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:22:42,674 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,687 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,705 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:42,705 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:22:42,705 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:22:42,705 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:22:42,711 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,712 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,715 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,715 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,722 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,725 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,727 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... [2019-12-07 19:22:42,730 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:22:42,731 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:22:42,731 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:22:42,731 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:22:42,731 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:42,770 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:22:42,771 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:22:42,771 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:22:42,771 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:22:42,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:22:42,772 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:22:42,773 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:22:43,176 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:22:43,177 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:22:43,177 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:43 BoogieIcfgContainer [2019-12-07 19:22:43,178 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:22:43,178 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:22:43,178 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:22:43,180 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:22:43,180 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:22:42" (1/3) ... [2019-12-07 19:22:43,181 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@46450934 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:43, skipping insertion in model container [2019-12-07 19:22:43,181 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:42" (2/3) ... [2019-12-07 19:22:43,181 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@46450934 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:43, skipping insertion in model container [2019-12-07 19:22:43,181 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:43" (3/3) ... [2019-12-07 19:22:43,182 INFO L109 eAbstractionObserver]: Analyzing ICFG mix015_tso.oepc.i [2019-12-07 19:22:43,189 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:22:43,189 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:22:43,194 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:22:43,194 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:22:43,220 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,220 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,220 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,220 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,220 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,221 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,222 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,225 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,226 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,227 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,229 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,230 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,231 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:43,253 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:22:43,266 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:22:43,266 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:22:43,266 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:22:43,266 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:22:43,266 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:22:43,266 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:22:43,266 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:22:43,266 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:22:43,277 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 19:22:43,278 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 19:22:43,334 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 19:22:43,334 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:43,343 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:22:43,359 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 19:22:43,390 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 19:22:43,390 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:43,395 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 685 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:22:43,411 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 19:22:43,412 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:22:46,273 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 19:22:46,535 WARN L192 SmtUtils]: Spent 146.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 19:22:46,564 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80759 [2019-12-07 19:22:46,564 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 19:22:46,566 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 102 transitions [2019-12-07 19:23:01,643 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118022 states. [2019-12-07 19:23:01,645 INFO L276 IsEmpty]: Start isEmpty. Operand 118022 states. [2019-12-07 19:23:01,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 19:23:01,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:01,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 19:23:01,649 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:01,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:01,653 INFO L82 PathProgramCache]: Analyzing trace with hash 922782, now seen corresponding path program 1 times [2019-12-07 19:23:01,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:01,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357768113] [2019-12-07 19:23:01,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:01,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:01,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:01,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [357768113] [2019-12-07 19:23:01,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:01,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:23:01,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419217607] [2019-12-07 19:23:01,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:01,800 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:01,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:01,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:01,811 INFO L87 Difference]: Start difference. First operand 118022 states. Second operand 3 states. [2019-12-07 19:23:02,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:02,602 INFO L93 Difference]: Finished difference Result 116858 states and 495582 transitions. [2019-12-07 19:23:02,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:02,604 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 19:23:02,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:03,052 INFO L225 Difference]: With dead ends: 116858 [2019-12-07 19:23:03,052 INFO L226 Difference]: Without dead ends: 110138 [2019-12-07 19:23:03,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:07,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110138 states. [2019-12-07 19:23:09,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110138 to 110138. [2019-12-07 19:23:09,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110138 states. [2019-12-07 19:23:10,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110138 states to 110138 states and 466462 transitions. [2019-12-07 19:23:10,287 INFO L78 Accepts]: Start accepts. Automaton has 110138 states and 466462 transitions. Word has length 3 [2019-12-07 19:23:10,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:10,288 INFO L462 AbstractCegarLoop]: Abstraction has 110138 states and 466462 transitions. [2019-12-07 19:23:10,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:10,288 INFO L276 IsEmpty]: Start isEmpty. Operand 110138 states and 466462 transitions. [2019-12-07 19:23:10,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:23:10,291 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:10,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:10,292 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:10,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:10,292 INFO L82 PathProgramCache]: Analyzing trace with hash 228105342, now seen corresponding path program 1 times [2019-12-07 19:23:10,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:10,292 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008586404] [2019-12-07 19:23:10,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:10,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:10,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:10,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008586404] [2019-12-07 19:23:10,353 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:10,353 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:10,353 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557920755] [2019-12-07 19:23:10,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:10,354 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:10,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:10,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:10,354 INFO L87 Difference]: Start difference. First operand 110138 states and 466462 transitions. Second operand 4 states. [2019-12-07 19:23:11,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:11,514 INFO L93 Difference]: Finished difference Result 170904 states and 695583 transitions. [2019-12-07 19:23:11,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:11,515 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:23:11,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:11,970 INFO L225 Difference]: With dead ends: 170904 [2019-12-07 19:23:11,970 INFO L226 Difference]: Without dead ends: 170855 [2019-12-07 19:23:11,970 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:17,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170855 states. [2019-12-07 19:23:21,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170855 to 156295. [2019-12-07 19:23:21,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156295 states. [2019-12-07 19:23:21,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156295 states to 156295 states and 644009 transitions. [2019-12-07 19:23:21,833 INFO L78 Accepts]: Start accepts. Automaton has 156295 states and 644009 transitions. Word has length 11 [2019-12-07 19:23:21,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:21,833 INFO L462 AbstractCegarLoop]: Abstraction has 156295 states and 644009 transitions. [2019-12-07 19:23:21,833 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:21,834 INFO L276 IsEmpty]: Start isEmpty. Operand 156295 states and 644009 transitions. [2019-12-07 19:23:21,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:23:21,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:21,838 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:21,838 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:21,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:21,838 INFO L82 PathProgramCache]: Analyzing trace with hash 891607686, now seen corresponding path program 1 times [2019-12-07 19:23:21,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:21,838 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695296799] [2019-12-07 19:23:21,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:21,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:21,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:21,883 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695296799] [2019-12-07 19:23:21,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:21,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:21,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1441711510] [2019-12-07 19:23:21,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:21,884 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:21,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:21,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:21,885 INFO L87 Difference]: Start difference. First operand 156295 states and 644009 transitions. Second operand 3 states. [2019-12-07 19:23:21,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:21,989 INFO L93 Difference]: Finished difference Result 33673 states and 108735 transitions. [2019-12-07 19:23:21,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:21,989 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 19:23:21,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:22,037 INFO L225 Difference]: With dead ends: 33673 [2019-12-07 19:23:22,037 INFO L226 Difference]: Without dead ends: 33673 [2019-12-07 19:23:22,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:22,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33673 states. [2019-12-07 19:23:22,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33673 to 33673. [2019-12-07 19:23:22,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33673 states. [2019-12-07 19:23:22,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33673 states to 33673 states and 108735 transitions. [2019-12-07 19:23:22,900 INFO L78 Accepts]: Start accepts. Automaton has 33673 states and 108735 transitions. Word has length 13 [2019-12-07 19:23:22,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:22,900 INFO L462 AbstractCegarLoop]: Abstraction has 33673 states and 108735 transitions. [2019-12-07 19:23:22,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:22,900 INFO L276 IsEmpty]: Start isEmpty. Operand 33673 states and 108735 transitions. [2019-12-07 19:23:22,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:23:22,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:22,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:22,902 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:22,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:22,903 INFO L82 PathProgramCache]: Analyzing trace with hash -1993825600, now seen corresponding path program 1 times [2019-12-07 19:23:22,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:22,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968279438] [2019-12-07 19:23:22,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:22,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:22,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:22,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968279438] [2019-12-07 19:23:22,945 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:22,945 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:22,946 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743679636] [2019-12-07 19:23:22,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:22,946 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:22,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:22,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:22,946 INFO L87 Difference]: Start difference. First operand 33673 states and 108735 transitions. Second operand 4 states. [2019-12-07 19:23:23,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:23,183 INFO L93 Difference]: Finished difference Result 42056 states and 135369 transitions. [2019-12-07 19:23:23,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:23,183 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:23:23,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:23,241 INFO L225 Difference]: With dead ends: 42056 [2019-12-07 19:23:23,242 INFO L226 Difference]: Without dead ends: 42056 [2019-12-07 19:23:23,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:23,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42056 states. [2019-12-07 19:23:23,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42056 to 37770. [2019-12-07 19:23:23,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37770 states. [2019-12-07 19:23:23,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37770 states to 37770 states and 121950 transitions. [2019-12-07 19:23:23,895 INFO L78 Accepts]: Start accepts. Automaton has 37770 states and 121950 transitions. Word has length 16 [2019-12-07 19:23:23,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:23,896 INFO L462 AbstractCegarLoop]: Abstraction has 37770 states and 121950 transitions. [2019-12-07 19:23:23,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:23,896 INFO L276 IsEmpty]: Start isEmpty. Operand 37770 states and 121950 transitions. [2019-12-07 19:23:23,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:23:23,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:23,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:23,903 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:23,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:23,903 INFO L82 PathProgramCache]: Analyzing trace with hash 674854723, now seen corresponding path program 1 times [2019-12-07 19:23:23,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:23,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903183969] [2019-12-07 19:23:23,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:23,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:23,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:23,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903183969] [2019-12-07 19:23:23,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:23,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:23,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118839441] [2019-12-07 19:23:23,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:23,973 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:23,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:23,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:23,974 INFO L87 Difference]: Start difference. First operand 37770 states and 121950 transitions. Second operand 5 states. [2019-12-07 19:23:24,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:24,370 INFO L93 Difference]: Finished difference Result 48537 states and 154193 transitions. [2019-12-07 19:23:24,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:23:24,371 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:23:24,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:24,436 INFO L225 Difference]: With dead ends: 48537 [2019-12-07 19:23:24,436 INFO L226 Difference]: Without dead ends: 48530 [2019-12-07 19:23:24,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:23:24,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48530 states. [2019-12-07 19:23:25,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48530 to 37459. [2019-12-07 19:23:25,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37459 states. [2019-12-07 19:23:25,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37459 states to 37459 states and 120776 transitions. [2019-12-07 19:23:25,140 INFO L78 Accepts]: Start accepts. Automaton has 37459 states and 120776 transitions. Word has length 22 [2019-12-07 19:23:25,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:25,141 INFO L462 AbstractCegarLoop]: Abstraction has 37459 states and 120776 transitions. [2019-12-07 19:23:25,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:25,141 INFO L276 IsEmpty]: Start isEmpty. Operand 37459 states and 120776 transitions. [2019-12-07 19:23:25,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 19:23:25,149 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:25,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:25,149 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:25,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:25,150 INFO L82 PathProgramCache]: Analyzing trace with hash 332765886, now seen corresponding path program 1 times [2019-12-07 19:23:25,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:25,150 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326996103] [2019-12-07 19:23:25,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:25,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:25,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:25,210 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326996103] [2019-12-07 19:23:25,210 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:25,210 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:25,210 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965339759] [2019-12-07 19:23:25,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:25,211 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:25,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:25,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:25,211 INFO L87 Difference]: Start difference. First operand 37459 states and 120776 transitions. Second operand 5 states. [2019-12-07 19:23:25,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:25,602 INFO L93 Difference]: Finished difference Result 51888 states and 163997 transitions. [2019-12-07 19:23:25,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:23:25,602 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 19:23:25,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:25,678 INFO L225 Difference]: With dead ends: 51888 [2019-12-07 19:23:25,678 INFO L226 Difference]: Without dead ends: 51875 [2019-12-07 19:23:25,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:23:25,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51875 states. [2019-12-07 19:23:26,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51875 to 43351. [2019-12-07 19:23:26,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43351 states. [2019-12-07 19:23:26,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43351 states to 43351 states and 139193 transitions. [2019-12-07 19:23:26,681 INFO L78 Accepts]: Start accepts. Automaton has 43351 states and 139193 transitions. Word has length 25 [2019-12-07 19:23:26,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:26,682 INFO L462 AbstractCegarLoop]: Abstraction has 43351 states and 139193 transitions. [2019-12-07 19:23:26,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:26,682 INFO L276 IsEmpty]: Start isEmpty. Operand 43351 states and 139193 transitions. [2019-12-07 19:23:26,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:23:26,693 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:26,693 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:26,693 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:26,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:26,693 INFO L82 PathProgramCache]: Analyzing trace with hash 445555351, now seen corresponding path program 1 times [2019-12-07 19:23:26,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:26,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558427619] [2019-12-07 19:23:26,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:26,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:26,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:26,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558427619] [2019-12-07 19:23:26,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:26,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:26,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1981592051] [2019-12-07 19:23:26,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:26,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:26,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:26,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:26,725 INFO L87 Difference]: Start difference. First operand 43351 states and 139193 transitions. Second operand 3 states. [2019-12-07 19:23:26,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:26,925 INFO L93 Difference]: Finished difference Result 67737 states and 216583 transitions. [2019-12-07 19:23:26,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:26,926 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 19:23:26,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:27,027 INFO L225 Difference]: With dead ends: 67737 [2019-12-07 19:23:27,027 INFO L226 Difference]: Without dead ends: 67737 [2019-12-07 19:23:27,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:27,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67737 states. [2019-12-07 19:23:27,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67737 to 51736. [2019-12-07 19:23:27,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51736 states. [2019-12-07 19:23:28,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51736 states to 51736 states and 166463 transitions. [2019-12-07 19:23:28,004 INFO L78 Accepts]: Start accepts. Automaton has 51736 states and 166463 transitions. Word has length 27 [2019-12-07 19:23:28,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:28,004 INFO L462 AbstractCegarLoop]: Abstraction has 51736 states and 166463 transitions. [2019-12-07 19:23:28,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:28,004 INFO L276 IsEmpty]: Start isEmpty. Operand 51736 states and 166463 transitions. [2019-12-07 19:23:28,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:23:28,018 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:28,018 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:28,019 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:28,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:28,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1217095067, now seen corresponding path program 1 times [2019-12-07 19:23:28,019 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:28,019 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511879797] [2019-12-07 19:23:28,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:28,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:28,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:28,041 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511879797] [2019-12-07 19:23:28,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:28,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:28,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [566758270] [2019-12-07 19:23:28,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:28,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:28,042 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:28,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:28,042 INFO L87 Difference]: Start difference. First operand 51736 states and 166463 transitions. Second operand 3 states. [2019-12-07 19:23:28,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:28,238 INFO L93 Difference]: Finished difference Result 67737 states and 213366 transitions. [2019-12-07 19:23:28,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:28,239 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 19:23:28,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:28,338 INFO L225 Difference]: With dead ends: 67737 [2019-12-07 19:23:28,338 INFO L226 Difference]: Without dead ends: 67737 [2019-12-07 19:23:28,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:28,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67737 states. [2019-12-07 19:23:29,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67737 to 51736. [2019-12-07 19:23:29,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51736 states. [2019-12-07 19:23:29,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51736 states to 51736 states and 163246 transitions. [2019-12-07 19:23:29,322 INFO L78 Accepts]: Start accepts. Automaton has 51736 states and 163246 transitions. Word has length 27 [2019-12-07 19:23:29,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:29,322 INFO L462 AbstractCegarLoop]: Abstraction has 51736 states and 163246 transitions. [2019-12-07 19:23:29,322 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:29,322 INFO L276 IsEmpty]: Start isEmpty. Operand 51736 states and 163246 transitions. [2019-12-07 19:23:29,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:23:29,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:29,336 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:29,337 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:29,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:29,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1361870049, now seen corresponding path program 1 times [2019-12-07 19:23:29,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:29,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440561957] [2019-12-07 19:23:29,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:29,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:29,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:29,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [440561957] [2019-12-07 19:23:29,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:29,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:23:29,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213826173] [2019-12-07 19:23:29,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:23:29,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:29,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:23:29,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:23:29,385 INFO L87 Difference]: Start difference. First operand 51736 states and 163246 transitions. Second operand 6 states. [2019-12-07 19:23:29,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:29,930 INFO L93 Difference]: Finished difference Result 97116 states and 305877 transitions. [2019-12-07 19:23:29,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:23:29,931 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 19:23:29,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:30,073 INFO L225 Difference]: With dead ends: 97116 [2019-12-07 19:23:30,073 INFO L226 Difference]: Without dead ends: 97097 [2019-12-07 19:23:30,073 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:23:30,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97097 states. [2019-12-07 19:23:31,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97097 to 56317. [2019-12-07 19:23:31,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56317 states. [2019-12-07 19:23:31,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56317 states to 56317 states and 177413 transitions. [2019-12-07 19:23:31,317 INFO L78 Accepts]: Start accepts. Automaton has 56317 states and 177413 transitions. Word has length 27 [2019-12-07 19:23:31,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:31,317 INFO L462 AbstractCegarLoop]: Abstraction has 56317 states and 177413 transitions. [2019-12-07 19:23:31,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:23:31,317 INFO L276 IsEmpty]: Start isEmpty. Operand 56317 states and 177413 transitions. [2019-12-07 19:23:31,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:23:31,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:31,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:31,335 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:31,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:31,335 INFO L82 PathProgramCache]: Analyzing trace with hash -2015671980, now seen corresponding path program 1 times [2019-12-07 19:23:31,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:31,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920217906] [2019-12-07 19:23:31,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:31,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:31,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:31,380 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920217906] [2019-12-07 19:23:31,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:31,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:23:31,381 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753513509] [2019-12-07 19:23:31,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:23:31,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:31,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:23:31,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:23:31,382 INFO L87 Difference]: Start difference. First operand 56317 states and 177413 transitions. Second operand 6 states. [2019-12-07 19:23:31,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:31,960 INFO L93 Difference]: Finished difference Result 92170 states and 288131 transitions. [2019-12-07 19:23:31,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:23:31,961 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 19:23:31,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:32,093 INFO L225 Difference]: With dead ends: 92170 [2019-12-07 19:23:32,093 INFO L226 Difference]: Without dead ends: 92148 [2019-12-07 19:23:32,093 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:23:32,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92148 states. [2019-12-07 19:23:33,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92148 to 55804. [2019-12-07 19:23:33,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55804 states. [2019-12-07 19:23:33,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55804 states to 55804 states and 175723 transitions. [2019-12-07 19:23:33,308 INFO L78 Accepts]: Start accepts. Automaton has 55804 states and 175723 transitions. Word has length 28 [2019-12-07 19:23:33,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:33,308 INFO L462 AbstractCegarLoop]: Abstraction has 55804 states and 175723 transitions. [2019-12-07 19:23:33,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:23:33,308 INFO L276 IsEmpty]: Start isEmpty. Operand 55804 states and 175723 transitions. [2019-12-07 19:23:33,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:23:33,326 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:33,326 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:33,326 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:33,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:33,326 INFO L82 PathProgramCache]: Analyzing trace with hash -1692206128, now seen corresponding path program 1 times [2019-12-07 19:23:33,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:33,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444743467] [2019-12-07 19:23:33,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:33,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:33,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:33,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444743467] [2019-12-07 19:23:33,376 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:33,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:23:33,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052490120] [2019-12-07 19:23:33,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:33,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:33,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:33,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:33,377 INFO L87 Difference]: Start difference. First operand 55804 states and 175723 transitions. Second operand 5 states. [2019-12-07 19:23:33,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:33,885 INFO L93 Difference]: Finished difference Result 77000 states and 239966 transitions. [2019-12-07 19:23:33,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:23:33,886 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 19:23:33,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:33,994 INFO L225 Difference]: With dead ends: 77000 [2019-12-07 19:23:33,994 INFO L226 Difference]: Without dead ends: 77000 [2019-12-07 19:23:33,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:23:34,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77000 states. [2019-12-07 19:23:35,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77000 to 67374. [2019-12-07 19:23:35,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67374 states. [2019-12-07 19:23:35,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67374 states to 67374 states and 211767 transitions. [2019-12-07 19:23:35,204 INFO L78 Accepts]: Start accepts. Automaton has 67374 states and 211767 transitions. Word has length 28 [2019-12-07 19:23:35,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:35,204 INFO L462 AbstractCegarLoop]: Abstraction has 67374 states and 211767 transitions. [2019-12-07 19:23:35,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:35,204 INFO L276 IsEmpty]: Start isEmpty. Operand 67374 states and 211767 transitions. [2019-12-07 19:23:35,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 19:23:35,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:35,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:35,224 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:35,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:35,224 INFO L82 PathProgramCache]: Analyzing trace with hash 46100818, now seen corresponding path program 1 times [2019-12-07 19:23:35,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:35,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920404560] [2019-12-07 19:23:35,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:35,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:35,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:35,260 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920404560] [2019-12-07 19:23:35,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:35,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:35,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2060434653] [2019-12-07 19:23:35,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:35,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:35,261 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:35,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:35,261 INFO L87 Difference]: Start difference. First operand 67374 states and 211767 transitions. Second operand 3 states. [2019-12-07 19:23:35,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:35,446 INFO L93 Difference]: Finished difference Result 64907 states and 202241 transitions. [2019-12-07 19:23:35,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:35,447 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 19:23:35,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:35,531 INFO L225 Difference]: With dead ends: 64907 [2019-12-07 19:23:35,531 INFO L226 Difference]: Without dead ends: 64907 [2019-12-07 19:23:35,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:35,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64907 states. [2019-12-07 19:23:36,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64907 to 59183. [2019-12-07 19:23:36,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59183 states. [2019-12-07 19:23:36,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59183 states to 59183 states and 184969 transitions. [2019-12-07 19:23:36,509 INFO L78 Accepts]: Start accepts. Automaton has 59183 states and 184969 transitions. Word has length 29 [2019-12-07 19:23:36,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:36,509 INFO L462 AbstractCegarLoop]: Abstraction has 59183 states and 184969 transitions. [2019-12-07 19:23:36,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:36,509 INFO L276 IsEmpty]: Start isEmpty. Operand 59183 states and 184969 transitions. [2019-12-07 19:23:36,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 19:23:36,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:36,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:36,527 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:36,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:36,527 INFO L82 PathProgramCache]: Analyzing trace with hash -238960576, now seen corresponding path program 1 times [2019-12-07 19:23:36,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:36,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378512824] [2019-12-07 19:23:36,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:36,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:36,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:36,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378512824] [2019-12-07 19:23:36,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:36,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:36,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [848102420] [2019-12-07 19:23:36,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:36,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:36,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:36,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:36,556 INFO L87 Difference]: Start difference. First operand 59183 states and 184969 transitions. Second operand 4 states. [2019-12-07 19:23:36,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:36,625 INFO L93 Difference]: Finished difference Result 23861 states and 71561 transitions. [2019-12-07 19:23:36,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:23:36,625 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 19:23:36,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:36,650 INFO L225 Difference]: With dead ends: 23861 [2019-12-07 19:23:36,650 INFO L226 Difference]: Without dead ends: 23861 [2019-12-07 19:23:36,651 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:36,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23861 states. [2019-12-07 19:23:36,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23861 to 22762. [2019-12-07 19:23:36,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22762 states. [2019-12-07 19:23:36,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22762 states to 22762 states and 68309 transitions. [2019-12-07 19:23:36,966 INFO L78 Accepts]: Start accepts. Automaton has 22762 states and 68309 transitions. Word has length 29 [2019-12-07 19:23:36,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:36,966 INFO L462 AbstractCegarLoop]: Abstraction has 22762 states and 68309 transitions. [2019-12-07 19:23:36,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:36,966 INFO L276 IsEmpty]: Start isEmpty. Operand 22762 states and 68309 transitions. [2019-12-07 19:23:36,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:23:36,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:36,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:36,982 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:36,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:36,982 INFO L82 PathProgramCache]: Analyzing trace with hash 405285854, now seen corresponding path program 1 times [2019-12-07 19:23:36,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:36,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184505361] [2019-12-07 19:23:36,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:36,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:37,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:37,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184505361] [2019-12-07 19:23:37,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:37,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:37,018 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1276351491] [2019-12-07 19:23:37,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:37,018 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:37,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:37,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:37,019 INFO L87 Difference]: Start difference. First operand 22762 states and 68309 transitions. Second operand 5 states. [2019-12-07 19:23:37,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:37,259 INFO L93 Difference]: Finished difference Result 25420 states and 75593 transitions. [2019-12-07 19:23:37,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:23:37,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2019-12-07 19:23:37,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:37,288 INFO L225 Difference]: With dead ends: 25420 [2019-12-07 19:23:37,288 INFO L226 Difference]: Without dead ends: 25420 [2019-12-07 19:23:37,288 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:23:37,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25420 states. [2019-12-07 19:23:37,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25420 to 22818. [2019-12-07 19:23:37,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22818 states. [2019-12-07 19:23:37,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22818 states to 22818 states and 68469 transitions. [2019-12-07 19:23:37,625 INFO L78 Accepts]: Start accepts. Automaton has 22818 states and 68469 transitions. Word has length 33 [2019-12-07 19:23:37,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:37,625 INFO L462 AbstractCegarLoop]: Abstraction has 22818 states and 68469 transitions. [2019-12-07 19:23:37,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:37,626 INFO L276 IsEmpty]: Start isEmpty. Operand 22818 states and 68469 transitions. [2019-12-07 19:23:37,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:23:37,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:37,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:37,641 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:37,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:37,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1258895234, now seen corresponding path program 2 times [2019-12-07 19:23:37,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:37,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384651918] [2019-12-07 19:23:37,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:37,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:37,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:37,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384651918] [2019-12-07 19:23:37,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:37,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:23:37,693 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808039846] [2019-12-07 19:23:37,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:23:37,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:37,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:23:37,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:23:37,694 INFO L87 Difference]: Start difference. First operand 22818 states and 68469 transitions. Second operand 7 states. [2019-12-07 19:23:38,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:38,432 INFO L93 Difference]: Finished difference Result 42045 states and 124974 transitions. [2019-12-07 19:23:38,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:23:38,432 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 19:23:38,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:38,479 INFO L225 Difference]: With dead ends: 42045 [2019-12-07 19:23:38,479 INFO L226 Difference]: Without dead ends: 42045 [2019-12-07 19:23:38,479 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:23:38,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42045 states. [2019-12-07 19:23:38,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42045 to 23141. [2019-12-07 19:23:38,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23141 states. [2019-12-07 19:23:38,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23141 states to 23141 states and 69482 transitions. [2019-12-07 19:23:38,966 INFO L78 Accepts]: Start accepts. Automaton has 23141 states and 69482 transitions. Word has length 33 [2019-12-07 19:23:38,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:38,966 INFO L462 AbstractCegarLoop]: Abstraction has 23141 states and 69482 transitions. [2019-12-07 19:23:38,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:23:38,967 INFO L276 IsEmpty]: Start isEmpty. Operand 23141 states and 69482 transitions. [2019-12-07 19:23:38,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 19:23:38,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:38,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:38,986 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:38,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:38,986 INFO L82 PathProgramCache]: Analyzing trace with hash -454706214, now seen corresponding path program 3 times [2019-12-07 19:23:38,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:38,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [721045248] [2019-12-07 19:23:38,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:38,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:39,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:39,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [721045248] [2019-12-07 19:23:39,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:39,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:23:39,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805733214] [2019-12-07 19:23:39,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:23:39,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:39,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:23:39,069 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:23:39,069 INFO L87 Difference]: Start difference. First operand 23141 states and 69482 transitions. Second operand 8 states. [2019-12-07 19:23:40,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:40,197 INFO L93 Difference]: Finished difference Result 50931 states and 149428 transitions. [2019-12-07 19:23:40,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 19:23:40,197 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 19:23:40,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:40,260 INFO L225 Difference]: With dead ends: 50931 [2019-12-07 19:23:40,260 INFO L226 Difference]: Without dead ends: 50931 [2019-12-07 19:23:40,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 19:23:40,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50931 states. [2019-12-07 19:23:40,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50931 to 23016. [2019-12-07 19:23:40,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23016 states. [2019-12-07 19:23:40,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23016 states to 23016 states and 69097 transitions. [2019-12-07 19:23:40,789 INFO L78 Accepts]: Start accepts. Automaton has 23016 states and 69097 transitions. Word has length 33 [2019-12-07 19:23:40,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:40,789 INFO L462 AbstractCegarLoop]: Abstraction has 23016 states and 69097 transitions. [2019-12-07 19:23:40,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:23:40,789 INFO L276 IsEmpty]: Start isEmpty. Operand 23016 states and 69097 transitions. [2019-12-07 19:23:40,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 19:23:40,805 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:40,805 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:40,806 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:40,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:40,806 INFO L82 PathProgramCache]: Analyzing trace with hash -1655017129, now seen corresponding path program 1 times [2019-12-07 19:23:40,806 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:40,806 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574700816] [2019-12-07 19:23:40,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:40,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:40,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:40,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574700816] [2019-12-07 19:23:40,864 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:40,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:23:40,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1192907996] [2019-12-07 19:23:40,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:23:40,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:40,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:23:40,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:23:40,865 INFO L87 Difference]: Start difference. First operand 23016 states and 69097 transitions. Second operand 7 states. [2019-12-07 19:23:41,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:41,663 INFO L93 Difference]: Finished difference Result 38884 states and 115110 transitions. [2019-12-07 19:23:41,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:23:41,663 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 19:23:41,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:41,705 INFO L225 Difference]: With dead ends: 38884 [2019-12-07 19:23:41,705 INFO L226 Difference]: Without dead ends: 38884 [2019-12-07 19:23:41,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:23:41,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38884 states. [2019-12-07 19:23:42,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38884 to 22737. [2019-12-07 19:23:42,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22737 states. [2019-12-07 19:23:42,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22737 states to 22737 states and 68261 transitions. [2019-12-07 19:23:42,136 INFO L78 Accepts]: Start accepts. Automaton has 22737 states and 68261 transitions. Word has length 34 [2019-12-07 19:23:42,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:42,136 INFO L462 AbstractCegarLoop]: Abstraction has 22737 states and 68261 transitions. [2019-12-07 19:23:42,136 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:23:42,136 INFO L276 IsEmpty]: Start isEmpty. Operand 22737 states and 68261 transitions. [2019-12-07 19:23:42,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 19:23:42,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:42,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:42,151 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:42,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:42,152 INFO L82 PathProgramCache]: Analyzing trace with hash 2107636055, now seen corresponding path program 2 times [2019-12-07 19:23:42,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:42,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939323896] [2019-12-07 19:23:42,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:42,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:42,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:42,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939323896] [2019-12-07 19:23:42,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:42,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:23:42,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1047382699] [2019-12-07 19:23:42,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 19:23:42,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:42,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 19:23:42,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:23:42,212 INFO L87 Difference]: Start difference. First operand 22737 states and 68261 transitions. Second operand 8 states. [2019-12-07 19:23:43,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:43,888 INFO L93 Difference]: Finished difference Result 45160 states and 132117 transitions. [2019-12-07 19:23:43,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 19:23:43,888 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 19:23:43,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:43,938 INFO L225 Difference]: With dead ends: 45160 [2019-12-07 19:23:43,938 INFO L226 Difference]: Without dead ends: 45160 [2019-12-07 19:23:43,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 19:23:44,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45160 states. [2019-12-07 19:23:44,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45160 to 22269. [2019-12-07 19:23:44,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22269 states. [2019-12-07 19:23:44,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22269 states to 22269 states and 66872 transitions. [2019-12-07 19:23:44,404 INFO L78 Accepts]: Start accepts. Automaton has 22269 states and 66872 transitions. Word has length 34 [2019-12-07 19:23:44,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:44,404 INFO L462 AbstractCegarLoop]: Abstraction has 22269 states and 66872 transitions. [2019-12-07 19:23:44,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 19:23:44,404 INFO L276 IsEmpty]: Start isEmpty. Operand 22269 states and 66872 transitions. [2019-12-07 19:23:44,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 19:23:44,423 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:44,423 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:44,423 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:44,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:44,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1063261264, now seen corresponding path program 1 times [2019-12-07 19:23:44,423 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:44,424 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094937786] [2019-12-07 19:23:44,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:44,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:44,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:44,452 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094937786] [2019-12-07 19:23:44,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:44,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:44,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587062054] [2019-12-07 19:23:44,452 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:44,452 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:44,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:44,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:44,452 INFO L87 Difference]: Start difference. First operand 22269 states and 66872 transitions. Second operand 3 states. [2019-12-07 19:23:44,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:44,504 INFO L93 Difference]: Finished difference Result 21125 states and 62503 transitions. [2019-12-07 19:23:44,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:44,505 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 19:23:44,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:44,526 INFO L225 Difference]: With dead ends: 21125 [2019-12-07 19:23:44,526 INFO L226 Difference]: Without dead ends: 21125 [2019-12-07 19:23:44,526 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:44,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21125 states. [2019-12-07 19:23:44,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21125 to 20667. [2019-12-07 19:23:44,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20667 states. [2019-12-07 19:23:44,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20667 states to 20667 states and 61207 transitions. [2019-12-07 19:23:44,807 INFO L78 Accepts]: Start accepts. Automaton has 20667 states and 61207 transitions. Word has length 40 [2019-12-07 19:23:44,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:44,807 INFO L462 AbstractCegarLoop]: Abstraction has 20667 states and 61207 transitions. [2019-12-07 19:23:44,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:44,807 INFO L276 IsEmpty]: Start isEmpty. Operand 20667 states and 61207 transitions. [2019-12-07 19:23:44,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:23:44,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:44,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:44,823 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:44,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:44,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1269693180, now seen corresponding path program 1 times [2019-12-07 19:23:44,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:44,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914569105] [2019-12-07 19:23:44,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:44,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:44,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:44,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914569105] [2019-12-07 19:23:44,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:44,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:44,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540706083] [2019-12-07 19:23:44,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:44,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:44,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:44,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:44,889 INFO L87 Difference]: Start difference. First operand 20667 states and 61207 transitions. Second operand 4 states. [2019-12-07 19:23:44,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:44,995 INFO L93 Difference]: Finished difference Result 37563 states and 111142 transitions. [2019-12-07 19:23:44,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:44,996 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 19:23:44,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:45,031 INFO L225 Difference]: With dead ends: 37563 [2019-12-07 19:23:45,031 INFO L226 Difference]: Without dead ends: 34066 [2019-12-07 19:23:45,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:45,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34066 states. [2019-12-07 19:23:45,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34066 to 33854. [2019-12-07 19:23:45,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33854 states. [2019-12-07 19:23:45,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33854 states to 33854 states and 100014 transitions. [2019-12-07 19:23:45,484 INFO L78 Accepts]: Start accepts. Automaton has 33854 states and 100014 transitions. Word has length 41 [2019-12-07 19:23:45,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:45,485 INFO L462 AbstractCegarLoop]: Abstraction has 33854 states and 100014 transitions. [2019-12-07 19:23:45,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:45,485 INFO L276 IsEmpty]: Start isEmpty. Operand 33854 states and 100014 transitions. [2019-12-07 19:23:45,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:23:45,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:45,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:45,514 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:45,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:45,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1776854460, now seen corresponding path program 2 times [2019-12-07 19:23:45,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:45,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466597663] [2019-12-07 19:23:45,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:45,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:45,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:45,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466597663] [2019-12-07 19:23:45,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:45,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:23:45,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007424062] [2019-12-07 19:23:45,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:23:45,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:45,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:23:45,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:23:45,723 INFO L87 Difference]: Start difference. First operand 33854 states and 100014 transitions. Second operand 10 states. [2019-12-07 19:23:46,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:46,072 INFO L93 Difference]: Finished difference Result 34117 states and 100675 transitions. [2019-12-07 19:23:46,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 19:23:46,073 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2019-12-07 19:23:46,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:46,111 INFO L225 Difference]: With dead ends: 34117 [2019-12-07 19:23:46,111 INFO L226 Difference]: Without dead ends: 34117 [2019-12-07 19:23:46,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=125, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:23:46,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34117 states. [2019-12-07 19:23:46,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34117 to 33117. [2019-12-07 19:23:46,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33117 states. [2019-12-07 19:23:46,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33117 states to 33117 states and 97915 transitions. [2019-12-07 19:23:46,585 INFO L78 Accepts]: Start accepts. Automaton has 33117 states and 97915 transitions. Word has length 41 [2019-12-07 19:23:46,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:46,585 INFO L462 AbstractCegarLoop]: Abstraction has 33117 states and 97915 transitions. [2019-12-07 19:23:46,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:23:46,585 INFO L276 IsEmpty]: Start isEmpty. Operand 33117 states and 97915 transitions. [2019-12-07 19:23:46,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:23:46,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:46,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:46,615 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:46,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:46,615 INFO L82 PathProgramCache]: Analyzing trace with hash -577150491, now seen corresponding path program 1 times [2019-12-07 19:23:46,615 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:46,615 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694476391] [2019-12-07 19:23:46,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:46,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:46,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:46,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694476391] [2019-12-07 19:23:46,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:46,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:23:46,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990420527] [2019-12-07 19:23:46,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:46,657 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:46,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:46,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:46,658 INFO L87 Difference]: Start difference. First operand 33117 states and 97915 transitions. Second operand 5 states. [2019-12-07 19:23:46,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:46,748 INFO L93 Difference]: Finished difference Result 30715 states and 92736 transitions. [2019-12-07 19:23:46,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:46,749 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 19:23:46,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:46,782 INFO L225 Difference]: With dead ends: 30715 [2019-12-07 19:23:46,782 INFO L226 Difference]: Without dead ends: 30195 [2019-12-07 19:23:46,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:46,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30195 states. [2019-12-07 19:23:47,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30195 to 17094. [2019-12-07 19:23:47,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17094 states. [2019-12-07 19:23:47,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17094 states to 17094 states and 51822 transitions. [2019-12-07 19:23:47,109 INFO L78 Accepts]: Start accepts. Automaton has 17094 states and 51822 transitions. Word has length 42 [2019-12-07 19:23:47,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:47,109 INFO L462 AbstractCegarLoop]: Abstraction has 17094 states and 51822 transitions. [2019-12-07 19:23:47,109 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:47,109 INFO L276 IsEmpty]: Start isEmpty. Operand 17094 states and 51822 transitions. [2019-12-07 19:23:47,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:23:47,123 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:47,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:47,123 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:47,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:47,124 INFO L82 PathProgramCache]: Analyzing trace with hash -1998793289, now seen corresponding path program 1 times [2019-12-07 19:23:47,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:47,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697683335] [2019-12-07 19:23:47,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:47,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:47,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:47,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697683335] [2019-12-07 19:23:47,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:47,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:47,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679559640] [2019-12-07 19:23:47,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:23:47,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:47,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:23:47,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:47,158 INFO L87 Difference]: Start difference. First operand 17094 states and 51822 transitions. Second operand 3 states. [2019-12-07 19:23:47,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:47,225 INFO L93 Difference]: Finished difference Result 19594 states and 59473 transitions. [2019-12-07 19:23:47,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:23:47,225 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 19:23:47,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:47,246 INFO L225 Difference]: With dead ends: 19594 [2019-12-07 19:23:47,246 INFO L226 Difference]: Without dead ends: 19594 [2019-12-07 19:23:47,247 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:23:47,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19594 states. [2019-12-07 19:23:47,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19594 to 16375. [2019-12-07 19:23:47,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16375 states. [2019-12-07 19:23:47,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16375 states to 16375 states and 49894 transitions. [2019-12-07 19:23:47,498 INFO L78 Accepts]: Start accepts. Automaton has 16375 states and 49894 transitions. Word has length 66 [2019-12-07 19:23:47,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:47,498 INFO L462 AbstractCegarLoop]: Abstraction has 16375 states and 49894 transitions. [2019-12-07 19:23:47,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:47,499 INFO L276 IsEmpty]: Start isEmpty. Operand 16375 states and 49894 transitions. [2019-12-07 19:23:47,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:47,512 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:47,512 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:47,512 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:47,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:47,512 INFO L82 PathProgramCache]: Analyzing trace with hash 144628366, now seen corresponding path program 1 times [2019-12-07 19:23:47,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:47,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529134476] [2019-12-07 19:23:47,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:47,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:47,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:47,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529134476] [2019-12-07 19:23:47,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:47,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:23:47,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [460777028] [2019-12-07 19:23:47,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:23:47,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:47,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:23:47,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:23:47,583 INFO L87 Difference]: Start difference. First operand 16375 states and 49894 transitions. Second operand 7 states. [2019-12-07 19:23:48,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:48,466 INFO L93 Difference]: Finished difference Result 28552 states and 85024 transitions. [2019-12-07 19:23:48,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 19:23:48,466 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 19:23:48,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:48,495 INFO L225 Difference]: With dead ends: 28552 [2019-12-07 19:23:48,495 INFO L226 Difference]: Without dead ends: 28552 [2019-12-07 19:23:48,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 19:23:48,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28552 states. [2019-12-07 19:23:48,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28552 to 15971. [2019-12-07 19:23:48,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15971 states. [2019-12-07 19:23:48,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15971 states to 15971 states and 48905 transitions. [2019-12-07 19:23:48,807 INFO L78 Accepts]: Start accepts. Automaton has 15971 states and 48905 transitions. Word has length 67 [2019-12-07 19:23:48,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:48,807 INFO L462 AbstractCegarLoop]: Abstraction has 15971 states and 48905 transitions. [2019-12-07 19:23:48,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:23:48,807 INFO L276 IsEmpty]: Start isEmpty. Operand 15971 states and 48905 transitions. [2019-12-07 19:23:48,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:48,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:48,821 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:48,821 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:48,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:48,821 INFO L82 PathProgramCache]: Analyzing trace with hash 208126770, now seen corresponding path program 1 times [2019-12-07 19:23:48,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:48,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922687814] [2019-12-07 19:23:48,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:48,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:48,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:48,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922687814] [2019-12-07 19:23:48,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:48,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:23:48,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629742339] [2019-12-07 19:23:48,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:48,862 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:48,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:48,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:48,862 INFO L87 Difference]: Start difference. First operand 15971 states and 48905 transitions. Second operand 4 states. [2019-12-07 19:23:48,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:48,942 INFO L93 Difference]: Finished difference Result 15819 states and 48264 transitions. [2019-12-07 19:23:48,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:23:48,942 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 19:23:48,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:48,958 INFO L225 Difference]: With dead ends: 15819 [2019-12-07 19:23:48,959 INFO L226 Difference]: Without dead ends: 15819 [2019-12-07 19:23:48,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:49,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15819 states. [2019-12-07 19:23:49,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15819 to 13902. [2019-12-07 19:23:49,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13902 states. [2019-12-07 19:23:49,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13902 states to 13902 states and 42439 transitions. [2019-12-07 19:23:49,174 INFO L78 Accepts]: Start accepts. Automaton has 13902 states and 42439 transitions. Word has length 67 [2019-12-07 19:23:49,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:49,175 INFO L462 AbstractCegarLoop]: Abstraction has 13902 states and 42439 transitions. [2019-12-07 19:23:49,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:49,175 INFO L276 IsEmpty]: Start isEmpty. Operand 13902 states and 42439 transitions. [2019-12-07 19:23:49,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:49,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:49,186 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:49,187 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:49,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:49,187 INFO L82 PathProgramCache]: Analyzing trace with hash 751511131, now seen corresponding path program 1 times [2019-12-07 19:23:49,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:49,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597078672] [2019-12-07 19:23:49,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:49,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:49,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:49,248 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597078672] [2019-12-07 19:23:49,248 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:49,248 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:23:49,248 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256689654] [2019-12-07 19:23:49,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:49,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:49,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:49,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:49,249 INFO L87 Difference]: Start difference. First operand 13902 states and 42439 transitions. Second operand 5 states. [2019-12-07 19:23:49,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:49,321 INFO L93 Difference]: Finished difference Result 24129 states and 73834 transitions. [2019-12-07 19:23:49,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:49,322 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 19:23:49,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:49,334 INFO L225 Difference]: With dead ends: 24129 [2019-12-07 19:23:49,334 INFO L226 Difference]: Without dead ends: 11243 [2019-12-07 19:23:49,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:23:49,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11243 states. [2019-12-07 19:23:49,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11243 to 11243. [2019-12-07 19:23:49,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11243 states. [2019-12-07 19:23:49,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11243 states to 11243 states and 34427 transitions. [2019-12-07 19:23:49,505 INFO L78 Accepts]: Start accepts. Automaton has 11243 states and 34427 transitions. Word has length 67 [2019-12-07 19:23:49,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:49,505 INFO L462 AbstractCegarLoop]: Abstraction has 11243 states and 34427 transitions. [2019-12-07 19:23:49,505 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:49,505 INFO L276 IsEmpty]: Start isEmpty. Operand 11243 states and 34427 transitions. [2019-12-07 19:23:49,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:49,515 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:49,515 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:49,515 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:49,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:49,515 INFO L82 PathProgramCache]: Analyzing trace with hash 691736411, now seen corresponding path program 2 times [2019-12-07 19:23:49,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:49,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [317263610] [2019-12-07 19:23:49,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:49,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:49,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:49,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [317263610] [2019-12-07 19:23:49,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:49,576 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:23:49,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [869189916] [2019-12-07 19:23:49,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:23:49,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:49,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:23:49,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:49,577 INFO L87 Difference]: Start difference. First operand 11243 states and 34427 transitions. Second operand 5 states. [2019-12-07 19:23:49,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:49,633 INFO L93 Difference]: Finished difference Result 19918 states and 61172 transitions. [2019-12-07 19:23:49,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:49,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 19:23:49,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:49,642 INFO L225 Difference]: With dead ends: 19918 [2019-12-07 19:23:49,642 INFO L226 Difference]: Without dead ends: 9508 [2019-12-07 19:23:49,642 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:23:49,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9508 states. [2019-12-07 19:23:49,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9508 to 9508. [2019-12-07 19:23:49,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9508 states. [2019-12-07 19:23:49,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9508 states to 9508 states and 29065 transitions. [2019-12-07 19:23:49,777 INFO L78 Accepts]: Start accepts. Automaton has 9508 states and 29065 transitions. Word has length 67 [2019-12-07 19:23:49,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:49,777 INFO L462 AbstractCegarLoop]: Abstraction has 9508 states and 29065 transitions. [2019-12-07 19:23:49,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:23:49,777 INFO L276 IsEmpty]: Start isEmpty. Operand 9508 states and 29065 transitions. [2019-12-07 19:23:49,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:49,784 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:49,784 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:49,784 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:49,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:49,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1197749059, now seen corresponding path program 3 times [2019-12-07 19:23:49,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:49,785 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356186626] [2019-12-07 19:23:49,785 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:49,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:49,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:49,974 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356186626] [2019-12-07 19:23:49,974 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:49,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:23:49,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [902131852] [2019-12-07 19:23:49,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:23:49,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:49,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:23:49,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:23:49,975 INFO L87 Difference]: Start difference. First operand 9508 states and 29065 transitions. Second operand 13 states. [2019-12-07 19:23:51,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:51,088 INFO L93 Difference]: Finished difference Result 18202 states and 54458 transitions. [2019-12-07 19:23:51,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 19:23:51,088 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 19:23:51,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:51,099 INFO L225 Difference]: With dead ends: 18202 [2019-12-07 19:23:51,099 INFO L226 Difference]: Without dead ends: 11979 [2019-12-07 19:23:51,100 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=136, Invalid=620, Unknown=0, NotChecked=0, Total=756 [2019-12-07 19:23:51,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11979 states. [2019-12-07 19:23:51,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11979 to 10575. [2019-12-07 19:23:51,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10575 states. [2019-12-07 19:23:51,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10575 states to 10575 states and 32125 transitions. [2019-12-07 19:23:51,256 INFO L78 Accepts]: Start accepts. Automaton has 10575 states and 32125 transitions. Word has length 67 [2019-12-07 19:23:51,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:51,256 INFO L462 AbstractCegarLoop]: Abstraction has 10575 states and 32125 transitions. [2019-12-07 19:23:51,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:23:51,256 INFO L276 IsEmpty]: Start isEmpty. Operand 10575 states and 32125 transitions. [2019-12-07 19:23:51,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:51,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:51,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:51,264 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:51,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:51,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1290130541, now seen corresponding path program 4 times [2019-12-07 19:23:51,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:51,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714673546] [2019-12-07 19:23:51,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:51,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:51,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:51,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714673546] [2019-12-07 19:23:51,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:51,447 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:23:51,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141355768] [2019-12-07 19:23:51,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:23:51,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:51,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:23:51,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:23:51,448 INFO L87 Difference]: Start difference. First operand 10575 states and 32125 transitions. Second operand 13 states. [2019-12-07 19:23:53,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:53,382 INFO L93 Difference]: Finished difference Result 17976 states and 53576 transitions. [2019-12-07 19:23:53,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 19:23:53,383 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 19:23:53,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:53,394 INFO L225 Difference]: With dead ends: 17976 [2019-12-07 19:23:53,394 INFO L226 Difference]: Without dead ends: 12810 [2019-12-07 19:23:53,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=223, Invalid=899, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 19:23:53,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12810 states. [2019-12-07 19:23:53,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12810 to 10793. [2019-12-07 19:23:53,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10793 states. [2019-12-07 19:23:53,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10793 states to 10793 states and 32695 transitions. [2019-12-07 19:23:53,551 INFO L78 Accepts]: Start accepts. Automaton has 10793 states and 32695 transitions. Word has length 67 [2019-12-07 19:23:53,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:53,551 INFO L462 AbstractCegarLoop]: Abstraction has 10793 states and 32695 transitions. [2019-12-07 19:23:53,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:23:53,552 INFO L276 IsEmpty]: Start isEmpty. Operand 10793 states and 32695 transitions. [2019-12-07 19:23:53,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:53,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:53,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:53,560 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:53,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:53,560 INFO L82 PathProgramCache]: Analyzing trace with hash 2078724657, now seen corresponding path program 5 times [2019-12-07 19:23:53,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:53,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671119692] [2019-12-07 19:23:53,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:53,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:53,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:53,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671119692] [2019-12-07 19:23:53,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:53,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:23:53,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [508767789] [2019-12-07 19:23:53,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:23:53,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:53,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:23:53,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:23:53,811 INFO L87 Difference]: Start difference. First operand 10793 states and 32695 transitions. Second operand 14 states. [2019-12-07 19:23:56,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:56,126 INFO L93 Difference]: Finished difference Result 16789 states and 49927 transitions. [2019-12-07 19:23:56,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 19:23:56,126 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 19:23:56,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:56,140 INFO L225 Difference]: With dead ends: 16789 [2019-12-07 19:23:56,140 INFO L226 Difference]: Without dead ends: 13820 [2019-12-07 19:23:56,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=161, Invalid=769, Unknown=0, NotChecked=0, Total=930 [2019-12-07 19:23:56,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13820 states. [2019-12-07 19:23:56,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13820 to 11167. [2019-12-07 19:23:56,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11167 states. [2019-12-07 19:23:56,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11167 states to 11167 states and 33648 transitions. [2019-12-07 19:23:56,314 INFO L78 Accepts]: Start accepts. Automaton has 11167 states and 33648 transitions. Word has length 67 [2019-12-07 19:23:56,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:56,314 INFO L462 AbstractCegarLoop]: Abstraction has 11167 states and 33648 transitions. [2019-12-07 19:23:56,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:23:56,314 INFO L276 IsEmpty]: Start isEmpty. Operand 11167 states and 33648 transitions. [2019-12-07 19:23:56,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:56,322 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:56,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:56,323 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:56,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:56,323 INFO L82 PathProgramCache]: Analyzing trace with hash 888958687, now seen corresponding path program 6 times [2019-12-07 19:23:56,323 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:56,323 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243680128] [2019-12-07 19:23:56,323 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:56,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:56,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:56,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243680128] [2019-12-07 19:23:56,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:56,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:23:56,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078965327] [2019-12-07 19:23:56,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:23:56,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:56,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:23:56,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:23:56,561 INFO L87 Difference]: Start difference. First operand 11167 states and 33648 transitions. Second operand 14 states. [2019-12-07 19:23:58,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:58,170 INFO L93 Difference]: Finished difference Result 20965 states and 61846 transitions. [2019-12-07 19:23:58,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 19:23:58,170 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 19:23:58,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:58,185 INFO L225 Difference]: With dead ends: 20965 [2019-12-07 19:23:58,185 INFO L226 Difference]: Without dead ends: 15596 [2019-12-07 19:23:58,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 477 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=291, Invalid=1515, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 19:23:58,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15596 states. [2019-12-07 19:23:58,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15596 to 11308. [2019-12-07 19:23:58,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11308 states. [2019-12-07 19:23:58,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11308 states to 11308 states and 33901 transitions. [2019-12-07 19:23:58,370 INFO L78 Accepts]: Start accepts. Automaton has 11308 states and 33901 transitions. Word has length 67 [2019-12-07 19:23:58,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:58,370 INFO L462 AbstractCegarLoop]: Abstraction has 11308 states and 33901 transitions. [2019-12-07 19:23:58,370 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:23:58,370 INFO L276 IsEmpty]: Start isEmpty. Operand 11308 states and 33901 transitions. [2019-12-07 19:23:58,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:23:58,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:58,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:58,379 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:58,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:58,380 INFO L82 PathProgramCache]: Analyzing trace with hash 721495091, now seen corresponding path program 7 times [2019-12-07 19:23:58,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:58,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479056408] [2019-12-07 19:23:58,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:58,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:58,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:58,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479056408] [2019-12-07 19:23:58,643 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:58,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:23:58,643 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728908863] [2019-12-07 19:23:58,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:23:58,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:58,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:23:58,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:23:58,644 INFO L87 Difference]: Start difference. First operand 11308 states and 33901 transitions. Second operand 14 states. [2019-12-07 19:24:00,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:00,623 INFO L93 Difference]: Finished difference Result 15810 states and 46769 transitions. [2019-12-07 19:24:00,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 19:24:00,624 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 19:24:00,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:00,651 INFO L225 Difference]: With dead ends: 15810 [2019-12-07 19:24:00,651 INFO L226 Difference]: Without dead ends: 15027 [2019-12-07 19:24:00,652 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 480 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=303, Invalid=1677, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 19:24:00,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15027 states. [2019-12-07 19:24:00,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15027 to 13012. [2019-12-07 19:24:00,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13012 states. [2019-12-07 19:24:00,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13012 states to 13012 states and 38801 transitions. [2019-12-07 19:24:00,856 INFO L78 Accepts]: Start accepts. Automaton has 13012 states and 38801 transitions. Word has length 67 [2019-12-07 19:24:00,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:00,856 INFO L462 AbstractCegarLoop]: Abstraction has 13012 states and 38801 transitions. [2019-12-07 19:24:00,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:24:00,856 INFO L276 IsEmpty]: Start isEmpty. Operand 13012 states and 38801 transitions. [2019-12-07 19:24:00,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:00,868 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:00,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:00,868 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:00,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:00,868 INFO L82 PathProgramCache]: Analyzing trace with hash 957967249, now seen corresponding path program 8 times [2019-12-07 19:24:00,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:00,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130086136] [2019-12-07 19:24:00,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:00,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:01,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:01,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130086136] [2019-12-07 19:24:01,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:01,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:24:01,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459356387] [2019-12-07 19:24:01,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:24:01,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:01,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:24:01,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=146, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:24:01,110 INFO L87 Difference]: Start difference. First operand 13012 states and 38801 transitions. Second operand 14 states. [2019-12-07 19:24:02,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:02,803 INFO L93 Difference]: Finished difference Result 15354 states and 45165 transitions. [2019-12-07 19:24:02,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 19:24:02,804 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2019-12-07 19:24:02,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:02,828 INFO L225 Difference]: With dead ends: 15354 [2019-12-07 19:24:02,828 INFO L226 Difference]: Without dead ends: 13459 [2019-12-07 19:24:02,829 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 425 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=303, Invalid=1503, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 19:24:02,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13459 states. [2019-12-07 19:24:02,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13459 to 11532. [2019-12-07 19:24:02,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11532 states. [2019-12-07 19:24:03,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11532 states to 11532 states and 34408 transitions. [2019-12-07 19:24:03,006 INFO L78 Accepts]: Start accepts. Automaton has 11532 states and 34408 transitions. Word has length 67 [2019-12-07 19:24:03,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:03,006 INFO L462 AbstractCegarLoop]: Abstraction has 11532 states and 34408 transitions. [2019-12-07 19:24:03,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:24:03,006 INFO L276 IsEmpty]: Start isEmpty. Operand 11532 states and 34408 transitions. [2019-12-07 19:24:03,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:03,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:03,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:03,016 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:03,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:03,016 INFO L82 PathProgramCache]: Analyzing trace with hash -468270879, now seen corresponding path program 9 times [2019-12-07 19:24:03,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:03,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280124252] [2019-12-07 19:24:03,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:03,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:03,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:03,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280124252] [2019-12-07 19:24:03,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:03,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:24:03,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837395546] [2019-12-07 19:24:03,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:24:03,276 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:03,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:24:03,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:24:03,277 INFO L87 Difference]: Start difference. First operand 11532 states and 34408 transitions. Second operand 15 states. [2019-12-07 19:24:05,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:05,781 INFO L93 Difference]: Finished difference Result 17123 states and 50593 transitions. [2019-12-07 19:24:05,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 19:24:05,782 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:24:05,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:05,810 INFO L225 Difference]: With dead ends: 17123 [2019-12-07 19:24:05,810 INFO L226 Difference]: Without dead ends: 16080 [2019-12-07 19:24:05,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 761 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=420, Invalid=2442, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 19:24:05,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16080 states. [2019-12-07 19:24:06,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16080 to 12881. [2019-12-07 19:24:06,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12881 states. [2019-12-07 19:24:06,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12881 states to 12881 states and 38495 transitions. [2019-12-07 19:24:06,022 INFO L78 Accepts]: Start accepts. Automaton has 12881 states and 38495 transitions. Word has length 67 [2019-12-07 19:24:06,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:06,022 INFO L462 AbstractCegarLoop]: Abstraction has 12881 states and 38495 transitions. [2019-12-07 19:24:06,022 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:24:06,022 INFO L276 IsEmpty]: Start isEmpty. Operand 12881 states and 38495 transitions. [2019-12-07 19:24:06,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:06,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:06,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:06,034 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:06,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:06,034 INFO L82 PathProgramCache]: Analyzing trace with hash -231798721, now seen corresponding path program 10 times [2019-12-07 19:24:06,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:06,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930379039] [2019-12-07 19:24:06,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:06,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:06,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:06,317 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930379039] [2019-12-07 19:24:06,317 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:06,317 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:24:06,317 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1438726380] [2019-12-07 19:24:06,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:24:06,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:06,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:24:06,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:24:06,318 INFO L87 Difference]: Start difference. First operand 12881 states and 38495 transitions. Second operand 15 states. [2019-12-07 19:24:10,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:10,291 INFO L93 Difference]: Finished difference Result 16545 states and 48463 transitions. [2019-12-07 19:24:10,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 19:24:10,291 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:24:10,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:10,309 INFO L225 Difference]: With dead ends: 16545 [2019-12-07 19:24:10,309 INFO L226 Difference]: Without dead ends: 14418 [2019-12-07 19:24:10,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 690 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=425, Invalid=2227, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 19:24:10,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14418 states. [2019-12-07 19:24:10,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14418 to 11120. [2019-12-07 19:24:10,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11120 states. [2019-12-07 19:24:10,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11120 states to 11120 states and 33371 transitions. [2019-12-07 19:24:10,491 INFO L78 Accepts]: Start accepts. Automaton has 11120 states and 33371 transitions. Word has length 67 [2019-12-07 19:24:10,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:10,491 INFO L462 AbstractCegarLoop]: Abstraction has 11120 states and 33371 transitions. [2019-12-07 19:24:10,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:24:10,491 INFO L276 IsEmpty]: Start isEmpty. Operand 11120 states and 33371 transitions. [2019-12-07 19:24:10,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:10,500 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:10,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:10,500 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:10,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:10,501 INFO L82 PathProgramCache]: Analyzing trace with hash 88464887, now seen corresponding path program 11 times [2019-12-07 19:24:10,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:10,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603064253] [2019-12-07 19:24:10,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:10,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:10,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:10,940 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1603064253] [2019-12-07 19:24:10,940 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:10,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 19:24:10,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873492137] [2019-12-07 19:24:10,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 19:24:10,941 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:10,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 19:24:10,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2019-12-07 19:24:10,941 INFO L87 Difference]: Start difference. First operand 11120 states and 33371 transitions. Second operand 19 states. [2019-12-07 19:24:13,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:13,106 INFO L93 Difference]: Finished difference Result 17365 states and 51277 transitions. [2019-12-07 19:24:13,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 19:24:13,106 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 19:24:13,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:13,120 INFO L225 Difference]: With dead ends: 17365 [2019-12-07 19:24:13,120 INFO L226 Difference]: Without dead ends: 14388 [2019-12-07 19:24:13,121 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=305, Invalid=1857, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 19:24:13,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14388 states. [2019-12-07 19:24:13,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14388 to 11300. [2019-12-07 19:24:13,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11300 states. [2019-12-07 19:24:13,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11300 states to 11300 states and 33821 transitions. [2019-12-07 19:24:13,299 INFO L78 Accepts]: Start accepts. Automaton has 11300 states and 33821 transitions. Word has length 67 [2019-12-07 19:24:13,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:13,300 INFO L462 AbstractCegarLoop]: Abstraction has 11300 states and 33821 transitions. [2019-12-07 19:24:13,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 19:24:13,300 INFO L276 IsEmpty]: Start isEmpty. Operand 11300 states and 33821 transitions. [2019-12-07 19:24:13,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:13,309 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:13,309 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:13,309 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:13,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:13,309 INFO L82 PathProgramCache]: Analyzing trace with hash 575406353, now seen corresponding path program 12 times [2019-12-07 19:24:13,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:13,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078960948] [2019-12-07 19:24:13,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:13,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:13,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:13,605 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078960948] [2019-12-07 19:24:13,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:13,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 19:24:13,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989766948] [2019-12-07 19:24:13,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 19:24:13,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:13,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 19:24:13,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:24:13,607 INFO L87 Difference]: Start difference. First operand 11300 states and 33821 transitions. Second operand 16 states. [2019-12-07 19:24:16,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:16,134 INFO L93 Difference]: Finished difference Result 16264 states and 48069 transitions. [2019-12-07 19:24:16,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 19:24:16,134 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 19:24:16,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:16,152 INFO L225 Difference]: With dead ends: 16264 [2019-12-07 19:24:16,153 INFO L226 Difference]: Without dead ends: 15497 [2019-12-07 19:24:16,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 640 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=384, Invalid=2166, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 19:24:16,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15497 states. [2019-12-07 19:24:16,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15497 to 12522. [2019-12-07 19:24:16,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12522 states. [2019-12-07 19:24:16,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12522 states to 12522 states and 37363 transitions. [2019-12-07 19:24:16,354 INFO L78 Accepts]: Start accepts. Automaton has 12522 states and 37363 transitions. Word has length 67 [2019-12-07 19:24:16,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:16,354 INFO L462 AbstractCegarLoop]: Abstraction has 12522 states and 37363 transitions. [2019-12-07 19:24:16,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 19:24:16,355 INFO L276 IsEmpty]: Start isEmpty. Operand 12522 states and 37363 transitions. [2019-12-07 19:24:16,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:16,365 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:16,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:16,366 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:16,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:16,366 INFO L82 PathProgramCache]: Analyzing trace with hash -600013973, now seen corresponding path program 13 times [2019-12-07 19:24:16,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:16,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138988551] [2019-12-07 19:24:16,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:16,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:16,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:16,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138988551] [2019-12-07 19:24:16,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:16,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 19:24:16,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98020086] [2019-12-07 19:24:16,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 19:24:16,657 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:16,657 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 19:24:16,657 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:24:16,657 INFO L87 Difference]: Start difference. First operand 12522 states and 37363 transitions. Second operand 16 states. [2019-12-07 19:24:20,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:20,133 INFO L93 Difference]: Finished difference Result 15967 states and 46804 transitions. [2019-12-07 19:24:20,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 19:24:20,134 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 19:24:20,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:20,160 INFO L225 Difference]: With dead ends: 15967 [2019-12-07 19:24:20,160 INFO L226 Difference]: Without dead ends: 14354 [2019-12-07 19:24:20,162 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=390, Invalid=1866, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 19:24:20,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14354 states. [2019-12-07 19:24:20,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14354 to 11180. [2019-12-07 19:24:20,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11180 states. [2019-12-07 19:24:20,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11180 states to 11180 states and 33517 transitions. [2019-12-07 19:24:20,340 INFO L78 Accepts]: Start accepts. Automaton has 11180 states and 33517 transitions. Word has length 67 [2019-12-07 19:24:20,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:20,340 INFO L462 AbstractCegarLoop]: Abstraction has 11180 states and 33517 transitions. [2019-12-07 19:24:20,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 19:24:20,340 INFO L276 IsEmpty]: Start isEmpty. Operand 11180 states and 33517 transitions. [2019-12-07 19:24:20,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:20,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:20,349 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:20,349 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:20,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:20,349 INFO L82 PathProgramCache]: Analyzing trace with hash 1699444991, now seen corresponding path program 14 times [2019-12-07 19:24:20,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:20,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [720763332] [2019-12-07 19:24:20,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:20,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:20,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:20,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [720763332] [2019-12-07 19:24:20,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:20,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:24:20,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582932527] [2019-12-07 19:24:20,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:24:20,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:20,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:24:20,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:24:20,629 INFO L87 Difference]: Start difference. First operand 11180 states and 33517 transitions. Second operand 15 states. [2019-12-07 19:24:22,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:22,233 INFO L93 Difference]: Finished difference Result 15023 states and 44376 transitions. [2019-12-07 19:24:22,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 19:24:22,234 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:24:22,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:22,246 INFO L225 Difference]: With dead ends: 15023 [2019-12-07 19:24:22,247 INFO L226 Difference]: Without dead ends: 13186 [2019-12-07 19:24:22,247 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 332 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=235, Invalid=1171, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 19:24:22,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13186 states. [2019-12-07 19:24:22,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13186 to 11188. [2019-12-07 19:24:22,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11188 states. [2019-12-07 19:24:22,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11188 states to 11188 states and 33539 transitions. [2019-12-07 19:24:22,438 INFO L78 Accepts]: Start accepts. Automaton has 11188 states and 33539 transitions. Word has length 67 [2019-12-07 19:24:22,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:22,439 INFO L462 AbstractCegarLoop]: Abstraction has 11188 states and 33539 transitions. [2019-12-07 19:24:22,439 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:24:22,439 INFO L276 IsEmpty]: Start isEmpty. Operand 11188 states and 33539 transitions. [2019-12-07 19:24:22,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:22,447 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:22,447 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:22,447 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:22,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:22,448 INFO L82 PathProgramCache]: Analyzing trace with hash 245620469, now seen corresponding path program 15 times [2019-12-07 19:24:22,448 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:22,448 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977160186] [2019-12-07 19:24:22,448 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:22,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:22,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:22,710 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977160186] [2019-12-07 19:24:22,710 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:22,710 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 19:24:22,710 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1270905554] [2019-12-07 19:24:22,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 19:24:22,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:22,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 19:24:22,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=198, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:24:22,711 INFO L87 Difference]: Start difference. First operand 11188 states and 33539 transitions. Second operand 16 states. [2019-12-07 19:24:25,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:25,230 INFO L93 Difference]: Finished difference Result 15535 states and 45824 transitions. [2019-12-07 19:24:25,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 19:24:25,231 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 19:24:25,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:25,245 INFO L225 Difference]: With dead ends: 15535 [2019-12-07 19:24:25,245 INFO L226 Difference]: Without dead ends: 13196 [2019-12-07 19:24:25,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=224, Invalid=1182, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 19:24:25,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13196 states. [2019-12-07 19:24:25,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13196 to 11248. [2019-12-07 19:24:25,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11248 states. [2019-12-07 19:24:25,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11248 states to 11248 states and 33669 transitions. [2019-12-07 19:24:25,419 INFO L78 Accepts]: Start accepts. Automaton has 11248 states and 33669 transitions. Word has length 67 [2019-12-07 19:24:25,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:25,419 INFO L462 AbstractCegarLoop]: Abstraction has 11248 states and 33669 transitions. [2019-12-07 19:24:25,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 19:24:25,420 INFO L276 IsEmpty]: Start isEmpty. Operand 11248 states and 33669 transitions. [2019-12-07 19:24:25,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:25,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:25,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:25,428 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:25,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:25,428 INFO L82 PathProgramCache]: Analyzing trace with hash -792145539, now seen corresponding path program 16 times [2019-12-07 19:24:25,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:25,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [743241135] [2019-12-07 19:24:25,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:25,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:25,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:25,978 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [743241135] [2019-12-07 19:24:25,978 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:25,978 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 19:24:25,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [694299094] [2019-12-07 19:24:25,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 19:24:25,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:25,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 19:24:25,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:24:25,980 INFO L87 Difference]: Start difference. First operand 11248 states and 33669 transitions. Second operand 17 states. [2019-12-07 19:24:30,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:30,647 INFO L93 Difference]: Finished difference Result 16351 states and 47969 transitions. [2019-12-07 19:24:30,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 19:24:30,648 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 19:24:30,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:30,676 INFO L225 Difference]: With dead ends: 16351 [2019-12-07 19:24:30,676 INFO L226 Difference]: Without dead ends: 14042 [2019-12-07 19:24:30,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 483 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=347, Invalid=1545, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 19:24:30,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14042 states. [2019-12-07 19:24:30,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14042 to 11320. [2019-12-07 19:24:30,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11320 states. [2019-12-07 19:24:30,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11320 states to 11320 states and 33865 transitions. [2019-12-07 19:24:30,859 INFO L78 Accepts]: Start accepts. Automaton has 11320 states and 33865 transitions. Word has length 67 [2019-12-07 19:24:30,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:30,859 INFO L462 AbstractCegarLoop]: Abstraction has 11320 states and 33865 transitions. [2019-12-07 19:24:30,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 19:24:30,859 INFO L276 IsEmpty]: Start isEmpty. Operand 11320 states and 33865 transitions. [2019-12-07 19:24:30,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:30,869 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:30,869 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:30,869 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:30,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:30,869 INFO L82 PathProgramCache]: Analyzing trace with hash -135396041, now seen corresponding path program 17 times [2019-12-07 19:24:30,869 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:30,869 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1589674583] [2019-12-07 19:24:30,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:30,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:31,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:31,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1589674583] [2019-12-07 19:24:31,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:31,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:24:31,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375654530] [2019-12-07 19:24:31,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:24:31,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:31,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:24:31,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:24:31,003 INFO L87 Difference]: Start difference. First operand 11320 states and 33865 transitions. Second operand 11 states. [2019-12-07 19:24:31,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:31,702 INFO L93 Difference]: Finished difference Result 19829 states and 59153 transitions. [2019-12-07 19:24:31,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 19:24:31,703 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:24:31,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:31,729 INFO L225 Difference]: With dead ends: 19829 [2019-12-07 19:24:31,729 INFO L226 Difference]: Without dead ends: 17466 [2019-12-07 19:24:31,730 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=709, Unknown=0, NotChecked=0, Total=870 [2019-12-07 19:24:31,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17466 states. [2019-12-07 19:24:31,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17466 to 15122. [2019-12-07 19:24:31,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15122 states. [2019-12-07 19:24:31,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15122 states to 15122 states and 45480 transitions. [2019-12-07 19:24:31,974 INFO L78 Accepts]: Start accepts. Automaton has 15122 states and 45480 transitions. Word has length 67 [2019-12-07 19:24:31,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:31,974 INFO L462 AbstractCegarLoop]: Abstraction has 15122 states and 45480 transitions. [2019-12-07 19:24:31,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:24:31,975 INFO L276 IsEmpty]: Start isEmpty. Operand 15122 states and 45480 transitions. [2019-12-07 19:24:31,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:31,987 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:31,987 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:31,988 INFO L410 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:31,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:31,988 INFO L82 PathProgramCache]: Analyzing trace with hash 101076117, now seen corresponding path program 18 times [2019-12-07 19:24:31,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:31,988 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065970563] [2019-12-07 19:24:31,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:31,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:32,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:32,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065970563] [2019-12-07 19:24:32,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:32,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:24:32,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951419946] [2019-12-07 19:24:32,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:24:32,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:32,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:24:32,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:24:32,079 INFO L87 Difference]: Start difference. First operand 15122 states and 45480 transitions. Second operand 11 states. [2019-12-07 19:24:32,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:32,472 INFO L93 Difference]: Finished difference Result 17768 states and 52465 transitions. [2019-12-07 19:24:32,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 19:24:32,472 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:24:32,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:32,486 INFO L225 Difference]: With dead ends: 17768 [2019-12-07 19:24:32,486 INFO L226 Difference]: Without dead ends: 13610 [2019-12-07 19:24:32,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=122, Invalid=478, Unknown=0, NotChecked=0, Total=600 [2019-12-07 19:24:32,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13610 states. [2019-12-07 19:24:32,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13610 to 11391. [2019-12-07 19:24:32,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11391 states. [2019-12-07 19:24:32,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11391 states to 11391 states and 33908 transitions. [2019-12-07 19:24:32,666 INFO L78 Accepts]: Start accepts. Automaton has 11391 states and 33908 transitions. Word has length 67 [2019-12-07 19:24:32,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:32,666 INFO L462 AbstractCegarLoop]: Abstraction has 11391 states and 33908 transitions. [2019-12-07 19:24:32,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:24:32,666 INFO L276 IsEmpty]: Start isEmpty. Operand 11391 states and 33908 transitions. [2019-12-07 19:24:32,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:32,675 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:32,676 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:32,676 INFO L410 AbstractCegarLoop]: === Iteration 44 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:32,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:32,676 INFO L82 PathProgramCache]: Analyzing trace with hash -962576569, now seen corresponding path program 19 times [2019-12-07 19:24:32,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:32,676 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2136968515] [2019-12-07 19:24:32,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:32,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:32,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:32,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2136968515] [2019-12-07 19:24:32,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:32,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:24:32,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [105121819] [2019-12-07 19:24:32,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:24:32,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:32,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:24:32,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:24:32,811 INFO L87 Difference]: Start difference. First operand 11391 states and 33908 transitions. Second operand 11 states. [2019-12-07 19:24:33,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:33,803 INFO L93 Difference]: Finished difference Result 14126 states and 41021 transitions. [2019-12-07 19:24:33,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:24:33,804 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:24:33,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:33,827 INFO L225 Difference]: With dead ends: 14126 [2019-12-07 19:24:33,827 INFO L226 Difference]: Without dead ends: 13287 [2019-12-07 19:24:33,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=76, Invalid=344, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:24:33,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13287 states. [2019-12-07 19:24:33,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13287 to 11101. [2019-12-07 19:24:33,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11101 states. [2019-12-07 19:24:34,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11101 states to 11101 states and 33108 transitions. [2019-12-07 19:24:34,004 INFO L78 Accepts]: Start accepts. Automaton has 11101 states and 33108 transitions. Word has length 67 [2019-12-07 19:24:34,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:34,004 INFO L462 AbstractCegarLoop]: Abstraction has 11101 states and 33108 transitions. [2019-12-07 19:24:34,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:24:34,004 INFO L276 IsEmpty]: Start isEmpty. Operand 11101 states and 33108 transitions. [2019-12-07 19:24:34,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:34,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:34,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:34,013 INFO L410 AbstractCegarLoop]: === Iteration 45 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:34,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:34,014 INFO L82 PathProgramCache]: Analyzing trace with hash 764043865, now seen corresponding path program 20 times [2019-12-07 19:24:34,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:34,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924963638] [2019-12-07 19:24:34,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:34,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:34,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:34,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924963638] [2019-12-07 19:24:34,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:34,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:24:34,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124243529] [2019-12-07 19:24:34,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:24:34,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:34,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:24:34,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:24:34,132 INFO L87 Difference]: Start difference. First operand 11101 states and 33108 transitions. Second operand 11 states. [2019-12-07 19:24:35,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:35,455 INFO L93 Difference]: Finished difference Result 13467 states and 39401 transitions. [2019-12-07 19:24:35,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 19:24:35,455 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 19:24:35,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:35,473 INFO L225 Difference]: With dead ends: 13467 [2019-12-07 19:24:35,473 INFO L226 Difference]: Without dead ends: 13252 [2019-12-07 19:24:35,473 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=347, Unknown=0, NotChecked=0, Total=420 [2019-12-07 19:24:35,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13252 states. [2019-12-07 19:24:35,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13252 to 10997. [2019-12-07 19:24:35,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10997 states. [2019-12-07 19:24:35,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10997 states to 10997 states and 32834 transitions. [2019-12-07 19:24:35,646 INFO L78 Accepts]: Start accepts. Automaton has 10997 states and 32834 transitions. Word has length 67 [2019-12-07 19:24:35,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:35,646 INFO L462 AbstractCegarLoop]: Abstraction has 10997 states and 32834 transitions. [2019-12-07 19:24:35,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:24:35,646 INFO L276 IsEmpty]: Start isEmpty. Operand 10997 states and 32834 transitions. [2019-12-07 19:24:35,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:24:35,655 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:35,655 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:35,655 INFO L410 AbstractCegarLoop]: === Iteration 46 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:35,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:35,655 INFO L82 PathProgramCache]: Analyzing trace with hash -494782975, now seen corresponding path program 21 times [2019-12-07 19:24:35,655 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:35,655 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308015328] [2019-12-07 19:24:35,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:35,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:24:35,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:24:35,728 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:24:35,728 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:24:35,731 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~weak$$choice0~0_10) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_ULTIMATE.start_main_~#t403~0.offset_22| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t403~0.base_29| 4)) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t403~0.base_29|) (= v_~y~0_79 0) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t403~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t403~0.base_29|) |v_ULTIMATE.start_main_~#t403~0.offset_22| 0)) |v_#memory_int_21|) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t403~0.base_29|)) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t403~0.base_29| 1)) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t405~0.offset=|v_ULTIMATE.start_main_~#t405~0.offset_15|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t405~0.base=|v_ULTIMATE.start_main_~#t405~0.base_17|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_~#t404~0.base=|v_ULTIMATE.start_main_~#t404~0.base_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ULTIMATE.start_main_~#t403~0.base=|v_ULTIMATE.start_main_~#t403~0.base_29|, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t404~0.offset=|v_ULTIMATE.start_main_~#t404~0.offset_22|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t403~0.offset=|v_ULTIMATE.start_main_~#t403~0.offset_22|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t405~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t405~0.base, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t404~0.base, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t403~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t404~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t403~0.offset, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 19:24:35,731 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t404~0.base_12| 4)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t404~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t404~0.base_12|) |v_ULTIMATE.start_main_~#t404~0.offset_10| 1))) (not (= |v_ULTIMATE.start_main_~#t404~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t404~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t404~0.base_12|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t404~0.base_12| 1) |v_#valid_34|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t404~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t404~0.offset=|v_ULTIMATE.start_main_~#t404~0.offset_10|, ULTIMATE.start_main_~#t404~0.base=|v_ULTIMATE.start_main_~#t404~0.base_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t404~0.offset, ULTIMATE.start_main_~#t404~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 19:24:35,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t405~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t405~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t405~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t405~0.base_13|) 0) (= 0 |v_ULTIMATE.start_main_~#t405~0.offset_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t405~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t405~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t405~0.base_13|) |v_ULTIMATE.start_main_~#t405~0.offset_11| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t405~0.offset=|v_ULTIMATE.start_main_~#t405~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t405~0.base=|v_ULTIMATE.start_main_~#t405~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t405~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t405~0.base] because there is no mapped edge [2019-12-07 19:24:35,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~a$r_buff0_thd2~0_In-25299357 ~a$r_buff1_thd2~0_Out-25299357) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357 0)) (= ~a$r_buff1_thd3~0_Out-25299357 ~a$r_buff0_thd3~0_In-25299357) (= ~a$r_buff1_thd1~0_Out-25299357 ~a$r_buff0_thd1~0_In-25299357) (= ~a$r_buff0_thd1~0_Out-25299357 1) (= ~__unbuffered_p0_EBX~0_Out-25299357 ~y~0_In-25299357) (= 1 ~x~0_Out-25299357) (= ~__unbuffered_p0_EAX~0_Out-25299357 ~x~0_Out-25299357) (= ~a$r_buff0_thd0~0_In-25299357 ~a$r_buff1_thd0~0_Out-25299357)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-25299357, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-25299357, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-25299357, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-25299357, ~y~0=~y~0_In-25299357} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out-25299357, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-25299357, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-25299357, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-25299357, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-25299357, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-25299357, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-25299357, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-25299357, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-25299357, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-25299357, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357, ~y~0=~y~0_In-25299357, ~x~0=~x~0_Out-25299357} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 19:24:35,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In66964350 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In66964350 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out66964350|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In66964350 |P0Thread1of1ForFork1_#t~ite5_Out66964350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In66964350, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In66964350} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out66964350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In66964350, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In66964350} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:24:35,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1696563118 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1696563118 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1696563118 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1696563118 256)))) (or (and (= ~a$w_buff1_used~0_In1696563118 |P0Thread1of1ForFork1_#t~ite6_Out1696563118|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1696563118|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1696563118, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1696563118, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1696563118, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1696563118} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1696563118|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1696563118, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1696563118, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1696563118, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1696563118} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:24:35,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1483486921 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1483486921 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1483486921| ~a~0_In1483486921) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1483486921| ~a$w_buff1~0_In1483486921) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1483486921, ~a$w_buff1~0=~a$w_buff1~0_In1483486921, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921} OutVars{~a~0=~a~0_In1483486921, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1483486921|, ~a$w_buff1~0=~a$w_buff1~0_In1483486921, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 19:24:35,735 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:24:35,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_Out745827753 ~a$r_buff0_thd1~0_In745827753)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In745827753 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In745827753 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out745827753 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In745827753, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In745827753} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out745827753|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In745827753, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out745827753} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:24:35,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1188056702 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1188056702 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1188056702 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1188056702 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1188056702| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1188056702| ~a$r_buff1_thd1~0_In1188056702) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1188056702, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1188056702, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1188056702, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188056702} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1188056702|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1188056702, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1188056702, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1188056702, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188056702} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:24:35,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:24:35,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1334245686 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1334245686 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1334245686| ~a$w_buff0_used~0_In1334245686) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1334245686| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1334245686, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1334245686} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1334245686, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1334245686, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1334245686|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:24:35,736 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In626108136 256) 0))) (or (and (= ~a$w_buff0~0_In626108136 |P2Thread1of1ForFork0_#t~ite21_Out626108136|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In626108136| |P2Thread1of1ForFork0_#t~ite20_Out626108136|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out626108136| |P2Thread1of1ForFork0_#t~ite20_Out626108136|) (= ~a$w_buff0~0_In626108136 |P2Thread1of1ForFork0_#t~ite20_Out626108136|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In626108136 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In626108136 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In626108136 256) 0)) (and (= (mod ~a$w_buff1_used~0_In626108136 256) 0) .cse1))) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In626108136, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In626108136, ~a$w_buff0_used~0=~a$w_buff0_used~0_In626108136, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In626108136, ~a$w_buff1_used~0=~a$w_buff1_used~0_In626108136, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In626108136|, ~weak$$choice2~0=~weak$$choice2~0_In626108136} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out626108136|, ~a$w_buff0~0=~a$w_buff0~0_In626108136, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In626108136, ~a$w_buff0_used~0=~a$w_buff0_used~0_In626108136, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In626108136, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out626108136|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In626108136, ~weak$$choice2~0=~weak$$choice2~0_In626108136} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:24:35,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1381604240 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out1381604240| |P2Thread1of1ForFork0_#t~ite24_Out1381604240|) (= |P2Thread1of1ForFork0_#t~ite23_Out1381604240| ~a$w_buff1~0_In1381604240) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1381604240 256)))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1381604240 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In1381604240 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1381604240 256))))) (and (not .cse0) (= ~a$w_buff1~0_In1381604240 |P2Thread1of1ForFork0_#t~ite24_Out1381604240|) (= |P2Thread1of1ForFork0_#t~ite23_In1381604240| |P2Thread1of1ForFork0_#t~ite23_Out1381604240|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In1381604240, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1381604240|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1381604240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1381604240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1381604240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1381604240, ~weak$$choice2~0=~weak$$choice2~0_In1381604240} OutVars{~a$w_buff1~0=~a$w_buff1~0_In1381604240, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1381604240|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1381604240|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1381604240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1381604240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1381604240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1381604240, ~weak$$choice2~0=~weak$$choice2~0_In1381604240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:24:35,737 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2114917028 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out2114917028| ~a$w_buff0_used~0_In2114917028) (= |P2Thread1of1ForFork0_#t~ite26_In2114917028| |P2Thread1of1ForFork0_#t~ite26_Out2114917028|)) (and .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2114917028 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In2114917028 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In2114917028 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In2114917028 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite26_Out2114917028| |P2Thread1of1ForFork0_#t~ite27_Out2114917028|) (= |P2Thread1of1ForFork0_#t~ite26_Out2114917028| ~a$w_buff0_used~0_In2114917028)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2114917028|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114917028, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114917028, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114917028, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114917028, ~weak$$choice2~0=~weak$$choice2~0_In2114917028} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2114917028|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2114917028|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114917028, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114917028, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114917028, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114917028, ~weak$$choice2~0=~weak$$choice2~0_In2114917028} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 19:24:35,738 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:24:35,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 19:24:35,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1868177639 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1868177639 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1868177639 |P2Thread1of1ForFork0_#t~ite38_Out-1868177639|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1868177639| ~a$w_buff1~0_In-1868177639) (not .cse1)))) InVars {~a~0=~a~0_In-1868177639, ~a$w_buff1~0=~a$w_buff1~0_In-1868177639, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1868177639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1868177639} OutVars{~a~0=~a~0_In-1868177639, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1868177639|, ~a$w_buff1~0=~a$w_buff1~0_In-1868177639, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1868177639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1868177639} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:24:35,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:24:35,739 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1676235401 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1676235401 256)))) (or (and (= ~a$w_buff0_used~0_In1676235401 |P2Thread1of1ForFork0_#t~ite40_Out1676235401|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1676235401|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1676235401, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1676235401} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1676235401|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1676235401, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1676235401} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:24:35,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In2134191769 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In2134191769 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In2134191769 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In2134191769 256) 0))) (or (and (= ~a$w_buff1_used~0_In2134191769 |P2Thread1of1ForFork0_#t~ite41_Out2134191769|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out2134191769|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2134191769, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2134191769} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2134191769, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2134191769, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2134191769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:24:35,740 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-200448399 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-200448399 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-200448399| ~a$r_buff0_thd3~0_In-200448399)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-200448399| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-200448399, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-200448399} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-200448399, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-200448399, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-200448399|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:24:35,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out-2128766623| ~a$r_buff1_thd3~0_In-2128766623) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-2128766623| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-2128766623|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:24:35,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In827850325 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In827850325 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In827850325 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In827850325 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out827850325|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In827850325 |P1Thread1of1ForFork2_#t~ite12_Out827850325|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In827850325, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In827850325, ~a$w_buff0_used~0=~a$w_buff0_used~0_In827850325, ~a$w_buff1_used~0=~a$w_buff1_used~0_In827850325} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In827850325, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In827850325, ~a$w_buff0_used~0=~a$w_buff0_used~0_In827850325, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out827850325|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In827850325} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:24:35,741 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1240431919 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1240431919 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-1240431919 |P1Thread1of1ForFork2_#t~ite13_Out-1240431919|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-1240431919|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1240431919, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1240431919} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1240431919, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1240431919, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1240431919|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:24:35,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1738903323 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-1738903323 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1738903323 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1738903323 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-1738903323| ~a$r_buff1_thd2~0_In-1738903323)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1738903323| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1738903323, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1738903323, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1738903323, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1738903323} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1738903323, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1738903323, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1738903323, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1738903323, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1738903323|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:24:35,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:24:35,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:24:35,742 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:24:35,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In343737774 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In343737774 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out343737774| ~a$w_buff1~0_In343737774) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In343737774 |ULTIMATE.start_main_#t~ite47_Out343737774|)))) InVars {~a~0=~a~0_In343737774, ~a$w_buff1~0=~a$w_buff1~0_In343737774, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774} OutVars{~a~0=~a~0_In343737774, ~a$w_buff1~0=~a$w_buff1~0_In343737774, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out343737774|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:24:35,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:24:35,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In2038478849 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In2038478849 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2038478849| ~a$w_buff0_used~0_In2038478849) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out2038478849| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2038478849} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2038478849|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2038478849} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:24:35,743 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-153703239 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-153703239 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-153703239 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-153703239 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-153703239| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-153703239 |ULTIMATE.start_main_#t~ite50_Out-153703239|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-153703239|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:24:35,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-954633407 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-954633407|) (not .cse1)) (and (= ~a$r_buff0_thd0~0_In-954633407 |ULTIMATE.start_main_#t~ite51_Out-954633407|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-954633407} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-954633407|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-954633407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:24:35,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1955613805 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1955613805 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1955613805 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1955613805 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1955613805| ~a$r_buff1_thd0~0_In1955613805) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1955613805| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1955613805, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1955613805, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1955613805, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1955613805} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1955613805|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1955613805, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1955613805, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1955613805, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1955613805} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:24:35,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:24:35,800 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:24:35 BasicIcfg [2019-12-07 19:24:35,800 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:24:35,801 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:24:35,801 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:24:35,801 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:24:35,801 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:43" (3/4) ... [2019-12-07 19:24:35,803 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:24:35,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [904] [904] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~weak$$choice0~0_10) (= v_~a$r_buff1_thd0~0_132 0) (= 0 v_~a$w_buff0_used~0_689) (= 0 v_~a$w_buff1_used~0_376) (= v_~a$r_buff0_thd3~0_328 0) (= |v_ULTIMATE.start_main_~#t403~0.offset_22| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t403~0.base_29| 4)) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t403~0.base_29|) (= v_~y~0_79 0) (= 0 v_~a$r_buff1_thd1~0_125) (= 0 v_~__unbuffered_p0_EAX~0_92) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~x~0_69 0) (= 0 v_~a$r_buff1_thd2~0_129) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t403~0.base_29| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t403~0.base_29|) |v_ULTIMATE.start_main_~#t403~0.offset_22| 0)) |v_#memory_int_21|) (< 0 |v_#StackHeapBarrier_17|) (= v_~__unbuffered_p0_EBX~0_92 0) (= v_~a$flush_delayed~0_23 0) (= v_~a$r_buff1_thd3~0_224 0) (= v_~__unbuffered_p2_EBX~0_38 0) (= 0 v_~__unbuffered_cnt~0_98) (= v_~main$tmp_guard0~0_28 0) (= 0 v_~a$r_buff0_thd2~0_124) (= v_~a~0_181 0) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t403~0.base_29|)) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~a$r_buff0_thd1~0_195) (= v_~a$mem_tmp~0_12 0) (= v_~main$tmp_guard1~0_36 0) (= 0 v_~a$w_buff1~0_172) (= v_~a$r_buff0_thd0~0_144 0) (= v_~a$w_buff0~0_228 0) (= v_~weak$$choice2~0_107 0) (= v_~z~0_20 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t403~0.base_29| 1)) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t405~0.offset=|v_ULTIMATE.start_main_~#t405~0.offset_15|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_129, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_51|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_281|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ~a~0=v_~a~0_181, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_67|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_92, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t405~0.base=|v_ULTIMATE.start_main_~#t405~0.base_17|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_38, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_92, ULTIMATE.start_main_~#t404~0.base=|v_ULTIMATE.start_main_~#t404~0.base_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_224, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_689, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_195, ULTIMATE.start_main_~#t403~0.base=|v_ULTIMATE.start_main_~#t403~0.base_29|, ~weak$$choice0~0=v_~weak$$choice0~0_10, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_228, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_69, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_124, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_36, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_12, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_172, ~y~0=v_~y~0_79, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_125, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_328, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_28, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t404~0.offset=|v_ULTIMATE.start_main_~#t404~0.offset_22|, ~a$flush_delayed~0=v_~a$flush_delayed~0_23, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t403~0.offset=|v_ULTIMATE.start_main_~#t403~0.offset_22|, ~z~0=v_~z~0_20, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_376, ~weak$$choice2~0=v_~weak$$choice2~0_107, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t405~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t405~0.base, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_~#t404~0.base, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t403~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t404~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t403~0.offset, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 19:24:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L837-1-->L839: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t404~0.base_12| 4)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t404~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t404~0.base_12|) |v_ULTIMATE.start_main_~#t404~0.offset_10| 1))) (not (= |v_ULTIMATE.start_main_~#t404~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t404~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t404~0.base_12|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t404~0.base_12| 1) |v_#valid_34|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t404~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t404~0.offset=|v_ULTIMATE.start_main_~#t404~0.offset_10|, ULTIMATE.start_main_~#t404~0.base=|v_ULTIMATE.start_main_~#t404~0.base_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t404~0.offset, ULTIMATE.start_main_~#t404~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 19:24:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L839-1-->L841: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t405~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t405~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t405~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t405~0.base_13|) 0) (= 0 |v_ULTIMATE.start_main_~#t405~0.offset_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t405~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t405~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t405~0.base_13|) |v_ULTIMATE.start_main_~#t405~0.offset_11| 2)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t405~0.offset=|v_ULTIMATE.start_main_~#t405~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t405~0.base=|v_ULTIMATE.start_main_~#t405~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t405~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t405~0.base] because there is no mapped edge [2019-12-07 19:24:35,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L758: Formula: (and (= ~a$r_buff0_thd2~0_In-25299357 ~a$r_buff1_thd2~0_Out-25299357) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357 0)) (= ~a$r_buff1_thd3~0_Out-25299357 ~a$r_buff0_thd3~0_In-25299357) (= ~a$r_buff1_thd1~0_Out-25299357 ~a$r_buff0_thd1~0_In-25299357) (= ~a$r_buff0_thd1~0_Out-25299357 1) (= ~__unbuffered_p0_EBX~0_Out-25299357 ~y~0_In-25299357) (= 1 ~x~0_Out-25299357) (= ~__unbuffered_p0_EAX~0_Out-25299357 ~x~0_Out-25299357) (= ~a$r_buff0_thd0~0_In-25299357 ~a$r_buff1_thd0~0_Out-25299357)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-25299357, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-25299357, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-25299357, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-25299357, ~y~0=~y~0_In-25299357} OutVars{~__unbuffered_p0_EBX~0=~__unbuffered_p0_EBX~0_Out-25299357, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-25299357, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-25299357, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-25299357, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-25299357, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-25299357, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-25299357, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-25299357, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-25299357, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-25299357, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-25299357, ~y~0=~y~0_In-25299357, ~x~0=~x~0_Out-25299357} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~__unbuffered_p0_EBX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 19:24:35,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In66964350 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In66964350 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out66964350|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In66964350 |P0Thread1of1ForFork1_#t~ite5_Out66964350|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In66964350, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In66964350} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out66964350|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In66964350, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In66964350} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1696563118 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1696563118 256))) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In1696563118 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In1696563118 256)))) (or (and (= ~a$w_buff1_used~0_In1696563118 |P0Thread1of1ForFork1_#t~ite6_Out1696563118|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1696563118|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1696563118, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1696563118, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1696563118, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1696563118} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1696563118|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1696563118, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1696563118, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1696563118, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1696563118} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L778-2-->L778-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1483486921 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In1483486921 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out1483486921| ~a~0_In1483486921) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out1483486921| ~a$w_buff1~0_In1483486921) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In1483486921, ~a$w_buff1~0=~a$w_buff1~0_In1483486921, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921} OutVars{~a~0=~a~0_In1483486921, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1483486921|, ~a$w_buff1~0=~a$w_buff1~0_In1483486921, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1483486921, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1483486921} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_10| v_~a~0_28) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_10|} OutVars{~a~0=v_~a~0_28, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_9|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_13|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L761-->L762: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_Out745827753 ~a$r_buff0_thd1~0_In745827753)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In745827753 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In745827753 256)))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= ~a$r_buff0_thd1~0_Out745827753 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In745827753, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In745827753} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out745827753|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In745827753, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out745827753} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In1188056702 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1188056702 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In1188056702 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In1188056702 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1188056702| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1188056702| ~a$r_buff1_thd1~0_In1188056702) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1188056702, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1188056702, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1188056702, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188056702} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1188056702|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1188056702, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1188056702, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1188056702, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1188056702} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:24:35,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L762-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork1_#t~ite8_34|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_63, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:24:35,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1334245686 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1334245686 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1334245686| ~a$w_buff0_used~0_In1334245686) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1334245686| 0) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1334245686, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1334245686} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1334245686, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1334245686, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1334245686|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:24:35,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In626108136 256) 0))) (or (and (= ~a$w_buff0~0_In626108136 |P2Thread1of1ForFork0_#t~ite21_Out626108136|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In626108136| |P2Thread1of1ForFork0_#t~ite20_Out626108136|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out626108136| |P2Thread1of1ForFork0_#t~ite20_Out626108136|) (= ~a$w_buff0~0_In626108136 |P2Thread1of1ForFork0_#t~ite20_Out626108136|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In626108136 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In626108136 256)) (and .cse1 (= (mod ~a$r_buff1_thd3~0_In626108136 256) 0)) (and (= (mod ~a$w_buff1_used~0_In626108136 256) 0) .cse1))) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In626108136, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In626108136, ~a$w_buff0_used~0=~a$w_buff0_used~0_In626108136, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In626108136, ~a$w_buff1_used~0=~a$w_buff1_used~0_In626108136, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In626108136|, ~weak$$choice2~0=~weak$$choice2~0_In626108136} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out626108136|, ~a$w_buff0~0=~a$w_buff0~0_In626108136, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In626108136, ~a$w_buff0_used~0=~a$w_buff0_used~0_In626108136, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In626108136, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out626108136|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In626108136, ~weak$$choice2~0=~weak$$choice2~0_In626108136} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 19:24:35,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1381604240 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out1381604240| |P2Thread1of1ForFork0_#t~ite24_Out1381604240|) (= |P2Thread1of1ForFork0_#t~ite23_Out1381604240| ~a$w_buff1~0_In1381604240) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1381604240 256)))) (or (and .cse1 (= (mod ~a$r_buff1_thd3~0_In1381604240 256) 0)) (and (= 0 (mod ~a$w_buff1_used~0_In1381604240 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1381604240 256))))) (and (not .cse0) (= ~a$w_buff1~0_In1381604240 |P2Thread1of1ForFork0_#t~ite24_Out1381604240|) (= |P2Thread1of1ForFork0_#t~ite23_In1381604240| |P2Thread1of1ForFork0_#t~ite23_Out1381604240|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In1381604240, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1381604240|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1381604240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1381604240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1381604240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1381604240, ~weak$$choice2~0=~weak$$choice2~0_In1381604240} OutVars{~a$w_buff1~0=~a$w_buff1~0_In1381604240, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1381604240|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1381604240|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1381604240, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1381604240, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1381604240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1381604240, ~weak$$choice2~0=~weak$$choice2~0_In1381604240} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 19:24:35,809 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2114917028 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite27_Out2114917028| ~a$w_buff0_used~0_In2114917028) (= |P2Thread1of1ForFork0_#t~ite26_In2114917028| |P2Thread1of1ForFork0_#t~ite26_Out2114917028|)) (and .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In2114917028 256)))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In2114917028 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In2114917028 256)) (and .cse1 (= (mod ~a$w_buff1_used~0_In2114917028 256) 0)))) (= |P2Thread1of1ForFork0_#t~ite26_Out2114917028| |P2Thread1of1ForFork0_#t~ite27_Out2114917028|) (= |P2Thread1of1ForFork0_#t~ite26_Out2114917028| ~a$w_buff0_used~0_In2114917028)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In2114917028|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114917028, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114917028, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114917028, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114917028, ~weak$$choice2~0=~weak$$choice2~0_In2114917028} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out2114917028|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out2114917028|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2114917028, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2114917028, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2114917028, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2114917028, ~weak$$choice2~0=~weak$$choice2~0_In2114917028} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 19:24:35,810 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_53 v_~a$r_buff0_thd3~0_52) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_53, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_52, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:24:35,810 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_16 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_16, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 19:24:35,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L814-2-->L814-4: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1868177639 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1868177639 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1868177639 |P2Thread1of1ForFork0_#t~ite38_Out-1868177639|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1868177639| ~a$w_buff1~0_In-1868177639) (not .cse1)))) InVars {~a~0=~a~0_In-1868177639, ~a$w_buff1~0=~a$w_buff1~0_In-1868177639, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1868177639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1868177639} OutVars{~a~0=~a~0_In-1868177639, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1868177639|, ~a$w_buff1~0=~a$w_buff1~0_In-1868177639, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1868177639, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1868177639} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:24:35,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L814-4-->L815: Formula: (= v_~a~0_36 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{~a~0=v_~a~0_36, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:24:35,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1676235401 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1676235401 256)))) (or (and (= ~a$w_buff0_used~0_In1676235401 |P2Thread1of1ForFork0_#t~ite40_Out1676235401|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1676235401|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1676235401, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1676235401} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1676235401|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1676235401, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1676235401} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:24:35,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~a$w_buff0_used~0_In2134191769 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In2134191769 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd3~0_In2134191769 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In2134191769 256) 0))) (or (and (= ~a$w_buff1_used~0_In2134191769 |P2Thread1of1ForFork0_#t~ite41_Out2134191769|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out2134191769|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2134191769, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2134191769} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In2134191769, ~a$w_buff0_used~0=~a$w_buff0_used~0_In2134191769, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In2134191769, ~a$w_buff1_used~0=~a$w_buff1_used~0_In2134191769, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out2134191769|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:24:35,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-200448399 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-200448399 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-200448399| ~a$r_buff0_thd3~0_In-200448399)) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-200448399| 0) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-200448399, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-200448399} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-200448399, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-200448399, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-200448399|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:24:35,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd3~0_In-2128766623 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-2128766623 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-2128766623 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In-2128766623 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out-2128766623| ~a$r_buff1_thd3~0_In-2128766623) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-2128766623| 0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-2128766623|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2128766623, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2128766623, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2128766623, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2128766623} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:24:35,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In827850325 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In827850325 256))) (.cse1 (= (mod ~a$r_buff0_thd2~0_In827850325 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In827850325 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out827850325|)) (and (or .cse2 .cse3) (= ~a$w_buff1_used~0_In827850325 |P1Thread1of1ForFork2_#t~ite12_Out827850325|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In827850325, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In827850325, ~a$w_buff0_used~0=~a$w_buff0_used~0_In827850325, ~a$w_buff1_used~0=~a$w_buff1_used~0_In827850325} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In827850325, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In827850325, ~a$w_buff0_used~0=~a$w_buff0_used~0_In827850325, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out827850325|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In827850325} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:24:35,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1240431919 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1240431919 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-1240431919 |P1Thread1of1ForFork2_#t~ite13_Out-1240431919|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-1240431919|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1240431919, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1240431919} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1240431919, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1240431919, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1240431919|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:24:35,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L782-->L782-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1738903323 256))) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-1738903323 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-1738903323 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1738903323 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out-1738903323| ~a$r_buff1_thd2~0_In-1738903323)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1738903323| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1738903323, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1738903323, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1738903323, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1738903323} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1738903323, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1738903323, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1738903323, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1738903323, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1738903323|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:24:35,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L818-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_123 |v_P2Thread1of1ForFork0_#t~ite43_32|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_123, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:24:35,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_42| v_~a$r_buff1_thd2~0_99) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_42|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_99, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_41|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:24:35,813 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_36) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_36, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:24:35,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L847-2-->L847-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In343737774 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In343737774 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out343737774| ~a$w_buff1~0_In343737774) (not .cse1)) (and (or .cse1 .cse0) (= ~a~0_In343737774 |ULTIMATE.start_main_#t~ite47_Out343737774|)))) InVars {~a~0=~a~0_In343737774, ~a$w_buff1~0=~a$w_buff1~0_In343737774, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774} OutVars{~a~0=~a~0_In343737774, ~a$w_buff1~0=~a$w_buff1~0_In343737774, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out343737774|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In343737774, ~a$w_buff1_used~0=~a$w_buff1_used~0_In343737774} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:24:35,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-4-->L848: Formula: (= v_~a~0_44 |v_ULTIMATE.start_main_#t~ite47_19|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_19|} OutVars{~a~0=v_~a~0_44, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_18|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_16|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:24:35,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In2038478849 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In2038478849 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out2038478849| ~a$w_buff0_used~0_In2038478849) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out2038478849| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2038478849} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2038478849, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2038478849|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2038478849} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:24:35,814 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-153703239 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-153703239 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-153703239 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-153703239 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-153703239| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-153703239 |ULTIMATE.start_main_#t~ite50_Out-153703239|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-153703239|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-153703239, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-153703239, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-153703239, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-153703239} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:24:35,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd0~0_In-954633407 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In-954633407 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-954633407|) (not .cse1)) (and (= ~a$r_buff0_thd0~0_In-954633407 |ULTIMATE.start_main_#t~ite51_Out-954633407|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-954633407} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-954633407|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-954633407, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-954633407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:24:35,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L851-->L851-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1955613805 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1955613805 256))) (.cse2 (= (mod ~a$r_buff1_thd0~0_In1955613805 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In1955613805 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1955613805| ~a$r_buff1_thd0~0_In1955613805) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1955613805| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1955613805, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1955613805, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1955613805, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1955613805} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1955613805|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1955613805, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1955613805, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1955613805, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1955613805} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:24:35,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~a$r_buff1_thd0~0_125 |v_ULTIMATE.start_main_#t~ite52_55|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|) (= v_~main$tmp_guard1~0_29 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_29 0) (= 0 v_~__unbuffered_p1_EAX~0_28) (= 1 v_~__unbuffered_p2_EAX~0_26) (= v_~__unbuffered_p0_EBX~0_85 0) (= 1 v_~__unbuffered_p0_EAX~0_85))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_55|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_85, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_29, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_28, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_125, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:24:35,867 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0e72ed44-3e06-4b2f-9980-12c2681d5d2d/bin/utaipan/witness.graphml [2019-12-07 19:24:35,867 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:24:35,868 INFO L168 Benchmark]: Toolchain (without parser) took 113573.34 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 933.9 MB in the beginning and 1.8 GB in the end (delta: -853.4 MB). Peak memory consumption was 4.7 GB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,869 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:24:35,869 INFO L168 Benchmark]: CACSL2BoogieTranslator took 372.14 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 83.4 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -121.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,869 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,869 INFO L168 Benchmark]: Boogie Preprocessor took 25.27 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:24:35,869 INFO L168 Benchmark]: RCFGBuilder took 447.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 995.6 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,870 INFO L168 Benchmark]: TraceAbstraction took 112622.29 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 990.3 MB in the beginning and 1.9 GB in the end (delta: -878.9 MB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,870 INFO L168 Benchmark]: Witness Printer took 66.82 ms. Allocated memory is still 6.6 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 81.9 MB). Peak memory consumption was 81.9 MB. Max. memory is 11.5 GB. [2019-12-07 19:24:35,871 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 372.14 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 83.4 MB). Free memory was 933.9 MB in the beginning and 1.1 GB in the end (delta: -121.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.27 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 447.15 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 995.6 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 112622.29 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 990.3 MB in the beginning and 1.9 GB in the end (delta: -878.9 MB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. * Witness Printer took 66.82 ms. Allocated memory is still 6.6 GB. Free memory was 1.9 GB in the beginning and 1.8 GB in the end (delta: 81.9 MB). Peak memory consumption was 81.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 179 ProgramPointsBefore, 94 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 33 ChoiceCompositions, 7151 VarBasedMoverChecksPositive, 221 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 258 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 80759 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t403, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t404, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L841] FCALL, FORK 0 pthread_create(&t405, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 a$w_buff1 = a$w_buff0 [L738] 1 a$w_buff0 = 1 [L739] 1 a$w_buff1_used = a$w_buff0_used [L740] 1 a$w_buff0_used = (_Bool)1 [L758] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L772] 2 y = 1 [L775] 2 __unbuffered_p1_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L758] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L759] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L760] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 112.4s, OverallIterations: 46, TraceHistogramMax: 1, AutomataDifference: 51.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10025 SDtfs, 17912 SDslu, 39488 SDs, 0 SdLazy, 38327 SolverSat, 1069 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 28.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 953 GetRequests, 68 SyntacticMatches, 51 SemanticMatches, 834 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6969 ImplicationChecksByTransitivity, 13.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=156295occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 35.4s AutomataMinimizationTime, 45 MinimizatonAttempts, 330673 StatesRemovedByMinimization, 41 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 5.1s InterpolantComputationTime, 2223 NumberOfCodeBlocks, 2223 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 2111 ConstructedInterpolants, 0 QuantifiedInterpolants, 1219674 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 45 InterpolantComputations, 45 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...