./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1c2d021cf451e03b79f39859914612811d76f30b ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:07:56,928 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:07:56,930 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:07:56,937 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:07:56,937 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:07:56,938 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:07:56,940 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:07:56,941 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:07:56,943 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:07:56,944 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:07:56,945 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:07:56,946 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:07:56,946 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:07:56,947 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:07:56,948 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:07:56,949 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:07:56,949 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:07:56,950 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:07:56,951 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:07:56,952 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:07:56,953 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:07:56,954 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:07:56,955 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:07:56,955 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:07:56,957 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:07:56,957 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:07:56,957 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:07:56,957 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:07:56,958 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:07:56,958 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:07:56,958 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:07:56,959 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:07:56,959 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:07:56,960 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:07:56,961 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:07:56,961 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:07:56,961 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:07:56,962 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:07:56,962 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:07:56,963 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:07:56,963 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:07:56,964 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:07:56,977 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:07:56,977 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:07:56,977 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:07:56,978 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:07:56,978 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:07:56,978 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:07:56,978 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:07:56,978 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:07:56,979 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:07:56,979 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:07:56,979 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:07:56,979 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:07:56,979 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:07:56,980 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:07:56,980 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:07:56,980 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:07:56,981 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:07:56,982 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:07:56,983 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:07:56,983 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:07:56,983 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:07:56,983 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:07:56,983 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:07:56,984 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:07:56,984 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:07:56,984 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:07:56,984 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:07:56,984 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:07:56,985 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:07:56,985 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:07:56,985 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1c2d021cf451e03b79f39859914612811d76f30b [2019-12-07 11:07:57,094 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:07:57,103 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:07:57,105 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:07:57,106 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:07:57,106 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:07:57,106 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i [2019-12-07 11:07:57,142 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/data/da772f1e3/1d476bbe64e04008bc8c28fcfcc602a7/FLAG242b31d43 [2019-12-07 11:07:57,601 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:07:57,602 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/sv-benchmarks/c/pthread-wmm/mix016_power.oepc.i [2019-12-07 11:07:57,612 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/data/da772f1e3/1d476bbe64e04008bc8c28fcfcc602a7/FLAG242b31d43 [2019-12-07 11:07:58,127 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/data/da772f1e3/1d476bbe64e04008bc8c28fcfcc602a7 [2019-12-07 11:07:58,129 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:07:58,131 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:07:58,131 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:07:58,131 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:07:58,134 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:07:58,134 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,136 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58, skipping insertion in model container [2019-12-07 11:07:58,137 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,142 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:07:58,172 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:07:58,411 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:07:58,420 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:07:58,464 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:07:58,509 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:07:58,509 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58 WrapperNode [2019-12-07 11:07:58,509 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:07:58,510 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:07:58,510 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:07:58,510 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:07:58,515 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,529 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,548 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:07:58,548 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:07:58,548 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:07:58,548 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:07:58,554 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,555 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,558 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,558 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,565 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,568 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,571 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... [2019-12-07 11:07:58,574 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:07:58,575 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:07:58,575 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:07:58,575 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:07:58,575 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:07:58,617 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:07:58,617 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:07:58,618 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:07:58,618 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:07:58,618 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:07:58,618 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:07:58,618 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:07:58,618 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:07:58,619 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:07:58,993 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:07:58,994 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:07:58,994 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:07:58 BoogieIcfgContainer [2019-12-07 11:07:58,994 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:07:58,995 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:07:58,995 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:07:58,997 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:07:58,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:07:58" (1/3) ... [2019-12-07 11:07:58,998 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e2ead7e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:07:58, skipping insertion in model container [2019-12-07 11:07:58,998 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:07:58" (2/3) ... [2019-12-07 11:07:58,998 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e2ead7e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:07:58, skipping insertion in model container [2019-12-07 11:07:58,998 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:07:58" (3/3) ... [2019-12-07 11:07:58,999 INFO L109 eAbstractionObserver]: Analyzing ICFG mix016_power.oepc.i [2019-12-07 11:07:59,006 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:07:59,006 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:07:59,011 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:07:59,011 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:07:59,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,037 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,037 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,041 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,045 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,057 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:07:59,068 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:07:59,080 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:07:59,081 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:07:59,081 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:07:59,081 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:07:59,081 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:07:59,081 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:07:59,081 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:07:59,081 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:07:59,092 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 11:07:59,093 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 11:07:59,149 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 11:07:59,149 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:07:59,160 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:07:59,176 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 11:07:59,206 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 11:07:59,206 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:07:59,212 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 704 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:07:59,227 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:07:59,228 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:08:01,965 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 84 [2019-12-07 11:08:02,194 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 11:08:02,379 INFO L206 etLargeBlockEncoding]: Checked pairs total: 89688 [2019-12-07 11:08:02,379 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 11:08:02,381 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 101 transitions [2019-12-07 11:08:14,965 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 106864 states. [2019-12-07 11:08:14,966 INFO L276 IsEmpty]: Start isEmpty. Operand 106864 states. [2019-12-07 11:08:14,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:08:14,970 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:08:14,970 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:08:14,970 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:08:14,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:08:14,974 INFO L82 PathProgramCache]: Analyzing trace with hash 921701, now seen corresponding path program 1 times [2019-12-07 11:08:14,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:08:14,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310112104] [2019-12-07 11:08:14,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:08:15,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:08:15,110 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:08:15,110 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310112104] [2019-12-07 11:08:15,111 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:08:15,111 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:08:15,112 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079413] [2019-12-07 11:08:15,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:08:15,115 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:08:15,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:08:15,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:08:15,126 INFO L87 Difference]: Start difference. First operand 106864 states. Second operand 3 states. [2019-12-07 11:08:15,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:08:15,807 INFO L93 Difference]: Finished difference Result 106034 states and 453004 transitions. [2019-12-07 11:08:15,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:08:15,809 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:08:15,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:08:16,259 INFO L225 Difference]: With dead ends: 106034 [2019-12-07 11:08:16,260 INFO L226 Difference]: Without dead ends: 99950 [2019-12-07 11:08:16,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:08:21,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99950 states. [2019-12-07 11:08:22,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99950 to 99950. [2019-12-07 11:08:22,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99950 states. [2019-12-07 11:08:22,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99950 states to 99950 states and 426445 transitions. [2019-12-07 11:08:22,770 INFO L78 Accepts]: Start accepts. Automaton has 99950 states and 426445 transitions. Word has length 3 [2019-12-07 11:08:22,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:08:22,771 INFO L462 AbstractCegarLoop]: Abstraction has 99950 states and 426445 transitions. [2019-12-07 11:08:22,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:08:22,771 INFO L276 IsEmpty]: Start isEmpty. Operand 99950 states and 426445 transitions. [2019-12-07 11:08:22,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:08:22,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:08:22,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:08:22,776 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:08:22,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:08:22,776 INFO L82 PathProgramCache]: Analyzing trace with hash 1680645281, now seen corresponding path program 1 times [2019-12-07 11:08:22,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:08:22,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436720896] [2019-12-07 11:08:22,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:08:22,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:08:22,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:08:22,861 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436720896] [2019-12-07 11:08:22,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:08:22,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:08:22,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1412680238] [2019-12-07 11:08:22,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:08:22,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:08:22,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:08:22,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:08:22,863 INFO L87 Difference]: Start difference. First operand 99950 states and 426445 transitions. Second operand 4 states. [2019-12-07 11:08:23,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:08:23,962 INFO L93 Difference]: Finished difference Result 159384 states and 652094 transitions. [2019-12-07 11:08:23,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:08:23,962 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:08:23,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:08:24,380 INFO L225 Difference]: With dead ends: 159384 [2019-12-07 11:08:24,381 INFO L226 Difference]: Without dead ends: 159335 [2019-12-07 11:08:24,381 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:08:28,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159335 states. [2019-12-07 11:08:32,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159335 to 143879. [2019-12-07 11:08:32,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143879 states. [2019-12-07 11:08:32,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143879 states to 143879 states and 597281 transitions. [2019-12-07 11:08:32,690 INFO L78 Accepts]: Start accepts. Automaton has 143879 states and 597281 transitions. Word has length 11 [2019-12-07 11:08:32,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:08:32,690 INFO L462 AbstractCegarLoop]: Abstraction has 143879 states and 597281 transitions. [2019-12-07 11:08:32,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:08:32,691 INFO L276 IsEmpty]: Start isEmpty. Operand 143879 states and 597281 transitions. [2019-12-07 11:08:32,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:08:32,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:08:32,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:08:32,696 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:08:32,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:08:32,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1535099311, now seen corresponding path program 1 times [2019-12-07 11:08:32,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:08:32,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705896417] [2019-12-07 11:08:32,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:08:32,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:08:32,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:08:32,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705896417] [2019-12-07 11:08:32,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:08:32,775 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:08:32,775 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121890918] [2019-12-07 11:08:32,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:08:32,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:08:32,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:08:32,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:08:32,775 INFO L87 Difference]: Start difference. First operand 143879 states and 597281 transitions. Second operand 4 states. [2019-12-07 11:08:33,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:08:33,863 INFO L93 Difference]: Finished difference Result 202801 states and 822791 transitions. [2019-12-07 11:08:33,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:08:33,864 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:08:33,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:08:34,864 INFO L225 Difference]: With dead ends: 202801 [2019-12-07 11:08:34,864 INFO L226 Difference]: Without dead ends: 202745 [2019-12-07 11:08:34,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:08:39,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202745 states. [2019-12-07 11:08:42,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202745 to 170256. [2019-12-07 11:08:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170256 states. [2019-12-07 11:08:45,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170256 states to 170256 states and 703222 transitions. [2019-12-07 11:08:45,908 INFO L78 Accepts]: Start accepts. Automaton has 170256 states and 703222 transitions. Word has length 13 [2019-12-07 11:08:45,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:08:45,909 INFO L462 AbstractCegarLoop]: Abstraction has 170256 states and 703222 transitions. [2019-12-07 11:08:45,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:08:45,909 INFO L276 IsEmpty]: Start isEmpty. Operand 170256 states and 703222 transitions. [2019-12-07 11:08:45,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:08:45,915 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:08:45,915 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:08:45,916 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:08:45,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:08:45,916 INFO L82 PathProgramCache]: Analyzing trace with hash 1228744872, now seen corresponding path program 1 times [2019-12-07 11:08:45,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:08:45,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249826418] [2019-12-07 11:08:45,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:08:45,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:08:45,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:08:45,969 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249826418] [2019-12-07 11:08:45,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:08:45,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:08:45,970 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421770526] [2019-12-07 11:08:45,970 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:08:45,970 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:08:45,970 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:08:45,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:08:45,970 INFO L87 Difference]: Start difference. First operand 170256 states and 703222 transitions. Second operand 4 states. [2019-12-07 11:08:47,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:08:47,065 INFO L93 Difference]: Finished difference Result 214467 states and 881100 transitions. [2019-12-07 11:08:47,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:08:47,065 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:08:47,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:08:47,648 INFO L225 Difference]: With dead ends: 214467 [2019-12-07 11:08:47,648 INFO L226 Difference]: Without dead ends: 214467 [2019-12-07 11:08:47,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:08:52,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214467 states. [2019-12-07 11:08:55,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214467 to 183252. [2019-12-07 11:08:55,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183252 states. [2019-12-07 11:08:56,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183252 states to 183252 states and 757164 transitions. [2019-12-07 11:08:56,132 INFO L78 Accepts]: Start accepts. Automaton has 183252 states and 757164 transitions. Word has length 16 [2019-12-07 11:08:56,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:08:56,132 INFO L462 AbstractCegarLoop]: Abstraction has 183252 states and 757164 transitions. [2019-12-07 11:08:56,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:08:56,133 INFO L276 IsEmpty]: Start isEmpty. Operand 183252 states and 757164 transitions. [2019-12-07 11:08:56,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:08:56,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:08:56,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:08:56,140 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:08:56,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:08:56,140 INFO L82 PathProgramCache]: Analyzing trace with hash 1228651655, now seen corresponding path program 1 times [2019-12-07 11:08:56,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:08:56,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990115342] [2019-12-07 11:08:56,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:08:56,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:08:56,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:08:56,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990115342] [2019-12-07 11:08:56,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:08:56,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:08:56,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007435020] [2019-12-07 11:08:56,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:08:56,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:08:56,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:08:56,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:08:56,179 INFO L87 Difference]: Start difference. First operand 183252 states and 757164 transitions. Second operand 4 states. [2019-12-07 11:08:57,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:08:57,280 INFO L93 Difference]: Finished difference Result 223450 states and 919042 transitions. [2019-12-07 11:08:57,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:08:57,281 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:08:57,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:08:57,887 INFO L225 Difference]: With dead ends: 223450 [2019-12-07 11:08:57,887 INFO L226 Difference]: Without dead ends: 223450 [2019-12-07 11:08:57,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:03,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223450 states. [2019-12-07 11:09:08,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223450 to 182620. [2019-12-07 11:09:08,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182620 states. [2019-12-07 11:09:08,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182620 states to 182620 states and 754482 transitions. [2019-12-07 11:09:08,735 INFO L78 Accepts]: Start accepts. Automaton has 182620 states and 754482 transitions. Word has length 16 [2019-12-07 11:09:08,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:08,735 INFO L462 AbstractCegarLoop]: Abstraction has 182620 states and 754482 transitions. [2019-12-07 11:09:08,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:09:08,735 INFO L276 IsEmpty]: Start isEmpty. Operand 182620 states and 754482 transitions. [2019-12-07 11:09:08,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:09:08,745 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:08,745 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:08,745 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:08,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:08,746 INFO L82 PathProgramCache]: Analyzing trace with hash -1477868963, now seen corresponding path program 1 times [2019-12-07 11:09:08,746 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:08,746 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988894906] [2019-12-07 11:09:08,746 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:08,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:08,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:08,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988894906] [2019-12-07 11:09:08,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:08,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:09:08,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901681493] [2019-12-07 11:09:08,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:08,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:08,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:08,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:08,779 INFO L87 Difference]: Start difference. First operand 182620 states and 754482 transitions. Second operand 3 states. [2019-12-07 11:09:09,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:09,872 INFO L93 Difference]: Finished difference Result 182256 states and 753055 transitions. [2019-12-07 11:09:09,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:09,872 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:09:09,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:10,326 INFO L225 Difference]: With dead ends: 182256 [2019-12-07 11:09:10,326 INFO L226 Difference]: Without dead ends: 182256 [2019-12-07 11:09:10,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:15,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182256 states. [2019-12-07 11:09:17,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182256 to 182256. [2019-12-07 11:09:17,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182256 states. [2019-12-07 11:09:18,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182256 states to 182256 states and 753055 transitions. [2019-12-07 11:09:18,356 INFO L78 Accepts]: Start accepts. Automaton has 182256 states and 753055 transitions. Word has length 18 [2019-12-07 11:09:18,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:18,356 INFO L462 AbstractCegarLoop]: Abstraction has 182256 states and 753055 transitions. [2019-12-07 11:09:18,356 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:18,356 INFO L276 IsEmpty]: Start isEmpty. Operand 182256 states and 753055 transitions. [2019-12-07 11:09:18,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:09:18,368 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:18,368 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:18,368 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:18,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:18,369 INFO L82 PathProgramCache]: Analyzing trace with hash 1719186322, now seen corresponding path program 1 times [2019-12-07 11:09:18,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:18,369 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222355469] [2019-12-07 11:09:18,369 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:18,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:18,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:18,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222355469] [2019-12-07 11:09:18,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:18,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:18,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365905667] [2019-12-07 11:09:18,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:09:18,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:18,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:09:18,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:09:18,420 INFO L87 Difference]: Start difference. First operand 182256 states and 753055 transitions. Second operand 4 states. [2019-12-07 11:09:18,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:18,603 INFO L93 Difference]: Finished difference Result 48553 states and 166612 transitions. [2019-12-07 11:09:18,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:09:18,603 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:09:18,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:18,664 INFO L225 Difference]: With dead ends: 48553 [2019-12-07 11:09:18,664 INFO L226 Difference]: Without dead ends: 36912 [2019-12-07 11:09:18,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:18,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36912 states. [2019-12-07 11:09:19,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36912 to 36776. [2019-12-07 11:09:19,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36776 states. [2019-12-07 11:09:19,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36776 states to 36776 states and 119594 transitions. [2019-12-07 11:09:19,591 INFO L78 Accepts]: Start accepts. Automaton has 36776 states and 119594 transitions. Word has length 19 [2019-12-07 11:09:19,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:19,591 INFO L462 AbstractCegarLoop]: Abstraction has 36776 states and 119594 transitions. [2019-12-07 11:09:19,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:09:19,591 INFO L276 IsEmpty]: Start isEmpty. Operand 36776 states and 119594 transitions. [2019-12-07 11:09:19,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:09:19,596 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:19,596 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:19,596 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:19,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:19,596 INFO L82 PathProgramCache]: Analyzing trace with hash -1838789338, now seen corresponding path program 1 times [2019-12-07 11:09:19,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:19,597 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364591566] [2019-12-07 11:09:19,597 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:19,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:19,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:19,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1364591566] [2019-12-07 11:09:19,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:19,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:19,658 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [895395699] [2019-12-07 11:09:19,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:19,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:19,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:19,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:19,658 INFO L87 Difference]: Start difference. First operand 36776 states and 119594 transitions. Second operand 5 states. [2019-12-07 11:09:20,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:20,088 INFO L93 Difference]: Finished difference Result 55414 states and 177137 transitions. [2019-12-07 11:09:20,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:09:20,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:09:20,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:20,179 INFO L225 Difference]: With dead ends: 55414 [2019-12-07 11:09:20,179 INFO L226 Difference]: Without dead ends: 55358 [2019-12-07 11:09:20,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:09:20,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55358 states. [2019-12-07 11:09:20,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55358 to 38662. [2019-12-07 11:09:20,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38662 states. [2019-12-07 11:09:20,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38662 states to 38662 states and 125720 transitions. [2019-12-07 11:09:20,941 INFO L78 Accepts]: Start accepts. Automaton has 38662 states and 125720 transitions. Word has length 22 [2019-12-07 11:09:20,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:20,941 INFO L462 AbstractCegarLoop]: Abstraction has 38662 states and 125720 transitions. [2019-12-07 11:09:20,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:20,941 INFO L276 IsEmpty]: Start isEmpty. Operand 38662 states and 125720 transitions. [2019-12-07 11:09:20,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:09:20,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:20,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:20,946 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:20,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:20,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1838882555, now seen corresponding path program 1 times [2019-12-07 11:09:20,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:20,947 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933887261] [2019-12-07 11:09:20,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:20,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:21,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:21,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933887261] [2019-12-07 11:09:21,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:21,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:21,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107959612] [2019-12-07 11:09:21,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:21,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:21,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:21,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:21,004 INFO L87 Difference]: Start difference. First operand 38662 states and 125720 transitions. Second operand 5 states. [2019-12-07 11:09:21,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:21,454 INFO L93 Difference]: Finished difference Result 57384 states and 182835 transitions. [2019-12-07 11:09:21,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:09:21,454 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:09:21,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:21,541 INFO L225 Difference]: With dead ends: 57384 [2019-12-07 11:09:21,541 INFO L226 Difference]: Without dead ends: 57328 [2019-12-07 11:09:21,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:09:21,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57328 states. [2019-12-07 11:09:23,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57328 to 36156. [2019-12-07 11:09:23,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36156 states. [2019-12-07 11:09:23,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36156 states to 36156 states and 117341 transitions. [2019-12-07 11:09:23,068 INFO L78 Accepts]: Start accepts. Automaton has 36156 states and 117341 transitions. Word has length 22 [2019-12-07 11:09:23,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:23,068 INFO L462 AbstractCegarLoop]: Abstraction has 36156 states and 117341 transitions. [2019-12-07 11:09:23,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:23,069 INFO L276 IsEmpty]: Start isEmpty. Operand 36156 states and 117341 transitions. [2019-12-07 11:09:23,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:09:23,077 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:23,077 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:23,077 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:23,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:23,077 INFO L82 PathProgramCache]: Analyzing trace with hash 320469370, now seen corresponding path program 1 times [2019-12-07 11:09:23,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:23,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153966305] [2019-12-07 11:09:23,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:23,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:23,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:23,122 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153966305] [2019-12-07 11:09:23,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:23,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:09:23,122 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202807702] [2019-12-07 11:09:23,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:23,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:23,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:23,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:23,123 INFO L87 Difference]: Start difference. First operand 36156 states and 117341 transitions. Second operand 5 states. [2019-12-07 11:09:23,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:23,197 INFO L93 Difference]: Finished difference Result 16539 states and 50682 transitions. [2019-12-07 11:09:23,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:09:23,197 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 11:09:23,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:23,215 INFO L225 Difference]: With dead ends: 16539 [2019-12-07 11:09:23,215 INFO L226 Difference]: Without dead ends: 14449 [2019-12-07 11:09:23,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:23,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14449 states. [2019-12-07 11:09:23,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14449 to 14071. [2019-12-07 11:09:23,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14071 states. [2019-12-07 11:09:23,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14071 states to 14071 states and 43135 transitions. [2019-12-07 11:09:23,420 INFO L78 Accepts]: Start accepts. Automaton has 14071 states and 43135 transitions. Word has length 25 [2019-12-07 11:09:23,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:23,420 INFO L462 AbstractCegarLoop]: Abstraction has 14071 states and 43135 transitions. [2019-12-07 11:09:23,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:23,420 INFO L276 IsEmpty]: Start isEmpty. Operand 14071 states and 43135 transitions. [2019-12-07 11:09:23,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:09:23,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:23,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:23,430 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:23,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:23,430 INFO L82 PathProgramCache]: Analyzing trace with hash 270212897, now seen corresponding path program 1 times [2019-12-07 11:09:23,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:23,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [202100882] [2019-12-07 11:09:23,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:23,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:23,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:23,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [202100882] [2019-12-07 11:09:23,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:23,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:23,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549332946] [2019-12-07 11:09:23,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:23,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:23,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:23,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:23,451 INFO L87 Difference]: Start difference. First operand 14071 states and 43135 transitions. Second operand 3 states. [2019-12-07 11:09:23,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:23,519 INFO L93 Difference]: Finished difference Result 21733 states and 66033 transitions. [2019-12-07 11:09:23,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:23,519 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 11:09:23,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:23,545 INFO L225 Difference]: With dead ends: 21733 [2019-12-07 11:09:23,545 INFO L226 Difference]: Without dead ends: 21733 [2019-12-07 11:09:23,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:23,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21733 states. [2019-12-07 11:09:23,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21733 to 16315. [2019-12-07 11:09:23,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16315 states. [2019-12-07 11:09:23,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16315 states to 16315 states and 50292 transitions. [2019-12-07 11:09:23,813 INFO L78 Accepts]: Start accepts. Automaton has 16315 states and 50292 transitions. Word has length 27 [2019-12-07 11:09:23,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:23,813 INFO L462 AbstractCegarLoop]: Abstraction has 16315 states and 50292 transitions. [2019-12-07 11:09:23,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:23,813 INFO L276 IsEmpty]: Start isEmpty. Operand 16315 states and 50292 transitions. [2019-12-07 11:09:23,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:09:23,824 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:23,824 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:23,824 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:23,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:23,824 INFO L82 PathProgramCache]: Analyzing trace with hash 2064759266, now seen corresponding path program 1 times [2019-12-07 11:09:23,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:23,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253412021] [2019-12-07 11:09:23,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:23,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:23,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:23,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253412021] [2019-12-07 11:09:23,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:23,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:23,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440579949] [2019-12-07 11:09:23,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:23,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:23,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:23,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:23,849 INFO L87 Difference]: Start difference. First operand 16315 states and 50292 transitions. Second operand 3 states. [2019-12-07 11:09:23,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:23,914 INFO L93 Difference]: Finished difference Result 21733 states and 64507 transitions. [2019-12-07 11:09:23,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:23,914 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 11:09:23,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:23,936 INFO L225 Difference]: With dead ends: 21733 [2019-12-07 11:09:23,936 INFO L226 Difference]: Without dead ends: 21733 [2019-12-07 11:09:23,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:24,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21733 states. [2019-12-07 11:09:24,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21733 to 16315. [2019-12-07 11:09:24,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16315 states. [2019-12-07 11:09:24,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16315 states to 16315 states and 48766 transitions. [2019-12-07 11:09:24,190 INFO L78 Accepts]: Start accepts. Automaton has 16315 states and 48766 transitions. Word has length 27 [2019-12-07 11:09:24,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:24,190 INFO L462 AbstractCegarLoop]: Abstraction has 16315 states and 48766 transitions. [2019-12-07 11:09:24,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:24,190 INFO L276 IsEmpty]: Start isEmpty. Operand 16315 states and 48766 transitions. [2019-12-07 11:09:24,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:09:24,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:24,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:24,200 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:24,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:24,200 INFO L82 PathProgramCache]: Analyzing trace with hash 2010439622, now seen corresponding path program 1 times [2019-12-07 11:09:24,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:24,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915887101] [2019-12-07 11:09:24,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:24,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:24,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:24,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915887101] [2019-12-07 11:09:24,261 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:24,261 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:24,262 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1275018017] [2019-12-07 11:09:24,262 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:24,262 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:24,262 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:24,262 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:24,262 INFO L87 Difference]: Start difference. First operand 16315 states and 48766 transitions. Second operand 5 states. [2019-12-07 11:09:24,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:24,487 INFO L93 Difference]: Finished difference Result 20323 states and 59870 transitions. [2019-12-07 11:09:24,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:09:24,488 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 11:09:24,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:24,509 INFO L225 Difference]: With dead ends: 20323 [2019-12-07 11:09:24,509 INFO L226 Difference]: Without dead ends: 20168 [2019-12-07 11:09:24,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:24,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20168 states. [2019-12-07 11:09:24,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20168 to 18914. [2019-12-07 11:09:24,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18914 states. [2019-12-07 11:09:24,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18914 states to 18914 states and 56305 transitions. [2019-12-07 11:09:24,777 INFO L78 Accepts]: Start accepts. Automaton has 18914 states and 56305 transitions. Word has length 27 [2019-12-07 11:09:24,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:24,778 INFO L462 AbstractCegarLoop]: Abstraction has 18914 states and 56305 transitions. [2019-12-07 11:09:24,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:24,778 INFO L276 IsEmpty]: Start isEmpty. Operand 18914 states and 56305 transitions. [2019-12-07 11:09:24,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:09:24,789 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:24,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:24,789 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:24,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:24,790 INFO L82 PathProgramCache]: Analyzing trace with hash 773295241, now seen corresponding path program 1 times [2019-12-07 11:09:24,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:24,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014396897] [2019-12-07 11:09:24,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:24,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:24,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:24,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014396897] [2019-12-07 11:09:24,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:24,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:24,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128169851] [2019-12-07 11:09:24,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:24,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:24,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:24,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:24,839 INFO L87 Difference]: Start difference. First operand 18914 states and 56305 transitions. Second operand 5 states. [2019-12-07 11:09:25,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:25,125 INFO L93 Difference]: Finished difference Result 22202 states and 65126 transitions. [2019-12-07 11:09:25,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:09:25,126 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:09:25,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:25,146 INFO L225 Difference]: With dead ends: 22202 [2019-12-07 11:09:25,146 INFO L226 Difference]: Without dead ends: 22040 [2019-12-07 11:09:25,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:25,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22040 states. [2019-12-07 11:09:25,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22040 to 18784. [2019-12-07 11:09:25,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18784 states. [2019-12-07 11:09:25,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18784 states to 18784 states and 55678 transitions. [2019-12-07 11:09:25,413 INFO L78 Accepts]: Start accepts. Automaton has 18784 states and 55678 transitions. Word has length 28 [2019-12-07 11:09:25,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:25,413 INFO L462 AbstractCegarLoop]: Abstraction has 18784 states and 55678 transitions. [2019-12-07 11:09:25,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:25,414 INFO L276 IsEmpty]: Start isEmpty. Operand 18784 states and 55678 transitions. [2019-12-07 11:09:25,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:09:25,428 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:25,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:25,429 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:25,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:25,429 INFO L82 PathProgramCache]: Analyzing trace with hash -809721720, now seen corresponding path program 1 times [2019-12-07 11:09:25,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:25,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667431967] [2019-12-07 11:09:25,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:25,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:25,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:25,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667431967] [2019-12-07 11:09:25,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:25,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:09:25,494 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861377536] [2019-12-07 11:09:25,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:25,494 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:25,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:25,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:25,494 INFO L87 Difference]: Start difference. First operand 18784 states and 55678 transitions. Second operand 6 states. [2019-12-07 11:09:25,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:25,923 INFO L93 Difference]: Finished difference Result 25401 states and 74159 transitions. [2019-12-07 11:09:25,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:25,923 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 11:09:25,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:25,952 INFO L225 Difference]: With dead ends: 25401 [2019-12-07 11:09:25,952 INFO L226 Difference]: Without dead ends: 25087 [2019-12-07 11:09:25,952 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:09:26,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25087 states. [2019-12-07 11:09:26,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25087 to 19662. [2019-12-07 11:09:26,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19662 states. [2019-12-07 11:09:26,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19662 states to 19662 states and 58366 transitions. [2019-12-07 11:09:26,262 INFO L78 Accepts]: Start accepts. Automaton has 19662 states and 58366 transitions. Word has length 33 [2019-12-07 11:09:26,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:26,262 INFO L462 AbstractCegarLoop]: Abstraction has 19662 states and 58366 transitions. [2019-12-07 11:09:26,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:26,263 INFO L276 IsEmpty]: Start isEmpty. Operand 19662 states and 58366 transitions. [2019-12-07 11:09:26,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:09:26,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:26,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:26,275 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:26,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:26,276 INFO L82 PathProgramCache]: Analyzing trace with hash -752360441, now seen corresponding path program 1 times [2019-12-07 11:09:26,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:26,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067430098] [2019-12-07 11:09:26,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:26,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:26,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:26,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067430098] [2019-12-07 11:09:26,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:26,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:09:26,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079374675] [2019-12-07 11:09:26,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:26,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:26,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:26,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:26,341 INFO L87 Difference]: Start difference. First operand 19662 states and 58366 transitions. Second operand 6 states. [2019-12-07 11:09:26,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:26,781 INFO L93 Difference]: Finished difference Result 24189 states and 70713 transitions. [2019-12-07 11:09:26,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:26,782 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 11:09:26,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:26,805 INFO L225 Difference]: With dead ends: 24189 [2019-12-07 11:09:26,805 INFO L226 Difference]: Without dead ends: 23814 [2019-12-07 11:09:26,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:09:26,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23814 states. [2019-12-07 11:09:27,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23814 to 16491. [2019-12-07 11:09:27,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16491 states. [2019-12-07 11:09:27,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16491 states to 16491 states and 49104 transitions. [2019-12-07 11:09:27,083 INFO L78 Accepts]: Start accepts. Automaton has 16491 states and 49104 transitions. Word has length 34 [2019-12-07 11:09:27,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:27,084 INFO L462 AbstractCegarLoop]: Abstraction has 16491 states and 49104 transitions. [2019-12-07 11:09:27,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:27,084 INFO L276 IsEmpty]: Start isEmpty. Operand 16491 states and 49104 transitions. [2019-12-07 11:09:27,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:09:27,097 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:27,097 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:27,097 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:27,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:27,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1856434077, now seen corresponding path program 1 times [2019-12-07 11:09:27,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:27,098 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828404904] [2019-12-07 11:09:27,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:27,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:27,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:27,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828404904] [2019-12-07 11:09:27,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:27,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:09:27,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1379646684] [2019-12-07 11:09:27,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:09:27,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:27,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:09:27,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:27,142 INFO L87 Difference]: Start difference. First operand 16491 states and 49104 transitions. Second operand 5 states. [2019-12-07 11:09:27,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:27,543 INFO L93 Difference]: Finished difference Result 27101 states and 79447 transitions. [2019-12-07 11:09:27,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:09:27,543 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 11:09:27,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:27,572 INFO L225 Difference]: With dead ends: 27101 [2019-12-07 11:09:27,573 INFO L226 Difference]: Without dead ends: 27101 [2019-12-07 11:09:27,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:27,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27101 states. [2019-12-07 11:09:27,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27101 to 21497. [2019-12-07 11:09:27,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21497 states. [2019-12-07 11:09:27,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21497 states to 21497 states and 63913 transitions. [2019-12-07 11:09:27,895 INFO L78 Accepts]: Start accepts. Automaton has 21497 states and 63913 transitions. Word has length 40 [2019-12-07 11:09:27,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:27,896 INFO L462 AbstractCegarLoop]: Abstraction has 21497 states and 63913 transitions. [2019-12-07 11:09:27,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:09:27,896 INFO L276 IsEmpty]: Start isEmpty. Operand 21497 states and 63913 transitions. [2019-12-07 11:09:27,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:09:27,913 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:27,913 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:27,913 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:27,913 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:27,913 INFO L82 PathProgramCache]: Analyzing trace with hash 380188601, now seen corresponding path program 2 times [2019-12-07 11:09:27,913 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:27,913 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38624085] [2019-12-07 11:09:27,913 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:27,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:28,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:28,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38624085] [2019-12-07 11:09:28,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:28,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:09:28,052 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524794212] [2019-12-07 11:09:28,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:28,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:28,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:28,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:28,052 INFO L87 Difference]: Start difference. First operand 21497 states and 63913 transitions. Second operand 6 states. [2019-12-07 11:09:28,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:28,621 INFO L93 Difference]: Finished difference Result 33647 states and 99208 transitions. [2019-12-07 11:09:28,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 11:09:28,621 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 11:09:28,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:28,659 INFO L225 Difference]: With dead ends: 33647 [2019-12-07 11:09:28,660 INFO L226 Difference]: Without dead ends: 33647 [2019-12-07 11:09:28,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:09:28,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33647 states. [2019-12-07 11:09:29,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33647 to 25873. [2019-12-07 11:09:29,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25873 states. [2019-12-07 11:09:29,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25873 states to 25873 states and 76411 transitions. [2019-12-07 11:09:29,080 INFO L78 Accepts]: Start accepts. Automaton has 25873 states and 76411 transitions. Word has length 40 [2019-12-07 11:09:29,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:29,081 INFO L462 AbstractCegarLoop]: Abstraction has 25873 states and 76411 transitions. [2019-12-07 11:09:29,081 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:29,081 INFO L276 IsEmpty]: Start isEmpty. Operand 25873 states and 76411 transitions. [2019-12-07 11:09:29,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:09:29,103 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:29,103 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:29,103 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:29,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:29,103 INFO L82 PathProgramCache]: Analyzing trace with hash -1689924949, now seen corresponding path program 3 times [2019-12-07 11:09:29,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:29,104 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201006481] [2019-12-07 11:09:29,104 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:29,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:29,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:29,131 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201006481] [2019-12-07 11:09:29,131 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:29,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:09:29,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238660904] [2019-12-07 11:09:29,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:29,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:29,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:29,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:29,132 INFO L87 Difference]: Start difference. First operand 25873 states and 76411 transitions. Second operand 3 states. [2019-12-07 11:09:29,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:29,197 INFO L93 Difference]: Finished difference Result 25787 states and 76146 transitions. [2019-12-07 11:09:29,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:29,197 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 11:09:29,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:29,227 INFO L225 Difference]: With dead ends: 25787 [2019-12-07 11:09:29,227 INFO L226 Difference]: Without dead ends: 25787 [2019-12-07 11:09:29,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:29,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25787 states. [2019-12-07 11:09:29,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25787 to 20751. [2019-12-07 11:09:29,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20751 states. [2019-12-07 11:09:29,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20751 states to 20751 states and 61995 transitions. [2019-12-07 11:09:29,553 INFO L78 Accepts]: Start accepts. Automaton has 20751 states and 61995 transitions. Word has length 40 [2019-12-07 11:09:29,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:29,554 INFO L462 AbstractCegarLoop]: Abstraction has 20751 states and 61995 transitions. [2019-12-07 11:09:29,554 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:29,554 INFO L276 IsEmpty]: Start isEmpty. Operand 20751 states and 61995 transitions. [2019-12-07 11:09:29,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:09:29,571 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:29,571 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:29,571 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:29,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:29,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1472692188, now seen corresponding path program 1 times [2019-12-07 11:09:29,571 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:29,571 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686446900] [2019-12-07 11:09:29,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:29,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:29,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:29,625 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686446900] [2019-12-07 11:09:29,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:29,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:09:29,625 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982889307] [2019-12-07 11:09:29,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:29,626 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:29,626 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:29,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:29,626 INFO L87 Difference]: Start difference. First operand 20751 states and 61995 transitions. Second operand 6 states. [2019-12-07 11:09:29,729 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:29,729 INFO L93 Difference]: Finished difference Result 19639 states and 59572 transitions. [2019-12-07 11:09:29,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:09:29,729 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 11:09:29,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:29,758 INFO L225 Difference]: With dead ends: 19639 [2019-12-07 11:09:29,758 INFO L226 Difference]: Without dead ends: 19514 [2019-12-07 11:09:29,758 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:09:29,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19514 states. [2019-12-07 11:09:29,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19514 to 19514. [2019-12-07 11:09:29,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19514 states. [2019-12-07 11:09:30,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19514 states to 19514 states and 59308 transitions. [2019-12-07 11:09:30,027 INFO L78 Accepts]: Start accepts. Automaton has 19514 states and 59308 transitions. Word has length 41 [2019-12-07 11:09:30,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:30,027 INFO L462 AbstractCegarLoop]: Abstraction has 19514 states and 59308 transitions. [2019-12-07 11:09:30,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:30,027 INFO L276 IsEmpty]: Start isEmpty. Operand 19514 states and 59308 transitions. [2019-12-07 11:09:30,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:09:30,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:30,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:30,044 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:30,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:30,044 INFO L82 PathProgramCache]: Analyzing trace with hash -1424537019, now seen corresponding path program 1 times [2019-12-07 11:09:30,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:30,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528728438] [2019-12-07 11:09:30,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:30,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:30,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:30,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528728438] [2019-12-07 11:09:30,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:30,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:09:30,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1558011662] [2019-12-07 11:09:30,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:30,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:30,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:30,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:30,089 INFO L87 Difference]: Start difference. First operand 19514 states and 59308 transitions. Second operand 3 states. [2019-12-07 11:09:30,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:30,166 INFO L93 Difference]: Finished difference Result 23333 states and 71185 transitions. [2019-12-07 11:09:30,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:30,167 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:09:30,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:30,192 INFO L225 Difference]: With dead ends: 23333 [2019-12-07 11:09:30,192 INFO L226 Difference]: Without dead ends: 23333 [2019-12-07 11:09:30,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:30,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23333 states. [2019-12-07 11:09:30,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23333 to 18847. [2019-12-07 11:09:30,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18847 states. [2019-12-07 11:09:30,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18847 states to 18847 states and 57757 transitions. [2019-12-07 11:09:30,542 INFO L78 Accepts]: Start accepts. Automaton has 18847 states and 57757 transitions. Word has length 65 [2019-12-07 11:09:30,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:30,542 INFO L462 AbstractCegarLoop]: Abstraction has 18847 states and 57757 transitions. [2019-12-07 11:09:30,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:30,542 INFO L276 IsEmpty]: Start isEmpty. Operand 18847 states and 57757 transitions. [2019-12-07 11:09:30,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:30,556 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:30,556 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:30,556 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:30,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:30,556 INFO L82 PathProgramCache]: Analyzing trace with hash -450354812, now seen corresponding path program 1 times [2019-12-07 11:09:30,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:30,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511599881] [2019-12-07 11:09:30,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:30,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:30,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:30,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511599881] [2019-12-07 11:09:30,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:30,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:09:30,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635716842] [2019-12-07 11:09:30,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:30,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:30,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:30,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:30,610 INFO L87 Difference]: Start difference. First operand 18847 states and 57757 transitions. Second operand 6 states. [2019-12-07 11:09:31,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:31,101 INFO L93 Difference]: Finished difference Result 24750 states and 74560 transitions. [2019-12-07 11:09:31,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:31,101 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 11:09:31,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:31,130 INFO L225 Difference]: With dead ends: 24750 [2019-12-07 11:09:31,130 INFO L226 Difference]: Without dead ends: 24750 [2019-12-07 11:09:31,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:09:31,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24750 states. [2019-12-07 11:09:31,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24750 to 18104. [2019-12-07 11:09:31,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18104 states. [2019-12-07 11:09:31,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18104 states to 18104 states and 55567 transitions. [2019-12-07 11:09:31,433 INFO L78 Accepts]: Start accepts. Automaton has 18104 states and 55567 transitions. Word has length 66 [2019-12-07 11:09:31,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:31,433 INFO L462 AbstractCegarLoop]: Abstraction has 18104 states and 55567 transitions. [2019-12-07 11:09:31,433 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:31,433 INFO L276 IsEmpty]: Start isEmpty. Operand 18104 states and 55567 transitions. [2019-12-07 11:09:31,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:31,448 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:31,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:31,449 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:31,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:31,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1726790035, now seen corresponding path program 1 times [2019-12-07 11:09:31,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:31,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830432823] [2019-12-07 11:09:31,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:31,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:31,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:31,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830432823] [2019-12-07 11:09:31,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:31,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:09:31,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781910333] [2019-12-07 11:09:31,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:09:31,507 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:31,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:09:31,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:09:31,507 INFO L87 Difference]: Start difference. First operand 18104 states and 55567 transitions. Second operand 6 states. [2019-12-07 11:09:32,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:32,018 INFO L93 Difference]: Finished difference Result 23668 states and 71640 transitions. [2019-12-07 11:09:32,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:32,019 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 11:09:32,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:32,043 INFO L225 Difference]: With dead ends: 23668 [2019-12-07 11:09:32,043 INFO L226 Difference]: Without dead ends: 23668 [2019-12-07 11:09:32,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:09:32,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23668 states. [2019-12-07 11:09:32,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23668 to 18118. [2019-12-07 11:09:32,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18118 states. [2019-12-07 11:09:32,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18118 states to 18118 states and 55607 transitions. [2019-12-07 11:09:32,343 INFO L78 Accepts]: Start accepts. Automaton has 18118 states and 55607 transitions. Word has length 66 [2019-12-07 11:09:32,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:32,344 INFO L462 AbstractCegarLoop]: Abstraction has 18118 states and 55607 transitions. [2019-12-07 11:09:32,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:09:32,344 INFO L276 IsEmpty]: Start isEmpty. Operand 18118 states and 55607 transitions. [2019-12-07 11:09:32,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:32,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:32,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:32,360 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:32,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:32,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1925526943, now seen corresponding path program 2 times [2019-12-07 11:09:32,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:32,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270736410] [2019-12-07 11:09:32,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:32,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:32,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:32,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270736410] [2019-12-07 11:09:32,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:32,438 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:09:32,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396060636] [2019-12-07 11:09:32,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:09:32,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:32,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:09:32,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:32,439 INFO L87 Difference]: Start difference. First operand 18118 states and 55607 transitions. Second operand 7 states. [2019-12-07 11:09:32,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:32,775 INFO L93 Difference]: Finished difference Result 53774 states and 163986 transitions. [2019-12-07 11:09:32,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:32,775 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:09:32,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:32,823 INFO L225 Difference]: With dead ends: 53774 [2019-12-07 11:09:32,823 INFO L226 Difference]: Without dead ends: 40315 [2019-12-07 11:09:32,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:09:32,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40315 states. [2019-12-07 11:09:33,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40315 to 21471. [2019-12-07 11:09:33,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21471 states. [2019-12-07 11:09:33,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21471 states to 21471 states and 65489 transitions. [2019-12-07 11:09:33,261 INFO L78 Accepts]: Start accepts. Automaton has 21471 states and 65489 transitions. Word has length 66 [2019-12-07 11:09:33,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:33,261 INFO L462 AbstractCegarLoop]: Abstraction has 21471 states and 65489 transitions. [2019-12-07 11:09:33,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:09:33,261 INFO L276 IsEmpty]: Start isEmpty. Operand 21471 states and 65489 transitions. [2019-12-07 11:09:33,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:33,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:33,281 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:33,281 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:33,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:33,282 INFO L82 PathProgramCache]: Analyzing trace with hash 452173700, now seen corresponding path program 2 times [2019-12-07 11:09:33,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:33,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589295083] [2019-12-07 11:09:33,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:33,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:33,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:33,328 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589295083] [2019-12-07 11:09:33,328 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:33,328 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:09:33,328 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311757455] [2019-12-07 11:09:33,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:09:33,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:33,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:09:33,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:09:33,329 INFO L87 Difference]: Start difference. First operand 21471 states and 65489 transitions. Second operand 4 states. [2019-12-07 11:09:33,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:33,419 INFO L93 Difference]: Finished difference Result 21237 states and 64513 transitions. [2019-12-07 11:09:33,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:09:33,420 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:09:33,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:33,443 INFO L225 Difference]: With dead ends: 21237 [2019-12-07 11:09:33,444 INFO L226 Difference]: Without dead ends: 21237 [2019-12-07 11:09:33,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:09:33,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21237 states. [2019-12-07 11:09:33,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21237 to 19342. [2019-12-07 11:09:33,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19342 states. [2019-12-07 11:09:33,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19342 states to 19342 states and 58701 transitions. [2019-12-07 11:09:33,737 INFO L78 Accepts]: Start accepts. Automaton has 19342 states and 58701 transitions. Word has length 66 [2019-12-07 11:09:33,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:33,738 INFO L462 AbstractCegarLoop]: Abstraction has 19342 states and 58701 transitions. [2019-12-07 11:09:33,738 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:09:33,738 INFO L276 IsEmpty]: Start isEmpty. Operand 19342 states and 58701 transitions. [2019-12-07 11:09:33,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:33,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:33,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:33,753 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:33,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:33,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1156901343, now seen corresponding path program 3 times [2019-12-07 11:09:33,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:33,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059775570] [2019-12-07 11:09:33,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:33,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:33,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:33,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059775570] [2019-12-07 11:09:33,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:33,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:09:33,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [724812250] [2019-12-07 11:09:33,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 11:09:33,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:33,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 11:09:33,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:09:33,838 INFO L87 Difference]: Start difference. First operand 19342 states and 58701 transitions. Second operand 8 states. [2019-12-07 11:09:34,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:34,605 INFO L93 Difference]: Finished difference Result 67287 states and 201801 transitions. [2019-12-07 11:09:34,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 11:09:34,605 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 11:09:34,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:34,668 INFO L225 Difference]: With dead ends: 67287 [2019-12-07 11:09:34,668 INFO L226 Difference]: Without dead ends: 50752 [2019-12-07 11:09:34,669 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 124 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:09:34,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50752 states. [2019-12-07 11:09:35,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50752 to 22800. [2019-12-07 11:09:35,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22800 states. [2019-12-07 11:09:35,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22800 states to 22800 states and 69285 transitions. [2019-12-07 11:09:35,188 INFO L78 Accepts]: Start accepts. Automaton has 22800 states and 69285 transitions. Word has length 66 [2019-12-07 11:09:35,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:35,188 INFO L462 AbstractCegarLoop]: Abstraction has 22800 states and 69285 transitions. [2019-12-07 11:09:35,188 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 11:09:35,188 INFO L276 IsEmpty]: Start isEmpty. Operand 22800 states and 69285 transitions. [2019-12-07 11:09:35,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:35,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:35,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:35,207 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:35,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:35,208 INFO L82 PathProgramCache]: Analyzing trace with hash -873669215, now seen corresponding path program 4 times [2019-12-07 11:09:35,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:35,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389695647] [2019-12-07 11:09:35,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:35,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:35,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:35,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389695647] [2019-12-07 11:09:35,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:35,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:09:35,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071621091] [2019-12-07 11:09:35,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:09:35,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:35,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:09:35,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:09:35,305 INFO L87 Difference]: Start difference. First operand 22800 states and 69285 transitions. Second operand 9 states. [2019-12-07 11:09:36,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:36,158 INFO L93 Difference]: Finished difference Result 82065 states and 244473 transitions. [2019-12-07 11:09:36,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:09:36,158 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 11:09:36,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:36,256 INFO L225 Difference]: With dead ends: 82065 [2019-12-07 11:09:36,256 INFO L226 Difference]: Without dead ends: 79588 [2019-12-07 11:09:36,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=188, Invalid=568, Unknown=0, NotChecked=0, Total=756 [2019-12-07 11:09:36,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79588 states. [2019-12-07 11:09:36,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79588 to 23137. [2019-12-07 11:09:36,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23137 states. [2019-12-07 11:09:37,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23137 states to 23137 states and 70327 transitions. [2019-12-07 11:09:37,020 INFO L78 Accepts]: Start accepts. Automaton has 23137 states and 70327 transitions. Word has length 66 [2019-12-07 11:09:37,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:37,020 INFO L462 AbstractCegarLoop]: Abstraction has 23137 states and 70327 transitions. [2019-12-07 11:09:37,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:09:37,020 INFO L276 IsEmpty]: Start isEmpty. Operand 23137 states and 70327 transitions. [2019-12-07 11:09:37,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:37,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:37,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:37,039 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:37,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:37,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1950600001, now seen corresponding path program 5 times [2019-12-07 11:09:37,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:37,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2111659363] [2019-12-07 11:09:37,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:37,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:37,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:37,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2111659363] [2019-12-07 11:09:37,138 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:37,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:09:37,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782856513] [2019-12-07 11:09:37,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 11:09:37,139 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:37,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 11:09:37,139 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:09:37,139 INFO L87 Difference]: Start difference. First operand 23137 states and 70327 transitions. Second operand 9 states. [2019-12-07 11:09:38,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:38,078 INFO L93 Difference]: Finished difference Result 64900 states and 193400 transitions. [2019-12-07 11:09:38,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 11:09:38,078 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 11:09:38,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:38,154 INFO L225 Difference]: With dead ends: 64900 [2019-12-07 11:09:38,155 INFO L226 Difference]: Without dead ends: 63267 [2019-12-07 11:09:38,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 351 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=291, Invalid=969, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 11:09:38,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63267 states. [2019-12-07 11:09:38,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63267 to 22995. [2019-12-07 11:09:38,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22995 states. [2019-12-07 11:09:38,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22995 states to 22995 states and 69991 transitions. [2019-12-07 11:09:38,773 INFO L78 Accepts]: Start accepts. Automaton has 22995 states and 69991 transitions. Word has length 66 [2019-12-07 11:09:38,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:38,773 INFO L462 AbstractCegarLoop]: Abstraction has 22995 states and 69991 transitions. [2019-12-07 11:09:38,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 11:09:38,773 INFO L276 IsEmpty]: Start isEmpty. Operand 22995 states and 69991 transitions. [2019-12-07 11:09:38,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:38,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:38,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:38,795 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:38,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:38,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1010285763, now seen corresponding path program 6 times [2019-12-07 11:09:38,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:38,796 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1804102996] [2019-12-07 11:09:38,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:38,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:38,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:38,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1804102996] [2019-12-07 11:09:38,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:38,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:09:38,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [89108605] [2019-12-07 11:09:38,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:09:38,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:38,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:09:38,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:38,847 INFO L87 Difference]: Start difference. First operand 22995 states and 69991 transitions. Second operand 7 states. [2019-12-07 11:09:39,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:39,121 INFO L93 Difference]: Finished difference Result 46436 states and 138316 transitions. [2019-12-07 11:09:39,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:09:39,122 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:09:39,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:39,164 INFO L225 Difference]: With dead ends: 46436 [2019-12-07 11:09:39,164 INFO L226 Difference]: Without dead ends: 37592 [2019-12-07 11:09:39,164 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:09:39,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37592 states. [2019-12-07 11:09:39,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37592 to 22776. [2019-12-07 11:09:39,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22776 states. [2019-12-07 11:09:39,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22776 states to 22776 states and 69273 transitions. [2019-12-07 11:09:39,589 INFO L78 Accepts]: Start accepts. Automaton has 22776 states and 69273 transitions. Word has length 66 [2019-12-07 11:09:39,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:39,589 INFO L462 AbstractCegarLoop]: Abstraction has 22776 states and 69273 transitions. [2019-12-07 11:09:39,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:09:39,589 INFO L276 IsEmpty]: Start isEmpty. Operand 22776 states and 69273 transitions. [2019-12-07 11:09:39,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:39,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:39,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:39,609 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:39,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:39,609 INFO L82 PathProgramCache]: Analyzing trace with hash -44744943, now seen corresponding path program 7 times [2019-12-07 11:09:39,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:39,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356123164] [2019-12-07 11:09:39,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:39,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:39,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:39,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356123164] [2019-12-07 11:09:39,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:39,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:09:39,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91372298] [2019-12-07 11:09:39,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:09:39,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:39,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:09:39,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:09:39,674 INFO L87 Difference]: Start difference. First operand 22776 states and 69273 transitions. Second operand 7 states. [2019-12-07 11:09:40,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:40,365 INFO L93 Difference]: Finished difference Result 29795 states and 88921 transitions. [2019-12-07 11:09:40,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 11:09:40,365 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:09:40,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:40,397 INFO L225 Difference]: With dead ends: 29795 [2019-12-07 11:09:40,398 INFO L226 Difference]: Without dead ends: 29795 [2019-12-07 11:09:40,398 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 15 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=267, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:09:40,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29795 states. [2019-12-07 11:09:40,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29795 to 22515. [2019-12-07 11:09:40,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22515 states. [2019-12-07 11:09:40,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22515 states to 22515 states and 68476 transitions. [2019-12-07 11:09:40,770 INFO L78 Accepts]: Start accepts. Automaton has 22515 states and 68476 transitions. Word has length 66 [2019-12-07 11:09:40,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:40,771 INFO L462 AbstractCegarLoop]: Abstraction has 22515 states and 68476 transitions. [2019-12-07 11:09:40,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:09:40,771 INFO L276 IsEmpty]: Start isEmpty. Operand 22515 states and 68476 transitions. [2019-12-07 11:09:40,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:09:40,790 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:40,790 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:40,790 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:40,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:40,790 INFO L82 PathProgramCache]: Analyzing trace with hash -1480053167, now seen corresponding path program 8 times [2019-12-07 11:09:40,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:40,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705700380] [2019-12-07 11:09:40,791 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:40,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:09:40,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:09:40,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705700380] [2019-12-07 11:09:40,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:09:40,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:09:40,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1753292183] [2019-12-07 11:09:40,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:09:40,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:09:40,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:09:40,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:40,823 INFO L87 Difference]: Start difference. First operand 22515 states and 68476 transitions. Second operand 3 states. [2019-12-07 11:09:40,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:09:40,868 INFO L93 Difference]: Finished difference Result 18715 states and 56182 transitions. [2019-12-07 11:09:40,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:09:40,869 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 11:09:40,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:09:40,890 INFO L225 Difference]: With dead ends: 18715 [2019-12-07 11:09:40,890 INFO L226 Difference]: Without dead ends: 18715 [2019-12-07 11:09:40,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:09:40,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18715 states. [2019-12-07 11:09:41,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18715 to 17356. [2019-12-07 11:09:41,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17356 states. [2019-12-07 11:09:41,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17356 states to 17356 states and 52162 transitions. [2019-12-07 11:09:41,142 INFO L78 Accepts]: Start accepts. Automaton has 17356 states and 52162 transitions. Word has length 66 [2019-12-07 11:09:41,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:09:41,142 INFO L462 AbstractCegarLoop]: Abstraction has 17356 states and 52162 transitions. [2019-12-07 11:09:41,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:09:41,143 INFO L276 IsEmpty]: Start isEmpty. Operand 17356 states and 52162 transitions. [2019-12-07 11:09:41,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:09:41,158 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:09:41,158 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:09:41,158 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:09:41,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:09:41,159 INFO L82 PathProgramCache]: Analyzing trace with hash 817808390, now seen corresponding path program 1 times [2019-12-07 11:09:41,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:09:41,159 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110288749] [2019-12-07 11:09:41,159 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:09:41,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:09:41,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:09:41,241 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:09:41,241 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:09:41,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t409~0.base_44| 4)) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44| 1)) (= v_~main$tmp_guard0~0_44 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44|) |v_ULTIMATE.start_main_~#t409~0.offset_30| 0)) |v_#memory_int_21|) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t409~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= 0 |v_ULTIMATE.start_main_~#t409~0.offset_30|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_30|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t409~0.base=|v_ULTIMATE.start_main_~#t409~0.base_44|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t409~0.offset=|v_ULTIMATE.start_main_~#t409~0.offset_30|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_19|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t410~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t410~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t409~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t409~0.offset, ULTIMATE.start_main_~#t411~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff0_thd1~0_In263780061 ~z$r_buff1_thd1~0_Out263780061) (= 1 ~z$r_buff0_thd1~0_Out263780061) (= ~z$r_buff0_thd0~0_In263780061 ~z$r_buff1_thd0~0_Out263780061) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061)) (= ~x~0_In263780061 ~__unbuffered_p0_EAX~0_Out263780061) (= ~z$r_buff1_thd2~0_Out263780061 ~z$r_buff0_thd2~0_In263780061) (= ~z$r_buff0_thd3~0_In263780061 ~z$r_buff1_thd3~0_Out263780061)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In263780061, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In263780061, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In263780061, ~x~0=~x~0_In263780061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In263780061} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out263780061, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In263780061, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out263780061, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out263780061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out263780061, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out263780061, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In263780061, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out263780061, ~x~0=~x~0_In263780061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In263780061} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t410~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t410~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t410~0.base_13|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13|) |v_ULTIMATE.start_main_~#t410~0.offset_11| 1))) (= |v_ULTIMATE.start_main_~#t410~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_11|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t410~0.offset, ULTIMATE.start_main_~#t410~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:09:41,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-266967960 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-266967960 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| |P1Thread1of1ForFork2_#t~ite10_Out-266967960|))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| ~z~0_In-266967960) .cse2) (and (not .cse1) (not .cse0) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| ~z$w_buff1~0_In-266967960)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-266967960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266967960, ~z$w_buff1~0=~z$w_buff1~0_In-266967960, ~z~0=~z~0_In-266967960} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-266967960|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-266967960, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-266967960|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266967960, ~z$w_buff1~0=~z$w_buff1~0_In-266967960, ~z~0=~z~0_In-266967960} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:09:41,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1571626790 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1571626790 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-1571626790| ~z$w_buff0_used~0_In-1571626790)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1571626790| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1571626790} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1571626790|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1571626790} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:09:41,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In333048851 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In333048851 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In333048851 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In333048851 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out333048851| ~z$w_buff1_used~0_In333048851) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out333048851| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In333048851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In333048851, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In333048851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In333048851, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out333048851|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:09:41,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t411~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t411~0.base_10|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10| 1)) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t411~0.base_10| 4) |v_#length_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10|) |v_ULTIMATE.start_main_~#t411~0.offset_9| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t411~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t411~0.offset, #length] because there is no mapped edge [2019-12-07 11:09:41,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1422709133 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-1422709133| |P2Thread1of1ForFork0_#t~ite20_Out-1422709133|) (= |P2Thread1of1ForFork0_#t~ite21_Out-1422709133| ~z$w_buff0~0_In-1422709133)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1422709133| |P2Thread1of1ForFork0_#t~ite20_Out-1422709133|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1422709133 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-1422709133 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In-1422709133 256) 0) (and (= (mod ~z$w_buff1_used~0_In-1422709133 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1422709133| ~z$w_buff0~0_In-1422709133) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1422709133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1422709133, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1422709133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1422709133, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1422709133, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1422709133|, ~weak$$choice2~0=~weak$$choice2~0_In-1422709133} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1422709133|, ~z$w_buff0~0=~z$w_buff0~0_In-1422709133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1422709133, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1422709133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1422709133, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1422709133, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1422709133|, ~weak$$choice2~0=~weak$$choice2~0_In-1422709133} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 11:09:41,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In595665996 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite24_Out595665996| ~z$w_buff1~0_In595665996) (= |P2Thread1of1ForFork0_#t~ite23_In595665996| |P2Thread1of1ForFork0_#t~ite23_Out595665996|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out595665996| |P2Thread1of1ForFork0_#t~ite23_Out595665996|) (= |P2Thread1of1ForFork0_#t~ite23_Out595665996| ~z$w_buff1~0_In595665996) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In595665996 256)))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In595665996 256))) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In595665996 256))) (= 0 (mod ~z$w_buff0_used~0_In595665996 256))))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In595665996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In595665996, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In595665996|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In595665996, ~z$w_buff1~0=~z$w_buff1~0_In595665996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In595665996, ~weak$$choice2~0=~weak$$choice2~0_In595665996} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In595665996, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out595665996|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In595665996, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out595665996|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In595665996, ~z$w_buff1~0=~z$w_buff1~0_In595665996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In595665996, ~weak$$choice2~0=~weak$$choice2~0_In595665996} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 11:09:41,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:09:41,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1289048642 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1289048642 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1289048642| ~z$w_buff1~0_In1289048642) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1289048642| ~z~0_In1289048642) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$w_buff1~0=~z$w_buff1~0_In1289048642, ~z~0=~z~0_In1289048642} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1289048642|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$w_buff1~0=~z$w_buff1~0_In1289048642, ~z~0=~z~0_In1289048642} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:09:41,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1606557624 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1606557624 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1606557624|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1606557624 |P2Thread1of1ForFork0_#t~ite40_Out1606557624|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1606557624, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1606557624} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1606557624, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1606557624|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1606557624} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:09:41,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1307786193 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-1307786193 |P1Thread1of1ForFork2_#t~ite13_Out-1307786193|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1307786193| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307786193} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307786193|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307786193} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:09:41,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-1834842706 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1834842706|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1834842706 |P0Thread1of1ForFork1_#t~ite5_Out-1834842706|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1834842706} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1834842706} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:09:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1402410507 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1402410507 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1402410507 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1402410507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-1402410507 |P0Thread1of1ForFork1_#t~ite6_Out-1402410507|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1402410507} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1402410507|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1402410507} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:09:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1298049477 ~z$r_buff0_thd1~0_In1298049477)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1298049477 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$r_buff0_thd1~0_Out1298049477 0)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1298049477|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1298049477} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-658878640 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-658878640 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-658878640 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-658878640 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| ~z$r_buff1_thd1~0_In-658878640) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-658878640|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:09:41,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:09:41,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-2026386302 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-2026386302 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-2026386302 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-2026386302 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-2026386302| ~z$w_buff1_used~0_In-2026386302)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2026386302| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2026386302, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2026386302, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2026386302, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2026386302} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2026386302, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2026386302, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2026386302, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2026386302, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-2026386302|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:09:41,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1716402047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| ~z$r_buff0_thd3~0_In1716402047) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1716402047|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:09:41,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-200040396 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-200040396 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-200040396 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-200040396 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-200040396| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-200040396 |P2Thread1of1ForFork0_#t~ite43_Out-200040396|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-200040396|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In369921047 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In369921047 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In369921047 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In369921047 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out369921047|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In369921047 |P1Thread1of1ForFork2_#t~ite14_Out369921047|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In369921047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In369921047, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In369921047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In369921047, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out369921047|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-858114835 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-858114835 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-858114835| ~z$w_buff1~0_In-858114835)) (and (= |ULTIMATE.start_main_#t~ite47_Out-858114835| ~z~0_In-858114835) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-858114835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-858114835, ~z$w_buff1~0=~z$w_buff1~0_In-858114835, ~z~0=~z~0_In-858114835} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-858114835, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-858114835|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-858114835, ~z$w_buff1~0=~z$w_buff1~0_In-858114835, ~z~0=~z~0_In-858114835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-286014316 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-286014316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-286014316| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-286014316| ~z$w_buff0_used~0_In-286014316)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-286014316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-286014316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-286014316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:09:41,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1851830422 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1851830422 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1851830422 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1851830422 256)))) (or (and (= ~z$w_buff1_used~0_In1851830422 |ULTIMATE.start_main_#t~ite50_Out1851830422|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1851830422|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1851830422, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1851830422|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1851830422, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:09:41,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-233763309 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-233763309 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In-233763309 |ULTIMATE.start_main_#t~ite51_Out-233763309|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-233763309|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-233763309, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-233763309} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-233763309, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-233763309|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-233763309} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:09:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1492105421 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1492105421 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1492105421 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1492105421 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1492105421| ~z$r_buff1_thd0~0_In1492105421) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out1492105421| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1492105421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1492105421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1492105421} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1492105421|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1492105421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1492105421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1492105421} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:09:41,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:09:41,322 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:09:41 BasicIcfg [2019-12-07 11:09:41,322 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:09:41,322 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:09:41,322 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:09:41,322 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:09:41,323 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:07:58" (3/4) ... [2019-12-07 11:09:41,325 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:09:41,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L827: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= v_~z$r_buff1_thd1~0_114 0) (= v_~main$tmp_guard1~0_44 0) (= v_~z$read_delayed_var~0.offset_6 0) (= 0 v_~z$r_buff0_thd3~0_325) (= v_~z$mem_tmp~0_16 0) (= 0 v_~z$r_buff1_thd3~0_218) (= |v_#NULL.offset_3| 0) (= v_~z$read_delayed~0_8 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t409~0.base_44| 4)) (= 0 v_~weak$$choice0~0_15) (= v_~z$w_buff1~0_167 0) (= v_~z$r_buff0_thd0~0_136 0) (= v_~x~0_84 0) (= v_~z$r_buff0_thd1~0_185 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~__unbuffered_p2_EAX~0_46) (= 0 v_~weak$$choice2~0_93) (= 0 v_~__unbuffered_p1_EAX~0_60) (= v_~z$w_buff0~0_229 0) (= 0 v_~__unbuffered_p0_EAX~0_95) (= 0 v_~__unbuffered_cnt~0_63) (= v_~z$r_buff0_thd2~0_132 0) (= v_~z~0_167 0) (= |v_#valid_71| (store .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44| 1)) (= v_~main$tmp_guard0~0_44 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t409~0.base_44|) |v_ULTIMATE.start_main_~#t409~0.offset_30| 0)) |v_#memory_int_21|) (= v_~y~0_39 0) (= v_~z$w_buff1_used~0_386 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t409~0.base_44|) 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t409~0.base_44|) (= v_~__unbuffered_p2_EBX~0_54 0) (= v_~z$r_buff1_thd0~0_148 0) (= 0 |v_#NULL.base_3|) (= v_~z$w_buff0_used~0_680 0) (= v_~z$r_buff1_thd2~0_108 0) (= 0 |v_ULTIMATE.start_main_~#t409~0.offset_30|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_24|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_108, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_86|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_44|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_140|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_82|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_136, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_95, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_60, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_46, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_30|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_54, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_386, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_114, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_325, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, ~x~0=v_~x~0_84, ULTIMATE.start_main_~#t409~0.base=|v_ULTIMATE.start_main_~#t409~0.base_44|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ~z$w_buff1~0=v_~z$w_buff1~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_44, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_103|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_148, ULTIMATE.start_main_~#t409~0.offset=|v_ULTIMATE.start_main_~#t409~0.offset_30|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_19|, ~y~0=v_~y~0_39, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_132, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_680, ~z$w_buff0~0=v_~z$w_buff0~0_229, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_218, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_44, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_167, ~weak$$choice2~0=v_~weak$$choice2~0_93, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_185} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t410~0.offset, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t410~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t409~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t409~0.offset, ULTIMATE.start_main_~#t411~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L4-->L748: Formula: (and (= ~z$r_buff0_thd1~0_In263780061 ~z$r_buff1_thd1~0_Out263780061) (= 1 ~z$r_buff0_thd1~0_Out263780061) (= ~z$r_buff0_thd0~0_In263780061 ~z$r_buff1_thd0~0_Out263780061) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061)) (= ~x~0_In263780061 ~__unbuffered_p0_EAX~0_Out263780061) (= ~z$r_buff1_thd2~0_Out263780061 ~z$r_buff0_thd2~0_In263780061) (= ~z$r_buff0_thd3~0_In263780061 ~z$r_buff1_thd3~0_Out263780061)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In263780061, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In263780061, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In263780061, ~x~0=~x~0_In263780061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In263780061} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out263780061, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In263780061, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out263780061, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out263780061, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out263780061, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out263780061, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In263780061, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In263780061, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out263780061, ~x~0=~x~0_In263780061, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In263780061} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L827-1-->L829: Formula: (and (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13|) 0) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t410~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t410~0.base_13| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t410~0.base_13| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t410~0.base_13|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t410~0.base_13|) |v_ULTIMATE.start_main_~#t410~0.offset_11| 1))) (= |v_ULTIMATE.start_main_~#t410~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t410~0.offset=|v_ULTIMATE.start_main_~#t410~0.offset_11|, ULTIMATE.start_main_~#t410~0.base=|v_ULTIMATE.start_main_~#t410~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t410~0.offset, ULTIMATE.start_main_~#t410~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:09:41,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-2-->L768-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-266967960 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-266967960 256) 0)) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| |P1Thread1of1ForFork2_#t~ite10_Out-266967960|))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| ~z~0_In-266967960) .cse2) (and (not .cse1) (not .cse0) .cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-266967960| ~z$w_buff1~0_In-266967960)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-266967960, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266967960, ~z$w_buff1~0=~z$w_buff1~0_In-266967960, ~z~0=~z~0_In-266967960} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-266967960|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-266967960, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-266967960|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266967960, ~z$w_buff1~0=~z$w_buff1~0_In-266967960, ~z~0=~z~0_In-266967960} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:09:41,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1571626790 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1571626790 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-1571626790| ~z$w_buff0_used~0_In-1571626790)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out-1571626790| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1571626790} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1571626790|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1571626790} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:09:41,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In333048851 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In333048851 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In333048851 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In333048851 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out333048851| ~z$w_buff1_used~0_In333048851) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out333048851| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In333048851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In333048851, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In333048851, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In333048851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In333048851, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out333048851|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In333048851} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:09:41,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L829-1-->L831: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t411~0.base_10|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t411~0.base_10|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10| 1)) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t411~0.base_10|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t411~0.base_10| 4) |v_#length_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t411~0.base_10|) |v_ULTIMATE.start_main_~#t411~0.offset_9| 2)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t411~0.offset_9| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t411~0.base=|v_ULTIMATE.start_main_~#t411~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t411~0.offset=|v_ULTIMATE.start_main_~#t411~0.offset_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t411~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t411~0.offset, #length] because there is no mapped edge [2019-12-07 11:09:41,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L793-->L793-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1422709133 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In-1422709133| |P2Thread1of1ForFork0_#t~ite20_Out-1422709133|) (= |P2Thread1of1ForFork0_#t~ite21_Out-1422709133| ~z$w_buff0~0_In-1422709133)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1422709133| |P2Thread1of1ForFork0_#t~ite20_Out-1422709133|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1422709133 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-1422709133 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In-1422709133 256) 0) (and (= (mod ~z$w_buff1_used~0_In-1422709133 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite20_Out-1422709133| ~z$w_buff0~0_In-1422709133) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-1422709133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1422709133, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1422709133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1422709133, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1422709133, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1422709133|, ~weak$$choice2~0=~weak$$choice2~0_In-1422709133} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1422709133|, ~z$w_buff0~0=~z$w_buff0~0_In-1422709133, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1422709133, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1422709133, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1422709133, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1422709133, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1422709133|, ~weak$$choice2~0=~weak$$choice2~0_In-1422709133} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 11:09:41,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L794-->L794-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In595665996 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite24_Out595665996| ~z$w_buff1~0_In595665996) (= |P2Thread1of1ForFork0_#t~ite23_In595665996| |P2Thread1of1ForFork0_#t~ite23_Out595665996|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite24_Out595665996| |P2Thread1of1ForFork0_#t~ite23_Out595665996|) (= |P2Thread1of1ForFork0_#t~ite23_Out595665996| ~z$w_buff1~0_In595665996) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In595665996 256)))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In595665996 256))) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In595665996 256))) (= 0 (mod ~z$w_buff0_used~0_In595665996 256))))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In595665996, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In595665996, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In595665996|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In595665996, ~z$w_buff1~0=~z$w_buff1~0_In595665996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In595665996, ~weak$$choice2~0=~weak$$choice2~0_In595665996} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In595665996, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out595665996|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In595665996, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out595665996|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In595665996, ~z$w_buff1~0=~z$w_buff1~0_In595665996, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In595665996, ~weak$$choice2~0=~weak$$choice2~0_In595665996} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 11:09:41,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L797-->L798: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_160 v_~z$r_buff0_thd3~0_161)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_161, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_6|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_160, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_10|, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:09:41,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L800-->L804: Formula: (and (= v_~z~0_54 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L804-2-->L804-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1289048642 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1289048642 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1289048642| ~z$w_buff1~0_In1289048642) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out1289048642| ~z~0_In1289048642) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$w_buff1~0=~z$w_buff1~0_In1289048642, ~z~0=~z~0_In1289048642} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1289048642|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1289048642, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1289048642, ~z$w_buff1~0=~z$w_buff1~0_In1289048642, ~z~0=~z~0_In1289048642} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:09:41,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L804-4-->L805: Formula: (= v_~z~0_30 |v_P2Thread1of1ForFork0_#t~ite38_8|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_8|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_7|, ~z~0=v_~z~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L805-->L805-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1606557624 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1606557624 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1606557624|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In1606557624 |P2Thread1of1ForFork0_#t~ite40_Out1606557624|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1606557624, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1606557624} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1606557624, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1606557624|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1606557624} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:09:41,333 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1307786193 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-1307786193 |P1Thread1of1ForFork2_#t~ite13_Out-1307786193|) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out-1307786193| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307786193} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1307786193|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1307786193} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:09:41,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L749-->L749-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256))) (.cse0 (= (mod ~z$r_buff0_thd1~0_In-1834842706 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-1834842706|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1834842706 |P0Thread1of1ForFork1_#t~ite5_Out-1834842706|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1834842706} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1834842706} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:09:41,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1402410507 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1402410507 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1402410507 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out-1402410507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-1402410507 |P0Thread1of1ForFork1_#t~ite6_Out-1402410507|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1402410507} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1402410507|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1402410507} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:09:41,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L751-->L752: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1298049477 ~z$r_buff0_thd1~0_In1298049477)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1298049477 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$r_buff0_thd1~0_Out1298049477 0)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1298049477|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1298049477} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:09:41,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-658878640 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-658878640 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-658878640 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-658878640 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| ~z$r_buff1_thd1~0_In-658878640) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork1_#t~ite8_Out-658878640| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-658878640|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-658878640, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-658878640, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-658878640, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-658878640} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:09:41,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_46 1) v_~__unbuffered_cnt~0_45) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd1~0_77 |v_P0Thread1of1ForFork1_#t~ite8_22|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_46} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_21|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_77, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:09:41,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-2026386302 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-2026386302 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-2026386302 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-2026386302 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-2026386302| ~z$w_buff1_used~0_In-2026386302)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-2026386302| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2026386302, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2026386302, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2026386302, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2026386302} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2026386302, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2026386302, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2026386302, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2026386302, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-2026386302|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:09:41,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L807-->L807-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1716402047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| ~z$r_buff0_thd3~0_In1716402047) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1716402047|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:09:41,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L808-->L808-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-200040396 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-200040396 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-200040396 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-200040396 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-200040396| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-200040396 |P2Thread1of1ForFork0_#t~ite43_Out-200040396|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-200040396|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:09:41,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L808-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_131 |v_P2Thread1of1ForFork0_#t~ite43_24|) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_23|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_131, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:09:41,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L772-->L772-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In369921047 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In369921047 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In369921047 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In369921047 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out369921047|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd2~0_In369921047 |P1Thread1of1ForFork2_#t~ite14_Out369921047|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In369921047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In369921047, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In369921047, ~z$w_buff1_used~0=~z$w_buff1_used~0_In369921047, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out369921047|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:09:41,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_24| v_~z$r_buff1_thd2~0_56) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_24|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_56, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_23|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:09:41,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L835-->L837-2: Formula: (and (or (= 0 (mod v_~z$r_buff0_thd0~0_51 256)) (= 0 (mod v_~z$w_buff0_used~0_293 256))) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_51, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_293, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:09:41,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L837-2-->L837-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-858114835 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-858114835 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-858114835| ~z$w_buff1~0_In-858114835)) (and (= |ULTIMATE.start_main_#t~ite47_Out-858114835| ~z~0_In-858114835) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-858114835, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-858114835, ~z$w_buff1~0=~z$w_buff1~0_In-858114835, ~z~0=~z~0_In-858114835} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-858114835, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-858114835|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-858114835, ~z$w_buff1~0=~z$w_buff1~0_In-858114835, ~z~0=~z~0_In-858114835} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:09:41,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L837-4-->L838: Formula: (= v_~z~0_20 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_14|, ~z~0=v_~z~0_20} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 11:09:41,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L838-->L838-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-286014316 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-286014316 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-286014316| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-286014316| ~z$w_buff0_used~0_In-286014316)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-286014316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-286014316, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-286014316|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:09:41,338 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L839-->L839-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1851830422 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1851830422 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1851830422 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In1851830422 256)))) (or (and (= ~z$w_buff1_used~0_In1851830422 |ULTIMATE.start_main_#t~ite50_Out1851830422|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite50_Out1851830422|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1851830422, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1851830422|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1851830422, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:09:41,338 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L840-->L840-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-233763309 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-233763309 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In-233763309 |ULTIMATE.start_main_#t~ite51_Out-233763309|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-233763309|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-233763309, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-233763309} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-233763309, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-233763309|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-233763309} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:09:41,339 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L841-->L841-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1492105421 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1492105421 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1492105421 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1492105421 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1492105421| ~z$r_buff1_thd0~0_In1492105421) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out1492105421| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1492105421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1492105421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1492105421} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1492105421|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1492105421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1492105421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1492105421} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:09:41,339 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [896] [896] L841-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_23 256)) (= v_~z$r_buff1_thd0~0_123 |v_ULTIMATE.start_main_#t~ite52_43|) (= v_~main$tmp_guard1~0_23 (ite (= (ite (not (and (= 0 v_~__unbuffered_p0_EAX~0_72) (= v_~__unbuffered_p2_EBX~0_32 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_72, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_123, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:09:41,402 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b1ea27a9-1625-4047-bbb8-5e1c14fbb45c/bin/utaipan/witness.graphml [2019-12-07 11:09:41,402 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:09:41,404 INFO L168 Benchmark]: Toolchain (without parser) took 103273.23 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 933.5 MB in the beginning and 5.1 GB in the end (delta: -4.2 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 11:09:41,404 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.0 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:09:41,404 INFO L168 Benchmark]: CACSL2BoogieTranslator took 378.21 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 933.5 MB in the beginning and 1.1 GB in the end (delta: -123.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:09:41,404 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:09:41,404 INFO L168 Benchmark]: Boogie Preprocessor took 26.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:09:41,405 INFO L168 Benchmark]: RCFGBuilder took 419.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.3 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 11:09:41,405 INFO L168 Benchmark]: TraceAbstraction took 102326.73 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.4 GB). Free memory was 992.0 MB in the beginning and 5.2 GB in the end (delta: -4.2 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. [2019-12-07 11:09:41,405 INFO L168 Benchmark]: Witness Printer took 80.36 ms. Allocated memory is still 6.6 GB. Free memory was 5.2 GB in the beginning and 5.1 GB in the end (delta: 42.9 MB). Peak memory consumption was 42.9 MB. Max. memory is 11.5 GB. [2019-12-07 11:09:41,406 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.0 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 378.21 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 933.5 MB in the beginning and 1.1 GB in the end (delta: -123.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.16 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.43 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 419.98 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.3 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 102326.73 ms. Allocated memory was 1.1 GB in the beginning and 6.6 GB in the end (delta: 5.4 GB). Free memory was 992.0 MB in the beginning and 5.2 GB in the end (delta: -4.2 GB). Peak memory consumption was 1.3 GB. Max. memory is 11.5 GB. * Witness Printer took 80.36 ms. Allocated memory is still 6.6 GB. Free memory was 5.2 GB in the beginning and 5.1 GB in the end (delta: 42.9 MB). Peak memory consumption was 42.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 101 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 51 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 32 ChoiceCompositions, 7082 VarBasedMoverChecksPositive, 219 VarBasedMoverChecksNegative, 19 SemBasedMoverChecksPositive, 262 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 89688 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L827] FCALL, FORK 0 pthread_create(&t409, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L733] 1 z$w_buff1 = z$w_buff0 [L734] 1 z$w_buff0 = 1 [L735] 1 z$w_buff1_used = z$w_buff0_used [L736] 1 z$w_buff0_used = (_Bool)1 [L829] FCALL, FORK 0 pthread_create(&t410, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 2 x = 1 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L769] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L831] FCALL, FORK 0 pthread_create(&t411, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L782] 3 y = 1 [L785] 3 __unbuffered_p2_EAX = y [L788] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L789] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L790] 3 z$flush_delayed = weak$$choice2 [L791] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L792] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L793] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L794] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L795] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L798] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L799] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L770] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L771] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L748] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L748] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L749] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L750] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L806] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L807] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L838] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L839] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L840] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 102.1s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 19.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6747 SDtfs, 8347 SDslu, 16401 SDs, 0 SdLazy, 8591 SolverSat, 430 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 343 GetRequests, 79 SyntacticMatches, 24 SemanticMatches, 240 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 843 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=183252occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 64.2s AutomataMinimizationTime, 31 MinimizatonAttempts, 390431 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 1294 NumberOfCodeBlocks, 1294 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1196 ConstructedInterpolants, 0 QuantifiedInterpolants, 304302 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...