./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 11c50d08e8481b350dfcaad1c8d1e849db14914e .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:12:58,253 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:12:58,255 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:12:58,262 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:12:58,262 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:12:58,263 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:12:58,264 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:12:58,265 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:12:58,266 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:12:58,267 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:12:58,267 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:12:58,268 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:12:58,268 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:12:58,269 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:12:58,270 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:12:58,271 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:12:58,271 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:12:58,272 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:12:58,273 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:12:58,274 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:12:58,276 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:12:58,277 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:12:58,278 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:12:58,278 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:12:58,280 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:12:58,280 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:12:58,280 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:12:58,281 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:12:58,281 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:12:58,282 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:12:58,282 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:12:58,283 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:12:58,283 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:12:58,284 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:12:58,285 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:12:58,285 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:12:58,285 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:12:58,285 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:12:58,286 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:12:58,286 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:12:58,287 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:12:58,287 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 10:12:58,301 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:12:58,301 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:12:58,302 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 10:12:58,302 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 10:12:58,302 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 10:12:58,302 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 10:12:58,302 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 10:12:58,303 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 10:12:58,303 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 10:12:58,303 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 10:12:58,303 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 10:12:58,303 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 10:12:58,303 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 10:12:58,304 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 10:12:58,304 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 10:12:58,304 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:12:58,305 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:12:58,306 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:12:58,306 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 10:12:58,306 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:12:58,306 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:12:58,306 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:12:58,307 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:12:58,307 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:12:58,307 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:12:58,307 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:12:58,307 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:12:58,308 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:12:58,308 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:12:58,308 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:12:58,308 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 10:12:58,308 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:12:58,308 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:12:58,309 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:12:58,309 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 10:12:58,309 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 11c50d08e8481b350dfcaad1c8d1e849db14914e [2019-12-07 10:12:58,412 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:12:58,422 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:12:58,425 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:12:58,426 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:12:58,426 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:12:58,427 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix017_power.opt.i [2019-12-07 10:12:58,467 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/data/badd6c8f2/6d9c2ece50814dd8affdd0b390248b97/FLAGa8d6ed95b [2019-12-07 10:12:58,899 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:12:58,900 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/sv-benchmarks/c/pthread-wmm/mix017_power.opt.i [2019-12-07 10:12:58,911 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/data/badd6c8f2/6d9c2ece50814dd8affdd0b390248b97/FLAGa8d6ed95b [2019-12-07 10:12:59,248 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/data/badd6c8f2/6d9c2ece50814dd8affdd0b390248b97 [2019-12-07 10:12:59,253 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:12:59,255 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:12:59,256 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:12:59,257 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:12:59,261 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:12:59,262 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,266 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59, skipping insertion in model container [2019-12-07 10:12:59,266 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,273 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:12:59,304 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:12:59,566 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:12:59,573 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:12:59,614 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:12:59,659 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:12:59,659 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59 WrapperNode [2019-12-07 10:12:59,659 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:12:59,660 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:12:59,660 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:12:59,660 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:12:59,665 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,678 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,696 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:12:59,696 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:12:59,696 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:12:59,696 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:12:59,702 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,703 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,706 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,706 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,713 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,716 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,718 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... [2019-12-07 10:12:59,721 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:12:59,721 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:12:59,722 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:12:59,722 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:12:59,722 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:12:59,761 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:12:59,761 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:12:59,761 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:12:59,762 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:12:59,762 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:12:59,762 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 10:12:59,762 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 10:12:59,762 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:12:59,762 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:12:59,762 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:12:59,763 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:13:00,104 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:13:00,104 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:13:00,105 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:13:00 BoogieIcfgContainer [2019-12-07 10:13:00,105 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:13:00,106 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:13:00,106 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:13:00,108 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:13:00,108 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:12:59" (1/3) ... [2019-12-07 10:13:00,108 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ccc30ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:13:00, skipping insertion in model container [2019-12-07 10:13:00,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:12:59" (2/3) ... [2019-12-07 10:13:00,109 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ccc30ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:13:00, skipping insertion in model container [2019-12-07 10:13:00,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:13:00" (3/3) ... [2019-12-07 10:13:00,110 INFO L109 eAbstractionObserver]: Analyzing ICFG mix017_power.opt.i [2019-12-07 10:13:00,116 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:13:00,116 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:13:00,121 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:13:00,122 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:13:00,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,147 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,147 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,148 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,148 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,149 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,150 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,151 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,152 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,153 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,154 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,155 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,156 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,157 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,158 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,159 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,160 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,161 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,162 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,163 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,164 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,165 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,166 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,167 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,167 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:13:00,180 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 10:13:00,193 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:13:00,193 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:13:00,193 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:13:00,193 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:13:00,194 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:13:00,194 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:13:00,194 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:13:00,194 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:13:00,208 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-07 10:13:00,209 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 10:13:00,282 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 10:13:00,282 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:13:00,293 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 715 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 10:13:00,308 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 10:13:00,350 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 10:13:00,350 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:13:00,359 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 715 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 10:13:00,376 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 10:13:00,377 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:13:03,672 WARN L192 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 53 DAG size of output: 49 [2019-12-07 10:13:03,940 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-07 10:13:04,041 INFO L206 etLargeBlockEncoding]: Checked pairs total: 72619 [2019-12-07 10:13:04,041 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 10:13:04,043 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 88 places, 92 transitions [2019-12-07 10:13:31,790 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 160086 states. [2019-12-07 10:13:31,791 INFO L276 IsEmpty]: Start isEmpty. Operand 160086 states. [2019-12-07 10:13:31,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 10:13:31,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:13:31,796 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:13:31,796 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:13:31,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:13:31,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1489169700, now seen corresponding path program 1 times [2019-12-07 10:13:31,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:13:31,806 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620721662] [2019-12-07 10:13:31,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:13:31,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:13:31,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:13:31,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620721662] [2019-12-07 10:13:31,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:13:31,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:13:31,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520015857] [2019-12-07 10:13:31,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:13:31,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:13:31,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:13:31,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:13:31,968 INFO L87 Difference]: Start difference. First operand 160086 states. Second operand 3 states. [2019-12-07 10:13:32,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:13:32,937 INFO L93 Difference]: Finished difference Result 158106 states and 752394 transitions. [2019-12-07 10:13:32,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:13:32,939 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 10:13:32,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:13:35,297 INFO L225 Difference]: With dead ends: 158106 [2019-12-07 10:13:35,297 INFO L226 Difference]: Without dead ends: 149058 [2019-12-07 10:13:35,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:13:40,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149058 states. [2019-12-07 10:13:43,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149058 to 149058. [2019-12-07 10:13:43,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149058 states. [2019-12-07 10:13:43,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149058 states to 149058 states and 708428 transitions. [2019-12-07 10:13:43,651 INFO L78 Accepts]: Start accepts. Automaton has 149058 states and 708428 transitions. Word has length 7 [2019-12-07 10:13:43,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:13:43,653 INFO L462 AbstractCegarLoop]: Abstraction has 149058 states and 708428 transitions. [2019-12-07 10:13:43,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:13:43,653 INFO L276 IsEmpty]: Start isEmpty. Operand 149058 states and 708428 transitions. [2019-12-07 10:13:43,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 10:13:43,663 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:13:43,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:13:43,664 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:13:43,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:13:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1593754123, now seen corresponding path program 1 times [2019-12-07 10:13:43,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:13:43,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723760057] [2019-12-07 10:13:43,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:13:43,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:13:43,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:13:43,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723760057] [2019-12-07 10:13:43,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:13:43,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:13:43,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120691434] [2019-12-07 10:13:43,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:13:43,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:13:43,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:13:43,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:13:43,739 INFO L87 Difference]: Start difference. First operand 149058 states and 708428 transitions. Second operand 4 states. [2019-12-07 10:13:47,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:13:47,316 INFO L93 Difference]: Finished difference Result 235386 states and 1077036 transitions. [2019-12-07 10:13:47,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:13:47,317 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 10:13:47,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:13:48,015 INFO L225 Difference]: With dead ends: 235386 [2019-12-07 10:13:48,015 INFO L226 Difference]: Without dead ends: 235190 [2019-12-07 10:13:48,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:13:54,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235190 states. [2019-12-07 10:13:58,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235190 to 218838. [2019-12-07 10:13:58,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218838 states. [2019-12-07 10:13:58,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218838 states to 218838 states and 1009170 transitions. [2019-12-07 10:13:58,997 INFO L78 Accepts]: Start accepts. Automaton has 218838 states and 1009170 transitions. Word has length 15 [2019-12-07 10:13:58,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:13:58,997 INFO L462 AbstractCegarLoop]: Abstraction has 218838 states and 1009170 transitions. [2019-12-07 10:13:58,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:13:58,997 INFO L276 IsEmpty]: Start isEmpty. Operand 218838 states and 1009170 transitions. [2019-12-07 10:13:59,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 10:13:59,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:13:59,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:13:59,001 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:13:59,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:13:59,002 INFO L82 PathProgramCache]: Analyzing trace with hash -314430534, now seen corresponding path program 1 times [2019-12-07 10:13:59,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:13:59,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632783198] [2019-12-07 10:13:59,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:13:59,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:13:59,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:13:59,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632783198] [2019-12-07 10:13:59,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:13:59,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:13:59,052 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560092610] [2019-12-07 10:13:59,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:13:59,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:13:59,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:13:59,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:13:59,053 INFO L87 Difference]: Start difference. First operand 218838 states and 1009170 transitions. Second operand 4 states. [2019-12-07 10:14:03,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:03,934 INFO L93 Difference]: Finished difference Result 303492 states and 1373977 transitions. [2019-12-07 10:14:03,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:14:03,935 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 10:14:03,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:04,778 INFO L225 Difference]: With dead ends: 303492 [2019-12-07 10:14:04,778 INFO L226 Difference]: Without dead ends: 303268 [2019-12-07 10:14:04,778 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:14:12,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303268 states. [2019-12-07 10:14:16,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303268 to 258620. [2019-12-07 10:14:16,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258620 states. [2019-12-07 10:14:17,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258620 states to 258620 states and 1186875 transitions. [2019-12-07 10:14:17,513 INFO L78 Accepts]: Start accepts. Automaton has 258620 states and 1186875 transitions. Word has length 15 [2019-12-07 10:14:17,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:14:17,513 INFO L462 AbstractCegarLoop]: Abstraction has 258620 states and 1186875 transitions. [2019-12-07 10:14:17,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:14:17,513 INFO L276 IsEmpty]: Start isEmpty. Operand 258620 states and 1186875 transitions. [2019-12-07 10:14:17,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:14:17,518 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:17,518 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:14:17,519 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:17,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:17,519 INFO L82 PathProgramCache]: Analyzing trace with hash 24118251, now seen corresponding path program 1 times [2019-12-07 10:14:17,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:17,519 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1886817135] [2019-12-07 10:14:17,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:17,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:17,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:17,559 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1886817135] [2019-12-07 10:14:17,559 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:17,559 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:14:17,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607053795] [2019-12-07 10:14:17,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:14:17,560 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:17,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:14:17,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:14:17,560 INFO L87 Difference]: Start difference. First operand 258620 states and 1186875 transitions. Second operand 4 states. [2019-12-07 10:14:19,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:19,839 INFO L93 Difference]: Finished difference Result 318782 states and 1453762 transitions. [2019-12-07 10:14:19,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:14:19,840 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:14:19,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:20,746 INFO L225 Difference]: With dead ends: 318782 [2019-12-07 10:14:20,746 INFO L226 Difference]: Without dead ends: 318590 [2019-12-07 10:14:20,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:14:32,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318590 states. [2019-12-07 10:14:36,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318590 to 272736. [2019-12-07 10:14:36,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 272736 states. [2019-12-07 10:14:37,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 272736 states to 272736 states and 1251733 transitions. [2019-12-07 10:14:37,378 INFO L78 Accepts]: Start accepts. Automaton has 272736 states and 1251733 transitions. Word has length 16 [2019-12-07 10:14:37,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:14:37,379 INFO L462 AbstractCegarLoop]: Abstraction has 272736 states and 1251733 transitions. [2019-12-07 10:14:37,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:14:37,379 INFO L276 IsEmpty]: Start isEmpty. Operand 272736 states and 1251733 transitions. [2019-12-07 10:14:37,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 10:14:37,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:37,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:14:37,399 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:37,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:37,400 INFO L82 PathProgramCache]: Analyzing trace with hash 481033317, now seen corresponding path program 1 times [2019-12-07 10:14:37,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:37,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93517263] [2019-12-07 10:14:37,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:37,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:37,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:37,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93517263] [2019-12-07 10:14:37,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:37,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:14:37,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831210876] [2019-12-07 10:14:37,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:14:37,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:37,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:14:37,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:14:37,464 INFO L87 Difference]: Start difference. First operand 272736 states and 1251733 transitions. Second operand 3 states. [2019-12-07 10:14:39,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:39,229 INFO L93 Difference]: Finished difference Result 257256 states and 1169111 transitions. [2019-12-07 10:14:39,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:14:39,230 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 10:14:39,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:39,967 INFO L225 Difference]: With dead ends: 257256 [2019-12-07 10:14:39,968 INFO L226 Difference]: Without dead ends: 257256 [2019-12-07 10:14:39,968 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:14:50,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257256 states. [2019-12-07 10:14:53,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257256 to 253496. [2019-12-07 10:14:53,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253496 states. [2019-12-07 10:14:54,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253496 states to 253496 states and 1152927 transitions. [2019-12-07 10:14:54,990 INFO L78 Accepts]: Start accepts. Automaton has 253496 states and 1152927 transitions. Word has length 20 [2019-12-07 10:14:54,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:14:54,990 INFO L462 AbstractCegarLoop]: Abstraction has 253496 states and 1152927 transitions. [2019-12-07 10:14:54,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:14:54,990 INFO L276 IsEmpty]: Start isEmpty. Operand 253496 states and 1152927 transitions. [2019-12-07 10:14:55,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 10:14:55,006 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:55,006 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:14:55,006 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:55,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:55,007 INFO L82 PathProgramCache]: Analyzing trace with hash -1780429858, now seen corresponding path program 1 times [2019-12-07 10:14:55,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:55,007 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118670778] [2019-12-07 10:14:55,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:55,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:55,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:55,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118670778] [2019-12-07 10:14:55,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:55,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:14:55,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507770784] [2019-12-07 10:14:55,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:14:55,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:55,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:14:55,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:14:55,071 INFO L87 Difference]: Start difference. First operand 253496 states and 1152927 transitions. Second operand 3 states. [2019-12-07 10:14:56,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:56,921 INFO L93 Difference]: Finished difference Result 254994 states and 1157206 transitions. [2019-12-07 10:14:56,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:14:56,922 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 10:14:56,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:57,625 INFO L225 Difference]: With dead ends: 254994 [2019-12-07 10:14:57,625 INFO L226 Difference]: Without dead ends: 254994 [2019-12-07 10:14:57,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:04,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254994 states. [2019-12-07 10:15:11,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254994 to 253407. [2019-12-07 10:15:11,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253407 states. [2019-12-07 10:15:12,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253407 states to 253407 states and 1152462 transitions. [2019-12-07 10:15:12,648 INFO L78 Accepts]: Start accepts. Automaton has 253407 states and 1152462 transitions. Word has length 20 [2019-12-07 10:15:12,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:12,648 INFO L462 AbstractCegarLoop]: Abstraction has 253407 states and 1152462 transitions. [2019-12-07 10:15:12,648 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:15:12,648 INFO L276 IsEmpty]: Start isEmpty. Operand 253407 states and 1152462 transitions. [2019-12-07 10:15:12,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 10:15:12,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:12,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:12,667 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:12,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:12,667 INFO L82 PathProgramCache]: Analyzing trace with hash -1351598936, now seen corresponding path program 1 times [2019-12-07 10:15:12,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:12,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041298059] [2019-12-07 10:15:12,667 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:12,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:12,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:12,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041298059] [2019-12-07 10:15:12,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:12,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:12,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203041909] [2019-12-07 10:15:12,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:15:12,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:12,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:15:12,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:15:12,701 INFO L87 Difference]: Start difference. First operand 253407 states and 1152462 transitions. Second operand 4 states. [2019-12-07 10:15:12,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:12,840 INFO L93 Difference]: Finished difference Result 37832 states and 132271 transitions. [2019-12-07 10:15:12,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:15:12,841 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 10:15:12,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:12,903 INFO L225 Difference]: With dead ends: 37832 [2019-12-07 10:15:12,903 INFO L226 Difference]: Without dead ends: 37832 [2019-12-07 10:15:12,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:15:13,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37832 states. [2019-12-07 10:15:13,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37832 to 37832. [2019-12-07 10:15:13,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37832 states. [2019-12-07 10:15:13,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37832 states to 37832 states and 132271 transitions. [2019-12-07 10:15:13,564 INFO L78 Accepts]: Start accepts. Automaton has 37832 states and 132271 transitions. Word has length 21 [2019-12-07 10:15:13,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:13,564 INFO L462 AbstractCegarLoop]: Abstraction has 37832 states and 132271 transitions. [2019-12-07 10:15:13,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:15:13,564 INFO L276 IsEmpty]: Start isEmpty. Operand 37832 states and 132271 transitions. [2019-12-07 10:15:13,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 10:15:13,574 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:13,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:13,575 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:13,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:13,575 INFO L82 PathProgramCache]: Analyzing trace with hash -116240952, now seen corresponding path program 1 times [2019-12-07 10:15:13,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:13,575 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184626971] [2019-12-07 10:15:13,575 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:13,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:13,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:13,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184626971] [2019-12-07 10:15:13,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:13,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:13,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366824036] [2019-12-07 10:15:13,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:15:13,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:13,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:15:13,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:13,635 INFO L87 Difference]: Start difference. First operand 37832 states and 132271 transitions. Second operand 5 states. [2019-12-07 10:15:14,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:14,005 INFO L93 Difference]: Finished difference Result 48863 states and 168620 transitions. [2019-12-07 10:15:14,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:15:14,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2019-12-07 10:15:14,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:14,083 INFO L225 Difference]: With dead ends: 48863 [2019-12-07 10:15:14,083 INFO L226 Difference]: Without dead ends: 48840 [2019-12-07 10:15:14,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:15:14,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48840 states. [2019-12-07 10:15:14,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48840 to 37383. [2019-12-07 10:15:14,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37383 states. [2019-12-07 10:15:15,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37383 states to 37383 states and 130512 transitions. [2019-12-07 10:15:15,229 INFO L78 Accepts]: Start accepts. Automaton has 37383 states and 130512 transitions. Word has length 24 [2019-12-07 10:15:15,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:15,230 INFO L462 AbstractCegarLoop]: Abstraction has 37383 states and 130512 transitions. [2019-12-07 10:15:15,230 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:15:15,230 INFO L276 IsEmpty]: Start isEmpty. Operand 37383 states and 130512 transitions. [2019-12-07 10:15:15,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:15:15,246 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:15,246 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:15,246 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:15,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:15,246 INFO L82 PathProgramCache]: Analyzing trace with hash 2109697444, now seen corresponding path program 1 times [2019-12-07 10:15:15,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:15,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784604060] [2019-12-07 10:15:15,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:15,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:15,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:15,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784604060] [2019-12-07 10:15:15,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:15,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:15,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507110707] [2019-12-07 10:15:15,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:15:15,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:15,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:15:15,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:15,298 INFO L87 Difference]: Start difference. First operand 37383 states and 130512 transitions. Second operand 5 states. [2019-12-07 10:15:15,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:15,674 INFO L93 Difference]: Finished difference Result 50801 states and 173814 transitions. [2019-12-07 10:15:15,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:15:15,674 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:15:15,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:15,769 INFO L225 Difference]: With dead ends: 50801 [2019-12-07 10:15:15,769 INFO L226 Difference]: Without dead ends: 50775 [2019-12-07 10:15:15,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:15:16,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50775 states. [2019-12-07 10:15:16,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50775 to 43314. [2019-12-07 10:15:16,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43314 states. [2019-12-07 10:15:16,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43314 states to 43314 states and 149950 transitions. [2019-12-07 10:15:16,580 INFO L78 Accepts]: Start accepts. Automaton has 43314 states and 149950 transitions. Word has length 28 [2019-12-07 10:15:16,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:16,580 INFO L462 AbstractCegarLoop]: Abstraction has 43314 states and 149950 transitions. [2019-12-07 10:15:16,580 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:15:16,580 INFO L276 IsEmpty]: Start isEmpty. Operand 43314 states and 149950 transitions. [2019-12-07 10:15:16,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 10:15:16,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:16,605 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:16,606 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:16,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:16,606 INFO L82 PathProgramCache]: Analyzing trace with hash -1513171326, now seen corresponding path program 1 times [2019-12-07 10:15:16,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:16,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982062339] [2019-12-07 10:15:16,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:16,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:16,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:16,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982062339] [2019-12-07 10:15:16,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:16,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:15:16,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016470265] [2019-12-07 10:15:16,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:15:16,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:16,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:15:16,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:16,653 INFO L87 Difference]: Start difference. First operand 43314 states and 149950 transitions. Second operand 5 states. [2019-12-07 10:15:16,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:16,750 INFO L93 Difference]: Finished difference Result 21639 states and 77054 transitions. [2019-12-07 10:15:16,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:15:16,750 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 10:15:16,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:16,782 INFO L225 Difference]: With dead ends: 21639 [2019-12-07 10:15:16,782 INFO L226 Difference]: Without dead ends: 21639 [2019-12-07 10:15:16,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:16,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21639 states. [2019-12-07 10:15:17,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21639 to 21079. [2019-12-07 10:15:17,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21079 states. [2019-12-07 10:15:17,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21079 states to 21079 states and 75062 transitions. [2019-12-07 10:15:17,110 INFO L78 Accepts]: Start accepts. Automaton has 21079 states and 75062 transitions. Word has length 31 [2019-12-07 10:15:17,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:17,110 INFO L462 AbstractCegarLoop]: Abstraction has 21079 states and 75062 transitions. [2019-12-07 10:15:17,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:15:17,110 INFO L276 IsEmpty]: Start isEmpty. Operand 21079 states and 75062 transitions. [2019-12-07 10:15:17,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 10:15:17,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:17,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:17,135 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:17,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:17,135 INFO L82 PathProgramCache]: Analyzing trace with hash 328211609, now seen corresponding path program 1 times [2019-12-07 10:15:17,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:17,135 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621858464] [2019-12-07 10:15:17,135 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:17,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:17,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:17,183 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621858464] [2019-12-07 10:15:17,183 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:17,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:15:17,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1715535533] [2019-12-07 10:15:17,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:15:17,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:17,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:15:17,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:17,184 INFO L87 Difference]: Start difference. First operand 21079 states and 75062 transitions. Second operand 5 states. [2019-12-07 10:15:17,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:17,564 INFO L93 Difference]: Finished difference Result 31393 states and 110678 transitions. [2019-12-07 10:15:17,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:15:17,564 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-07 10:15:17,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:17,713 INFO L225 Difference]: With dead ends: 31393 [2019-12-07 10:15:17,713 INFO L226 Difference]: Without dead ends: 31393 [2019-12-07 10:15:17,713 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:15:17,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31393 states. [2019-12-07 10:15:18,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31393 to 27540. [2019-12-07 10:15:18,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27540 states. [2019-12-07 10:15:18,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27540 states to 27540 states and 97883 transitions. [2019-12-07 10:15:18,177 INFO L78 Accepts]: Start accepts. Automaton has 27540 states and 97883 transitions. Word has length 43 [2019-12-07 10:15:18,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:18,178 INFO L462 AbstractCegarLoop]: Abstraction has 27540 states and 97883 transitions. [2019-12-07 10:15:18,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:15:18,178 INFO L276 IsEmpty]: Start isEmpty. Operand 27540 states and 97883 transitions. [2019-12-07 10:15:18,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 10:15:18,213 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:18,213 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:18,213 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:18,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:18,213 INFO L82 PathProgramCache]: Analyzing trace with hash 1193847249, now seen corresponding path program 2 times [2019-12-07 10:15:18,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:18,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747769408] [2019-12-07 10:15:18,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:18,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:18,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:18,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747769408] [2019-12-07 10:15:18,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:18,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:15:18,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302992686] [2019-12-07 10:15:18,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:15:18,263 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:18,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:15:18,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:18,264 INFO L87 Difference]: Start difference. First operand 27540 states and 97883 transitions. Second operand 3 states. [2019-12-07 10:15:18,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:18,365 INFO L93 Difference]: Finished difference Result 27540 states and 96959 transitions. [2019-12-07 10:15:18,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:15:18,366 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 43 [2019-12-07 10:15:18,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:18,415 INFO L225 Difference]: With dead ends: 27540 [2019-12-07 10:15:18,415 INFO L226 Difference]: Without dead ends: 27540 [2019-12-07 10:15:18,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:18,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27540 states. [2019-12-07 10:15:18,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27540 to 26744. [2019-12-07 10:15:18,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26744 states. [2019-12-07 10:15:18,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26744 states to 26744 states and 94261 transitions. [2019-12-07 10:15:18,862 INFO L78 Accepts]: Start accepts. Automaton has 26744 states and 94261 transitions. Word has length 43 [2019-12-07 10:15:18,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:18,862 INFO L462 AbstractCegarLoop]: Abstraction has 26744 states and 94261 transitions. [2019-12-07 10:15:18,862 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:15:18,862 INFO L276 IsEmpty]: Start isEmpty. Operand 26744 states and 94261 transitions. [2019-12-07 10:15:18,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 10:15:18,896 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:18,897 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:18,897 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:18,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:18,897 INFO L82 PathProgramCache]: Analyzing trace with hash -233422742, now seen corresponding path program 1 times [2019-12-07 10:15:18,897 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:18,897 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992947199] [2019-12-07 10:15:18,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:18,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:18,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:18,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [992947199] [2019-12-07 10:15:18,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:18,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:15:18,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695507232] [2019-12-07 10:15:18,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:15:18,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:18,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:15:18,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:15:18,939 INFO L87 Difference]: Start difference. First operand 26744 states and 94261 transitions. Second operand 6 states. [2019-12-07 10:15:19,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:19,054 INFO L93 Difference]: Finished difference Result 25314 states and 90848 transitions. [2019-12-07 10:15:19,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:15:19,054 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 10:15:19,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:19,099 INFO L225 Difference]: With dead ends: 25314 [2019-12-07 10:15:19,099 INFO L226 Difference]: Without dead ends: 25314 [2019-12-07 10:15:19,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:15:19,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25314 states. [2019-12-07 10:15:19,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25314 to 23442. [2019-12-07 10:15:19,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23442 states. [2019-12-07 10:15:19,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23442 states to 23442 states and 84210 transitions. [2019-12-07 10:15:19,488 INFO L78 Accepts]: Start accepts. Automaton has 23442 states and 84210 transitions. Word has length 43 [2019-12-07 10:15:19,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:19,488 INFO L462 AbstractCegarLoop]: Abstraction has 23442 states and 84210 transitions. [2019-12-07 10:15:19,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:15:19,488 INFO L276 IsEmpty]: Start isEmpty. Operand 23442 states and 84210 transitions. [2019-12-07 10:15:19,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:19,513 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:19,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:19,513 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:19,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:19,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1812975080, now seen corresponding path program 1 times [2019-12-07 10:15:19,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:19,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34738900] [2019-12-07 10:15:19,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:19,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:19,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:19,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34738900] [2019-12-07 10:15:19,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:19,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:15:19,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [842565727] [2019-12-07 10:15:19,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:15:19,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:19,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:15:19,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:15:19,671 INFO L87 Difference]: Start difference. First operand 23442 states and 84210 transitions. Second operand 11 states. [2019-12-07 10:15:20,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:20,681 INFO L93 Difference]: Finished difference Result 65663 states and 212917 transitions. [2019-12-07 10:15:20,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 10:15:20,682 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 10:15:20,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:20,734 INFO L225 Difference]: With dead ends: 65663 [2019-12-07 10:15:20,734 INFO L226 Difference]: Without dead ends: 36158 [2019-12-07 10:15:20,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=239, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:15:20,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36158 states. [2019-12-07 10:15:21,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36158 to 23421. [2019-12-07 10:15:21,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23421 states. [2019-12-07 10:15:21,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23421 states to 23421 states and 82526 transitions. [2019-12-07 10:15:21,215 INFO L78 Accepts]: Start accepts. Automaton has 23421 states and 82526 transitions. Word has length 59 [2019-12-07 10:15:21,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:21,216 INFO L462 AbstractCegarLoop]: Abstraction has 23421 states and 82526 transitions. [2019-12-07 10:15:21,216 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:15:21,216 INFO L276 IsEmpty]: Start isEmpty. Operand 23421 states and 82526 transitions. [2019-12-07 10:15:21,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:21,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:21,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:21,241 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:21,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:21,241 INFO L82 PathProgramCache]: Analyzing trace with hash -185251466, now seen corresponding path program 2 times [2019-12-07 10:15:21,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:21,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698631149] [2019-12-07 10:15:21,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:21,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:21,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:21,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698631149] [2019-12-07 10:15:21,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:21,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:21,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614495523] [2019-12-07 10:15:21,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:15:21,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:21,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:15:21,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:15:21,284 INFO L87 Difference]: Start difference. First operand 23421 states and 82526 transitions. Second operand 4 states. [2019-12-07 10:15:21,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:21,386 INFO L93 Difference]: Finished difference Result 34628 states and 117676 transitions. [2019-12-07 10:15:21,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:15:21,386 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 59 [2019-12-07 10:15:21,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:21,400 INFO L225 Difference]: With dead ends: 34628 [2019-12-07 10:15:21,400 INFO L226 Difference]: Without dead ends: 12111 [2019-12-07 10:15:21,400 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:21,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12111 states. [2019-12-07 10:15:21,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12111 to 12111. [2019-12-07 10:15:21,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12111 states. [2019-12-07 10:15:21,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12111 states to 12111 states and 37675 transitions. [2019-12-07 10:15:21,565 INFO L78 Accepts]: Start accepts. Automaton has 12111 states and 37675 transitions. Word has length 59 [2019-12-07 10:15:21,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:21,566 INFO L462 AbstractCegarLoop]: Abstraction has 12111 states and 37675 transitions. [2019-12-07 10:15:21,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:15:21,566 INFO L276 IsEmpty]: Start isEmpty. Operand 12111 states and 37675 transitions. [2019-12-07 10:15:21,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:21,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:21,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:21,576 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:21,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:21,576 INFO L82 PathProgramCache]: Analyzing trace with hash 530809076, now seen corresponding path program 3 times [2019-12-07 10:15:21,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:21,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118721447] [2019-12-07 10:15:21,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:21,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:21,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:21,705 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118721447] [2019-12-07 10:15:21,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:21,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:15:21,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647806057] [2019-12-07 10:15:21,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:15:21,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:21,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:15:21,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:15:21,706 INFO L87 Difference]: Start difference. First operand 12111 states and 37675 transitions. Second operand 11 states. [2019-12-07 10:15:22,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:22,526 INFO L93 Difference]: Finished difference Result 21800 states and 67300 transitions. [2019-12-07 10:15:22,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 10:15:22,526 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 10:15:22,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:22,544 INFO L225 Difference]: With dead ends: 21800 [2019-12-07 10:15:22,544 INFO L226 Difference]: Without dead ends: 16187 [2019-12-07 10:15:22,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:15:22,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16187 states. [2019-12-07 10:15:22,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16187 to 14203. [2019-12-07 10:15:22,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14203 states. [2019-12-07 10:15:22,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14203 states to 14203 states and 43803 transitions. [2019-12-07 10:15:22,756 INFO L78 Accepts]: Start accepts. Automaton has 14203 states and 43803 transitions. Word has length 59 [2019-12-07 10:15:22,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:22,756 INFO L462 AbstractCegarLoop]: Abstraction has 14203 states and 43803 transitions. [2019-12-07 10:15:22,756 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:15:22,756 INFO L276 IsEmpty]: Start isEmpty. Operand 14203 states and 43803 transitions. [2019-12-07 10:15:22,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:22,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:22,770 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:22,770 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:22,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:22,771 INFO L82 PathProgramCache]: Analyzing trace with hash 1911038550, now seen corresponding path program 4 times [2019-12-07 10:15:22,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:22,771 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [367742936] [2019-12-07 10:15:22,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:22,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:22,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:22,876 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [367742936] [2019-12-07 10:15:22,876 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:22,876 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:15:22,876 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [262781338] [2019-12-07 10:15:22,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:15:22,877 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:22,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:15:22,877 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:15:22,877 INFO L87 Difference]: Start difference. First operand 14203 states and 43803 transitions. Second operand 10 states. [2019-12-07 10:15:23,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:23,595 INFO L93 Difference]: Finished difference Result 20051 states and 61280 transitions. [2019-12-07 10:15:23,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:15:23,595 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2019-12-07 10:15:23,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:23,613 INFO L225 Difference]: With dead ends: 20051 [2019-12-07 10:15:23,613 INFO L226 Difference]: Without dead ends: 17454 [2019-12-07 10:15:23,613 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:15:23,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17454 states. [2019-12-07 10:15:23,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17454 to 14517. [2019-12-07 10:15:23,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14517 states. [2019-12-07 10:15:23,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14517 states to 14517 states and 44532 transitions. [2019-12-07 10:15:23,827 INFO L78 Accepts]: Start accepts. Automaton has 14517 states and 44532 transitions. Word has length 59 [2019-12-07 10:15:23,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:23,827 INFO L462 AbstractCegarLoop]: Abstraction has 14517 states and 44532 transitions. [2019-12-07 10:15:23,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:15:23,828 INFO L276 IsEmpty]: Start isEmpty. Operand 14517 states and 44532 transitions. [2019-12-07 10:15:23,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:23,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:23,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:23,841 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:23,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:23,841 INFO L82 PathProgramCache]: Analyzing trace with hash -71911370, now seen corresponding path program 5 times [2019-12-07 10:15:23,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:23,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61441801] [2019-12-07 10:15:23,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:23,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:23,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:23,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61441801] [2019-12-07 10:15:23,947 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:23,947 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:15:23,947 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034920157] [2019-12-07 10:15:23,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:15:23,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:23,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:15:23,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:15:23,948 INFO L87 Difference]: Start difference. First operand 14517 states and 44532 transitions. Second operand 11 states. [2019-12-07 10:15:24,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:24,710 INFO L93 Difference]: Finished difference Result 18778 states and 57263 transitions. [2019-12-07 10:15:24,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:15:24,711 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 10:15:24,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:24,729 INFO L225 Difference]: With dead ends: 18778 [2019-12-07 10:15:24,729 INFO L226 Difference]: Without dead ends: 16807 [2019-12-07 10:15:24,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:15:24,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16807 states. [2019-12-07 10:15:24,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16807 to 14280. [2019-12-07 10:15:24,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14280 states. [2019-12-07 10:15:24,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14280 states to 14280 states and 43849 transitions. [2019-12-07 10:15:24,951 INFO L78 Accepts]: Start accepts. Automaton has 14280 states and 43849 transitions. Word has length 59 [2019-12-07 10:15:24,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:24,951 INFO L462 AbstractCegarLoop]: Abstraction has 14280 states and 43849 transitions. [2019-12-07 10:15:24,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:15:24,951 INFO L276 IsEmpty]: Start isEmpty. Operand 14280 states and 43849 transitions. [2019-12-07 10:15:24,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:24,965 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:24,965 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:24,965 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:24,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:24,965 INFO L82 PathProgramCache]: Analyzing trace with hash -1658578216, now seen corresponding path program 6 times [2019-12-07 10:15:24,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:24,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489962439] [2019-12-07 10:15:24,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:24,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:25,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:25,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489962439] [2019-12-07 10:15:25,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:25,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:15:25,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234529629] [2019-12-07 10:15:25,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:15:25,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:25,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:15:25,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:15:25,319 INFO L87 Difference]: Start difference. First operand 14280 states and 43849 transitions. Second operand 15 states. [2019-12-07 10:15:28,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:28,574 INFO L93 Difference]: Finished difference Result 21855 states and 65824 transitions. [2019-12-07 10:15:28,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 10:15:28,575 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 59 [2019-12-07 10:15:28,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:28,595 INFO L225 Difference]: With dead ends: 21855 [2019-12-07 10:15:28,595 INFO L226 Difference]: Without dead ends: 20064 [2019-12-07 10:15:28,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 312 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=240, Invalid=1092, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 10:15:28,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20064 states. [2019-12-07 10:15:28,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20064 to 14652. [2019-12-07 10:15:28,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14652 states. [2019-12-07 10:15:28,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14652 states to 14652 states and 44782 transitions. [2019-12-07 10:15:28,830 INFO L78 Accepts]: Start accepts. Automaton has 14652 states and 44782 transitions. Word has length 59 [2019-12-07 10:15:28,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:28,830 INFO L462 AbstractCegarLoop]: Abstraction has 14652 states and 44782 transitions. [2019-12-07 10:15:28,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:15:28,830 INFO L276 IsEmpty]: Start isEmpty. Operand 14652 states and 44782 transitions. [2019-12-07 10:15:28,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:28,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:28,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:28,844 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:28,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:28,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1733418296, now seen corresponding path program 7 times [2019-12-07 10:15:28,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:28,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749023469] [2019-12-07 10:15:28,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:28,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:28,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:28,944 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749023469] [2019-12-07 10:15:28,944 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:28,945 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:15:28,945 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231626525] [2019-12-07 10:15:28,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:15:28,945 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:28,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:15:28,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:15:28,945 INFO L87 Difference]: Start difference. First operand 14652 states and 44782 transitions. Second operand 11 states. [2019-12-07 10:15:29,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:29,924 INFO L93 Difference]: Finished difference Result 19831 states and 60051 transitions. [2019-12-07 10:15:29,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:15:29,924 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2019-12-07 10:15:29,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:29,947 INFO L225 Difference]: With dead ends: 19831 [2019-12-07 10:15:29,947 INFO L226 Difference]: Without dead ends: 18449 [2019-12-07 10:15:29,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:15:30,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18449 states. [2019-12-07 10:15:30,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18449 to 14628. [2019-12-07 10:15:30,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14628 states. [2019-12-07 10:15:30,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14628 states to 14628 states and 44711 transitions. [2019-12-07 10:15:30,174 INFO L78 Accepts]: Start accepts. Automaton has 14628 states and 44711 transitions. Word has length 59 [2019-12-07 10:15:30,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:30,175 INFO L462 AbstractCegarLoop]: Abstraction has 14628 states and 44711 transitions. [2019-12-07 10:15:30,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:15:30,175 INFO L276 IsEmpty]: Start isEmpty. Operand 14628 states and 44711 transitions. [2019-12-07 10:15:30,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:30,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:30,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:30,189 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:30,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:30,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1816631088, now seen corresponding path program 8 times [2019-12-07 10:15:30,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:30,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359099138] [2019-12-07 10:15:30,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:30,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:30,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:30,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359099138] [2019-12-07 10:15:30,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:30,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:15:30,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140508519] [2019-12-07 10:15:30,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:15:30,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:30,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:15:30,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:15:30,568 INFO L87 Difference]: Start difference. First operand 14628 states and 44711 transitions. Second operand 16 states. [2019-12-07 10:15:33,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:33,538 INFO L93 Difference]: Finished difference Result 19850 states and 59879 transitions. [2019-12-07 10:15:33,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 10:15:33,539 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 59 [2019-12-07 10:15:33,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:33,571 INFO L225 Difference]: With dead ends: 19850 [2019-12-07 10:15:33,571 INFO L226 Difference]: Without dead ends: 18944 [2019-12-07 10:15:33,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=200, Invalid=922, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 10:15:33,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18944 states. [2019-12-07 10:15:33,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18944 to 14712. [2019-12-07 10:15:33,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14712 states. [2019-12-07 10:15:33,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14712 states to 14712 states and 44913 transitions. [2019-12-07 10:15:33,807 INFO L78 Accepts]: Start accepts. Automaton has 14712 states and 44913 transitions. Word has length 59 [2019-12-07 10:15:33,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:33,807 INFO L462 AbstractCegarLoop]: Abstraction has 14712 states and 44913 transitions. [2019-12-07 10:15:33,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:15:33,807 INFO L276 IsEmpty]: Start isEmpty. Operand 14712 states and 44913 transitions. [2019-12-07 10:15:33,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:33,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:33,821 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:33,821 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:33,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:33,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1891471168, now seen corresponding path program 9 times [2019-12-07 10:15:33,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:33,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330215564] [2019-12-07 10:15:33,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:33,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:34,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:34,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330215564] [2019-12-07 10:15:34,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:34,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:15:34,133 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555450142] [2019-12-07 10:15:34,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:15:34,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:34,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:15:34,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:15:34,134 INFO L87 Difference]: Start difference. First operand 14712 states and 44913 transitions. Second operand 17 states. [2019-12-07 10:15:36,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:36,092 INFO L93 Difference]: Finished difference Result 19877 states and 59865 transitions. [2019-12-07 10:15:36,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 10:15:36,093 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 59 [2019-12-07 10:15:36,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:36,112 INFO L225 Difference]: With dead ends: 19877 [2019-12-07 10:15:36,113 INFO L226 Difference]: Without dead ends: 19287 [2019-12-07 10:15:36,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=301, Invalid=1591, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 10:15:36,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19287 states. [2019-12-07 10:15:36,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19287 to 14688. [2019-12-07 10:15:36,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14688 states. [2019-12-07 10:15:36,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14688 states to 14688 states and 44847 transitions. [2019-12-07 10:15:36,343 INFO L78 Accepts]: Start accepts. Automaton has 14688 states and 44847 transitions. Word has length 59 [2019-12-07 10:15:36,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:36,344 INFO L462 AbstractCegarLoop]: Abstraction has 14688 states and 44847 transitions. [2019-12-07 10:15:36,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:15:36,344 INFO L276 IsEmpty]: Start isEmpty. Operand 14688 states and 44847 transitions. [2019-12-07 10:15:36,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:36,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:36,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:36,358 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:36,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:36,358 INFO L82 PathProgramCache]: Analyzing trace with hash -1009884174, now seen corresponding path program 10 times [2019-12-07 10:15:36,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:36,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126528920] [2019-12-07 10:15:36,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:36,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:36,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:36,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126528920] [2019-12-07 10:15:36,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:36,465 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:15:36,465 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443706544] [2019-12-07 10:15:36,465 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:15:36,465 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:36,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:15:36,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:15:36,466 INFO L87 Difference]: Start difference. First operand 14688 states and 44847 transitions. Second operand 12 states. [2019-12-07 10:15:37,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:37,261 INFO L93 Difference]: Finished difference Result 18314 states and 55492 transitions. [2019-12-07 10:15:37,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 10:15:37,262 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 10:15:37,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:37,280 INFO L225 Difference]: With dead ends: 18314 [2019-12-07 10:15:37,280 INFO L226 Difference]: Without dead ends: 17368 [2019-12-07 10:15:37,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:15:37,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17368 states. [2019-12-07 10:15:37,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17368 to 14638. [2019-12-07 10:15:37,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14638 states. [2019-12-07 10:15:37,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14638 states to 14638 states and 44734 transitions. [2019-12-07 10:15:37,502 INFO L78 Accepts]: Start accepts. Automaton has 14638 states and 44734 transitions. Word has length 59 [2019-12-07 10:15:37,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:37,502 INFO L462 AbstractCegarLoop]: Abstraction has 14638 states and 44734 transitions. [2019-12-07 10:15:37,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:15:37,503 INFO L276 IsEmpty]: Start isEmpty. Operand 14638 states and 44734 transitions. [2019-12-07 10:15:37,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:37,516 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:37,516 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:37,516 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:37,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:37,517 INFO L82 PathProgramCache]: Analyzing trace with hash 720693238, now seen corresponding path program 11 times [2019-12-07 10:15:37,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:37,517 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039804819] [2019-12-07 10:15:37,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:37,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:37,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:37,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039804819] [2019-12-07 10:15:37,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:37,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:15:37,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13105754] [2019-12-07 10:15:37,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 10:15:37,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:37,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 10:15:37,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:15:37,717 INFO L87 Difference]: Start difference. First operand 14638 states and 44734 transitions. Second operand 13 states. [2019-12-07 10:15:38,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:38,682 INFO L93 Difference]: Finished difference Result 18509 states and 56707 transitions. [2019-12-07 10:15:38,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 10:15:38,682 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2019-12-07 10:15:38,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:38,701 INFO L225 Difference]: With dead ends: 18509 [2019-12-07 10:15:38,702 INFO L226 Difference]: Without dead ends: 18071 [2019-12-07 10:15:38,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=498, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:15:38,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18071 states. [2019-12-07 10:15:38,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18071 to 15564. [2019-12-07 10:15:38,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15564 states. [2019-12-07 10:15:38,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15564 states to 15564 states and 47547 transitions. [2019-12-07 10:15:38,931 INFO L78 Accepts]: Start accepts. Automaton has 15564 states and 47547 transitions. Word has length 59 [2019-12-07 10:15:38,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:38,931 INFO L462 AbstractCegarLoop]: Abstraction has 15564 states and 47547 transitions. [2019-12-07 10:15:38,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 10:15:38,931 INFO L276 IsEmpty]: Start isEmpty. Operand 15564 states and 47547 transitions. [2019-12-07 10:15:38,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:38,945 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:38,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:38,945 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:38,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:38,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1927023716, now seen corresponding path program 12 times [2019-12-07 10:15:38,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:38,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1093950921] [2019-12-07 10:15:38,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:38,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:39,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:39,335 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1093950921] [2019-12-07 10:15:39,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:39,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:15:39,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027923738] [2019-12-07 10:15:39,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:15:39,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:39,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:15:39,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=251, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:15:39,336 INFO L87 Difference]: Start difference. First operand 15564 states and 47547 transitions. Second operand 18 states. [2019-12-07 10:15:45,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:45,120 INFO L93 Difference]: Finished difference Result 22804 states and 68967 transitions. [2019-12-07 10:15:45,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 10:15:45,120 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 10:15:45,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:45,153 INFO L225 Difference]: With dead ends: 22804 [2019-12-07 10:15:45,153 INFO L226 Difference]: Without dead ends: 20836 [2019-12-07 10:15:45,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 0 SyntacticMatches, 6 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 775 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=453, Invalid=2517, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 10:15:45,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20836 states. [2019-12-07 10:15:45,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20836 to 15745. [2019-12-07 10:15:45,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15745 states. [2019-12-07 10:15:45,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15745 states to 15745 states and 47971 transitions. [2019-12-07 10:15:45,409 INFO L78 Accepts]: Start accepts. Automaton has 15745 states and 47971 transitions. Word has length 59 [2019-12-07 10:15:45,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:45,409 INFO L462 AbstractCegarLoop]: Abstraction has 15745 states and 47971 transitions. [2019-12-07 10:15:45,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:15:45,409 INFO L276 IsEmpty]: Start isEmpty. Operand 15745 states and 47971 transitions. [2019-12-07 10:15:45,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:45,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:45,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:45,424 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:45,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:45,424 INFO L82 PathProgramCache]: Analyzing trace with hash -512977392, now seen corresponding path program 1 times [2019-12-07 10:15:45,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:45,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136971369] [2019-12-07 10:15:45,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:45,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:45,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:45,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136971369] [2019-12-07 10:15:45,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:45,447 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:45,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585055882] [2019-12-07 10:15:45,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:15:45,447 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:45,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:15:45,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:45,447 INFO L87 Difference]: Start difference. First operand 15745 states and 47971 transitions. Second operand 3 states. [2019-12-07 10:15:45,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:45,512 INFO L93 Difference]: Finished difference Result 20694 states and 63297 transitions. [2019-12-07 10:15:45,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:15:45,512 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 10:15:45,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:45,536 INFO L225 Difference]: With dead ends: 20694 [2019-12-07 10:15:45,536 INFO L226 Difference]: Without dead ends: 20694 [2019-12-07 10:15:45,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:45,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20694 states. [2019-12-07 10:15:45,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20694 to 18936. [2019-12-07 10:15:45,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18936 states. [2019-12-07 10:15:45,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18936 states to 18936 states and 58052 transitions. [2019-12-07 10:15:45,822 INFO L78 Accepts]: Start accepts. Automaton has 18936 states and 58052 transitions. Word has length 59 [2019-12-07 10:15:45,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:45,822 INFO L462 AbstractCegarLoop]: Abstraction has 18936 states and 58052 transitions. [2019-12-07 10:15:45,822 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:15:45,822 INFO L276 IsEmpty]: Start isEmpty. Operand 18936 states and 58052 transitions. [2019-12-07 10:15:45,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:45,840 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:45,840 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:45,840 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:45,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:45,840 INFO L82 PathProgramCache]: Analyzing trace with hash 758912560, now seen corresponding path program 13 times [2019-12-07 10:15:45,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:45,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162980350] [2019-12-07 10:15:45,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:45,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:46,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:46,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162980350] [2019-12-07 10:15:46,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:46,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 10:15:46,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078049160] [2019-12-07 10:15:46,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 10:15:46,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:46,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 10:15:46,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=223, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:15:46,364 INFO L87 Difference]: Start difference. First operand 18936 states and 58052 transitions. Second operand 17 states. [2019-12-07 10:15:49,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:49,450 INFO L93 Difference]: Finished difference Result 26194 states and 78998 transitions. [2019-12-07 10:15:49,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 10:15:49,450 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 59 [2019-12-07 10:15:49,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:49,478 INFO L225 Difference]: With dead ends: 26194 [2019-12-07 10:15:49,478 INFO L226 Difference]: Without dead ends: 25112 [2019-12-07 10:15:49,478 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 322 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=254, Invalid=1152, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 10:15:49,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25112 states. [2019-12-07 10:15:49,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25112 to 19040. [2019-12-07 10:15:49,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19040 states. [2019-12-07 10:15:49,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19040 states to 19040 states and 58306 transitions. [2019-12-07 10:15:49,776 INFO L78 Accepts]: Start accepts. Automaton has 19040 states and 58306 transitions. Word has length 59 [2019-12-07 10:15:49,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:49,777 INFO L462 AbstractCegarLoop]: Abstraction has 19040 states and 58306 transitions. [2019-12-07 10:15:49,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 10:15:49,777 INFO L276 IsEmpty]: Start isEmpty. Operand 19040 states and 58306 transitions. [2019-12-07 10:15:49,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:49,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:49,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:49,795 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:49,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:49,795 INFO L82 PathProgramCache]: Analyzing trace with hash 684072480, now seen corresponding path program 14 times [2019-12-07 10:15:49,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:49,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524787811] [2019-12-07 10:15:49,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:49,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:50,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:50,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524787811] [2019-12-07 10:15:50,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:50,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:15:50,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70401434] [2019-12-07 10:15:50,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:15:50,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:50,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:15:50,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:15:50,154 INFO L87 Difference]: Start difference. First operand 19040 states and 58306 transitions. Second operand 18 states. [2019-12-07 10:15:53,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:53,338 INFO L93 Difference]: Finished difference Result 26019 states and 78414 transitions. [2019-12-07 10:15:53,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 10:15:53,338 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 10:15:53,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:53,379 INFO L225 Difference]: With dead ends: 26019 [2019-12-07 10:15:53,379 INFO L226 Difference]: Without dead ends: 25389 [2019-12-07 10:15:53,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 636 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=391, Invalid=1961, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 10:15:53,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25389 states. [2019-12-07 10:15:53,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25389 to 19016. [2019-12-07 10:15:53,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19016 states. [2019-12-07 10:15:53,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19016 states to 19016 states and 58240 transitions. [2019-12-07 10:15:53,689 INFO L78 Accepts]: Start accepts. Automaton has 19016 states and 58240 transitions. Word has length 59 [2019-12-07 10:15:53,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:53,689 INFO L462 AbstractCegarLoop]: Abstraction has 19016 states and 58240 transitions. [2019-12-07 10:15:53,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:15:53,689 INFO L276 IsEmpty]: Start isEmpty. Operand 19016 states and 58240 transitions. [2019-12-07 10:15:53,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:53,706 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:53,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:53,707 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:53,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:53,707 INFO L82 PathProgramCache]: Analyzing trace with hash 1565659474, now seen corresponding path program 15 times [2019-12-07 10:15:53,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:53,707 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469643403] [2019-12-07 10:15:53,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:53,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:53,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:53,819 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469643403] [2019-12-07 10:15:53,819 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:53,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:15:53,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1288859286] [2019-12-07 10:15:53,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 10:15:53,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:53,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 10:15:53,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:15:53,820 INFO L87 Difference]: Start difference. First operand 19016 states and 58240 transitions. Second operand 13 states. [2019-12-07 10:15:54,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:54,779 INFO L93 Difference]: Finished difference Result 24466 states and 74274 transitions. [2019-12-07 10:15:54,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 10:15:54,779 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2019-12-07 10:15:54,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:54,801 INFO L225 Difference]: With dead ends: 24466 [2019-12-07 10:15:54,801 INFO L226 Difference]: Without dead ends: 22780 [2019-12-07 10:15:54,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=125, Invalid=525, Unknown=0, NotChecked=0, Total=650 [2019-12-07 10:15:54,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22780 states. [2019-12-07 10:15:55,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22780 to 18632. [2019-12-07 10:15:55,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18632 states. [2019-12-07 10:15:55,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18632 states to 18632 states and 57211 transitions. [2019-12-07 10:15:55,075 INFO L78 Accepts]: Start accepts. Automaton has 18632 states and 57211 transitions. Word has length 59 [2019-12-07 10:15:55,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:55,075 INFO L462 AbstractCegarLoop]: Abstraction has 18632 states and 57211 transitions. [2019-12-07 10:15:55,075 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 10:15:55,075 INFO L276 IsEmpty]: Start isEmpty. Operand 18632 states and 57211 transitions. [2019-12-07 10:15:55,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:55,091 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:55,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:55,092 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:55,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:55,092 INFO L82 PathProgramCache]: Analyzing trace with hash -998730410, now seen corresponding path program 16 times [2019-12-07 10:15:55,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:55,092 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394579910] [2019-12-07 10:15:55,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:55,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:55,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:55,280 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394579910] [2019-12-07 10:15:55,280 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:55,280 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 10:15:55,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2127525335] [2019-12-07 10:15:55,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 10:15:55,281 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:55,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 10:15:55,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=155, Unknown=0, NotChecked=0, Total=182 [2019-12-07 10:15:55,281 INFO L87 Difference]: Start difference. First operand 18632 states and 57211 transitions. Second operand 14 states. [2019-12-07 10:15:56,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:56,605 INFO L93 Difference]: Finished difference Result 24480 states and 74585 transitions. [2019-12-07 10:15:56,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 10:15:56,606 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 59 [2019-12-07 10:15:56,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:56,632 INFO L225 Difference]: With dead ends: 24480 [2019-12-07 10:15:56,632 INFO L226 Difference]: Without dead ends: 23836 [2019-12-07 10:15:56,633 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=167, Invalid=889, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 10:15:56,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23836 states. [2019-12-07 10:15:56,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23836 to 18720. [2019-12-07 10:15:56,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18720 states. [2019-12-07 10:15:56,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18720 states to 18720 states and 57497 transitions. [2019-12-07 10:15:56,927 INFO L78 Accepts]: Start accepts. Automaton has 18720 states and 57497 transitions. Word has length 59 [2019-12-07 10:15:56,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:56,927 INFO L462 AbstractCegarLoop]: Abstraction has 18720 states and 57497 transitions. [2019-12-07 10:15:56,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 10:15:56,927 INFO L276 IsEmpty]: Start isEmpty. Operand 18720 states and 57497 transitions. [2019-12-07 10:15:56,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:15:56,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:56,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:56,945 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:56,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:56,945 INFO L82 PathProgramCache]: Analyzing trace with hash 207600068, now seen corresponding path program 17 times [2019-12-07 10:15:56,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:56,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1842573627] [2019-12-07 10:15:56,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:56,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:57,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:57,346 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1842573627] [2019-12-07 10:15:57,346 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:57,347 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 10:15:57,347 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1890704289] [2019-12-07 10:15:57,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 10:15:57,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:57,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 10:15:57,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:15:57,347 INFO L87 Difference]: Start difference. First operand 18720 states and 57497 transitions. Second operand 19 states. [2019-12-07 10:16:01,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:01,459 INFO L93 Difference]: Finished difference Result 27779 states and 83483 transitions. [2019-12-07 10:16:01,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2019-12-07 10:16:01,460 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 59 [2019-12-07 10:16:01,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:01,491 INFO L225 Difference]: With dead ends: 27779 [2019-12-07 10:16:01,491 INFO L226 Difference]: Without dead ends: 26251 [2019-12-07 10:16:01,492 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1031 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=592, Invalid=3068, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 10:16:01,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26251 states. [2019-12-07 10:16:01,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26251 to 18669. [2019-12-07 10:16:01,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18669 states. [2019-12-07 10:16:01,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18669 states to 18669 states and 57334 transitions. [2019-12-07 10:16:01,792 INFO L78 Accepts]: Start accepts. Automaton has 18669 states and 57334 transitions. Word has length 59 [2019-12-07 10:16:01,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:01,792 INFO L462 AbstractCegarLoop]: Abstraction has 18669 states and 57334 transitions. [2019-12-07 10:16:01,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 10:16:01,792 INFO L276 IsEmpty]: Start isEmpty. Operand 18669 states and 57334 transitions. [2019-12-07 10:16:01,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:01,809 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:01,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:01,809 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:01,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:01,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1179205592, now seen corresponding path program 18 times [2019-12-07 10:16:01,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:01,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557221380] [2019-12-07 10:16:01,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:01,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:02,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:02,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [557221380] [2019-12-07 10:16:02,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:02,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:16:02,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216812277] [2019-12-07 10:16:02,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:16:02,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:02,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:16:02,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=253, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:16:02,113 INFO L87 Difference]: Start difference. First operand 18669 states and 57334 transitions. Second operand 18 states. [2019-12-07 10:16:07,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:07,492 INFO L93 Difference]: Finished difference Result 25917 states and 78477 transitions. [2019-12-07 10:16:07,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 10:16:07,492 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 10:16:07,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:07,523 INFO L225 Difference]: With dead ends: 25917 [2019-12-07 10:16:07,523 INFO L226 Difference]: Without dead ends: 25519 [2019-12-07 10:16:07,524 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 719 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=427, Invalid=2225, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 10:16:07,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25519 states. [2019-12-07 10:16:07,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25519 to 18726. [2019-12-07 10:16:07,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18726 states. [2019-12-07 10:16:07,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18726 states to 18726 states and 57501 transitions. [2019-12-07 10:16:07,829 INFO L78 Accepts]: Start accepts. Automaton has 18726 states and 57501 transitions. Word has length 59 [2019-12-07 10:16:07,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:07,830 INFO L462 AbstractCegarLoop]: Abstraction has 18726 states and 57501 transitions. [2019-12-07 10:16:07,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:16:07,830 INFO L276 IsEmpty]: Start isEmpty. Operand 18726 states and 57501 transitions. [2019-12-07 10:16:07,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:07,845 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:07,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:07,846 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:07,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:07,846 INFO L82 PathProgramCache]: Analyzing trace with hash 1019663912, now seen corresponding path program 19 times [2019-12-07 10:16:07,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:07,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446143039] [2019-12-07 10:16:07,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:07,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:08,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:08,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1446143039] [2019-12-07 10:16:08,369 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:08,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 10:16:08,370 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1046757209] [2019-12-07 10:16:08,370 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 10:16:08,370 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:08,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 10:16:08,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=353, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:16:08,370 INFO L87 Difference]: Start difference. First operand 18726 states and 57501 transitions. Second operand 21 states. [2019-12-07 10:16:16,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:16,723 INFO L93 Difference]: Finished difference Result 28268 states and 85285 transitions. [2019-12-07 10:16:16,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2019-12-07 10:16:16,723 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 59 [2019-12-07 10:16:16,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:16,757 INFO L225 Difference]: With dead ends: 28268 [2019-12-07 10:16:16,757 INFO L226 Difference]: Without dead ends: 27680 [2019-12-07 10:16:16,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1236 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=612, Invalid=3548, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 10:16:16,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27680 states. [2019-12-07 10:16:17,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27680 to 18735. [2019-12-07 10:16:17,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18735 states. [2019-12-07 10:16:17,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18735 states to 18735 states and 57527 transitions. [2019-12-07 10:16:17,091 INFO L78 Accepts]: Start accepts. Automaton has 18735 states and 57527 transitions. Word has length 59 [2019-12-07 10:16:17,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:17,091 INFO L462 AbstractCegarLoop]: Abstraction has 18735 states and 57527 transitions. [2019-12-07 10:16:17,091 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 10:16:17,091 INFO L276 IsEmpty]: Start isEmpty. Operand 18735 states and 57527 transitions. [2019-12-07 10:16:17,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:17,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:17,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:17,109 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:17,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:17,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1428573288, now seen corresponding path program 20 times [2019-12-07 10:16:17,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:17,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062036488] [2019-12-07 10:16:17,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:17,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:17,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:17,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062036488] [2019-12-07 10:16:17,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:17,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 10:16:17,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394929473] [2019-12-07 10:16:17,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 10:16:17,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:17,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 10:16:17,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:16:17,434 INFO L87 Difference]: Start difference. First operand 18735 states and 57527 transitions. Second operand 18 states. [2019-12-07 10:16:21,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:21,644 INFO L93 Difference]: Finished difference Result 26529 states and 80052 transitions. [2019-12-07 10:16:21,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 10:16:21,644 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2019-12-07 10:16:21,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:21,671 INFO L225 Difference]: With dead ends: 26529 [2019-12-07 10:16:21,672 INFO L226 Difference]: Without dead ends: 25158 [2019-12-07 10:16:21,673 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 862 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=491, Invalid=2701, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 10:16:21,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25158 states. [2019-12-07 10:16:21,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25158 to 18380. [2019-12-07 10:16:21,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18380 states. [2019-12-07 10:16:21,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18380 states to 18380 states and 56518 transitions. [2019-12-07 10:16:21,964 INFO L78 Accepts]: Start accepts. Automaton has 18380 states and 56518 transitions. Word has length 59 [2019-12-07 10:16:21,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:21,965 INFO L462 AbstractCegarLoop]: Abstraction has 18380 states and 56518 transitions. [2019-12-07 10:16:21,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 10:16:21,965 INFO L276 IsEmpty]: Start isEmpty. Operand 18380 states and 56518 transitions. [2019-12-07 10:16:21,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:21,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:21,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:21,981 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:21,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:21,982 INFO L82 PathProgramCache]: Analyzing trace with hash -1744760602, now seen corresponding path program 21 times [2019-12-07 10:16:21,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:21,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591702999] [2019-12-07 10:16:21,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:21,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:22,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:22,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591702999] [2019-12-07 10:16:22,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:22,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:16:22,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319992303] [2019-12-07 10:16:22,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:16:22,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:22,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:16:22,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:16:22,091 INFO L87 Difference]: Start difference. First operand 18380 states and 56518 transitions. Second operand 12 states. [2019-12-07 10:16:22,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:22,827 INFO L93 Difference]: Finished difference Result 22388 states and 68274 transitions. [2019-12-07 10:16:22,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:16:22,827 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 10:16:22,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:22,850 INFO L225 Difference]: With dead ends: 22388 [2019-12-07 10:16:22,850 INFO L226 Difference]: Without dead ends: 21710 [2019-12-07 10:16:22,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 10:16:22,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21710 states. [2019-12-07 10:16:23,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21710 to 18304. [2019-12-07 10:16:23,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18304 states. [2019-12-07 10:16:23,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18304 states to 18304 states and 56321 transitions. [2019-12-07 10:16:23,123 INFO L78 Accepts]: Start accepts. Automaton has 18304 states and 56321 transitions. Word has length 59 [2019-12-07 10:16:23,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:23,123 INFO L462 AbstractCegarLoop]: Abstraction has 18304 states and 56321 transitions. [2019-12-07 10:16:23,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:16:23,123 INFO L276 IsEmpty]: Start isEmpty. Operand 18304 states and 56321 transitions. [2019-12-07 10:16:23,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:23,140 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:23,140 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:23,140 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:23,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:23,140 INFO L82 PathProgramCache]: Analyzing trace with hash -864621944, now seen corresponding path program 22 times [2019-12-07 10:16:23,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:23,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869256645] [2019-12-07 10:16:23,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:23,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:23,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:23,521 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869256645] [2019-12-07 10:16:23,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:23,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 10:16:23,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [533059949] [2019-12-07 10:16:23,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 10:16:23,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:23,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 10:16:23,522 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=314, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:16:23,522 INFO L87 Difference]: Start difference. First operand 18304 states and 56321 transitions. Second operand 20 states. [2019-12-07 10:16:26,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:26,617 INFO L93 Difference]: Finished difference Result 26081 states and 78645 transitions. [2019-12-07 10:16:26,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 10:16:26,617 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 59 [2019-12-07 10:16:26,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:26,643 INFO L225 Difference]: With dead ends: 26081 [2019-12-07 10:16:26,643 INFO L226 Difference]: Without dead ends: 24705 [2019-12-07 10:16:26,644 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 829 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=494, Invalid=2812, Unknown=0, NotChecked=0, Total=3306 [2019-12-07 10:16:26,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24705 states. [2019-12-07 10:16:26,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24705 to 18424. [2019-12-07 10:16:26,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18424 states. [2019-12-07 10:16:26,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18424 states to 18424 states and 56639 transitions. [2019-12-07 10:16:26,925 INFO L78 Accepts]: Start accepts. Automaton has 18424 states and 56639 transitions. Word has length 59 [2019-12-07 10:16:26,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:26,925 INFO L462 AbstractCegarLoop]: Abstraction has 18424 states and 56639 transitions. [2019-12-07 10:16:26,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 10:16:26,925 INFO L276 IsEmpty]: Start isEmpty. Operand 18424 states and 56639 transitions. [2019-12-07 10:16:26,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:26,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:26,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:26,942 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:26,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:26,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1710921704, now seen corresponding path program 23 times [2019-12-07 10:16:26,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:26,942 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240170141] [2019-12-07 10:16:26,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:26,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:27,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:27,394 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240170141] [2019-12-07 10:16:27,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:27,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 10:16:27,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480008702] [2019-12-07 10:16:27,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 10:16:27,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:27,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 10:16:27,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=350, Unknown=0, NotChecked=0, Total=420 [2019-12-07 10:16:27,396 INFO L87 Difference]: Start difference. First operand 18424 states and 56639 transitions. Second operand 21 states. [2019-12-07 10:16:31,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:31,237 INFO L93 Difference]: Finished difference Result 26603 states and 80191 transitions. [2019-12-07 10:16:31,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 10:16:31,238 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 59 [2019-12-07 10:16:31,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:31,268 INFO L225 Difference]: With dead ends: 26603 [2019-12-07 10:16:31,268 INFO L226 Difference]: Without dead ends: 25959 [2019-12-07 10:16:31,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 908 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=572, Invalid=2968, Unknown=0, NotChecked=0, Total=3540 [2019-12-07 10:16:31,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25959 states. [2019-12-07 10:16:31,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25959 to 18380. [2019-12-07 10:16:31,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18380 states. [2019-12-07 10:16:31,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18380 states to 18380 states and 56521 transitions. [2019-12-07 10:16:31,579 INFO L78 Accepts]: Start accepts. Automaton has 18380 states and 56521 transitions. Word has length 59 [2019-12-07 10:16:31,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:31,579 INFO L462 AbstractCegarLoop]: Abstraction has 18380 states and 56521 transitions. [2019-12-07 10:16:31,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 10:16:31,579 INFO L276 IsEmpty]: Start isEmpty. Operand 18380 states and 56521 transitions. [2019-12-07 10:16:31,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:31,596 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:31,596 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:31,596 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:31,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:31,597 INFO L82 PathProgramCache]: Analyzing trace with hash -1771981748, now seen corresponding path program 24 times [2019-12-07 10:16:31,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:31,597 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [862227066] [2019-12-07 10:16:31,597 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:31,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:32,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:32,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [862227066] [2019-12-07 10:16:32,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:32,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 10:16:32,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795554140] [2019-12-07 10:16:32,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 10:16:32,164 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:32,164 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 10:16:32,164 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=393, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:16:32,165 INFO L87 Difference]: Start difference. First operand 18380 states and 56521 transitions. Second operand 22 states. [2019-12-07 10:16:37,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:37,775 INFO L93 Difference]: Finished difference Result 27517 states and 83164 transitions. [2019-12-07 10:16:37,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 10:16:37,775 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 59 [2019-12-07 10:16:37,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:37,809 INFO L225 Difference]: With dead ends: 27517 [2019-12-07 10:16:37,809 INFO L226 Difference]: Without dead ends: 27131 [2019-12-07 10:16:37,810 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1277 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=629, Invalid=3793, Unknown=0, NotChecked=0, Total=4422 [2019-12-07 10:16:37,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27131 states. [2019-12-07 10:16:38,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27131 to 18398. [2019-12-07 10:16:38,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18398 states. [2019-12-07 10:16:38,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18398 states to 18398 states and 56573 transitions. [2019-12-07 10:16:38,125 INFO L78 Accepts]: Start accepts. Automaton has 18398 states and 56573 transitions. Word has length 59 [2019-12-07 10:16:38,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:38,125 INFO L462 AbstractCegarLoop]: Abstraction has 18398 states and 56573 transitions. [2019-12-07 10:16:38,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 10:16:38,126 INFO L276 IsEmpty]: Start isEmpty. Operand 18398 states and 56573 transitions. [2019-12-07 10:16:38,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:38,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:38,143 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:38,143 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:38,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:38,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1363072372, now seen corresponding path program 25 times [2019-12-07 10:16:38,143 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:38,143 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600421656] [2019-12-07 10:16:38,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:38,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:39,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:39,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600421656] [2019-12-07 10:16:39,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:39,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2019-12-07 10:16:39,211 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353028901] [2019-12-07 10:16:39,211 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2019-12-07 10:16:39,211 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:39,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 10:16:39,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=534, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:16:39,212 INFO L87 Difference]: Start difference. First operand 18398 states and 56573 transitions. Second operand 25 states. [2019-12-07 10:16:41,006 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 29 [2019-12-07 10:16:45,055 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 28 [2019-12-07 10:16:45,588 WARN L192 SmtUtils]: Spent 114.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 31 [2019-12-07 10:16:48,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:48,130 INFO L93 Difference]: Finished difference Result 36769 states and 110993 transitions. [2019-12-07 10:16:48,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2019-12-07 10:16:48,131 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 59 [2019-12-07 10:16:48,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:48,173 INFO L225 Difference]: With dead ends: 36769 [2019-12-07 10:16:48,174 INFO L226 Difference]: Without dead ends: 36297 [2019-12-07 10:16:48,176 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2456 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=1145, Invalid=7597, Unknown=0, NotChecked=0, Total=8742 [2019-12-07 10:16:48,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36297 states. [2019-12-07 10:16:48,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36297 to 18429. [2019-12-07 10:16:48,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18429 states. [2019-12-07 10:16:48,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18429 states to 18429 states and 56673 transitions. [2019-12-07 10:16:48,560 INFO L78 Accepts]: Start accepts. Automaton has 18429 states and 56673 transitions. Word has length 59 [2019-12-07 10:16:48,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:48,560 INFO L462 AbstractCegarLoop]: Abstraction has 18429 states and 56673 transitions. [2019-12-07 10:16:48,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 25 states. [2019-12-07 10:16:48,560 INFO L276 IsEmpty]: Start isEmpty. Operand 18429 states and 56673 transitions. [2019-12-07 10:16:48,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:48,577 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:48,577 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:48,577 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:48,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:48,578 INFO L82 PathProgramCache]: Analyzing trace with hash 765662888, now seen corresponding path program 26 times [2019-12-07 10:16:48,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:48,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780662646] [2019-12-07 10:16:48,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:48,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:48,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:48,681 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780662646] [2019-12-07 10:16:48,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:48,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:16:48,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32135934] [2019-12-07 10:16:48,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:16:48,682 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:48,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:16:48,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:16:48,682 INFO L87 Difference]: Start difference. First operand 18429 states and 56673 transitions. Second operand 12 states. [2019-12-07 10:16:49,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:49,797 INFO L93 Difference]: Finished difference Result 23994 states and 73218 transitions. [2019-12-07 10:16:49,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 10:16:49,798 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 10:16:49,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:49,820 INFO L225 Difference]: With dead ends: 23994 [2019-12-07 10:16:49,820 INFO L226 Difference]: Without dead ends: 21880 [2019-12-07 10:16:49,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=614, Unknown=0, NotChecked=0, Total=756 [2019-12-07 10:16:49,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21880 states. [2019-12-07 10:16:50,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21880 to 17406. [2019-12-07 10:16:50,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17406 states. [2019-12-07 10:16:50,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17406 states to 17406 states and 53640 transitions. [2019-12-07 10:16:50,083 INFO L78 Accepts]: Start accepts. Automaton has 17406 states and 53640 transitions. Word has length 59 [2019-12-07 10:16:50,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:50,083 INFO L462 AbstractCegarLoop]: Abstraction has 17406 states and 53640 transitions. [2019-12-07 10:16:50,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:16:50,083 INFO L276 IsEmpty]: Start isEmpty. Operand 17406 states and 53640 transitions. [2019-12-07 10:16:50,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 10:16:50,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:50,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:50,098 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:50,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:50,099 INFO L82 PathProgramCache]: Analyzing trace with hash -300648998, now seen corresponding path program 27 times [2019-12-07 10:16:50,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:50,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327966870] [2019-12-07 10:16:50,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:50,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:16:50,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:16:50,173 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 10:16:50,173 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:16:50,175 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] ULTIMATE.startENTRY-->L845: Formula: (let ((.cse0 (store |v_#valid_101| 0 0))) (and (= 0 v_~y$r_buff0_thd3~0_200) (= v_~weak$$choice2~0_146 0) (= v_~z~0_79 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_906 0) (= |v_ULTIMATE.start_main_~#t437~0.offset_27| 0) (= v_~__unbuffered_cnt~0_174 0) (= v_~main$tmp_guard1~0_51 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42|) |v_ULTIMATE.start_main_~#t437~0.offset_27| 0)) |v_#memory_int_21|) (= |v_#valid_99| (store .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42| 1)) (= 0 v_~__unbuffered_p3_EAX~0_50) (= 0 v_~__unbuffered_p2_EAX~0_106) (= 0 v_~y$r_buff0_thd2~0_339) (= v_~y$mem_tmp~0_18 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 v_~y$r_buff1_thd4~0_165) (= 0 v_~y$w_buff0~0_533) (= 0 v_~y$r_buff1_thd2~0_235) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42|)) (= 0 v_~__unbuffered_p3_EBX~0_50) (= 0 |v_#NULL.base_6|) (= v_~y$w_buff1~0_348 0) (= 0 v_~y$r_buff0_thd4~0_151) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_64) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_35 0) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~y$flush_delayed~0_42) (= v_~x~0_39 0) (= v_~y$r_buff0_thd1~0_73 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t437~0.base_42|) (= 0 v_~y$r_buff1_thd1~0_74) (= v_~y~0_158 0) (= v_~y$r_buff1_thd0~0_169 0) (= v_~y$r_buff0_thd0~0_171 0) (= v_~y$w_buff1_used~0_540 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t437~0.base_42| 4)) (= 0 v_~y$r_buff1_thd3~0_136))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_101|, #memory_int=|v_#memory_int_22|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_19|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_110|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_43|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_35, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_64, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_136, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_19|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_73, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_50, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_106, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_21|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_24|, ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_34|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_165, ~y$w_buff1~0=v_~y$w_buff1~0_348, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t437~0.offset=|v_ULTIMATE.start_main_~#t437~0.offset_27|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_339, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_174, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_169, ~x~0=v_~x~0_39, ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_25|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_41|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_239|, ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_18|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_74, ~y$w_buff0~0=v_~y$w_buff0~0_533, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_200, ~y~0=v_~y~0_158, ULTIMATE.start_main_~#t437~0.base=|v_ULTIMATE.start_main_~#t437~0.base_42|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_50, #NULL.base=|v_#NULL.base_6|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_235, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_151, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_171, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_540} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t440~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t439~0.base, ULTIMATE.start_main_~#t438~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t437~0.offset, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t440~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t439~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t437~0.base, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:16:50,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L845-1-->L847: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11|) |v_ULTIMATE.start_main_~#t438~0.offset_10| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11| 1) |v_#valid_43|) (not (= 0 |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= |v_ULTIMATE.start_main_~#t438~0.offset_10| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t438~0.base_11| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t438~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_10|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.base, ULTIMATE.start_main_~#t438~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 10:16:50,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L847-1-->L849: Formula: (and (not (= |v_ULTIMATE.start_main_~#t439~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10|) |v_ULTIMATE.start_main_~#t439~0.offset_9| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t439~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t439~0.base_10|) (= |v_ULTIMATE.start_main_~#t439~0.offset_9| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t439~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t439~0.base] because there is no mapped edge [2019-12-07 10:16:50,177 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] P2ENTRY-->L4-3: Formula: (and (= P2Thread1of1ForFork3_~arg.offset_Out-797291343 |P2Thread1of1ForFork3_#in~arg.offset_In-797291343|) (= ~y$w_buff1_used~0_Out-797291343 ~y$w_buff0_used~0_In-797291343) (= 1 ~y$w_buff0~0_Out-797291343) (= (ite (not (and (not (= 0 (mod ~y$w_buff0_used~0_Out-797291343 256))) (not (= 0 (mod ~y$w_buff1_used~0_Out-797291343 256))))) 1 0) |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343|) (= |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343| P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343) (not (= P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343 0)) (= ~y$w_buff1~0_Out-797291343 ~y$w_buff0~0_In-797291343) (= P2Thread1of1ForFork3_~arg.base_Out-797291343 |P2Thread1of1ForFork3_#in~arg.base_In-797291343|) (= ~y$w_buff0_used~0_Out-797291343 1)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$w_buff0~0=~y$w_buff0~0_In-797291343, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-797291343|, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-797291343|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_Out-797291343, ~y$w_buff1~0=~y$w_buff1~0_Out-797291343, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343|, ~y$w_buff0~0=~y$w_buff0~0_Out-797291343, P2Thread1of1ForFork3_~arg.base=P2Thread1of1ForFork3_~arg.base_Out-797291343, P2Thread1of1ForFork3___VERIFIER_assert_~expression=P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-797291343|, P2Thread1of1ForFork3_~arg.offset=P2Thread1of1ForFork3_~arg.offset_Out-797291343, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-797291343|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-797291343} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression, ~y$w_buff0~0, P2Thread1of1ForFork3_~arg.base, P2Thread1of1ForFork3___VERIFIER_assert_~expression, P2Thread1of1ForFork3_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:16:50,177 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L849-1-->L851: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13|) |v_ULTIMATE.start_main_~#t440~0.offset_11| 3)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t440~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t440~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t440~0.base_13| 0)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t440~0.base_13| 4) |v_#length_21|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_6|, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t440~0.base, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t440~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:16:50,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_23 v_~__unbuffered_p0_EAX~0_23) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~a~0_19 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23} OutVars{~a~0=v_~a~0_19, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 10:16:50,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L822-2-->L822-5: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-204041933 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-204041933 256))) (.cse1 (= |P3Thread1of1ForFork0_#t~ite33_Out-204041933| |P3Thread1of1ForFork0_#t~ite32_Out-204041933|))) (or (and (= ~y$w_buff1~0_In-204041933 |P3Thread1of1ForFork0_#t~ite32_Out-204041933|) (not .cse0) .cse1 (not .cse2)) (and (= ~y~0_In-204041933 |P3Thread1of1ForFork0_#t~ite32_Out-204041933|) (or .cse2 .cse0) .cse1))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-204041933, ~y$w_buff1~0=~y$w_buff1~0_In-204041933, ~y~0=~y~0_In-204041933, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-204041933, ~y$w_buff1~0=~y$w_buff1~0_In-204041933, ~y~0=~y~0_In-204041933, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-204041933|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-204041933|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 10:16:50,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1205151473 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1205151473 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork3_#t~ite28_Out1205151473| 0)) (and (= |P2Thread1of1ForFork3_#t~ite28_Out1205151473| ~y$w_buff0_used~0_In1205151473) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out1205151473|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 10:16:50,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-584037940 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-584037940 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out-584037940| ~y$w_buff0_used~0_In-584037940)) (and (not .cse1) (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-584037940|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-584037940, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-584037940, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-584037940|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 10:16:50,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In1180315853 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1180315853 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite29_Out1180315853| ~y$w_buff1_used~0_In1180315853) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork3_#t~ite29_Out1180315853| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1180315853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1180315853, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1180315853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1180315853, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1180315853|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 10:16:50,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L763-->L763-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2066610572 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite8_In2066610572| |P1Thread1of1ForFork2_#t~ite8_Out2066610572|) (= |P1Thread1of1ForFork2_#t~ite9_Out2066610572| ~y$w_buff0~0_In2066610572)) (and (= |P1Thread1of1ForFork2_#t~ite8_Out2066610572| ~y$w_buff0~0_In2066610572) (= |P1Thread1of1ForFork2_#t~ite8_Out2066610572| |P1Thread1of1ForFork2_#t~ite9_Out2066610572|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2066610572 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2066610572 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In2066610572 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In2066610572 256))))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2066610572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In2066610572|, ~y$w_buff0~0=~y$w_buff0~0_In2066610572, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2066610572, ~weak$$choice2~0=~weak$$choice2~0_In2066610572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2066610572} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2066610572, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2066610572|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out2066610572|, ~y$w_buff0~0=~y$w_buff0~0_In2066610572, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2066610572, ~weak$$choice2~0=~weak$$choice2~0_In2066610572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2066610572} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 10:16:50,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L802-->L803: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1506096029 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1506096029 256) 0)) (.cse1 (= ~y$r_buff0_thd3~0_Out1506096029 ~y$r_buff0_thd3~0_In1506096029))) (or (and .cse0 .cse1) (and (= ~y$r_buff0_thd3~0_Out1506096029 0) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out1506096029|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1506096029} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 10:16:50,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1733993414 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1733993414 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1733993414 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1733993414 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite31_Out1733993414| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite31_Out1733993414| ~y$r_buff1_thd3~0_In1733993414) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1733993414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1733993414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1733993414, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1733993414} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1733993414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1733993414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1733993414, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1733993414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1733993414} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 10:16:50,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_57) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_57, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 10:16:50,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-246507355 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-246507355 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-246507355 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In-246507355 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite35_Out-246507355| ~y$w_buff1_used~0_In-246507355) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork0_#t~ite35_Out-246507355| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-246507355, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-246507355, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out-246507355|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 10:16:50,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In-14876005 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-14876005 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite36_Out-14876005| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite36_Out-14876005| ~y$r_buff0_thd4~0_In-14876005)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-14876005, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-14876005} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-14876005, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-14876005, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-14876005|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 10:16:50,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L826-->L826-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1467949986 256))) (.cse2 (= (mod ~y$r_buff1_thd4~0_In-1467949986 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1467949986 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1467949986 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork0_#t~ite37_Out-1467949986| ~y$r_buff1_thd4~0_In-1467949986)) (and (= |P3Thread1of1ForFork0_#t~ite37_Out-1467949986| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1467949986, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1467949986, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1467949986, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1467949986, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1467949986, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out-1467949986|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 10:16:50,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L826-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_34| v_~y$r_buff1_thd4~0_55) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_55, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_33|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:16:50,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In6450241 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In6450241 256)))) (or (and (= 0 (mod ~y$r_buff1_thd2~0_In6450241 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In6450241 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In6450241 256) 0))) (= |P1Thread1of1ForFork2_#t~ite11_Out6450241| ~y$w_buff1~0_In6450241) .cse1 (= |P1Thread1of1ForFork2_#t~ite11_Out6450241| |P1Thread1of1ForFork2_#t~ite12_Out6450241|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out6450241| ~y$w_buff1~0_In6450241) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_In6450241| |P1Thread1of1ForFork2_#t~ite11_Out6450241|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In6450241, ~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In6450241, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In6450241|, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In6450241, ~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In6450241, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out6450241|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out6450241|, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:16:50,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L765-->L765-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-507587312 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite14_Out-507587312| |P1Thread1of1ForFork2_#t~ite15_Out-507587312|) (= ~y$w_buff0_used~0_In-507587312 |P1Thread1of1ForFork2_#t~ite14_Out-507587312|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-507587312 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-507587312 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In-507587312 256) 0)) (= (mod ~y$w_buff0_used~0_In-507587312 256) 0)))) (and (= ~y$w_buff0_used~0_In-507587312 |P1Thread1of1ForFork2_#t~ite15_Out-507587312|) (= |P1Thread1of1ForFork2_#t~ite14_In-507587312| |P1Thread1of1ForFork2_#t~ite14_Out-507587312|) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507587312, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-507587312, ~weak$$choice2~0=~weak$$choice2~0_In-507587312, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507587312, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-507587312, ~weak$$choice2~0=~weak$$choice2~0_In-507587312, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-507587312|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 10:16:50,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L767-->L768: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 10:16:50,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L768-->L768-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1256221764 256)))) (or (and (not .cse0) (= ~y$r_buff1_thd2~0_In1256221764 |P1Thread1of1ForFork2_#t~ite24_Out1256221764|) (= |P1Thread1of1ForFork2_#t~ite23_In1256221764| |P1Thread1of1ForFork2_#t~ite23_Out1256221764|)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1256221764 256)))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1256221764 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1256221764 256))) (= (mod ~y$w_buff0_used~0_In1256221764 256) 0))) (= |P1Thread1of1ForFork2_#t~ite23_Out1256221764| |P1Thread1of1ForFork2_#t~ite24_Out1256221764|) (= ~y$r_buff1_thd2~0_In1256221764 |P1Thread1of1ForFork2_#t~ite23_Out1256221764|) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1256221764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1256221764, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1256221764, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In1256221764|, ~weak$$choice2~0=~weak$$choice2~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1256221764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1256221764, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1256221764, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out1256221764|, ~weak$$choice2~0=~weak$$choice2~0_In1256221764, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out1256221764|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 10:16:50,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L770-->L778: Formula: (and (= (+ v_~__unbuffered_cnt~0_22 1) v_~__unbuffered_cnt~0_21) (= v_~y~0_29 v_~y$mem_tmp~0_6) (= 0 v_~y$flush_delayed~0_8) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~y~0=v_~y~0_29, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 10:16:50,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L851-1-->L857: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:16:50,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L857-2-->L857-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In892162267 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out892162267| ~y~0_In892162267)) (and (= |ULTIMATE.start_main_#t~ite42_Out892162267| ~y$w_buff1~0_In892162267) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out892162267|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:16:50,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L857-4-->L858: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite42_14|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ~y~0=v_~y~0_46, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:16:50,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L858-->L858-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-988858907 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-988858907 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-988858907| ~y$w_buff0_used~0_In-988858907) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-988858907|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-988858907} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-988858907, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-988858907|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 10:16:50,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L859-->L859-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-156830557 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-156830557 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-156830557 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-156830557 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-156830557|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-156830557 |ULTIMATE.start_main_#t~ite45_Out-156830557|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-156830557|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 10:16:50,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L860-->L860-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In401782435 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In401782435 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In401782435 |ULTIMATE.start_main_#t~ite46_Out401782435|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite46_Out401782435| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out401782435|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 10:16:50,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L861-->L861-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1595864320 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out-1595864320| 0)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out-1595864320| ~y$r_buff1_thd0~0_In-1595864320) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1595864320|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 10:16:50,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L861-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_73|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_78) (= 0 v_~__unbuffered_p1_EAX~0_32) (= 0 v_~__unbuffered_p3_EBX~0_31) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 1 v_~__unbuffered_p3_EAX~0_31))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_29) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_73|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_72|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:16:50,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:16:50 BasicIcfg [2019-12-07 10:16:50,240 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:16:50,240 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:16:50,240 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:16:50,241 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:16:50,241 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:13:00" (3/4) ... [2019-12-07 10:16:50,242 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:16:50,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] ULTIMATE.startENTRY-->L845: Formula: (let ((.cse0 (store |v_#valid_101| 0 0))) (and (= 0 v_~y$r_buff0_thd3~0_200) (= v_~weak$$choice2~0_146 0) (= v_~z~0_79 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff0_used~0_906 0) (= |v_ULTIMATE.start_main_~#t437~0.offset_27| 0) (= v_~__unbuffered_cnt~0_174 0) (= v_~main$tmp_guard1~0_51 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t437~0.base_42|) |v_ULTIMATE.start_main_~#t437~0.offset_27| 0)) |v_#memory_int_21|) (= |v_#valid_99| (store .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42| 1)) (= 0 v_~__unbuffered_p3_EAX~0_50) (= 0 v_~__unbuffered_p2_EAX~0_106) (= 0 v_~y$r_buff0_thd2~0_339) (= v_~y$mem_tmp~0_18 0) (= 0 v_~__unbuffered_p1_EAX~0_54) (= 0 v_~y$r_buff1_thd4~0_165) (= 0 v_~y$w_buff0~0_533) (= 0 v_~y$r_buff1_thd2~0_235) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t437~0.base_42|)) (= 0 v_~__unbuffered_p3_EBX~0_50) (= 0 |v_#NULL.base_6|) (= v_~y$w_buff1~0_348 0) (= 0 v_~y$r_buff0_thd4~0_151) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_64) (< 0 |v_#StackHeapBarrier_20|) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_35 0) (= v_~main$tmp_guard0~0_21 0) (= 0 v_~y$flush_delayed~0_42) (= v_~x~0_39 0) (= v_~y$r_buff0_thd1~0_73 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t437~0.base_42|) (= 0 v_~y$r_buff1_thd1~0_74) (= v_~y~0_158 0) (= v_~y$r_buff1_thd0~0_169 0) (= v_~y$r_buff0_thd0~0_171 0) (= v_~y$w_buff1_used~0_540 0) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t437~0.base_42| 4)) (= 0 v_~y$r_buff1_thd3~0_136))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_101|, #memory_int=|v_#memory_int_22|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_19|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_110|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_43|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_35, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_64, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_136, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_54, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_19|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_73, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_50, #length=|v_#length_31|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_106, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_21|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_24|, ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_34|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_165, ~y$w_buff1~0=v_~y$w_buff1~0_348, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t437~0.offset=|v_ULTIMATE.start_main_~#t437~0.offset_27|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_339, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_174, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_169, ~x~0=v_~x~0_39, ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_25|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_906, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_41|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_239|, ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_18|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_74, ~y$w_buff0~0=v_~y$w_buff0~0_533, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_200, ~y~0=v_~y~0_158, ULTIMATE.start_main_~#t437~0.base=|v_ULTIMATE.start_main_~#t437~0.base_42|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_50, #NULL.base=|v_#NULL.base_6|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_235, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_151, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_171, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_9|, ~z~0=v_~z~0_79, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_540} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t440~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t439~0.base, ULTIMATE.start_main_~#t438~0.base, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t437~0.offset, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t440~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t439~0.offset, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t437~0.base, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:16:50,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L845-1-->L847: Formula: (and (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t438~0.base_11|) |v_ULTIMATE.start_main_~#t438~0.offset_10| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= (store |v_#valid_44| |v_ULTIMATE.start_main_~#t438~0.base_11| 1) |v_#valid_43|) (not (= 0 |v_ULTIMATE.start_main_~#t438~0.base_11|)) (= |v_ULTIMATE.start_main_~#t438~0.offset_10| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t438~0.base_11| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t438~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_18|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t438~0.base=|v_ULTIMATE.start_main_~#t438~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t438~0.offset=|v_ULTIMATE.start_main_~#t438~0.offset_10|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t438~0.base, ULTIMATE.start_main_~#t438~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 10:16:50,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L847-1-->L849: Formula: (and (not (= |v_ULTIMATE.start_main_~#t439~0.base_10| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t439~0.base_10|) |v_ULTIMATE.start_main_~#t439~0.offset_9| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t439~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t439~0.base_10|) (= |v_ULTIMATE.start_main_~#t439~0.offset_9| 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t439~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t439~0.offset=|v_ULTIMATE.start_main_~#t439~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|, ULTIMATE.start_main_~#t439~0.base=|v_ULTIMATE.start_main_~#t439~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t439~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t439~0.base] because there is no mapped edge [2019-12-07 10:16:50,244 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] P2ENTRY-->L4-3: Formula: (and (= P2Thread1of1ForFork3_~arg.offset_Out-797291343 |P2Thread1of1ForFork3_#in~arg.offset_In-797291343|) (= ~y$w_buff1_used~0_Out-797291343 ~y$w_buff0_used~0_In-797291343) (= 1 ~y$w_buff0~0_Out-797291343) (= (ite (not (and (not (= 0 (mod ~y$w_buff0_used~0_Out-797291343 256))) (not (= 0 (mod ~y$w_buff1_used~0_Out-797291343 256))))) 1 0) |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343|) (= |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343| P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343) (not (= P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343 0)) (= ~y$w_buff1~0_Out-797291343 ~y$w_buff0~0_In-797291343) (= P2Thread1of1ForFork3_~arg.base_Out-797291343 |P2Thread1of1ForFork3_#in~arg.base_In-797291343|) (= ~y$w_buff0_used~0_Out-797291343 1)) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$w_buff0~0=~y$w_buff0~0_In-797291343, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-797291343|, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-797291343|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_Out-797291343, ~y$w_buff1~0=~y$w_buff1~0_Out-797291343, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression=|P2Thread1of1ForFork3___VERIFIER_assert_#in~expression_Out-797291343|, ~y$w_buff0~0=~y$w_buff0~0_Out-797291343, P2Thread1of1ForFork3_~arg.base=P2Thread1of1ForFork3_~arg.base_Out-797291343, P2Thread1of1ForFork3___VERIFIER_assert_~expression=P2Thread1of1ForFork3___VERIFIER_assert_~expression_Out-797291343, P2Thread1of1ForFork3_#in~arg.base=|P2Thread1of1ForFork3_#in~arg.base_In-797291343|, P2Thread1of1ForFork3_~arg.offset=P2Thread1of1ForFork3_~arg.offset_Out-797291343, P2Thread1of1ForFork3_#in~arg.offset=|P2Thread1of1ForFork3_#in~arg.offset_In-797291343|, ~y$w_buff1_used~0=~y$w_buff1_used~0_Out-797291343} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, P2Thread1of1ForFork3___VERIFIER_assert_#in~expression, ~y$w_buff0~0, P2Thread1of1ForFork3_~arg.base, P2Thread1of1ForFork3___VERIFIER_assert_~expression, P2Thread1of1ForFork3_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 10:16:50,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L849-1-->L851: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t440~0.base_13|) |v_ULTIMATE.start_main_~#t440~0.offset_11| 3)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t440~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t440~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t440~0.base_13| 0)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t440~0.base_13| 4) |v_#length_21|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t440~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t440~0.base=|v_ULTIMATE.start_main_~#t440~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_6|, ULTIMATE.start_main_~#t440~0.offset=|v_ULTIMATE.start_main_~#t440~0.offset_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t440~0.base, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t440~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:16:50,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_23 v_~__unbuffered_p0_EAX~0_23) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_5|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~a~0_19 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_5|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23} OutVars{~a~0=v_~a~0_19, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_23, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_5|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_5|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_23, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 10:16:50,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L822-2-->L822-5: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-204041933 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-204041933 256))) (.cse1 (= |P3Thread1of1ForFork0_#t~ite33_Out-204041933| |P3Thread1of1ForFork0_#t~ite32_Out-204041933|))) (or (and (= ~y$w_buff1~0_In-204041933 |P3Thread1of1ForFork0_#t~ite32_Out-204041933|) (not .cse0) .cse1 (not .cse2)) (and (= ~y~0_In-204041933 |P3Thread1of1ForFork0_#t~ite32_Out-204041933|) (or .cse2 .cse0) .cse1))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-204041933, ~y$w_buff1~0=~y$w_buff1~0_In-204041933, ~y~0=~y~0_In-204041933, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-204041933, ~y$w_buff1~0=~y$w_buff1~0_In-204041933, ~y~0=~y~0_In-204041933, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-204041933|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-204041933|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 10:16:50,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1205151473 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1205151473 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork3_#t~ite28_Out1205151473| 0)) (and (= |P2Thread1of1ForFork3_#t~ite28_Out1205151473| ~y$w_buff0_used~0_In1205151473) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1205151473, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1205151473, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out1205151473|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 10:16:50,247 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L823-->L823-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd4~0_In-584037940 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-584037940 256) 0))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite34_Out-584037940| ~y$w_buff0_used~0_In-584037940)) (and (not .cse1) (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out-584037940|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-584037940, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-584037940, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-584037940, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out-584037940|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 10:16:50,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L801-->L801-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In1180315853 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In1180315853 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite29_Out1180315853| ~y$w_buff1_used~0_In1180315853) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork3_#t~ite29_Out1180315853| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1180315853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1180315853, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1180315853, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1180315853, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out1180315853|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1180315853} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 10:16:50,248 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L763-->L763-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In2066610572 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite8_In2066610572| |P1Thread1of1ForFork2_#t~ite8_Out2066610572|) (= |P1Thread1of1ForFork2_#t~ite9_Out2066610572| ~y$w_buff0~0_In2066610572)) (and (= |P1Thread1of1ForFork2_#t~ite8_Out2066610572| ~y$w_buff0~0_In2066610572) (= |P1Thread1of1ForFork2_#t~ite8_Out2066610572| |P1Thread1of1ForFork2_#t~ite9_Out2066610572|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2066610572 256) 0))) (or (and (= (mod ~y$w_buff1_used~0_In2066610572 256) 0) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In2066610572 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In2066610572 256))))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2066610572, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_In2066610572|, ~y$w_buff0~0=~y$w_buff0~0_In2066610572, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2066610572, ~weak$$choice2~0=~weak$$choice2~0_In2066610572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2066610572} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2066610572, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out2066610572|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2066610572, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out2066610572|, ~y$w_buff0~0=~y$w_buff0~0_In2066610572, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2066610572, ~weak$$choice2~0=~weak$$choice2~0_In2066610572, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2066610572} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 10:16:50,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L802-->L803: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1506096029 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1506096029 256) 0)) (.cse1 (= ~y$r_buff0_thd3~0_Out1506096029 ~y$r_buff0_thd3~0_In1506096029))) (or (and .cse0 .cse1) (and (= ~y$r_buff0_thd3~0_Out1506096029 0) (not .cse2) (not .cse0)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out1506096029|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1506096029} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 10:16:50,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1733993414 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1733993414 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1733993414 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1733993414 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite31_Out1733993414| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork3_#t~ite31_Out1733993414| ~y$r_buff1_thd3~0_In1733993414) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1733993414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1733993414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1733993414, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1733993414} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1733993414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1733993414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1733993414, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out1733993414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1733993414} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 10:16:50,249 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork3_#t~ite31_38| v_~y$r_buff1_thd3~0_57) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_57, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_37|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 10:16:50,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L824-->L824-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-246507355 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-246507355 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-246507355 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In-246507355 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite35_Out-246507355| ~y$w_buff1_used~0_In-246507355) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork0_#t~ite35_Out-246507355| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-246507355, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-246507355, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-246507355, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-246507355, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out-246507355|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-246507355} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 10:16:50,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In-14876005 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-14876005 256)))) (or (and (= |P3Thread1of1ForFork0_#t~ite36_Out-14876005| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~ite36_Out-14876005| ~y$r_buff0_thd4~0_In-14876005)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-14876005, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-14876005} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-14876005, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-14876005, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-14876005|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 10:16:50,250 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L826-->L826-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1467949986 256))) (.cse2 (= (mod ~y$r_buff1_thd4~0_In-1467949986 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1467949986 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1467949986 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork0_#t~ite37_Out-1467949986| ~y$r_buff1_thd4~0_In-1467949986)) (and (= |P3Thread1of1ForFork0_#t~ite37_Out-1467949986| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1467949986, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1467949986, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1467949986, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1467949986, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1467949986, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out-1467949986|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 10:16:50,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L826-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_34| v_~y$r_buff1_thd4~0_55) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_77 (+ v_~__unbuffered_cnt~0_78 1))) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_55, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_33|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:16:50,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L764-->L764-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In6450241 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In6450241 256)))) (or (and (= 0 (mod ~y$r_buff1_thd2~0_In6450241 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In6450241 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In6450241 256) 0))) (= |P1Thread1of1ForFork2_#t~ite11_Out6450241| ~y$w_buff1~0_In6450241) .cse1 (= |P1Thread1of1ForFork2_#t~ite11_Out6450241| |P1Thread1of1ForFork2_#t~ite12_Out6450241|)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out6450241| ~y$w_buff1~0_In6450241) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_In6450241| |P1Thread1of1ForFork2_#t~ite11_Out6450241|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In6450241, ~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In6450241, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In6450241|, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In6450241, ~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In6450241, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out6450241|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out6450241|, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:16:50,251 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L765-->L765-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-507587312 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite14_Out-507587312| |P1Thread1of1ForFork2_#t~ite15_Out-507587312|) (= ~y$w_buff0_used~0_In-507587312 |P1Thread1of1ForFork2_#t~ite14_Out-507587312|) (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-507587312 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-507587312 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In-507587312 256) 0)) (= (mod ~y$w_buff0_used~0_In-507587312 256) 0)))) (and (= ~y$w_buff0_used~0_In-507587312 |P1Thread1of1ForFork2_#t~ite15_Out-507587312|) (= |P1Thread1of1ForFork2_#t~ite14_In-507587312| |P1Thread1of1ForFork2_#t~ite14_Out-507587312|) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507587312, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-507587312, ~weak$$choice2~0=~weak$$choice2~0_In-507587312, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-507587312, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-507587312, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-507587312, ~weak$$choice2~0=~weak$$choice2~0_In-507587312, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-507587312|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-507587312|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-507587312} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 10:16:50,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L767-->L768: Formula: (and (= v_~y$r_buff0_thd2~0_109 v_~y$r_buff0_thd2~0_108) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 10:16:50,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L768-->L768-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1256221764 256)))) (or (and (not .cse0) (= ~y$r_buff1_thd2~0_In1256221764 |P1Thread1of1ForFork2_#t~ite24_Out1256221764|) (= |P1Thread1of1ForFork2_#t~ite23_In1256221764| |P1Thread1of1ForFork2_#t~ite23_Out1256221764|)) (and (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In1256221764 256)))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1256221764 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1256221764 256))) (= (mod ~y$w_buff0_used~0_In1256221764 256) 0))) (= |P1Thread1of1ForFork2_#t~ite23_Out1256221764| |P1Thread1of1ForFork2_#t~ite24_Out1256221764|) (= ~y$r_buff1_thd2~0_In1256221764 |P1Thread1of1ForFork2_#t~ite23_Out1256221764|) .cse0))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1256221764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1256221764, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1256221764, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In1256221764|, ~weak$$choice2~0=~weak$$choice2~0_In1256221764, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1256221764, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1256221764, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1256221764, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out1256221764|, ~weak$$choice2~0=~weak$$choice2~0_In1256221764, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out1256221764|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1256221764} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 10:16:50,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L770-->L778: Formula: (and (= (+ v_~__unbuffered_cnt~0_22 1) v_~__unbuffered_cnt~0_21) (= v_~y~0_29 v_~y$mem_tmp~0_6) (= 0 v_~y$flush_delayed~0_8) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_22} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_6, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~y~0=v_~y~0_29, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 10:16:50,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L851-1-->L857: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_20) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:16:50,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L857-2-->L857-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In892162267 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In892162267 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite42_Out892162267| ~y~0_In892162267)) (and (= |ULTIMATE.start_main_#t~ite42_Out892162267| ~y$w_buff1~0_In892162267) (not .cse0) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} OutVars{~y$w_buff1~0=~y$w_buff1~0_In892162267, ~y~0=~y~0_In892162267, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out892162267|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In892162267, ~y$w_buff1_used~0=~y$w_buff1_used~0_In892162267} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:16:50,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L857-4-->L858: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite42_14|) InVars {ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} OutVars{ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_13|, ~y~0=v_~y~0_46, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ~y~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 10:16:50,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L858-->L858-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-988858907 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-988858907 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out-988858907| ~y$w_buff0_used~0_In-988858907) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-988858907|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-988858907} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-988858907, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-988858907, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-988858907|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 10:16:50,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L859-->L859-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-156830557 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-156830557 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-156830557 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-156830557 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-156830557|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-156830557 |ULTIMATE.start_main_#t~ite45_Out-156830557|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-156830557, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-156830557, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-156830557, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-156830557|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-156830557} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 10:16:50,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L860-->L860-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In401782435 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In401782435 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In401782435 |ULTIMATE.start_main_#t~ite46_Out401782435|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite46_Out401782435| 0) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out401782435|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 10:16:50,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L861-->L861-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1595864320 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite47_Out-1595864320| 0)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out-1595864320| ~y$r_buff1_thd0~0_In-1595864320) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1595864320|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 10:16:50,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L861-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_73|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p2_EAX~0_78) (= 0 v_~__unbuffered_p1_EAX~0_32) (= 0 v_~__unbuffered_p3_EBX~0_31) (= 0 v_~__unbuffered_p0_EAX~0_46) (= 1 v_~__unbuffered_p3_EAX~0_31))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_29) (= (mod v_~main$tmp_guard1~0_29 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_73|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_46, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_32, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_72|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_78, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_31, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:16:50,307 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4ad6b6a6-afeb-4935-a0f6-09cfed84de02/bin/utaipan/witness.graphml [2019-12-07 10:16:50,307 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:16:50,308 INFO L168 Benchmark]: Toolchain (without parser) took 231054.72 ms. Allocated memory was 1.0 GB in the beginning and 8.5 GB in the end (delta: 7.5 GB). Free memory was 938.1 MB in the beginning and 4.4 GB in the end (delta: -3.5 GB). Peak memory consumption was 4.0 GB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,309 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:16:50,309 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -126.7 MB). Peak memory consumption was 29.1 MB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,309 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,309 INFO L168 Benchmark]: Boogie Preprocessor took 25.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:16:50,309 INFO L168 Benchmark]: RCFGBuilder took 384.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,310 INFO L168 Benchmark]: TraceAbstraction took 230134.19 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,310 INFO L168 Benchmark]: Witness Printer took 67.09 ms. Allocated memory is still 8.5 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 41.3 MB). Peak memory consumption was 41.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:16:50,311 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.33 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -126.7 MB). Peak memory consumption was 29.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.34 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 384.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 230134.19 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. * Witness Printer took 67.09 ms. Allocated memory is still 8.5 GB. Free memory was 4.5 GB in the beginning and 4.4 GB in the end (delta: 41.3 MB). Peak memory consumption was 41.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.8s, 182 ProgramPointsBefore, 88 ProgramPointsAfterwards, 210 TransitionsBefore, 92 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 29 ChoiceCompositions, 7271 VarBasedMoverChecksPositive, 240 VarBasedMoverChecksNegative, 64 SemBasedMoverChecksPositive, 256 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 72619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L845] FCALL, FORK 0 pthread_create(&t437, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L847] FCALL, FORK 0 pthread_create(&t438, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L849] FCALL, FORK 0 pthread_create(&t439, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L788] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L789] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L790] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L791] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L792] 3 y$r_buff1_thd4 = y$r_buff0_thd4 [L793] 3 y$r_buff0_thd3 = (_Bool)1 [L796] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L799] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L851] FCALL, FORK 0 pthread_create(&t440, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L813] 4 z = 1 [L816] 4 __unbuffered_p3_EAX = z [L819] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L822] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L799] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L822] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L755] 2 x = 1 [L758] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L759] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L760] 2 y$flush_delayed = weak$$choice2 [L761] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L800] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L762] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L762] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L763] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L823] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L824] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L825] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L764] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L765] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L766] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L766] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L768] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L769] 2 __unbuffered_p1_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L857] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L858] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L859] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L860] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 229.9s, OverallIterations: 41, TraceHistogramMax: 1, AutomataDifference: 98.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9004 SDtfs, 15756 SDslu, 47880 SDs, 0 SdLazy, 71966 SolverSat, 1407 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 47.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1112 GetRequests, 38 SyntacticMatches, 56 SemanticMatches, 1018 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12747 ImplicationChecksByTransitivity, 21.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=272736occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 90.4s AutomataMinimizationTime, 40 MinimizatonAttempts, 288683 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 7.7s InterpolantComputationTime, 1978 NumberOfCodeBlocks, 1978 NumberOfCodeBlocksAsserted, 41 NumberOfCheckSat, 1879 ConstructedInterpolants, 0 QuantifiedInterpolants, 780967 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 40 InterpolantComputations, 40 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...