./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4e836d0db5a965c1245e6f7af36974202ceef14c .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:14:44,378 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:14:44,379 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:14:44,386 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:14:44,387 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:14:44,387 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:14:44,388 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:14:44,389 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:14:44,391 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:14:44,391 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:14:44,392 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:14:44,393 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:14:44,393 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:14:44,394 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:14:44,394 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:14:44,395 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:14:44,395 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:14:44,396 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:14:44,398 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:14:44,399 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:14:44,400 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:14:44,401 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:14:44,402 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:14:44,402 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:14:44,404 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:14:44,404 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:14:44,404 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:14:44,405 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:14:44,405 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:14:44,406 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:14:44,406 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:14:44,406 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:14:44,407 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:14:44,407 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:14:44,408 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:14:44,408 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:14:44,408 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:14:44,408 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:14:44,408 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:14:44,409 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:14:44,409 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:14:44,410 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:14:44,419 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:14:44,419 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:14:44,420 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:14:44,420 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:14:44,420 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:14:44,420 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:14:44,420 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:14:44,420 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:14:44,421 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:14:44,421 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:14:44,422 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:14:44,422 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:14:44,423 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:14:44,423 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:14:44,424 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:14:44,424 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:14:44,425 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4e836d0db5a965c1245e6f7af36974202ceef14c [2019-12-07 11:14:44,523 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:14:44,533 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:14:44,536 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:14:44,537 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:14:44,537 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:14:44,538 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i [2019-12-07 11:14:44,578 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/data/45caa31b0/ee265b702c4a4825a594836068dfd4d0/FLAG9a966d177 [2019-12-07 11:14:45,032 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:14:45,033 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/sv-benchmarks/c/pthread-wmm/mix019_pso.oepc.i [2019-12-07 11:14:45,042 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/data/45caa31b0/ee265b702c4a4825a594836068dfd4d0/FLAG9a966d177 [2019-12-07 11:14:45,051 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/data/45caa31b0/ee265b702c4a4825a594836068dfd4d0 [2019-12-07 11:14:45,053 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:14:45,054 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:14:45,055 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:14:45,055 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:14:45,057 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:14:45,058 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,059 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75544c05 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45, skipping insertion in model container [2019-12-07 11:14:45,060 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,064 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:14:45,091 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:14:45,352 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:14:45,359 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:14:45,402 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:14:45,448 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:14:45,448 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45 WrapperNode [2019-12-07 11:14:45,448 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:14:45,449 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:14:45,449 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:14:45,449 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:14:45,455 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,469 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,487 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:14:45,488 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:14:45,488 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:14:45,488 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:14:45,494 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,495 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,498 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,498 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,505 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,508 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,510 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... [2019-12-07 11:14:45,513 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:14:45,514 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:14:45,514 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:14:45,514 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:14:45,514 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:14:45,555 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:14:45,555 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:14:45,555 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:14:45,556 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:14:45,556 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:14:45,556 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:14:45,556 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:14:45,557 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:14:45,914 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:14:45,915 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:14:45,915 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:14:45 BoogieIcfgContainer [2019-12-07 11:14:45,916 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:14:45,916 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:14:45,916 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:14:45,918 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:14:45,918 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:14:45" (1/3) ... [2019-12-07 11:14:45,919 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e4b77 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:14:45, skipping insertion in model container [2019-12-07 11:14:45,919 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:14:45" (2/3) ... [2019-12-07 11:14:45,919 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e4b77 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:14:45, skipping insertion in model container [2019-12-07 11:14:45,919 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:14:45" (3/3) ... [2019-12-07 11:14:45,921 INFO L109 eAbstractionObserver]: Analyzing ICFG mix019_pso.oepc.i [2019-12-07 11:14:45,927 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:14:45,927 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:14:45,933 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:14:45,934 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:14:45,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,961 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,961 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,965 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,969 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,970 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,971 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,972 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,973 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,974 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,975 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,976 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,977 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:14:45,992 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:14:46,005 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:14:46,005 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:14:46,005 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:14:46,006 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:14:46,006 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:14:46,006 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:14:46,006 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:14:46,006 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:14:46,019 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 11:14:46,020 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 11:14:46,087 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 11:14:46,087 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:14:46,098 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:14:46,114 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 11:14:46,150 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 11:14:46,150 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:14:46,155 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:14:46,171 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:14:46,171 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:14:49,022 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 11:14:49,265 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 11:14:49,265 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 11:14:49,267 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 11:15:06,681 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 11:15:06,683 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 11:15:06,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:15:06,687 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:06,687 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:15:06,687 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:06,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:06,691 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 11:15:06,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:06,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945447253] [2019-12-07 11:15:06,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:06,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:06,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:06,824 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945447253] [2019-12-07 11:15:06,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:06,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:15:06,825 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1324683970] [2019-12-07 11:15:06,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:06,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:06,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:06,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:06,844 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 11:15:07,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:07,696 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 11:15:07,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:07,698 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:15:07,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:08,233 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 11:15:08,233 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 11:15:08,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:12,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 11:15:14,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 11:15:14,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 11:15:15,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 11:15:15,146 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 11:15:15,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:15,146 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 11:15:15,147 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:15,147 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 11:15:15,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:15:15,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:15,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:15,151 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:15,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:15,152 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 11:15:15,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:15,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733092341] [2019-12-07 11:15:15,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:15,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:15,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:15,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733092341] [2019-12-07 11:15:15,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:15,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:15,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [201575255] [2019-12-07 11:15:15,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:15,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:15,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:15,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:15,221 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 11:15:16,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:16,446 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 11:15:16,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:16,446 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:15:16,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:16,871 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 11:15:16,871 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 11:15:16,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:21,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 11:15:25,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 11:15:25,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 11:15:26,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 11:15:26,037 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 11:15:26,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:26,038 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 11:15:26,038 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:26,038 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 11:15:26,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:15:26,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:26,041 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:26,042 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:26,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:26,042 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 11:15:26,042 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:26,042 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850784877] [2019-12-07 11:15:26,042 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:26,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:26,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:26,094 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850784877] [2019-12-07 11:15:26,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:26,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:26,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [381947173] [2019-12-07 11:15:26,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:26,095 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:26,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:26,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:26,095 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 11:15:27,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:27,241 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 11:15:27,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:27,241 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:15:27,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:28,264 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 11:15:28,264 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 11:15:28,264 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:33,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 11:15:36,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 11:15:36,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 11:15:39,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 11:15:39,892 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 11:15:39,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:39,893 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 11:15:39,893 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:39,893 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 11:15:39,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:15:39,900 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:39,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:39,900 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:39,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:39,901 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 11:15:39,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:39,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1999676011] [2019-12-07 11:15:39,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:39,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:39,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:39,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1999676011] [2019-12-07 11:15:39,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:39,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:39,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944269431] [2019-12-07 11:15:39,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:39,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:39,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:39,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:39,940 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 11:15:41,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:41,118 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 11:15:41,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:41,119 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 11:15:41,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:41,869 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 11:15:41,869 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 11:15:41,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:47,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 11:15:51,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 11:15:51,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 11:15:51,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 11:15:51,994 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 11:15:51,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:51,995 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 11:15:51,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:51,995 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 11:15:52,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:15:52,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:52,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:52,003 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:52,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:52,003 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 11:15:52,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:52,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130604665] [2019-12-07 11:15:52,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:52,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:52,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:52,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130604665] [2019-12-07 11:15:52,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:52,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:52,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1883758212] [2019-12-07 11:15:52,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:52,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:52,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:52,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:52,045 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 11:15:53,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:53,731 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 11:15:53,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:53,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:15:53,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:54,421 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 11:15:54,421 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 11:15:54,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:16:03,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 11:16:06,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 11:16:06,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 11:16:07,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 11:16:07,194 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 11:16:07,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:07,194 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 11:16:07,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:16:07,194 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 11:16:07,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:16:07,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:07,201 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:07,201 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:07,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:07,202 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 11:16:07,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:07,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856550063] [2019-12-07 11:16:07,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:07,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:07,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:07,234 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1856550063] [2019-12-07 11:16:07,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:07,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:16:07,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483289879] [2019-12-07 11:16:07,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:16:07,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:07,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:16:07,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:16:07,235 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 11:16:09,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:09,027 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 11:16:09,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:16:09,028 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:16:09,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:09,745 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 11:16:09,745 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 11:16:09,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:16:15,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 11:16:19,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 11:16:19,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 11:16:20,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 11:16:20,709 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 11:16:20,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:20,710 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 11:16:20,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:16:20,710 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 11:16:20,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:16:20,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:20,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:20,722 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:20,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:20,722 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 11:16:20,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:20,722 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64132218] [2019-12-07 11:16:20,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:20,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:20,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:20,766 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64132218] [2019-12-07 11:16:20,766 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:20,766 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:16:20,767 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708686627] [2019-12-07 11:16:20,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:16:20,767 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:20,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:16:20,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:16:20,767 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 11:16:25,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:25,871 INFO L93 Difference]: Finished difference Result 426567 states and 1746949 transitions. [2019-12-07 11:16:25,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:16:25,872 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:16:25,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:26,838 INFO L225 Difference]: With dead ends: 426567 [2019-12-07 11:16:26,838 INFO L226 Difference]: Without dead ends: 388856 [2019-12-07 11:16:26,838 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:16:33,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388856 states. [2019-12-07 11:16:39,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388856 to 372573. [2019-12-07 11:16:39,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 372573 states. [2019-12-07 11:16:41,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 372573 states to 372573 states and 1538118 transitions. [2019-12-07 11:16:41,016 INFO L78 Accepts]: Start accepts. Automaton has 372573 states and 1538118 transitions. Word has length 18 [2019-12-07 11:16:41,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:41,017 INFO L462 AbstractCegarLoop]: Abstraction has 372573 states and 1538118 transitions. [2019-12-07 11:16:41,017 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:16:41,017 INFO L276 IsEmpty]: Start isEmpty. Operand 372573 states and 1538118 transitions. [2019-12-07 11:16:41,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:16:41,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:41,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:41,045 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:41,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:41,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1595183089, now seen corresponding path program 1 times [2019-12-07 11:16:41,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:41,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019396714] [2019-12-07 11:16:41,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:41,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:41,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:41,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019396714] [2019-12-07 11:16:41,074 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:41,075 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:16:41,075 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979303337] [2019-12-07 11:16:41,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:16:41,075 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:41,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:16:41,076 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:16:41,076 INFO L87 Difference]: Start difference. First operand 372573 states and 1538118 transitions. Second operand 3 states. [2019-12-07 11:16:43,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:43,205 INFO L93 Difference]: Finished difference Result 372215 states and 1536731 transitions. [2019-12-07 11:16:43,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:16:43,206 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:16:43,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:44,824 INFO L225 Difference]: With dead ends: 372215 [2019-12-07 11:16:44,825 INFO L226 Difference]: Without dead ends: 372215 [2019-12-07 11:16:44,825 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:16:55,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372215 states. [2019-12-07 11:17:00,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372215 to 369047. [2019-12-07 11:17:00,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369047 states. [2019-12-07 11:17:02,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369047 states to 369047 states and 1524635 transitions. [2019-12-07 11:17:02,059 INFO L78 Accepts]: Start accepts. Automaton has 369047 states and 1524635 transitions. Word has length 19 [2019-12-07 11:17:02,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:17:02,060 INFO L462 AbstractCegarLoop]: Abstraction has 369047 states and 1524635 transitions. [2019-12-07 11:17:02,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:17:02,060 INFO L276 IsEmpty]: Start isEmpty. Operand 369047 states and 1524635 transitions. [2019-12-07 11:17:02,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:17:02,086 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:17:02,086 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:17:02,086 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:17:02,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:17:02,087 INFO L82 PathProgramCache]: Analyzing trace with hash 700766782, now seen corresponding path program 1 times [2019-12-07 11:17:02,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:17:02,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1206454705] [2019-12-07 11:17:02,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:17:02,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:17:02,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:17:02,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1206454705] [2019-12-07 11:17:02,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:17:02,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:17:02,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409176754] [2019-12-07 11:17:02,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:17:02,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:17:02,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:17:02,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:17:02,122 INFO L87 Difference]: Start difference. First operand 369047 states and 1524635 transitions. Second operand 3 states. [2019-12-07 11:17:04,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:17:04,128 INFO L93 Difference]: Finished difference Result 346890 states and 1416741 transitions. [2019-12-07 11:17:04,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:17:04,129 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:17:04,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:17:05,088 INFO L225 Difference]: With dead ends: 346890 [2019-12-07 11:17:05,088 INFO L226 Difference]: Without dead ends: 346890 [2019-12-07 11:17:05,088 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:17:11,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346890 states. [2019-12-07 11:17:16,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346890 to 342976. [2019-12-07 11:17:16,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342976 states. [2019-12-07 11:17:17,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342976 states to 342976 states and 1402379 transitions. [2019-12-07 11:17:17,798 INFO L78 Accepts]: Start accepts. Automaton has 342976 states and 1402379 transitions. Word has length 19 [2019-12-07 11:17:17,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:17:17,798 INFO L462 AbstractCegarLoop]: Abstraction has 342976 states and 1402379 transitions. [2019-12-07 11:17:17,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:17:17,798 INFO L276 IsEmpty]: Start isEmpty. Operand 342976 states and 1402379 transitions. [2019-12-07 11:17:17,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:17:17,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:17:17,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:17:17,822 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:17:17,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:17:17,823 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 11:17:17,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:17:17,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104174576] [2019-12-07 11:17:17,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:17:17,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:17:17,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:17:17,860 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104174576] [2019-12-07 11:17:17,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:17:17,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:17:17,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511796224] [2019-12-07 11:17:17,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:17:17,861 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:17:17,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:17:17,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:17:17,861 INFO L87 Difference]: Start difference. First operand 342976 states and 1402379 transitions. Second operand 5 states. [2019-12-07 11:17:23,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:17:23,727 INFO L93 Difference]: Finished difference Result 486564 states and 1950082 transitions. [2019-12-07 11:17:23,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:17:23,728 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:17:23,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:17:25,301 INFO L225 Difference]: With dead ends: 486564 [2019-12-07 11:17:25,301 INFO L226 Difference]: Without dead ends: 486382 [2019-12-07 11:17:25,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:17:33,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486382 states. [2019-12-07 11:17:39,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486382 to 366451. [2019-12-07 11:17:39,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366451 states. [2019-12-07 11:17:40,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366451 states to 366451 states and 1493995 transitions. [2019-12-07 11:17:40,669 INFO L78 Accepts]: Start accepts. Automaton has 366451 states and 1493995 transitions. Word has length 19 [2019-12-07 11:17:40,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:17:40,670 INFO L462 AbstractCegarLoop]: Abstraction has 366451 states and 1493995 transitions. [2019-12-07 11:17:40,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:17:40,670 INFO L276 IsEmpty]: Start isEmpty. Operand 366451 states and 1493995 transitions. [2019-12-07 11:17:40,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:17:40,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:17:40,695 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:17:40,695 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:17:40,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:17:40,695 INFO L82 PathProgramCache]: Analyzing trace with hash 1088543872, now seen corresponding path program 1 times [2019-12-07 11:17:40,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:17:40,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307659561] [2019-12-07 11:17:40,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:17:40,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:17:40,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:17:40,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307659561] [2019-12-07 11:17:40,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:17:40,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:17:40,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938064790] [2019-12-07 11:17:40,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:17:40,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:17:40,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:17:40,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:17:40,720 INFO L87 Difference]: Start difference. First operand 366451 states and 1493995 transitions. Second operand 3 states. [2019-12-07 11:17:42,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:17:42,997 INFO L93 Difference]: Finished difference Result 366071 states and 1492583 transitions. [2019-12-07 11:17:42,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:17:42,998 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:17:42,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:17:43,972 INFO L225 Difference]: With dead ends: 366071 [2019-12-07 11:17:43,972 INFO L226 Difference]: Without dead ends: 366071 [2019-12-07 11:17:43,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:17:54,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366071 states. [2019-12-07 11:17:59,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366071 to 366071. [2019-12-07 11:17:59,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366071 states. [2019-12-07 11:18:00,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366071 states to 366071 states and 1492583 transitions. [2019-12-07 11:18:00,905 INFO L78 Accepts]: Start accepts. Automaton has 366071 states and 1492583 transitions. Word has length 19 [2019-12-07 11:18:00,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:00,906 INFO L462 AbstractCegarLoop]: Abstraction has 366071 states and 1492583 transitions. [2019-12-07 11:18:00,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:00,906 INFO L276 IsEmpty]: Start isEmpty. Operand 366071 states and 1492583 transitions. [2019-12-07 11:18:00,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:18:00,931 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:00,931 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:00,931 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:00,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:00,931 INFO L82 PathProgramCache]: Analyzing trace with hash -2047376576, now seen corresponding path program 1 times [2019-12-07 11:18:00,931 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:00,931 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994583121] [2019-12-07 11:18:00,931 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:00,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:00,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:00,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [994583121] [2019-12-07 11:18:00,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:00,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:00,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777102778] [2019-12-07 11:18:00,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:00,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:00,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:00,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:00,959 INFO L87 Difference]: Start difference. First operand 366071 states and 1492583 transitions. Second operand 3 states. [2019-12-07 11:18:01,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:01,183 INFO L93 Difference]: Finished difference Result 73045 states and 234851 transitions. [2019-12-07 11:18:01,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:01,183 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 11:18:01,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:01,291 INFO L225 Difference]: With dead ends: 73045 [2019-12-07 11:18:01,291 INFO L226 Difference]: Without dead ends: 73045 [2019-12-07 11:18:01,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:01,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73045 states. [2019-12-07 11:18:02,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73045 to 73045. [2019-12-07 11:18:02,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73045 states. [2019-12-07 11:18:02,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73045 states to 73045 states and 234851 transitions. [2019-12-07 11:18:02,419 INFO L78 Accepts]: Start accepts. Automaton has 73045 states and 234851 transitions. Word has length 20 [2019-12-07 11:18:02,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:02,420 INFO L462 AbstractCegarLoop]: Abstraction has 73045 states and 234851 transitions. [2019-12-07 11:18:02,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:02,420 INFO L276 IsEmpty]: Start isEmpty. Operand 73045 states and 234851 transitions. [2019-12-07 11:18:02,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:18:02,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:02,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:02,427 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:02,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:02,427 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 11:18:02,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:02,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826330634] [2019-12-07 11:18:02,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:02,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:02,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:02,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826330634] [2019-12-07 11:18:02,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:02,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:02,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513033219] [2019-12-07 11:18:02,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:02,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:02,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:02,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:02,464 INFO L87 Difference]: Start difference. First operand 73045 states and 234851 transitions. Second operand 5 states. [2019-12-07 11:18:03,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:03,376 INFO L93 Difference]: Finished difference Result 95045 states and 298925 transitions. [2019-12-07 11:18:03,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:18:03,377 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:18:03,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:03,510 INFO L225 Difference]: With dead ends: 95045 [2019-12-07 11:18:03,510 INFO L226 Difference]: Without dead ends: 95031 [2019-12-07 11:18:03,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:18:03,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95031 states. [2019-12-07 11:18:04,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95031 to 77503. [2019-12-07 11:18:04,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77503 states. [2019-12-07 11:18:04,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77503 states to 77503 states and 248087 transitions. [2019-12-07 11:18:04,851 INFO L78 Accepts]: Start accepts. Automaton has 77503 states and 248087 transitions. Word has length 22 [2019-12-07 11:18:04,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:04,852 INFO L462 AbstractCegarLoop]: Abstraction has 77503 states and 248087 transitions. [2019-12-07 11:18:04,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:04,852 INFO L276 IsEmpty]: Start isEmpty. Operand 77503 states and 248087 transitions. [2019-12-07 11:18:04,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:18:04,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:04,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:04,859 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:04,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:04,859 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 11:18:04,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:04,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799858529] [2019-12-07 11:18:04,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:04,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:04,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:04,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799858529] [2019-12-07 11:18:04,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:04,894 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:04,894 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [378660724] [2019-12-07 11:18:04,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:04,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:04,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:04,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:04,894 INFO L87 Difference]: Start difference. First operand 77503 states and 248087 transitions. Second operand 5 states. [2019-12-07 11:18:05,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:05,418 INFO L93 Difference]: Finished difference Result 98221 states and 310051 transitions. [2019-12-07 11:18:05,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:18:05,419 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:18:05,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:05,740 INFO L225 Difference]: With dead ends: 98221 [2019-12-07 11:18:05,741 INFO L226 Difference]: Without dead ends: 98207 [2019-12-07 11:18:05,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:18:06,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98207 states. [2019-12-07 11:18:06,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98207 to 76018. [2019-12-07 11:18:06,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76018 states. [2019-12-07 11:18:07,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76018 states to 76018 states and 243643 transitions. [2019-12-07 11:18:07,023 INFO L78 Accepts]: Start accepts. Automaton has 76018 states and 243643 transitions. Word has length 22 [2019-12-07 11:18:07,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:07,023 INFO L462 AbstractCegarLoop]: Abstraction has 76018 states and 243643 transitions. [2019-12-07 11:18:07,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:07,024 INFO L276 IsEmpty]: Start isEmpty. Operand 76018 states and 243643 transitions. [2019-12-07 11:18:07,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 11:18:07,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:07,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:07,040 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:07,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:07,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 11:18:07,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:07,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013847546] [2019-12-07 11:18:07,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:07,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:07,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:07,079 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013847546] [2019-12-07 11:18:07,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:07,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:07,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44257945] [2019-12-07 11:18:07,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:07,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:07,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:07,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:07,080 INFO L87 Difference]: Start difference. First operand 76018 states and 243643 transitions. Second operand 5 states. [2019-12-07 11:18:07,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:07,503 INFO L93 Difference]: Finished difference Result 92182 states and 291859 transitions. [2019-12-07 11:18:07,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:18:07,503 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 11:18:07,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:07,638 INFO L225 Difference]: With dead ends: 92182 [2019-12-07 11:18:07,638 INFO L226 Difference]: Without dead ends: 92134 [2019-12-07 11:18:07,639 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:18:07,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92134 states. [2019-12-07 11:18:08,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92134 to 79055. [2019-12-07 11:18:08,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79055 states. [2019-12-07 11:18:09,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79055 states to 79055 states and 252753 transitions. [2019-12-07 11:18:09,068 INFO L78 Accepts]: Start accepts. Automaton has 79055 states and 252753 transitions. Word has length 26 [2019-12-07 11:18:09,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:09,068 INFO L462 AbstractCegarLoop]: Abstraction has 79055 states and 252753 transitions. [2019-12-07 11:18:09,068 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:09,068 INFO L276 IsEmpty]: Start isEmpty. Operand 79055 states and 252753 transitions. [2019-12-07 11:18:09,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:18:09,091 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:09,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:09,091 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:09,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:09,092 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 11:18:09,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:09,092 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264569854] [2019-12-07 11:18:09,092 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:09,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:09,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:09,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264569854] [2019-12-07 11:18:09,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:09,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:09,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525282997] [2019-12-07 11:18:09,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:09,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:09,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:09,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:09,122 INFO L87 Difference]: Start difference. First operand 79055 states and 252753 transitions. Second operand 5 states. [2019-12-07 11:18:09,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:09,567 INFO L93 Difference]: Finished difference Result 92878 states and 292736 transitions. [2019-12-07 11:18:09,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:18:09,568 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:18:09,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:09,708 INFO L225 Difference]: With dead ends: 92878 [2019-12-07 11:18:09,708 INFO L226 Difference]: Without dead ends: 92834 [2019-12-07 11:18:09,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:18:10,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92834 states. [2019-12-07 11:18:10,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92834 to 78251. [2019-12-07 11:18:10,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78251 states. [2019-12-07 11:18:11,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78251 states to 78251 states and 250288 transitions. [2019-12-07 11:18:11,145 INFO L78 Accepts]: Start accepts. Automaton has 78251 states and 250288 transitions. Word has length 28 [2019-12-07 11:18:11,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:11,146 INFO L462 AbstractCegarLoop]: Abstraction has 78251 states and 250288 transitions. [2019-12-07 11:18:11,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:11,146 INFO L276 IsEmpty]: Start isEmpty. Operand 78251 states and 250288 transitions. [2019-12-07 11:18:11,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 11:18:11,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:11,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:11,173 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:11,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:11,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 11:18:11,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:11,174 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199615509] [2019-12-07 11:18:11,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:11,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:11,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:11,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199615509] [2019-12-07 11:18:11,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:11,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:11,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059197399] [2019-12-07 11:18:11,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:18:11,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:11,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:18:11,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:18:11,202 INFO L87 Difference]: Start difference. First operand 78251 states and 250288 transitions. Second operand 4 states. [2019-12-07 11:18:11,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:11,290 INFO L93 Difference]: Finished difference Result 29980 states and 92119 transitions. [2019-12-07 11:18:11,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:18:11,290 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 11:18:11,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:11,325 INFO L225 Difference]: With dead ends: 29980 [2019-12-07 11:18:11,325 INFO L226 Difference]: Without dead ends: 29980 [2019-12-07 11:18:11,326 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:18:11,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29980 states. [2019-12-07 11:18:11,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29980 to 27890. [2019-12-07 11:18:11,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27890 states. [2019-12-07 11:18:11,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27890 states to 27890 states and 85818 transitions. [2019-12-07 11:18:11,757 INFO L78 Accepts]: Start accepts. Automaton has 27890 states and 85818 transitions. Word has length 30 [2019-12-07 11:18:11,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:11,758 INFO L462 AbstractCegarLoop]: Abstraction has 27890 states and 85818 transitions. [2019-12-07 11:18:11,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:18:11,758 INFO L276 IsEmpty]: Start isEmpty. Operand 27890 states and 85818 transitions. [2019-12-07 11:18:11,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 11:18:11,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:11,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:11,778 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:11,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:11,778 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 11:18:11,778 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:11,778 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953072887] [2019-12-07 11:18:11,778 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:11,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:11,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:11,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953072887] [2019-12-07 11:18:11,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:11,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:18:11,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037962539] [2019-12-07 11:18:11,821 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:18:11,821 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:11,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:18:11,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:11,822 INFO L87 Difference]: Start difference. First operand 27890 states and 85818 transitions. Second operand 6 states. [2019-12-07 11:18:12,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:12,262 INFO L93 Difference]: Finished difference Result 34486 states and 104079 transitions. [2019-12-07 11:18:12,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:18:12,263 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 11:18:12,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:12,303 INFO L225 Difference]: With dead ends: 34486 [2019-12-07 11:18:12,303 INFO L226 Difference]: Without dead ends: 34486 [2019-12-07 11:18:12,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:18:12,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34486 states. [2019-12-07 11:18:12,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34486 to 28067. [2019-12-07 11:18:12,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28067 states. [2019-12-07 11:18:12,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28067 states to 28067 states and 86329 transitions. [2019-12-07 11:18:12,783 INFO L78 Accepts]: Start accepts. Automaton has 28067 states and 86329 transitions. Word has length 32 [2019-12-07 11:18:12,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:12,783 INFO L462 AbstractCegarLoop]: Abstraction has 28067 states and 86329 transitions. [2019-12-07 11:18:12,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:18:12,783 INFO L276 IsEmpty]: Start isEmpty. Operand 28067 states and 86329 transitions. [2019-12-07 11:18:12,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:18:12,804 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:12,804 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:12,804 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:12,804 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:12,804 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 11:18:12,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:12,805 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280188720] [2019-12-07 11:18:12,805 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:12,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:12,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:12,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280188720] [2019-12-07 11:18:12,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:12,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:18:12,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1818616370] [2019-12-07 11:18:12,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:18:12,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:12,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:18:12,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:12,853 INFO L87 Difference]: Start difference. First operand 28067 states and 86329 transitions. Second operand 6 states. [2019-12-07 11:18:13,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:13,291 INFO L93 Difference]: Finished difference Result 34223 states and 103468 transitions. [2019-12-07 11:18:13,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:18:13,291 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 11:18:13,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:13,331 INFO L225 Difference]: With dead ends: 34223 [2019-12-07 11:18:13,331 INFO L226 Difference]: Without dead ends: 34223 [2019-12-07 11:18:13,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:18:13,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34223 states. [2019-12-07 11:18:13,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34223 to 27334. [2019-12-07 11:18:13,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27334 states. [2019-12-07 11:18:13,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27334 states to 27334 states and 84166 transitions. [2019-12-07 11:18:13,787 INFO L78 Accepts]: Start accepts. Automaton has 27334 states and 84166 transitions. Word has length 34 [2019-12-07 11:18:13,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:13,787 INFO L462 AbstractCegarLoop]: Abstraction has 27334 states and 84166 transitions. [2019-12-07 11:18:13,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:18:13,787 INFO L276 IsEmpty]: Start isEmpty. Operand 27334 states and 84166 transitions. [2019-12-07 11:18:13,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:18:13,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:13,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:13,814 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:13,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:13,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 11:18:13,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:13,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056540208] [2019-12-07 11:18:13,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:13,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:13,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:13,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056540208] [2019-12-07 11:18:13,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:13,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:18:13,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [979578495] [2019-12-07 11:18:13,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:13,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:13,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:13,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:13,868 INFO L87 Difference]: Start difference. First operand 27334 states and 84166 transitions. Second operand 5 states. [2019-12-07 11:18:14,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:14,286 INFO L93 Difference]: Finished difference Result 39480 states and 120369 transitions. [2019-12-07 11:18:14,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:18:14,286 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 11:18:14,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:14,333 INFO L225 Difference]: With dead ends: 39480 [2019-12-07 11:18:14,333 INFO L226 Difference]: Without dead ends: 39480 [2019-12-07 11:18:14,333 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:14,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39480 states. [2019-12-07 11:18:14,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39480 to 34806. [2019-12-07 11:18:14,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34806 states. [2019-12-07 11:18:14,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34806 states to 34806 states and 107138 transitions. [2019-12-07 11:18:14,869 INFO L78 Accepts]: Start accepts. Automaton has 34806 states and 107138 transitions. Word has length 41 [2019-12-07 11:18:14,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:14,869 INFO L462 AbstractCegarLoop]: Abstraction has 34806 states and 107138 transitions. [2019-12-07 11:18:14,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:14,869 INFO L276 IsEmpty]: Start isEmpty. Operand 34806 states and 107138 transitions. [2019-12-07 11:18:14,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:18:14,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:14,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:14,902 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:14,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:14,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 11:18:14,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:14,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930684704] [2019-12-07 11:18:14,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:14,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:14,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:14,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930684704] [2019-12-07 11:18:14,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:14,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:14,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457512672] [2019-12-07 11:18:14,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:14,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:14,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:14,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:14,935 INFO L87 Difference]: Start difference. First operand 34806 states and 107138 transitions. Second operand 3 states. [2019-12-07 11:18:15,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:15,031 INFO L93 Difference]: Finished difference Result 34806 states and 105861 transitions. [2019-12-07 11:18:15,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:15,032 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 11:18:15,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:15,077 INFO L225 Difference]: With dead ends: 34806 [2019-12-07 11:18:15,077 INFO L226 Difference]: Without dead ends: 34806 [2019-12-07 11:18:15,077 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:15,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34806 states. [2019-12-07 11:18:15,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34806 to 34120. [2019-12-07 11:18:15,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34120 states. [2019-12-07 11:18:15,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34120 states to 34120 states and 103933 transitions. [2019-12-07 11:18:15,597 INFO L78 Accepts]: Start accepts. Automaton has 34120 states and 103933 transitions. Word has length 41 [2019-12-07 11:18:15,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:15,597 INFO L462 AbstractCegarLoop]: Abstraction has 34120 states and 103933 transitions. [2019-12-07 11:18:15,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:15,597 INFO L276 IsEmpty]: Start isEmpty. Operand 34120 states and 103933 transitions. [2019-12-07 11:18:15,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:18:15,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:15,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:15,629 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:15,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:15,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1961497157, now seen corresponding path program 1 times [2019-12-07 11:18:15,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:15,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247327360] [2019-12-07 11:18:15,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:15,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:15,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:15,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247327360] [2019-12-07 11:18:15,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:15,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:18:15,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1291315994] [2019-12-07 11:18:15,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:15,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:15,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:15,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:15,666 INFO L87 Difference]: Start difference. First operand 34120 states and 103933 transitions. Second operand 5 states. [2019-12-07 11:18:15,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:15,760 INFO L93 Difference]: Finished difference Result 31763 states and 98677 transitions. [2019-12-07 11:18:15,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:18:15,760 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 11:18:15,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:15,800 INFO L225 Difference]: With dead ends: 31763 [2019-12-07 11:18:15,800 INFO L226 Difference]: Without dead ends: 31256 [2019-12-07 11:18:15,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:15,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31256 states. [2019-12-07 11:18:16,103 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31256 to 17654. [2019-12-07 11:18:16,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17654 states. [2019-12-07 11:18:16,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17654 states to 17654 states and 54877 transitions. [2019-12-07 11:18:16,132 INFO L78 Accepts]: Start accepts. Automaton has 17654 states and 54877 transitions. Word has length 42 [2019-12-07 11:18:16,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:16,132 INFO L462 AbstractCegarLoop]: Abstraction has 17654 states and 54877 transitions. [2019-12-07 11:18:16,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:16,132 INFO L276 IsEmpty]: Start isEmpty. Operand 17654 states and 54877 transitions. [2019-12-07 11:18:16,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:18:16,147 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:16,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:16,148 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:16,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:16,148 INFO L82 PathProgramCache]: Analyzing trace with hash -668679299, now seen corresponding path program 1 times [2019-12-07 11:18:16,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:16,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252598706] [2019-12-07 11:18:16,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:16,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:16,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:16,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [252598706] [2019-12-07 11:18:16,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:16,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:18:16,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601624822] [2019-12-07 11:18:16,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:18:16,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:16,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:18:16,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:16,202 INFO L87 Difference]: Start difference. First operand 17654 states and 54877 transitions. Second operand 6 states. [2019-12-07 11:18:16,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:16,689 INFO L93 Difference]: Finished difference Result 23901 states and 73230 transitions. [2019-12-07 11:18:16,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 11:18:16,689 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 11:18:16,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:16,714 INFO L225 Difference]: With dead ends: 23901 [2019-12-07 11:18:16,714 INFO L226 Difference]: Without dead ends: 23901 [2019-12-07 11:18:16,714 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:18:16,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23901 states. [2019-12-07 11:18:16,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23901 to 18478. [2019-12-07 11:18:16,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18478 states. [2019-12-07 11:18:17,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18478 states to 18478 states and 57409 transitions. [2019-12-07 11:18:17,008 INFO L78 Accepts]: Start accepts. Automaton has 18478 states and 57409 transitions. Word has length 65 [2019-12-07 11:18:17,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:17,009 INFO L462 AbstractCegarLoop]: Abstraction has 18478 states and 57409 transitions. [2019-12-07 11:18:17,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:18:17,009 INFO L276 IsEmpty]: Start isEmpty. Operand 18478 states and 57409 transitions. [2019-12-07 11:18:17,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:18:17,025 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:17,025 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:17,025 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:17,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:17,025 INFO L82 PathProgramCache]: Analyzing trace with hash 339295601, now seen corresponding path program 2 times [2019-12-07 11:18:17,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:17,026 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916203639] [2019-12-07 11:18:17,026 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:17,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:17,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:17,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916203639] [2019-12-07 11:18:17,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:17,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:17,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054472200] [2019-12-07 11:18:17,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:17,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:17,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:17,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:17,059 INFO L87 Difference]: Start difference. First operand 18478 states and 57409 transitions. Second operand 3 states. [2019-12-07 11:18:17,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:17,150 INFO L93 Difference]: Finished difference Result 22140 states and 68415 transitions. [2019-12-07 11:18:17,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:17,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:18:17,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:17,176 INFO L225 Difference]: With dead ends: 22140 [2019-12-07 11:18:17,176 INFO L226 Difference]: Without dead ends: 22140 [2019-12-07 11:18:17,177 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:17,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22140 states. [2019-12-07 11:18:17,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22140 to 18558. [2019-12-07 11:18:17,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18558 states. [2019-12-07 11:18:17,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18558 states to 18558 states and 57741 transitions. [2019-12-07 11:18:17,515 INFO L78 Accepts]: Start accepts. Automaton has 18558 states and 57741 transitions. Word has length 65 [2019-12-07 11:18:17,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:17,515 INFO L462 AbstractCegarLoop]: Abstraction has 18558 states and 57741 transitions. [2019-12-07 11:18:17,515 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:17,515 INFO L276 IsEmpty]: Start isEmpty. Operand 18558 states and 57741 transitions. [2019-12-07 11:18:17,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:17,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:17,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:17,530 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:17,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:17,530 INFO L82 PathProgramCache]: Analyzing trace with hash -1524862519, now seen corresponding path program 1 times [2019-12-07 11:18:17,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:17,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181075701] [2019-12-07 11:18:17,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:17,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:17,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:17,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181075701] [2019-12-07 11:18:17,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:17,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:18:17,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853382937] [2019-12-07 11:18:17,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:18:17,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:17,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:18:17,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:18:17,696 INFO L87 Difference]: Start difference. First operand 18558 states and 57741 transitions. Second operand 11 states. [2019-12-07 11:18:19,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:19,285 INFO L93 Difference]: Finished difference Result 86610 states and 272423 transitions. [2019-12-07 11:18:19,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 11:18:19,286 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:18:19,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:19,396 INFO L225 Difference]: With dead ends: 86610 [2019-12-07 11:18:19,396 INFO L226 Difference]: Without dead ends: 80276 [2019-12-07 11:18:19,397 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 643 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=414, Invalid=1748, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 11:18:19,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80276 states. [2019-12-07 11:18:20,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80276 to 27667. [2019-12-07 11:18:20,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27667 states. [2019-12-07 11:18:20,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27667 states to 27667 states and 86325 transitions. [2019-12-07 11:18:20,165 INFO L78 Accepts]: Start accepts. Automaton has 27667 states and 86325 transitions. Word has length 66 [2019-12-07 11:18:20,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,165 INFO L462 AbstractCegarLoop]: Abstraction has 27667 states and 86325 transitions. [2019-12-07 11:18:20,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:18:20,165 INFO L276 IsEmpty]: Start isEmpty. Operand 27667 states and 86325 transitions. [2019-12-07 11:18:20,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:20,193 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,194 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,194 INFO L82 PathProgramCache]: Analyzing trace with hash -1239159877, now seen corresponding path program 2 times [2019-12-07 11:18:20,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:20,194 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536230110] [2019-12-07 11:18:20,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,504 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536230110] [2019-12-07 11:18:20,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:18:20,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [198930479] [2019-12-07 11:18:20,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:18:20,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:20,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:18:20,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:18:20,505 INFO L87 Difference]: Start difference. First operand 27667 states and 86325 transitions. Second operand 15 states. [2019-12-07 11:18:27,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:27,225 INFO L93 Difference]: Finished difference Result 119014 states and 363590 transitions. [2019-12-07 11:18:27,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2019-12-07 11:18:27,226 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 11:18:27,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:27,354 INFO L225 Difference]: With dead ends: 119014 [2019-12-07 11:18:27,355 INFO L226 Difference]: Without dead ends: 93265 [2019-12-07 11:18:27,357 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3248 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1282, Invalid=7648, Unknown=0, NotChecked=0, Total=8930 [2019-12-07 11:18:27,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93265 states. [2019-12-07 11:18:28,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93265 to 28677. [2019-12-07 11:18:28,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28677 states. [2019-12-07 11:18:28,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28677 states to 28677 states and 88675 transitions. [2019-12-07 11:18:28,220 INFO L78 Accepts]: Start accepts. Automaton has 28677 states and 88675 transitions. Word has length 66 [2019-12-07 11:18:28,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:28,220 INFO L462 AbstractCegarLoop]: Abstraction has 28677 states and 88675 transitions. [2019-12-07 11:18:28,220 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:18:28,220 INFO L276 IsEmpty]: Start isEmpty. Operand 28677 states and 88675 transitions. [2019-12-07 11:18:28,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:28,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:28,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:28,250 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:28,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:28,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1334990131, now seen corresponding path program 3 times [2019-12-07 11:18:28,251 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:28,251 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808364252] [2019-12-07 11:18:28,251 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:28,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:28,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:28,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808364252] [2019-12-07 11:18:28,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:28,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:18:28,625 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951333754] [2019-12-07 11:18:28,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:18:28,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:28,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:18:28,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:18:28,625 INFO L87 Difference]: Start difference. First operand 28677 states and 88675 transitions. Second operand 16 states. [2019-12-07 11:18:38,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:38,483 INFO L93 Difference]: Finished difference Result 108057 states and 329905 transitions. [2019-12-07 11:18:38,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2019-12-07 11:18:38,484 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 11:18:38,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:38,601 INFO L225 Difference]: With dead ends: 108057 [2019-12-07 11:18:38,601 INFO L226 Difference]: Without dead ends: 86083 [2019-12-07 11:18:38,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4619 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=1749, Invalid=10683, Unknown=0, NotChecked=0, Total=12432 [2019-12-07 11:18:38,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86083 states. [2019-12-07 11:18:39,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86083 to 27918. [2019-12-07 11:18:39,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27918 states. [2019-12-07 11:18:39,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27918 states to 27918 states and 85888 transitions. [2019-12-07 11:18:39,374 INFO L78 Accepts]: Start accepts. Automaton has 27918 states and 85888 transitions. Word has length 66 [2019-12-07 11:18:39,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:39,374 INFO L462 AbstractCegarLoop]: Abstraction has 27918 states and 85888 transitions. [2019-12-07 11:18:39,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:18:39,374 INFO L276 IsEmpty]: Start isEmpty. Operand 27918 states and 85888 transitions. [2019-12-07 11:18:39,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:39,403 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:39,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:39,404 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:39,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:39,404 INFO L82 PathProgramCache]: Analyzing trace with hash 919450475, now seen corresponding path program 4 times [2019-12-07 11:18:39,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:39,404 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438920497] [2019-12-07 11:18:39,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:39,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:39,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:39,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1438920497] [2019-12-07 11:18:39,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:39,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:18:39,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585019586] [2019-12-07 11:18:39,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:18:39,468 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:39,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:18:39,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:18:39,469 INFO L87 Difference]: Start difference. First operand 27918 states and 85888 transitions. Second operand 7 states. [2019-12-07 11:18:39,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:39,996 INFO L93 Difference]: Finished difference Result 92364 states and 281031 transitions. [2019-12-07 11:18:39,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 11:18:39,996 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:18:39,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:40,094 INFO L225 Difference]: With dead ends: 92364 [2019-12-07 11:18:40,094 INFO L226 Difference]: Without dead ends: 73002 [2019-12-07 11:18:40,095 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 11:18:40,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73002 states. [2019-12-07 11:18:40,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73002 to 26469. [2019-12-07 11:18:40,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26469 states. [2019-12-07 11:18:40,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26469 states to 26469 states and 80856 transitions. [2019-12-07 11:18:40,790 INFO L78 Accepts]: Start accepts. Automaton has 26469 states and 80856 transitions. Word has length 66 [2019-12-07 11:18:40,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:40,790 INFO L462 AbstractCegarLoop]: Abstraction has 26469 states and 80856 transitions. [2019-12-07 11:18:40,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:18:40,790 INFO L276 IsEmpty]: Start isEmpty. Operand 26469 states and 80856 transitions. [2019-12-07 11:18:40,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:40,817 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:40,817 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:40,817 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:40,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:40,818 INFO L82 PathProgramCache]: Analyzing trace with hash 38318619, now seen corresponding path program 5 times [2019-12-07 11:18:40,818 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:40,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [861023324] [2019-12-07 11:18:40,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:40,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:40,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:40,949 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [861023324] [2019-12-07 11:18:40,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:40,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:18:40,950 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289883512] [2019-12-07 11:18:40,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:18:40,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:40,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:18:40,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:18:40,950 INFO L87 Difference]: Start difference. First operand 26469 states and 80856 transitions. Second operand 11 states. [2019-12-07 11:18:42,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:42,210 INFO L93 Difference]: Finished difference Result 73671 states and 224490 transitions. [2019-12-07 11:18:42,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 11:18:42,210 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:18:42,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:42,292 INFO L225 Difference]: With dead ends: 73671 [2019-12-07 11:18:42,292 INFO L226 Difference]: Without dead ends: 60783 [2019-12-07 11:18:42,293 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 494 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=334, Invalid=1472, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 11:18:42,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60783 states. [2019-12-07 11:18:42,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60783 to 21837. [2019-12-07 11:18:42,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21837 states. [2019-12-07 11:18:42,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21837 states to 21837 states and 66506 transitions. [2019-12-07 11:18:42,854 INFO L78 Accepts]: Start accepts. Automaton has 21837 states and 66506 transitions. Word has length 66 [2019-12-07 11:18:42,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:42,855 INFO L462 AbstractCegarLoop]: Abstraction has 21837 states and 66506 transitions. [2019-12-07 11:18:42,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:18:42,855 INFO L276 IsEmpty]: Start isEmpty. Operand 21837 states and 66506 transitions. [2019-12-07 11:18:42,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:42,875 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:42,875 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:42,875 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:42,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:42,876 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 6 times [2019-12-07 11:18:42,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:42,876 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387989686] [2019-12-07 11:18:42,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:42,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:43,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:43,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387989686] [2019-12-07 11:18:43,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:43,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 11:18:43,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [862356625] [2019-12-07 11:18:43,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 11:18:43,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:43,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 11:18:43,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=374, Unknown=0, NotChecked=0, Total=420 [2019-12-07 11:18:43,440 INFO L87 Difference]: Start difference. First operand 21837 states and 66506 transitions. Second operand 21 states. [2019-12-07 11:18:56,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:56,970 INFO L93 Difference]: Finished difference Result 50839 states and 153568 transitions. [2019-12-07 11:18:56,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2019-12-07 11:18:56,971 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 66 [2019-12-07 11:18:56,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:57,038 INFO L225 Difference]: With dead ends: 50839 [2019-12-07 11:18:57,038 INFO L226 Difference]: Without dead ends: 50356 [2019-12-07 11:18:57,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2462 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=744, Invalid=7446, Unknown=0, NotChecked=0, Total=8190 [2019-12-07 11:18:57,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50356 states. [2019-12-07 11:18:57,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50356 to 21605. [2019-12-07 11:18:57,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21605 states. [2019-12-07 11:18:57,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21605 states to 21605 states and 65601 transitions. [2019-12-07 11:18:57,529 INFO L78 Accepts]: Start accepts. Automaton has 21605 states and 65601 transitions. Word has length 66 [2019-12-07 11:18:57,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:57,530 INFO L462 AbstractCegarLoop]: Abstraction has 21605 states and 65601 transitions. [2019-12-07 11:18:57,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 11:18:57,530 INFO L276 IsEmpty]: Start isEmpty. Operand 21605 states and 65601 transitions. [2019-12-07 11:18:57,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:18:57,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:57,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:57,550 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:57,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:57,550 INFO L82 PathProgramCache]: Analyzing trace with hash 1173514763, now seen corresponding path program 7 times [2019-12-07 11:18:57,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:18:57,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727636125] [2019-12-07 11:18:57,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:57,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:57,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:57,909 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727636125] [2019-12-07 11:18:57,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:57,910 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 11:18:57,910 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335711602] [2019-12-07 11:18:57,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 11:18:57,910 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:18:57,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 11:18:57,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:18:57,910 INFO L87 Difference]: Start difference. First operand 21605 states and 65601 transitions. Second operand 17 states. [2019-12-07 11:19:01,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:19:01,876 INFO L93 Difference]: Finished difference Result 31884 states and 94985 transitions. [2019-12-07 11:19:01,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 11:19:01,876 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 11:19:01,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:19:01,908 INFO L225 Difference]: With dead ends: 31884 [2019-12-07 11:19:01,908 INFO L226 Difference]: Without dead ends: 27379 [2019-12-07 11:19:01,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 655 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=396, Invalid=2054, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 11:19:01,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27379 states. [2019-12-07 11:19:02,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27379 to 21415. [2019-12-07 11:19:02,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21415 states. [2019-12-07 11:19:02,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21415 states to 21415 states and 65247 transitions. [2019-12-07 11:19:02,300 INFO L78 Accepts]: Start accepts. Automaton has 21415 states and 65247 transitions. Word has length 66 [2019-12-07 11:19:02,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:19:02,300 INFO L462 AbstractCegarLoop]: Abstraction has 21415 states and 65247 transitions. [2019-12-07 11:19:02,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 11:19:02,300 INFO L276 IsEmpty]: Start isEmpty. Operand 21415 states and 65247 transitions. [2019-12-07 11:19:02,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:19:02,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:19:02,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:19:02,317 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:19:02,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:19:02,317 INFO L82 PathProgramCache]: Analyzing trace with hash 478387931, now seen corresponding path program 8 times [2019-12-07 11:19:02,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:19:02,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285308609] [2019-12-07 11:19:02,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:19:02,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:19:02,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:19:02,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285308609] [2019-12-07 11:19:02,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:19:02,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:19:02,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [143083207] [2019-12-07 11:19:02,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:19:02,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:19:02,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:19:02,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:19:02,462 INFO L87 Difference]: Start difference. First operand 21415 states and 65247 transitions. Second operand 12 states. [2019-12-07 11:19:03,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:19:03,574 INFO L93 Difference]: Finished difference Result 40200 states and 120927 transitions. [2019-12-07 11:19:03,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 11:19:03,575 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 11:19:03,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:19:03,624 INFO L225 Difference]: With dead ends: 40200 [2019-12-07 11:19:03,624 INFO L226 Difference]: Without dead ends: 38692 [2019-12-07 11:19:03,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=167, Invalid=763, Unknown=0, NotChecked=0, Total=930 [2019-12-07 11:19:03,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38692 states. [2019-12-07 11:19:03,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38692 to 20997. [2019-12-07 11:19:03,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20997 states. [2019-12-07 11:19:04,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20997 states to 20997 states and 64081 transitions. [2019-12-07 11:19:04,023 INFO L78 Accepts]: Start accepts. Automaton has 20997 states and 64081 transitions. Word has length 66 [2019-12-07 11:19:04,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:19:04,023 INFO L462 AbstractCegarLoop]: Abstraction has 20997 states and 64081 transitions. [2019-12-07 11:19:04,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:19:04,023 INFO L276 IsEmpty]: Start isEmpty. Operand 20997 states and 64081 transitions. [2019-12-07 11:19:04,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:19:04,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:19:04,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:19:04,043 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:19:04,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:19:04,043 INFO L82 PathProgramCache]: Analyzing trace with hash -2033523235, now seen corresponding path program 9 times [2019-12-07 11:19:04,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:19:04,043 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433787176] [2019-12-07 11:19:04,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:19:04,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:19:04,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:19:04,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433787176] [2019-12-07 11:19:04,158 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:19:04,158 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:19:04,159 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058814482] [2019-12-07 11:19:04,159 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:19:04,159 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:19:04,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:19:04,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:19:04,159 INFO L87 Difference]: Start difference. First operand 20997 states and 64081 transitions. Second operand 11 states. [2019-12-07 11:19:06,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:19:06,511 INFO L93 Difference]: Finished difference Result 40154 states and 121265 transitions. [2019-12-07 11:19:06,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 11:19:06,512 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 11:19:06,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:19:06,570 INFO L225 Difference]: With dead ends: 40154 [2019-12-07 11:19:06,570 INFO L226 Difference]: Without dead ends: 39771 [2019-12-07 11:19:06,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=821, Unknown=0, NotChecked=0, Total=992 [2019-12-07 11:19:06,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39771 states. [2019-12-07 11:19:06,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39771 to 20813. [2019-12-07 11:19:06,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20813 states. [2019-12-07 11:19:06,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20813 states to 20813 states and 63595 transitions. [2019-12-07 11:19:06,985 INFO L78 Accepts]: Start accepts. Automaton has 20813 states and 63595 transitions. Word has length 66 [2019-12-07 11:19:06,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:19:06,985 INFO L462 AbstractCegarLoop]: Abstraction has 20813 states and 63595 transitions. [2019-12-07 11:19:06,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:19:06,985 INFO L276 IsEmpty]: Start isEmpty. Operand 20813 states and 63595 transitions. [2019-12-07 11:19:07,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:19:07,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:19:07,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:19:07,005 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:19:07,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:19:07,005 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 10 times [2019-12-07 11:19:07,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:19:07,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204293602] [2019-12-07 11:19:07,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:19:07,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:19:07,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:19:07,078 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:19:07,078 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:19:07,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22|)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff0_thd3~0_377) (= v_~__unbuffered_cnt~0_128 0) (= v_~z$r_buff0_thd1~0_378 0) (= v_~z$mem_tmp~0_24 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t503~0.base_22| 4)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22|) |v_ULTIMATE.start_main_~#t503~0.offset_16| 0)) |v_#memory_int_19|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff0_thd0~0_195 0) (= v_~y~0_28 0) (= v_~z$w_buff1_used~0_500 0) (= 0 |v_#NULL.base_6|) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$read_delayed~0_7 0) (= |v_ULTIMATE.start_main_~#t503~0.offset_16| 0) (= v_~z$r_buff0_thd2~0_182 0) (= 0 v_~z$r_buff1_thd3~0_396) (= 0 v_~x~0_245) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_35) (= v_~z$r_buff1_thd0~0_294 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~__unbuffered_p1_EAX~0_41) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t503~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22| 1)) (= v_~z$w_buff1~0_199 0) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_72|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_195, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_~#t503~0.base=|v_ULTIMATE.start_main_~#t503~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_17|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_377, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_245, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_294, ~y~0=v_~y~0_28, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_182, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t503~0.offset=|v_ULTIMATE.start_main_~#t503~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_14|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_378} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t503~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t505~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t504~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t505~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t503~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t504~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:19:07,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~x~0_11 1) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_11, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:19:07,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t504~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t504~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t504~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t504~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11|) |v_ULTIMATE.start_main_~#t504~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11| 1) |v_#valid_31|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t504~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t504~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:19:07,083 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t505~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12|) |v_ULTIMATE.start_main_~#t505~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12| 1)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t505~0.base_12| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t505~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t505~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t505~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t505~0.base, #length] because there is no mapped edge [2019-12-07 11:19:07,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In170714782 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In170714782 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| |P1Thread1of1ForFork2_#t~ite10_Out170714782|))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| ~z$w_buff1~0_In170714782) (not .cse0) (not .cse1) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| ~z~0_In170714782) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In170714782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In170714782, ~z$w_buff1~0=~z$w_buff1~0_In170714782, ~z~0=~z~0_In170714782} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out170714782|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In170714782, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out170714782|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In170714782, ~z$w_buff1~0=~z$w_buff1~0_In170714782, ~z~0=~z~0_In170714782} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:19:07,085 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1559857481 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out1559857481| ~z$w_buff1~0_In1559857481) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1559857481 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1559857481 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1559857481 256)) (and (= (mod ~z$r_buff1_thd3~0_In1559857481 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite23_Out1559857481| |P2Thread1of1ForFork0_#t~ite24_Out1559857481|)) (and (= |P2Thread1of1ForFork0_#t~ite24_Out1559857481| ~z$w_buff1~0_In1559857481) (= |P2Thread1of1ForFork0_#t~ite23_In1559857481| |P2Thread1of1ForFork0_#t~ite23_Out1559857481|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1559857481, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1559857481, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1559857481|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1559857481, ~z$w_buff1~0=~z$w_buff1~0_In1559857481, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1559857481, ~weak$$choice2~0=~weak$$choice2~0_In1559857481} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1559857481, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1559857481|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1559857481, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1559857481|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1559857481, ~z$w_buff1~0=~z$w_buff1~0_In1559857481, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1559857481, ~weak$$choice2~0=~weak$$choice2~0_In1559857481} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 11:19:07,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse4 (= (mod ~z$w_buff0_used~0_In-249446186 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-249446186 256))) (.cse0 (= (mod ~weak$$choice2~0_In-249446186 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-249446186 256))) (.cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite30_Out-249446186|)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-249446186 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite28_In-249446186| |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (or (and .cse0 (or (and .cse1 .cse2) (and .cse2 .cse3) .cse4) .cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| ~z$w_buff1_used~0_In-249446186)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite29_In-249446186|) (= ~z$w_buff1_used~0_In-249446186 |P2Thread1of1ForFork0_#t~ite30_Out-249446186|)))) (let ((.cse6 (not .cse2))) (and (not .cse4) (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (or (not .cse3) .cse6) .cse0 (or (not .cse1) .cse6) .cse5)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-249446186|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-249446186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-249446186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-249446186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-249446186, ~weak$$choice2~0=~weak$$choice2~0_In-249446186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-249446186|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-249446186|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-249446186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-249446186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-249446186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-249446186, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-249446186|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-249446186|, ~weak$$choice2~0=~weak$$choice2~0_In-249446186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:19:07,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (= v_~z$r_buff0_thd3~0_371 v_~z$r_buff0_thd3~0_370) (not (= (mod v_~weak$$choice2~0_130 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_370, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:19:07,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:19:07,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out1004278028| |P2Thread1of1ForFork0_#t~ite38_Out1004278028|)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1004278028 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1004278028 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out1004278028| ~z$w_buff1~0_In1004278028)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In1004278028 |P2Thread1of1ForFork0_#t~ite38_Out1004278028|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1004278028, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1004278028, ~z$w_buff1~0=~z$w_buff1~0_In1004278028, ~z~0=~z~0_In1004278028} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1004278028|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1004278028|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1004278028, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1004278028, ~z$w_buff1~0=~z$w_buff1~0_In1004278028, ~z~0=~z~0_In1004278028} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:19:07,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1916131374 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1916131374 256)))) (or (and (= ~z$w_buff0_used~0_In1916131374 |P2Thread1of1ForFork0_#t~ite40_Out1916131374|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1916131374|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1916131374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1916131374} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1916131374, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1916131374|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1916131374} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:19:07,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1624317360 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1624317360 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1624317360 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1624317360 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624317360| ~z$w_buff1_used~0_In-1624317360)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624317360| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1624317360, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1624317360, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1624317360, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1624317360} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1624317360, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1624317360, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1624317360, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1624317360, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1624317360|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:19:07,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1958632759 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1958632759 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1958632759| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1958632759| ~z$r_buff0_thd3~0_In-1958632759)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1958632759, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1958632759} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1958632759, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1958632759, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1958632759|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:19:07,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-738708056 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-738708056 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-738708056 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-738708056 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-738708056 |P2Thread1of1ForFork0_#t~ite43_Out-738708056|)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-738708056| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-738708056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-738708056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-738708056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-738708056} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-738708056|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-738708056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-738708056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-738708056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-738708056} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:19:07,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_308 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:19:07,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In959366460 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In959366460 256) 0))) (or (and (= ~z$w_buff0_used~0_In959366460 |P0Thread1of1ForFork1_#t~ite5_Out959366460|) (or .cse0 .cse1)) (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out959366460| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In959366460, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In959366460} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out959366460|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959366460, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In959366460} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:19:07,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-677956376 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-677956376 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-677956376 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-677956376 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-677956376| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-677956376| ~z$w_buff1_used~0_In-677956376)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-677956376, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-677956376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-677956376, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-677956376} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-677956376, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-677956376|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-677956376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-677956376, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-677956376} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:19:07,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1572106060 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-1572106060 ~z$r_buff0_thd1~0_Out-1572106060)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1572106060 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1572106060)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1572106060, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1572106060} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1572106060, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1572106060|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1572106060} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:19:07,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1092845736 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1092845736 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1092845736 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1092845736 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-1092845736 |P0Thread1of1ForFork1_#t~ite8_Out-1092845736|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1092845736|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1092845736, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1092845736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1092845736, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1092845736} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1092845736|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1092845736, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1092845736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1092845736, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1092845736} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:19:07,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:19:07,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1654828807 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1654828807 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1654828807 |P1Thread1of1ForFork2_#t~ite11_Out-1654828807|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1654828807|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1654828807, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1654828807} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1654828807, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1654828807|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1654828807} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:19:07,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1903340849 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1903340849 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-1903340849 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1903340849 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1903340849| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite12_Out-1903340849| ~z$w_buff1_used~0_In-1903340849) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1903340849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1903340849, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1903340849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1903340849} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1903340849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1903340849, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1903340849, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1903340849|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1903340849} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:19:07,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In418211692 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In418211692 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out418211692| ~z$r_buff0_thd2~0_In418211692)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out418211692| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In418211692, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In418211692} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In418211692, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out418211692|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In418211692} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:19:07,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1678769752 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-1678769752 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1678769752 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1678769752 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1678769752| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1678769752| ~z$r_buff1_thd2~0_In-1678769752)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1678769752, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1678769752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1678769752, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1678769752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1678769752, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1678769752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1678769752, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1678769752|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1678769752} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:19:07,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93) (= v_~z$r_buff1_thd2~0_188 |v_P1Thread1of1ForFork2_#t~ite14_48|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:19:07,091 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:19:07,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1279334245 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1279334245 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-1279334245| ~z$w_buff1~0_In-1279334245) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z~0_In-1279334245 |ULTIMATE.start_main_#t~ite47_Out-1279334245|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1279334245, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1279334245, ~z$w_buff1~0=~z$w_buff1~0_In-1279334245, ~z~0=~z~0_In-1279334245} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1279334245, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1279334245|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1279334245, ~z$w_buff1~0=~z$w_buff1~0_In-1279334245, ~z~0=~z~0_In-1279334245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:19:07,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 11:19:07,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1635360941 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1635360941 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1635360941 |ULTIMATE.start_main_#t~ite49_Out-1635360941|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1635360941|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1635360941, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635360941} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1635360941, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635360941, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1635360941|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:19:07,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1009240127 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1009240127 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1009240127 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1009240127 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1009240127|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1009240127 |ULTIMATE.start_main_#t~ite50_Out-1009240127|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1009240127, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1009240127, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1009240127, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1009240127} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1009240127|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1009240127, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1009240127, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1009240127, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1009240127} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:19:07,093 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In550535759 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In550535759 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In550535759 |ULTIMATE.start_main_#t~ite51_Out550535759|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out550535759|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In550535759, ~z$w_buff0_used~0=~z$w_buff0_used~0_In550535759} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In550535759, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out550535759|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In550535759} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:19:07,093 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-326975728 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-326975728 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-326975728 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-326975728 256)))) (or (and (= ~z$r_buff1_thd0~0_In-326975728 |ULTIMATE.start_main_#t~ite52_Out-326975728|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-326975728|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-326975728, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-326975728, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-326975728, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-326975728} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-326975728|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-326975728, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-326975728, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-326975728, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-326975728} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:19:07,093 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~z$r_buff1_thd0~0_221 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_22) (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 2 v_~x~0_186))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_221, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:19:07,143 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:19:07 BasicIcfg [2019-12-07 11:19:07,143 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:19:07,144 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:19:07,144 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:19:07,144 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:19:07,144 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:14:45" (3/4) ... [2019-12-07 11:19:07,146 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:19:07,146 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22|)) (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= 0 v_~z$r_buff0_thd3~0_377) (= v_~__unbuffered_cnt~0_128 0) (= v_~z$r_buff0_thd1~0_378 0) (= v_~z$mem_tmp~0_24 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t503~0.base_22| 4)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t503~0.base_22|) |v_ULTIMATE.start_main_~#t503~0.offset_16| 0)) |v_#memory_int_19|) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff0_thd0~0_195 0) (= v_~y~0_28 0) (= v_~z$w_buff1_used~0_500 0) (= 0 |v_#NULL.base_6|) (= v_~main$tmp_guard1~0_38 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$read_delayed~0_7 0) (= |v_ULTIMATE.start_main_~#t503~0.offset_16| 0) (= v_~z$r_buff0_thd2~0_182 0) (= 0 v_~z$r_buff1_thd3~0_396) (= 0 v_~x~0_245) (= v_~z$r_buff1_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_35) (= v_~z$r_buff1_thd0~0_294 0) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= v_~__unbuffered_p2_EBX~0_48 0) (= 0 v_~__unbuffered_p1_EAX~0_41) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t503~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t503~0.base_22| 1)) (= v_~z$w_buff1~0_199 0) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_72|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_195, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_41, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ULTIMATE.start_main_~#t503~0.base=|v_ULTIMATE.start_main_~#t503~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_48, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_17|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_19|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_377, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_245, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_294, ~y~0=v_~y~0_28, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_182, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ULTIMATE.start_main_~#t503~0.offset=|v_ULTIMATE.start_main_~#t503~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_14|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_378} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t503~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t505~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t504~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t505~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t503~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t504~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:19:07,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~x~0_11 1) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_11, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:19:07,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t504~0.offset_10| 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t504~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t504~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t504~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t504~0.base_11|) |v_ULTIMATE.start_main_~#t504~0.offset_10| 1)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11| 1) |v_#valid_31|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t504~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t504~0.base=|v_ULTIMATE.start_main_~#t504~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, ULTIMATE.start_main_~#t504~0.offset=|v_ULTIMATE.start_main_~#t504~0.offset_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t504~0.base, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_~#t504~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:19:07,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t505~0.base_12|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t505~0.base_12|) |v_ULTIMATE.start_main_~#t505~0.offset_10| 2)) |v_#memory_int_11|) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12| 1)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t505~0.base_12|) 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t505~0.base_12| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t505~0.offset_10| 0) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t505~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t505~0.offset=|v_ULTIMATE.start_main_~#t505~0.offset_10|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t505~0.base=|v_ULTIMATE.start_main_~#t505~0.base_12|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t505~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t505~0.base, #length] because there is no mapped edge [2019-12-07 11:19:07,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In170714782 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In170714782 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| |P1Thread1of1ForFork2_#t~ite10_Out170714782|))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| ~z$w_buff1~0_In170714782) (not .cse0) (not .cse1) .cse2) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out170714782| ~z~0_In170714782) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In170714782, ~z$w_buff1_used~0=~z$w_buff1_used~0_In170714782, ~z$w_buff1~0=~z$w_buff1~0_In170714782, ~z~0=~z~0_In170714782} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out170714782|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In170714782, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out170714782|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In170714782, ~z$w_buff1~0=~z$w_buff1~0_In170714782, ~z~0=~z~0_In170714782} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:19:07,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1559857481 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite23_Out1559857481| ~z$w_buff1~0_In1559857481) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1559857481 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1559857481 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1559857481 256)) (and (= (mod ~z$r_buff1_thd3~0_In1559857481 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite23_Out1559857481| |P2Thread1of1ForFork0_#t~ite24_Out1559857481|)) (and (= |P2Thread1of1ForFork0_#t~ite24_Out1559857481| ~z$w_buff1~0_In1559857481) (= |P2Thread1of1ForFork0_#t~ite23_In1559857481| |P2Thread1of1ForFork0_#t~ite23_Out1559857481|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1559857481, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1559857481, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1559857481|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1559857481, ~z$w_buff1~0=~z$w_buff1~0_In1559857481, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1559857481, ~weak$$choice2~0=~weak$$choice2~0_In1559857481} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1559857481, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1559857481|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1559857481, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1559857481|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1559857481, ~z$w_buff1~0=~z$w_buff1~0_In1559857481, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1559857481, ~weak$$choice2~0=~weak$$choice2~0_In1559857481} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 11:19:07,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse4 (= (mod ~z$w_buff0_used~0_In-249446186 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-249446186 256))) (.cse0 (= (mod ~weak$$choice2~0_In-249446186 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-249446186 256))) (.cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite30_Out-249446186|)) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-249446186 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite28_In-249446186| |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (or (and .cse0 (or (and .cse1 .cse2) (and .cse2 .cse3) .cse4) .cse5 (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| ~z$w_buff1_used~0_In-249446186)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite29_In-249446186|) (= ~z$w_buff1_used~0_In-249446186 |P2Thread1of1ForFork0_#t~ite30_Out-249446186|)))) (let ((.cse6 (not .cse2))) (and (not .cse4) (= |P2Thread1of1ForFork0_#t~ite29_Out-249446186| |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (= 0 |P2Thread1of1ForFork0_#t~ite28_Out-249446186|) (or (not .cse3) .cse6) .cse0 (or (not .cse1) .cse6) .cse5)))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-249446186|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-249446186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-249446186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-249446186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-249446186, ~weak$$choice2~0=~weak$$choice2~0_In-249446186, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-249446186|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-249446186|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-249446186, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-249446186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-249446186, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-249446186, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-249446186|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-249446186|, ~weak$$choice2~0=~weak$$choice2~0_In-249446186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:19:07,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (= v_~z$r_buff0_thd3~0_371 v_~z$r_buff0_thd3~0_370) (not (= (mod v_~weak$$choice2~0_130 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_370, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:19:07,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:19:07,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out1004278028| |P2Thread1of1ForFork0_#t~ite38_Out1004278028|)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In1004278028 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1004278028 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out1004278028| ~z$w_buff1~0_In1004278028)) (and .cse0 (or .cse1 .cse2) (= ~z~0_In1004278028 |P2Thread1of1ForFork0_#t~ite38_Out1004278028|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1004278028, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1004278028, ~z$w_buff1~0=~z$w_buff1~0_In1004278028, ~z~0=~z~0_In1004278028} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1004278028|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1004278028|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1004278028, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1004278028, ~z$w_buff1~0=~z$w_buff1~0_In1004278028, ~z~0=~z~0_In1004278028} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:19:07,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1916131374 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1916131374 256)))) (or (and (= ~z$w_buff0_used~0_In1916131374 |P2Thread1of1ForFork0_#t~ite40_Out1916131374|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1916131374|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1916131374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1916131374} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1916131374, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1916131374|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1916131374} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:19:07,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1624317360 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1624317360 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1624317360 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-1624317360 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624317360| ~z$w_buff1_used~0_In-1624317360)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624317360| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1624317360, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1624317360, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1624317360, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1624317360} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1624317360, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1624317360, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1624317360, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1624317360, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1624317360|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:19:07,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1958632759 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1958632759 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1958632759| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1958632759| ~z$r_buff0_thd3~0_In-1958632759)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1958632759, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1958632759} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1958632759, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1958632759, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1958632759|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:19:07,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-738708056 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-738708056 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-738708056 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-738708056 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-738708056 |P2Thread1of1ForFork0_#t~ite43_Out-738708056|)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-738708056| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-738708056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-738708056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-738708056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-738708056} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-738708056|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-738708056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-738708056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-738708056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-738708056} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:19:07,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_308 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:19:07,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In959366460 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In959366460 256) 0))) (or (and (= ~z$w_buff0_used~0_In959366460 |P0Thread1of1ForFork1_#t~ite5_Out959366460|) (or .cse0 .cse1)) (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out959366460| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In959366460, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In959366460} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out959366460|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In959366460, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In959366460} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:19:07,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-677956376 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-677956376 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-677956376 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-677956376 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-677956376| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite6_Out-677956376| ~z$w_buff1_used~0_In-677956376)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-677956376, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-677956376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-677956376, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-677956376} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-677956376, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-677956376|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-677956376, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-677956376, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-677956376} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:19:07,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1572106060 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-1572106060 ~z$r_buff0_thd1~0_Out-1572106060)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1572106060 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= 0 ~z$r_buff0_thd1~0_Out-1572106060)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1572106060, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1572106060} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1572106060, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1572106060|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1572106060} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:19:07,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1092845736 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-1092845736 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1092845736 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1092845736 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-1092845736 |P0Thread1of1ForFork1_#t~ite8_Out-1092845736|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-1092845736|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1092845736, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1092845736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1092845736, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1092845736} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1092845736|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1092845736, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1092845736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1092845736, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1092845736} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:19:07,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:19:07,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1654828807 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1654828807 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1654828807 |P1Thread1of1ForFork2_#t~ite11_Out-1654828807|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1654828807|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1654828807, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1654828807} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1654828807, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1654828807|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1654828807} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:19:07,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1903340849 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1903340849 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-1903340849 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1903340849 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1903340849| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite12_Out-1903340849| ~z$w_buff1_used~0_In-1903340849) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1903340849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1903340849, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1903340849, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1903340849} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1903340849, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1903340849, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1903340849, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1903340849|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1903340849} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:19:07,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In418211692 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In418211692 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out418211692| ~z$r_buff0_thd2~0_In418211692)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out418211692| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In418211692, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In418211692} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In418211692, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out418211692|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In418211692} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:19:07,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1678769752 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-1678769752 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1678769752 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1678769752 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-1678769752| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-1678769752| ~z$r_buff1_thd2~0_In-1678769752)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1678769752, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1678769752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1678769752, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1678769752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1678769752, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1678769752, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1678769752, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1678769752|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1678769752} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:19:07,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93) (= v_~z$r_buff1_thd2~0_188 |v_P1Thread1of1ForFork2_#t~ite14_48|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:19:07,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:19:07,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1279334245 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1279334245 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-1279334245| ~z$w_buff1~0_In-1279334245) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z~0_In-1279334245 |ULTIMATE.start_main_#t~ite47_Out-1279334245|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1279334245, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1279334245, ~z$w_buff1~0=~z$w_buff1~0_In-1279334245, ~z~0=~z~0_In-1279334245} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1279334245, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1279334245|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1279334245, ~z$w_buff1~0=~z$w_buff1~0_In-1279334245, ~z~0=~z~0_In-1279334245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 11:19:07,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 11:19:07,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1635360941 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1635360941 256) 0))) (or (and (= ~z$w_buff0_used~0_In-1635360941 |ULTIMATE.start_main_#t~ite49_Out-1635360941|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1635360941|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1635360941, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635360941} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1635360941, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1635360941, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1635360941|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:19:07,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1009240127 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1009240127 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1009240127 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1009240127 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1009240127|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-1009240127 |ULTIMATE.start_main_#t~ite50_Out-1009240127|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1009240127, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1009240127, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1009240127, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1009240127} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1009240127|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1009240127, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1009240127, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1009240127, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1009240127} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:19:07,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In550535759 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In550535759 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In550535759 |ULTIMATE.start_main_#t~ite51_Out550535759|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out550535759|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In550535759, ~z$w_buff0_used~0=~z$w_buff0_used~0_In550535759} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In550535759, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out550535759|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In550535759} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:19:07,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-326975728 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-326975728 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-326975728 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-326975728 256)))) (or (and (= ~z$r_buff1_thd0~0_In-326975728 |ULTIMATE.start_main_#t~ite52_Out-326975728|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-326975728|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-326975728, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-326975728, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-326975728, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-326975728} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-326975728|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-326975728, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-326975728, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-326975728, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-326975728} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:19:07,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~z$r_buff1_thd0~0_221 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_22) (= 1 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 2 v_~x~0_186))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_16) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_22, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_221, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~x~0=v_~x~0_186, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:19:07,207 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c709a437-51d1-418c-8033-405d29d95f7f/bin/utaipan/witness.graphml [2019-12-07 11:19:07,207 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:19:07,208 INFO L168 Benchmark]: Toolchain (without parser) took 262154.46 ms. Allocated memory was 1.0 GB in the beginning and 10.1 GB in the end (delta: 9.1 GB). Free memory was 934.0 MB in the beginning and 4.1 GB in the end (delta: -3.2 GB). Peak memory consumption was 5.9 GB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,209 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:19:07,209 INFO L168 Benchmark]: CACSL2BoogieTranslator took 394.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,209 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,209 INFO L168 Benchmark]: Boogie Preprocessor took 25.53 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:19:07,210 INFO L168 Benchmark]: RCFGBuilder took 402.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,210 INFO L168 Benchmark]: TraceAbstraction took 261227.08 ms. Allocated memory was 1.1 GB in the beginning and 10.1 GB in the end (delta: 9.0 GB). Free memory was 1.0 GB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,210 INFO L168 Benchmark]: Witness Printer took 63.80 ms. Allocated memory is still 10.1 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:19:07,211 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 394.05 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.6 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -132.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.53 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 402.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 261227.08 ms. Allocated memory was 1.1 GB in the beginning and 10.1 GB in the end (delta: 9.0 GB). Free memory was 1.0 GB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. * Witness Printer took 63.80 ms. Allocated memory is still 10.1 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 44.4 MB). Peak memory consumption was 44.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7044 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t503, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t504, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 2 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t505, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 261.0s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 83.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9100 SDtfs, 11848 SDslu, 35448 SDs, 0 SdLazy, 33336 SolverSat, 662 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 26.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 661 GetRequests, 38 SyntacticMatches, 29 SemanticMatches, 594 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12601 ImplicationChecksByTransitivity, 12.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=372573occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 153.3s AutomataMinimizationTime, 33 MinimizatonAttempts, 770642 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 1297 NumberOfCodeBlocks, 1297 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1198 ConstructedInterpolants, 0 QuantifiedInterpolants, 486376 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...