./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix019_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix019_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash de66e8bc7694077cbe406f19dae0a2831174e80d ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:24:16,184 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:24:16,186 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:24:16,193 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:24:16,193 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:24:16,194 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:24:16,195 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:24:16,196 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:24:16,197 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:24:16,198 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:24:16,199 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:24:16,199 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:24:16,200 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:24:16,200 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:24:16,201 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:24:16,202 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:24:16,202 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:24:16,203 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:24:16,204 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:24:16,206 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:24:16,207 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:24:16,207 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:24:16,208 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:24:16,209 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:24:16,210 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:24:16,210 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:24:16,211 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:24:16,211 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:24:16,211 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:24:16,212 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:24:16,212 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:24:16,212 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:24:16,213 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:24:16,213 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:24:16,214 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:24:16,214 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:24:16,214 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:24:16,214 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:24:16,215 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:24:16,215 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:24:16,216 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:24:16,216 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:24:16,226 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:24:16,226 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:24:16,227 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:24:16,227 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:24:16,227 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:24:16,227 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:24:16,227 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:24:16,227 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:24:16,228 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:24:16,228 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:24:16,229 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:24:16,229 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:24:16,230 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:24:16,230 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:24:16,231 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:24:16,231 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:24:16,232 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> de66e8bc7694077cbe406f19dae0a2831174e80d [2019-12-07 19:24:16,329 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:24:16,338 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:24:16,341 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:24:16,342 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:24:16,343 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:24:16,343 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix019_tso.oepc.i [2019-12-07 19:24:16,390 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/data/1db62e420/27e632aeff2944218fa6b5441ccd4499/FLAGd2d831083 [2019-12-07 19:24:16,737 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:24:16,738 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/sv-benchmarks/c/pthread-wmm/mix019_tso.oepc.i [2019-12-07 19:24:16,749 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/data/1db62e420/27e632aeff2944218fa6b5441ccd4499/FLAGd2d831083 [2019-12-07 19:24:16,757 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/data/1db62e420/27e632aeff2944218fa6b5441ccd4499 [2019-12-07 19:24:16,759 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:24:16,760 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:24:16,760 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:24:16,760 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:24:16,762 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:24:16,763 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:24:16" (1/1) ... [2019-12-07 19:24:16,765 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c5fb732 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:16, skipping insertion in model container [2019-12-07 19:24:16,765 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:24:16" (1/1) ... [2019-12-07 19:24:16,769 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:24:16,800 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:24:17,046 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:24:17,054 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:24:17,097 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:24:17,143 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:24:17,143 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17 WrapperNode [2019-12-07 19:24:17,143 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:24:17,144 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:24:17,144 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:24:17,144 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:24:17,149 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,163 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,184 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:24:17,184 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:24:17,184 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:24:17,184 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:24:17,191 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,191 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,194 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,194 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,201 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,204 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,206 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... [2019-12-07 19:24:17,209 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:24:17,210 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:24:17,210 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:24:17,210 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:24:17,210 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:24:17,249 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:24:17,249 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:24:17,249 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:24:17,250 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:24:17,250 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:24:17,250 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:24:17,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:24:17,250 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:24:17,251 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:24:17,624 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:24:17,624 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:24:17,625 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:24:17 BoogieIcfgContainer [2019-12-07 19:24:17,625 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:24:17,626 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:24:17,626 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:24:17,629 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:24:17,629 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:24:16" (1/3) ... [2019-12-07 19:24:17,630 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6dcbba20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:24:17, skipping insertion in model container [2019-12-07 19:24:17,630 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:24:17" (2/3) ... [2019-12-07 19:24:17,630 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6dcbba20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:24:17, skipping insertion in model container [2019-12-07 19:24:17,630 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:24:17" (3/3) ... [2019-12-07 19:24:17,632 INFO L109 eAbstractionObserver]: Analyzing ICFG mix019_tso.oepc.i [2019-12-07 19:24:17,638 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:24:17,638 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:24:17,644 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:24:17,644 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:24:17,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,671 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,671 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,675 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,677 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,681 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,681 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,681 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,682 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,683 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,684 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,685 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:24:17,696 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:24:17,709 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:24:17,709 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:24:17,709 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:24:17,709 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:24:17,709 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:24:17,709 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:24:17,709 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:24:17,709 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:24:17,721 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 19:24:17,722 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 19:24:17,786 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 19:24:17,787 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:24:17,797 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 581 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:24:17,811 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 19:24:17,847 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 19:24:17,847 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:24:17,853 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 581 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:24:17,869 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 19:24:17,870 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:24:20,679 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 84 DAG size of output: 82 [2019-12-07 19:24:20,921 INFO L206 etLargeBlockEncoding]: Checked pairs total: 88380 [2019-12-07 19:24:20,921 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2019-12-07 19:24:20,923 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 19:24:36,589 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118050 states. [2019-12-07 19:24:36,591 INFO L276 IsEmpty]: Start isEmpty. Operand 118050 states. [2019-12-07 19:24:36,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 19:24:36,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:36,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 19:24:36,596 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:36,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:36,599 INFO L82 PathProgramCache]: Analyzing trace with hash 819981841, now seen corresponding path program 1 times [2019-12-07 19:24:36,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:36,605 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621686518] [2019-12-07 19:24:36,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:36,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:36,750 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:36,750 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621686518] [2019-12-07 19:24:36,751 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:36,751 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:24:36,751 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410665557] [2019-12-07 19:24:36,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:24:36,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:36,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:24:36,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:24:36,765 INFO L87 Difference]: Start difference. First operand 118050 states. Second operand 3 states. [2019-12-07 19:24:37,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:37,636 INFO L93 Difference]: Finished difference Result 117660 states and 499306 transitions. [2019-12-07 19:24:37,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:24:37,638 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 19:24:37,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:38,232 INFO L225 Difference]: With dead ends: 117660 [2019-12-07 19:24:38,232 INFO L226 Difference]: Without dead ends: 115112 [2019-12-07 19:24:38,233 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:24:41,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115112 states. [2019-12-07 19:24:43,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115112 to 115112. [2019-12-07 19:24:43,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115112 states. [2019-12-07 19:24:45,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115112 states to 115112 states and 488918 transitions. [2019-12-07 19:24:45,769 INFO L78 Accepts]: Start accepts. Automaton has 115112 states and 488918 transitions. Word has length 5 [2019-12-07 19:24:45,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:45,769 INFO L462 AbstractCegarLoop]: Abstraction has 115112 states and 488918 transitions. [2019-12-07 19:24:45,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:24:45,769 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states and 488918 transitions. [2019-12-07 19:24:45,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:24:45,771 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:45,771 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:45,772 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:45,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:45,772 INFO L82 PathProgramCache]: Analyzing trace with hash 690822117, now seen corresponding path program 1 times [2019-12-07 19:24:45,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:45,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769988327] [2019-12-07 19:24:45,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:45,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:45,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:45,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769988327] [2019-12-07 19:24:45,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:45,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:24:45,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [505119441] [2019-12-07 19:24:45,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:24:45,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:45,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:24:45,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:24:45,830 INFO L87 Difference]: Start difference. First operand 115112 states and 488918 transitions. Second operand 4 states. [2019-12-07 19:24:46,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:46,781 INFO L93 Difference]: Finished difference Result 180042 states and 736423 transitions. [2019-12-07 19:24:46,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:24:46,782 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:24:46,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:47,613 INFO L225 Difference]: With dead ends: 180042 [2019-12-07 19:24:47,613 INFO L226 Difference]: Without dead ends: 179993 [2019-12-07 19:24:47,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:24:52,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179993 states. [2019-12-07 19:24:54,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179993 to 163765. [2019-12-07 19:24:54,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163765 states. [2019-12-07 19:24:54,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163765 states to 163765 states and 677555 transitions. [2019-12-07 19:24:54,706 INFO L78 Accepts]: Start accepts. Automaton has 163765 states and 677555 transitions. Word has length 11 [2019-12-07 19:24:54,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:54,707 INFO L462 AbstractCegarLoop]: Abstraction has 163765 states and 677555 transitions. [2019-12-07 19:24:54,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:24:54,707 INFO L276 IsEmpty]: Start isEmpty. Operand 163765 states and 677555 transitions. [2019-12-07 19:24:54,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:24:54,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:54,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:54,712 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:54,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:54,712 INFO L82 PathProgramCache]: Analyzing trace with hash -2114852839, now seen corresponding path program 1 times [2019-12-07 19:24:54,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:54,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444453104] [2019-12-07 19:24:54,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:54,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:54,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:54,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444453104] [2019-12-07 19:24:54,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:54,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:24:54,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021627506] [2019-12-07 19:24:54,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:24:54,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:54,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:24:54,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:24:54,758 INFO L87 Difference]: Start difference. First operand 163765 states and 677555 transitions. Second operand 4 states. [2019-12-07 19:24:58,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:58,070 INFO L93 Difference]: Finished difference Result 234635 states and 948933 transitions. [2019-12-07 19:24:58,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:24:58,071 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:24:58,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:58,676 INFO L225 Difference]: With dead ends: 234635 [2019-12-07 19:24:58,676 INFO L226 Difference]: Without dead ends: 234572 [2019-12-07 19:24:58,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:03,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234572 states. [2019-12-07 19:25:06,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234572 to 198233. [2019-12-07 19:25:06,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198233 states. [2019-12-07 19:25:07,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198233 states to 198233 states and 814440 transitions. [2019-12-07 19:25:07,110 INFO L78 Accepts]: Start accepts. Automaton has 198233 states and 814440 transitions. Word has length 13 [2019-12-07 19:25:07,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:07,111 INFO L462 AbstractCegarLoop]: Abstraction has 198233 states and 814440 transitions. [2019-12-07 19:25:07,111 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:25:07,111 INFO L276 IsEmpty]: Start isEmpty. Operand 198233 states and 814440 transitions. [2019-12-07 19:25:07,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:25:07,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:07,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:07,114 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:07,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:07,114 INFO L82 PathProgramCache]: Analyzing trace with hash -389644701, now seen corresponding path program 1 times [2019-12-07 19:25:07,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:07,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500740920] [2019-12-07 19:25:07,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:07,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:07,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:07,157 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1500740920] [2019-12-07 19:25:07,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:07,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:25:07,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86077410] [2019-12-07 19:25:07,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:25:07,158 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:07,158 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:25:07,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:25:07,158 INFO L87 Difference]: Start difference. First operand 198233 states and 814440 transitions. Second operand 4 states. [2019-12-07 19:25:08,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:08,886 INFO L93 Difference]: Finished difference Result 247181 states and 1005908 transitions. [2019-12-07 19:25:08,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:25:08,887 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:25:08,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:09,511 INFO L225 Difference]: With dead ends: 247181 [2019-12-07 19:25:09,511 INFO L226 Difference]: Without dead ends: 247181 [2019-12-07 19:25:09,511 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:17,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247181 states. [2019-12-07 19:25:20,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247181 to 209765. [2019-12-07 19:25:20,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209765 states. [2019-12-07 19:25:20,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209765 states to 209765 states and 862010 transitions. [2019-12-07 19:25:20,907 INFO L78 Accepts]: Start accepts. Automaton has 209765 states and 862010 transitions. Word has length 13 [2019-12-07 19:25:20,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:20,907 INFO L462 AbstractCegarLoop]: Abstraction has 209765 states and 862010 transitions. [2019-12-07 19:25:20,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:25:20,907 INFO L276 IsEmpty]: Start isEmpty. Operand 209765 states and 862010 transitions. [2019-12-07 19:25:20,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:25:20,922 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:20,923 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:20,923 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:20,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:20,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1204820739, now seen corresponding path program 1 times [2019-12-07 19:25:20,923 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:20,923 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109195791] [2019-12-07 19:25:20,923 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:20,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:20,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:20,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109195791] [2019-12-07 19:25:20,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:20,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:20,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [989638764] [2019-12-07 19:25:20,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:20,966 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:20,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:20,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:20,966 INFO L87 Difference]: Start difference. First operand 209765 states and 862010 transitions. Second operand 5 states. [2019-12-07 19:25:22,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:22,684 INFO L93 Difference]: Finished difference Result 305325 states and 1226868 transitions. [2019-12-07 19:25:22,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:25:22,685 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:25:22,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:24,035 INFO L225 Difference]: With dead ends: 305325 [2019-12-07 19:25:24,035 INFO L226 Difference]: Without dead ends: 305178 [2019-12-07 19:25:24,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:25:32,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305178 states. [2019-12-07 19:25:36,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305178 to 231185. [2019-12-07 19:25:36,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231185 states. [2019-12-07 19:25:37,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231185 states to 231185 states and 945346 transitions. [2019-12-07 19:25:37,172 INFO L78 Accepts]: Start accepts. Automaton has 231185 states and 945346 transitions. Word has length 19 [2019-12-07 19:25:37,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:37,172 INFO L462 AbstractCegarLoop]: Abstraction has 231185 states and 945346 transitions. [2019-12-07 19:25:37,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:25:37,172 INFO L276 IsEmpty]: Start isEmpty. Operand 231185 states and 945346 transitions. [2019-12-07 19:25:37,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:25:37,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:37,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:37,184 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:37,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:37,185 INFO L82 PathProgramCache]: Analyzing trace with hash 737886097, now seen corresponding path program 1 times [2019-12-07 19:25:37,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:37,185 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122850990] [2019-12-07 19:25:37,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:37,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:37,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:37,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122850990] [2019-12-07 19:25:37,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:37,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:37,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1087184117] [2019-12-07 19:25:37,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:37,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:37,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:37,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:37,224 INFO L87 Difference]: Start difference. First operand 231185 states and 945346 transitions. Second operand 5 states. [2019-12-07 19:25:38,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:38,911 INFO L93 Difference]: Finished difference Result 329703 states and 1323212 transitions. [2019-12-07 19:25:38,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:25:38,912 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:25:38,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:40,291 INFO L225 Difference]: With dead ends: 329703 [2019-12-07 19:25:40,291 INFO L226 Difference]: Without dead ends: 329640 [2019-12-07 19:25:40,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:25:49,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329640 states. [2019-12-07 19:25:52,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329640 to 234401. [2019-12-07 19:25:52,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234401 states. [2019-12-07 19:25:53,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234401 states to 234401 states and 957976 transitions. [2019-12-07 19:25:53,320 INFO L78 Accepts]: Start accepts. Automaton has 234401 states and 957976 transitions. Word has length 19 [2019-12-07 19:25:53,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:53,320 INFO L462 AbstractCegarLoop]: Abstraction has 234401 states and 957976 transitions. [2019-12-07 19:25:53,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:25:53,320 INFO L276 IsEmpty]: Start isEmpty. Operand 234401 states and 957976 transitions. [2019-12-07 19:25:53,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:25:53,333 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:53,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:53,334 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:53,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:53,334 INFO L82 PathProgramCache]: Analyzing trace with hash 346547774, now seen corresponding path program 1 times [2019-12-07 19:25:53,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:53,334 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205162087] [2019-12-07 19:25:53,334 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:53,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:53,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:53,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [205162087] [2019-12-07 19:25:53,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:53,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:53,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575056638] [2019-12-07 19:25:53,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:53,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:53,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:53,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:53,379 INFO L87 Difference]: Start difference. First operand 234401 states and 957976 transitions. Second operand 5 states. [2019-12-07 19:25:55,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:55,461 INFO L93 Difference]: Finished difference Result 340487 states and 1368160 transitions. [2019-12-07 19:25:55,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:25:55,462 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:25:55,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:56,333 INFO L225 Difference]: With dead ends: 340487 [2019-12-07 19:25:56,333 INFO L226 Difference]: Without dead ends: 340424 [2019-12-07 19:25:56,333 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:26:03,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340424 states. [2019-12-07 19:26:07,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340424 to 253200. [2019-12-07 19:26:07,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253200 states. [2019-12-07 19:26:07,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253200 states to 253200 states and 1033563 transitions. [2019-12-07 19:26:07,965 INFO L78 Accepts]: Start accepts. Automaton has 253200 states and 1033563 transitions. Word has length 19 [2019-12-07 19:26:07,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:07,965 INFO L462 AbstractCegarLoop]: Abstraction has 253200 states and 1033563 transitions. [2019-12-07 19:26:07,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:26:07,966 INFO L276 IsEmpty]: Start isEmpty. Operand 253200 states and 1033563 transitions. [2019-12-07 19:26:08,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 19:26:08,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:08,024 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:08,024 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:08,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:08,024 INFO L82 PathProgramCache]: Analyzing trace with hash 224247286, now seen corresponding path program 1 times [2019-12-07 19:26:08,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:08,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527559142] [2019-12-07 19:26:08,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:08,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:08,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:08,204 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527559142] [2019-12-07 19:26:08,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:08,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:26:08,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145486884] [2019-12-07 19:26:08,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:26:08,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:08,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:26:08,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:26:08,205 INFO L87 Difference]: Start difference. First operand 253200 states and 1033563 transitions. Second operand 10 states. [2019-12-07 19:26:13,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:13,172 INFO L93 Difference]: Finished difference Result 353462 states and 1414696 transitions. [2019-12-07 19:26:13,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 19:26:13,173 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 25 [2019-12-07 19:26:13,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:14,090 INFO L225 Difference]: With dead ends: 353462 [2019-12-07 19:26:14,090 INFO L226 Difference]: Without dead ends: 353413 [2019-12-07 19:26:14,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=145, Invalid=407, Unknown=0, NotChecked=0, Total=552 [2019-12-07 19:26:20,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353413 states. [2019-12-07 19:26:24,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353413 to 250502. [2019-12-07 19:26:24,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250502 states. [2019-12-07 19:26:25,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250502 states to 250502 states and 1022891 transitions. [2019-12-07 19:26:25,493 INFO L78 Accepts]: Start accepts. Automaton has 250502 states and 1022891 transitions. Word has length 25 [2019-12-07 19:26:25,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:25,494 INFO L462 AbstractCegarLoop]: Abstraction has 250502 states and 1022891 transitions. [2019-12-07 19:26:25,494 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:26:25,494 INFO L276 IsEmpty]: Start isEmpty. Operand 250502 states and 1022891 transitions. [2019-12-07 19:26:25,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:26:25,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:25,584 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:25,584 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:25,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:25,584 INFO L82 PathProgramCache]: Analyzing trace with hash 289171568, now seen corresponding path program 1 times [2019-12-07 19:26:25,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:25,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347749475] [2019-12-07 19:26:25,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:25,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:25,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:25,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347749475] [2019-12-07 19:26:25,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:25,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:26:25,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [771646286] [2019-12-07 19:26:25,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:25,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:25,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:25,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:25,609 INFO L87 Difference]: Start difference. First operand 250502 states and 1022891 transitions. Second operand 3 states. [2019-12-07 19:26:27,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:27,304 INFO L93 Difference]: Finished difference Result 309280 states and 1262017 transitions. [2019-12-07 19:26:27,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:27,305 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 19:26:27,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:28,121 INFO L225 Difference]: With dead ends: 309280 [2019-12-07 19:26:28,122 INFO L226 Difference]: Without dead ends: 309280 [2019-12-07 19:26:28,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:37,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309280 states. [2019-12-07 19:26:41,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309280 to 287807. [2019-12-07 19:26:41,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287807 states. [2019-12-07 19:26:42,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287807 states to 287807 states and 1177123 transitions. [2019-12-07 19:26:42,176 INFO L78 Accepts]: Start accepts. Automaton has 287807 states and 1177123 transitions. Word has length 27 [2019-12-07 19:26:42,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:42,176 INFO L462 AbstractCegarLoop]: Abstraction has 287807 states and 1177123 transitions. [2019-12-07 19:26:42,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:42,176 INFO L276 IsEmpty]: Start isEmpty. Operand 287807 states and 1177123 transitions. [2019-12-07 19:26:42,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 19:26:42,265 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:42,265 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:42,265 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:42,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:42,266 INFO L82 PathProgramCache]: Analyzing trace with hash 289290298, now seen corresponding path program 1 times [2019-12-07 19:26:42,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:42,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541177256] [2019-12-07 19:26:42,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:42,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:42,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:42,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541177256] [2019-12-07 19:26:42,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:42,310 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:26:42,310 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544045485] [2019-12-07 19:26:42,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:26:42,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:42,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:26:42,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:26:42,310 INFO L87 Difference]: Start difference. First operand 287807 states and 1177123 transitions. Second operand 4 states. [2019-12-07 19:26:42,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:42,913 INFO L93 Difference]: Finished difference Result 55685 states and 180955 transitions. [2019-12-07 19:26:42,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:26:42,913 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2019-12-07 19:26:42,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:42,991 INFO L225 Difference]: With dead ends: 55685 [2019-12-07 19:26:42,991 INFO L226 Difference]: Without dead ends: 49728 [2019-12-07 19:26:42,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:26:43,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49728 states. [2019-12-07 19:26:43,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49728 to 49728. [2019-12-07 19:26:43,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49728 states. [2019-12-07 19:26:43,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49728 states to 49728 states and 159311 transitions. [2019-12-07 19:26:43,763 INFO L78 Accepts]: Start accepts. Automaton has 49728 states and 159311 transitions. Word has length 27 [2019-12-07 19:26:43,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:43,763 INFO L462 AbstractCegarLoop]: Abstraction has 49728 states and 159311 transitions. [2019-12-07 19:26:43,763 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:26:43,763 INFO L276 IsEmpty]: Start isEmpty. Operand 49728 states and 159311 transitions. [2019-12-07 19:26:43,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 19:26:43,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:43,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:43,778 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:43,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:43,779 INFO L82 PathProgramCache]: Analyzing trace with hash 862031180, now seen corresponding path program 1 times [2019-12-07 19:26:43,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:43,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359105354] [2019-12-07 19:26:43,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:43,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:43,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:43,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359105354] [2019-12-07 19:26:43,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:43,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:26:43,824 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732002738] [2019-12-07 19:26:43,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:26:43,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:43,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:26:43,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:26:43,824 INFO L87 Difference]: Start difference. First operand 49728 states and 159311 transitions. Second operand 5 states. [2019-12-07 19:26:43,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:43,874 INFO L93 Difference]: Finished difference Result 10822 states and 29329 transitions. [2019-12-07 19:26:43,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:26:43,874 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2019-12-07 19:26:43,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:43,882 INFO L225 Difference]: With dead ends: 10822 [2019-12-07 19:26:43,882 INFO L226 Difference]: Without dead ends: 9479 [2019-12-07 19:26:43,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:26:43,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9479 states. [2019-12-07 19:26:43,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9479 to 9339. [2019-12-07 19:26:43,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9339 states. [2019-12-07 19:26:43,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9339 states to 9339 states and 25040 transitions. [2019-12-07 19:26:43,984 INFO L78 Accepts]: Start accepts. Automaton has 9339 states and 25040 transitions. Word has length 35 [2019-12-07 19:26:43,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:43,984 INFO L462 AbstractCegarLoop]: Abstraction has 9339 states and 25040 transitions. [2019-12-07 19:26:43,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:26:43,984 INFO L276 IsEmpty]: Start isEmpty. Operand 9339 states and 25040 transitions. [2019-12-07 19:26:43,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 19:26:43,991 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:43,991 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:43,991 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:43,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:43,991 INFO L82 PathProgramCache]: Analyzing trace with hash -1447839164, now seen corresponding path program 1 times [2019-12-07 19:26:43,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:43,991 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478673196] [2019-12-07 19:26:43,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:44,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:44,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:44,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478673196] [2019-12-07 19:26:44,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:44,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:26:44,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1131751844] [2019-12-07 19:26:44,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:26:44,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:44,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:26:44,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:26:44,048 INFO L87 Difference]: Start difference. First operand 9339 states and 25040 transitions. Second operand 6 states. [2019-12-07 19:26:44,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:44,098 INFO L93 Difference]: Finished difference Result 6619 states and 18735 transitions. [2019-12-07 19:26:44,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:26:44,099 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 51 [2019-12-07 19:26:44,099 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:44,105 INFO L225 Difference]: With dead ends: 6619 [2019-12-07 19:26:44,105 INFO L226 Difference]: Without dead ends: 6509 [2019-12-07 19:26:44,105 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:26:44,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6509 states. [2019-12-07 19:26:44,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6509 to 5711. [2019-12-07 19:26:44,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5711 states. [2019-12-07 19:26:44,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5711 states to 5711 states and 16357 transitions. [2019-12-07 19:26:44,178 INFO L78 Accepts]: Start accepts. Automaton has 5711 states and 16357 transitions. Word has length 51 [2019-12-07 19:26:44,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:44,178 INFO L462 AbstractCegarLoop]: Abstraction has 5711 states and 16357 transitions. [2019-12-07 19:26:44,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:26:44,178 INFO L276 IsEmpty]: Start isEmpty. Operand 5711 states and 16357 transitions. [2019-12-07 19:26:44,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 19:26:44,182 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:44,182 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:44,182 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:44,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:44,183 INFO L82 PathProgramCache]: Analyzing trace with hash -1613083422, now seen corresponding path program 1 times [2019-12-07 19:26:44,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:44,183 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288359703] [2019-12-07 19:26:44,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:44,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:44,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:44,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288359703] [2019-12-07 19:26:44,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:44,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:26:44,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358125871] [2019-12-07 19:26:44,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:26:44,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:44,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:26:44,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:26:44,234 INFO L87 Difference]: Start difference. First operand 5711 states and 16357 transitions. Second operand 5 states. [2019-12-07 19:26:44,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:44,408 INFO L93 Difference]: Finished difference Result 8253 states and 23463 transitions. [2019-12-07 19:26:44,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:26:44,409 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 64 [2019-12-07 19:26:44,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:44,416 INFO L225 Difference]: With dead ends: 8253 [2019-12-07 19:26:44,416 INFO L226 Difference]: Without dead ends: 8253 [2019-12-07 19:26:44,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:26:44,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8253 states. [2019-12-07 19:26:44,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8253 to 7017. [2019-12-07 19:26:44,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7017 states. [2019-12-07 19:26:44,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7017 states to 7017 states and 20120 transitions. [2019-12-07 19:26:44,507 INFO L78 Accepts]: Start accepts. Automaton has 7017 states and 20120 transitions. Word has length 64 [2019-12-07 19:26:44,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:44,507 INFO L462 AbstractCegarLoop]: Abstraction has 7017 states and 20120 transitions. [2019-12-07 19:26:44,507 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:26:44,507 INFO L276 IsEmpty]: Start isEmpty. Operand 7017 states and 20120 transitions. [2019-12-07 19:26:44,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 19:26:44,512 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:44,512 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:44,512 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:44,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:44,513 INFO L82 PathProgramCache]: Analyzing trace with hash -516051436, now seen corresponding path program 2 times [2019-12-07 19:26:44,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:44,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140837743] [2019-12-07 19:26:44,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:44,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:44,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:44,559 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140837743] [2019-12-07 19:26:44,559 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:44,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:26:44,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660413328] [2019-12-07 19:26:44,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:26:44,560 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:44,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:26:44,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:26:44,560 INFO L87 Difference]: Start difference. First operand 7017 states and 20120 transitions. Second operand 6 states. [2019-12-07 19:26:44,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:44,866 INFO L93 Difference]: Finished difference Result 11673 states and 33335 transitions. [2019-12-07 19:26:44,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:26:44,867 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2019-12-07 19:26:44,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:44,876 INFO L225 Difference]: With dead ends: 11673 [2019-12-07 19:26:44,876 INFO L226 Difference]: Without dead ends: 11673 [2019-12-07 19:26:44,877 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:26:44,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11673 states. [2019-12-07 19:26:44,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11673 to 7765. [2019-12-07 19:26:44,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7765 states. [2019-12-07 19:26:44,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7765 states to 7765 states and 22355 transitions. [2019-12-07 19:26:44,992 INFO L78 Accepts]: Start accepts. Automaton has 7765 states and 22355 transitions. Word has length 64 [2019-12-07 19:26:44,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:44,992 INFO L462 AbstractCegarLoop]: Abstraction has 7765 states and 22355 transitions. [2019-12-07 19:26:44,992 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:26:44,992 INFO L276 IsEmpty]: Start isEmpty. Operand 7765 states and 22355 transitions. [2019-12-07 19:26:44,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 19:26:44,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:44,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:44,998 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:44,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:44,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1224218282, now seen corresponding path program 3 times [2019-12-07 19:26:44,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:44,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629247159] [2019-12-07 19:26:44,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:45,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:45,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:45,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629247159] [2019-12-07 19:26:45,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:45,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:45,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [593908028] [2019-12-07 19:26:45,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:45,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:45,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:45,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:45,068 INFO L87 Difference]: Start difference. First operand 7765 states and 22355 transitions. Second operand 3 states. [2019-12-07 19:26:45,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:45,114 INFO L93 Difference]: Finished difference Result 7765 states and 22354 transitions. [2019-12-07 19:26:45,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:45,115 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 19:26:45,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:45,122 INFO L225 Difference]: With dead ends: 7765 [2019-12-07 19:26:45,122 INFO L226 Difference]: Without dead ends: 7765 [2019-12-07 19:26:45,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:45,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7765 states. [2019-12-07 19:26:45,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7765 to 6233. [2019-12-07 19:26:45,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6233 states. [2019-12-07 19:26:45,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6233 states to 6233 states and 18119 transitions. [2019-12-07 19:26:45,589 INFO L78 Accepts]: Start accepts. Automaton has 6233 states and 18119 transitions. Word has length 64 [2019-12-07 19:26:45,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:45,590 INFO L462 AbstractCegarLoop]: Abstraction has 6233 states and 18119 transitions. [2019-12-07 19:26:45,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:45,590 INFO L276 IsEmpty]: Start isEmpty. Operand 6233 states and 18119 transitions. [2019-12-07 19:26:45,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:26:45,594 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:45,594 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:45,594 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:45,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:45,594 INFO L82 PathProgramCache]: Analyzing trace with hash -927307397, now seen corresponding path program 1 times [2019-12-07 19:26:45,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:45,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682910333] [2019-12-07 19:26:45,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:45,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:45,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:45,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682910333] [2019-12-07 19:26:45,791 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:45,791 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:26:45,791 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1051244998] [2019-12-07 19:26:45,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:26:45,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:45,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:26:45,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=120, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:26:45,792 INFO L87 Difference]: Start difference. First operand 6233 states and 18119 transitions. Second operand 13 states. [2019-12-07 19:26:46,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:46,634 INFO L93 Difference]: Finished difference Result 22690 states and 66229 transitions. [2019-12-07 19:26:46,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 19:26:46,634 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 65 [2019-12-07 19:26:46,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:46,643 INFO L225 Difference]: With dead ends: 22690 [2019-12-07 19:26:46,643 INFO L226 Difference]: Without dead ends: 8971 [2019-12-07 19:26:46,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=220, Invalid=650, Unknown=0, NotChecked=0, Total=870 [2019-12-07 19:26:46,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8971 states. [2019-12-07 19:26:46,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8971 to 4791. [2019-12-07 19:26:46,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4791 states. [2019-12-07 19:26:46,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4791 states to 4791 states and 13965 transitions. [2019-12-07 19:26:46,725 INFO L78 Accepts]: Start accepts. Automaton has 4791 states and 13965 transitions. Word has length 65 [2019-12-07 19:26:46,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:46,725 INFO L462 AbstractCegarLoop]: Abstraction has 4791 states and 13965 transitions. [2019-12-07 19:26:46,725 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:26:46,725 INFO L276 IsEmpty]: Start isEmpty. Operand 4791 states and 13965 transitions. [2019-12-07 19:26:46,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:26:46,728 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:46,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:46,728 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:46,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:46,729 INFO L82 PathProgramCache]: Analyzing trace with hash 1252575037, now seen corresponding path program 2 times [2019-12-07 19:26:46,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:46,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541494093] [2019-12-07 19:26:46,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:46,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:46,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:46,765 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541494093] [2019-12-07 19:26:46,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:46,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:46,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192064008] [2019-12-07 19:26:46,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:46,766 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:46,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:46,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:46,766 INFO L87 Difference]: Start difference. First operand 4791 states and 13965 transitions. Second operand 3 states. [2019-12-07 19:26:46,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:46,787 INFO L93 Difference]: Finished difference Result 4428 states and 12608 transitions. [2019-12-07 19:26:46,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:46,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 19:26:46,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:46,793 INFO L225 Difference]: With dead ends: 4428 [2019-12-07 19:26:46,793 INFO L226 Difference]: Without dead ends: 4428 [2019-12-07 19:26:46,793 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:46,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4428 states. [2019-12-07 19:26:46,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4428 to 4216. [2019-12-07 19:26:46,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4216 states. [2019-12-07 19:26:46,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4216 states to 4216 states and 11992 transitions. [2019-12-07 19:26:46,849 INFO L78 Accepts]: Start accepts. Automaton has 4216 states and 11992 transitions. Word has length 65 [2019-12-07 19:26:46,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:46,849 INFO L462 AbstractCegarLoop]: Abstraction has 4216 states and 11992 transitions. [2019-12-07 19:26:46,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:46,850 INFO L276 IsEmpty]: Start isEmpty. Operand 4216 states and 11992 transitions. [2019-12-07 19:26:46,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:26:46,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:46,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:46,852 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:46,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:46,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1713906727, now seen corresponding path program 1 times [2019-12-07 19:26:46,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:46,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1957964006] [2019-12-07 19:26:46,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:46,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:46,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:46,916 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1957964006] [2019-12-07 19:26:46,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:46,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 19:26:46,916 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648275376] [2019-12-07 19:26:46,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:26:46,917 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:46,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:26:46,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:26:46,917 INFO L87 Difference]: Start difference. First operand 4216 states and 11992 transitions. Second operand 7 states. [2019-12-07 19:26:47,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:47,302 INFO L93 Difference]: Finished difference Result 7285 states and 20363 transitions. [2019-12-07 19:26:47,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 19:26:47,303 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 19:26:47,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:47,309 INFO L225 Difference]: With dead ends: 7285 [2019-12-07 19:26:47,309 INFO L226 Difference]: Without dead ends: 7285 [2019-12-07 19:26:47,309 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:26:47,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7285 states. [2019-12-07 19:26:47,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7285 to 4228. [2019-12-07 19:26:47,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4228 states. [2019-12-07 19:26:47,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4228 states to 4228 states and 12026 transitions. [2019-12-07 19:26:47,380 INFO L78 Accepts]: Start accepts. Automaton has 4228 states and 12026 transitions. Word has length 66 [2019-12-07 19:26:47,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:47,380 INFO L462 AbstractCegarLoop]: Abstraction has 4228 states and 12026 transitions. [2019-12-07 19:26:47,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:26:47,380 INFO L276 IsEmpty]: Start isEmpty. Operand 4228 states and 12026 transitions. [2019-12-07 19:26:47,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:26:47,383 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:47,383 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:47,383 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:47,383 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:47,383 INFO L82 PathProgramCache]: Analyzing trace with hash -1842201451, now seen corresponding path program 2 times [2019-12-07 19:26:47,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:47,384 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122112774] [2019-12-07 19:26:47,384 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:47,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:47,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:47,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1122112774] [2019-12-07 19:26:47,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:47,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:47,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441115288] [2019-12-07 19:26:47,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:47,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:47,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:47,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:47,423 INFO L87 Difference]: Start difference. First operand 4228 states and 12026 transitions. Second operand 3 states. [2019-12-07 19:26:47,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:47,438 INFO L93 Difference]: Finished difference Result 3884 states and 10778 transitions. [2019-12-07 19:26:47,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:47,438 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 19:26:47,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:47,441 INFO L225 Difference]: With dead ends: 3884 [2019-12-07 19:26:47,442 INFO L226 Difference]: Without dead ends: 3884 [2019-12-07 19:26:47,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:47,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3884 states. [2019-12-07 19:26:47,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3884 to 3529. [2019-12-07 19:26:47,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3529 states. [2019-12-07 19:26:47,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3529 states to 3529 states and 9786 transitions. [2019-12-07 19:26:47,487 INFO L78 Accepts]: Start accepts. Automaton has 3529 states and 9786 transitions. Word has length 66 [2019-12-07 19:26:47,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:47,487 INFO L462 AbstractCegarLoop]: Abstraction has 3529 states and 9786 transitions. [2019-12-07 19:26:47,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:47,487 INFO L276 IsEmpty]: Start isEmpty. Operand 3529 states and 9786 transitions. [2019-12-07 19:26:47,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:47,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:47,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:47,490 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:47,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:47,490 INFO L82 PathProgramCache]: Analyzing trace with hash -732996136, now seen corresponding path program 1 times [2019-12-07 19:26:47,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:47,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783860266] [2019-12-07 19:26:47,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:47,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:47,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:47,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783860266] [2019-12-07 19:26:47,643 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:47,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 19:26:47,643 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493971531] [2019-12-07 19:26:47,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:26:47,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:47,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:26:47,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:26:47,644 INFO L87 Difference]: Start difference. First operand 3529 states and 9786 transitions. Second operand 13 states. [2019-12-07 19:26:48,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:48,016 INFO L93 Difference]: Finished difference Result 7293 states and 20259 transitions. [2019-12-07 19:26:48,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 19:26:48,017 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 19:26:48,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:48,022 INFO L225 Difference]: With dead ends: 7293 [2019-12-07 19:26:48,022 INFO L226 Difference]: Without dead ends: 6780 [2019-12-07 19:26:48,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=137, Invalid=565, Unknown=0, NotChecked=0, Total=702 [2019-12-07 19:26:48,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6780 states. [2019-12-07 19:26:48,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6780 to 4525. [2019-12-07 19:26:48,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4525 states. [2019-12-07 19:26:48,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4525 states to 4525 states and 12459 transitions. [2019-12-07 19:26:48,089 INFO L78 Accepts]: Start accepts. Automaton has 4525 states and 12459 transitions. Word has length 67 [2019-12-07 19:26:48,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:48,090 INFO L462 AbstractCegarLoop]: Abstraction has 4525 states and 12459 transitions. [2019-12-07 19:26:48,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:26:48,090 INFO L276 IsEmpty]: Start isEmpty. Operand 4525 states and 12459 transitions. [2019-12-07 19:26:48,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:48,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:48,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:48,093 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:48,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:48,093 INFO L82 PathProgramCache]: Analyzing trace with hash 894946434, now seen corresponding path program 2 times [2019-12-07 19:26:48,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:48,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1504726099] [2019-12-07 19:26:48,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:48,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:48,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:48,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1504726099] [2019-12-07 19:26:48,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:48,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 19:26:48,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294839275] [2019-12-07 19:26:48,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:26:48,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:48,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:26:48,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:26:48,208 INFO L87 Difference]: Start difference. First operand 4525 states and 12459 transitions. Second operand 12 states. [2019-12-07 19:26:48,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:48,442 INFO L93 Difference]: Finished difference Result 7382 states and 20336 transitions. [2019-12-07 19:26:48,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 19:26:48,442 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 19:26:48,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:48,448 INFO L225 Difference]: With dead ends: 7382 [2019-12-07 19:26:48,448 INFO L226 Difference]: Without dead ends: 6995 [2019-12-07 19:26:48,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=369, Unknown=0, NotChecked=0, Total=462 [2019-12-07 19:26:48,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6995 states. [2019-12-07 19:26:48,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6995 to 5064. [2019-12-07 19:26:48,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5064 states. [2019-12-07 19:26:48,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5064 states to 5064 states and 14012 transitions. [2019-12-07 19:26:48,512 INFO L78 Accepts]: Start accepts. Automaton has 5064 states and 14012 transitions. Word has length 67 [2019-12-07 19:26:48,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:48,512 INFO L462 AbstractCegarLoop]: Abstraction has 5064 states and 14012 transitions. [2019-12-07 19:26:48,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:26:48,512 INFO L276 IsEmpty]: Start isEmpty. Operand 5064 states and 14012 transitions. [2019-12-07 19:26:48,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:48,515 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:48,515 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:48,515 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:48,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:48,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1053599810, now seen corresponding path program 3 times [2019-12-07 19:26:48,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:48,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131078313] [2019-12-07 19:26:48,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:48,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:48,720 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:48,720 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131078313] [2019-12-07 19:26:48,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:48,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:26:48,721 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701507452] [2019-12-07 19:26:48,721 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:26:48,721 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:48,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:26:48,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:26:48,721 INFO L87 Difference]: Start difference. First operand 5064 states and 14012 transitions. Second operand 15 states. [2019-12-07 19:26:49,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:49,307 INFO L93 Difference]: Finished difference Result 10555 states and 29367 transitions. [2019-12-07 19:26:49,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 19:26:49,307 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:26:49,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:49,315 INFO L225 Difference]: With dead ends: 10555 [2019-12-07 19:26:49,315 INFO L226 Difference]: Without dead ends: 10168 [2019-12-07 19:26:49,316 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 289 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=289, Invalid=1117, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 19:26:49,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10168 states. [2019-12-07 19:26:49,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10168 to 5441. [2019-12-07 19:26:49,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5441 states. [2019-12-07 19:26:49,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5441 states to 5441 states and 15145 transitions. [2019-12-07 19:26:49,416 INFO L78 Accepts]: Start accepts. Automaton has 5441 states and 15145 transitions. Word has length 67 [2019-12-07 19:26:49,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:49,416 INFO L462 AbstractCegarLoop]: Abstraction has 5441 states and 15145 transitions. [2019-12-07 19:26:49,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:26:49,417 INFO L276 IsEmpty]: Start isEmpty. Operand 5441 states and 15145 transitions. [2019-12-07 19:26:49,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:49,420 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:49,420 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:49,420 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:49,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:49,420 INFO L82 PathProgramCache]: Analyzing trace with hash -691900798, now seen corresponding path program 4 times [2019-12-07 19:26:49,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:49,421 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591583570] [2019-12-07 19:26:49,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:49,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:49,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:49,629 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591583570] [2019-12-07 19:26:49,629 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:49,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 19:26:49,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544783876] [2019-12-07 19:26:49,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 19:26:49,630 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:49,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 19:26:49,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 19:26:49,630 INFO L87 Difference]: Start difference. First operand 5441 states and 15145 transitions. Second operand 16 states. [2019-12-07 19:26:50,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:50,336 INFO L93 Difference]: Finished difference Result 10496 states and 29137 transitions. [2019-12-07 19:26:50,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 19:26:50,336 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 19:26:50,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:50,344 INFO L225 Difference]: With dead ends: 10496 [2019-12-07 19:26:50,344 INFO L226 Difference]: Without dead ends: 10025 [2019-12-07 19:26:50,345 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=285, Invalid=1197, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 19:26:50,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10025 states. [2019-12-07 19:26:50,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10025 to 5468. [2019-12-07 19:26:50,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5468 states. [2019-12-07 19:26:50,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5468 states to 5468 states and 15170 transitions. [2019-12-07 19:26:50,427 INFO L78 Accepts]: Start accepts. Automaton has 5468 states and 15170 transitions. Word has length 67 [2019-12-07 19:26:50,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:50,427 INFO L462 AbstractCegarLoop]: Abstraction has 5468 states and 15170 transitions. [2019-12-07 19:26:50,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 19:26:50,427 INFO L276 IsEmpty]: Start isEmpty. Operand 5468 states and 15170 transitions. [2019-12-07 19:26:50,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:50,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:50,431 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:50,431 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:50,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:50,431 INFO L82 PathProgramCache]: Analyzing trace with hash -1375362528, now seen corresponding path program 5 times [2019-12-07 19:26:50,431 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:50,431 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778191675] [2019-12-07 19:26:50,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:50,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:51,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:51,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778191675] [2019-12-07 19:26:51,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:51,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-07 19:26:51,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460938269] [2019-12-07 19:26:51,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-07 19:26:51,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:51,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 19:26:51,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=476, Unknown=0, NotChecked=0, Total=552 [2019-12-07 19:26:51,015 INFO L87 Difference]: Start difference. First operand 5468 states and 15170 transitions. Second operand 24 states. [2019-12-07 19:26:56,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:56,439 INFO L93 Difference]: Finished difference Result 19366 states and 53368 transitions. [2019-12-07 19:26:56,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2019-12-07 19:26:56,439 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 67 [2019-12-07 19:26:56,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:56,456 INFO L225 Difference]: With dead ends: 19366 [2019-12-07 19:26:56,456 INFO L226 Difference]: Without dead ends: 19170 [2019-12-07 19:26:56,458 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 5 SyntacticMatches, 6 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2089 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=841, Invalid=6299, Unknown=0, NotChecked=0, Total=7140 [2019-12-07 19:26:56,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19170 states. [2019-12-07 19:26:56,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19170 to 5827. [2019-12-07 19:26:56,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5827 states. [2019-12-07 19:26:56,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5827 states to 5827 states and 16126 transitions. [2019-12-07 19:26:56,605 INFO L78 Accepts]: Start accepts. Automaton has 5827 states and 16126 transitions. Word has length 67 [2019-12-07 19:26:56,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:56,605 INFO L462 AbstractCegarLoop]: Abstraction has 5827 states and 16126 transitions. [2019-12-07 19:26:56,605 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-07 19:26:56,605 INFO L276 IsEmpty]: Start isEmpty. Operand 5827 states and 16126 transitions. [2019-12-07 19:26:56,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:56,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:56,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:56,609 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:56,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:56,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1112376206, now seen corresponding path program 6 times [2019-12-07 19:26:56,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:56,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186495668] [2019-12-07 19:26:56,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:56,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:56,971 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:56,972 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186495668] [2019-12-07 19:26:56,972 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:56,972 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 19:26:56,972 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2015065662] [2019-12-07 19:26:56,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 19:26:56,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:56,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 19:26:56,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306 [2019-12-07 19:26:56,973 INFO L87 Difference]: Start difference. First operand 5827 states and 16126 transitions. Second operand 18 states. [2019-12-07 19:26:58,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:58,317 INFO L93 Difference]: Finished difference Result 12378 states and 34114 transitions. [2019-12-07 19:26:58,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 19:26:58,318 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 19:26:58,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:58,327 INFO L225 Difference]: With dead ends: 12378 [2019-12-07 19:26:58,327 INFO L226 Difference]: Without dead ends: 12199 [2019-12-07 19:26:58,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 546 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=377, Invalid=2173, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 19:26:58,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12199 states. [2019-12-07 19:26:58,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12199 to 5842. [2019-12-07 19:26:58,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5842 states. [2019-12-07 19:26:58,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5842 states to 5842 states and 16205 transitions. [2019-12-07 19:26:58,424 INFO L78 Accepts]: Start accepts. Automaton has 5842 states and 16205 transitions. Word has length 67 [2019-12-07 19:26:58,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:58,424 INFO L462 AbstractCegarLoop]: Abstraction has 5842 states and 16205 transitions. [2019-12-07 19:26:58,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 19:26:58,424 INFO L276 IsEmpty]: Start isEmpty. Operand 5842 states and 16205 transitions. [2019-12-07 19:26:58,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:58,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:58,428 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:58,428 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:58,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:58,428 INFO L82 PathProgramCache]: Analyzing trace with hash -1100355914, now seen corresponding path program 7 times [2019-12-07 19:26:58,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:58,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969561090] [2019-12-07 19:26:58,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:58,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:58,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:58,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969561090] [2019-12-07 19:26:58,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:58,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:26:58,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45126751] [2019-12-07 19:26:58,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:26:58,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:58,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:26:58,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:26:58,616 INFO L87 Difference]: Start difference. First operand 5842 states and 16205 transitions. Second operand 15 states. [2019-12-07 19:26:59,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:59,269 INFO L93 Difference]: Finished difference Result 9696 states and 26660 transitions. [2019-12-07 19:26:59,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 19:26:59,269 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 19:26:59,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:59,277 INFO L225 Difference]: With dead ends: 9696 [2019-12-07 19:26:59,277 INFO L226 Difference]: Without dead ends: 9137 [2019-12-07 19:26:59,277 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 308 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=311, Invalid=1171, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 19:26:59,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9137 states. [2019-12-07 19:26:59,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9137 to 5511. [2019-12-07 19:26:59,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5511 states. [2019-12-07 19:26:59,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5511 states to 5511 states and 15269 transitions. [2019-12-07 19:26:59,355 INFO L78 Accepts]: Start accepts. Automaton has 5511 states and 15269 transitions. Word has length 67 [2019-12-07 19:26:59,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:59,355 INFO L462 AbstractCegarLoop]: Abstraction has 5511 states and 15269 transitions. [2019-12-07 19:26:59,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:26:59,355 INFO L276 IsEmpty]: Start isEmpty. Operand 5511 states and 15269 transitions. [2019-12-07 19:26:59,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 19:26:59,358 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:59,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:59,358 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:59,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:59,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1680235652, now seen corresponding path program 8 times [2019-12-07 19:26:59,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:59,359 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897062343] [2019-12-07 19:26:59,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:59,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:26:59,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:26:59,421 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:26:59,421 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:26:59,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~main$tmp_guard0~0_30 0) (= 0 v_~x$w_buff0_used~0_718) (= 0 v_~x$w_buff1_used~0_397) (= |v_#NULL.offset_3| 0) (= v_~z~0_14 0) (= v_~x$r_buff1_thd0~0_314 0) (= 0 v_~x$r_buff0_thd3~0_141) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t515~0.base_20|) (= 0 v_~weak$$choice0~0_17) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t515~0.base_20|)) (= |v_ULTIMATE.start_main_~#t515~0.offset_15| 0) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~x$r_buff1_thd1~0_232 0) (= 0 v_~x$r_buff1_thd2~0_210) (< 0 |v_#StackHeapBarrier_18|) (= v_~weak$$choice2~0_122 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= v_~x$mem_tmp~0_24 0) (= 0 v_~x$r_buff1_thd3~0_224) (= v_~y~0_88 0) (= 0 v_~x~0_198) (= 0 v_~x$w_buff0~0_179) (= v_~__unbuffered_p1_EAX~0_173 0) (= 0 |v_#NULL.base_3|) (= v_~__unbuffered_cnt~0_153 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t515~0.base_20| 1)) (= v_~x$r_buff0_thd1~0_158 0) (= 0 v_~x$w_buff1~0_170) (= v_~x$flush_delayed~0_54 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t515~0.base_20| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t515~0.base_20|) |v_ULTIMATE.start_main_~#t515~0.offset_15| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff0_thd2~0_286) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t515~0.base_20| 4) |v_#length_23|) (= v_~x$r_buff0_thd0~0_390 0) (= v_~__unbuffered_p2_EBX~0_39 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_24|, ~x$w_buff0~0=v_~x$w_buff0~0_179, ULTIMATE.start_main_~#t515~0.base=|v_ULTIMATE.start_main_~#t515~0.base_20|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_54, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_24|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_38|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_232|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_70|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_232, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_141, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_76|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ULTIMATE.start_main_~#t516~0.offset=|v_ULTIMATE.start_main_~#t516~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_173, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_390, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ~x$w_buff1~0=v_~x$w_buff1~0_170, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_49|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_397, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_210, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_64|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t516~0.base=|v_ULTIMATE.start_main_~#t516~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_153, ULTIMATE.start_main_~#t517~0.offset=|v_ULTIMATE.start_main_~#t517~0.offset_15|, ~x~0=v_~x~0_198, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_158, ULTIMATE.start_main_~#t515~0.offset=|v_ULTIMATE.start_main_~#t515~0.offset_15|, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_24|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_224, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~x$mem_tmp~0=v_~x$mem_tmp~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_20|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_~#t517~0.base=|v_ULTIMATE.start_main_~#t517~0.base_18|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_87|, ~y~0=v_~y~0_88, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_40|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_314, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_40|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_49|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_718, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_29|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_14, ~weak$$choice2~0=v_~weak$$choice2~0_122, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_~#t515~0.base, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t516~0.offset, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t516~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t517~0.offset, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t515~0.offset, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t517~0.base, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 19:26:59,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t516~0.base_9| 0)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t516~0.base_9|) 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t516~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t516~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t516~0.base_9|) |v_ULTIMATE.start_main_~#t516~0.offset_8| 1))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t516~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t516~0.offset_8| 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t516~0.base_9| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t516~0.offset=|v_ULTIMATE.start_main_~#t516~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t516~0.base=|v_ULTIMATE.start_main_~#t516~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t516~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t516~0.base, #length] because there is no mapped edge [2019-12-07 19:26:59,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L814-1-->L816: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t517~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t517~0.base_12|) |v_ULTIMATE.start_main_~#t517~0.offset_10| 2))) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t517~0.base_12| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t517~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t517~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t517~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t517~0.base_12| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t517~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t517~0.base=|v_ULTIMATE.start_main_~#t517~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t517~0.offset=|v_ULTIMATE.start_main_~#t517~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t517~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t517~0.offset] because there is no mapped edge [2019-12-07 19:26:59,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L4-->L766: Formula: (and (= v_~x$r_buff1_thd0~0_91 v_~x$r_buff0_thd0~0_128) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8 0)) (= v_~y~0_37 v_~__unbuffered_p1_EAX~0_43) (= v_~x$r_buff1_thd1~0_47 v_~x$r_buff0_thd1~0_56) (= v_~x$r_buff1_thd3~0_52 v_~x$r_buff0_thd3~0_68) (= 1 v_~x$r_buff0_thd2~0_98) (= v_~x$r_buff1_thd2~0_53 v_~x$r_buff0_thd2~0_99)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_68, ~y~0=v_~y~0_37, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_56, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_43, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_52, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_53, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_47, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_68, ~y~0=v_~y~0_37, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_98, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_91} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:26:59,425 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1542829960 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1542829960 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1542829960|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1542829960 |P1Thread1of1ForFork1_#t~ite11_Out1542829960|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1542829960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1542829960} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1542829960|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1542829960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1542829960} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 19:26:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In-680761308 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-680761308 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-680761308 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-680761308 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-680761308|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-680761308 |P1Thread1of1ForFork1_#t~ite12_Out-680761308|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-680761308, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-680761308, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-680761308, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680761308} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-680761308, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-680761308, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-680761308|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-680761308, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680761308} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 19:26:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In124818316 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In124818316 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out124818316 ~x$r_buff0_thd2~0_In124818316))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out124818316 0)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In124818316, ~x$w_buff0_used~0=~x$w_buff0_used~0_In124818316} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out124818316|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out124818316, ~x$w_buff0_used~0=~x$w_buff0_used~0_In124818316} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 19:26:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-531149224 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-531149224 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-531149224 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-531149224 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-531149224| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-531149224| ~x$r_buff1_thd2~0_In-531149224) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-531149224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-531149224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-531149224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-531149224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-531149224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-531149224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-531149224, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-531149224|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-531149224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 19:26:59,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L770-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_105 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_105, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 19:26:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->L789-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1368605819 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1368605819 256)))) (or (and (= ~x$w_buff1~0_In1368605819 |P2Thread1of1ForFork2_#t~ite15_Out1368605819|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In1368605819 |P2Thread1of1ForFork2_#t~ite15_Out1368605819|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1368605819, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1368605819, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1368605819, ~x~0=~x~0_In1368605819} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out1368605819|, ~x$w_buff1~0=~x$w_buff1~0_In1368605819, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1368605819, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1368605819, ~x~0=~x~0_In1368605819} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 19:26:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L737-2-->L737-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In321452374 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In321452374 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In321452374 |P0Thread1of1ForFork0_#t~ite3_Out321452374|) (not .cse1)) (and (or .cse0 .cse1) (= ~x~0_In321452374 |P0Thread1of1ForFork0_#t~ite3_Out321452374|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In321452374, ~x$w_buff1_used~0=~x$w_buff1_used~0_In321452374, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In321452374, ~x~0=~x~0_In321452374} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out321452374|, ~x$w_buff1~0=~x$w_buff1~0_In321452374, ~x$w_buff1_used~0=~x$w_buff1_used~0_In321452374, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In321452374, ~x~0=~x~0_In321452374} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 19:26:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L737-4-->L738: Formula: (= v_~x~0_33 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_33} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 19:26:59,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L789-4-->L790: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_58) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|, ~x~0=v_~x~0_58} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 19:26:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L738-->L738-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1760308406 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1760308406 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out1760308406|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1760308406 |P0Thread1of1ForFork0_#t~ite5_Out1760308406|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1760308406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1760308406} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1760308406|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1760308406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1760308406} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 19:26:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1588977179 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1588977179 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1588977179|)) (and (= ~x$w_buff0_used~0_In1588977179 |P2Thread1of1ForFork2_#t~ite17_Out1588977179|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1588977179, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1588977179} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1588977179, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1588977179|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1588977179} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 19:26:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1129058366 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1129058366 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1129058366 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1129058366 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out1129058366| ~x$w_buff1_used~0_In1129058366)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite18_Out1129058366| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1129058366, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1129058366, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1129058366, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1129058366} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1129058366, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1129058366, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1129058366, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1129058366|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1129058366} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 19:26:59,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L792-->L792-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1024994303 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1024994303 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out1024994303| ~x$r_buff0_thd3~0_In1024994303)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out1024994303| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1024994303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1024994303} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1024994303, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1024994303|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1024994303} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 19:26:59,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L793-->L793-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-1946532385 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1946532385 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-1946532385 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In-1946532385 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1946532385| ~x$r_buff1_thd3~0_In-1946532385) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1946532385|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946532385, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1946532385, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1946532385, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946532385} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1946532385|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946532385, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1946532385, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1946532385, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946532385} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 19:26:59,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L793-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_93 |v_P2Thread1of1ForFork2_#t~ite20_40|)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_39|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_93, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 19:26:59,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L739-->L739-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1737008379 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd1~0_In1737008379 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1737008379 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1737008379 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1737008379|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1737008379 |P0Thread1of1ForFork0_#t~ite6_Out1737008379|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1737008379, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1737008379, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1737008379, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1737008379} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1737008379|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1737008379, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1737008379, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1737008379, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1737008379} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 19:26:59,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In884479833 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In884479833 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out884479833| ~x$r_buff0_thd1~0_In884479833) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out884479833| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In884479833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In884479833} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In884479833, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out884479833|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In884479833} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 19:26:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L741-->L741-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd1~0_In1083386034 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1083386034 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1083386034 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1083386034 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1083386034| ~x$r_buff1_thd1~0_In1083386034)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out1083386034| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1083386034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1083386034, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1083386034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1083386034} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1083386034, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1083386034|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1083386034, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1083386034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1083386034} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 19:26:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L741-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_56|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_56|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_55|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 19:26:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L820-->L822-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_136 256)) (= (mod v_~x$r_buff0_thd0~0_90 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_90, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_136} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_90, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_136} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:26:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-318946588| |ULTIMATE.start_main_#t~ite24_Out-318946588|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-318946588 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-318946588 256) 0))) (or (and .cse0 (= ~x~0_In-318946588 |ULTIMATE.start_main_#t~ite24_Out-318946588|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~x$w_buff1~0_In-318946588 |ULTIMATE.start_main_#t~ite24_Out-318946588|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-318946588, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-318946588, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-318946588, ~x~0=~x~0_In-318946588} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-318946588, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-318946588|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-318946588|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-318946588, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-318946588, ~x~0=~x~0_In-318946588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 19:26:59,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1771055294 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1771055294 256)))) (or (and (= ~x$w_buff0_used~0_In1771055294 |ULTIMATE.start_main_#t~ite26_Out1771055294|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite26_Out1771055294|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1771055294, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1771055294} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1771055294, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1771055294|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1771055294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 19:26:59,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1189501529 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1189501529 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1189501529 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1189501529 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1189501529|)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1189501529 |ULTIMATE.start_main_#t~ite27_Out-1189501529|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1189501529, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1189501529, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1189501529, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1189501529} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1189501529, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1189501529, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1189501529|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1189501529, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1189501529} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 19:26:59,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-1689241276 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1689241276 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1689241276| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite28_Out-1689241276| ~x$r_buff0_thd0~0_In-1689241276)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1689241276, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1689241276} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1689241276, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1689241276|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1689241276} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 19:26:59,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1627080817 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1627080817 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1627080817 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-1627080817 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out-1627080817| ~x$r_buff1_thd0~0_In-1627080817) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-1627080817| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1627080817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1627080817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1627080817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1627080817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1627080817, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1627080817|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1627080817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1627080817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1627080817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:26:59,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1852041793 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite38_In-1852041793| |ULTIMATE.start_main_#t~ite38_Out-1852041793|) (= |ULTIMATE.start_main_#t~ite39_Out-1852041793| ~x$w_buff1~0_In-1852041793) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1852041793 256)))) (or (= (mod ~x$w_buff0_used~0_In-1852041793 256) 0) (and (= 0 (mod ~x$r_buff1_thd0~0_In-1852041793 256)) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In-1852041793 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite39_Out-1852041793| |ULTIMATE.start_main_#t~ite38_Out-1852041793|) (= |ULTIMATE.start_main_#t~ite38_Out-1852041793| ~x$w_buff1~0_In-1852041793)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1852041793, ~x$w_buff1~0=~x$w_buff1~0_In-1852041793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1852041793, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1852041793|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1852041793, ~weak$$choice2~0=~weak$$choice2~0_In-1852041793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1852041793} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1852041793, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1852041793|, ~x$w_buff1~0=~x$w_buff1~0_In-1852041793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1852041793, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1852041793|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1852041793, ~weak$$choice2~0=~weak$$choice2~0_In-1852041793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1852041793} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 19:26:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L838-->L839-8: Formula: (and (= v_~x$r_buff1_thd0~0_306 |v_ULTIMATE.start_main_#t~ite51_81|) (= v_~x$r_buff0_thd0~0_381 v_~x$r_buff0_thd0~0_380) (= |v_ULTIMATE.start_main_#t~ite49_59| |v_ULTIMATE.start_main_#t~ite49_60|) (not (= (mod v_~weak$$choice2~0_116 256) 0)) (= |v_ULTIMATE.start_main_#t~ite50_66| |v_ULTIMATE.start_main_#t~ite50_65|)) InVars {ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_66|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_381, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_306, ~weak$$choice2~0=v_~weak$$choice2~0_116} OutVars{ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_65|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_380, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_81|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_306, ~weak$$choice2~0=v_~weak$$choice2~0_116} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:26:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L841-->L844-1: Formula: (and (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= (mod v_~x$flush_delayed~0_26 256) 0)) (= v_~x$flush_delayed~0_25 0) (= v_~x$mem_tmp~0_14 v_~x~0_102)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_102, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:26:59,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L844-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:26:59,484 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:26:59 BasicIcfg [2019-12-07 19:26:59,484 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:26:59,484 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:26:59,484 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:26:59,485 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:26:59,485 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:24:17" (3/4) ... [2019-12-07 19:26:59,487 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:26:59,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] ULTIMATE.startENTRY-->L812: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~main$tmp_guard0~0_30 0) (= 0 v_~x$w_buff0_used~0_718) (= 0 v_~x$w_buff1_used~0_397) (= |v_#NULL.offset_3| 0) (= v_~z~0_14 0) (= v_~x$r_buff1_thd0~0_314 0) (= 0 v_~x$r_buff0_thd3~0_141) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t515~0.base_20|) (= 0 v_~weak$$choice0~0_17) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t515~0.base_20|)) (= |v_ULTIMATE.start_main_~#t515~0.offset_15| 0) (= v_~main$tmp_guard1~0_56 0) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~x$r_buff1_thd1~0_232 0) (= 0 v_~x$r_buff1_thd2~0_210) (< 0 |v_#StackHeapBarrier_18|) (= v_~weak$$choice2~0_122 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= v_~x$mem_tmp~0_24 0) (= 0 v_~x$r_buff1_thd3~0_224) (= v_~y~0_88 0) (= 0 v_~x~0_198) (= 0 v_~x$w_buff0~0_179) (= v_~__unbuffered_p1_EAX~0_173 0) (= 0 |v_#NULL.base_3|) (= v_~__unbuffered_cnt~0_153 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t515~0.base_20| 1)) (= v_~x$r_buff0_thd1~0_158 0) (= 0 v_~x$w_buff1~0_170) (= v_~x$flush_delayed~0_54 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t515~0.base_20| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t515~0.base_20|) |v_ULTIMATE.start_main_~#t515~0.offset_15| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff0_thd2~0_286) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t515~0.base_20| 4) |v_#length_23|) (= v_~x$r_buff0_thd0~0_390 0) (= v_~__unbuffered_p2_EBX~0_39 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_24|, ~x$w_buff0~0=v_~x$w_buff0~0_179, ULTIMATE.start_main_~#t515~0.base=|v_ULTIMATE.start_main_~#t515~0.base_20|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_30|, ~x$flush_delayed~0=v_~x$flush_delayed~0_54, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_24|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_38|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_232|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_70|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_232, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_141, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_76|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ULTIMATE.start_main_~#t516~0.offset=|v_ULTIMATE.start_main_~#t516~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_173, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_390, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ~x$w_buff1~0=v_~x$w_buff1~0_170, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_49|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_397, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_210, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_37|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_64|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t516~0.base=|v_ULTIMATE.start_main_~#t516~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_153, ULTIMATE.start_main_~#t517~0.offset=|v_ULTIMATE.start_main_~#t517~0.offset_15|, ~x~0=v_~x~0_198, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_158, ULTIMATE.start_main_~#t515~0.offset=|v_ULTIMATE.start_main_~#t515~0.offset_15|, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_24|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_38|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_224, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_56, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_32|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_39|, ~x$mem_tmp~0=v_~x$mem_tmp~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_20|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_~#t517~0.base=|v_ULTIMATE.start_main_~#t517~0.base_18|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_87|, ~y~0=v_~y~0_88, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_40|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_30, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_314, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_286, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_40|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_49|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_718, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_29|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_14, ~weak$$choice2~0=v_~weak$$choice2~0_122, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_~#t515~0.base, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t516~0.offset, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t516~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t517~0.offset, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t515~0.offset, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t517~0.base, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 19:26:59,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t516~0.base_9| 0)) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t516~0.base_9|) 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t516~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t516~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t516~0.base_9|) |v_ULTIMATE.start_main_~#t516~0.offset_8| 1))) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t516~0.base_9| 4)) (= |v_ULTIMATE.start_main_~#t516~0.offset_8| 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t516~0.base_9| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t516~0.offset=|v_ULTIMATE.start_main_~#t516~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t516~0.base=|v_ULTIMATE.start_main_~#t516~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t516~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t516~0.base, #length] because there is no mapped edge [2019-12-07 19:26:59,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L814-1-->L816: Formula: (and (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t517~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t517~0.base_12|) |v_ULTIMATE.start_main_~#t517~0.offset_10| 2))) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t517~0.base_12| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t517~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t517~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t517~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t517~0.base_12| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t517~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t517~0.base=|v_ULTIMATE.start_main_~#t517~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t517~0.offset=|v_ULTIMATE.start_main_~#t517~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t517~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t517~0.offset] because there is no mapped edge [2019-12-07 19:26:59,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L4-->L766: Formula: (and (= v_~x$r_buff1_thd0~0_91 v_~x$r_buff0_thd0~0_128) (not (= v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8 0)) (= v_~y~0_37 v_~__unbuffered_p1_EAX~0_43) (= v_~x$r_buff1_thd1~0_47 v_~x$r_buff0_thd1~0_56) (= v_~x$r_buff1_thd3~0_52 v_~x$r_buff0_thd3~0_68) (= 1 v_~x$r_buff0_thd2~0_98) (= v_~x$r_buff1_thd2~0_53 v_~x$r_buff0_thd2~0_99)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_68, ~y~0=v_~y~0_37, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_128, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_56, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_43, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_52, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_53, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_47, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_68, ~y~0=v_~y~0_37, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_98, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_91} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, ~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:26:59,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1542829960 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In1542829960 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1542829960|) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1542829960 |P1Thread1of1ForFork1_#t~ite11_Out1542829960|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1542829960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1542829960} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1542829960|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1542829960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1542829960} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 19:26:59,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In-680761308 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In-680761308 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-680761308 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-680761308 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-680761308|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-680761308 |P1Thread1of1ForFork1_#t~ite12_Out-680761308|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-680761308, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-680761308, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-680761308, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680761308} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-680761308, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-680761308, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-680761308|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-680761308, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680761308} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 19:26:59,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L769-->L770: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In124818316 256))) (.cse2 (= (mod ~x$r_buff0_thd2~0_In124818316 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out124818316 ~x$r_buff0_thd2~0_In124818316))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out124818316 0)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In124818316, ~x$w_buff0_used~0=~x$w_buff0_used~0_In124818316} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out124818316|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out124818316, ~x$w_buff0_used~0=~x$w_buff0_used~0_In124818316} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 19:26:59,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L770-->L770-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-531149224 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-531149224 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-531149224 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-531149224 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-531149224| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-531149224| ~x$r_buff1_thd2~0_In-531149224) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-531149224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-531149224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-531149224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-531149224} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-531149224, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-531149224, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-531149224, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-531149224|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-531149224} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 19:26:59,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L770-2-->P1EXIT: Formula: (and (= v_~x$r_buff1_thd2~0_105 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_105, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 19:26:59,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L789-2-->L789-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1368605819 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1368605819 256)))) (or (and (= ~x$w_buff1~0_In1368605819 |P2Thread1of1ForFork2_#t~ite15_Out1368605819|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In1368605819 |P2Thread1of1ForFork2_#t~ite15_Out1368605819|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1368605819, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1368605819, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1368605819, ~x~0=~x~0_In1368605819} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out1368605819|, ~x$w_buff1~0=~x$w_buff1~0_In1368605819, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1368605819, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1368605819, ~x~0=~x~0_In1368605819} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L737-2-->L737-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In321452374 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In321452374 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In321452374 |P0Thread1of1ForFork0_#t~ite3_Out321452374|) (not .cse1)) (and (or .cse0 .cse1) (= ~x~0_In321452374 |P0Thread1of1ForFork0_#t~ite3_Out321452374|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In321452374, ~x$w_buff1_used~0=~x$w_buff1_used~0_In321452374, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In321452374, ~x~0=~x~0_In321452374} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out321452374|, ~x$w_buff1~0=~x$w_buff1~0_In321452374, ~x$w_buff1_used~0=~x$w_buff1_used~0_In321452374, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In321452374, ~x~0=~x~0_In321452374} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L737-4-->L738: Formula: (= v_~x~0_33 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_33} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L789-4-->L790: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_58) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|, ~x~0=v_~x~0_58} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L738-->L738-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1760308406 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1760308406 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out1760308406|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1760308406 |P0Thread1of1ForFork0_#t~ite5_Out1760308406|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1760308406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1760308406} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1760308406|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1760308406, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1760308406} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1588977179 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1588977179 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1588977179|)) (and (= ~x$w_buff0_used~0_In1588977179 |P2Thread1of1ForFork2_#t~ite17_Out1588977179|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1588977179, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1588977179} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1588977179, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1588977179|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1588977179} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 19:26:59,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L791-->L791-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1129058366 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1129058366 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1129058366 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1129058366 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out1129058366| ~x$w_buff1_used~0_In1129058366)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite18_Out1129058366| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1129058366, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1129058366, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1129058366, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1129058366} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1129058366, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1129058366, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1129058366, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1129058366|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1129058366} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 19:26:59,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L792-->L792-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In1024994303 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1024994303 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out1024994303| ~x$r_buff0_thd3~0_In1024994303)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out1024994303| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1024994303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1024994303} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1024994303, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1024994303|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1024994303} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 19:26:59,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L793-->L793-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-1946532385 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1946532385 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-1946532385 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In-1946532385 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1946532385| ~x$r_buff1_thd3~0_In-1946532385) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1946532385|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946532385, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1946532385, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1946532385, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946532385} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1946532385|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1946532385, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1946532385, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1946532385, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1946532385} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 19:26:59,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L793-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_93 |v_P2Thread1of1ForFork2_#t~ite20_40|)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_39|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_93, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 19:26:59,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L739-->L739-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1737008379 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd1~0_In1737008379 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1737008379 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In1737008379 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1737008379|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~x$w_buff1_used~0_In1737008379 |P0Thread1of1ForFork0_#t~ite6_Out1737008379|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1737008379, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1737008379, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1737008379, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1737008379} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1737008379|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1737008379, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1737008379, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1737008379, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1737008379} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 19:26:59,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L740-->L740-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In884479833 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In884479833 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out884479833| ~x$r_buff0_thd1~0_In884479833) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out884479833| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In884479833, ~x$w_buff0_used~0=~x$w_buff0_used~0_In884479833} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In884479833, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out884479833|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In884479833} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 19:26:59,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L741-->L741-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd1~0_In1083386034 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1083386034 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1083386034 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In1083386034 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1083386034| ~x$r_buff1_thd1~0_In1083386034)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork0_#t~ite8_Out1083386034| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1083386034, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1083386034, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1083386034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1083386034} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1083386034, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1083386034|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1083386034, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1083386034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1083386034} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 19:26:59,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L741-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~x$r_buff1_thd1~0_125 |v_P0Thread1of1ForFork0_#t~ite8_56|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_56|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_55|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_125} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 19:26:59,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L820-->L822-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_136 256)) (= (mod v_~x$r_buff0_thd0~0_90 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_90, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_136} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_90, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_136} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:26:59,492 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L822-2-->L822-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-318946588| |ULTIMATE.start_main_#t~ite24_Out-318946588|)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-318946588 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-318946588 256) 0))) (or (and .cse0 (= ~x~0_In-318946588 |ULTIMATE.start_main_#t~ite24_Out-318946588|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~x$w_buff1~0_In-318946588 |ULTIMATE.start_main_#t~ite24_Out-318946588|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-318946588, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-318946588, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-318946588, ~x~0=~x~0_In-318946588} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-318946588, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-318946588|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-318946588|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-318946588, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-318946588, ~x~0=~x~0_In-318946588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 19:26:59,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1771055294 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1771055294 256)))) (or (and (= ~x$w_buff0_used~0_In1771055294 |ULTIMATE.start_main_#t~ite26_Out1771055294|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite26_Out1771055294|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1771055294, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1771055294} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1771055294, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1771055294|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1771055294} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 19:26:59,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1189501529 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1189501529 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1189501529 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1189501529 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1189501529|)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1189501529 |ULTIMATE.start_main_#t~ite27_Out-1189501529|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1189501529, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1189501529, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1189501529, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1189501529} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1189501529, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1189501529, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1189501529|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1189501529, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1189501529} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 19:26:59,493 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L825-->L825-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-1689241276 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1689241276 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1689241276| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite28_Out-1689241276| ~x$r_buff0_thd0~0_In-1689241276)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1689241276, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1689241276} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1689241276, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1689241276|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1689241276} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 19:26:59,494 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-1627080817 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In-1627080817 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1627080817 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-1627080817 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out-1627080817| ~x$r_buff1_thd0~0_In-1627080817) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-1627080817| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1627080817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1627080817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1627080817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1627080817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1627080817, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1627080817|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1627080817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1627080817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1627080817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:26:59,495 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L835-->L835-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1852041793 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite38_In-1852041793| |ULTIMATE.start_main_#t~ite38_Out-1852041793|) (= |ULTIMATE.start_main_#t~ite39_Out-1852041793| ~x$w_buff1~0_In-1852041793) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1852041793 256)))) (or (= (mod ~x$w_buff0_used~0_In-1852041793 256) 0) (and (= 0 (mod ~x$r_buff1_thd0~0_In-1852041793 256)) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In-1852041793 256) 0)))) .cse0 (= |ULTIMATE.start_main_#t~ite39_Out-1852041793| |ULTIMATE.start_main_#t~ite38_Out-1852041793|) (= |ULTIMATE.start_main_#t~ite38_Out-1852041793| ~x$w_buff1~0_In-1852041793)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1852041793, ~x$w_buff1~0=~x$w_buff1~0_In-1852041793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1852041793, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1852041793|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1852041793, ~weak$$choice2~0=~weak$$choice2~0_In-1852041793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1852041793} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1852041793, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1852041793|, ~x$w_buff1~0=~x$w_buff1~0_In-1852041793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1852041793, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1852041793|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1852041793, ~weak$$choice2~0=~weak$$choice2~0_In-1852041793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1852041793} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 19:26:59,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L838-->L839-8: Formula: (and (= v_~x$r_buff1_thd0~0_306 |v_ULTIMATE.start_main_#t~ite51_81|) (= v_~x$r_buff0_thd0~0_381 v_~x$r_buff0_thd0~0_380) (= |v_ULTIMATE.start_main_#t~ite49_59| |v_ULTIMATE.start_main_#t~ite49_60|) (not (= (mod v_~weak$$choice2~0_116 256) 0)) (= |v_ULTIMATE.start_main_#t~ite50_66| |v_ULTIMATE.start_main_#t~ite50_65|)) InVars {ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_66|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_381, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_306, ~weak$$choice2~0=v_~weak$$choice2~0_116} OutVars{ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_65|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_380, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_81|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_34|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_34|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_59|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_306, ~weak$$choice2~0=v_~weak$$choice2~0_116} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:26:59,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L841-->L844-1: Formula: (and (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= (mod v_~x$flush_delayed~0_26 256) 0)) (= v_~x$flush_delayed~0_25 0) (= v_~x$mem_tmp~0_14 v_~x~0_102)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_102, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:26:59,496 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L844-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:26:59,548 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_f09b3ef4-3c8b-4ee0-83eb-a26b76ba4390/bin/utaipan/witness.graphml [2019-12-07 19:26:59,548 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:26:59,549 INFO L168 Benchmark]: Toolchain (without parser) took 162789.69 ms. Allocated memory was 1.0 GB in the beginning and 9.0 GB in the end (delta: 8.0 GB). Free memory was 941.9 MB in the beginning and 4.6 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,550 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:26:59,550 INFO L168 Benchmark]: CACSL2BoogieTranslator took 383.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -152.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,550 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,550 INFO L168 Benchmark]: Boogie Preprocessor took 25.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:26:59,550 INFO L168 Benchmark]: RCFGBuilder took 415.71 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,551 INFO L168 Benchmark]: TraceAbstraction took 161858.14 ms. Allocated memory was 1.2 GB in the beginning and 9.0 GB in the end (delta: 7.9 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,551 INFO L168 Benchmark]: Witness Printer took 63.84 ms. Allocated memory is still 9.0 GB. Free memory was 4.7 GB in the beginning and 4.6 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:59,552 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 383.41 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 127.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -152.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.21 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 415.71 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 161858.14 ms. Allocated memory was 1.2 GB in the beginning and 9.0 GB in the end (delta: 7.9 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 63.84 ms. Allocated memory is still 9.0 GB. Free memory was 4.7 GB in the beginning and 4.6 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 103 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 8 FixpointIterations, 33 TrivialSequentialCompositions, 46 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 32 ChoiceCompositions, 6126 VarBasedMoverChecksPositive, 240 VarBasedMoverChecksNegative, 65 SemBasedMoverChecksPositive, 246 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 88380 CheckedPairsTotal, 115 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L812] FCALL, FORK 0 pthread_create(&t515, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t516, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L751] 2 x$w_buff1 = x$w_buff0 [L752] 2 x$w_buff0 = 2 [L753] 2 x$w_buff1_used = x$w_buff0_used [L754] 2 x$w_buff0_used = (_Bool)1 [L766] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L766] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L767] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L768] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L816] FCALL, FORK 0 pthread_create(&t517, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L780] 3 y = 1 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L731] 1 z = 1 [L734] 1 x = 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=2, y=1, z=1] [L737] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=2, y=1, z=1] [L790] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L791] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L792] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L738] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L739] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L740] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L818] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L822] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L823] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L824] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L825] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L826] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L829] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L830] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L831] 0 x$flush_delayed = weak$$choice2 [L832] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L833] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L833] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L834] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L834] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L835] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L836] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L836] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L837] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L837] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L839] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L840] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 161.7s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 39.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4567 SDtfs, 7425 SDslu, 18041 SDs, 0 SdLazy, 16659 SolverSat, 682 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 479 GetRequests, 44 SyntacticMatches, 26 SemanticMatches, 409 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3974 ImplicationChecksByTransitivity, 4.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=287807occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 100.2s AutomataMinimizationTime, 26 MinimizatonAttempts, 523037 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 1254 NumberOfCodeBlocks, 1254 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 1161 ConstructedInterpolants, 0 QuantifiedInterpolants, 386527 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...