./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 34bc77c32fe780b983059a0818af8d8eab59dff4 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:38:39,787 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:38:39,788 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:38:39,796 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:38:39,796 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:38:39,796 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:38:39,797 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:38:39,799 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:38:39,800 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:38:39,800 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:38:39,801 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:38:39,802 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:38:39,802 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:38:39,803 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:38:39,803 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:38:39,804 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:38:39,805 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:38:39,805 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:38:39,807 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:38:39,808 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:38:39,809 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:38:39,810 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:38:39,811 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:38:39,811 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:38:39,813 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:38:39,813 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:38:39,813 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:38:39,814 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:38:39,814 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:38:39,815 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:38:39,815 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:38:39,815 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:38:39,816 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:38:39,816 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:38:39,817 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:38:39,817 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:38:39,817 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:38:39,817 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:38:39,817 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:38:39,818 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:38:39,818 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:38:39,819 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:38:39,828 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:38:39,829 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:38:39,829 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:38:39,829 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:38:39,829 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:38:39,829 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:38:39,830 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:38:39,830 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:38:39,831 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:38:39,831 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:38:39,832 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:38:39,832 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:38:39,833 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:38:39,833 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:38:39,834 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:38:39,834 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:38:39,834 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 34bc77c32fe780b983059a0818af8d8eab59dff4 [2019-12-07 13:38:39,935 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:38:39,942 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:38:39,944 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:38:39,945 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:38:39,946 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:38:39,946 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix024_power.oepc.i [2019-12-07 13:38:39,982 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/data/5894ff2d0/39ea26de40f648bea8d4324be990c4e4/FLAG34687ca70 [2019-12-07 13:38:40,472 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:38:40,472 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/sv-benchmarks/c/pthread-wmm/mix024_power.oepc.i [2019-12-07 13:38:40,483 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/data/5894ff2d0/39ea26de40f648bea8d4324be990c4e4/FLAG34687ca70 [2019-12-07 13:38:40,492 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/data/5894ff2d0/39ea26de40f648bea8d4324be990c4e4 [2019-12-07 13:38:40,494 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:38:40,495 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:38:40,495 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:38:40,495 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:38:40,498 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:38:40,498 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,500 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3482028c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40, skipping insertion in model container [2019-12-07 13:38:40,500 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,505 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:38:40,533 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:38:40,782 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:38:40,790 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:38:40,831 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:38:40,876 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:38:40,876 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40 WrapperNode [2019-12-07 13:38:40,877 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:38:40,877 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:38:40,877 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:38:40,877 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:38:40,884 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,897 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,916 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:38:40,916 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:38:40,917 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:38:40,917 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:38:40,923 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,923 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,926 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,927 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,934 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,936 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,939 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... [2019-12-07 13:38:40,942 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:38:40,943 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:38:40,943 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:38:40,943 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:38:40,943 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:38:40,992 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:38:40,992 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:38:40,992 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:38:40,992 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:38:40,992 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:38:40,992 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:38:40,993 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:38:40,993 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:38:40,993 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:38:40,993 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:38:40,993 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:38:40,993 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:38:40,993 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:38:40,994 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:38:41,378 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:38:41,378 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:38:41,379 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:41 BoogieIcfgContainer [2019-12-07 13:38:41,379 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:38:41,380 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:38:41,380 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:38:41,382 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:38:41,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:38:40" (1/3) ... [2019-12-07 13:38:41,382 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33082c03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:38:41, skipping insertion in model container [2019-12-07 13:38:41,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:40" (2/3) ... [2019-12-07 13:38:41,382 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33082c03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:38:41, skipping insertion in model container [2019-12-07 13:38:41,383 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:41" (3/3) ... [2019-12-07 13:38:41,384 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_power.oepc.i [2019-12-07 13:38:41,390 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:38:41,390 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:38:41,395 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:38:41,395 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:38:41,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,421 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,421 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,421 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,422 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,423 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,424 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,425 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,426 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,427 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,428 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,429 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,429 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,430 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,431 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,432 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,433 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,434 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,435 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,436 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,437 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,438 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,439 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,440 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,441 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,442 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:41,456 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:38:41,472 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:38:41,472 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:38:41,472 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:38:41,472 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:38:41,472 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:38:41,472 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:38:41,472 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:38:41,472 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:38:41,485 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 13:38:41,486 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 13:38:41,540 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 13:38:41,540 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:38:41,551 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:38:41,568 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 13:38:41,598 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 13:38:41,598 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:38:41,604 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:38:41,619 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:38:41,620 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:38:44,541 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 13:38:44,644 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 13:38:44,644 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 13:38:44,647 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 13:38:59,205 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 13:38:59,207 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 13:38:59,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:38:59,210 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:38:59,211 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:38:59,211 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:38:59,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:38:59,215 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 13:38:59,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:38:59,221 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118183989] [2019-12-07 13:38:59,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:38:59,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:38:59,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:38:59,353 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118183989] [2019-12-07 13:38:59,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:38:59,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:38:59,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [385689835] [2019-12-07 13:38:59,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:38:59,358 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:38:59,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:38:59,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:38:59,368 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 13:39:00,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:00,187 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 13:39:00,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:00,189 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:39:00,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:00,651 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 13:39:00,652 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 13:39:00,652 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:05,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 13:39:06,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 13:39:06,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 13:39:07,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 13:39:07,053 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 13:39:07,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:07,053 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 13:39:07,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:07,054 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 13:39:07,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:39:07,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:07,057 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:07,057 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:07,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:07,057 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 13:39:07,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:07,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [400967539] [2019-12-07 13:39:07,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:07,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:07,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:07,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [400967539] [2019-12-07 13:39:07,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:07,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:07,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365597785] [2019-12-07 13:39:07,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:07,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:07,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:07,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:07,129 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 13:39:10,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:10,101 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 13:39:10,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:39:10,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:39:10,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:10,497 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 13:39:10,498 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 13:39:10,498 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:15,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 13:39:17,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 13:39:17,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 13:39:18,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 13:39:18,302 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 13:39:18,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:18,302 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 13:39:18,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:18,302 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 13:39:18,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:39:18,307 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:18,307 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:18,307 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:18,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:18,307 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 13:39:18,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:18,308 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245007134] [2019-12-07 13:39:18,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:18,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:18,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:18,352 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245007134] [2019-12-07 13:39:18,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:18,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:18,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357753541] [2019-12-07 13:39:18,353 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:18,353 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:18,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:18,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:18,353 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 3 states. [2019-12-07 13:39:18,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:18,454 INFO L93 Difference]: Finished difference Result 33068 states and 106908 transitions. [2019-12-07 13:39:18,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:18,454 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 13:39:18,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:18,502 INFO L225 Difference]: With dead ends: 33068 [2019-12-07 13:39:18,502 INFO L226 Difference]: Without dead ends: 33068 [2019-12-07 13:39:18,502 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:18,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33068 states. [2019-12-07 13:39:18,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33068 to 33068. [2019-12-07 13:39:18,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33068 states. [2019-12-07 13:39:19,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33068 states to 33068 states and 106908 transitions. [2019-12-07 13:39:19,054 INFO L78 Accepts]: Start accepts. Automaton has 33068 states and 106908 transitions. Word has length 13 [2019-12-07 13:39:19,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:19,055 INFO L462 AbstractCegarLoop]: Abstraction has 33068 states and 106908 transitions. [2019-12-07 13:39:19,055 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:19,055 INFO L276 IsEmpty]: Start isEmpty. Operand 33068 states and 106908 transitions. [2019-12-07 13:39:19,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:39:19,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:19,057 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:19,057 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:19,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:19,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 13:39:19,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:19,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169067500] [2019-12-07 13:39:19,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:19,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:19,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:19,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169067500] [2019-12-07 13:39:19,118 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:19,118 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:19,118 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [935564957] [2019-12-07 13:39:19,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:39:19,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:19,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:39:19,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:19,119 INFO L87 Difference]: Start difference. First operand 33068 states and 106908 transitions. Second operand 5 states. [2019-12-07 13:39:19,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:19,439 INFO L93 Difference]: Finished difference Result 45410 states and 145082 transitions. [2019-12-07 13:39:19,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:39:19,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 13:39:19,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:19,502 INFO L225 Difference]: With dead ends: 45410 [2019-12-07 13:39:19,502 INFO L226 Difference]: Without dead ends: 45410 [2019-12-07 13:39:19,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:19,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45410 states. [2019-12-07 13:39:20,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45410 to 38207. [2019-12-07 13:39:20,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38207 states. [2019-12-07 13:39:20,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38207 states to 38207 states and 123094 transitions. [2019-12-07 13:39:20,189 INFO L78 Accepts]: Start accepts. Automaton has 38207 states and 123094 transitions. Word has length 16 [2019-12-07 13:39:20,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:20,190 INFO L462 AbstractCegarLoop]: Abstraction has 38207 states and 123094 transitions. [2019-12-07 13:39:20,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:39:20,190 INFO L276 IsEmpty]: Start isEmpty. Operand 38207 states and 123094 transitions. [2019-12-07 13:39:20,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:39:20,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:20,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:20,197 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:20,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:20,197 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 13:39:20,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:20,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669991685] [2019-12-07 13:39:20,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:20,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:20,283 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669991685] [2019-12-07 13:39:20,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:20,283 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:39:20,283 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311228485] [2019-12-07 13:39:20,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:39:20,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:20,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:39:20,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:39:20,284 INFO L87 Difference]: Start difference. First operand 38207 states and 123094 transitions. Second operand 6 states. [2019-12-07 13:39:21,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:21,227 INFO L93 Difference]: Finished difference Result 56872 states and 178934 transitions. [2019-12-07 13:39:21,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:39:21,228 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 13:39:21,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:21,314 INFO L225 Difference]: With dead ends: 56872 [2019-12-07 13:39:21,315 INFO L226 Difference]: Without dead ends: 56865 [2019-12-07 13:39:21,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:39:21,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56865 states. [2019-12-07 13:39:22,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56865 to 38602. [2019-12-07 13:39:22,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38602 states. [2019-12-07 13:39:22,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38602 states to 38602 states and 123793 transitions. [2019-12-07 13:39:22,079 INFO L78 Accepts]: Start accepts. Automaton has 38602 states and 123793 transitions. Word has length 22 [2019-12-07 13:39:22,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:22,080 INFO L462 AbstractCegarLoop]: Abstraction has 38602 states and 123793 transitions. [2019-12-07 13:39:22,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:39:22,080 INFO L276 IsEmpty]: Start isEmpty. Operand 38602 states and 123793 transitions. [2019-12-07 13:39:22,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:39:22,088 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:22,088 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:22,088 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:22,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:22,089 INFO L82 PathProgramCache]: Analyzing trace with hash -2132778958, now seen corresponding path program 1 times [2019-12-07 13:39:22,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:22,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114572665] [2019-12-07 13:39:22,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:22,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:22,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:22,222 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114572665] [2019-12-07 13:39:22,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:22,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:39:22,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1852465564] [2019-12-07 13:39:22,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:39:22,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:22,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:39:22,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:22,223 INFO L87 Difference]: Start difference. First operand 38602 states and 123793 transitions. Second operand 7 states. [2019-12-07 13:39:22,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:22,728 INFO L93 Difference]: Finished difference Result 53328 states and 167647 transitions. [2019-12-07 13:39:22,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 13:39:22,728 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 13:39:22,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:22,807 INFO L225 Difference]: With dead ends: 53328 [2019-12-07 13:39:22,807 INFO L226 Difference]: Without dead ends: 53315 [2019-12-07 13:39:22,807 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:39:23,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53315 states. [2019-12-07 13:39:23,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53315 to 45298. [2019-12-07 13:39:23,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45298 states. [2019-12-07 13:39:23,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45298 states to 45298 states and 144584 transitions. [2019-12-07 13:39:23,598 INFO L78 Accepts]: Start accepts. Automaton has 45298 states and 144584 transitions. Word has length 25 [2019-12-07 13:39:23,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:23,598 INFO L462 AbstractCegarLoop]: Abstraction has 45298 states and 144584 transitions. [2019-12-07 13:39:23,598 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:39:23,598 INFO L276 IsEmpty]: Start isEmpty. Operand 45298 states and 144584 transitions. [2019-12-07 13:39:23,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:39:23,611 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:23,611 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:23,611 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:23,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:23,611 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 13:39:23,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:23,611 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025709227] [2019-12-07 13:39:23,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:23,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:23,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:23,672 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025709227] [2019-12-07 13:39:23,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:23,672 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:39:23,672 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545462629] [2019-12-07 13:39:23,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:39:23,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:23,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:39:23,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:39:23,673 INFO L87 Difference]: Start difference. First operand 45298 states and 144584 transitions. Second operand 6 states. [2019-12-07 13:39:24,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:24,182 INFO L93 Difference]: Finished difference Result 65215 states and 203840 transitions. [2019-12-07 13:39:24,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:39:24,182 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:39:24,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:24,397 INFO L225 Difference]: With dead ends: 65215 [2019-12-07 13:39:24,397 INFO L226 Difference]: Without dead ends: 65177 [2019-12-07 13:39:24,397 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:39:24,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65177 states. [2019-12-07 13:39:25,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65177 to 49319. [2019-12-07 13:39:25,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49319 states. [2019-12-07 13:39:25,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49319 states to 49319 states and 157100 transitions. [2019-12-07 13:39:25,278 INFO L78 Accepts]: Start accepts. Automaton has 49319 states and 157100 transitions. Word has length 27 [2019-12-07 13:39:25,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:25,278 INFO L462 AbstractCegarLoop]: Abstraction has 49319 states and 157100 transitions. [2019-12-07 13:39:25,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:39:25,278 INFO L276 IsEmpty]: Start isEmpty. Operand 49319 states and 157100 transitions. [2019-12-07 13:39:25,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:39:25,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:25,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:25,293 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:25,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:25,293 INFO L82 PathProgramCache]: Analyzing trace with hash -565873554, now seen corresponding path program 1 times [2019-12-07 13:39:25,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:25,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464741522] [2019-12-07 13:39:25,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:25,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:25,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:25,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464741522] [2019-12-07 13:39:25,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:25,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:39:25,343 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300003958] [2019-12-07 13:39:25,343 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:39:25,343 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:25,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:39:25,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:25,343 INFO L87 Difference]: Start difference. First operand 49319 states and 157100 transitions. Second operand 5 states. [2019-12-07 13:39:25,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:25,844 INFO L93 Difference]: Finished difference Result 66266 states and 209164 transitions. [2019-12-07 13:39:25,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:39:25,845 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:39:25,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:25,940 INFO L225 Difference]: With dead ends: 66266 [2019-12-07 13:39:25,940 INFO L226 Difference]: Without dead ends: 66266 [2019-12-07 13:39:25,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:39:26,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66266 states. [2019-12-07 13:39:26,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66266 to 58794. [2019-12-07 13:39:26,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58794 states. [2019-12-07 13:39:26,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58794 states to 58794 states and 187137 transitions. [2019-12-07 13:39:26,979 INFO L78 Accepts]: Start accepts. Automaton has 58794 states and 187137 transitions. Word has length 28 [2019-12-07 13:39:26,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:26,980 INFO L462 AbstractCegarLoop]: Abstraction has 58794 states and 187137 transitions. [2019-12-07 13:39:26,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:39:26,980 INFO L276 IsEmpty]: Start isEmpty. Operand 58794 states and 187137 transitions. [2019-12-07 13:39:27,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:39:27,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:27,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:27,004 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:27,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:27,005 INFO L82 PathProgramCache]: Analyzing trace with hash -37429743, now seen corresponding path program 1 times [2019-12-07 13:39:27,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:27,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621306054] [2019-12-07 13:39:27,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:27,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:27,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:27,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621306054] [2019-12-07 13:39:27,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:27,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:27,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2137065065] [2019-12-07 13:39:27,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:27,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:27,049 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:27,049 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:27,049 INFO L87 Difference]: Start difference. First operand 58794 states and 187137 transitions. Second operand 3 states. [2019-12-07 13:39:27,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:27,207 INFO L93 Difference]: Finished difference Result 56660 states and 178928 transitions. [2019-12-07 13:39:27,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:27,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 13:39:27,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:27,401 INFO L225 Difference]: With dead ends: 56660 [2019-12-07 13:39:27,401 INFO L226 Difference]: Without dead ends: 56660 [2019-12-07 13:39:27,401 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:27,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56660 states. [2019-12-07 13:39:28,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56660 to 56108. [2019-12-07 13:39:28,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56108 states. [2019-12-07 13:39:28,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56108 states to 56108 states and 177334 transitions. [2019-12-07 13:39:28,237 INFO L78 Accepts]: Start accepts. Automaton has 56108 states and 177334 transitions. Word has length 29 [2019-12-07 13:39:28,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:28,238 INFO L462 AbstractCegarLoop]: Abstraction has 56108 states and 177334 transitions. [2019-12-07 13:39:28,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:28,238 INFO L276 IsEmpty]: Start isEmpty. Operand 56108 states and 177334 transitions. [2019-12-07 13:39:28,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:39:28,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:28,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:28,259 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:28,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:28,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1575408441, now seen corresponding path program 1 times [2019-12-07 13:39:28,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:28,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796935748] [2019-12-07 13:39:28,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:28,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:28,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:28,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796935748] [2019-12-07 13:39:28,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:28,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:28,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155081649] [2019-12-07 13:39:28,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:28,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:28,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:28,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:28,320 INFO L87 Difference]: Start difference. First operand 56108 states and 177334 transitions. Second operand 4 states. [2019-12-07 13:39:28,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:28,569 INFO L93 Difference]: Finished difference Result 94657 states and 299491 transitions. [2019-12-07 13:39:28,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:39:28,570 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 13:39:28,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:28,690 INFO L225 Difference]: With dead ends: 94657 [2019-12-07 13:39:28,690 INFO L226 Difference]: Without dead ends: 82713 [2019-12-07 13:39:28,690 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:28,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82713 states. [2019-12-07 13:39:29,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82713 to 81851. [2019-12-07 13:39:29,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81851 states. [2019-12-07 13:39:30,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81851 states to 81851 states and 259692 transitions. [2019-12-07 13:39:30,011 INFO L78 Accepts]: Start accepts. Automaton has 81851 states and 259692 transitions. Word has length 29 [2019-12-07 13:39:30,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:30,011 INFO L462 AbstractCegarLoop]: Abstraction has 81851 states and 259692 transitions. [2019-12-07 13:39:30,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:30,011 INFO L276 IsEmpty]: Start isEmpty. Operand 81851 states and 259692 transitions. [2019-12-07 13:39:30,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:39:30,049 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:30,049 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:30,049 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:30,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:30,050 INFO L82 PathProgramCache]: Analyzing trace with hash 2052940803, now seen corresponding path program 1 times [2019-12-07 13:39:30,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:30,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003283666] [2019-12-07 13:39:30,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:30,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:30,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:30,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003283666] [2019-12-07 13:39:30,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:30,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:39:30,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074624589] [2019-12-07 13:39:30,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:39:30,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:30,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:39:30,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:39:30,228 INFO L87 Difference]: Start difference. First operand 81851 states and 259692 transitions. Second operand 8 states. [2019-12-07 13:39:31,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:31,317 INFO L93 Difference]: Finished difference Result 137330 states and 431725 transitions. [2019-12-07 13:39:31,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:39:31,318 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30 [2019-12-07 13:39:31,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:31,490 INFO L225 Difference]: With dead ends: 137330 [2019-12-07 13:39:31,490 INFO L226 Difference]: Without dead ends: 119073 [2019-12-07 13:39:31,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=125, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:39:31,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119073 states. [2019-12-07 13:39:32,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119073 to 86382. [2019-12-07 13:39:32,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86382 states. [2019-12-07 13:39:33,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86382 states to 86382 states and 271403 transitions. [2019-12-07 13:39:33,048 INFO L78 Accepts]: Start accepts. Automaton has 86382 states and 271403 transitions. Word has length 30 [2019-12-07 13:39:33,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:33,048 INFO L462 AbstractCegarLoop]: Abstraction has 86382 states and 271403 transitions. [2019-12-07 13:39:33,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:39:33,049 INFO L276 IsEmpty]: Start isEmpty. Operand 86382 states and 271403 transitions. [2019-12-07 13:39:33,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:39:33,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:33,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:33,081 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:33,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:33,081 INFO L82 PathProgramCache]: Analyzing trace with hash 101231732, now seen corresponding path program 1 times [2019-12-07 13:39:33,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:33,082 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034812396] [2019-12-07 13:39:33,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:33,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:33,118 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:33,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034812396] [2019-12-07 13:39:33,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:33,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:33,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320781602] [2019-12-07 13:39:33,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:33,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:33,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:33,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:33,120 INFO L87 Difference]: Start difference. First operand 86382 states and 271403 transitions. Second operand 4 states. [2019-12-07 13:39:33,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:33,219 INFO L93 Difference]: Finished difference Result 37164 states and 109946 transitions. [2019-12-07 13:39:33,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:39:33,219 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:39:33,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:33,263 INFO L225 Difference]: With dead ends: 37164 [2019-12-07 13:39:33,264 INFO L226 Difference]: Without dead ends: 37164 [2019-12-07 13:39:33,264 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:33,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37164 states. [2019-12-07 13:39:33,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37164 to 33241. [2019-12-07 13:39:33,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33241 states. [2019-12-07 13:39:33,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33241 states to 33241 states and 98376 transitions. [2019-12-07 13:39:33,748 INFO L78 Accepts]: Start accepts. Automaton has 33241 states and 98376 transitions. Word has length 30 [2019-12-07 13:39:33,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:33,748 INFO L462 AbstractCegarLoop]: Abstraction has 33241 states and 98376 transitions. [2019-12-07 13:39:33,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:33,748 INFO L276 IsEmpty]: Start isEmpty. Operand 33241 states and 98376 transitions. [2019-12-07 13:39:33,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:39:33,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:33,770 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:33,770 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:33,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:33,770 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 13:39:33,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:33,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006339338] [2019-12-07 13:39:33,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:33,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:33,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:33,854 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006339338] [2019-12-07 13:39:33,854 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:33,854 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:39:33,855 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380564049] [2019-12-07 13:39:33,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:39:33,855 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:33,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:39:33,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:33,855 INFO L87 Difference]: Start difference. First operand 33241 states and 98376 transitions. Second operand 7 states. [2019-12-07 13:39:34,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:34,517 INFO L93 Difference]: Finished difference Result 42638 states and 123146 transitions. [2019-12-07 13:39:34,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:39:34,517 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:39:34,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:34,563 INFO L225 Difference]: With dead ends: 42638 [2019-12-07 13:39:34,563 INFO L226 Difference]: Without dead ends: 42638 [2019-12-07 13:39:34,563 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:39:34,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42638 states. [2019-12-07 13:39:35,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42638 to 32425. [2019-12-07 13:39:35,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32425 states. [2019-12-07 13:39:35,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32425 states to 32425 states and 95932 transitions. [2019-12-07 13:39:35,129 INFO L78 Accepts]: Start accepts. Automaton has 32425 states and 95932 transitions. Word has length 33 [2019-12-07 13:39:35,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:35,129 INFO L462 AbstractCegarLoop]: Abstraction has 32425 states and 95932 transitions. [2019-12-07 13:39:35,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:39:35,129 INFO L276 IsEmpty]: Start isEmpty. Operand 32425 states and 95932 transitions. [2019-12-07 13:39:35,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:39:35,156 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:35,156 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:35,156 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:35,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:35,157 INFO L82 PathProgramCache]: Analyzing trace with hash 1793029753, now seen corresponding path program 1 times [2019-12-07 13:39:35,157 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:35,157 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291690533] [2019-12-07 13:39:35,157 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:35,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:35,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:35,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291690533] [2019-12-07 13:39:35,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:35,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:35,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874292972] [2019-12-07 13:39:35,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:35,205 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:35,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:35,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:35,205 INFO L87 Difference]: Start difference. First operand 32425 states and 95932 transitions. Second operand 3 states. [2019-12-07 13:39:35,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:35,289 INFO L93 Difference]: Finished difference Result 32425 states and 95838 transitions. [2019-12-07 13:39:35,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:35,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 13:39:35,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:35,334 INFO L225 Difference]: With dead ends: 32425 [2019-12-07 13:39:35,334 INFO L226 Difference]: Without dead ends: 32425 [2019-12-07 13:39:35,335 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:35,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32425 states. [2019-12-07 13:39:35,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32425 to 28501. [2019-12-07 13:39:35,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28501 states. [2019-12-07 13:39:35,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28501 states to 28501 states and 85152 transitions. [2019-12-07 13:39:35,775 INFO L78 Accepts]: Start accepts. Automaton has 28501 states and 85152 transitions. Word has length 41 [2019-12-07 13:39:35,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:35,775 INFO L462 AbstractCegarLoop]: Abstraction has 28501 states and 85152 transitions. [2019-12-07 13:39:35,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:35,775 INFO L276 IsEmpty]: Start isEmpty. Operand 28501 states and 85152 transitions. [2019-12-07 13:39:35,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 13:39:35,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:35,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:35,802 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:35,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:35,802 INFO L82 PathProgramCache]: Analyzing trace with hash -2107392736, now seen corresponding path program 1 times [2019-12-07 13:39:35,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:35,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707634166] [2019-12-07 13:39:35,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:35,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:35,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:35,872 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707634166] [2019-12-07 13:39:35,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:35,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:39:35,872 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1699164577] [2019-12-07 13:39:35,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:39:35,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:35,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:39:35,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:35,873 INFO L87 Difference]: Start difference. First operand 28501 states and 85152 transitions. Second operand 5 states. [2019-12-07 13:39:36,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:36,008 INFO L93 Difference]: Finished difference Result 47235 states and 142796 transitions. [2019-12-07 13:39:36,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:39:36,009 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 13:39:36,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:36,032 INFO L225 Difference]: With dead ends: 47235 [2019-12-07 13:39:36,032 INFO L226 Difference]: Without dead ends: 21597 [2019-12-07 13:39:36,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:36,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21597 states. [2019-12-07 13:39:36,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21597 to 20656. [2019-12-07 13:39:36,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20656 states. [2019-12-07 13:39:36,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20656 states to 20656 states and 61993 transitions. [2019-12-07 13:39:36,316 INFO L78 Accepts]: Start accepts. Automaton has 20656 states and 61993 transitions. Word has length 42 [2019-12-07 13:39:36,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:36,316 INFO L462 AbstractCegarLoop]: Abstraction has 20656 states and 61993 transitions. [2019-12-07 13:39:36,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:39:36,317 INFO L276 IsEmpty]: Start isEmpty. Operand 20656 states and 61993 transitions. [2019-12-07 13:39:36,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 13:39:36,334 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:36,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:36,334 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:36,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:36,334 INFO L82 PathProgramCache]: Analyzing trace with hash 1991608764, now seen corresponding path program 2 times [2019-12-07 13:39:36,334 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:36,334 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172926107] [2019-12-07 13:39:36,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:36,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:36,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:36,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172926107] [2019-12-07 13:39:36,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:36,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:39:36,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68852935] [2019-12-07 13:39:36,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:39:36,376 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:36,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:39:36,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:36,376 INFO L87 Difference]: Start difference. First operand 20656 states and 61993 transitions. Second operand 5 states. [2019-12-07 13:39:36,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:36,445 INFO L93 Difference]: Finished difference Result 19246 states and 58876 transitions. [2019-12-07 13:39:36,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:39:36,445 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 13:39:36,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:36,468 INFO L225 Difference]: With dead ends: 19246 [2019-12-07 13:39:36,468 INFO L226 Difference]: Without dead ends: 17343 [2019-12-07 13:39:36,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:36,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17343 states. [2019-12-07 13:39:36,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17343 to 11586. [2019-12-07 13:39:36,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11586 states. [2019-12-07 13:39:36,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11586 states to 11586 states and 35940 transitions. [2019-12-07 13:39:36,671 INFO L78 Accepts]: Start accepts. Automaton has 11586 states and 35940 transitions. Word has length 42 [2019-12-07 13:39:36,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:36,671 INFO L462 AbstractCegarLoop]: Abstraction has 11586 states and 35940 transitions. [2019-12-07 13:39:36,671 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:39:36,671 INFO L276 IsEmpty]: Start isEmpty. Operand 11586 states and 35940 transitions. [2019-12-07 13:39:36,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:36,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:36,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:36,681 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:36,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:36,681 INFO L82 PathProgramCache]: Analyzing trace with hash 489675312, now seen corresponding path program 1 times [2019-12-07 13:39:36,681 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:36,681 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97829521] [2019-12-07 13:39:36,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:36,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:36,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:36,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97829521] [2019-12-07 13:39:36,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:36,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:36,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086850338] [2019-12-07 13:39:36,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:36,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:36,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:36,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:36,705 INFO L87 Difference]: Start difference. First operand 11586 states and 35940 transitions. Second operand 3 states. [2019-12-07 13:39:36,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:36,764 INFO L93 Difference]: Finished difference Result 16810 states and 51422 transitions. [2019-12-07 13:39:36,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:36,765 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:39:36,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:36,782 INFO L225 Difference]: With dead ends: 16810 [2019-12-07 13:39:36,782 INFO L226 Difference]: Without dead ends: 16810 [2019-12-07 13:39:36,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:36,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16810 states. [2019-12-07 13:39:36,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16810 to 13351. [2019-12-07 13:39:36,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13351 states. [2019-12-07 13:39:36,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13351 states to 13351 states and 41038 transitions. [2019-12-07 13:39:36,997 INFO L78 Accepts]: Start accepts. Automaton has 13351 states and 41038 transitions. Word has length 66 [2019-12-07 13:39:36,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:36,997 INFO L462 AbstractCegarLoop]: Abstraction has 13351 states and 41038 transitions. [2019-12-07 13:39:36,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:36,997 INFO L276 IsEmpty]: Start isEmpty. Operand 13351 states and 41038 transitions. [2019-12-07 13:39:37,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:37,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:37,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:37,009 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:37,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:37,010 INFO L82 PathProgramCache]: Analyzing trace with hash -926860960, now seen corresponding path program 1 times [2019-12-07 13:39:37,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:37,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [116316938] [2019-12-07 13:39:37,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:37,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:37,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:37,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [116316938] [2019-12-07 13:39:37,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:37,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:39:37,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015048952] [2019-12-07 13:39:37,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:39:37,097 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:37,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:39:37,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:39:37,097 INFO L87 Difference]: Start difference. First operand 13351 states and 41038 transitions. Second operand 8 states. [2019-12-07 13:39:37,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:37,728 INFO L93 Difference]: Finished difference Result 21091 states and 63561 transitions. [2019-12-07 13:39:37,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:39:37,729 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 13:39:37,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:37,749 INFO L225 Difference]: With dead ends: 21091 [2019-12-07 13:39:37,749 INFO L226 Difference]: Without dead ends: 21091 [2019-12-07 13:39:37,750 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:39:37,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21091 states. [2019-12-07 13:39:37,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21091 to 14311. [2019-12-07 13:39:37,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14311 states. [2019-12-07 13:39:38,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14311 states to 14311 states and 43954 transitions. [2019-12-07 13:39:38,001 INFO L78 Accepts]: Start accepts. Automaton has 14311 states and 43954 transitions. Word has length 66 [2019-12-07 13:39:38,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:38,001 INFO L462 AbstractCegarLoop]: Abstraction has 14311 states and 43954 transitions. [2019-12-07 13:39:38,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:39:38,001 INFO L276 IsEmpty]: Start isEmpty. Operand 14311 states and 43954 transitions. [2019-12-07 13:39:38,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:38,014 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:38,014 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:38,014 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:38,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:38,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1192128352, now seen corresponding path program 2 times [2019-12-07 13:39:38,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:38,015 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515286437] [2019-12-07 13:39:38,015 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:38,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:38,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:38,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515286437] [2019-12-07 13:39:38,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:38,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:38,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601032784] [2019-12-07 13:39:38,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:38,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:38,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:38,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:38,090 INFO L87 Difference]: Start difference. First operand 14311 states and 43954 transitions. Second operand 4 states. [2019-12-07 13:39:38,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:38,155 INFO L93 Difference]: Finished difference Result 24890 states and 76738 transitions. [2019-12-07 13:39:38,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:39:38,155 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 13:39:38,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:38,167 INFO L225 Difference]: With dead ends: 24890 [2019-12-07 13:39:38,167 INFO L226 Difference]: Without dead ends: 11532 [2019-12-07 13:39:38,167 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:38,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11532 states. [2019-12-07 13:39:38,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11532 to 11532. [2019-12-07 13:39:38,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11532 states. [2019-12-07 13:39:38,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11532 states to 11532 states and 35449 transitions. [2019-12-07 13:39:38,330 INFO L78 Accepts]: Start accepts. Automaton has 11532 states and 35449 transitions. Word has length 66 [2019-12-07 13:39:38,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:38,330 INFO L462 AbstractCegarLoop]: Abstraction has 11532 states and 35449 transitions. [2019-12-07 13:39:38,330 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:38,330 INFO L276 IsEmpty]: Start isEmpty. Operand 11532 states and 35449 transitions. [2019-12-07 13:39:38,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:38,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:38,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:38,339 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:38,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:38,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1338482558, now seen corresponding path program 3 times [2019-12-07 13:39:38,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:38,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46597552] [2019-12-07 13:39:38,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:38,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:38,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:38,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46597552] [2019-12-07 13:39:38,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:38,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:39:38,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050941341] [2019-12-07 13:39:38,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:39:38,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:38,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:39:38,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:39:38,440 INFO L87 Difference]: Start difference. First operand 11532 states and 35449 transitions. Second operand 10 states. [2019-12-07 13:39:39,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:39,367 INFO L93 Difference]: Finished difference Result 18551 states and 55837 transitions. [2019-12-07 13:39:39,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:39:39,367 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 13:39:39,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:39,385 INFO L225 Difference]: With dead ends: 18551 [2019-12-07 13:39:39,386 INFO L226 Difference]: Without dead ends: 18551 [2019-12-07 13:39:39,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=202, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:39:39,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18551 states. [2019-12-07 13:39:39,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18551 to 12232. [2019-12-07 13:39:39,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12232 states. [2019-12-07 13:39:39,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12232 states to 12232 states and 37516 transitions. [2019-12-07 13:39:39,593 INFO L78 Accepts]: Start accepts. Automaton has 12232 states and 37516 transitions. Word has length 66 [2019-12-07 13:39:39,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:39,594 INFO L462 AbstractCegarLoop]: Abstraction has 12232 states and 37516 transitions. [2019-12-07 13:39:39,594 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:39:39,594 INFO L276 IsEmpty]: Start isEmpty. Operand 12232 states and 37516 transitions. [2019-12-07 13:39:39,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:39,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:39,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:39,603 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:39,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:39,603 INFO L82 PathProgramCache]: Analyzing trace with hash 495282550, now seen corresponding path program 4 times [2019-12-07 13:39:39,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:39,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304153683] [2019-12-07 13:39:39,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:39,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:39,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:39,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304153683] [2019-12-07 13:39:39,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:39,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:39:39,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726689965] [2019-12-07 13:39:39,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:39:39,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:39,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:39:39,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:39,669 INFO L87 Difference]: Start difference. First operand 12232 states and 37516 transitions. Second operand 7 states. [2019-12-07 13:39:40,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:40,141 INFO L93 Difference]: Finished difference Result 18803 states and 56238 transitions. [2019-12-07 13:39:40,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:39:40,142 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 13:39:40,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:40,162 INFO L225 Difference]: With dead ends: 18803 [2019-12-07 13:39:40,162 INFO L226 Difference]: Without dead ends: 18803 [2019-12-07 13:39:40,163 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:39:40,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18803 states. [2019-12-07 13:39:40,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18803 to 12552. [2019-12-07 13:39:40,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12552 states. [2019-12-07 13:39:40,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12552 states to 12552 states and 38273 transitions. [2019-12-07 13:39:40,376 INFO L78 Accepts]: Start accepts. Automaton has 12552 states and 38273 transitions. Word has length 66 [2019-12-07 13:39:40,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:40,376 INFO L462 AbstractCegarLoop]: Abstraction has 12552 states and 38273 transitions. [2019-12-07 13:39:40,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:39:40,376 INFO L276 IsEmpty]: Start isEmpty. Operand 12552 states and 38273 transitions. [2019-12-07 13:39:40,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:40,387 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:40,387 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:40,387 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:40,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:40,388 INFO L82 PathProgramCache]: Analyzing trace with hash -1172625196, now seen corresponding path program 5 times [2019-12-07 13:39:40,388 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:40,388 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432006891] [2019-12-07 13:39:40,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:40,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:40,512 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:40,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432006891] [2019-12-07 13:39:40,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:40,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:39:40,512 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069516280] [2019-12-07 13:39:40,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:39:40,513 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:40,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:39:40,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:39:40,513 INFO L87 Difference]: Start difference. First operand 12552 states and 38273 transitions. Second operand 11 states. [2019-12-07 13:39:41,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:41,512 INFO L93 Difference]: Finished difference Result 19000 states and 56657 transitions. [2019-12-07 13:39:41,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:39:41,513 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:39:41,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:41,541 INFO L225 Difference]: With dead ends: 19000 [2019-12-07 13:39:41,541 INFO L226 Difference]: Without dead ends: 19000 [2019-12-07 13:39:41,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=230, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:39:41,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19000 states. [2019-12-07 13:39:41,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19000 to 12600. [2019-12-07 13:39:41,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12600 states. [2019-12-07 13:39:41,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12600 states to 12600 states and 38409 transitions. [2019-12-07 13:39:41,767 INFO L78 Accepts]: Start accepts. Automaton has 12600 states and 38409 transitions. Word has length 66 [2019-12-07 13:39:41,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:41,767 INFO L462 AbstractCegarLoop]: Abstraction has 12600 states and 38409 transitions. [2019-12-07 13:39:41,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:39:41,767 INFO L276 IsEmpty]: Start isEmpty. Operand 12600 states and 38409 transitions. [2019-12-07 13:39:41,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:41,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:41,779 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:41,779 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:41,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:41,779 INFO L82 PathProgramCache]: Analyzing trace with hash 495228780, now seen corresponding path program 1 times [2019-12-07 13:39:41,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:41,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447853339] [2019-12-07 13:39:41,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:41,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:41,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:41,810 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447853339] [2019-12-07 13:39:41,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:41,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:41,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376417099] [2019-12-07 13:39:41,811 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:41,811 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:41,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:41,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:41,811 INFO L87 Difference]: Start difference. First operand 12600 states and 38409 transitions. Second operand 3 states. [2019-12-07 13:39:41,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:41,880 INFO L93 Difference]: Finished difference Result 15713 states and 47322 transitions. [2019-12-07 13:39:41,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:41,880 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:39:41,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:41,900 INFO L225 Difference]: With dead ends: 15713 [2019-12-07 13:39:41,900 INFO L226 Difference]: Without dead ends: 15713 [2019-12-07 13:39:41,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:41,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15713 states. [2019-12-07 13:39:42,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15713 to 13244. [2019-12-07 13:39:42,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13244 states. [2019-12-07 13:39:42,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13244 states to 13244 states and 39843 transitions. [2019-12-07 13:39:42,105 INFO L78 Accepts]: Start accepts. Automaton has 13244 states and 39843 transitions. Word has length 66 [2019-12-07 13:39:42,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:42,105 INFO L462 AbstractCegarLoop]: Abstraction has 13244 states and 39843 transitions. [2019-12-07 13:39:42,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:42,105 INFO L276 IsEmpty]: Start isEmpty. Operand 13244 states and 39843 transitions. [2019-12-07 13:39:42,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:42,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:42,117 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:42,117 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:42,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:42,118 INFO L82 PathProgramCache]: Analyzing trace with hash -172996908, now seen corresponding path program 6 times [2019-12-07 13:39:42,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:42,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473939772] [2019-12-07 13:39:42,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:42,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:42,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:42,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [473939772] [2019-12-07 13:39:42,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:42,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:39:42,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [700257885] [2019-12-07 13:39:42,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:39:42,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:42,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:39:42,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:39:42,229 INFO L87 Difference]: Start difference. First operand 13244 states and 39843 transitions. Second operand 11 states. [2019-12-07 13:39:43,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:43,388 INFO L93 Difference]: Finished difference Result 20400 states and 59937 transitions. [2019-12-07 13:39:43,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 13:39:43,388 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:39:43,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:43,407 INFO L225 Difference]: With dead ends: 20400 [2019-12-07 13:39:43,407 INFO L226 Difference]: Without dead ends: 20400 [2019-12-07 13:39:43,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=322, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:39:43,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20400 states. [2019-12-07 13:39:43,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20400 to 12428. [2019-12-07 13:39:43,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12428 states. [2019-12-07 13:39:43,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12428 states to 12428 states and 37585 transitions. [2019-12-07 13:39:43,640 INFO L78 Accepts]: Start accepts. Automaton has 12428 states and 37585 transitions. Word has length 66 [2019-12-07 13:39:43,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:43,640 INFO L462 AbstractCegarLoop]: Abstraction has 12428 states and 37585 transitions. [2019-12-07 13:39:43,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:39:43,640 INFO L276 IsEmpty]: Start isEmpty. Operand 12428 states and 37585 transitions. [2019-12-07 13:39:43,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:39:43,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:43,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:43,651 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:43,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:43,652 INFO L82 PathProgramCache]: Analyzing trace with hash 1285396684, now seen corresponding path program 7 times [2019-12-07 13:39:43,652 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:43,652 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1511156228] [2019-12-07 13:39:43,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:43,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:43,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:43,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1511156228] [2019-12-07 13:39:43,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:43,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:43,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [674323431] [2019-12-07 13:39:43,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:43,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:43,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:43,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:43,698 INFO L87 Difference]: Start difference. First operand 12428 states and 37585 transitions. Second operand 3 states. [2019-12-07 13:39:43,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:43,756 INFO L93 Difference]: Finished difference Result 14453 states and 43741 transitions. [2019-12-07 13:39:43,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:43,756 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:39:43,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:43,770 INFO L225 Difference]: With dead ends: 14453 [2019-12-07 13:39:43,770 INFO L226 Difference]: Without dead ends: 14453 [2019-12-07 13:39:43,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:43,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14453 states. [2019-12-07 13:39:43,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14453 to 11495. [2019-12-07 13:39:43,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11495 states. [2019-12-07 13:39:43,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11495 states to 11495 states and 35088 transitions. [2019-12-07 13:39:43,952 INFO L78 Accepts]: Start accepts. Automaton has 11495 states and 35088 transitions. Word has length 66 [2019-12-07 13:39:43,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:43,953 INFO L462 AbstractCegarLoop]: Abstraction has 11495 states and 35088 transitions. [2019-12-07 13:39:43,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:43,953 INFO L276 IsEmpty]: Start isEmpty. Operand 11495 states and 35088 transitions. [2019-12-07 13:39:43,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:39:43,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:43,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:43,962 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:43,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:43,963 INFO L82 PathProgramCache]: Analyzing trace with hash -171582022, now seen corresponding path program 1 times [2019-12-07 13:39:43,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:43,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530837575] [2019-12-07 13:39:43,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:43,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:44,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:44,145 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530837575] [2019-12-07 13:39:44,145 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:44,145 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:39:44,146 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136260110] [2019-12-07 13:39:44,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:39:44,146 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:44,146 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:39:44,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:39:44,146 INFO L87 Difference]: Start difference. First operand 11495 states and 35088 transitions. Second operand 10 states. [2019-12-07 13:39:45,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:45,470 INFO L93 Difference]: Finished difference Result 22955 states and 68773 transitions. [2019-12-07 13:39:45,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:39:45,471 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 13:39:45,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:45,497 INFO L225 Difference]: With dead ends: 22955 [2019-12-07 13:39:45,497 INFO L226 Difference]: Without dead ends: 15810 [2019-12-07 13:39:45,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:39:45,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15810 states. [2019-12-07 13:39:45,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15810 to 13347. [2019-12-07 13:39:45,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13347 states. [2019-12-07 13:39:45,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13347 states to 13347 states and 39903 transitions. [2019-12-07 13:39:45,714 INFO L78 Accepts]: Start accepts. Automaton has 13347 states and 39903 transitions. Word has length 67 [2019-12-07 13:39:45,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:45,714 INFO L462 AbstractCegarLoop]: Abstraction has 13347 states and 39903 transitions. [2019-12-07 13:39:45,714 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:39:45,714 INFO L276 IsEmpty]: Start isEmpty. Operand 13347 states and 39903 transitions. [2019-12-07 13:39:45,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:39:45,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:45,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:45,727 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:45,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:45,727 INFO L82 PathProgramCache]: Analyzing trace with hash -2091967768, now seen corresponding path program 2 times [2019-12-07 13:39:45,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:45,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802409709] [2019-12-07 13:39:45,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:45,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:45,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:45,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802409709] [2019-12-07 13:39:45,922 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:45,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:39:45,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750598692] [2019-12-07 13:39:45,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:39:45,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:45,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:39:45,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:39:45,923 INFO L87 Difference]: Start difference. First operand 13347 states and 39903 transitions. Second operand 13 states. [2019-12-07 13:39:48,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:48,636 INFO L93 Difference]: Finished difference Result 22320 states and 65037 transitions. [2019-12-07 13:39:48,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 13:39:48,637 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 13:39:48,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:48,662 INFO L225 Difference]: With dead ends: 22320 [2019-12-07 13:39:48,662 INFO L226 Difference]: Without dead ends: 16669 [2019-12-07 13:39:48,663 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=242, Invalid=1018, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 13:39:48,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16669 states. [2019-12-07 13:39:48,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16669 to 13690. [2019-12-07 13:39:48,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13690 states. [2019-12-07 13:39:48,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13690 states to 13690 states and 40784 transitions. [2019-12-07 13:39:48,875 INFO L78 Accepts]: Start accepts. Automaton has 13690 states and 40784 transitions. Word has length 67 [2019-12-07 13:39:48,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:48,875 INFO L462 AbstractCegarLoop]: Abstraction has 13690 states and 40784 transitions. [2019-12-07 13:39:48,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:39:48,875 INFO L276 IsEmpty]: Start isEmpty. Operand 13690 states and 40784 transitions. [2019-12-07 13:39:48,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:39:48,888 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:48,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:48,888 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:48,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:48,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1426580862, now seen corresponding path program 3 times [2019-12-07 13:39:48,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:48,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956247070] [2019-12-07 13:39:48,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:48,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:48,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:48,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956247070] [2019-12-07 13:39:48,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:48,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:39:48,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202105818] [2019-12-07 13:39:48,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:39:48,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:48,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:39:48,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:39:48,958 INFO L87 Difference]: Start difference. First operand 13690 states and 40784 transitions. Second operand 7 states. [2019-12-07 13:39:49,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:49,190 INFO L93 Difference]: Finished difference Result 24039 states and 70782 transitions. [2019-12-07 13:39:49,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 13:39:49,191 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 13:39:49,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:49,206 INFO L225 Difference]: With dead ends: 24039 [2019-12-07 13:39:49,206 INFO L226 Difference]: Without dead ends: 17464 [2019-12-07 13:39:49,206 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:39:49,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17464 states. [2019-12-07 13:39:49,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17464 to 14084. [2019-12-07 13:39:49,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14084 states. [2019-12-07 13:39:49,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14084 states to 14084 states and 41847 transitions. [2019-12-07 13:39:49,420 INFO L78 Accepts]: Start accepts. Automaton has 14084 states and 41847 transitions. Word has length 67 [2019-12-07 13:39:49,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:49,420 INFO L462 AbstractCegarLoop]: Abstraction has 14084 states and 41847 transitions. [2019-12-07 13:39:49,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:39:49,420 INFO L276 IsEmpty]: Start isEmpty. Operand 14084 states and 41847 transitions. [2019-12-07 13:39:49,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:39:49,432 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:49,432 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:49,432 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:49,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:49,433 INFO L82 PathProgramCache]: Analyzing trace with hash 1425975690, now seen corresponding path program 4 times [2019-12-07 13:39:49,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:49,433 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546929513] [2019-12-07 13:39:49,433 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:49,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:49,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:49,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546929513] [2019-12-07 13:39:49,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:49,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:39:49,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1767328862] [2019-12-07 13:39:49,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:39:49,613 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:49,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:39:49,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:39:49,613 INFO L87 Difference]: Start difference. First operand 14084 states and 41847 transitions. Second operand 11 states. [2019-12-07 13:39:50,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:50,211 INFO L93 Difference]: Finished difference Result 22155 states and 65231 transitions. [2019-12-07 13:39:50,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:39:50,212 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:39:50,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:50,227 INFO L225 Difference]: With dead ends: 22155 [2019-12-07 13:39:50,228 INFO L226 Difference]: Without dead ends: 16649 [2019-12-07 13:39:50,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:39:50,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16649 states. [2019-12-07 13:39:50,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16649 to 13819. [2019-12-07 13:39:50,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13819 states. [2019-12-07 13:39:50,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13819 states to 13819 states and 41003 transitions. [2019-12-07 13:39:50,441 INFO L78 Accepts]: Start accepts. Automaton has 13819 states and 41003 transitions. Word has length 67 [2019-12-07 13:39:50,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:50,441 INFO L462 AbstractCegarLoop]: Abstraction has 13819 states and 41003 transitions. [2019-12-07 13:39:50,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:39:50,441 INFO L276 IsEmpty]: Start isEmpty. Operand 13819 states and 41003 transitions. [2019-12-07 13:39:50,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:39:50,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:50,453 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:50,453 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:50,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:50,453 INFO L82 PathProgramCache]: Analyzing trace with hash 1279627604, now seen corresponding path program 5 times [2019-12-07 13:39:50,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:50,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097156218] [2019-12-07 13:39:50,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:50,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:51,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:51,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097156218] [2019-12-07 13:39:51,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:51,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2019-12-07 13:39:51,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653993718] [2019-12-07 13:39:51,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-07 13:39:51,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:51,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 13:39:51,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=667, Unknown=0, NotChecked=0, Total=756 [2019-12-07 13:39:51,885 INFO L87 Difference]: Start difference. First operand 13819 states and 41003 transitions. Second operand 28 states. [2019-12-07 13:39:55,209 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 32 [2019-12-07 13:40:01,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:01,717 INFO L93 Difference]: Finished difference Result 21099 states and 60802 transitions. [2019-12-07 13:40:01,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2019-12-07 13:40:01,717 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2019-12-07 13:40:01,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:01,735 INFO L225 Difference]: With dead ends: 21099 [2019-12-07 13:40:01,735 INFO L226 Difference]: Without dead ends: 19109 [2019-12-07 13:40:01,738 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 1 SyntacticMatches, 7 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2000 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=833, Invalid=6823, Unknown=0, NotChecked=0, Total=7656 [2019-12-07 13:40:01,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19109 states. [2019-12-07 13:40:01,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19109 to 13488. [2019-12-07 13:40:01,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13488 states. [2019-12-07 13:40:01,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13488 states to 13488 states and 39764 transitions. [2019-12-07 13:40:01,967 INFO L78 Accepts]: Start accepts. Automaton has 13488 states and 39764 transitions. Word has length 67 [2019-12-07 13:40:01,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:01,967 INFO L462 AbstractCegarLoop]: Abstraction has 13488 states and 39764 transitions. [2019-12-07 13:40:01,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-07 13:40:01,967 INFO L276 IsEmpty]: Start isEmpty. Operand 13488 states and 39764 transitions. [2019-12-07 13:40:01,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:01,979 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:01,979 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:01,979 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:01,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:01,980 INFO L82 PathProgramCache]: Analyzing trace with hash -2101169158, now seen corresponding path program 6 times [2019-12-07 13:40:01,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:01,980 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704327506] [2019-12-07 13:40:01,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:01,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:02,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:02,111 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704327506] [2019-12-07 13:40:02,111 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:02,111 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:40:02,112 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361230806] [2019-12-07 13:40:02,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:40:02,112 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:02,112 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:40:02,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:40:02,112 INFO L87 Difference]: Start difference. First operand 13488 states and 39764 transitions. Second operand 11 states. [2019-12-07 13:40:02,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:02,953 INFO L93 Difference]: Finished difference Result 20956 states and 60528 transitions. [2019-12-07 13:40:02,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 13:40:02,953 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 13:40:02,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:02,971 INFO L225 Difference]: With dead ends: 20956 [2019-12-07 13:40:02,972 INFO L226 Difference]: Without dead ends: 17629 [2019-12-07 13:40:02,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=96, Invalid=366, Unknown=0, NotChecked=0, Total=462 [2019-12-07 13:40:03,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17629 states. [2019-12-07 13:40:03,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17629 to 13623. [2019-12-07 13:40:03,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13623 states. [2019-12-07 13:40:03,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13623 states to 13623 states and 40015 transitions. [2019-12-07 13:40:03,216 INFO L78 Accepts]: Start accepts. Automaton has 13623 states and 40015 transitions. Word has length 67 [2019-12-07 13:40:03,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:03,247 INFO L462 AbstractCegarLoop]: Abstraction has 13623 states and 40015 transitions. [2019-12-07 13:40:03,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:40:03,247 INFO L276 IsEmpty]: Start isEmpty. Operand 13623 states and 40015 transitions. [2019-12-07 13:40:03,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:03,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:03,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:03,258 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:03,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:03,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1642000384, now seen corresponding path program 7 times [2019-12-07 13:40:03,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:03,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797191954] [2019-12-07 13:40:03,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:03,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:03,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:03,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797191954] [2019-12-07 13:40:03,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:03,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:40:03,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561263693] [2019-12-07 13:40:03,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:40:03,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:03,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:40:03,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:40:03,416 INFO L87 Difference]: Start difference. First operand 13623 states and 40015 transitions. Second operand 12 states. [2019-12-07 13:40:04,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:04,047 INFO L93 Difference]: Finished difference Result 18716 states and 54171 transitions. [2019-12-07 13:40:04,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:40:04,047 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 13:40:04,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:04,063 INFO L225 Difference]: With dead ends: 18716 [2019-12-07 13:40:04,063 INFO L226 Difference]: Without dead ends: 16589 [2019-12-07 13:40:04,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:40:04,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16589 states. [2019-12-07 13:40:04,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16589 to 13638. [2019-12-07 13:40:04,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13638 states. [2019-12-07 13:40:04,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13638 states to 13638 states and 40047 transitions. [2019-12-07 13:40:04,273 INFO L78 Accepts]: Start accepts. Automaton has 13638 states and 40047 transitions. Word has length 67 [2019-12-07 13:40:04,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:04,273 INFO L462 AbstractCegarLoop]: Abstraction has 13638 states and 40047 transitions. [2019-12-07 13:40:04,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:40:04,273 INFO L276 IsEmpty]: Start isEmpty. Operand 13638 states and 40047 transitions. [2019-12-07 13:40:04,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:04,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:04,285 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:04,285 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:04,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:04,285 INFO L82 PathProgramCache]: Analyzing trace with hash 57333696, now seen corresponding path program 8 times [2019-12-07 13:40:04,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:04,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [620967852] [2019-12-07 13:40:04,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:04,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:04,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:04,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [620967852] [2019-12-07 13:40:04,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:04,769 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 13:40:04,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194442859] [2019-12-07 13:40:04,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 13:40:04,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:04,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 13:40:04,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:40:04,770 INFO L87 Difference]: Start difference. First operand 13638 states and 40047 transitions. Second operand 21 states. [2019-12-07 13:40:08,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:08,207 INFO L93 Difference]: Finished difference Result 21350 states and 61321 transitions. [2019-12-07 13:40:08,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 13:40:08,207 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 13:40:08,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:08,225 INFO L225 Difference]: With dead ends: 21350 [2019-12-07 13:40:08,225 INFO L226 Difference]: Without dead ends: 18345 [2019-12-07 13:40:08,226 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1168 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=528, Invalid=3632, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 13:40:08,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18345 states. [2019-12-07 13:40:08,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18345 to 13919. [2019-12-07 13:40:08,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13919 states. [2019-12-07 13:40:08,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13919 states to 13919 states and 40696 transitions. [2019-12-07 13:40:08,447 INFO L78 Accepts]: Start accepts. Automaton has 13919 states and 40696 transitions. Word has length 67 [2019-12-07 13:40:08,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:08,448 INFO L462 AbstractCegarLoop]: Abstraction has 13919 states and 40696 transitions. [2019-12-07 13:40:08,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 13:40:08,448 INFO L276 IsEmpty]: Start isEmpty. Operand 13919 states and 40696 transitions. [2019-12-07 13:40:08,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:08,460 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:08,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:08,460 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:08,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:08,460 INFO L82 PathProgramCache]: Analyzing trace with hash 319869012, now seen corresponding path program 9 times [2019-12-07 13:40:08,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:08,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1963127273] [2019-12-07 13:40:08,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:08,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:09,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:09,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1963127273] [2019-12-07 13:40:09,207 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:09,207 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 13:40:09,207 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772768747] [2019-12-07 13:40:09,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 13:40:09,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:09,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 13:40:09,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:40:09,208 INFO L87 Difference]: Start difference. First operand 13919 states and 40696 transitions. Second operand 21 states. [2019-12-07 13:40:11,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:11,266 INFO L93 Difference]: Finished difference Result 21866 states and 62305 transitions. [2019-12-07 13:40:11,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 13:40:11,266 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 13:40:11,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:11,284 INFO L225 Difference]: With dead ends: 21866 [2019-12-07 13:40:11,284 INFO L226 Difference]: Without dead ends: 19303 [2019-12-07 13:40:11,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 456 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=291, Invalid=1601, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 13:40:11,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19303 states. [2019-12-07 13:40:11,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19303 to 14178. [2019-12-07 13:40:11,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14178 states. [2019-12-07 13:40:11,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14178 states to 14178 states and 41343 transitions. [2019-12-07 13:40:11,511 INFO L78 Accepts]: Start accepts. Automaton has 14178 states and 41343 transitions. Word has length 67 [2019-12-07 13:40:11,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:11,511 INFO L462 AbstractCegarLoop]: Abstraction has 14178 states and 41343 transitions. [2019-12-07 13:40:11,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 13:40:11,511 INFO L276 IsEmpty]: Start isEmpty. Operand 14178 states and 41343 transitions. [2019-12-07 13:40:11,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:11,524 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:11,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:11,524 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:11,524 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:11,524 INFO L82 PathProgramCache]: Analyzing trace with hash 2005859392, now seen corresponding path program 10 times [2019-12-07 13:40:11,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:11,524 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432756203] [2019-12-07 13:40:11,525 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:11,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:11,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:11,980 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432756203] [2019-12-07 13:40:11,980 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:11,980 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 13:40:11,980 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [895033493] [2019-12-07 13:40:11,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 13:40:11,981 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:11,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 13:40:11,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=352, Unknown=0, NotChecked=0, Total=420 [2019-12-07 13:40:11,981 INFO L87 Difference]: Start difference. First operand 14178 states and 41343 transitions. Second operand 21 states. [2019-12-07 13:40:16,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:16,723 INFO L93 Difference]: Finished difference Result 23656 states and 67651 transitions. [2019-12-07 13:40:16,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 13:40:16,724 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 13:40:16,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:16,745 INFO L225 Difference]: With dead ends: 23656 [2019-12-07 13:40:16,745 INFO L226 Difference]: Without dead ends: 23007 [2019-12-07 13:40:16,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1105 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=480, Invalid=3302, Unknown=0, NotChecked=0, Total=3782 [2019-12-07 13:40:16,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23007 states. [2019-12-07 13:40:16,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23007 to 14208. [2019-12-07 13:40:16,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14208 states. [2019-12-07 13:40:17,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14208 states to 14208 states and 41410 transitions. [2019-12-07 13:40:17,015 INFO L78 Accepts]: Start accepts. Automaton has 14208 states and 41410 transitions. Word has length 67 [2019-12-07 13:40:17,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:17,015 INFO L462 AbstractCegarLoop]: Abstraction has 14208 states and 41410 transitions. [2019-12-07 13:40:17,015 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 13:40:17,015 INFO L276 IsEmpty]: Start isEmpty. Operand 14208 states and 41410 transitions. [2019-12-07 13:40:17,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:17,027 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:17,027 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:17,028 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:17,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:17,028 INFO L82 PathProgramCache]: Analyzing trace with hash 304777142, now seen corresponding path program 11 times [2019-12-07 13:40:17,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:17,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096136725] [2019-12-07 13:40:17,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:17,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:17,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:17,878 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096136725] [2019-12-07 13:40:17,878 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:17,878 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2019-12-07 13:40:17,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801082435] [2019-12-07 13:40:17,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2019-12-07 13:40:17,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:17,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 13:40:17,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=587, Unknown=0, NotChecked=0, Total=702 [2019-12-07 13:40:17,879 INFO L87 Difference]: Start difference. First operand 14208 states and 41410 transitions. Second operand 27 states. [2019-12-07 13:40:21,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:21,555 INFO L93 Difference]: Finished difference Result 20534 states and 58511 transitions. [2019-12-07 13:40:21,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 13:40:21,555 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 67 [2019-12-07 13:40:21,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:21,573 INFO L225 Difference]: With dead ends: 20534 [2019-12-07 13:40:21,573 INFO L226 Difference]: Without dead ends: 19857 [2019-12-07 13:40:21,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1122 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=518, Invalid=3388, Unknown=0, NotChecked=0, Total=3906 [2019-12-07 13:40:21,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19857 states. [2019-12-07 13:40:21,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19857 to 14210. [2019-12-07 13:40:21,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14210 states. [2019-12-07 13:40:21,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14210 states to 14210 states and 41411 transitions. [2019-12-07 13:40:21,808 INFO L78 Accepts]: Start accepts. Automaton has 14210 states and 41411 transitions. Word has length 67 [2019-12-07 13:40:21,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:21,808 INFO L462 AbstractCegarLoop]: Abstraction has 14210 states and 41411 transitions. [2019-12-07 13:40:21,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 27 states. [2019-12-07 13:40:21,808 INFO L276 IsEmpty]: Start isEmpty. Operand 14210 states and 41411 transitions. [2019-12-07 13:40:21,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:21,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:21,821 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:21,821 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:21,821 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:21,821 INFO L82 PathProgramCache]: Analyzing trace with hash 1600529620, now seen corresponding path program 12 times [2019-12-07 13:40:21,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:21,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1544545223] [2019-12-07 13:40:21,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:21,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:21,978 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:21,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1544545223] [2019-12-07 13:40:21,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:21,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:40:21,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [311985245] [2019-12-07 13:40:21,979 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:40:21,979 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:21,979 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:40:21,979 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:40:21,980 INFO L87 Difference]: Start difference. First operand 14210 states and 41411 transitions. Second operand 12 states. [2019-12-07 13:40:23,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:23,407 INFO L93 Difference]: Finished difference Result 20317 states and 58465 transitions. [2019-12-07 13:40:23,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 13:40:23,407 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 13:40:23,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:23,434 INFO L225 Difference]: With dead ends: 20317 [2019-12-07 13:40:23,434 INFO L226 Difference]: Without dead ends: 17266 [2019-12-07 13:40:23,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=197, Invalid=859, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 13:40:23,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17266 states. [2019-12-07 13:40:23,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17266 to 13718. [2019-12-07 13:40:23,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13718 states. [2019-12-07 13:40:23,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13718 states to 13718 states and 40135 transitions. [2019-12-07 13:40:23,651 INFO L78 Accepts]: Start accepts. Automaton has 13718 states and 40135 transitions. Word has length 67 [2019-12-07 13:40:23,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:23,651 INFO L462 AbstractCegarLoop]: Abstraction has 13718 states and 40135 transitions. [2019-12-07 13:40:23,651 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:40:23,651 INFO L276 IsEmpty]: Start isEmpty. Operand 13718 states and 40135 transitions. [2019-12-07 13:40:23,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:23,663 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:23,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:23,663 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:23,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:23,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1529672320, now seen corresponding path program 13 times [2019-12-07 13:40:23,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:23,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172905945] [2019-12-07 13:40:23,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:23,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:24,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:24,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172905945] [2019-12-07 13:40:24,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:24,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 13:40:24,265 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007540774] [2019-12-07 13:40:24,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 13:40:24,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:24,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 13:40:24,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:40:24,266 INFO L87 Difference]: Start difference. First operand 13718 states and 40135 transitions. Second operand 23 states. [2019-12-07 13:40:27,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:27,126 INFO L93 Difference]: Finished difference Result 20360 states and 57957 transitions. [2019-12-07 13:40:27,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 13:40:27,126 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 67 [2019-12-07 13:40:27,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:27,143 INFO L225 Difference]: With dead ends: 20360 [2019-12-07 13:40:27,143 INFO L226 Difference]: Without dead ends: 18638 [2019-12-07 13:40:27,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1444 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=628, Invalid=4202, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 13:40:27,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18638 states. [2019-12-07 13:40:27,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18638 to 13607. [2019-12-07 13:40:27,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13607 states. [2019-12-07 13:40:27,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13607 states to 13607 states and 39852 transitions. [2019-12-07 13:40:27,360 INFO L78 Accepts]: Start accepts. Automaton has 13607 states and 39852 transitions. Word has length 67 [2019-12-07 13:40:27,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:27,360 INFO L462 AbstractCegarLoop]: Abstraction has 13607 states and 39852 transitions. [2019-12-07 13:40:27,360 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 13:40:27,360 INFO L276 IsEmpty]: Start isEmpty. Operand 13607 states and 39852 transitions. [2019-12-07 13:40:27,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:27,372 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:27,372 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:27,372 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:27,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:27,372 INFO L82 PathProgramCache]: Analyzing trace with hash -718945704, now seen corresponding path program 14 times [2019-12-07 13:40:27,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:27,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174437140] [2019-12-07 13:40:27,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:27,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:27,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:27,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174437140] [2019-12-07 13:40:27,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:27,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:40:27,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [225070599] [2019-12-07 13:40:27,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:40:27,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:27,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:40:27,557 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:40:27,557 INFO L87 Difference]: Start difference. First operand 13607 states and 39852 transitions. Second operand 13 states. [2019-12-07 13:40:28,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:28,884 INFO L93 Difference]: Finished difference Result 20119 states and 58168 transitions. [2019-12-07 13:40:28,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 13:40:28,885 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 13:40:28,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:28,900 INFO L225 Difference]: With dead ends: 20119 [2019-12-07 13:40:28,900 INFO L226 Difference]: Without dead ends: 16317 [2019-12-07 13:40:28,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 442 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=294, Invalid=1598, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 13:40:28,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16317 states. [2019-12-07 13:40:29,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16317 to 13111. [2019-12-07 13:40:29,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13111 states. [2019-12-07 13:40:29,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13111 states to 13111 states and 38640 transitions. [2019-12-07 13:40:29,179 INFO L78 Accepts]: Start accepts. Automaton has 13111 states and 38640 transitions. Word has length 67 [2019-12-07 13:40:29,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:29,179 INFO L462 AbstractCegarLoop]: Abstraction has 13111 states and 38640 transitions. [2019-12-07 13:40:29,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:40:29,179 INFO L276 IsEmpty]: Start isEmpty. Operand 13111 states and 38640 transitions. [2019-12-07 13:40:29,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:29,188 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:29,188 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:29,188 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:29,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:29,189 INFO L82 PathProgramCache]: Analyzing trace with hash 8609018, now seen corresponding path program 15 times [2019-12-07 13:40:29,189 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:29,189 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254335051] [2019-12-07 13:40:29,189 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:29,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:29,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:29,554 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254335051] [2019-12-07 13:40:29,554 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:29,554 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 13:40:29,554 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936080904] [2019-12-07 13:40:29,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 13:40:29,554 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:29,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 13:40:29,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2019-12-07 13:40:29,554 INFO L87 Difference]: Start difference. First operand 13111 states and 38640 transitions. Second operand 17 states. [2019-12-07 13:40:30,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:30,885 INFO L93 Difference]: Finished difference Result 18574 states and 53499 transitions. [2019-12-07 13:40:30,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 13:40:30,886 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 13:40:30,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:30,902 INFO L225 Difference]: With dead ends: 18574 [2019-12-07 13:40:30,902 INFO L226 Difference]: Without dead ends: 17131 [2019-12-07 13:40:30,903 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=301, Invalid=1339, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 13:40:30,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17131 states. [2019-12-07 13:40:31,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17131 to 12895. [2019-12-07 13:40:31,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12895 states. [2019-12-07 13:40:31,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12895 states to 12895 states and 38086 transitions. [2019-12-07 13:40:31,108 INFO L78 Accepts]: Start accepts. Automaton has 12895 states and 38086 transitions. Word has length 67 [2019-12-07 13:40:31,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:31,108 INFO L462 AbstractCegarLoop]: Abstraction has 12895 states and 38086 transitions. [2019-12-07 13:40:31,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 13:40:31,108 INFO L276 IsEmpty]: Start isEmpty. Operand 12895 states and 38086 transitions. [2019-12-07 13:40:31,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:31,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:31,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:31,120 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:31,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:31,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1273938143, now seen corresponding path program 1 times [2019-12-07 13:40:31,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:31,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [75593314] [2019-12-07 13:40:31,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:31,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:31,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:31,186 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [75593314] [2019-12-07 13:40:31,186 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:31,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:40:31,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1352094202] [2019-12-07 13:40:31,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:40:31,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:31,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:40:31,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:40:31,187 INFO L87 Difference]: Start difference. First operand 12895 states and 38086 transitions. Second operand 5 states. [2019-12-07 13:40:31,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:31,439 INFO L93 Difference]: Finished difference Result 16771 states and 49340 transitions. [2019-12-07 13:40:31,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:40:31,439 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 13:40:31,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:31,456 INFO L225 Difference]: With dead ends: 16771 [2019-12-07 13:40:31,456 INFO L226 Difference]: Without dead ends: 16768 [2019-12-07 13:40:31,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:40:31,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16768 states. [2019-12-07 13:40:31,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16768 to 12718. [2019-12-07 13:40:31,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12718 states. [2019-12-07 13:40:31,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12718 states to 12718 states and 37422 transitions. [2019-12-07 13:40:31,658 INFO L78 Accepts]: Start accepts. Automaton has 12718 states and 37422 transitions. Word has length 67 [2019-12-07 13:40:31,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:31,658 INFO L462 AbstractCegarLoop]: Abstraction has 12718 states and 37422 transitions. [2019-12-07 13:40:31,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:40:31,658 INFO L276 IsEmpty]: Start isEmpty. Operand 12718 states and 37422 transitions. [2019-12-07 13:40:31,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:31,668 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:31,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:31,668 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:31,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:31,669 INFO L82 PathProgramCache]: Analyzing trace with hash 1494433381, now seen corresponding path program 2 times [2019-12-07 13:40:31,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:31,669 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156992440] [2019-12-07 13:40:31,669 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:31,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:31,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:31,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156992440] [2019-12-07 13:40:31,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:31,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:40:31,760 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [751326695] [2019-12-07 13:40:31,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:40:31,761 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:31,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:40:31,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:40:31,761 INFO L87 Difference]: Start difference. First operand 12718 states and 37422 transitions. Second operand 6 states. [2019-12-07 13:40:32,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:32,557 INFO L93 Difference]: Finished difference Result 22763 states and 66216 transitions. [2019-12-07 13:40:32,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:40:32,558 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 13:40:32,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:32,579 INFO L225 Difference]: With dead ends: 22763 [2019-12-07 13:40:32,580 INFO L226 Difference]: Without dead ends: 22747 [2019-12-07 13:40:32,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:40:32,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22747 states. [2019-12-07 13:40:32,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22747 to 14510. [2019-12-07 13:40:32,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14510 states. [2019-12-07 13:40:32,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14510 states to 14510 states and 42808 transitions. [2019-12-07 13:40:32,830 INFO L78 Accepts]: Start accepts. Automaton has 14510 states and 42808 transitions. Word has length 67 [2019-12-07 13:40:32,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:32,830 INFO L462 AbstractCegarLoop]: Abstraction has 14510 states and 42808 transitions. [2019-12-07 13:40:32,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:40:32,830 INFO L276 IsEmpty]: Start isEmpty. Operand 14510 states and 42808 transitions. [2019-12-07 13:40:32,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:32,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:32,843 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:32,843 INFO L410 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:32,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:32,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1814571669, now seen corresponding path program 3 times [2019-12-07 13:40:32,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:32,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498629693] [2019-12-07 13:40:32,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:32,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:32,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:32,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498629693] [2019-12-07 13:40:32,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:32,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:40:32,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1551644989] [2019-12-07 13:40:32,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 13:40:32,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:32,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 13:40:32,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 13:40:32,931 INFO L87 Difference]: Start difference. First operand 14510 states and 42808 transitions. Second operand 10 states. [2019-12-07 13:40:33,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:33,224 INFO L93 Difference]: Finished difference Result 17880 states and 52298 transitions. [2019-12-07 13:40:33,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 13:40:33,224 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 13:40:33,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:33,240 INFO L225 Difference]: With dead ends: 17880 [2019-12-07 13:40:33,240 INFO L226 Difference]: Without dead ends: 17067 [2019-12-07 13:40:33,240 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2019-12-07 13:40:33,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17067 states. [2019-12-07 13:40:33,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17067 to 14452. [2019-12-07 13:40:33,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14452 states. [2019-12-07 13:40:33,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14452 states to 14452 states and 42656 transitions. [2019-12-07 13:40:33,456 INFO L78 Accepts]: Start accepts. Automaton has 14452 states and 42656 transitions. Word has length 67 [2019-12-07 13:40:33,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:33,456 INFO L462 AbstractCegarLoop]: Abstraction has 14452 states and 42656 transitions. [2019-12-07 13:40:33,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 13:40:33,456 INFO L276 IsEmpty]: Start isEmpty. Operand 14452 states and 42656 transitions. [2019-12-07 13:40:33,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:40:33,468 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:33,468 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:33,469 INFO L410 AbstractCegarLoop]: === Iteration 44 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:33,469 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:33,469 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 16 times [2019-12-07 13:40:33,469 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:33,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476821599] [2019-12-07 13:40:33,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:33,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:40:33,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:40:33,557 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:40:33,557 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:40:33,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t633~0.base_24|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t633~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t633~0.base_24|) |v_ULTIMATE.start_main_~#t633~0.offset_19| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_6| 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t633~0.base_24| 1)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t633~0.base_24|) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t633~0.base_24| 4)) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= |v_ULTIMATE.start_main_~#t633~0.offset_19| 0) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ULTIMATE.start_main_~#t635~0.offset=|v_ULTIMATE.start_main_~#t635~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ULTIMATE.start_main_~#t635~0.base=|v_ULTIMATE.start_main_~#t635~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t634~0.base=|v_ULTIMATE.start_main_~#t634~0.base_26|, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t633~0.base=|v_ULTIMATE.start_main_~#t633~0.base_24|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t634~0.offset=|v_ULTIMATE.start_main_~#t634~0.offset_19|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t633~0.offset=|v_ULTIMATE.start_main_~#t633~0.offset_19|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t635~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t635~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t634~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t633~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t634~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t633~0.offset] because there is no mapped edge [2019-12-07 13:40:33,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t634~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t634~0.offset_9|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t634~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t634~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t634~0.base_10|) |v_ULTIMATE.start_main_~#t634~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t634~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t634~0.base_10| 0)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t634~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t634~0.base=|v_ULTIMATE.start_main_~#t634~0.base_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t634~0.offset=|v_ULTIMATE.start_main_~#t634~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t634~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t634~0.offset] because there is no mapped edge [2019-12-07 13:40:33,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t635~0.base_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t635~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t635~0.base_13|)) (= |v_ULTIMATE.start_main_~#t635~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t635~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t635~0.base_13|) |v_ULTIMATE.start_main_~#t635~0.offset_11| 2)) |v_#memory_int_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t635~0.base_13| 4) |v_#length_15|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t635~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t635~0.base=|v_ULTIMATE.start_main_~#t635~0.base_13|, ULTIMATE.start_main_~#t635~0.offset=|v_ULTIMATE.start_main_~#t635~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t635~0.base, ULTIMATE.start_main_~#t635~0.offset] because there is no mapped edge [2019-12-07 13:40:33,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 13:40:33,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1119940287 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1119940287 256)))) (or (and (= ~a~0_In1119940287 |P1Thread1of1ForFork2_#t~ite9_Out1119940287|) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In1119940287 |P1Thread1of1ForFork2_#t~ite9_Out1119940287|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In1119940287, ~a$w_buff1~0=~a$w_buff1~0_In1119940287, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1119940287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1119940287} OutVars{~a~0=~a~0_In1119940287, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1119940287|, ~a$w_buff1~0=~a$w_buff1~0_In1119940287, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1119940287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1119940287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:40:33,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In1514468270 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1514468270 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1514468270|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In1514468270 |P0Thread1of1ForFork1_#t~ite5_Out1514468270|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1514468270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1514468270} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1514468270|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1514468270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1514468270} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:40:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In331065395 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In331065395 256))) (.cse0 (= (mod ~a$r_buff1_thd1~0_In331065395 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In331065395 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out331065395| 0)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out331065395| ~a$w_buff1_used~0_In331065395) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In331065395, ~a$w_buff0_used~0=~a$w_buff0_used~0_In331065395, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In331065395, ~a$w_buff1_used~0=~a$w_buff1_used~0_In331065395} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out331065395|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In331065395, ~a$w_buff0_used~0=~a$w_buff0_used~0_In331065395, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In331065395, ~a$w_buff1_used~0=~a$w_buff1_used~0_In331065395} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:40:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_In-1897333437 ~a$r_buff0_thd1~0_Out-1897333437)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1897333437 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1897333437 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out-1897333437)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1897333437, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1897333437} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1897333437|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1897333437, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1897333437} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:40:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-2046667674 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-2046667674 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2046667674 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-2046667674 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-2046667674| ~a$r_buff1_thd1~0_In-2046667674) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-2046667674|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2046667674|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:40:33,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:40:33,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-316606833 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-316606833| |P2Thread1of1ForFork0_#t~ite20_Out-316606833|) (= ~a$w_buff0~0_In-316606833 |P2Thread1of1ForFork0_#t~ite20_Out-316606833|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-316606833 256)))) (or (and (= (mod ~a$r_buff1_thd3~0_In-316606833 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In-316606833 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-316606833 256))))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-316606833| ~a$w_buff0~0_In-316606833) (= |P2Thread1of1ForFork0_#t~ite20_In-316606833| |P2Thread1of1ForFork0_#t~ite20_Out-316606833|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-316606833, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-316606833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-316606833, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-316606833, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-316606833, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-316606833|, ~weak$$choice2~0=~weak$$choice2~0_In-316606833} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-316606833|, ~a$w_buff0~0=~a$w_buff0~0_In-316606833, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-316606833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-316606833, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-316606833, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-316606833|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-316606833, ~weak$$choice2~0=~weak$$choice2~0_In-316606833} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:40:33,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-428735549 256)))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-428735549 256)))) (or (and .cse0 (= 0 (mod ~a$w_buff1_used~0_In-428735549 256))) (= (mod ~a$w_buff0_used~0_In-428735549 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-428735549 256))))) (= |P2Thread1of1ForFork0_#t~ite26_Out-428735549| ~a$w_buff0_used~0_In-428735549) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-428735549| |P2Thread1of1ForFork0_#t~ite27_Out-428735549|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-428735549| ~a$w_buff0_used~0_In-428735549) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-428735549| |P2Thread1of1ForFork0_#t~ite26_Out-428735549|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-428735549|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-428735549, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-428735549, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-428735549, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-428735549, ~weak$$choice2~0=~weak$$choice2~0_In-428735549} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-428735549|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-428735549|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-428735549, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-428735549, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-428735549, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-428735549, ~weak$$choice2~0=~weak$$choice2~0_In-428735549} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:40:33,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-662064893 256)))) (or (and (= ~a$w_buff1_used~0_In-662064893 |P2Thread1of1ForFork0_#t~ite29_Out-662064893|) (= |P2Thread1of1ForFork0_#t~ite30_Out-662064893| |P2Thread1of1ForFork0_#t~ite29_Out-662064893|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-662064893 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-662064893 256)) (and (= (mod ~a$w_buff1_used~0_In-662064893 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-662064893 256) 0) .cse1)))) (and (not .cse0) (= ~a$w_buff1_used~0_In-662064893 |P2Thread1of1ForFork0_#t~ite30_Out-662064893|) (= |P2Thread1of1ForFork0_#t~ite29_In-662064893| |P2Thread1of1ForFork0_#t~ite29_Out-662064893|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-662064893, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-662064893, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-662064893, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-662064893, ~weak$$choice2~0=~weak$$choice2~0_In-662064893, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-662064893|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-662064893, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-662064893, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-662064893, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-662064893|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-662064893, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-662064893|, ~weak$$choice2~0=~weak$$choice2~0_In-662064893} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:40:33,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:40:33,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:40:33,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1630074572 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1630074572 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1630074572| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1630074572| ~a$w_buff0_used~0_In1630074572) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1630074572|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:40:33,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In1954047048 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1954047048 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1954047048 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1954047048 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1954047048| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out1954047048| ~a$w_buff1_used~0_In1954047048) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1954047048, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1954047048} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1954047048, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1954047048|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1954047048} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:40:33,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In733260851 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In733260851 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out733260851|) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out733260851| ~a$r_buff0_thd2~0_In733260851) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out733260851|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:40:33,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1341677112 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In-1341677112 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1341677112 |P1Thread1of1ForFork2_#t~ite14_Out-1341677112|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1341677112|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1341677112, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1341677112, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1341677112|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:40:33,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:40:33,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:40:33,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1495619111 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| |P2Thread1of1ForFork0_#t~ite39_Out-1495619111|)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1495619111 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| ~a~0_In-1495619111) (or .cse0 .cse1) .cse2) (and (not .cse0) .cse2 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| ~a$w_buff1~0_In-1495619111)))) InVars {~a~0=~a~0_In-1495619111, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} OutVars{~a~0=~a~0_In-1495619111, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1495619111|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1495619111|, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:40:33,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In38355451 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In38355451 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out38355451| ~a$w_buff0_used~0_In38355451) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out38355451| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In38355451, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In38355451} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out38355451|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In38355451, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In38355451} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:40:33,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1624696167 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1624696167 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1624696167 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1624696167 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1624696167| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624696167| ~a$w_buff1_used~0_In-1624696167)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1624696167, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1624696167} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1624696167, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1624696167, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1624696167|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:40:33,570 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1278440572 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1278440572 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out1278440572| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out1278440572| ~a$r_buff0_thd3~0_In1278440572)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1278440572, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1278440572} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1278440572, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1278440572, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1278440572|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:40:33,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In466280360 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In466280360 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In466280360 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In466280360 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out466280360|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd3~0_In466280360 |P2Thread1of1ForFork0_#t~ite43_Out466280360|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In466280360, ~a$w_buff0_used~0=~a$w_buff0_used~0_In466280360, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In466280360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In466280360} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out466280360|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In466280360, ~a$w_buff0_used~0=~a$w_buff0_used~0_In466280360, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In466280360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In466280360} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:40:33,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:40:33,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:40:33,571 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out1879489240| |ULTIMATE.start_main_#t~ite47_Out1879489240|)) (.cse0 (= (mod ~a$w_buff1_used~0_In1879489240 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1879489240 256)))) (or (and (not .cse0) .cse1 (= ~a$w_buff1~0_In1879489240 |ULTIMATE.start_main_#t~ite47_Out1879489240|) (not .cse2)) (and .cse1 (or .cse0 .cse2) (= ~a~0_In1879489240 |ULTIMATE.start_main_#t~ite47_Out1879489240|)))) InVars {~a~0=~a~0_In1879489240, ~a$w_buff1~0=~a$w_buff1~0_In1879489240, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1879489240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1879489240} OutVars{~a~0=~a~0_In1879489240, ~a$w_buff1~0=~a$w_buff1~0_In1879489240, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1879489240|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1879489240, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1879489240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1879489240} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:40:33,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1222331381 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1222331381 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1222331381 |ULTIMATE.start_main_#t~ite49_Out1222331381|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1222331381|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1222331381} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1222331381|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1222331381} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:40:33,572 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1631062844 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1631062844 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1631062844 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1631062844 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-1631062844 |ULTIMATE.start_main_#t~ite50_Out-1631062844|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1631062844|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1631062844|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:40:33,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In1225907905 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1225907905 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1225907905 |ULTIMATE.start_main_#t~ite51_Out1225907905|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1225907905| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1225907905|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:40:33,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-699504859 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-699504859 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-699504859 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In-699504859 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-699504859|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-699504859 |ULTIMATE.start_main_#t~ite52_Out-699504859|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-699504859, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-699504859, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-699504859, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-699504859} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-699504859|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-699504859, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-699504859, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-699504859, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-699504859} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:40:33,573 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:40:33,620 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:40:33 BasicIcfg [2019-12-07 13:40:33,620 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:40:33,620 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:40:33,620 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:40:33,620 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:40:33,621 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:41" (3/4) ... [2019-12-07 13:40:33,622 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:40:33,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t633~0.base_24|)) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t633~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t633~0.base_24|) |v_ULTIMATE.start_main_~#t633~0.offset_19| 0)) |v_#memory_int_21|) (= |v_#NULL.offset_6| 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t633~0.base_24| 1)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t633~0.base_24|) (= v_~main$tmp_guard1~0_29 0) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t633~0.base_24| 4)) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= |v_ULTIMATE.start_main_~#t633~0.offset_19| 0) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ULTIMATE.start_main_~#t635~0.offset=|v_ULTIMATE.start_main_~#t635~0.offset_20|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ULTIMATE.start_main_~#t635~0.base=|v_ULTIMATE.start_main_~#t635~0.base_27|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t634~0.base=|v_ULTIMATE.start_main_~#t634~0.base_26|, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t633~0.base=|v_ULTIMATE.start_main_~#t633~0.base_24|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t634~0.offset=|v_ULTIMATE.start_main_~#t634~0.offset_19|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t633~0.offset=|v_ULTIMATE.start_main_~#t633~0.offset_19|} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t635~0.offset, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t635~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t634~0.base, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t633~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t634~0.offset, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base, ULTIMATE.start_main_~#t633~0.offset] because there is no mapped edge [2019-12-07 13:40:33,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t634~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t634~0.offset_9|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t634~0.base_10| 4) |v_#length_17|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t634~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t634~0.base_10|) |v_ULTIMATE.start_main_~#t634~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t634~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t634~0.base_10| 0)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t634~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t634~0.base=|v_ULTIMATE.start_main_~#t634~0.base_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t634~0.offset=|v_ULTIMATE.start_main_~#t634~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t634~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t634~0.offset] because there is no mapped edge [2019-12-07 13:40:33,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t635~0.base_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t635~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t635~0.base_13|)) (= |v_ULTIMATE.start_main_~#t635~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t635~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t635~0.base_13|) |v_ULTIMATE.start_main_~#t635~0.offset_11| 2)) |v_#memory_int_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t635~0.base_13| 4) |v_#length_15|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t635~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t635~0.base=|v_ULTIMATE.start_main_~#t635~0.base_13|, ULTIMATE.start_main_~#t635~0.offset=|v_ULTIMATE.start_main_~#t635~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t635~0.base, ULTIMATE.start_main_~#t635~0.offset] because there is no mapped edge [2019-12-07 13:40:33,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 13:40:33,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In1119940287 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In1119940287 256)))) (or (and (= ~a~0_In1119940287 |P1Thread1of1ForFork2_#t~ite9_Out1119940287|) (or .cse0 .cse1)) (and (= ~a$w_buff1~0_In1119940287 |P1Thread1of1ForFork2_#t~ite9_Out1119940287|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In1119940287, ~a$w_buff1~0=~a$w_buff1~0_In1119940287, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1119940287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1119940287} OutVars{~a~0=~a~0_In1119940287, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1119940287|, ~a$w_buff1~0=~a$w_buff1~0_In1119940287, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1119940287, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1119940287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 13:40:33,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd1~0_In1514468270 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1514468270 256)))) (or (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1514468270|) (not .cse0) (not .cse1)) (and (= ~a$w_buff0_used~0_In1514468270 |P0Thread1of1ForFork1_#t~ite5_Out1514468270|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1514468270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1514468270} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1514468270|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1514468270, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1514468270} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:40:33,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In331065395 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In331065395 256))) (.cse0 (= (mod ~a$r_buff1_thd1~0_In331065395 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In331065395 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out331065395| 0)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out331065395| ~a$w_buff1_used~0_In331065395) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In331065395, ~a$w_buff0_used~0=~a$w_buff0_used~0_In331065395, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In331065395, ~a$w_buff1_used~0=~a$w_buff1_used~0_In331065395} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out331065395|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In331065395, ~a$w_buff0_used~0=~a$w_buff0_used~0_In331065395, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In331065395, ~a$w_buff1_used~0=~a$w_buff1_used~0_In331065395} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:40:33,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse0 (= ~a$r_buff0_thd1~0_In-1897333437 ~a$r_buff0_thd1~0_Out-1897333437)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-1897333437 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1897333437 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out-1897333437)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1897333437, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1897333437} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1897333437|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1897333437, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1897333437} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:40:33,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-2046667674 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-2046667674 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2046667674 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In-2046667674 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out-2046667674| ~a$r_buff1_thd1~0_In-2046667674) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out-2046667674|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-2046667674|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2046667674, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2046667674, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2046667674, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2046667674} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:40:33,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:40:33,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-316606833 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite21_Out-316606833| |P2Thread1of1ForFork0_#t~ite20_Out-316606833|) (= ~a$w_buff0~0_In-316606833 |P2Thread1of1ForFork0_#t~ite20_Out-316606833|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-316606833 256)))) (or (and (= (mod ~a$r_buff1_thd3~0_In-316606833 256) 0) .cse1) (and (= (mod ~a$w_buff1_used~0_In-316606833 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In-316606833 256))))) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite21_Out-316606833| ~a$w_buff0~0_In-316606833) (= |P2Thread1of1ForFork0_#t~ite20_In-316606833| |P2Thread1of1ForFork0_#t~ite20_Out-316606833|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-316606833, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-316606833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-316606833, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-316606833, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-316606833, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-316606833|, ~weak$$choice2~0=~weak$$choice2~0_In-316606833} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-316606833|, ~a$w_buff0~0=~a$w_buff0~0_In-316606833, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-316606833, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-316606833, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-316606833, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-316606833|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-316606833, ~weak$$choice2~0=~weak$$choice2~0_In-316606833} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:40:33,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-428735549 256)))) (or (and (let ((.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-428735549 256)))) (or (and .cse0 (= 0 (mod ~a$w_buff1_used~0_In-428735549 256))) (= (mod ~a$w_buff0_used~0_In-428735549 256) 0) (and .cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-428735549 256))))) (= |P2Thread1of1ForFork0_#t~ite26_Out-428735549| ~a$w_buff0_used~0_In-428735549) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-428735549| |P2Thread1of1ForFork0_#t~ite27_Out-428735549|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-428735549| ~a$w_buff0_used~0_In-428735549) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite26_In-428735549| |P2Thread1of1ForFork0_#t~ite26_Out-428735549|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-428735549|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-428735549, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-428735549, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-428735549, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-428735549, ~weak$$choice2~0=~weak$$choice2~0_In-428735549} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-428735549|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-428735549|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-428735549, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-428735549, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-428735549, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-428735549, ~weak$$choice2~0=~weak$$choice2~0_In-428735549} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:40:33,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-662064893 256)))) (or (and (= ~a$w_buff1_used~0_In-662064893 |P2Thread1of1ForFork0_#t~ite29_Out-662064893|) (= |P2Thread1of1ForFork0_#t~ite30_Out-662064893| |P2Thread1of1ForFork0_#t~ite29_Out-662064893|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-662064893 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-662064893 256)) (and (= (mod ~a$w_buff1_used~0_In-662064893 256) 0) .cse1) (and (= (mod ~a$r_buff1_thd3~0_In-662064893 256) 0) .cse1)))) (and (not .cse0) (= ~a$w_buff1_used~0_In-662064893 |P2Thread1of1ForFork0_#t~ite30_Out-662064893|) (= |P2Thread1of1ForFork0_#t~ite29_In-662064893| |P2Thread1of1ForFork0_#t~ite29_Out-662064893|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-662064893, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-662064893, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-662064893, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-662064893, ~weak$$choice2~0=~weak$$choice2~0_In-662064893, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-662064893|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-662064893, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-662064893, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-662064893, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-662064893|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-662064893, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-662064893|, ~weak$$choice2~0=~weak$$choice2~0_In-662064893} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:40:33,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:40:33,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:40:33,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1630074572 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In1630074572 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1630074572| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1630074572| ~a$w_buff0_used~0_In1630074572) (or .cse0 .cse1)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1630074572, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1630074572, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1630074572|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:40:33,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In1954047048 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In1954047048 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In1954047048 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In1954047048 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out1954047048| 0)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite12_Out1954047048| ~a$w_buff1_used~0_In1954047048) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1954047048, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1954047048} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In1954047048, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1954047048, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1954047048, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1954047048|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1954047048} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:40:33,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In733260851 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In733260851 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out733260851|) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite13_Out733260851| ~a$r_buff0_thd2~0_In733260851) (or .cse1 .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In733260851, ~a$w_buff0_used~0=~a$w_buff0_used~0_In733260851, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out733260851|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:40:33,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1341677112 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-1341677112 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd2~0_In-1341677112 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In-1341677112 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1341677112 |P1Thread1of1ForFork2_#t~ite14_Out-1341677112|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1341677112|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1341677112, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1341677112, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1341677112, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1341677112, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1341677112, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1341677112|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:40:33,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:40:33,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:40:33,631 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd3~0_In-1495619111 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| |P2Thread1of1ForFork0_#t~ite39_Out-1495619111|)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1495619111 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| ~a~0_In-1495619111) (or .cse0 .cse1) .cse2) (and (not .cse0) .cse2 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1495619111| ~a$w_buff1~0_In-1495619111)))) InVars {~a~0=~a~0_In-1495619111, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} OutVars{~a~0=~a~0_In-1495619111, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1495619111|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1495619111|, ~a$w_buff1~0=~a$w_buff1~0_In-1495619111, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1495619111, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1495619111} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:40:33,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In38355451 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In38355451 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out38355451| ~a$w_buff0_used~0_In38355451) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out38355451| 0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In38355451, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In38355451} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out38355451|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In38355451, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In38355451} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:40:33,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1624696167 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1624696167 256))) (.cse0 (= (mod ~a$r_buff0_thd3~0_In-1624696167 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1624696167 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1624696167| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1624696167| ~a$w_buff1_used~0_In-1624696167)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1624696167, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1624696167} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1624696167, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1624696167, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1624696167, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1624696167, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1624696167|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:40:33,632 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1278440572 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In1278440572 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out1278440572| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out1278440572| ~a$r_buff0_thd3~0_In1278440572)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1278440572, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1278440572} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1278440572, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1278440572, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1278440572|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:40:33,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In466280360 256))) (.cse3 (= (mod ~a$r_buff0_thd3~0_In466280360 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd3~0_In466280360 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In466280360 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out466280360|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$r_buff1_thd3~0_In466280360 |P2Thread1of1ForFork0_#t~ite43_Out466280360|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In466280360, ~a$w_buff0_used~0=~a$w_buff0_used~0_In466280360, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In466280360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In466280360} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out466280360|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In466280360, ~a$w_buff0_used~0=~a$w_buff0_used~0_In466280360, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In466280360, ~a$w_buff1_used~0=~a$w_buff1_used~0_In466280360} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:40:33,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:40:33,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:40:33,633 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out1879489240| |ULTIMATE.start_main_#t~ite47_Out1879489240|)) (.cse0 (= (mod ~a$w_buff1_used~0_In1879489240 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In1879489240 256)))) (or (and (not .cse0) .cse1 (= ~a$w_buff1~0_In1879489240 |ULTIMATE.start_main_#t~ite47_Out1879489240|) (not .cse2)) (and .cse1 (or .cse0 .cse2) (= ~a~0_In1879489240 |ULTIMATE.start_main_#t~ite47_Out1879489240|)))) InVars {~a~0=~a~0_In1879489240, ~a$w_buff1~0=~a$w_buff1~0_In1879489240, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1879489240, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1879489240} OutVars{~a~0=~a~0_In1879489240, ~a$w_buff1~0=~a$w_buff1~0_In1879489240, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1879489240|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1879489240, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1879489240|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1879489240} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:40:33,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In1222331381 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1222331381 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In1222331381 |ULTIMATE.start_main_#t~ite49_Out1222331381|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out1222331381|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1222331381} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1222331381, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1222331381|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1222331381} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:40:33,634 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1631062844 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In-1631062844 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-1631062844 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1631062844 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-1631062844 |ULTIMATE.start_main_#t~ite50_Out-1631062844|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1631062844|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1631062844|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1631062844, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1631062844, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1631062844, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1631062844} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:40:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In1225907905 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1225907905 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1225907905 |ULTIMATE.start_main_#t~ite51_Out1225907905|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite51_Out1225907905| 0) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1225907905|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1225907905, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1225907905} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:40:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-699504859 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-699504859 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-699504859 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In-699504859 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-699504859|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~a$r_buff1_thd0~0_In-699504859 |ULTIMATE.start_main_#t~ite52_Out-699504859|) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-699504859, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-699504859, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-699504859, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-699504859} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-699504859|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-699504859, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-699504859, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-699504859, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-699504859} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:40:33,635 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:40:33,689 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_18628430-544e-421e-9586-2d2f6fed4fd5/bin/utaipan/witness.graphml [2019-12-07 13:40:33,689 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:40:33,690 INFO L168 Benchmark]: Toolchain (without parser) took 113195.95 ms. Allocated memory was 1.0 GB in the beginning and 6.1 GB in the end (delta: 5.0 GB). Free memory was 934.0 MB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 13:40:33,691 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:40:33,691 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -172.5 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:40:33,691 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.25 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:40:33,691 INFO L168 Benchmark]: Boogie Preprocessor took 25.90 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:40:33,692 INFO L168 Benchmark]: RCFGBuilder took 436.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:40:33,692 INFO L168 Benchmark]: TraceAbstraction took 112240.24 ms. Allocated memory was 1.2 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:40:33,692 INFO L168 Benchmark]: Witness Printer took 69.45 ms. Allocated memory is still 6.1 GB. Free memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: 40.9 MB). Peak memory consumption was 40.9 MB. Max. memory is 11.5 GB. [2019-12-07 13:40:33,693 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.52 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.2 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -172.5 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.25 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.90 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 436.49 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 62.7 MB). Peak memory consumption was 62.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 112240.24 ms. Allocated memory was 1.2 GB in the beginning and 6.1 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. * Witness Printer took 69.45 ms. Allocated memory is still 6.1 GB. Free memory was 2.4 GB in the beginning and 2.4 GB in the end (delta: 40.9 MB). Peak memory consumption was 40.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t633, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t634, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t635, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=7, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=7, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=7, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=7, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=7, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=11, weak$$choice2=7, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 112.0s, OverallIterations: 44, TraceHistogramMax: 1, AutomataDifference: 54.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9523 SDtfs, 14526 SDslu, 39723 SDs, 0 SdLazy, 46163 SolverSat, 1128 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 28.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 926 GetRequests, 79 SyntacticMatches, 53 SemanticMatches, 794 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9092 ImplicationChecksByTransitivity, 16.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=151748occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 30.5s AutomataMinimizationTime, 43 MinimizatonAttempts, 251847 StatesRemovedByMinimization, 40 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 7.4s InterpolantComputationTime, 2288 NumberOfCodeBlocks, 2288 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 2178 ConstructedInterpolants, 0 QuantifiedInterpolants, 986291 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 43 InterpolantComputations, 43 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...