./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e84d801c4b3bcca1d14353ca734b698e1b9944a7 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 21:48:07,965 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 21:48:07,966 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 21:48:07,974 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 21:48:07,974 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 21:48:07,975 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 21:48:07,976 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 21:48:07,977 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 21:48:07,978 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 21:48:07,979 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 21:48:07,979 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 21:48:07,980 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 21:48:07,980 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 21:48:07,981 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 21:48:07,982 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 21:48:07,982 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 21:48:07,983 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 21:48:07,984 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 21:48:07,985 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 21:48:07,987 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 21:48:07,988 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 21:48:07,989 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 21:48:07,989 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 21:48:07,990 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 21:48:07,992 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 21:48:07,992 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 21:48:07,992 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 21:48:07,992 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 21:48:07,993 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 21:48:07,993 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 21:48:07,993 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 21:48:07,994 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 21:48:07,994 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 21:48:07,995 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 21:48:07,995 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 21:48:07,995 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 21:48:07,996 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 21:48:07,996 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 21:48:07,996 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 21:48:07,997 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 21:48:07,997 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 21:48:07,998 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 21:48:08,007 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 21:48:08,007 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 21:48:08,008 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 21:48:08,008 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 21:48:08,008 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 21:48:08,008 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 21:48:08,008 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 21:48:08,009 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 21:48:08,009 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 21:48:08,010 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 21:48:08,010 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 21:48:08,010 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 21:48:08,010 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 21:48:08,010 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 21:48:08,010 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 21:48:08,011 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 21:48:08,011 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:48:08,012 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 21:48:08,012 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 21:48:08,013 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 21:48:08,013 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 21:48:08,013 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 21:48:08,013 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 21:48:08,013 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e84d801c4b3bcca1d14353ca734b698e1b9944a7 [2019-12-07 21:48:08,120 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 21:48:08,127 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 21:48:08,129 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 21:48:08,130 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 21:48:08,131 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 21:48:08,131 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i [2019-12-07 21:48:08,168 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/data/ce3b4573b/da6ad8e9f7b14639a574c11cc3ac86be/FLAG2b51dd3d9 [2019-12-07 21:48:08,573 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 21:48:08,573 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/sv-benchmarks/c/pthread-wmm/mix024_tso.opt.i [2019-12-07 21:48:08,587 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/data/ce3b4573b/da6ad8e9f7b14639a574c11cc3ac86be/FLAG2b51dd3d9 [2019-12-07 21:48:08,597 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/data/ce3b4573b/da6ad8e9f7b14639a574c11cc3ac86be [2019-12-07 21:48:08,598 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 21:48:08,599 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 21:48:08,600 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 21:48:08,601 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 21:48:08,603 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 21:48:08,604 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:48:08" (1/1) ... [2019-12-07 21:48:08,606 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:08, skipping insertion in model container [2019-12-07 21:48:08,606 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:48:08" (1/1) ... [2019-12-07 21:48:08,611 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 21:48:08,649 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 21:48:08,908 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:48:08,916 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 21:48:08,962 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:48:09,009 INFO L208 MainTranslator]: Completed translation [2019-12-07 21:48:09,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09 WrapperNode [2019-12-07 21:48:09,010 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 21:48:09,010 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 21:48:09,010 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 21:48:09,010 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 21:48:09,016 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,030 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,050 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 21:48:09,050 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 21:48:09,050 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 21:48:09,051 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 21:48:09,057 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,057 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,061 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,061 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,069 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,072 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,075 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... [2019-12-07 21:48:09,078 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 21:48:09,078 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 21:48:09,078 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 21:48:09,079 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 21:48:09,079 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 21:48:09,120 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 21:48:09,120 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 21:48:09,120 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 21:48:09,120 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 21:48:09,121 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 21:48:09,121 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 21:48:09,121 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 21:48:09,122 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 21:48:09,492 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 21:48:09,492 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 21:48:09,493 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:09 BoogieIcfgContainer [2019-12-07 21:48:09,493 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 21:48:09,494 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 21:48:09,494 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 21:48:09,495 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 21:48:09,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 09:48:08" (1/3) ... [2019-12-07 21:48:09,496 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dedb27f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:48:09, skipping insertion in model container [2019-12-07 21:48:09,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:09" (2/3) ... [2019-12-07 21:48:09,496 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dedb27f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:48:09, skipping insertion in model container [2019-12-07 21:48:09,496 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:09" (3/3) ... [2019-12-07 21:48:09,498 INFO L109 eAbstractionObserver]: Analyzing ICFG mix024_tso.opt.i [2019-12-07 21:48:09,504 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 21:48:09,504 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 21:48:09,510 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 21:48:09,511 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 21:48:09,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,545 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,545 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,546 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,546 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,547 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,548 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,549 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,550 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,550 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,550 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,551 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,552 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,553 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,554 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,555 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,556 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,557 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,558 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,563 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,564 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:09,575 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 21:48:09,588 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 21:48:09,588 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 21:48:09,588 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 21:48:09,588 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 21:48:09,588 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 21:48:09,588 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 21:48:09,588 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 21:48:09,588 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 21:48:09,603 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 21:48:09,604 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 21:48:09,663 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 21:48:09,663 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:48:09,674 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 21:48:09,690 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 21:48:09,722 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 21:48:09,722 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:48:09,728 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 21:48:09,743 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 21:48:09,744 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 21:48:12,683 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 21:48:12,788 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78858 [2019-12-07 21:48:12,788 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 21:48:12,791 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 21:48:27,993 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 21:48:27,995 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 21:48:27,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 21:48:27,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:27,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 21:48:27,999 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:28,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:28,003 INFO L82 PathProgramCache]: Analyzing trace with hash 917918, now seen corresponding path program 1 times [2019-12-07 21:48:28,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:28,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996756445] [2019-12-07 21:48:28,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:28,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:28,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:28,144 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996756445] [2019-12-07 21:48:28,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:28,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:48:28,145 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956699196] [2019-12-07 21:48:28,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:28,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:28,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:28,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:28,159 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 21:48:28,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:28,910 INFO L93 Difference]: Finished difference Result 114110 states and 484570 transitions. [2019-12-07 21:48:28,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:28,911 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 21:48:28,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:29,540 INFO L225 Difference]: With dead ends: 114110 [2019-12-07 21:48:29,540 INFO L226 Difference]: Without dead ends: 107012 [2019-12-07 21:48:29,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:33,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107012 states. [2019-12-07 21:48:36,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107012 to 107012. [2019-12-07 21:48:36,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107012 states. [2019-12-07 21:48:36,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107012 states to 107012 states and 453812 transitions. [2019-12-07 21:48:36,993 INFO L78 Accepts]: Start accepts. Automaton has 107012 states and 453812 transitions. Word has length 3 [2019-12-07 21:48:36,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:36,993 INFO L462 AbstractCegarLoop]: Abstraction has 107012 states and 453812 transitions. [2019-12-07 21:48:36,993 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:36,993 INFO L276 IsEmpty]: Start isEmpty. Operand 107012 states and 453812 transitions. [2019-12-07 21:48:36,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 21:48:36,997 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:36,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:36,998 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:36,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:36,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1578322365, now seen corresponding path program 1 times [2019-12-07 21:48:36,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:36,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904841789] [2019-12-07 21:48:36,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:37,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:37,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:37,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904841789] [2019-12-07 21:48:37,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:37,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:37,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [6690991] [2019-12-07 21:48:37,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:48:37,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:37,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:48:37,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:37,071 INFO L87 Difference]: Start difference. First operand 107012 states and 453812 transitions. Second operand 4 states. [2019-12-07 21:48:38,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:38,173 INFO L93 Difference]: Finished difference Result 166210 states and 677236 transitions. [2019-12-07 21:48:38,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:48:38,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 21:48:38,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:38,569 INFO L225 Difference]: With dead ends: 166210 [2019-12-07 21:48:38,569 INFO L226 Difference]: Without dead ends: 166161 [2019-12-07 21:48:38,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:43,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166161 states. [2019-12-07 21:48:47,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166161 to 151748. [2019-12-07 21:48:47,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151748 states. [2019-12-07 21:48:48,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151748 states to 151748 states and 626089 transitions. [2019-12-07 21:48:48,284 INFO L78 Accepts]: Start accepts. Automaton has 151748 states and 626089 transitions. Word has length 11 [2019-12-07 21:48:48,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:48,284 INFO L462 AbstractCegarLoop]: Abstraction has 151748 states and 626089 transitions. [2019-12-07 21:48:48,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:48:48,284 INFO L276 IsEmpty]: Start isEmpty. Operand 151748 states and 626089 transitions. [2019-12-07 21:48:48,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 21:48:48,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:48,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:48,289 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:48,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:48,289 INFO L82 PathProgramCache]: Analyzing trace with hash 608601994, now seen corresponding path program 1 times [2019-12-07 21:48:48,289 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:48,289 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922697213] [2019-12-07 21:48:48,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:48,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:48,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:48,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922697213] [2019-12-07 21:48:48,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:48,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:48,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1922128112] [2019-12-07 21:48:48,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:48:48,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:48,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:48:48,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:48,337 INFO L87 Difference]: Start difference. First operand 151748 states and 626089 transitions. Second operand 4 states. [2019-12-07 21:48:49,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:49,498 INFO L93 Difference]: Finished difference Result 218525 states and 880843 transitions. [2019-12-07 21:48:49,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:48:49,499 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 21:48:49,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:50,053 INFO L225 Difference]: With dead ends: 218525 [2019-12-07 21:48:50,053 INFO L226 Difference]: Without dead ends: 218469 [2019-12-07 21:48:50,053 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:56,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218469 states. [2019-12-07 21:49:01,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218469 to 182894. [2019-12-07 21:49:01,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182894 states. [2019-12-07 21:49:01,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182894 states to 182894 states and 750285 transitions. [2019-12-07 21:49:01,993 INFO L78 Accepts]: Start accepts. Automaton has 182894 states and 750285 transitions. Word has length 13 [2019-12-07 21:49:01,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:49:01,994 INFO L462 AbstractCegarLoop]: Abstraction has 182894 states and 750285 transitions. [2019-12-07 21:49:01,994 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:49:01,994 INFO L276 IsEmpty]: Start isEmpty. Operand 182894 states and 750285 transitions. [2019-12-07 21:49:02,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 21:49:02,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:49:02,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:49:02,002 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:49:02,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:49:02,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1174763718, now seen corresponding path program 1 times [2019-12-07 21:49:02,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:49:02,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700549981] [2019-12-07 21:49:02,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:49:02,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:49:02,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:49:02,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1700549981] [2019-12-07 21:49:02,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:49:02,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:49:02,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13126420] [2019-12-07 21:49:02,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:49:02,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:49:02,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:49:02,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:49:02,052 INFO L87 Difference]: Start difference. First operand 182894 states and 750285 transitions. Second operand 5 states. [2019-12-07 21:49:03,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:49:03,409 INFO L93 Difference]: Finished difference Result 246966 states and 1003484 transitions. [2019-12-07 21:49:03,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 21:49:03,409 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 21:49:03,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:49:04,041 INFO L225 Difference]: With dead ends: 246966 [2019-12-07 21:49:04,041 INFO L226 Difference]: Without dead ends: 246966 [2019-12-07 21:49:04,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:49:10,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246966 states. [2019-12-07 21:49:16,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246966 to 202377. [2019-12-07 21:49:16,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202377 states. [2019-12-07 21:49:17,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202377 states to 202377 states and 829448 transitions. [2019-12-07 21:49:17,095 INFO L78 Accepts]: Start accepts. Automaton has 202377 states and 829448 transitions. Word has length 16 [2019-12-07 21:49:17,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:49:17,095 INFO L462 AbstractCegarLoop]: Abstraction has 202377 states and 829448 transitions. [2019-12-07 21:49:17,096 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:49:17,096 INFO L276 IsEmpty]: Start isEmpty. Operand 202377 states and 829448 transitions. [2019-12-07 21:49:17,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 21:49:17,110 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:49:17,110 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:49:17,110 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:49:17,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:49:17,110 INFO L82 PathProgramCache]: Analyzing trace with hash -1130186099, now seen corresponding path program 1 times [2019-12-07 21:49:17,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:49:17,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535989955] [2019-12-07 21:49:17,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:49:17,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:49:17,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:49:17,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535989955] [2019-12-07 21:49:17,165 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:49:17,165 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:49:17,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188574856] [2019-12-07 21:49:17,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:49:17,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:49:17,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:49:17,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:49:17,166 INFO L87 Difference]: Start difference. First operand 202377 states and 829448 transitions. Second operand 3 states. [2019-12-07 21:49:18,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:49:18,097 INFO L93 Difference]: Finished difference Result 202377 states and 821214 transitions. [2019-12-07 21:49:18,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:49:18,098 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 21:49:18,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:49:18,628 INFO L225 Difference]: With dead ends: 202377 [2019-12-07 21:49:18,628 INFO L226 Difference]: Without dead ends: 202377 [2019-12-07 21:49:18,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:49:24,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202377 states. [2019-12-07 21:49:27,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202377 to 199185. [2019-12-07 21:49:27,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199185 states. [2019-12-07 21:49:28,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199185 states to 199185 states and 809374 transitions. [2019-12-07 21:49:28,265 INFO L78 Accepts]: Start accepts. Automaton has 199185 states and 809374 transitions. Word has length 18 [2019-12-07 21:49:28,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:49:28,265 INFO L462 AbstractCegarLoop]: Abstraction has 199185 states and 809374 transitions. [2019-12-07 21:49:28,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:49:28,265 INFO L276 IsEmpty]: Start isEmpty. Operand 199185 states and 809374 transitions. [2019-12-07 21:49:28,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 21:49:28,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:49:28,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:49:28,277 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:49:28,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:49:28,278 INFO L82 PathProgramCache]: Analyzing trace with hash -1224828645, now seen corresponding path program 1 times [2019-12-07 21:49:28,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:49:28,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257860211] [2019-12-07 21:49:28,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:49:28,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:49:28,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:49:28,339 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257860211] [2019-12-07 21:49:28,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:49:28,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:49:28,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152939417] [2019-12-07 21:49:28,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:49:28,340 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:49:28,340 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:49:28,340 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:49:28,340 INFO L87 Difference]: Start difference. First operand 199185 states and 809374 transitions. Second operand 3 states. [2019-12-07 21:49:30,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:49:30,381 INFO L93 Difference]: Finished difference Result 356829 states and 1441369 transitions. [2019-12-07 21:49:30,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:49:30,381 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 21:49:30,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:49:31,181 INFO L225 Difference]: With dead ends: 356829 [2019-12-07 21:49:31,181 INFO L226 Difference]: Without dead ends: 323789 [2019-12-07 21:49:31,181 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:49:40,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323789 states. [2019-12-07 21:49:45,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323789 to 311331. [2019-12-07 21:49:45,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311331 states. [2019-12-07 21:49:46,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311331 states to 311331 states and 1266679 transitions. [2019-12-07 21:49:46,937 INFO L78 Accepts]: Start accepts. Automaton has 311331 states and 1266679 transitions. Word has length 18 [2019-12-07 21:49:46,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:49:46,938 INFO L462 AbstractCegarLoop]: Abstraction has 311331 states and 1266679 transitions. [2019-12-07 21:49:46,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:49:46,938 INFO L276 IsEmpty]: Start isEmpty. Operand 311331 states and 1266679 transitions. [2019-12-07 21:49:46,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 21:49:46,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:49:46,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:49:46,955 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:49:46,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:49:46,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1770026118, now seen corresponding path program 1 times [2019-12-07 21:49:46,955 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:49:46,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649248143] [2019-12-07 21:49:46,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:49:46,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:49:47,001 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:49:47,001 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649248143] [2019-12-07 21:49:47,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:49:47,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:49:47,002 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543411663] [2019-12-07 21:49:47,002 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:49:47,002 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:49:47,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:49:47,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:49:47,003 INFO L87 Difference]: Start difference. First operand 311331 states and 1266679 transitions. Second operand 5 states. [2019-12-07 21:49:50,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:49:50,027 INFO L93 Difference]: Finished difference Result 416517 states and 1666224 transitions. [2019-12-07 21:49:50,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 21:49:50,028 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 21:49:50,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:49:51,108 INFO L225 Difference]: With dead ends: 416517 [2019-12-07 21:49:51,108 INFO L226 Difference]: Without dead ends: 416419 [2019-12-07 21:49:51,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:50:02,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416419 states. [2019-12-07 21:50:07,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416419 to 325487. [2019-12-07 21:50:07,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325487 states. [2019-12-07 21:50:09,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325487 states to 325487 states and 1322790 transitions. [2019-12-07 21:50:09,403 INFO L78 Accepts]: Start accepts. Automaton has 325487 states and 1322790 transitions. Word has length 19 [2019-12-07 21:50:09,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:50:09,403 INFO L462 AbstractCegarLoop]: Abstraction has 325487 states and 1322790 transitions. [2019-12-07 21:50:09,403 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:50:09,403 INFO L276 IsEmpty]: Start isEmpty. Operand 325487 states and 1322790 transitions. [2019-12-07 21:50:09,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 21:50:09,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:50:09,426 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:50:09,426 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:50:09,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:50:09,427 INFO L82 PathProgramCache]: Analyzing trace with hash 1476369392, now seen corresponding path program 1 times [2019-12-07 21:50:09,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:50:09,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307467093] [2019-12-07 21:50:09,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:50:09,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:50:09,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:50:09,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307467093] [2019-12-07 21:50:09,454 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:50:09,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:50:09,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1621830943] [2019-12-07 21:50:09,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:50:09,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:50:09,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:50:09,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:50:09,455 INFO L87 Difference]: Start difference. First operand 325487 states and 1322790 transitions. Second operand 3 states. [2019-12-07 21:50:11,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:50:11,534 INFO L93 Difference]: Finished difference Result 322858 states and 1311997 transitions. [2019-12-07 21:50:11,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:50:11,535 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 21:50:11,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:50:12,337 INFO L225 Difference]: With dead ends: 322858 [2019-12-07 21:50:12,337 INFO L226 Difference]: Without dead ends: 322858 [2019-12-07 21:50:12,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:50:19,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322858 states. [2019-12-07 21:50:23,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322858 to 297550. [2019-12-07 21:50:23,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297550 states. [2019-12-07 21:50:24,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297550 states to 297550 states and 1208941 transitions. [2019-12-07 21:50:24,814 INFO L78 Accepts]: Start accepts. Automaton has 297550 states and 1208941 transitions. Word has length 19 [2019-12-07 21:50:24,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:50:24,815 INFO L462 AbstractCegarLoop]: Abstraction has 297550 states and 1208941 transitions. [2019-12-07 21:50:24,815 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:50:24,815 INFO L276 IsEmpty]: Start isEmpty. Operand 297550 states and 1208941 transitions. [2019-12-07 21:50:24,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 21:50:24,840 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:50:24,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:50:24,841 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:50:24,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:50:24,841 INFO L82 PathProgramCache]: Analyzing trace with hash 454537609, now seen corresponding path program 1 times [2019-12-07 21:50:24,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:50:24,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881081145] [2019-12-07 21:50:24,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:50:24,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:50:24,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:50:24,883 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881081145] [2019-12-07 21:50:24,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:50:24,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:50:24,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919151925] [2019-12-07 21:50:24,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:50:24,884 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:50:24,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:50:24,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:50:24,885 INFO L87 Difference]: Start difference. First operand 297550 states and 1208941 transitions. Second operand 4 states. [2019-12-07 21:50:29,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:50:29,598 INFO L93 Difference]: Finished difference Result 335336 states and 1350580 transitions. [2019-12-07 21:50:29,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:50:29,599 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 21:50:29,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:50:30,409 INFO L225 Difference]: With dead ends: 335336 [2019-12-07 21:50:30,409 INFO L226 Difference]: Without dead ends: 335336 [2019-12-07 21:50:30,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:50:37,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335336 states. [2019-12-07 21:50:42,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335336 to 297526. [2019-12-07 21:50:42,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297526 states. [2019-12-07 21:50:43,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297526 states to 297526 states and 1208846 transitions. [2019-12-07 21:50:43,175 INFO L78 Accepts]: Start accepts. Automaton has 297526 states and 1208846 transitions. Word has length 20 [2019-12-07 21:50:43,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:50:43,175 INFO L462 AbstractCegarLoop]: Abstraction has 297526 states and 1208846 transitions. [2019-12-07 21:50:43,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:50:43,175 INFO L276 IsEmpty]: Start isEmpty. Operand 297526 states and 1208846 transitions. [2019-12-07 21:50:43,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 21:50:43,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:50:43,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:50:43,208 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:50:43,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:50:43,208 INFO L82 PathProgramCache]: Analyzing trace with hash -50907777, now seen corresponding path program 1 times [2019-12-07 21:50:43,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:50:43,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836921373] [2019-12-07 21:50:43,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:50:43,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:50:43,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:50:43,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836921373] [2019-12-07 21:50:43,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:50:43,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:50:43,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935403065] [2019-12-07 21:50:43,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:50:43,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:50:43,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:50:43,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:50:43,248 INFO L87 Difference]: Start difference. First operand 297526 states and 1208846 transitions. Second operand 4 states. [2019-12-07 21:50:46,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:50:46,278 INFO L93 Difference]: Finished difference Result 459133 states and 1856451 transitions. [2019-12-07 21:50:46,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:50:46,279 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 21 [2019-12-07 21:50:46,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:50:47,387 INFO L225 Difference]: With dead ends: 459133 [2019-12-07 21:50:47,387 INFO L226 Difference]: Without dead ends: 411694 [2019-12-07 21:50:47,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:50:55,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411694 states. [2019-12-07 21:51:00,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411694 to 287144. [2019-12-07 21:51:00,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287144 states. [2019-12-07 21:51:01,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287144 states to 287144 states and 1161745 transitions. [2019-12-07 21:51:01,053 INFO L78 Accepts]: Start accepts. Automaton has 287144 states and 1161745 transitions. Word has length 21 [2019-12-07 21:51:01,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:01,054 INFO L462 AbstractCegarLoop]: Abstraction has 287144 states and 1161745 transitions. [2019-12-07 21:51:01,054 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:51:01,054 INFO L276 IsEmpty]: Start isEmpty. Operand 287144 states and 1161745 transitions. [2019-12-07 21:51:01,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 21:51:01,082 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:01,082 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:01,082 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:01,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:01,083 INFO L82 PathProgramCache]: Analyzing trace with hash -31915662, now seen corresponding path program 1 times [2019-12-07 21:51:01,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:01,083 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224051259] [2019-12-07 21:51:01,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:01,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:01,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:01,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224051259] [2019-12-07 21:51:01,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:01,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:51:01,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596079056] [2019-12-07 21:51:01,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:51:01,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:01,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:51:01,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:01,106 INFO L87 Difference]: Start difference. First operand 287144 states and 1161745 transitions. Second operand 3 states. [2019-12-07 21:51:01,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:01,289 INFO L93 Difference]: Finished difference Result 56769 states and 181021 transitions. [2019-12-07 21:51:01,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:51:01,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 21:51:01,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:01,375 INFO L225 Difference]: With dead ends: 56769 [2019-12-07 21:51:01,376 INFO L226 Difference]: Without dead ends: 56769 [2019-12-07 21:51:01,376 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:02,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56769 states. [2019-12-07 21:51:02,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56769 to 56769. [2019-12-07 21:51:02,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56769 states. [2019-12-07 21:51:02,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56769 states to 56769 states and 181021 transitions. [2019-12-07 21:51:02,678 INFO L78 Accepts]: Start accepts. Automaton has 56769 states and 181021 transitions. Word has length 21 [2019-12-07 21:51:02,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:02,678 INFO L462 AbstractCegarLoop]: Abstraction has 56769 states and 181021 transitions. [2019-12-07 21:51:02,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:51:02,678 INFO L276 IsEmpty]: Start isEmpty. Operand 56769 states and 181021 transitions. [2019-12-07 21:51:02,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 21:51:02,683 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:02,684 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:02,684 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:02,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:02,684 INFO L82 PathProgramCache]: Analyzing trace with hash -219431606, now seen corresponding path program 1 times [2019-12-07 21:51:02,684 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:02,684 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456817307] [2019-12-07 21:51:02,684 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:02,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:02,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:02,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456817307] [2019-12-07 21:51:02,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:02,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:51:02,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872906970] [2019-12-07 21:51:02,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:51:02,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:02,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:51:02,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:51:02,723 INFO L87 Difference]: Start difference. First operand 56769 states and 181021 transitions. Second operand 6 states. [2019-12-07 21:51:03,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:03,337 INFO L93 Difference]: Finished difference Result 82600 states and 257673 transitions. [2019-12-07 21:51:03,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 21:51:03,337 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 21:51:03,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:03,454 INFO L225 Difference]: With dead ends: 82600 [2019-12-07 21:51:03,454 INFO L226 Difference]: Without dead ends: 82551 [2019-12-07 21:51:03,454 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 21:51:03,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82551 states. [2019-12-07 21:51:05,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82551 to 63907. [2019-12-07 21:51:05,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63907 states. [2019-12-07 21:51:05,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63907 states to 63907 states and 202249 transitions. [2019-12-07 21:51:05,784 INFO L78 Accepts]: Start accepts. Automaton has 63907 states and 202249 transitions. Word has length 22 [2019-12-07 21:51:05,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:05,785 INFO L462 AbstractCegarLoop]: Abstraction has 63907 states and 202249 transitions. [2019-12-07 21:51:05,785 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:51:05,785 INFO L276 IsEmpty]: Start isEmpty. Operand 63907 states and 202249 transitions. [2019-12-07 21:51:05,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 21:51:05,799 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:05,800 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:05,800 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:05,800 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:05,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1790545903, now seen corresponding path program 1 times [2019-12-07 21:51:05,800 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:05,800 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872658174] [2019-12-07 21:51:05,800 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:05,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:05,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:05,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872658174] [2019-12-07 21:51:05,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:05,849 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:51:05,849 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118431298] [2019-12-07 21:51:05,849 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:51:05,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:05,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:51:05,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:51:05,850 INFO L87 Difference]: Start difference. First operand 63907 states and 202249 transitions. Second operand 6 states. [2019-12-07 21:51:06,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:06,324 INFO L93 Difference]: Finished difference Result 82695 states and 256419 transitions. [2019-12-07 21:51:06,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 21:51:06,324 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 21:51:06,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:06,434 INFO L225 Difference]: With dead ends: 82695 [2019-12-07 21:51:06,435 INFO L226 Difference]: Without dead ends: 82466 [2019-12-07 21:51:06,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:51:06,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82466 states. [2019-12-07 21:51:07,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82466 to 65158. [2019-12-07 21:51:07,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65158 states. [2019-12-07 21:51:07,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65158 states to 65158 states and 205799 transitions. [2019-12-07 21:51:07,739 INFO L78 Accepts]: Start accepts. Automaton has 65158 states and 205799 transitions. Word has length 27 [2019-12-07 21:51:07,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:07,740 INFO L462 AbstractCegarLoop]: Abstraction has 65158 states and 205799 transitions. [2019-12-07 21:51:07,740 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:51:07,740 INFO L276 IsEmpty]: Start isEmpty. Operand 65158 states and 205799 transitions. [2019-12-07 21:51:07,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 21:51:07,761 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:07,761 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:07,761 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:07,761 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:07,761 INFO L82 PathProgramCache]: Analyzing trace with hash 101231732, now seen corresponding path program 1 times [2019-12-07 21:51:07,761 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:07,762 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456133391] [2019-12-07 21:51:07,762 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:07,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:07,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:07,792 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456133391] [2019-12-07 21:51:07,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:07,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:51:07,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893402649] [2019-12-07 21:51:07,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:51:07,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:07,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:51:07,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:51:07,793 INFO L87 Difference]: Start difference. First operand 65158 states and 205799 transitions. Second operand 4 states. [2019-12-07 21:51:07,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:07,871 INFO L93 Difference]: Finished difference Result 24830 states and 75182 transitions. [2019-12-07 21:51:07,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:51:07,872 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 21:51:07,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:07,904 INFO L225 Difference]: With dead ends: 24830 [2019-12-07 21:51:07,904 INFO L226 Difference]: Without dead ends: 24823 [2019-12-07 21:51:07,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:51:07,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24823 states. [2019-12-07 21:51:08,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24823 to 23414. [2019-12-07 21:51:08,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23414 states. [2019-12-07 21:51:08,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23414 states to 23414 states and 71016 transitions. [2019-12-07 21:51:08,248 INFO L78 Accepts]: Start accepts. Automaton has 23414 states and 71016 transitions. Word has length 30 [2019-12-07 21:51:08,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:08,248 INFO L462 AbstractCegarLoop]: Abstraction has 23414 states and 71016 transitions. [2019-12-07 21:51:08,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:51:08,248 INFO L276 IsEmpty]: Start isEmpty. Operand 23414 states and 71016 transitions. [2019-12-07 21:51:08,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 21:51:08,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:08,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:08,266 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:08,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:08,267 INFO L82 PathProgramCache]: Analyzing trace with hash -718999585, now seen corresponding path program 1 times [2019-12-07 21:51:08,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:08,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762153344] [2019-12-07 21:51:08,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:08,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:08,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:08,311 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762153344] [2019-12-07 21:51:08,311 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:08,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:51:08,311 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [669628463] [2019-12-07 21:51:08,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:51:08,312 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:08,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:51:08,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:51:08,312 INFO L87 Difference]: Start difference. First operand 23414 states and 71016 transitions. Second operand 7 states. [2019-12-07 21:51:09,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:09,004 INFO L93 Difference]: Finished difference Result 29795 states and 87851 transitions. [2019-12-07 21:51:09,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 21:51:09,005 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 21:51:09,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:09,039 INFO L225 Difference]: With dead ends: 29795 [2019-12-07 21:51:09,039 INFO L226 Difference]: Without dead ends: 29795 [2019-12-07 21:51:09,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 21:51:09,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29795 states. [2019-12-07 21:51:09,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29795 to 22977. [2019-12-07 21:51:09,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22977 states. [2019-12-07 21:51:09,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22977 states to 22977 states and 69849 transitions. [2019-12-07 21:51:09,419 INFO L78 Accepts]: Start accepts. Automaton has 22977 states and 69849 transitions. Word has length 33 [2019-12-07 21:51:09,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:09,419 INFO L462 AbstractCegarLoop]: Abstraction has 22977 states and 69849 transitions. [2019-12-07 21:51:09,419 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:51:09,419 INFO L276 IsEmpty]: Start isEmpty. Operand 22977 states and 69849 transitions. [2019-12-07 21:51:09,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 21:51:09,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:09,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:09,438 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:09,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:09,438 INFO L82 PathProgramCache]: Analyzing trace with hash -1494536628, now seen corresponding path program 1 times [2019-12-07 21:51:09,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:09,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1649337775] [2019-12-07 21:51:09,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:09,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:09,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:09,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1649337775] [2019-12-07 21:51:09,464 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:09,464 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:51:09,464 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723897377] [2019-12-07 21:51:09,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:51:09,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:09,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:51:09,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:09,464 INFO L87 Difference]: Start difference. First operand 22977 states and 69849 transitions. Second operand 3 states. [2019-12-07 21:51:09,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:09,530 INFO L93 Difference]: Finished difference Result 21994 states and 65815 transitions. [2019-12-07 21:51:09,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:51:09,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 21:51:09,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:09,554 INFO L225 Difference]: With dead ends: 21994 [2019-12-07 21:51:09,554 INFO L226 Difference]: Without dead ends: 21994 [2019-12-07 21:51:09,554 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:09,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21994 states. [2019-12-07 21:51:09,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21994 to 21862. [2019-12-07 21:51:09,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21862 states. [2019-12-07 21:51:09,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21862 states to 21862 states and 65446 transitions. [2019-12-07 21:51:09,963 INFO L78 Accepts]: Start accepts. Automaton has 21862 states and 65446 transitions. Word has length 41 [2019-12-07 21:51:09,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:09,963 INFO L462 AbstractCegarLoop]: Abstraction has 21862 states and 65446 transitions. [2019-12-07 21:51:09,963 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:51:09,963 INFO L276 IsEmpty]: Start isEmpty. Operand 21862 states and 65446 transitions. [2019-12-07 21:51:09,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 21:51:09,978 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:09,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:09,978 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:09,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:09,978 INFO L82 PathProgramCache]: Analyzing trace with hash -2107392736, now seen corresponding path program 1 times [2019-12-07 21:51:09,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:09,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253889531] [2019-12-07 21:51:09,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:09,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:10,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:10,015 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253889531] [2019-12-07 21:51:10,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:10,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:51:10,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1889184873] [2019-12-07 21:51:10,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:51:10,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:10,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:51:10,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:51:10,015 INFO L87 Difference]: Start difference. First operand 21862 states and 65446 transitions. Second operand 4 states. [2019-12-07 21:51:10,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:10,104 INFO L93 Difference]: Finished difference Result 34443 states and 104503 transitions. [2019-12-07 21:51:10,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:51:10,105 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 42 [2019-12-07 21:51:10,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:10,120 INFO L225 Difference]: With dead ends: 34443 [2019-12-07 21:51:10,120 INFO L226 Difference]: Without dead ends: 13970 [2019-12-07 21:51:10,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:51:10,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13970 states. [2019-12-07 21:51:10,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13970 to 13970. [2019-12-07 21:51:10,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13970 states. [2019-12-07 21:51:10,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13970 states to 13970 states and 42455 transitions. [2019-12-07 21:51:10,314 INFO L78 Accepts]: Start accepts. Automaton has 13970 states and 42455 transitions. Word has length 42 [2019-12-07 21:51:10,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:10,315 INFO L462 AbstractCegarLoop]: Abstraction has 13970 states and 42455 transitions. [2019-12-07 21:51:10,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:51:10,315 INFO L276 IsEmpty]: Start isEmpty. Operand 13970 states and 42455 transitions. [2019-12-07 21:51:10,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 21:51:10,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:10,327 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:10,327 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:10,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:10,327 INFO L82 PathProgramCache]: Analyzing trace with hash 1991608764, now seen corresponding path program 2 times [2019-12-07 21:51:10,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:10,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845058911] [2019-12-07 21:51:10,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:10,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:10,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:10,365 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845058911] [2019-12-07 21:51:10,365 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:10,365 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:51:10,366 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462307653] [2019-12-07 21:51:10,366 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:51:10,366 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:10,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:51:10,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:51:10,366 INFO L87 Difference]: Start difference. First operand 13970 states and 42455 transitions. Second operand 5 states. [2019-12-07 21:51:10,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:10,428 INFO L93 Difference]: Finished difference Result 12806 states and 39871 transitions. [2019-12-07 21:51:10,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:51:10,428 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 21:51:10,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:10,441 INFO L225 Difference]: With dead ends: 12806 [2019-12-07 21:51:10,442 INFO L226 Difference]: Without dead ends: 12061 [2019-12-07 21:51:10,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:51:10,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12061 states. [2019-12-07 21:51:10,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12061 to 8605. [2019-12-07 21:51:10,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8605 states. [2019-12-07 21:51:10,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8605 states to 8605 states and 26891 transitions. [2019-12-07 21:51:10,599 INFO L78 Accepts]: Start accepts. Automaton has 8605 states and 26891 transitions. Word has length 42 [2019-12-07 21:51:10,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:10,599 INFO L462 AbstractCegarLoop]: Abstraction has 8605 states and 26891 transitions. [2019-12-07 21:51:10,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:51:10,599 INFO L276 IsEmpty]: Start isEmpty. Operand 8605 states and 26891 transitions. [2019-12-07 21:51:10,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:10,607 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:10,607 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:10,607 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:10,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:10,607 INFO L82 PathProgramCache]: Analyzing trace with hash 489675312, now seen corresponding path program 1 times [2019-12-07 21:51:10,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:10,607 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311142241] [2019-12-07 21:51:10,607 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:10,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:10,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:10,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311142241] [2019-12-07 21:51:10,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:10,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:51:10,631 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955954832] [2019-12-07 21:51:10,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:51:10,632 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:10,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:51:10,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:10,632 INFO L87 Difference]: Start difference. First operand 8605 states and 26891 transitions. Second operand 3 states. [2019-12-07 21:51:10,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:10,679 INFO L93 Difference]: Finished difference Result 12941 states and 39734 transitions. [2019-12-07 21:51:10,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:51:10,680 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 21:51:10,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:10,694 INFO L225 Difference]: With dead ends: 12941 [2019-12-07 21:51:10,694 INFO L226 Difference]: Without dead ends: 12941 [2019-12-07 21:51:10,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:10,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12941 states. [2019-12-07 21:51:10,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12941 to 10235. [2019-12-07 21:51:10,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10235 states. [2019-12-07 21:51:10,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10235 states to 10235 states and 31605 transitions. [2019-12-07 21:51:10,864 INFO L78 Accepts]: Start accepts. Automaton has 10235 states and 31605 transitions. Word has length 66 [2019-12-07 21:51:10,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:10,864 INFO L462 AbstractCegarLoop]: Abstraction has 10235 states and 31605 transitions. [2019-12-07 21:51:10,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:51:10,865 INFO L276 IsEmpty]: Start isEmpty. Operand 10235 states and 31605 transitions. [2019-12-07 21:51:10,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:10,873 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:10,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:10,873 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:10,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:10,873 INFO L82 PathProgramCache]: Analyzing trace with hash -926860960, now seen corresponding path program 1 times [2019-12-07 21:51:10,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:10,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947950663] [2019-12-07 21:51:10,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:10,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:10,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:10,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [947950663] [2019-12-07 21:51:10,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:10,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 21:51:10,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993783257] [2019-12-07 21:51:10,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 21:51:10,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:10,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 21:51:10,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 21:51:10,965 INFO L87 Difference]: Start difference. First operand 10235 states and 31605 transitions. Second operand 8 states. [2019-12-07 21:51:12,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:12,392 INFO L93 Difference]: Finished difference Result 17701 states and 53726 transitions. [2019-12-07 21:51:12,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 21:51:12,393 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 21:51:12,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:12,432 INFO L225 Difference]: With dead ends: 17701 [2019-12-07 21:51:12,432 INFO L226 Difference]: Without dead ends: 17701 [2019-12-07 21:51:12,433 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:51:12,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17701 states. [2019-12-07 21:51:12,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17701 to 12333. [2019-12-07 21:51:12,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12333 states. [2019-12-07 21:51:12,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12333 states to 12333 states and 37904 transitions. [2019-12-07 21:51:12,659 INFO L78 Accepts]: Start accepts. Automaton has 12333 states and 37904 transitions. Word has length 66 [2019-12-07 21:51:12,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:12,659 INFO L462 AbstractCegarLoop]: Abstraction has 12333 states and 37904 transitions. [2019-12-07 21:51:12,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 21:51:12,659 INFO L276 IsEmpty]: Start isEmpty. Operand 12333 states and 37904 transitions. [2019-12-07 21:51:12,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:12,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:12,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:12,671 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:12,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:12,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1192128352, now seen corresponding path program 2 times [2019-12-07 21:51:12,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:12,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817874253] [2019-12-07 21:51:12,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:12,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:12,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:12,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817874253] [2019-12-07 21:51:12,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:12,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:51:12,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667476103] [2019-12-07 21:51:12,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:51:12,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:12,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:51:12,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:51:12,733 INFO L87 Difference]: Start difference. First operand 12333 states and 37904 transitions. Second operand 4 states. [2019-12-07 21:51:12,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:12,792 INFO L93 Difference]: Finished difference Result 21441 states and 66109 transitions. [2019-12-07 21:51:12,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:51:12,793 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 21:51:12,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:12,803 INFO L225 Difference]: With dead ends: 21441 [2019-12-07 21:51:12,803 INFO L226 Difference]: Without dead ends: 9885 [2019-12-07 21:51:12,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:51:12,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9885 states. [2019-12-07 21:51:12,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9885 to 9885. [2019-12-07 21:51:12,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9885 states. [2019-12-07 21:51:12,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9885 states to 9885 states and 30389 transitions. [2019-12-07 21:51:12,947 INFO L78 Accepts]: Start accepts. Automaton has 9885 states and 30389 transitions. Word has length 66 [2019-12-07 21:51:12,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:12,947 INFO L462 AbstractCegarLoop]: Abstraction has 9885 states and 30389 transitions. [2019-12-07 21:51:12,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:51:12,947 INFO L276 IsEmpty]: Start isEmpty. Operand 9885 states and 30389 transitions. [2019-12-07 21:51:12,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:12,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:12,955 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:12,955 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:12,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:12,956 INFO L82 PathProgramCache]: Analyzing trace with hash 1338482558, now seen corresponding path program 3 times [2019-12-07 21:51:12,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:12,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143797029] [2019-12-07 21:51:12,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:12,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:13,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:13,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [143797029] [2019-12-07 21:51:13,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:13,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 21:51:13,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297187565] [2019-12-07 21:51:13,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 21:51:13,069 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:13,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 21:51:13,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:51:13,070 INFO L87 Difference]: Start difference. First operand 9885 states and 30389 transitions. Second operand 10 states. [2019-12-07 21:51:13,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:13,746 INFO L93 Difference]: Finished difference Result 20839 states and 62908 transitions. [2019-12-07 21:51:13,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 21:51:13,746 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 21:51:13,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:13,760 INFO L225 Difference]: With dead ends: 20839 [2019-12-07 21:51:13,760 INFO L226 Difference]: Without dead ends: 14077 [2019-12-07 21:51:13,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=271, Unknown=0, NotChecked=0, Total=342 [2019-12-07 21:51:13,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14077 states. [2019-12-07 21:51:13,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14077 to 11561. [2019-12-07 21:51:13,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11561 states. [2019-12-07 21:51:13,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11561 states to 11561 states and 34959 transitions. [2019-12-07 21:51:13,954 INFO L78 Accepts]: Start accepts. Automaton has 11561 states and 34959 transitions. Word has length 66 [2019-12-07 21:51:13,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:13,954 INFO L462 AbstractCegarLoop]: Abstraction has 11561 states and 34959 transitions. [2019-12-07 21:51:13,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 21:51:13,954 INFO L276 IsEmpty]: Start isEmpty. Operand 11561 states and 34959 transitions. [2019-12-07 21:51:13,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:13,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:13,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:13,964 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:13,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:13,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1282024016, now seen corresponding path program 4 times [2019-12-07 21:51:13,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:13,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589608263] [2019-12-07 21:51:13,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:13,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:14,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:14,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [589608263] [2019-12-07 21:51:14,051 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:14,051 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 21:51:14,051 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2117238248] [2019-12-07 21:51:14,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:51:14,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:14,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:51:14,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:51:14,051 INFO L87 Difference]: Start difference. First operand 11561 states and 34959 transitions. Second operand 7 states. [2019-12-07 21:51:14,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:14,256 INFO L93 Difference]: Finished difference Result 21369 states and 63740 transitions. [2019-12-07 21:51:14,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 21:51:14,256 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 21:51:14,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:14,272 INFO L225 Difference]: With dead ends: 21369 [2019-12-07 21:51:14,272 INFO L226 Difference]: Without dead ends: 15197 [2019-12-07 21:51:14,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 21:51:14,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15197 states. [2019-12-07 21:51:14,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15197 to 12411. [2019-12-07 21:51:14,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12411 states. [2019-12-07 21:51:14,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12411 states to 12411 states and 37275 transitions. [2019-12-07 21:51:14,475 INFO L78 Accepts]: Start accepts. Automaton has 12411 states and 37275 transitions. Word has length 66 [2019-12-07 21:51:14,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:14,475 INFO L462 AbstractCegarLoop]: Abstraction has 12411 states and 37275 transitions. [2019-12-07 21:51:14,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:51:14,475 INFO L276 IsEmpty]: Start isEmpty. Operand 12411 states and 37275 transitions. [2019-12-07 21:51:14,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:14,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:14,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:14,487 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:14,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:14,487 INFO L82 PathProgramCache]: Analyzing trace with hash -806923488, now seen corresponding path program 5 times [2019-12-07 21:51:14,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:14,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559356292] [2019-12-07 21:51:14,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:14,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:14,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:14,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [559356292] [2019-12-07 21:51:14,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:14,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 21:51:14,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773742791] [2019-12-07 21:51:14,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 21:51:14,795 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:14,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 21:51:14,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 21:51:14,795 INFO L87 Difference]: Start difference. First operand 12411 states and 37275 transitions. Second operand 16 states. [2019-12-07 21:51:16,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:16,485 INFO L93 Difference]: Finished difference Result 24838 states and 74749 transitions. [2019-12-07 21:51:16,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 21:51:16,485 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 21:51:16,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:16,507 INFO L225 Difference]: With dead ends: 24838 [2019-12-07 21:51:16,508 INFO L226 Difference]: Without dead ends: 20106 [2019-12-07 21:51:16,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 481 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=345, Invalid=1635, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 21:51:16,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20106 states. [2019-12-07 21:51:16,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20106 to 16514. [2019-12-07 21:51:16,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16514 states. [2019-12-07 21:51:16,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16514 states to 16514 states and 49801 transitions. [2019-12-07 21:51:16,778 INFO L78 Accepts]: Start accepts. Automaton has 16514 states and 49801 transitions. Word has length 66 [2019-12-07 21:51:16,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:16,778 INFO L462 AbstractCegarLoop]: Abstraction has 16514 states and 49801 transitions. [2019-12-07 21:51:16,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 21:51:16,778 INFO L276 IsEmpty]: Start isEmpty. Operand 16514 states and 49801 transitions. [2019-12-07 21:51:16,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:16,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:16,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:16,793 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:16,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:16,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1843066373, now seen corresponding path program 1 times [2019-12-07 21:51:16,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:16,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1903125830] [2019-12-07 21:51:16,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:16,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:16,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:16,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1903125830] [2019-12-07 21:51:16,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:16,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:51:16,823 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741778122] [2019-12-07 21:51:16,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:51:16,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:16,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:51:16,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:16,824 INFO L87 Difference]: Start difference. First operand 16514 states and 49801 transitions. Second operand 3 states. [2019-12-07 21:51:16,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:16,895 INFO L93 Difference]: Finished difference Result 19210 states and 57135 transitions. [2019-12-07 21:51:16,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:51:16,895 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 21:51:16,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:16,916 INFO L225 Difference]: With dead ends: 19210 [2019-12-07 21:51:16,916 INFO L226 Difference]: Without dead ends: 19210 [2019-12-07 21:51:16,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:16,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19210 states. [2019-12-07 21:51:17,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19210 to 13897. [2019-12-07 21:51:17,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13897 states. [2019-12-07 21:51:17,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13897 states to 13897 states and 41173 transitions. [2019-12-07 21:51:17,162 INFO L78 Accepts]: Start accepts. Automaton has 13897 states and 41173 transitions. Word has length 66 [2019-12-07 21:51:17,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:17,162 INFO L462 AbstractCegarLoop]: Abstraction has 13897 states and 41173 transitions. [2019-12-07 21:51:17,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:51:17,162 INFO L276 IsEmpty]: Start isEmpty. Operand 13897 states and 41173 transitions. [2019-12-07 21:51:17,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:17,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:17,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:17,176 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:17,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:17,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1662390436, now seen corresponding path program 6 times [2019-12-07 21:51:17,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:17,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967068297] [2019-12-07 21:51:17,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:17,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:17,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:17,297 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [967068297] [2019-12-07 21:51:17,297 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:17,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 21:51:17,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402356228] [2019-12-07 21:51:17,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 21:51:17,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:17,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 21:51:17,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:51:17,298 INFO L87 Difference]: Start difference. First operand 13897 states and 41173 transitions. Second operand 10 states. [2019-12-07 21:51:17,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:17,946 INFO L93 Difference]: Finished difference Result 21785 states and 63752 transitions. [2019-12-07 21:51:17,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 21:51:17,946 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 21:51:17,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:17,966 INFO L225 Difference]: With dead ends: 21785 [2019-12-07 21:51:17,967 INFO L226 Difference]: Without dead ends: 17033 [2019-12-07 21:51:17,967 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=219, Invalid=837, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 21:51:18,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17033 states. [2019-12-07 21:51:18,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17033 to 13718. [2019-12-07 21:51:18,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13718 states. [2019-12-07 21:51:18,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13718 states to 13718 states and 40633 transitions. [2019-12-07 21:51:18,186 INFO L78 Accepts]: Start accepts. Automaton has 13718 states and 40633 transitions. Word has length 66 [2019-12-07 21:51:18,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:18,186 INFO L462 AbstractCegarLoop]: Abstraction has 13718 states and 40633 transitions. [2019-12-07 21:51:18,186 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 21:51:18,186 INFO L276 IsEmpty]: Start isEmpty. Operand 13718 states and 40633 transitions. [2019-12-07 21:51:18,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:18,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:18,199 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:18,199 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:18,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:18,199 INFO L82 PathProgramCache]: Analyzing trace with hash 1119890552, now seen corresponding path program 7 times [2019-12-07 21:51:18,199 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:18,199 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152622292] [2019-12-07 21:51:18,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:18,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:18,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:18,322 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152622292] [2019-12-07 21:51:18,322 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:18,322 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 21:51:18,322 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434423523] [2019-12-07 21:51:18,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 21:51:18,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:18,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 21:51:18,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:51:18,323 INFO L87 Difference]: Start difference. First operand 13718 states and 40633 transitions. Second operand 11 states. [2019-12-07 21:51:19,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:19,092 INFO L93 Difference]: Finished difference Result 21706 states and 63778 transitions. [2019-12-07 21:51:19,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 21:51:19,092 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 21:51:19,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:19,108 INFO L225 Difference]: With dead ends: 21706 [2019-12-07 21:51:19,108 INFO L226 Difference]: Without dead ends: 15649 [2019-12-07 21:51:19,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=241, Invalid=1019, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 21:51:19,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15649 states. [2019-12-07 21:51:19,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15649 to 13191. [2019-12-07 21:51:19,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13191 states. [2019-12-07 21:51:19,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13191 states to 13191 states and 38755 transitions. [2019-12-07 21:51:19,318 INFO L78 Accepts]: Start accepts. Automaton has 13191 states and 38755 transitions. Word has length 66 [2019-12-07 21:51:19,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:19,318 INFO L462 AbstractCegarLoop]: Abstraction has 13191 states and 38755 transitions. [2019-12-07 21:51:19,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 21:51:19,318 INFO L276 IsEmpty]: Start isEmpty. Operand 13191 states and 38755 transitions. [2019-12-07 21:51:19,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:19,330 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:19,330 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:19,330 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:19,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:19,330 INFO L82 PathProgramCache]: Analyzing trace with hash -1011009474, now seen corresponding path program 8 times [2019-12-07 21:51:19,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:19,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84498129] [2019-12-07 21:51:19,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:19,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:19,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:19,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84498129] [2019-12-07 21:51:19,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:19,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 21:51:19,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055315091] [2019-12-07 21:51:19,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 21:51:19,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:19,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 21:51:19,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 21:51:19,457 INFO L87 Difference]: Start difference. First operand 13191 states and 38755 transitions. Second operand 12 states. [2019-12-07 21:51:20,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:20,323 INFO L93 Difference]: Finished difference Result 15990 states and 46464 transitions. [2019-12-07 21:51:20,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 21:51:20,323 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 21:51:20,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:20,339 INFO L225 Difference]: With dead ends: 15990 [2019-12-07 21:51:20,339 INFO L226 Difference]: Without dead ends: 15007 [2019-12-07 21:51:20,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=231, Invalid=1029, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 21:51:20,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15007 states. [2019-12-07 21:51:20,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15007 to 12083. [2019-12-07 21:51:20,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12083 states. [2019-12-07 21:51:20,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12083 states to 12083 states and 35779 transitions. [2019-12-07 21:51:20,542 INFO L78 Accepts]: Start accepts. Automaton has 12083 states and 35779 transitions. Word has length 66 [2019-12-07 21:51:20,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:20,542 INFO L462 AbstractCegarLoop]: Abstraction has 12083 states and 35779 transitions. [2019-12-07 21:51:20,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 21:51:20,542 INFO L276 IsEmpty]: Start isEmpty. Operand 12083 states and 35779 transitions. [2019-12-07 21:51:20,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:51:20,553 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:20,553 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:20,553 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:20,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:20,553 INFO L82 PathProgramCache]: Analyzing trace with hash -71109482, now seen corresponding path program 9 times [2019-12-07 21:51:20,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:20,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150088332] [2019-12-07 21:51:20,554 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:20,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:51:20,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:51:20,599 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150088332] [2019-12-07 21:51:20,599 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:51:20,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:51:20,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676502354] [2019-12-07 21:51:20,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:51:20,600 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:51:20,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:51:20,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:20,600 INFO L87 Difference]: Start difference. First operand 12083 states and 35779 transitions. Second operand 3 states. [2019-12-07 21:51:20,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:51:20,664 INFO L93 Difference]: Finished difference Result 13955 states and 41446 transitions. [2019-12-07 21:51:20,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:51:20,664 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 21:51:20,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:51:20,678 INFO L225 Difference]: With dead ends: 13955 [2019-12-07 21:51:20,679 INFO L226 Difference]: Without dead ends: 13955 [2019-12-07 21:51:20,679 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:51:20,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13955 states. [2019-12-07 21:51:20,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13955 to 11608. [2019-12-07 21:51:20,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11608 states. [2019-12-07 21:51:20,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11608 states to 11608 states and 34618 transitions. [2019-12-07 21:51:20,863 INFO L78 Accepts]: Start accepts. Automaton has 11608 states and 34618 transitions. Word has length 66 [2019-12-07 21:51:20,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:51:20,863 INFO L462 AbstractCegarLoop]: Abstraction has 11608 states and 34618 transitions. [2019-12-07 21:51:20,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:51:20,864 INFO L276 IsEmpty]: Start isEmpty. Operand 11608 states and 34618 transitions. [2019-12-07 21:51:20,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:51:20,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:51:20,872 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:51:20,872 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:51:20,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:51:20,873 INFO L82 PathProgramCache]: Analyzing trace with hash -919262302, now seen corresponding path program 1 times [2019-12-07 21:51:20,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:51:20,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187594680] [2019-12-07 21:51:20,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:51:20,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:51:20,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:51:20,953 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 21:51:20,953 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 21:51:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24|)) (= |v_#NULL.offset_6| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t654~0.base_24| 4)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= |v_ULTIMATE.start_main_~#t654~0.offset_19| 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t654~0.base_24|) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= (store .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24| 1) |v_#valid_63|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24|) |v_ULTIMATE.start_main_~#t654~0.offset_19| 0))) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t654~0.base=|v_ULTIMATE.start_main_~#t654~0.base_24|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t654~0.offset=|v_ULTIMATE.start_main_~#t654~0.offset_19|, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t656~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t656~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t654~0.base, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t654~0.offset, ~y~0, ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 21:51:20,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t655~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t655~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10|) |v_ULTIMATE.start_main_~#t655~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t655~0.base_10| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t655~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_10|, ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_~#t655~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 21:51:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t656~0.base_13|) (= |v_ULTIMATE.start_main_~#t656~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13|) |v_ULTIMATE.start_main_~#t656~0.offset_11| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t656~0.base_13|)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t656~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_13|, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t656~0.base, ULTIMATE.start_main_~#t656~0.offset, #length] because there is no mapped edge [2019-12-07 21:51:20,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 21:51:20,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1571090498 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1571090498 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1571090498 |P1Thread1of1ForFork2_#t~ite9_Out-1571090498|)) (and (= ~a$w_buff1~0_In-1571090498 |P1Thread1of1ForFork2_#t~ite9_Out-1571090498|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In-1571090498, ~a$w_buff1~0=~a$w_buff1~0_In-1571090498, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1571090498, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1571090498} OutVars{~a~0=~a~0_In-1571090498, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1571090498|, ~a$w_buff1~0=~a$w_buff1~0_In-1571090498, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1571090498, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1571090498} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 21:51:20,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-202766565 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-202766565 256)))) (or (and (= ~a$w_buff0_used~0_In-202766565 |P0Thread1of1ForFork1_#t~ite5_Out-202766565|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-202766565|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-202766565, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-202766565} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-202766565|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-202766565, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-202766565} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 21:51:20,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In777577301 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In777577301 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In777577301 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In777577301 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out777577301| ~a$w_buff1_used~0_In777577301) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out777577301|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In777577301, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In777577301, ~a$w_buff1_used~0=~a$w_buff1_used~0_In777577301} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out777577301|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In777577301, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In777577301, ~a$w_buff1_used~0=~a$w_buff1_used~0_In777577301} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 21:51:20,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In1050417585 ~a$r_buff0_thd1~0_Out1050417585)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1050417585 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1050417585 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out1050417585) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1050417585} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1050417585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1050417585} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:51:20,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In1899385569 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1899385569 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In1899385569 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1899385569 256)))) (or (and (= ~a$r_buff1_thd1~0_In1899385569 |P0Thread1of1ForFork1_#t~ite8_Out1899385569|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1899385569|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1899385569, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1899385569, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1899385569|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1899385569, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1899385569, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 21:51:20,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 21:51:20,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In769446604 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In769446604| |P2Thread1of1ForFork0_#t~ite20_Out769446604|) (= |P2Thread1of1ForFork0_#t~ite21_Out769446604| ~a$w_buff0~0_In769446604)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out769446604| |P2Thread1of1ForFork0_#t~ite20_Out769446604|) (= |P2Thread1of1ForFork0_#t~ite20_Out769446604| ~a$w_buff0~0_In769446604) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In769446604 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In769446604 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In769446604 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In769446604 256))))) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In769446604, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In769446604, ~a$w_buff0_used~0=~a$w_buff0_used~0_In769446604, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In769446604, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In769446604|, ~weak$$choice2~0=~weak$$choice2~0_In769446604} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out769446604|, ~a$w_buff0~0=~a$w_buff0~0_In769446604, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In769446604, ~a$w_buff0_used~0=~a$w_buff0_used~0_In769446604, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In769446604, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out769446604|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604, ~weak$$choice2~0=~weak$$choice2~0_In769446604} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 21:51:20,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1266141171 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1266141171| ~a$w_buff0_used~0_In1266141171) (= |P2Thread1of1ForFork0_#t~ite26_In1266141171| |P2Thread1of1ForFork0_#t~ite26_Out1266141171|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out1266141171| ~a$w_buff0_used~0_In1266141171) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1266141171 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1266141171 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1266141171 256)) (and (= (mod ~a$w_buff1_used~0_In1266141171 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite26_Out1266141171| |P2Thread1of1ForFork0_#t~ite27_Out1266141171|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1266141171|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1266141171, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1266141171, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1266141171, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1266141171, ~weak$$choice2~0=~weak$$choice2~0_In1266141171} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1266141171|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1266141171|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1266141171, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1266141171, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1266141171, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1266141171, ~weak$$choice2~0=~weak$$choice2~0_In1266141171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 21:51:20,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1658609246 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite30_Out1658609246| |P2Thread1of1ForFork0_#t~ite29_Out1658609246|) (= |P2Thread1of1ForFork0_#t~ite29_Out1658609246| ~a$w_buff1_used~0_In1658609246) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1658609246 256) 0))) (or (= (mod ~a$w_buff0_used~0_In1658609246 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In1658609246 256)) .cse0) (and (= (mod ~a$r_buff1_thd3~0_In1658609246 256) 0) .cse0))) .cse1) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite29_In1658609246| |P2Thread1of1ForFork0_#t~ite29_Out1658609246|) (= |P2Thread1of1ForFork0_#t~ite30_Out1658609246| ~a$w_buff1_used~0_In1658609246)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246, ~weak$$choice2~0=~weak$$choice2~0_In1658609246, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1658609246|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1658609246, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1658609246|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1658609246|, ~weak$$choice2~0=~weak$$choice2~0_In1658609246} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 21:51:20,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 21:51:20,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 21:51:20,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-536034225 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-536034225 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-536034225| ~a$w_buff0_used~0_In-536034225) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-536034225| 0) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-536034225, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-536034225} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-536034225, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-536034225, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-536034225|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 21:51:20,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1754616751 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1754616751 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1754616751 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1754616751 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1754616751| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1754616751| ~a$w_buff1_used~0_In-1754616751)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1754616751, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1754616751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1754616751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1754616751} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1754616751, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1754616751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1754616751, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1754616751|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1754616751} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 21:51:20,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-2121186683 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-2121186683 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-2121186683 |P1Thread1of1ForFork2_#t~ite13_Out-2121186683|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-2121186683|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2121186683, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2121186683} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2121186683, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2121186683, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-2121186683|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 21:51:20,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd2~0_In-413194067 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-413194067 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-413194067 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-413194067 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-413194067| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-413194067| ~a$r_buff1_thd2~0_In-413194067) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-413194067, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-413194067, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-413194067|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 21:51:20,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:51:20,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 21:51:20,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-6755213 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-6755213| |P2Thread1of1ForFork0_#t~ite38_Out-6755213|)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-6755213 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-6755213| ~a~0_In-6755213)) (and (not .cse1) .cse2 (not .cse0) (= ~a$w_buff1~0_In-6755213 |P2Thread1of1ForFork0_#t~ite38_Out-6755213|)))) InVars {~a~0=~a~0_In-6755213, ~a$w_buff1~0=~a$w_buff1~0_In-6755213, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6755213, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6755213} OutVars{~a~0=~a~0_In-6755213, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-6755213|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-6755213|, ~a$w_buff1~0=~a$w_buff1~0_In-6755213, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6755213, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6755213} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 21:51:20,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1998862099 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1998862099 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1998862099|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite40_Out-1998862099|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1998862099} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1998862099|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1998862099} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 21:51:20,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1315788594 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1315788594 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1315788594 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1315788594 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1315788594| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1315788594| ~a$w_buff1_used~0_In-1315788594) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1315788594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1315788594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1315788594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1315788594} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1315788594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1315788594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1315788594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1315788594, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1315788594|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 21:51:20,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1925847367 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1925847367 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1925847367| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1925847367| ~a$r_buff0_thd3~0_In-1925847367)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1925847367} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1925847367, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1925847367|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 21:51:20,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In924026070 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In924026070 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In924026070 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In924026070 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out924026070|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In924026070 |P2Thread1of1ForFork0_#t~ite43_Out924026070|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out924026070|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 21:51:20,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:51:20,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:51:20,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out139527943| |ULTIMATE.start_main_#t~ite47_Out139527943|)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In139527943 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In139527943 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out139527943| ~a$w_buff1~0_In139527943) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out139527943| ~a~0_In139527943)))) InVars {~a~0=~a~0_In139527943, ~a$w_buff1~0=~a$w_buff1~0_In139527943, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In139527943, ~a$w_buff1_used~0=~a$w_buff1_used~0_In139527943} OutVars{~a~0=~a~0_In139527943, ~a$w_buff1~0=~a$w_buff1~0_In139527943, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out139527943|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In139527943, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out139527943|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In139527943} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 21:51:20,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In478269014 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In478269014 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out478269014| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite49_Out478269014| ~a$w_buff0_used~0_In478269014)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In478269014, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In478269014} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In478269014, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out478269014|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In478269014} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 21:51:20,968 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd0~0_In289703615 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In289703615 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In289703615 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In289703615 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out289703615| ~a$w_buff1_used~0_In289703615) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out289703615| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In289703615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In289703615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In289703615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In289703615} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out289703615|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In289703615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In289703615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In289703615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In289703615} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 21:51:20,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-222509118 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-222509118 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-222509118|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In-222509118 |ULTIMATE.start_main_#t~ite51_Out-222509118|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-222509118, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-222509118} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-222509118|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-222509118, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-222509118} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 21:51:20,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-759837036 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-759837036 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In-759837036 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-759837036 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-759837036|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd0~0_In-759837036 |ULTIMATE.start_main_#t~ite52_Out-759837036|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-759837036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-759837036, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-759837036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-759837036} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-759837036|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-759837036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-759837036, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-759837036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-759837036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 21:51:20,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:51:21,024 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 09:51:21 BasicIcfg [2019-12-07 21:51:21,024 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 21:51:21,025 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 21:51:21,025 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 21:51:21,025 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 21:51:21,025 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:09" (3/4) ... [2019-12-07 21:51:21,027 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 21:51:21,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [899] [899] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= 0 v_~a$w_buff1~0_266) (= 0 v_~__unbuffered_p2_EAX~0_32) (= 0 v_~weak$$choice0~0_14) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24|)) (= |v_#NULL.offset_6| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t654~0.base_24| 4)) (= 0 v_~a$w_buff0_used~0_826) (= v_~main$tmp_guard0~0_29 0) (= 0 v_~a$r_buff0_thd2~0_102) (= |v_ULTIMATE.start_main_~#t654~0.offset_19| 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~a$r_buff0_thd0~0_110 0) (= v_~__unbuffered_cnt~0_102 0) (= v_~main$tmp_guard1~0_29 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t654~0.base_24|) (= v_~a$w_buff0~0_397 0) (= v_~a$flush_delayed~0_27 0) (= 0 |v_#NULL.base_6|) (= v_~y~0_39 0) (= v_~a$mem_tmp~0_16 0) (= v_~__unbuffered_p2_EBX~0_42 0) (= 0 v_~a$r_buff1_thd1~0_142) (= v_~a~0_178 0) (= v_~weak$$choice2~0_137 0) (= 0 v_~__unbuffered_p0_EAX~0_105) (= (store .cse0 |v_ULTIMATE.start_main_~#t654~0.base_24| 1) |v_#valid_63|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t654~0.base_24|) |v_ULTIMATE.start_main_~#t654~0.offset_19| 0))) (= v_~z~0_40 0) (= 0 v_~a$w_buff1_used~0_523) (= 0 v_~a$r_buff1_thd2~0_138) (= v_~a$r_buff1_thd3~0_297 0) (= v_~a$r_buff0_thd3~0_334 0) (= v_~a$r_buff1_thd0~0_145 0) (= v_~__unbuffered_p0_EBX~0_105 0) (= 0 v_~a$r_buff0_thd1~0_183) (= 0 v_~a$read_delayed~0_6) (= v_~a$read_delayed_var~0.offset_6 0) (= 0 v_~a$read_delayed_var~0.base_6) (= v_~x~0_88 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_19|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_138, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_75|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_47|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_137|, ~a~0=v_~a~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_59|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_105, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_27|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_32, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_105, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_297, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_826, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_183, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_6, ~a$w_buff0~0=v_~a$w_buff0~0_397, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_145, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_88, ~a$read_delayed~0=v_~a$read_delayed~0_6, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_102, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_29, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_129|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_~#t654~0.base=|v_ULTIMATE.start_main_~#t654~0.base_24|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~a$w_buff1~0=v_~a$w_buff1~0_266, ULTIMATE.start_main_~#t654~0.offset=|v_ULTIMATE.start_main_~#t654~0.offset_19|, ~y~0=v_~y~0_39, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_26|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_29|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_142, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_334, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_6|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_523, ~weak$$choice2~0=v_~weak$$choice2~0_137, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.offset, ~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t656~0.base, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ~__unbuffered_p0_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ULTIMATE.start_main_~#t656~0.offset, ~__unbuffered_cnt~0, ~x~0, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_~#t654~0.base, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ULTIMATE.start_main_~#t654~0.offset, ~y~0, ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 21:51:21,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L835-1-->L837: Formula: (and (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t655~0.base_10|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t655~0.base_10|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t655~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t655~0.base_10|) |v_ULTIMATE.start_main_~#t655~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t655~0.base_10| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t655~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t655~0.base=|v_ULTIMATE.start_main_~#t655~0.base_10|, ULTIMATE.start_main_~#t655~0.offset=|v_ULTIMATE.start_main_~#t655~0.offset_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t655~0.base, ULTIMATE.start_main_~#t655~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 21:51:21,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L837-1-->L839: Formula: (and (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13| 1) |v_#valid_31|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t656~0.base_13|) (= |v_ULTIMATE.start_main_~#t656~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t656~0.base_13|) |v_ULTIMATE.start_main_~#t656~0.offset_11| 2)) |v_#memory_int_11|) (not (= 0 |v_ULTIMATE.start_main_~#t656~0.base_13|)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t656~0.base_13|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t656~0.base_13| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t656~0.base=|v_ULTIMATE.start_main_~#t656~0.base_13|, ULTIMATE.start_main_~#t656~0.offset=|v_ULTIMATE.start_main_~#t656~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t656~0.base, ULTIMATE.start_main_~#t656~0.offset, #length] because there is no mapped edge [2019-12-07 21:51:21,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_30| v_P0Thread1of1ForFork1_~arg.base_28) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 0)) (= v_~a$w_buff0_used~0_232 v_~a$w_buff1_used~0_149) (= 1 v_~a$w_buff0_used~0_231) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|) (= v_~a$w_buff0~0_80 v_~a$w_buff1~0_62) (= v_P0Thread1of1ForFork1_~arg.offset_28 |v_P0Thread1of1ForFork1_#in~arg.offset_30|) (= 1 v_~a$w_buff0~0_79) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_231 256) 0)) (not (= (mod v_~a$w_buff1_used~0_149 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_80, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_232, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_62, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_30|, ~a$w_buff0~0=v_~a$w_buff0~0_79, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_32, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_231, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_28, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_149, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_30|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_28|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_28} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 21:51:21,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1571090498 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1571090498 256) 0))) (or (and (or .cse0 .cse1) (= ~a~0_In-1571090498 |P1Thread1of1ForFork2_#t~ite9_Out-1571090498|)) (and (= ~a$w_buff1~0_In-1571090498 |P1Thread1of1ForFork2_#t~ite9_Out-1571090498|) (not .cse1) (not .cse0)))) InVars {~a~0=~a~0_In-1571090498, ~a$w_buff1~0=~a$w_buff1~0_In-1571090498, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1571090498, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1571090498} OutVars{~a~0=~a~0_In-1571090498, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1571090498|, ~a$w_buff1~0=~a$w_buff1~0_In-1571090498, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1571090498, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1571090498} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 21:51:21,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L757-->L757-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-202766565 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In-202766565 256)))) (or (and (= ~a$w_buff0_used~0_In-202766565 |P0Thread1of1ForFork1_#t~ite5_Out-202766565|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-202766565|) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-202766565, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-202766565} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-202766565|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-202766565, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-202766565} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 21:51:21,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In777577301 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In777577301 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In777577301 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In777577301 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out777577301| ~a$w_buff1_used~0_In777577301) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out777577301|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In777577301, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In777577301, ~a$w_buff1_used~0=~a$w_buff1_used~0_In777577301} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out777577301|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In777577301, ~a$w_buff0_used~0=~a$w_buff0_used~0_In777577301, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In777577301, ~a$w_buff1_used~0=~a$w_buff1_used~0_In777577301} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 21:51:21,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L759-->L760: Formula: (let ((.cse1 (= ~a$r_buff0_thd1~0_In1050417585 ~a$r_buff0_thd1~0_Out1050417585)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1050417585 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In1050417585 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= 0 ~a$r_buff0_thd1~0_Out1050417585) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1050417585} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1050417585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1050417585, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1050417585} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:51:21,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L760-->L760-2: Formula: (let ((.cse2 (= 0 (mod ~a$w_buff0_used~0_In1899385569 256))) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1899385569 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd1~0_In1899385569 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1899385569 256)))) (or (and (= ~a$r_buff1_thd1~0_In1899385569 |P0Thread1of1ForFork1_#t~ite8_Out1899385569|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1899385569|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1899385569, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1899385569, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1899385569|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1899385569, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1899385569, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1899385569, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1899385569} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 21:51:21,031 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L760-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork1_#t~ite8_50|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_50|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_49|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_80, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 21:51:21,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In769446604 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite20_In769446604| |P2Thread1of1ForFork0_#t~ite20_Out769446604|) (= |P2Thread1of1ForFork0_#t~ite21_Out769446604| ~a$w_buff0~0_In769446604)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out769446604| |P2Thread1of1ForFork0_#t~ite20_Out769446604|) (= |P2Thread1of1ForFork0_#t~ite20_Out769446604| ~a$w_buff0~0_In769446604) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In769446604 256) 0))) (or (and (= (mod ~a$r_buff1_thd3~0_In769446604 256) 0) .cse1) (= 0 (mod ~a$w_buff0_used~0_In769446604 256)) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In769446604 256))))) .cse0))) InVars {~a$w_buff0~0=~a$w_buff0~0_In769446604, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In769446604, ~a$w_buff0_used~0=~a$w_buff0_used~0_In769446604, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In769446604, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In769446604|, ~weak$$choice2~0=~weak$$choice2~0_In769446604} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out769446604|, ~a$w_buff0~0=~a$w_buff0~0_In769446604, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In769446604, ~a$w_buff0_used~0=~a$w_buff0_used~0_In769446604, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In769446604, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out769446604|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In769446604, ~weak$$choice2~0=~weak$$choice2~0_In769446604} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 21:51:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L803-->L803-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1266141171 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out1266141171| ~a$w_buff0_used~0_In1266141171) (= |P2Thread1of1ForFork0_#t~ite26_In1266141171| |P2Thread1of1ForFork0_#t~ite26_Out1266141171|) (not .cse0)) (and (= |P2Thread1of1ForFork0_#t~ite26_Out1266141171| ~a$w_buff0_used~0_In1266141171) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In1266141171 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In1266141171 256)) .cse1) (= 0 (mod ~a$w_buff0_used~0_In1266141171 256)) (and (= (mod ~a$w_buff1_used~0_In1266141171 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite26_Out1266141171| |P2Thread1of1ForFork0_#t~ite27_Out1266141171|) .cse0))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1266141171|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1266141171, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1266141171, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1266141171, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1266141171, ~weak$$choice2~0=~weak$$choice2~0_In1266141171} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1266141171|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1266141171|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1266141171, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1266141171, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1266141171, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1266141171, ~weak$$choice2~0=~weak$$choice2~0_In1266141171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 21:51:21,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L804-->L804-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1658609246 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite30_Out1658609246| |P2Thread1of1ForFork0_#t~ite29_Out1658609246|) (= |P2Thread1of1ForFork0_#t~ite29_Out1658609246| ~a$w_buff1_used~0_In1658609246) (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In1658609246 256) 0))) (or (= (mod ~a$w_buff0_used~0_In1658609246 256) 0) (and (= 0 (mod ~a$w_buff1_used~0_In1658609246 256)) .cse0) (and (= (mod ~a$r_buff1_thd3~0_In1658609246 256) 0) .cse0))) .cse1) (and (not .cse1) (= |P2Thread1of1ForFork0_#t~ite29_In1658609246| |P2Thread1of1ForFork0_#t~ite29_Out1658609246|) (= |P2Thread1of1ForFork0_#t~ite30_Out1658609246| ~a$w_buff1_used~0_In1658609246)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1658609246, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246, ~weak$$choice2~0=~weak$$choice2~0_In1658609246, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In1658609246|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1658609246, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1658609246, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1658609246, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out1658609246|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1658609246, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out1658609246|, ~weak$$choice2~0=~weak$$choice2~0_In1658609246} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 21:51:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L805-->L806: Formula: (and (= v_~a$r_buff0_thd3~0_59 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_17 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, ~weak$$choice2~0=v_~weak$$choice2~0_17} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_59, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 21:51:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L776-4-->L777: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_18| v_~a~0_46) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_18|} OutVars{~a~0=v_~a~0_46, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_17|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_23|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 21:51:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-536034225 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd2~0_In-536034225 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-536034225| ~a$w_buff0_used~0_In-536034225) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out-536034225| 0) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-536034225, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-536034225} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-536034225, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-536034225, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-536034225|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 21:51:21,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1754616751 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1754616751 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1754616751 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1754616751 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1754616751| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1754616751| ~a$w_buff1_used~0_In-1754616751)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1754616751, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1754616751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1754616751, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1754616751} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1754616751, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1754616751, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1754616751, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1754616751|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1754616751} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 21:51:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-2121186683 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-2121186683 256) 0))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-2121186683 |P1Thread1of1ForFork2_#t~ite13_Out-2121186683|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-2121186683|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2121186683, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2121186683} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2121186683, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2121186683, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-2121186683|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 21:51:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L780-->L780-2: Formula: (let ((.cse3 (= (mod ~a$r_buff0_thd2~0_In-413194067 256) 0)) (.cse2 (= (mod ~a$w_buff0_used~0_In-413194067 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-413194067 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-413194067 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-413194067| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-413194067| ~a$r_buff1_thd2~0_In-413194067) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-413194067, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-413194067, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-413194067|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 21:51:21,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L780-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= |v_P1Thread1of1ForFork2_#t~ite14_28| v_~a$r_buff1_thd2~0_61)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_28|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_61, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_27|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:51:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L808-->L812: Formula: (and (= v_~a$flush_delayed~0_8 0) (= v_~a~0_52 v_~a$mem_tmp~0_6) (not (= (mod v_~a$flush_delayed~0_9 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_9} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_52, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 21:51:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L812-2-->L812-5: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In-6755213 256))) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-6755213| |P2Thread1of1ForFork0_#t~ite38_Out-6755213|)) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-6755213 256)))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-6755213| ~a~0_In-6755213)) (and (not .cse1) .cse2 (not .cse0) (= ~a$w_buff1~0_In-6755213 |P2Thread1of1ForFork0_#t~ite38_Out-6755213|)))) InVars {~a~0=~a~0_In-6755213, ~a$w_buff1~0=~a$w_buff1~0_In-6755213, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6755213, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6755213} OutVars{~a~0=~a~0_In-6755213, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-6755213|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-6755213|, ~a$w_buff1~0=~a$w_buff1~0_In-6755213, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-6755213, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-6755213} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 21:51:21,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1998862099 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1998862099 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1998862099|) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-1998862099 |P2Thread1of1ForFork0_#t~ite40_Out-1998862099|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1998862099} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1998862099|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1998862099, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1998862099} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 21:51:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1315788594 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1315788594 256))) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-1315788594 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd3~0_In-1315788594 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1315788594| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1315788594| ~a$w_buff1_used~0_In-1315788594) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1315788594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1315788594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1315788594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1315788594} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1315788594, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1315788594, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1315788594, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1315788594, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1315788594|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 21:51:21,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L815-->L815-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1925847367 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd3~0_In-1925847367 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1925847367| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1925847367| ~a$r_buff0_thd3~0_In-1925847367)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1925847367} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1925847367, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1925847367, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1925847367|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 21:51:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In924026070 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In924026070 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd3~0_In924026070 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In924026070 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out924026070|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In924026070 |P2Thread1of1ForFork0_#t~ite43_Out924026070|) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out924026070|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In924026070, ~a$w_buff0_used~0=~a$w_buff0_used~0_In924026070, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In924026070, ~a$w_buff1_used~0=~a$w_buff1_used~0_In924026070} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 21:51:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L816-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~a$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:51:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L839-1-->L845: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:51:21,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L845-2-->L845-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite48_Out139527943| |ULTIMATE.start_main_#t~ite47_Out139527943|)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In139527943 256))) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In139527943 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite47_Out139527943| ~a$w_buff1~0_In139527943) .cse1 (not .cse2)) (and .cse1 (or .cse0 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out139527943| ~a~0_In139527943)))) InVars {~a~0=~a~0_In139527943, ~a$w_buff1~0=~a$w_buff1~0_In139527943, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In139527943, ~a$w_buff1_used~0=~a$w_buff1_used~0_In139527943} OutVars{~a~0=~a~0_In139527943, ~a$w_buff1~0=~a$w_buff1~0_In139527943, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out139527943|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In139527943, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out139527943|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In139527943} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 21:51:21,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In478269014 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In478269014 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out478269014| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite49_Out478269014| ~a$w_buff0_used~0_In478269014)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In478269014, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In478269014} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In478269014, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out478269014|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In478269014} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 21:51:21,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L847-->L847-2: Formula: (let ((.cse2 (= (mod ~a$r_buff1_thd0~0_In289703615 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In289703615 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd0~0_In289703615 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In289703615 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out289703615| ~a$w_buff1_used~0_In289703615) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out289703615| 0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In289703615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In289703615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In289703615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In289703615} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out289703615|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In289703615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In289703615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In289703615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In289703615} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 21:51:21,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L848-->L848-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In-222509118 256) 0)) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In-222509118 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out-222509118|) (not .cse1)) (and (or .cse1 .cse0) (= ~a$r_buff0_thd0~0_In-222509118 |ULTIMATE.start_main_#t~ite51_Out-222509118|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-222509118, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-222509118} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-222509118|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-222509118, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-222509118} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 21:51:21,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L849-->L849-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-759837036 256))) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-759837036 256))) (.cse1 (= (mod ~a$r_buff1_thd0~0_In-759837036 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-759837036 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-759837036|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~a$r_buff1_thd0~0_In-759837036 |ULTIMATE.start_main_#t~ite52_Out-759837036|) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-759837036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-759837036, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-759837036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-759837036} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-759837036|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-759837036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-759837036, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-759837036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-759837036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 21:51:21,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L849-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= (ite (= (ite (not (and (= 1 v_~__unbuffered_p0_EAX~0_40) (= 2 v_~__unbuffered_p2_EAX~0_20) (= v_~__unbuffered_p2_EBX~0_26 0) (= v_~__unbuffered_p0_EBX~0_40 0) (= v_~z~0_25 2))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start_main_#t~ite52_35| v_~a$r_buff1_thd0~0_75) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p0_EBX~0=v_~__unbuffered_p0_EBX~0_40, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_26, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_20, ~z~0=v_~z~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:51:21,093 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_22342836-a8e6-40eb-8f6a-03f97344e1f8/bin/utaipan/witness.graphml [2019-12-07 21:51:21,094 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 21:51:21,095 INFO L168 Benchmark]: Toolchain (without parser) took 192495.31 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 937.1 MB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2019-12-07 21:51:21,095 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:51:21,095 INFO L168 Benchmark]: CACSL2BoogieTranslator took 409.72 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -128.1 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 21:51:21,095 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.93 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:51:21,095 INFO L168 Benchmark]: Boogie Preprocessor took 27.83 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:51:21,096 INFO L168 Benchmark]: RCFGBuilder took 414.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.5 MB). Peak memory consumption was 60.5 MB. Max. memory is 11.5 GB. [2019-12-07 21:51:21,096 INFO L168 Benchmark]: TraceAbstraction took 191530.73 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2019-12-07 21:51:21,096 INFO L168 Benchmark]: Witness Printer took 69.10 ms. Allocated memory is still 8.0 GB. Free memory was 5.8 GB in the beginning and 5.8 GB in the end (delta: 40.1 MB). Peak memory consumption was 40.1 MB. Max. memory is 11.5 GB. [2019-12-07 21:51:21,097 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 409.72 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -128.1 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.93 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.83 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 414.45 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.5 MB). Peak memory consumption was 60.5 MB. Max. memory is 11.5 GB. * TraceAbstraction took 191530.73 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. * Witness Printer took 69.10 ms. Allocated memory is still 8.0 GB. Free memory was 5.8 GB in the beginning and 5.8 GB in the end (delta: 40.1 MB). Peak memory consumption was 40.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 178 ProgramPointsBefore, 93 ProgramPointsAfterwards, 215 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 32 ChoiceCompositions, 7050 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 63 SemBasedMoverChecksPositive, 249 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78858 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t654, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t655, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t656, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L740] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L741] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L742] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L743] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L744] 1 a$r_buff0_thd1 = (_Bool)1 [L747] 1 x = 1 [L750] 1 __unbuffered_p0_EAX = x [L753] 1 __unbuffered_p0_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L756] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 y = 1 [L773] 2 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L776] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1] [L756] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L757] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L790] 3 z = 2 [L793] 3 __unbuffered_p2_EAX = z [L796] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L797] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L798] 3 a$flush_delayed = weak$$choice2 [L799] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L800] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=1, __unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L758] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L800] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L801] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L802] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=2] [L802] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L803] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L804] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L806] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=2] [L777] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L778] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L806] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L807] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L812] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L813] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L814] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L815] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L845] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, a=1, a$flush_delayed=0, a$mem_tmp=1, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=10, weak$$choice2=1, x=1, y=1, z=2] [L845] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L846] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L847] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L848] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 191.3s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 36.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5521 SDtfs, 7456 SDslu, 16193 SDs, 0 SdLazy, 7784 SolverSat, 354 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 309 GetRequests, 39 SyntacticMatches, 12 SemanticMatches, 258 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1464 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=325487occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 133.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 469919 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 1209 NumberOfCodeBlocks, 1209 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1113 ConstructedInterpolants, 0 QuantifiedInterpolants, 412034 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...