./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix025_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix025_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d6bd8a517063f0796713b720d0bed13848b0518a .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:38:14,868 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:38:14,869 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:38:14,877 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:38:14,877 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:38:14,878 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:38:14,879 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:38:14,881 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:38:14,882 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:38:14,883 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:38:14,884 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:38:14,885 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:38:14,885 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:38:14,886 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:38:14,887 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:38:14,888 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:38:14,889 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:38:14,889 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:38:14,891 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:38:14,893 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:38:14,894 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:38:14,895 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:38:14,896 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:38:14,897 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:38:14,899 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:38:14,899 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:38:14,899 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:38:14,900 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:38:14,900 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:38:14,901 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:38:14,901 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:38:14,902 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:38:14,902 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:38:14,902 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:38:14,903 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:38:14,903 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:38:14,904 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:38:14,904 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:38:14,904 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:38:14,905 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:38:14,906 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:38:14,906 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:38:14,918 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:38:14,918 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:38:14,919 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:38:14,919 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:38:14,919 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:38:14,919 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:38:14,920 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:38:14,920 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:38:14,921 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:38:14,921 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:38:14,921 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:38:14,921 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:38:14,922 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:38:14,923 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:38:14,923 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:38:14,924 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:38:14,924 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:38:14,925 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d6bd8a517063f0796713b720d0bed13848b0518a [2019-12-07 13:38:15,033 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:38:15,041 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:38:15,043 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:38:15,044 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:38:15,045 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:38:15,045 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix025_power.opt.i [2019-12-07 13:38:15,088 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/data/06dd0bf64/98b4a27913514d1685c121414c2a2e24/FLAGfaaccf214 [2019-12-07 13:38:15,473 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:38:15,474 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/sv-benchmarks/c/pthread-wmm/mix025_power.opt.i [2019-12-07 13:38:15,484 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/data/06dd0bf64/98b4a27913514d1685c121414c2a2e24/FLAGfaaccf214 [2019-12-07 13:38:15,493 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/data/06dd0bf64/98b4a27913514d1685c121414c2a2e24 [2019-12-07 13:38:15,495 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:38:15,496 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:38:15,497 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:38:15,497 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:38:15,499 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:38:15,500 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,502 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15, skipping insertion in model container [2019-12-07 13:38:15,502 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,507 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:38:15,535 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:38:15,799 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:38:15,807 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:38:15,849 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:38:15,894 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:38:15,894 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15 WrapperNode [2019-12-07 13:38:15,894 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:38:15,895 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:38:15,895 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:38:15,895 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:38:15,900 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,914 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,932 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:38:15,932 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:38:15,932 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:38:15,933 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:38:15,939 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,939 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,942 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,942 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,950 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,953 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,956 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... [2019-12-07 13:38:15,959 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:38:15,959 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:38:15,959 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:38:15,959 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:38:15,960 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:38:15,999 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:38:15,999 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:38:15,999 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:38:15,999 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:38:15,999 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:38:15,999 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:38:16,000 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:38:16,000 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:38:16,000 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:38:16,000 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:38:16,000 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:38:16,000 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:38:16,000 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:38:16,001 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:38:16,356 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:38:16,356 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:38:16,357 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:16 BoogieIcfgContainer [2019-12-07 13:38:16,357 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:38:16,357 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:38:16,358 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:38:16,359 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:38:16,360 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:38:15" (1/3) ... [2019-12-07 13:38:16,360 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a4c8bb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:38:16, skipping insertion in model container [2019-12-07 13:38:16,360 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:38:15" (2/3) ... [2019-12-07 13:38:16,360 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5a4c8bb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:38:16, skipping insertion in model container [2019-12-07 13:38:16,361 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:16" (3/3) ... [2019-12-07 13:38:16,362 INFO L109 eAbstractionObserver]: Analyzing ICFG mix025_power.opt.i [2019-12-07 13:38:16,368 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:38:16,368 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:38:16,373 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:38:16,373 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:38:16,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,399 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,413 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,414 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,415 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,416 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,417 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:38:16,433 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:38:16,445 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:38:16,445 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:38:16,445 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:38:16,445 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:38:16,446 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:38:16,446 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:38:16,446 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:38:16,446 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:38:16,457 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 13:38:16,458 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 13:38:16,514 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 13:38:16,514 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:38:16,524 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:38:16,540 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 13:38:16,572 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 13:38:16,572 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:38:16,578 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 704 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:38:16,593 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:38:16,594 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:38:19,479 WARN L192 SmtUtils]: Spent 142.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 13:38:19,734 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130103 [2019-12-07 13:38:19,734 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 13:38:19,736 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 105 transitions [2019-12-07 13:38:37,035 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 122102 states. [2019-12-07 13:38:37,036 INFO L276 IsEmpty]: Start isEmpty. Operand 122102 states. [2019-12-07 13:38:37,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:38:37,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:38:37,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:38:37,041 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:38:37,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:38:37,044 INFO L82 PathProgramCache]: Analyzing trace with hash 913940, now seen corresponding path program 1 times [2019-12-07 13:38:37,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:38:37,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788794430] [2019-12-07 13:38:37,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:38:37,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:38:37,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:38:37,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788794430] [2019-12-07 13:38:37,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:38:37,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:38:37,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429881848] [2019-12-07 13:38:37,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:38:37,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:38:37,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:38:37,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:38:37,193 INFO L87 Difference]: Start difference. First operand 122102 states. Second operand 3 states. [2019-12-07 13:38:37,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:38:37,936 INFO L93 Difference]: Finished difference Result 121140 states and 517588 transitions. [2019-12-07 13:38:37,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:38:37,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:38:37,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:38:38,344 INFO L225 Difference]: With dead ends: 121140 [2019-12-07 13:38:38,344 INFO L226 Difference]: Without dead ends: 107958 [2019-12-07 13:38:38,345 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:38:42,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107958 states. [2019-12-07 13:38:44,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107958 to 107958. [2019-12-07 13:38:44,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107958 states. [2019-12-07 13:38:46,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107958 states to 107958 states and 460128 transitions. [2019-12-07 13:38:46,584 INFO L78 Accepts]: Start accepts. Automaton has 107958 states and 460128 transitions. Word has length 3 [2019-12-07 13:38:46,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:38:46,584 INFO L462 AbstractCegarLoop]: Abstraction has 107958 states and 460128 transitions. [2019-12-07 13:38:46,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:38:46,584 INFO L276 IsEmpty]: Start isEmpty. Operand 107958 states and 460128 transitions. [2019-12-07 13:38:46,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:38:46,587 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:38:46,587 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:38:46,587 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:38:46,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:38:46,588 INFO L82 PathProgramCache]: Analyzing trace with hash 2082409598, now seen corresponding path program 1 times [2019-12-07 13:38:46,588 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:38:46,588 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156650596] [2019-12-07 13:38:46,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:38:46,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:38:46,646 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:38:46,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156650596] [2019-12-07 13:38:46,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:38:46,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:38:46,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [86083888] [2019-12-07 13:38:46,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:38:46,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:38:46,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:38:46,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:38:46,648 INFO L87 Difference]: Start difference. First operand 107958 states and 460128 transitions. Second operand 4 states. [2019-12-07 13:38:47,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:38:47,564 INFO L93 Difference]: Finished difference Result 172022 states and 703369 transitions. [2019-12-07 13:38:47,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:38:47,565 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:38:47,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:38:48,016 INFO L225 Difference]: With dead ends: 172022 [2019-12-07 13:38:48,016 INFO L226 Difference]: Without dead ends: 171924 [2019-12-07 13:38:48,017 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:38:53,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171924 states. [2019-12-07 13:38:56,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171924 to 156115. [2019-12-07 13:38:56,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156115 states. [2019-12-07 13:38:56,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156115 states to 156115 states and 647087 transitions. [2019-12-07 13:38:56,433 INFO L78 Accepts]: Start accepts. Automaton has 156115 states and 647087 transitions. Word has length 11 [2019-12-07 13:38:56,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:38:56,434 INFO L462 AbstractCegarLoop]: Abstraction has 156115 states and 647087 transitions. [2019-12-07 13:38:56,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:38:56,434 INFO L276 IsEmpty]: Start isEmpty. Operand 156115 states and 647087 transitions. [2019-12-07 13:38:56,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:38:56,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:38:56,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:38:56,438 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:38:56,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:38:56,438 INFO L82 PathProgramCache]: Analyzing trace with hash 594088235, now seen corresponding path program 1 times [2019-12-07 13:38:56,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:38:56,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387514994] [2019-12-07 13:38:56,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:38:56,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:38:56,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:38:56,491 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387514994] [2019-12-07 13:38:56,492 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:38:56,492 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:38:56,492 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [160382572] [2019-12-07 13:38:56,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:38:56,492 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:38:56,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:38:56,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:38:56,492 INFO L87 Difference]: Start difference. First operand 156115 states and 647087 transitions. Second operand 4 states. [2019-12-07 13:38:57,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:38:57,588 INFO L93 Difference]: Finished difference Result 219290 states and 888852 transitions. [2019-12-07 13:38:57,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:38:57,589 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:38:57,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:38:58,151 INFO L225 Difference]: With dead ends: 219290 [2019-12-07 13:38:58,151 INFO L226 Difference]: Without dead ends: 219178 [2019-12-07 13:38:58,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:06,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219178 states. [2019-12-07 13:39:08,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219178 to 184451. [2019-12-07 13:39:08,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184451 states. [2019-12-07 13:39:09,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184451 states to 184451 states and 760798 transitions. [2019-12-07 13:39:09,489 INFO L78 Accepts]: Start accepts. Automaton has 184451 states and 760798 transitions. Word has length 13 [2019-12-07 13:39:09,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:09,490 INFO L462 AbstractCegarLoop]: Abstraction has 184451 states and 760798 transitions. [2019-12-07 13:39:09,490 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:09,490 INFO L276 IsEmpty]: Start isEmpty. Operand 184451 states and 760798 transitions. [2019-12-07 13:39:09,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:39:09,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:09,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:09,498 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:09,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:09,498 INFO L82 PathProgramCache]: Analyzing trace with hash -805978823, now seen corresponding path program 1 times [2019-12-07 13:39:09,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:09,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [474558469] [2019-12-07 13:39:09,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:09,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:09,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:09,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [474558469] [2019-12-07 13:39:09,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:09,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:39:09,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766566687] [2019-12-07 13:39:09,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:09,529 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:09,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:09,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:09,529 INFO L87 Difference]: Start difference. First operand 184451 states and 760798 transitions. Second operand 3 states. [2019-12-07 13:39:11,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:11,022 INFO L93 Difference]: Finished difference Result 284614 states and 1168466 transitions. [2019-12-07 13:39:11,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:11,023 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 13:39:11,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:11,773 INFO L225 Difference]: With dead ends: 284614 [2019-12-07 13:39:11,773 INFO L226 Difference]: Without dead ends: 284614 [2019-12-07 13:39:11,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:18,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284614 states. [2019-12-07 13:39:24,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284614 to 221232. [2019-12-07 13:39:24,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221232 states. [2019-12-07 13:39:25,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221232 states to 221232 states and 911865 transitions. [2019-12-07 13:39:25,050 INFO L78 Accepts]: Start accepts. Automaton has 221232 states and 911865 transitions. Word has length 16 [2019-12-07 13:39:25,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:25,051 INFO L462 AbstractCegarLoop]: Abstraction has 221232 states and 911865 transitions. [2019-12-07 13:39:25,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:39:25,051 INFO L276 IsEmpty]: Start isEmpty. Operand 221232 states and 911865 transitions. [2019-12-07 13:39:25,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:39:25,058 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:25,058 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:25,058 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:25,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:25,058 INFO L82 PathProgramCache]: Analyzing trace with hash -805853304, now seen corresponding path program 1 times [2019-12-07 13:39:25,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:25,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1363445471] [2019-12-07 13:39:25,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:25,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:25,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:25,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1363445471] [2019-12-07 13:39:25,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:25,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:25,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761541431] [2019-12-07 13:39:25,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:25,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:25,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:25,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:25,096 INFO L87 Difference]: Start difference. First operand 221232 states and 911865 transitions. Second operand 4 states. [2019-12-07 13:39:26,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:26,706 INFO L93 Difference]: Finished difference Result 262568 states and 1070974 transitions. [2019-12-07 13:39:26,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:39:26,707 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:39:26,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:27,388 INFO L225 Difference]: With dead ends: 262568 [2019-12-07 13:39:27,388 INFO L226 Difference]: Without dead ends: 262568 [2019-12-07 13:39:27,388 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:34,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262568 states. [2019-12-07 13:39:40,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262568 to 233184. [2019-12-07 13:39:40,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233184 states. [2019-12-07 13:39:40,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233184 states to 233184 states and 959818 transitions. [2019-12-07 13:39:40,807 INFO L78 Accepts]: Start accepts. Automaton has 233184 states and 959818 transitions. Word has length 16 [2019-12-07 13:39:40,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:40,807 INFO L462 AbstractCegarLoop]: Abstraction has 233184 states and 959818 transitions. [2019-12-07 13:39:40,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:40,808 INFO L276 IsEmpty]: Start isEmpty. Operand 233184 states and 959818 transitions. [2019-12-07 13:39:40,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:39:40,814 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:40,814 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:40,814 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:40,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:40,814 INFO L82 PathProgramCache]: Analyzing trace with hash -1222928522, now seen corresponding path program 1 times [2019-12-07 13:39:40,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:40,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038669491] [2019-12-07 13:39:40,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:40,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:40,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:40,852 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038669491] [2019-12-07 13:39:40,852 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:40,852 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:39:40,853 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [359069754] [2019-12-07 13:39:40,853 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:39:40,853 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:40,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:39:40,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:39:40,853 INFO L87 Difference]: Start difference. First operand 233184 states and 959818 transitions. Second operand 4 states. [2019-12-07 13:39:42,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:42,205 INFO L93 Difference]: Finished difference Result 277148 states and 1134062 transitions. [2019-12-07 13:39:42,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:39:42,206 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:39:42,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:39:43,455 INFO L225 Difference]: With dead ends: 277148 [2019-12-07 13:39:43,455 INFO L226 Difference]: Without dead ends: 277148 [2019-12-07 13:39:43,455 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:39:50,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277148 states. [2019-12-07 13:39:53,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277148 to 236057. [2019-12-07 13:39:53,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236057 states. [2019-12-07 13:39:54,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236057 states to 236057 states and 972653 transitions. [2019-12-07 13:39:54,470 INFO L78 Accepts]: Start accepts. Automaton has 236057 states and 972653 transitions. Word has length 16 [2019-12-07 13:39:54,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:39:54,470 INFO L462 AbstractCegarLoop]: Abstraction has 236057 states and 972653 transitions. [2019-12-07 13:39:54,470 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:39:54,470 INFO L276 IsEmpty]: Start isEmpty. Operand 236057 states and 972653 transitions. [2019-12-07 13:39:54,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:39:54,482 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:39:54,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:39:54,482 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:39:54,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:39:54,482 INFO L82 PathProgramCache]: Analyzing trace with hash -2141168645, now seen corresponding path program 1 times [2019-12-07 13:39:54,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:39:54,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384495962] [2019-12-07 13:39:54,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:39:54,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:39:54,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:39:54,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384495962] [2019-12-07 13:39:54,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:39:54,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:39:54,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562274096] [2019-12-07 13:39:54,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:39:54,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:39:54,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:39:54,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:39:54,532 INFO L87 Difference]: Start difference. First operand 236057 states and 972653 transitions. Second operand 3 states. [2019-12-07 13:39:56,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:39:56,717 INFO L93 Difference]: Finished difference Result 419928 states and 1722928 transitions. [2019-12-07 13:39:56,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:39:56,718 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:39:56,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:01,238 INFO L225 Difference]: With dead ends: 419928 [2019-12-07 13:40:01,238 INFO L226 Difference]: Without dead ends: 386621 [2019-12-07 13:40:01,238 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:40:08,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386621 states. [2019-12-07 13:40:13,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386621 to 371396. [2019-12-07 13:40:13,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 371396 states. [2019-12-07 13:40:15,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 371396 states to 371396 states and 1535333 transitions. [2019-12-07 13:40:15,508 INFO L78 Accepts]: Start accepts. Automaton has 371396 states and 1535333 transitions. Word has length 18 [2019-12-07 13:40:15,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:15,508 INFO L462 AbstractCegarLoop]: Abstraction has 371396 states and 1535333 transitions. [2019-12-07 13:40:15,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:40:15,508 INFO L276 IsEmpty]: Start isEmpty. Operand 371396 states and 1535333 transitions. [2019-12-07 13:40:15,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:40:15,537 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:15,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:15,537 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:15,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:15,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1067747929, now seen corresponding path program 1 times [2019-12-07 13:40:15,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:15,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202171631] [2019-12-07 13:40:15,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:15,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:15,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:15,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202171631] [2019-12-07 13:40:15,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:15,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:40:15,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695340746] [2019-12-07 13:40:15,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:40:15,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:15,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:40:15,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:40:15,585 INFO L87 Difference]: Start difference. First operand 371396 states and 1535333 transitions. Second operand 4 states. [2019-12-07 13:40:17,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:17,860 INFO L93 Difference]: Finished difference Result 385817 states and 1580823 transitions. [2019-12-07 13:40:17,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:40:17,861 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:40:17,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:18,818 INFO L225 Difference]: With dead ends: 385817 [2019-12-07 13:40:18,818 INFO L226 Difference]: Without dead ends: 385817 [2019-12-07 13:40:18,818 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:40:30,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 385817 states. [2019-12-07 13:40:35,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 385817 to 367892. [2019-12-07 13:40:35,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367892 states. [2019-12-07 13:40:36,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367892 states to 367892 states and 1521919 transitions. [2019-12-07 13:40:36,840 INFO L78 Accepts]: Start accepts. Automaton has 367892 states and 1521919 transitions. Word has length 19 [2019-12-07 13:40:36,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:36,840 INFO L462 AbstractCegarLoop]: Abstraction has 367892 states and 1521919 transitions. [2019-12-07 13:40:36,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:40:36,840 INFO L276 IsEmpty]: Start isEmpty. Operand 367892 states and 1521919 transitions. [2019-12-07 13:40:36,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:40:36,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:36,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:36,866 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:36,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:36,866 INFO L82 PathProgramCache]: Analyzing trace with hash 700766782, now seen corresponding path program 1 times [2019-12-07 13:40:36,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:36,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670760849] [2019-12-07 13:40:36,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:36,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:36,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:36,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670760849] [2019-12-07 13:40:36,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:36,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:40:36,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185550942] [2019-12-07 13:40:36,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:40:36,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:36,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:40:36,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:40:36,902 INFO L87 Difference]: Start difference. First operand 367892 states and 1521919 transitions. Second operand 3 states. [2019-12-07 13:40:38,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:38,896 INFO L93 Difference]: Finished difference Result 346805 states and 1418106 transitions. [2019-12-07 13:40:38,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:40:38,896 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:40:38,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:40:40,468 INFO L225 Difference]: With dead ends: 346805 [2019-12-07 13:40:40,468 INFO L226 Difference]: Without dead ends: 346805 [2019-12-07 13:40:40,469 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:40:50,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346805 states. [2019-12-07 13:40:54,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346805 to 343459. [2019-12-07 13:40:54,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343459 states. [2019-12-07 13:40:56,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343459 states to 343459 states and 1405774 transitions. [2019-12-07 13:40:56,362 INFO L78 Accepts]: Start accepts. Automaton has 343459 states and 1405774 transitions. Word has length 19 [2019-12-07 13:40:56,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:40:56,362 INFO L462 AbstractCegarLoop]: Abstraction has 343459 states and 1405774 transitions. [2019-12-07 13:40:56,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:40:56,362 INFO L276 IsEmpty]: Start isEmpty. Operand 343459 states and 1405774 transitions. [2019-12-07 13:40:56,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:40:56,385 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:40:56,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:40:56,385 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:40:56,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:40:56,385 INFO L82 PathProgramCache]: Analyzing trace with hash -116744345, now seen corresponding path program 1 times [2019-12-07 13:40:56,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:40:56,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207949603] [2019-12-07 13:40:56,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:40:56,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:40:56,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:40:56,429 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207949603] [2019-12-07 13:40:56,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:40:56,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:40:56,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92723363] [2019-12-07 13:40:56,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:40:56,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:40:56,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:40:56,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:40:56,430 INFO L87 Difference]: Start difference. First operand 343459 states and 1405774 transitions. Second operand 5 states. [2019-12-07 13:40:59,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:40:59,366 INFO L93 Difference]: Finished difference Result 481018 states and 1929261 transitions. [2019-12-07 13:40:59,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:40:59,366 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:40:59,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:01,097 INFO L225 Difference]: With dead ends: 481018 [2019-12-07 13:41:01,097 INFO L226 Difference]: Without dead ends: 480836 [2019-12-07 13:41:01,097 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:41:09,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 480836 states. [2019-12-07 13:41:15,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 480836 to 364743. [2019-12-07 13:41:15,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364743 states. [2019-12-07 13:41:16,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364743 states to 364743 states and 1489285 transitions. [2019-12-07 13:41:16,525 INFO L78 Accepts]: Start accepts. Automaton has 364743 states and 1489285 transitions. Word has length 19 [2019-12-07 13:41:16,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:16,525 INFO L462 AbstractCegarLoop]: Abstraction has 364743 states and 1489285 transitions. [2019-12-07 13:41:16,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:16,525 INFO L276 IsEmpty]: Start isEmpty. Operand 364743 states and 1489285 transitions. [2019-12-07 13:41:16,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:41:16,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:16,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:16,549 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:16,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:16,549 INFO L82 PathProgramCache]: Analyzing trace with hash 1088543872, now seen corresponding path program 1 times [2019-12-07 13:41:16,549 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:16,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614287887] [2019-12-07 13:41:16,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:16,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:16,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:16,579 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614287887] [2019-12-07 13:41:16,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:16,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:41:16,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276314845] [2019-12-07 13:41:16,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:41:16,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:16,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:41:16,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:16,580 INFO L87 Difference]: Start difference. First operand 364743 states and 1489285 transitions. Second operand 3 states. [2019-12-07 13:41:16,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:16,795 INFO L93 Difference]: Finished difference Result 67472 states and 218112 transitions. [2019-12-07 13:41:16,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:41:16,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 13:41:16,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:16,897 INFO L225 Difference]: With dead ends: 67472 [2019-12-07 13:41:16,897 INFO L226 Difference]: Without dead ends: 67472 [2019-12-07 13:41:16,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:17,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67472 states. [2019-12-07 13:41:20,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67472 to 67472. [2019-12-07 13:41:20,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67472 states. [2019-12-07 13:41:21,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67472 states to 67472 states and 218112 transitions. [2019-12-07 13:41:21,028 INFO L78 Accepts]: Start accepts. Automaton has 67472 states and 218112 transitions. Word has length 19 [2019-12-07 13:41:21,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:21,028 INFO L462 AbstractCegarLoop]: Abstraction has 67472 states and 218112 transitions. [2019-12-07 13:41:21,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:41:21,028 INFO L276 IsEmpty]: Start isEmpty. Operand 67472 states and 218112 transitions. [2019-12-07 13:41:21,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:41:21,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:21,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:21,034 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:21,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:21,035 INFO L82 PathProgramCache]: Analyzing trace with hash -655013944, now seen corresponding path program 1 times [2019-12-07 13:41:21,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:21,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913787526] [2019-12-07 13:41:21,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:21,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:21,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:21,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913787526] [2019-12-07 13:41:21,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:21,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:41:21,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128018918] [2019-12-07 13:41:21,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:21,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:21,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:21,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:21,073 INFO L87 Difference]: Start difference. First operand 67472 states and 218112 transitions. Second operand 5 states. [2019-12-07 13:41:21,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:21,556 INFO L93 Difference]: Finished difference Result 88451 states and 279620 transitions. [2019-12-07 13:41:21,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:41:21,556 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:41:21,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:21,683 INFO L225 Difference]: With dead ends: 88451 [2019-12-07 13:41:21,683 INFO L226 Difference]: Without dead ends: 88437 [2019-12-07 13:41:21,683 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:41:22,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88437 states. [2019-12-07 13:41:22,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88437 to 71798. [2019-12-07 13:41:22,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71798 states. [2019-12-07 13:41:22,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71798 states to 71798 states and 231108 transitions. [2019-12-07 13:41:22,938 INFO L78 Accepts]: Start accepts. Automaton has 71798 states and 231108 transitions. Word has length 22 [2019-12-07 13:41:22,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:22,938 INFO L462 AbstractCegarLoop]: Abstraction has 71798 states and 231108 transitions. [2019-12-07 13:41:22,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:22,938 INFO L276 IsEmpty]: Start isEmpty. Operand 71798 states and 231108 transitions. [2019-12-07 13:41:22,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:41:22,945 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:22,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:22,945 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:22,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:22,945 INFO L82 PathProgramCache]: Analyzing trace with hash -2032339914, now seen corresponding path program 1 times [2019-12-07 13:41:22,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:22,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542771914] [2019-12-07 13:41:22,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:22,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:22,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:22,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542771914] [2019-12-07 13:41:22,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:22,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:41:22,979 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1013759346] [2019-12-07 13:41:22,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:22,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:22,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:22,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:22,980 INFO L87 Difference]: Start difference. First operand 71798 states and 231108 transitions. Second operand 5 states. [2019-12-07 13:41:23,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:23,577 INFO L93 Difference]: Finished difference Result 91330 states and 289623 transitions. [2019-12-07 13:41:23,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:41:23,577 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:41:23,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:23,704 INFO L225 Difference]: With dead ends: 91330 [2019-12-07 13:41:23,704 INFO L226 Difference]: Without dead ends: 91316 [2019-12-07 13:41:23,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:41:24,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91316 states. [2019-12-07 13:41:24,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91316 to 69605. [2019-12-07 13:41:24,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69605 states. [2019-12-07 13:41:24,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69605 states to 69605 states and 224450 transitions. [2019-12-07 13:41:24,939 INFO L78 Accepts]: Start accepts. Automaton has 69605 states and 224450 transitions. Word has length 22 [2019-12-07 13:41:24,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:24,939 INFO L462 AbstractCegarLoop]: Abstraction has 69605 states and 224450 transitions. [2019-12-07 13:41:24,940 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:24,940 INFO L276 IsEmpty]: Start isEmpty. Operand 69605 states and 224450 transitions. [2019-12-07 13:41:24,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 13:41:24,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:24,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:24,954 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:24,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:24,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1083173402, now seen corresponding path program 1 times [2019-12-07 13:41:24,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:24,955 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127825181] [2019-12-07 13:41:24,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:24,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:24,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:24,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127825181] [2019-12-07 13:41:24,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:24,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:41:24,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [92700705] [2019-12-07 13:41:24,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:24,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:24,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:24,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:24,990 INFO L87 Difference]: Start difference. First operand 69605 states and 224450 transitions. Second operand 5 states. [2019-12-07 13:41:25,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:25,415 INFO L93 Difference]: Finished difference Result 86092 states and 273664 transitions. [2019-12-07 13:41:25,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:41:25,415 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 13:41:25,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:25,540 INFO L225 Difference]: With dead ends: 86092 [2019-12-07 13:41:25,540 INFO L226 Difference]: Without dead ends: 86044 [2019-12-07 13:41:25,540 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:25,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86044 states. [2019-12-07 13:41:26,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86044 to 73017. [2019-12-07 13:41:26,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73017 states. [2019-12-07 13:41:26,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73017 states to 73017 states and 234757 transitions. [2019-12-07 13:41:26,863 INFO L78 Accepts]: Start accepts. Automaton has 73017 states and 234757 transitions. Word has length 26 [2019-12-07 13:41:26,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:26,863 INFO L462 AbstractCegarLoop]: Abstraction has 73017 states and 234757 transitions. [2019-12-07 13:41:26,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:26,864 INFO L276 IsEmpty]: Start isEmpty. Operand 73017 states and 234757 transitions. [2019-12-07 13:41:26,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:41:26,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:26,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:26,884 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:26,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:26,884 INFO L82 PathProgramCache]: Analyzing trace with hash -799804073, now seen corresponding path program 1 times [2019-12-07 13:41:26,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:26,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666444301] [2019-12-07 13:41:26,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:26,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:26,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:26,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666444301] [2019-12-07 13:41:26,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:26,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:41:26,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856985091] [2019-12-07 13:41:26,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:26,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:26,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:26,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:26,915 INFO L87 Difference]: Start difference. First operand 73017 states and 234757 transitions. Second operand 5 states. [2019-12-07 13:41:27,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:27,339 INFO L93 Difference]: Finished difference Result 87024 states and 275380 transitions. [2019-12-07 13:41:27,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:41:27,340 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 13:41:27,340 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:27,465 INFO L225 Difference]: With dead ends: 87024 [2019-12-07 13:41:27,466 INFO L226 Difference]: Without dead ends: 86980 [2019-12-07 13:41:27,466 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:27,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86980 states. [2019-12-07 13:41:28,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86980 to 72137. [2019-12-07 13:41:28,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72137 states. [2019-12-07 13:41:28,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72137 states to 72137 states and 232084 transitions. [2019-12-07 13:41:28,771 INFO L78 Accepts]: Start accepts. Automaton has 72137 states and 232084 transitions. Word has length 28 [2019-12-07 13:41:28,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:28,771 INFO L462 AbstractCegarLoop]: Abstraction has 72137 states and 232084 transitions. [2019-12-07 13:41:28,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:28,771 INFO L276 IsEmpty]: Start isEmpty. Operand 72137 states and 232084 transitions. [2019-12-07 13:41:28,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:41:28,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:28,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:28,794 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:28,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:28,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1469523336, now seen corresponding path program 1 times [2019-12-07 13:41:28,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:28,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814752556] [2019-12-07 13:41:28,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:28,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:28,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:28,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814752556] [2019-12-07 13:41:28,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:28,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:41:28,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502477310] [2019-12-07 13:41:28,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:41:28,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:28,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:41:28,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:41:28,822 INFO L87 Difference]: Start difference. First operand 72137 states and 232084 transitions. Second operand 4 states. [2019-12-07 13:41:28,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:28,909 INFO L93 Difference]: Finished difference Result 27979 states and 86655 transitions. [2019-12-07 13:41:28,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:41:28,909 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:41:28,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:28,944 INFO L225 Difference]: With dead ends: 27979 [2019-12-07 13:41:28,944 INFO L226 Difference]: Without dead ends: 27979 [2019-12-07 13:41:28,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:41:29,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27979 states. [2019-12-07 13:41:29,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27979 to 25500. [2019-12-07 13:41:29,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25500 states. [2019-12-07 13:41:29,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25500 states to 25500 states and 79033 transitions. [2019-12-07 13:41:29,331 INFO L78 Accepts]: Start accepts. Automaton has 25500 states and 79033 transitions. Word has length 30 [2019-12-07 13:41:29,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:29,331 INFO L462 AbstractCegarLoop]: Abstraction has 25500 states and 79033 transitions. [2019-12-07 13:41:29,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:41:29,332 INFO L276 IsEmpty]: Start isEmpty. Operand 25500 states and 79033 transitions. [2019-12-07 13:41:29,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 13:41:29,349 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:29,349 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:29,349 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:29,349 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:29,349 INFO L82 PathProgramCache]: Analyzing trace with hash -145847770, now seen corresponding path program 1 times [2019-12-07 13:41:29,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:29,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031219649] [2019-12-07 13:41:29,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:29,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:29,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:29,403 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031219649] [2019-12-07 13:41:29,403 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:29,403 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:41:29,403 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904512147] [2019-12-07 13:41:29,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:41:29,404 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:29,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:41:29,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:41:29,404 INFO L87 Difference]: Start difference. First operand 25500 states and 79033 transitions. Second operand 6 states. [2019-12-07 13:41:29,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:29,813 INFO L93 Difference]: Finished difference Result 32400 states and 98245 transitions. [2019-12-07 13:41:29,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:41:29,813 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 13:41:29,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:29,850 INFO L225 Difference]: With dead ends: 32400 [2019-12-07 13:41:29,850 INFO L226 Difference]: Without dead ends: 32400 [2019-12-07 13:41:29,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:41:29,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32400 states. [2019-12-07 13:41:30,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32400 to 25938. [2019-12-07 13:41:30,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25938 states. [2019-12-07 13:41:30,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25938 states to 25938 states and 80337 transitions. [2019-12-07 13:41:30,320 INFO L78 Accepts]: Start accepts. Automaton has 25938 states and 80337 transitions. Word has length 32 [2019-12-07 13:41:30,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:30,320 INFO L462 AbstractCegarLoop]: Abstraction has 25938 states and 80337 transitions. [2019-12-07 13:41:30,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:41:30,320 INFO L276 IsEmpty]: Start isEmpty. Operand 25938 states and 80337 transitions. [2019-12-07 13:41:30,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:41:30,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:30,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:30,338 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:30,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:30,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1380765993, now seen corresponding path program 1 times [2019-12-07 13:41:30,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:30,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095121507] [2019-12-07 13:41:30,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:30,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:30,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:30,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2095121507] [2019-12-07 13:41:30,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:30,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:41:30,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54670960] [2019-12-07 13:41:30,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:41:30,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:30,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:41:30,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:41:30,384 INFO L87 Difference]: Start difference. First operand 25938 states and 80337 transitions. Second operand 6 states. [2019-12-07 13:41:30,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:30,819 INFO L93 Difference]: Finished difference Result 31899 states and 96883 transitions. [2019-12-07 13:41:30,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:41:30,819 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 13:41:30,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:30,857 INFO L225 Difference]: With dead ends: 31899 [2019-12-07 13:41:30,857 INFO L226 Difference]: Without dead ends: 31899 [2019-12-07 13:41:30,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:41:30,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31899 states. [2019-12-07 13:41:31,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31899 to 24780. [2019-12-07 13:41:31,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24780 states. [2019-12-07 13:41:31,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24780 states to 24780 states and 76926 transitions. [2019-12-07 13:41:31,278 INFO L78 Accepts]: Start accepts. Automaton has 24780 states and 76926 transitions. Word has length 34 [2019-12-07 13:41:31,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:31,278 INFO L462 AbstractCegarLoop]: Abstraction has 24780 states and 76926 transitions. [2019-12-07 13:41:31,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:41:31,278 INFO L276 IsEmpty]: Start isEmpty. Operand 24780 states and 76926 transitions. [2019-12-07 13:41:31,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:41:31,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:31,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:31,299 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:31,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:31,300 INFO L82 PathProgramCache]: Analyzing trace with hash 1174419869, now seen corresponding path program 1 times [2019-12-07 13:41:31,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:31,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61946542] [2019-12-07 13:41:31,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:31,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:31,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:31,348 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61946542] [2019-12-07 13:41:31,348 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:31,348 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:41:31,348 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611756976] [2019-12-07 13:41:31,349 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:31,349 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:31,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:31,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:31,349 INFO L87 Difference]: Start difference. First operand 24780 states and 76926 transitions. Second operand 5 states. [2019-12-07 13:41:31,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:31,761 INFO L93 Difference]: Finished difference Result 36358 states and 111275 transitions. [2019-12-07 13:41:31,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:41:31,762 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:41:31,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:31,804 INFO L225 Difference]: With dead ends: 36358 [2019-12-07 13:41:31,804 INFO L226 Difference]: Without dead ends: 36358 [2019-12-07 13:41:31,804 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:41:31,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36358 states. [2019-12-07 13:41:32,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36358 to 31699. [2019-12-07 13:41:32,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31699 states. [2019-12-07 13:41:32,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31699 states to 31699 states and 98212 transitions. [2019-12-07 13:41:32,303 INFO L78 Accepts]: Start accepts. Automaton has 31699 states and 98212 transitions. Word has length 41 [2019-12-07 13:41:32,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:32,304 INFO L462 AbstractCegarLoop]: Abstraction has 31699 states and 98212 transitions. [2019-12-07 13:41:32,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:32,304 INFO L276 IsEmpty]: Start isEmpty. Operand 31699 states and 98212 transitions. [2019-12-07 13:41:32,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:41:32,333 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:32,333 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:32,333 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:32,333 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:32,333 INFO L82 PathProgramCache]: Analyzing trace with hash 1274395705, now seen corresponding path program 2 times [2019-12-07 13:41:32,333 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:32,333 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599093037] [2019-12-07 13:41:32,334 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:32,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:32,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:32,364 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599093037] [2019-12-07 13:41:32,365 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:32,365 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:41:32,365 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231945002] [2019-12-07 13:41:32,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:41:32,365 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:32,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:41:32,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:32,365 INFO L87 Difference]: Start difference. First operand 31699 states and 98212 transitions. Second operand 5 states. [2019-12-07 13:41:32,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:32,456 INFO L93 Difference]: Finished difference Result 29593 states and 93482 transitions. [2019-12-07 13:41:32,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:41:32,457 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 13:41:32,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:32,494 INFO L225 Difference]: With dead ends: 29593 [2019-12-07 13:41:32,494 INFO L226 Difference]: Without dead ends: 29365 [2019-12-07 13:41:32,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:41:32,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29365 states. [2019-12-07 13:41:32,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29365 to 18223. [2019-12-07 13:41:32,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18223 states. [2019-12-07 13:41:32,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18223 states to 18223 states and 57294 transitions. [2019-12-07 13:41:32,878 INFO L78 Accepts]: Start accepts. Automaton has 18223 states and 57294 transitions. Word has length 41 [2019-12-07 13:41:32,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:32,878 INFO L462 AbstractCegarLoop]: Abstraction has 18223 states and 57294 transitions. [2019-12-07 13:41:32,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:41:32,878 INFO L276 IsEmpty]: Start isEmpty. Operand 18223 states and 57294 transitions. [2019-12-07 13:41:32,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:41:32,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:32,892 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:32,892 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:32,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:32,893 INFO L82 PathProgramCache]: Analyzing trace with hash 1306345889, now seen corresponding path program 1 times [2019-12-07 13:41:32,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:32,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109352171] [2019-12-07 13:41:32,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:32,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:32,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:32,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109352171] [2019-12-07 13:41:32,945 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:32,945 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:41:32,945 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152167901] [2019-12-07 13:41:32,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:41:32,946 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:32,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:41:32,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:41:32,946 INFO L87 Difference]: Start difference. First operand 18223 states and 57294 transitions. Second operand 6 states. [2019-12-07 13:41:33,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:33,448 INFO L93 Difference]: Finished difference Result 24434 states and 75591 transitions. [2019-12-07 13:41:33,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 13:41:33,448 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 64 [2019-12-07 13:41:33,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:33,474 INFO L225 Difference]: With dead ends: 24434 [2019-12-07 13:41:33,474 INFO L226 Difference]: Without dead ends: 24434 [2019-12-07 13:41:33,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:41:33,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24434 states. [2019-12-07 13:41:33,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24434 to 19099. [2019-12-07 13:41:33,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19099 states. [2019-12-07 13:41:33,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19099 states to 19099 states and 59998 transitions. [2019-12-07 13:41:33,779 INFO L78 Accepts]: Start accepts. Automaton has 19099 states and 59998 transitions. Word has length 64 [2019-12-07 13:41:33,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:33,779 INFO L462 AbstractCegarLoop]: Abstraction has 19099 states and 59998 transitions. [2019-12-07 13:41:33,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:41:33,779 INFO L276 IsEmpty]: Start isEmpty. Operand 19099 states and 59998 transitions. [2019-12-07 13:41:33,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:41:33,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:33,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:33,795 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:33,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:33,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1813344643, now seen corresponding path program 2 times [2019-12-07 13:41:33,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:33,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313137636] [2019-12-07 13:41:33,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:33,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:33,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:33,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313137636] [2019-12-07 13:41:33,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:33,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:41:33,859 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364865945] [2019-12-07 13:41:33,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:41:33,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:33,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:41:33,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:33,860 INFO L87 Difference]: Start difference. First operand 19099 states and 59998 transitions. Second operand 7 states. [2019-12-07 13:41:34,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:34,814 INFO L93 Difference]: Finished difference Result 26732 states and 82068 transitions. [2019-12-07 13:41:34,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 13:41:34,814 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:41:34,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:34,845 INFO L225 Difference]: With dead ends: 26732 [2019-12-07 13:41:34,846 INFO L226 Difference]: Without dead ends: 26732 [2019-12-07 13:41:34,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=396, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:41:34,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26732 states. [2019-12-07 13:41:35,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26732 to 19211. [2019-12-07 13:41:35,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19211 states. [2019-12-07 13:41:35,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19211 states to 19211 states and 60262 transitions. [2019-12-07 13:41:35,165 INFO L78 Accepts]: Start accepts. Automaton has 19211 states and 60262 transitions. Word has length 64 [2019-12-07 13:41:35,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:35,165 INFO L462 AbstractCegarLoop]: Abstraction has 19211 states and 60262 transitions. [2019-12-07 13:41:35,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:41:35,165 INFO L276 IsEmpty]: Start isEmpty. Operand 19211 states and 60262 transitions. [2019-12-07 13:41:35,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:41:35,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:35,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:35,181 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:35,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:35,181 INFO L82 PathProgramCache]: Analyzing trace with hash 1013389541, now seen corresponding path program 3 times [2019-12-07 13:41:35,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:35,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852237177] [2019-12-07 13:41:35,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:35,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:35,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:35,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852237177] [2019-12-07 13:41:35,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:35,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:41:35,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429105668] [2019-12-07 13:41:35,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:41:35,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:35,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:41:35,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:35,231 INFO L87 Difference]: Start difference. First operand 19211 states and 60262 transitions. Second operand 7 states. [2019-12-07 13:41:35,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:35,612 INFO L93 Difference]: Finished difference Result 55054 states and 172444 transitions. [2019-12-07 13:41:35,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:41:35,612 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-07 13:41:35,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:35,664 INFO L225 Difference]: With dead ends: 55054 [2019-12-07 13:41:35,664 INFO L226 Difference]: Without dead ends: 41813 [2019-12-07 13:41:35,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 13:41:35,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41813 states. [2019-12-07 13:41:36,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41813 to 23705. [2019-12-07 13:41:36,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23705 states. [2019-12-07 13:41:36,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23705 states to 23705 states and 74427 transitions. [2019-12-07 13:41:36,188 INFO L78 Accepts]: Start accepts. Automaton has 23705 states and 74427 transitions. Word has length 64 [2019-12-07 13:41:36,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:36,189 INFO L462 AbstractCegarLoop]: Abstraction has 23705 states and 74427 transitions. [2019-12-07 13:41:36,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:41:36,189 INFO L276 IsEmpty]: Start isEmpty. Operand 23705 states and 74427 transitions. [2019-12-07 13:41:36,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 13:41:36,210 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:36,210 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:36,210 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:36,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:36,211 INFO L82 PathProgramCache]: Analyzing trace with hash -1737700513, now seen corresponding path program 4 times [2019-12-07 13:41:36,211 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:36,211 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133190480] [2019-12-07 13:41:36,211 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:36,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:36,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:36,250 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [133190480] [2019-12-07 13:41:36,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:36,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:41:36,250 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590278037] [2019-12-07 13:41:36,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:41:36,251 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:36,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:41:36,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:36,251 INFO L87 Difference]: Start difference. First operand 23705 states and 74427 transitions. Second operand 3 states. [2019-12-07 13:41:36,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:36,359 INFO L93 Difference]: Finished difference Result 27811 states and 86759 transitions. [2019-12-07 13:41:36,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:41:36,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 13:41:36,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:36,393 INFO L225 Difference]: With dead ends: 27811 [2019-12-07 13:41:36,393 INFO L226 Difference]: Without dead ends: 27811 [2019-12-07 13:41:36,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:36,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27811 states. [2019-12-07 13:41:36,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27811 to 23918. [2019-12-07 13:41:36,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23918 states. [2019-12-07 13:41:36,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23918 states to 23918 states and 75246 transitions. [2019-12-07 13:41:36,773 INFO L78 Accepts]: Start accepts. Automaton has 23918 states and 75246 transitions. Word has length 64 [2019-12-07 13:41:36,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:36,773 INFO L462 AbstractCegarLoop]: Abstraction has 23918 states and 75246 transitions. [2019-12-07 13:41:36,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:41:36,773 INFO L276 IsEmpty]: Start isEmpty. Operand 23918 states and 75246 transitions. [2019-12-07 13:41:36,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:36,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:36,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:36,793 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:36,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:36,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1954524855, now seen corresponding path program 1 times [2019-12-07 13:41:36,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:36,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312451000] [2019-12-07 13:41:36,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:36,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:36,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:36,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312451000] [2019-12-07 13:41:36,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:36,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:41:36,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846145948] [2019-12-07 13:41:36,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:41:36,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:36,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:41:36,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:36,857 INFO L87 Difference]: Start difference. First operand 23918 states and 75246 transitions. Second operand 7 states. [2019-12-07 13:41:37,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:37,535 INFO L93 Difference]: Finished difference Result 31531 states and 97219 transitions. [2019-12-07 13:41:37,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:41:37,535 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:41:37,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:37,571 INFO L225 Difference]: With dead ends: 31531 [2019-12-07 13:41:37,571 INFO L226 Difference]: Without dead ends: 31531 [2019-12-07 13:41:37,571 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:41:37,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31531 states. [2019-12-07 13:41:37,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31531 to 23815. [2019-12-07 13:41:37,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23815 states. [2019-12-07 13:41:37,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23815 states to 23815 states and 74940 transitions. [2019-12-07 13:41:37,962 INFO L78 Accepts]: Start accepts. Automaton has 23815 states and 74940 transitions. Word has length 65 [2019-12-07 13:41:37,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:37,962 INFO L462 AbstractCegarLoop]: Abstraction has 23815 states and 74940 transitions. [2019-12-07 13:41:37,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:41:37,962 INFO L276 IsEmpty]: Start isEmpty. Operand 23815 states and 74940 transitions. [2019-12-07 13:41:37,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:37,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:37,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:37,982 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:37,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:37,982 INFO L82 PathProgramCache]: Analyzing trace with hash -345348113, now seen corresponding path program 2 times [2019-12-07 13:41:37,982 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:37,982 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543614236] [2019-12-07 13:41:37,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:37,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:38,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:38,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543614236] [2019-12-07 13:41:38,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:38,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:41:38,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096080188] [2019-12-07 13:41:38,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:41:38,191 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:38,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:41:38,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:41:38,191 INFO L87 Difference]: Start difference. First operand 23815 states and 74940 transitions. Second operand 12 states. [2019-12-07 13:41:41,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:41,714 INFO L93 Difference]: Finished difference Result 111521 states and 342035 transitions. [2019-12-07 13:41:41,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 13:41:41,714 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 65 [2019-12-07 13:41:41,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:41,815 INFO L225 Difference]: With dead ends: 111521 [2019-12-07 13:41:41,816 INFO L226 Difference]: Without dead ends: 76219 [2019-12-07 13:41:41,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 452 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=321, Invalid=1401, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 13:41:42,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76219 states. [2019-12-07 13:41:42,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76219 to 27056. [2019-12-07 13:41:42,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27056 states. [2019-12-07 13:41:42,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27056 states to 27056 states and 84995 transitions. [2019-12-07 13:41:42,536 INFO L78 Accepts]: Start accepts. Automaton has 27056 states and 84995 transitions. Word has length 65 [2019-12-07 13:41:42,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:42,536 INFO L462 AbstractCegarLoop]: Abstraction has 27056 states and 84995 transitions. [2019-12-07 13:41:42,536 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:41:42,536 INFO L276 IsEmpty]: Start isEmpty. Operand 27056 states and 84995 transitions. [2019-12-07 13:41:42,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:42,563 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:42,564 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:42,564 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:42,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:42,564 INFO L82 PathProgramCache]: Analyzing trace with hash -653793855, now seen corresponding path program 3 times [2019-12-07 13:41:42,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:42,564 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270411801] [2019-12-07 13:41:42,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:42,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:42,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:42,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270411801] [2019-12-07 13:41:42,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:42,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:41:42,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408827458] [2019-12-07 13:41:42,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:41:42,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:42,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:41:42,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:41:42,741 INFO L87 Difference]: Start difference. First operand 27056 states and 84995 transitions. Second operand 13 states. [2019-12-07 13:41:45,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:45,599 INFO L93 Difference]: Finished difference Result 92884 states and 284551 transitions. [2019-12-07 13:41:45,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 13:41:45,599 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 65 [2019-12-07 13:41:45,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:45,692 INFO L225 Difference]: With dead ends: 92884 [2019-12-07 13:41:45,693 INFO L226 Difference]: Without dead ends: 77699 [2019-12-07 13:41:45,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 957 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=567, Invalid=2625, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 13:41:45,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77699 states. [2019-12-07 13:41:46,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77699 to 26842. [2019-12-07 13:41:46,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26842 states. [2019-12-07 13:41:46,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26842 states to 26842 states and 84450 transitions. [2019-12-07 13:41:46,386 INFO L78 Accepts]: Start accepts. Automaton has 26842 states and 84450 transitions. Word has length 65 [2019-12-07 13:41:46,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:46,386 INFO L462 AbstractCegarLoop]: Abstraction has 26842 states and 84450 transitions. [2019-12-07 13:41:46,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:41:46,386 INFO L276 IsEmpty]: Start isEmpty. Operand 26842 states and 84450 transitions. [2019-12-07 13:41:46,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:46,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:46,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:46,413 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:46,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:46,413 INFO L82 PathProgramCache]: Analyzing trace with hash -1976937813, now seen corresponding path program 4 times [2019-12-07 13:41:46,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:46,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139403225] [2019-12-07 13:41:46,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:46,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:46,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:46,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139403225] [2019-12-07 13:41:46,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:46,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:41:46,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1348469621] [2019-12-07 13:41:46,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:41:46,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:46,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:41:46,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:41:46,485 INFO L87 Difference]: Start difference. First operand 26842 states and 84450 transitions. Second operand 7 states. [2019-12-07 13:41:47,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:47,081 INFO L93 Difference]: Finished difference Result 94836 states and 299288 transitions. [2019-12-07 13:41:47,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:41:47,081 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 13:41:47,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:47,201 INFO L225 Difference]: With dead ends: 94836 [2019-12-07 13:41:47,201 INFO L226 Difference]: Without dead ends: 85838 [2019-12-07 13:41:47,201 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2019-12-07 13:41:47,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85838 states. [2019-12-07 13:41:47,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85838 to 27484. [2019-12-07 13:41:47,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27484 states. [2019-12-07 13:41:47,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27484 states to 27484 states and 86703 transitions. [2019-12-07 13:41:47,973 INFO L78 Accepts]: Start accepts. Automaton has 27484 states and 86703 transitions. Word has length 65 [2019-12-07 13:41:47,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:47,974 INFO L462 AbstractCegarLoop]: Abstraction has 27484 states and 86703 transitions. [2019-12-07 13:41:47,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:41:47,974 INFO L276 IsEmpty]: Start isEmpty. Operand 27484 states and 86703 transitions. [2019-12-07 13:41:48,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:48,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:48,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:48,001 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:48,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:48,002 INFO L82 PathProgramCache]: Analyzing trace with hash 1140507895, now seen corresponding path program 5 times [2019-12-07 13:41:48,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:48,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352905512] [2019-12-07 13:41:48,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:48,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:48,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:48,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352905512] [2019-12-07 13:41:48,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:48,069 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:41:48,069 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419823557] [2019-12-07 13:41:48,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:41:48,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:48,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:41:48,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:41:48,070 INFO L87 Difference]: Start difference. First operand 27484 states and 86703 transitions. Second operand 6 states. [2019-12-07 13:41:48,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:48,596 INFO L93 Difference]: Finished difference Result 93929 states and 293482 transitions. [2019-12-07 13:41:48,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:41:48,596 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:41:48,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:48,695 INFO L225 Difference]: With dead ends: 93929 [2019-12-07 13:41:48,695 INFO L226 Difference]: Without dead ends: 76382 [2019-12-07 13:41:48,696 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:41:48,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76382 states. [2019-12-07 13:41:49,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76382 to 27409. [2019-12-07 13:41:49,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27409 states. [2019-12-07 13:41:49,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27409 states to 27409 states and 86063 transitions. [2019-12-07 13:41:49,400 INFO L78 Accepts]: Start accepts. Automaton has 27409 states and 86063 transitions. Word has length 65 [2019-12-07 13:41:49,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:49,400 INFO L462 AbstractCegarLoop]: Abstraction has 27409 states and 86063 transitions. [2019-12-07 13:41:49,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:41:49,400 INFO L276 IsEmpty]: Start isEmpty. Operand 27409 states and 86063 transitions. [2019-12-07 13:41:49,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:41:49,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:49,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:49,428 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:49,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:49,428 INFO L82 PathProgramCache]: Analyzing trace with hash 765305305, now seen corresponding path program 6 times [2019-12-07 13:41:49,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:49,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809896123] [2019-12-07 13:41:49,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:49,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:49,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:49,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809896123] [2019-12-07 13:41:49,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:49,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:41:49,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424630609] [2019-12-07 13:41:49,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:41:49,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:49,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:41:49,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:49,458 INFO L87 Difference]: Start difference. First operand 27409 states and 86063 transitions. Second operand 3 states. [2019-12-07 13:41:49,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:49,521 INFO L93 Difference]: Finished difference Result 23556 states and 72740 transitions. [2019-12-07 13:41:49,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:41:49,522 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 13:41:49,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:49,549 INFO L225 Difference]: With dead ends: 23556 [2019-12-07 13:41:49,549 INFO L226 Difference]: Without dead ends: 23556 [2019-12-07 13:41:49,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:41:49,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23556 states. [2019-12-07 13:41:49,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23556 to 21780. [2019-12-07 13:41:49,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21780 states. [2019-12-07 13:41:49,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21780 states to 21780 states and 67270 transitions. [2019-12-07 13:41:49,859 INFO L78 Accepts]: Start accepts. Automaton has 21780 states and 67270 transitions. Word has length 65 [2019-12-07 13:41:49,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:49,859 INFO L462 AbstractCegarLoop]: Abstraction has 21780 states and 67270 transitions. [2019-12-07 13:41:49,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:41:49,859 INFO L276 IsEmpty]: Start isEmpty. Operand 21780 states and 67270 transitions. [2019-12-07 13:41:49,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:41:49,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:49,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:49,878 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:49,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:49,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1524862519, now seen corresponding path program 1 times [2019-12-07 13:41:49,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:49,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028475746] [2019-12-07 13:41:49,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:49,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:50,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:50,191 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028475746] [2019-12-07 13:41:50,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:50,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:41:50,191 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1650736527] [2019-12-07 13:41:50,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:41:50,191 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:50,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:41:50,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:41:50,191 INFO L87 Difference]: Start difference. First operand 21780 states and 67270 transitions. Second operand 15 states. [2019-12-07 13:41:54,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:54,688 INFO L93 Difference]: Finished difference Result 86305 states and 264774 transitions. [2019-12-07 13:41:54,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2019-12-07 13:41:54,688 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 13:41:54,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:54,798 INFO L225 Difference]: With dead ends: 86305 [2019-12-07 13:41:54,798 INFO L226 Difference]: Without dead ends: 84161 [2019-12-07 13:41:54,801 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2415 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1082, Invalid=5890, Unknown=0, NotChecked=0, Total=6972 [2019-12-07 13:41:55,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84161 states. [2019-12-07 13:41:55,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84161 to 24792. [2019-12-07 13:41:55,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24792 states. [2019-12-07 13:41:55,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24792 states to 24792 states and 76120 transitions. [2019-12-07 13:41:55,538 INFO L78 Accepts]: Start accepts. Automaton has 24792 states and 76120 transitions. Word has length 66 [2019-12-07 13:41:55,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:55,539 INFO L462 AbstractCegarLoop]: Abstraction has 24792 states and 76120 transitions. [2019-12-07 13:41:55,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:41:55,539 INFO L276 IsEmpty]: Start isEmpty. Operand 24792 states and 76120 transitions. [2019-12-07 13:41:55,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:41:55,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:55,564 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:55,564 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:55,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:55,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1239159877, now seen corresponding path program 2 times [2019-12-07 13:41:55,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:55,564 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146234850] [2019-12-07 13:41:55,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:55,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:55,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:55,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146234850] [2019-12-07 13:41:55,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:55,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 13:41:55,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1146793993] [2019-12-07 13:41:55,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 13:41:55,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:55,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 13:41:55,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:41:55,667 INFO L87 Difference]: Start difference. First operand 24792 states and 76120 transitions. Second operand 11 states. [2019-12-07 13:41:56,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:56,520 INFO L93 Difference]: Finished difference Result 53640 states and 164390 transitions. [2019-12-07 13:41:56,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 13:41:56,520 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 13:41:56,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:56,563 INFO L225 Difference]: With dead ends: 53640 [2019-12-07 13:41:56,564 INFO L226 Difference]: Without dead ends: 36799 [2019-12-07 13:41:56,564 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 240 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=853, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 13:41:56,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36799 states. [2019-12-07 13:41:56,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36799 to 21685. [2019-12-07 13:41:56,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21685 states. [2019-12-07 13:41:56,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21685 states to 21685 states and 66371 transitions. [2019-12-07 13:41:56,978 INFO L78 Accepts]: Start accepts. Automaton has 21685 states and 66371 transitions. Word has length 66 [2019-12-07 13:41:56,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:56,978 INFO L462 AbstractCegarLoop]: Abstraction has 21685 states and 66371 transitions. [2019-12-07 13:41:56,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 13:41:56,978 INFO L276 IsEmpty]: Start isEmpty. Operand 21685 states and 66371 transitions. [2019-12-07 13:41:56,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:41:56,996 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:56,996 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:56,996 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:56,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:56,997 INFO L82 PathProgramCache]: Analyzing trace with hash -952881413, now seen corresponding path program 3 times [2019-12-07 13:41:56,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:56,997 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721280161] [2019-12-07 13:41:56,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:57,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:41:57,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:41:57,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721280161] [2019-12-07 13:41:57,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:41:57,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:41:57,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [298448460] [2019-12-07 13:41:57,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:41:57,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:41:57,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:41:57,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:41:57,179 INFO L87 Difference]: Start difference. First operand 21685 states and 66371 transitions. Second operand 12 states. [2019-12-07 13:41:57,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:41:57,866 INFO L93 Difference]: Finished difference Result 37239 states and 113604 transitions. [2019-12-07 13:41:57,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 13:41:57,866 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 13:41:57,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:41:57,908 INFO L225 Difference]: With dead ends: 37239 [2019-12-07 13:41:57,908 INFO L226 Difference]: Without dead ends: 36118 [2019-12-07 13:41:57,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 13:41:58,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36118 states. [2019-12-07 13:41:58,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36118 to 20957. [2019-12-07 13:41:58,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20957 states. [2019-12-07 13:41:58,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20957 states to 20957 states and 64340 transitions. [2019-12-07 13:41:58,305 INFO L78 Accepts]: Start accepts. Automaton has 20957 states and 64340 transitions. Word has length 66 [2019-12-07 13:41:58,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:41:58,306 INFO L462 AbstractCegarLoop]: Abstraction has 20957 states and 64340 transitions. [2019-12-07 13:41:58,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:41:58,306 INFO L276 IsEmpty]: Start isEmpty. Operand 20957 states and 64340 transitions. [2019-12-07 13:41:58,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:41:58,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:41:58,323 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:41:58,323 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:41:58,323 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:41:58,323 INFO L82 PathProgramCache]: Analyzing trace with hash 620198601, now seen corresponding path program 4 times [2019-12-07 13:41:58,323 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:41:58,323 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329534677] [2019-12-07 13:41:58,323 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:41:58,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:41:58,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:41:58,394 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:41:58,394 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:41:58,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t660~0.base_22| 4)) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t660~0.base_22|)) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= (store .cse0 |v_ULTIMATE.start_main_~#t660~0.base_22| 1) |v_#valid_69|) (= v_~z$read_delayed~0_7 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t660~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t660~0.base_22|) |v_ULTIMATE.start_main_~#t660~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= |v_ULTIMATE.start_main_~#t660~0.offset_16| 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t660~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t662~0.base=|v_ULTIMATE.start_main_~#t662~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, ULTIMATE.start_main_~#t660~0.offset=|v_ULTIMATE.start_main_~#t660~0.offset_16|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ULTIMATE.start_main_~#t661~0.offset=|v_ULTIMATE.start_main_~#t661~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ULTIMATE.start_main_~#t660~0.base=|v_ULTIMATE.start_main_~#t660~0.base_22|, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t662~0.offset=|v_ULTIMATE.start_main_~#t662~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380, ULTIMATE.start_main_~#t661~0.base=|v_ULTIMATE.start_main_~#t661~0.base_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t662~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t660~0.offset, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t661~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t660~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t662~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t661~0.base] because there is no mapped edge [2019-12-07 13:41:58,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:41:58,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t661~0.base_11|)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t661~0.base_11| 1) |v_#valid_31|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t661~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t661~0.base_11|) |v_ULTIMATE.start_main_~#t661~0.offset_10| 1))) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t661~0.base_11| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t661~0.base_11|) (= |v_ULTIMATE.start_main_~#t661~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t661~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t661~0.offset=|v_ULTIMATE.start_main_~#t661~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t661~0.base=|v_ULTIMATE.start_main_~#t661~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t661~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t661~0.base] because there is no mapped edge [2019-12-07 13:41:58,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t662~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t662~0.base_12|) |v_ULTIMATE.start_main_~#t662~0.offset_10| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t662~0.base_12| 0)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t662~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t662~0.base_12| 4) |v_#length_13|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t662~0.base_12|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t662~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t662~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t662~0.offset=|v_ULTIMATE.start_main_~#t662~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t662~0.base=|v_ULTIMATE.start_main_~#t662~0.base_12|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t662~0.offset, ULTIMATE.start_main_~#t662~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 13:41:58,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1013475305 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1013475305 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite10_Out-1013475305| |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|))) (or (and (= ~z~0_In-1013475305 |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In-1013475305 |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$w_buff1~0=~z$w_buff1~0_In-1013475305, ~z~0=~z~0_In-1013475305} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1013475305|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1013475305, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1013475305|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$w_buff1~0=~z$w_buff1~0_In-1013475305, ~z~0=~z~0_In-1013475305} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:41:58,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1990416102 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1990416102 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1990416102 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1990416102 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1990416102 256))))) (= |P2Thread1of1ForFork0_#t~ite23_Out1990416102| |P2Thread1of1ForFork0_#t~ite24_Out1990416102|) (= ~z$w_buff1~0_In1990416102 |P2Thread1of1ForFork0_#t~ite23_Out1990416102|)) (and (= ~z$w_buff1~0_In1990416102 |P2Thread1of1ForFork0_#t~ite24_Out1990416102|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1990416102| |P2Thread1of1ForFork0_#t~ite23_Out1990416102|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1990416102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1990416102, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1990416102|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1990416102, ~z$w_buff1~0=~z$w_buff1~0_In1990416102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1990416102, ~weak$$choice2~0=~weak$$choice2~0_In1990416102} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1990416102, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1990416102|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1990416102, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1990416102|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1990416102, ~z$w_buff1~0=~z$w_buff1~0_In1990416102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1990416102, ~weak$$choice2~0=~weak$$choice2~0_In1990416102} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:41:58,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite30_Out-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|)) (.cse5 (= 0 (mod ~z$r_buff1_thd3~0_In-334736686 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-334736686 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-334736686 256))) (.cse6 (= (mod ~z$r_buff0_thd3~0_In-334736686 256) 0)) (.cse4 (= 0 (mod ~weak$$choice2~0_In-334736686 256)))) (or (let ((.cse2 (not .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite28_Out-334736686| 0) (= |P2Thread1of1ForFork0_#t~ite28_Out-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|) .cse0 (or (not .cse1) .cse2) (not .cse3) .cse4 (or .cse2 (not .cse5)))) (and (= |P2Thread1of1ForFork0_#t~ite28_In-334736686| |P2Thread1of1ForFork0_#t~ite28_Out-334736686|) (or (and .cse0 .cse4 (= |P2Thread1of1ForFork0_#t~ite29_Out-334736686| ~z$w_buff1_used~0_In-334736686) (or (and .cse5 .cse6) .cse3 (and .cse1 .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite29_In-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|) (= |P2Thread1of1ForFork0_#t~ite30_Out-334736686| ~z$w_buff1_used~0_In-334736686) (not .cse4)))))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-334736686|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-334736686, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-334736686, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-334736686, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-334736686, ~weak$$choice2~0=~weak$$choice2~0_In-334736686, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-334736686|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-334736686|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-334736686, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-334736686, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-334736686, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-334736686, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-334736686|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-334736686|, ~weak$$choice2~0=~weak$$choice2~0_In-334736686} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:41:58,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:41:58,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:41:58,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1402410507| |P2Thread1of1ForFork0_#t~ite38_Out-1402410507|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1402410507 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-1402410507| ~z~0_In-1402410507)) (and .cse2 (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1402410507| ~z$w_buff1~0_In-1402410507)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$w_buff1~0=~z$w_buff1~0_In-1402410507, ~z~0=~z~0_In-1402410507} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1402410507|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1402410507|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$w_buff1~0=~z$w_buff1~0_In-1402410507, ~z~0=~z~0_In-1402410507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:41:58,404 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1289048642 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1289048642 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1289048642 |P2Thread1of1ForFork0_#t~ite40_Out1289048642|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1289048642| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1289048642|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:41:58,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1327560572 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1327560572 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1327560572 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In1327560572 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out1327560572| ~z$w_buff1_used~0_In1327560572) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out1327560572| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1327560572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1327560572, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1327560572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1327560572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1327560572, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1327560572, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1327560572|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:41:58,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1716402047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| ~z$r_buff0_thd3~0_In1716402047) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1716402047|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:41:58,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-200040396 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-200040396 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-200040396 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-200040396 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-200040396| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-200040396 |P2Thread1of1ForFork0_#t~ite43_Out-200040396|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-200040396|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:41:58,405 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:41:58,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1136249117 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1136249117 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1136249117| 0) (not .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1136249117| ~z$w_buff0_used~0_In-1136249117) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1136249117, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1136249117} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1136249117|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1136249117, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1136249117} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:41:58,406 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1571626790 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1571626790 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1571626790 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1571626790 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1571626790| ~z$w_buff1_used~0_In-1571626790) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1571626790| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1571626790, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571626790, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1571626790} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1571626790|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1571626790, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571626790, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1571626790} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:41:58,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In398745964 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In398745964 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In398745964 ~z$r_buff0_thd1~0_Out398745964))) (or (and (= ~z$r_buff0_thd1~0_Out398745964 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In398745964} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out398745964|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out398745964} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:41:58,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1298049477 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1298049477 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1298049477 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1298049477| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1298049477| ~z$r_buff1_thd1~0_In1298049477) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1298049477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1298049477|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1298049477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:41:58,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:41:58,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1492105421 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1492105421 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1492105421 |P1Thread1of1ForFork2_#t~ite11_Out1492105421|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1492105421|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1492105421} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1492105421|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1492105421} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:41:58,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-286014316 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-286014316 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-286014316 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-286014316 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-286014316|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-286014316 |P1Thread1of1ForFork2_#t~ite12_Out-286014316|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-286014316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-286014316, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-286014316} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-286014316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-286014316, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-286014316|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-286014316} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:41:58,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In369921047 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In369921047 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out369921047|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In369921047 |P1Thread1of1ForFork2_#t~ite13_Out369921047|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out369921047|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:41:58,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In218642557 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In218642557 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In218642557 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In218642557 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In218642557 |P1Thread1of1ForFork2_#t~ite14_Out218642557|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out218642557|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In218642557} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out218642557|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In218642557} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:41:58,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:41:58,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:41:58,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1154568952 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1154568952 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1154568952| ~z$w_buff1~0_In1154568952)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1154568952| ~z~0_In1154568952)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1154568952, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154568952, ~z$w_buff1~0=~z$w_buff1~0_In1154568952, ~z~0=~z~0_In1154568952} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1154568952, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1154568952|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154568952, ~z$w_buff1~0=~z$w_buff1~0_In1154568952, ~z~0=~z~0_In1154568952} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:41:58,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 13:41:58,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-266967960 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-266967960 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-266967960| ~z$w_buff0_used~0_In-266967960)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-266967960| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-266967960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-266967960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-266967960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:41:58,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1816394258 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1816394258 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1816394258 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1816394258 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1816394258| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1816394258 |ULTIMATE.start_main_#t~ite50_Out1816394258|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1816394258|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:41:58,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1834842706 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1834842706 |ULTIMATE.start_main_#t~ite51_Out-1834842706|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1834842706| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1834842706, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1834842706, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:41:58,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1307786193 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1307786193 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1307786193 256)))) (or (and (= ~z$r_buff1_thd0~0_In-1307786193 |ULTIMATE.start_main_#t~ite52_Out-1307786193|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1307786193|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1307786193, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1307786193|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1307786193, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:41:58,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:41:58,463 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:41:58 BasicIcfg [2019-12-07 13:41:58,463 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:41:58,463 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:41:58,463 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:41:58,463 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:41:58,464 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:38:16" (3/4) ... [2019-12-07 13:41:58,465 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:41:58,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_749 0) (= v_~weak$$choice2~0_132 0) (= 0 v_~weak$$choice0~0_14) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_380 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t660~0.base_22| 4)) (= v_~z$r_buff0_thd2~0_184 0) (= v_~__unbuffered_cnt~0_128 0) (= v_~y~0_48 0) (= v_~z$mem_tmp~0_24 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$r_buff1_thd0~0_296 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= v_~z$w_buff1_used~0_500 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t660~0.base_22|)) (= v_~z$r_buff0_thd0~0_197 0) (= 0 |v_#NULL.base_6|) (= 0 v_~z$flush_delayed~0_43) (= 0 v_~__unbuffered_p0_EAX~0_233) (= (store .cse0 |v_ULTIMATE.start_main_~#t660~0.base_22| 1) |v_#valid_69|) (= v_~z$read_delayed~0_7 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t660~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t660~0.base_22|) |v_ULTIMATE.start_main_~#t660~0.offset_16| 0)) |v_#memory_int_19|) (= 0 v_~z$r_buff1_thd3~0_396) (= v_~z$r_buff1_thd1~0_267 0) (= |v_ULTIMATE.start_main_~#t660~0.offset_16| 0) (= 0 v_~__unbuffered_p2_EAX~0_37) (= v_~z$w_buff0~0_256 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd3~0_379) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t660~0.base_22|) (= v_~z$r_buff1_thd2~0_280 0) (= v_~z$w_buff1~0_199 0) (= 0 v_~x~0_133) (= v_~z~0_182 0) (= v_~main$tmp_guard1~0_40 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t662~0.base=|v_ULTIMATE.start_main_~#t662~0.base_17|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_280, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_63|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_113|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_223|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_76|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_197, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_233, ULTIMATE.start_main_~#t660~0.offset=|v_ULTIMATE.start_main_~#t660~0.offset_16|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_37, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_500, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_267, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_379, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, ~x~0=v_~x~0_133, ULTIMATE.start_main_~#t661~0.offset=|v_ULTIMATE.start_main_~#t661~0.offset_14|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_40, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_45|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_296, ULTIMATE.start_main_~#t660~0.base=|v_ULTIMATE.start_main_~#t660~0.base_22|, ~y~0=v_~y~0_48, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_184, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_749, ~z$w_buff0~0=v_~z$w_buff0~0_256, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_396, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t662~0.offset=|v_ULTIMATE.start_main_~#t662~0.offset_14|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_380, ULTIMATE.start_main_~#t661~0.base=|v_ULTIMATE.start_main_~#t661~0.base_19|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t662~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t660~0.offset, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t661~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t660~0.base, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t662~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t661~0.base] because there is no mapped edge [2019-12-07 13:41:58,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L4-->L746: Formula: (and (= v_~z$r_buff0_thd1~0_29 v_~z$r_buff1_thd1~0_17) (= v_~z$r_buff0_thd2~0_25 v_~z$r_buff1_thd2~0_17) (= v_~z$r_buff0_thd3~0_70 v_~z$r_buff1_thd3~0_54) (= v_~z$r_buff0_thd1~0_28 1) (not (= 0 v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8)) (= v_~z$r_buff0_thd0~0_26 v_~z$r_buff1_thd0~0_23) (= v_~x~0_9 v_~__unbuffered_p0_EAX~0_11)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_29, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_11, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_26, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_54, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_23, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_17, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_17, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_70, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_8, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_28, ~x~0=v_~x~0_9, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_25} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:41:58,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [860] [860] L825-1-->L827: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t661~0.base_11|)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t661~0.base_11| 1) |v_#valid_31|) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t661~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t661~0.base_11|) |v_ULTIMATE.start_main_~#t661~0.offset_10| 1))) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t661~0.base_11| 4) |v_#length_15|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t661~0.base_11|) (= |v_ULTIMATE.start_main_~#t661~0.offset_10| 0) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t661~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t661~0.offset=|v_ULTIMATE.start_main_~#t661~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t661~0.base=|v_ULTIMATE.start_main_~#t661~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t661~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t661~0.base] because there is no mapped edge [2019-12-07 13:41:58,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L827-1-->L829: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t662~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t662~0.base_12|) |v_ULTIMATE.start_main_~#t662~0.offset_10| 2)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t662~0.base_12| 0)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t662~0.base_12|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t662~0.base_12| 4) |v_#length_13|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t662~0.base_12|)) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t662~0.base_12| 1)) (= |v_ULTIMATE.start_main_~#t662~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t662~0.offset=|v_ULTIMATE.start_main_~#t662~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t662~0.base=|v_ULTIMATE.start_main_~#t662~0.base_12|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t662~0.offset, ULTIMATE.start_main_~#t662~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 13:41:58,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L766-2-->L766-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1013475305 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1013475305 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite10_Out-1013475305| |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|))) (or (and (= ~z~0_In-1013475305 |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In-1013475305 |P1Thread1of1ForFork2_#t~ite9_Out-1013475305|) (not .cse0) (not .cse1) .cse2))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1013475305, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$w_buff1~0=~z$w_buff1~0_In-1013475305, ~z~0=~z~0_In-1013475305} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1013475305|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1013475305, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1013475305|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1013475305, ~z$w_buff1~0=~z$w_buff1~0_In-1013475305, ~z~0=~z~0_In-1013475305} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:41:58,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L792-->L792-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1990416102 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1990416102 256) 0))) (or (and (= 0 (mod ~z$r_buff1_thd3~0_In1990416102 256)) .cse1) (= 0 (mod ~z$w_buff0_used~0_In1990416102 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1990416102 256))))) (= |P2Thread1of1ForFork0_#t~ite23_Out1990416102| |P2Thread1of1ForFork0_#t~ite24_Out1990416102|) (= ~z$w_buff1~0_In1990416102 |P2Thread1of1ForFork0_#t~ite23_Out1990416102|)) (and (= ~z$w_buff1~0_In1990416102 |P2Thread1of1ForFork0_#t~ite24_Out1990416102|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite23_In1990416102| |P2Thread1of1ForFork0_#t~ite23_Out1990416102|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1990416102, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1990416102, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In1990416102|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1990416102, ~z$w_buff1~0=~z$w_buff1~0_In1990416102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1990416102, ~weak$$choice2~0=~weak$$choice2~0_In1990416102} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1990416102, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out1990416102|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1990416102, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out1990416102|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1990416102, ~z$w_buff1~0=~z$w_buff1~0_In1990416102, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1990416102, ~weak$$choice2~0=~weak$$choice2~0_In1990416102} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:41:58,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L794-->L794-8: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite30_Out-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|)) (.cse5 (= 0 (mod ~z$r_buff1_thd3~0_In-334736686 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-334736686 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-334736686 256))) (.cse6 (= (mod ~z$r_buff0_thd3~0_In-334736686 256) 0)) (.cse4 (= 0 (mod ~weak$$choice2~0_In-334736686 256)))) (or (let ((.cse2 (not .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite28_Out-334736686| 0) (= |P2Thread1of1ForFork0_#t~ite28_Out-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|) .cse0 (or (not .cse1) .cse2) (not .cse3) .cse4 (or .cse2 (not .cse5)))) (and (= |P2Thread1of1ForFork0_#t~ite28_In-334736686| |P2Thread1of1ForFork0_#t~ite28_Out-334736686|) (or (and .cse0 .cse4 (= |P2Thread1of1ForFork0_#t~ite29_Out-334736686| ~z$w_buff1_used~0_In-334736686) (or (and .cse5 .cse6) .cse3 (and .cse1 .cse6))) (and (= |P2Thread1of1ForFork0_#t~ite29_In-334736686| |P2Thread1of1ForFork0_#t~ite29_Out-334736686|) (= |P2Thread1of1ForFork0_#t~ite30_Out-334736686| ~z$w_buff1_used~0_In-334736686) (not .cse4)))))) InVars {P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_In-334736686|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-334736686, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-334736686, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-334736686, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-334736686, ~weak$$choice2~0=~weak$$choice2~0_In-334736686, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-334736686|} OutVars{P2Thread1of1ForFork0_#t~ite28=|P2Thread1of1ForFork0_#t~ite28_Out-334736686|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-334736686, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-334736686, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-334736686, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-334736686, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-334736686|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-334736686|, ~weak$$choice2~0=~weak$$choice2~0_In-334736686} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:41:58,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [890] [890] L794-8-->L796: Formula: (and (= v_~z$w_buff1_used~0_493 |v_P2Thread1of1ForFork0_#t~ite30_36|) (not (= (mod v_~weak$$choice2~0_130 256) 0)) (= v_~z$r_buff0_thd3~0_373 v_~z$r_buff0_thd3~0_372)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_373, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_36|, ~weak$$choice2~0=v_~weak$$choice2~0_130} OutVars{P2Thread1of1ForFork0_#t~ite28=|v_P2Thread1of1ForFork0_#t~ite28_37|, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_13|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_29|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_493, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_372, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_21|, P2Thread1of1ForFork0_#t~ite30=|v_P2Thread1of1ForFork0_#t~ite30_35|, ~weak$$choice2~0=v_~weak$$choice2~0_130, P2Thread1of1ForFork0_#t~ite29=|v_P2Thread1of1ForFork0_#t~ite29_47|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite28, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$w_buff1_used~0, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31, P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 13:41:58,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L798-->L802: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9) (= v_~z~0_46 v_~z$mem_tmp~0_7)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_46} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 13:41:58,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L802-2-->L802-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out-1402410507| |P2Thread1of1ForFork0_#t~ite38_Out-1402410507|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1402410507 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P2Thread1of1ForFork0_#t~ite38_Out-1402410507| ~z~0_In-1402410507)) (and .cse2 (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1402410507| ~z$w_buff1~0_In-1402410507)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$w_buff1~0=~z$w_buff1~0_In-1402410507, ~z~0=~z~0_In-1402410507} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1402410507|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1402410507|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$w_buff1~0=~z$w_buff1~0_In-1402410507, ~z~0=~z~0_In-1402410507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:41:58,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1289048642 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1289048642 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1289048642 |P2Thread1of1ForFork0_#t~ite40_Out1289048642|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1289048642| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1289048642, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1289048642|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1289048642} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:41:58,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L804-->L804-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1327560572 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1327560572 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1327560572 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In1327560572 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out1327560572| ~z$w_buff1_used~0_In1327560572) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork0_#t~ite41_Out1327560572| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1327560572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1327560572, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1327560572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1327560572, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1327560572, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1327560572, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1327560572|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:41:58,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L805-->L805-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1716402047 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1716402047 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1716402047| ~z$r_buff0_thd3~0_In1716402047) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1716402047, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1716402047, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1716402047|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:41:58,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L806-->L806-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-200040396 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-200040396 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-200040396 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-200040396 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite43_Out-200040396| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-200040396 |P2Thread1of1ForFork0_#t~ite43_Out-200040396|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-200040396|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-200040396, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-200040396, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-200040396, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-200040396} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:41:58,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_100 1) v_~__unbuffered_cnt~0_99) (= v_~z$r_buff1_thd3~0_306 |v_P2Thread1of1ForFork0_#t~ite43_54|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_53|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_99, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:41:58,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1136249117 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1136249117 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1136249117| 0) (not .cse1)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-1136249117| ~z$w_buff0_used~0_In-1136249117) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1136249117, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1136249117} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1136249117|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1136249117, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1136249117} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:41:58,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L748-->L748-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1571626790 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1571626790 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1571626790 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1571626790 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1571626790| ~z$w_buff1_used~0_In-1571626790) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1571626790| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1571626790, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571626790, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1571626790} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1571626790, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1571626790|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1571626790, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1571626790, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1571626790} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:41:58,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In398745964 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In398745964 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In398745964 ~z$r_buff0_thd1~0_Out398745964))) (or (and (= ~z$r_buff0_thd1~0_Out398745964 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In398745964} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In398745964, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out398745964|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out398745964} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:41:58,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1298049477 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1298049477 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1298049477 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1298049477 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1298049477| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1298049477| ~z$r_buff1_thd1~0_In1298049477) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1298049477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1298049477|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1298049477, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1298049477, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1298049477, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1298049477} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:41:58,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L750-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= v_~z$r_buff1_thd1~0_83 |v_P0Thread1of1ForFork1_#t~ite8_38|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_37|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:41:58,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L767-->L767-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1492105421 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1492105421 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1492105421 |P1Thread1of1ForFork2_#t~ite11_Out1492105421|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1492105421|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1492105421} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1492105421, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1492105421|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1492105421} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:41:58,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-286014316 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-286014316 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-286014316 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-286014316 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-286014316|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-286014316 |P1Thread1of1ForFork2_#t~ite12_Out-286014316|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-286014316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-286014316, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-286014316} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-286014316, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-286014316, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-286014316, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-286014316|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-286014316} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:41:58,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In369921047 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In369921047 256)))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out369921047|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In369921047 |P1Thread1of1ForFork2_#t~ite13_Out369921047|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In369921047, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out369921047|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In369921047} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:41:58,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In218642557 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In218642557 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In218642557 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In218642557 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In218642557 |P1Thread1of1ForFork2_#t~ite14_Out218642557|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out218642557|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In218642557} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In218642557, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In218642557, ~z$w_buff1_used~0=~z$w_buff1_used~0_In218642557, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out218642557|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In218642557} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:41:58,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_186 |v_P1Thread1of1ForFork2_#t~ite14_48|) (= (+ v_~__unbuffered_cnt~0_94 1) v_~__unbuffered_cnt~0_93)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_186, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:41:58,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L829-1-->L835: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:41:58,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L835-2-->L835-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1154568952 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1154568952 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1154568952| ~z$w_buff1~0_In1154568952)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out1154568952| ~z~0_In1154568952)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1154568952, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154568952, ~z$w_buff1~0=~z$w_buff1~0_In1154568952, ~z~0=~z~0_In1154568952} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1154568952, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1154568952|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1154568952, ~z$w_buff1~0=~z$w_buff1~0_In1154568952, ~z~0=~z~0_In1154568952} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 13:41:58,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L835-4-->L836: Formula: (= v_~z~0_40 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|, ~z~0=v_~z~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~z~0] because there is no mapped edge [2019-12-07 13:41:58,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-266967960 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-266967960 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-266967960| ~z$w_buff0_used~0_In-266967960)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-266967960| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-266967960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-266967960, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266967960, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-266967960|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:41:58,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L837-->L837-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1816394258 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1816394258 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1816394258 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1816394258 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1816394258| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1816394258 |ULTIMATE.start_main_#t~ite50_Out1816394258|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1816394258|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1816394258, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1816394258, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1816394258, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1816394258} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:41:58,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L838-->L838-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1834842706 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1834842706 256)))) (or (and (= ~z$r_buff0_thd0~0_In-1834842706 |ULTIMATE.start_main_#t~ite51_Out-1834842706|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out-1834842706| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1834842706, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1834842706, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1834842706|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1834842706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:41:58,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L839-->L839-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1307786193 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1307786193 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1307786193 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1307786193 256)))) (or (and (= ~z$r_buff1_thd0~0_In-1307786193 |ULTIMATE.start_main_#t~ite52_Out-1307786193|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-1307786193|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1307786193, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1307786193|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1307786193, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1307786193, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1307786193, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1307786193} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:41:58,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L839-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_~main$tmp_guard1~0_16 (ite (= (ite (not (and (= v_~y~0_25 2) (= 2 v_~__unbuffered_p2_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~__unbuffered_p0_EAX~0_178))) 1 0) 0) 0 1)) (= v_~z$r_buff1_thd0~0_219 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_16 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_219, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_25, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:41:58,527 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_baaa379c-0a3c-463c-9261-fe87c7a478f8/bin/utaipan/witness.graphml [2019-12-07 13:41:58,527 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:41:58,528 INFO L168 Benchmark]: Toolchain (without parser) took 223032.28 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.2 GB). Free memory was 938.0 MB in the beginning and 5.4 GB in the end (delta: -4.4 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,528 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:41:58,529 INFO L168 Benchmark]: CACSL2BoogieTranslator took 397.64 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -141.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,529 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,529 INFO L168 Benchmark]: Boogie Preprocessor took 26.49 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:41:58,529 INFO L168 Benchmark]: RCFGBuilder took 397.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,530 INFO L168 Benchmark]: TraceAbstraction took 222105.29 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: -4.4 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,530 INFO L168 Benchmark]: Witness Printer took 64.27 ms. Allocated memory is still 8.2 GB. Free memory was 5.4 GB in the beginning and 5.4 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. [2019-12-07 13:41:58,531 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 397.64 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -141.4 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.49 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 397.93 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 222105.29 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 1.0 GB in the beginning and 5.4 GB in the end (delta: -4.4 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. * Witness Printer took 64.27 ms. Allocated memory is still 8.2 GB. Free memory was 5.4 GB in the beginning and 5.4 GB in the end (delta: 44.6 MB). Peak memory consumption was 44.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 176 ProgramPointsBefore, 94 ProgramPointsAfterwards, 213 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 30 ChoiceCompositions, 7047 VarBasedMoverChecksPositive, 336 VarBasedMoverChecksNegative, 168 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 130103 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t660, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t661, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L829] FCALL, FORK 0 pthread_create(&t662, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 2 [L783] 3 __unbuffered_p2_EAX = y [L786] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L787] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L788] 3 z$flush_delayed = weak$$choice2 [L789] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L790] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L766] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L791] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L792] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L793] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L796] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L796] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L797] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L803] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L804] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L805] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L835] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L837] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L838] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 221.9s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 50.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9687 SDtfs, 10616 SDslu, 30833 SDs, 0 SdLazy, 20663 SolverSat, 430 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 483 GetRequests, 50 SyntacticMatches, 29 SemanticMatches, 404 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4488 ImplicationChecksByTransitivity, 4.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=371396occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 147.3s AutomataMinimizationTime, 33 MinimizatonAttempts, 776403 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 1355 NumberOfCodeBlocks, 1355 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1256 ConstructedInterpolants, 0 QuantifiedInterpolants, 385371 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...