./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix027_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix027_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5f5948a8471e3e9a8600e8f90a8b599954115139 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:24:34,996 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:24:34,998 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:24:35,005 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:24:35,006 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:24:35,006 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:24:35,007 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:24:35,009 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:24:35,010 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:24:35,010 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:24:35,011 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:24:35,012 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:24:35,012 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:24:35,013 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:24:35,014 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:24:35,014 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:24:35,015 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:24:35,016 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:24:35,017 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:24:35,018 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:24:35,019 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:24:35,020 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:24:35,021 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:24:35,021 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:24:35,023 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:24:35,023 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:24:35,023 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:24:35,024 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:24:35,024 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:24:35,025 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:24:35,025 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:24:35,025 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:24:35,026 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:24:35,026 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:24:35,027 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:24:35,027 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:24:35,027 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:24:35,027 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:24:35,027 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:24:35,028 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:24:35,028 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:24:35,029 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:24:35,039 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:24:35,039 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:24:35,040 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:24:35,040 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:24:35,040 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:24:35,040 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:24:35,040 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:24:35,040 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:24:35,040 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:24:35,041 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:24:35,041 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:24:35,041 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:24:35,041 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:24:35,041 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:24:35,041 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:24:35,042 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:24:35,042 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:24:35,042 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:24:35,042 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:24:35,042 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:24:35,042 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:24:35,043 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:24:35,044 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:24:35,044 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:24:35,044 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:24:35,044 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:24:35,044 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:24:35,044 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:24:35,044 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:24:35,045 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5f5948a8471e3e9a8600e8f90a8b599954115139 [2019-12-07 15:24:35,145 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:24:35,156 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:24:35,159 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:24:35,160 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:24:35,160 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:24:35,161 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix027_rmo.opt.i [2019-12-07 15:24:35,202 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/data/cdeabb6d0/e09c577c8bc84d26a9e605003565a3e1/FLAG1ec6de8fb [2019-12-07 15:24:35,674 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:24:35,674 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/sv-benchmarks/c/pthread-wmm/mix027_rmo.opt.i [2019-12-07 15:24:35,685 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/data/cdeabb6d0/e09c577c8bc84d26a9e605003565a3e1/FLAG1ec6de8fb [2019-12-07 15:24:35,694 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/data/cdeabb6d0/e09c577c8bc84d26a9e605003565a3e1 [2019-12-07 15:24:35,696 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:24:35,697 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:24:35,697 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:24:35,697 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:24:35,700 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:24:35,700 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:24:35" (1/1) ... [2019-12-07 15:24:35,702 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:35, skipping insertion in model container [2019-12-07 15:24:35,702 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:24:35" (1/1) ... [2019-12-07 15:24:35,707 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:24:35,736 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:24:35,985 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:24:35,993 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:24:36,036 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:24:36,082 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:24:36,083 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36 WrapperNode [2019-12-07 15:24:36,083 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:24:36,083 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:24:36,083 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:24:36,084 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:24:36,089 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,102 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,120 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:24:36,120 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:24:36,120 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:24:36,120 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:24:36,127 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,127 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,130 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,130 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,137 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,140 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,142 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... [2019-12-07 15:24:36,146 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:24:36,146 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:24:36,146 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:24:36,146 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:24:36,147 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:24:36,186 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:24:36,186 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:24:36,186 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:24:36,187 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:24:36,187 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:24:36,187 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 15:24:36,187 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 15:24:36,187 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:24:36,187 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:24:36,187 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:24:36,188 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:24:36,551 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:24:36,551 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:24:36,552 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:36 BoogieIcfgContainer [2019-12-07 15:24:36,552 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:24:36,553 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:24:36,553 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:24:36,555 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:24:36,555 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:24:35" (1/3) ... [2019-12-07 15:24:36,555 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@52fa2cf5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:24:36, skipping insertion in model container [2019-12-07 15:24:36,556 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:24:36" (2/3) ... [2019-12-07 15:24:36,556 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@52fa2cf5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:24:36, skipping insertion in model container [2019-12-07 15:24:36,556 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:36" (3/3) ... [2019-12-07 15:24:36,557 INFO L109 eAbstractionObserver]: Analyzing ICFG mix027_rmo.opt.i [2019-12-07 15:24:36,563 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:24:36,563 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:24:36,568 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:24:36,568 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:24:36,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,595 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,595 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,596 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,597 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,606 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,607 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,612 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,613 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,614 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,614 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:24:36,626 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 15:24:36,638 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:24:36,638 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:24:36,638 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:24:36,638 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:24:36,638 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:24:36,638 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:24:36,638 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:24:36,638 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:24:36,649 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 180 places, 208 transitions [2019-12-07 15:24:36,650 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 15:24:36,713 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 15:24:36,713 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:24:36,723 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 15:24:36,737 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 180 places, 208 transitions [2019-12-07 15:24:36,769 INFO L134 PetriNetUnfolder]: 41/204 cut-off events. [2019-12-07 15:24:36,769 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:24:36,774 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 204 events. 41/204 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 718 event pairs. 12/173 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 15:24:36,790 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18126 [2019-12-07 15:24:36,790 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:24:39,869 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 15:24:39,970 INFO L206 etLargeBlockEncoding]: Checked pairs total: 74757 [2019-12-07 15:24:39,971 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 15:24:39,973 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 90 places, 97 transitions [2019-12-07 15:25:12,662 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 171250 states. [2019-12-07 15:25:12,664 INFO L276 IsEmpty]: Start isEmpty. Operand 171250 states. [2019-12-07 15:25:12,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 15:25:12,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:12,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:12,669 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:12,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:12,673 INFO L82 PathProgramCache]: Analyzing trace with hash 1969539409, now seen corresponding path program 1 times [2019-12-07 15:25:12,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:25:12,679 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1726252979] [2019-12-07 15:25:12,679 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:12,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:12,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:12,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1726252979] [2019-12-07 15:25:12,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:12,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:25:12,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039952083] [2019-12-07 15:25:12,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:25:12,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:25:12,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:25:12,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:12,850 INFO L87 Difference]: Start difference. First operand 171250 states. Second operand 3 states. [2019-12-07 15:25:13,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:13,982 INFO L93 Difference]: Finished difference Result 169554 states and 814774 transitions. [2019-12-07 15:25:13,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:25:13,983 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 15:25:13,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:14,698 INFO L225 Difference]: With dead ends: 169554 [2019-12-07 15:25:14,698 INFO L226 Difference]: Without dead ends: 159076 [2019-12-07 15:25:14,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:25:22,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159076 states. [2019-12-07 15:25:25,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159076 to 159076. [2019-12-07 15:25:25,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159076 states. [2019-12-07 15:25:26,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159076 states to 159076 states and 763437 transitions. [2019-12-07 15:25:26,134 INFO L78 Accepts]: Start accepts. Automaton has 159076 states and 763437 transitions. Word has length 7 [2019-12-07 15:25:26,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:26,135 INFO L462 AbstractCegarLoop]: Abstraction has 159076 states and 763437 transitions. [2019-12-07 15:25:26,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:25:26,135 INFO L276 IsEmpty]: Start isEmpty. Operand 159076 states and 763437 transitions. [2019-12-07 15:25:26,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 15:25:26,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:26,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:26,145 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:26,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:26,145 INFO L82 PathProgramCache]: Analyzing trace with hash 230524214, now seen corresponding path program 1 times [2019-12-07 15:25:26,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:25:26,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701141643] [2019-12-07 15:25:26,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:26,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:26,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:26,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [701141643] [2019-12-07 15:25:26,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:26,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:25:26,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [215270530] [2019-12-07 15:25:26,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:25:26,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:25:26,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:25:26,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:25:26,225 INFO L87 Difference]: Start difference. First operand 159076 states and 763437 transitions. Second operand 4 states. [2019-12-07 15:25:27,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:27,689 INFO L93 Difference]: Finished difference Result 251868 states and 1162713 transitions. [2019-12-07 15:25:27,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:25:27,690 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 15:25:27,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:28,436 INFO L225 Difference]: With dead ends: 251868 [2019-12-07 15:25:28,436 INFO L226 Difference]: Without dead ends: 251658 [2019-12-07 15:25:28,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:25:38,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251658 states. [2019-12-07 15:25:41,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251658 to 235278. [2019-12-07 15:25:41,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235278 states. [2019-12-07 15:25:43,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235278 states to 235278 states and 1094580 transitions. [2019-12-07 15:25:43,111 INFO L78 Accepts]: Start accepts. Automaton has 235278 states and 1094580 transitions. Word has length 15 [2019-12-07 15:25:43,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:25:43,112 INFO L462 AbstractCegarLoop]: Abstraction has 235278 states and 1094580 transitions. [2019-12-07 15:25:43,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:25:43,112 INFO L276 IsEmpty]: Start isEmpty. Operand 235278 states and 1094580 transitions. [2019-12-07 15:25:43,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 15:25:43,115 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:25:43,115 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:25:43,116 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:25:43,116 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:25:43,116 INFO L82 PathProgramCache]: Analyzing trace with hash -519494263, now seen corresponding path program 1 times [2019-12-07 15:25:43,116 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:25:43,116 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803789235] [2019-12-07 15:25:43,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:25:43,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:25:43,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:25:43,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803789235] [2019-12-07 15:25:43,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:25:43,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:25:43,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902538870] [2019-12-07 15:25:43,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:25:43,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:25:43,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:25:43,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:25:43,172 INFO L87 Difference]: Start difference. First operand 235278 states and 1094580 transitions. Second operand 4 states. [2019-12-07 15:25:44,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:25:44,967 INFO L93 Difference]: Finished difference Result 333248 states and 1520275 transitions. [2019-12-07 15:25:44,968 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:25:44,968 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 15:25:44,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:25:49,890 INFO L225 Difference]: With dead ends: 333248 [2019-12-07 15:25:49,891 INFO L226 Difference]: Without dead ends: 333008 [2019-12-07 15:25:49,891 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:25:58,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333008 states. [2019-12-07 15:26:02,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333008 to 282040. [2019-12-07 15:26:02,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 282040 states. [2019-12-07 15:26:03,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282040 states to 282040 states and 1305129 transitions. [2019-12-07 15:26:03,889 INFO L78 Accepts]: Start accepts. Automaton has 282040 states and 1305129 transitions. Word has length 15 [2019-12-07 15:26:03,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:03,890 INFO L462 AbstractCegarLoop]: Abstraction has 282040 states and 1305129 transitions. [2019-12-07 15:26:03,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:26:03,890 INFO L276 IsEmpty]: Start isEmpty. Operand 282040 states and 1305129 transitions. [2019-12-07 15:26:03,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:26:03,896 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:03,896 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:03,896 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:03,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:03,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1627950887, now seen corresponding path program 1 times [2019-12-07 15:26:03,897 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:26:03,897 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959160458] [2019-12-07 15:26:03,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:03,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:03,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:03,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959160458] [2019-12-07 15:26:03,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:03,956 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:26:03,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331621987] [2019-12-07 15:26:03,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:26:03,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:26:03,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:26:03,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:26:03,957 INFO L87 Difference]: Start difference. First operand 282040 states and 1305129 transitions. Second operand 5 states. [2019-12-07 15:26:06,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:06,619 INFO L93 Difference]: Finished difference Result 380594 states and 1735388 transitions. [2019-12-07 15:26:06,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:26:06,620 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:26:06,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:07,732 INFO L225 Difference]: With dead ends: 380594 [2019-12-07 15:26:07,733 INFO L226 Difference]: Without dead ends: 380290 [2019-12-07 15:26:07,733 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:26:20,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380290 states. [2019-12-07 15:26:26,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380290 to 310408. [2019-12-07 15:26:26,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310408 states. [2019-12-07 15:26:27,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310408 states to 310408 states and 1434469 transitions. [2019-12-07 15:26:27,129 INFO L78 Accepts]: Start accepts. Automaton has 310408 states and 1434469 transitions. Word has length 16 [2019-12-07 15:26:27,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:27,129 INFO L462 AbstractCegarLoop]: Abstraction has 310408 states and 1434469 transitions. [2019-12-07 15:26:27,129 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:26:27,130 INFO L276 IsEmpty]: Start isEmpty. Operand 310408 states and 1434469 transitions. [2019-12-07 15:26:27,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 15:26:27,152 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:27,152 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:27,152 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:27,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:27,152 INFO L82 PathProgramCache]: Analyzing trace with hash 1371682190, now seen corresponding path program 1 times [2019-12-07 15:26:27,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:26:27,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563755810] [2019-12-07 15:26:27,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:27,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:27,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:27,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563755810] [2019-12-07 15:26:27,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:27,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:26:27,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857859439] [2019-12-07 15:26:27,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:26:27,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:26:27,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:26:27,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:27,207 INFO L87 Difference]: Start difference. First operand 310408 states and 1434469 transitions. Second operand 3 states. [2019-12-07 15:26:34,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:26:34,775 INFO L93 Difference]: Finished difference Result 587595 states and 2683438 transitions. [2019-12-07 15:26:34,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:26:34,776 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 15:26:34,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:26:36,479 INFO L225 Difference]: With dead ends: 587595 [2019-12-07 15:26:36,479 INFO L226 Difference]: Without dead ends: 567599 [2019-12-07 15:26:36,480 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:48,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567599 states. [2019-12-07 15:26:57,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567599 to 544510. [2019-12-07 15:26:57,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544510 states. [2019-12-07 15:26:59,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544510 states to 544510 states and 2498503 transitions. [2019-12-07 15:26:59,717 INFO L78 Accepts]: Start accepts. Automaton has 544510 states and 2498503 transitions. Word has length 20 [2019-12-07 15:26:59,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:26:59,718 INFO L462 AbstractCegarLoop]: Abstraction has 544510 states and 2498503 transitions. [2019-12-07 15:26:59,718 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:26:59,718 INFO L276 IsEmpty]: Start isEmpty. Operand 544510 states and 2498503 transitions. [2019-12-07 15:26:59,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:26:59,771 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:26:59,771 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:26:59,771 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:26:59,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:26:59,771 INFO L82 PathProgramCache]: Analyzing trace with hash 241904101, now seen corresponding path program 1 times [2019-12-07 15:26:59,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:26:59,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497334400] [2019-12-07 15:26:59,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:26:59,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:26:59,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:26:59,797 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497334400] [2019-12-07 15:26:59,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:26:59,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:26:59,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367763003] [2019-12-07 15:26:59,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:26:59,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:26:59,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:26:59,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:26:59,799 INFO L87 Difference]: Start difference. First operand 544510 states and 2498503 transitions. Second operand 3 states. [2019-12-07 15:27:05,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:05,640 INFO L93 Difference]: Finished difference Result 335932 states and 1390185 transitions. [2019-12-07 15:27:05,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:27:05,641 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 15:27:05,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:06,816 INFO L225 Difference]: With dead ends: 335932 [2019-12-07 15:27:06,816 INFO L226 Difference]: Without dead ends: 335932 [2019-12-07 15:27:06,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:27:12,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335932 states. [2019-12-07 15:27:17,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335932 to 335932. [2019-12-07 15:27:17,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335932 states. [2019-12-07 15:27:18,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335932 states to 335932 states and 1390185 transitions. [2019-12-07 15:27:18,627 INFO L78 Accepts]: Start accepts. Automaton has 335932 states and 1390185 transitions. Word has length 21 [2019-12-07 15:27:18,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:18,628 INFO L462 AbstractCegarLoop]: Abstraction has 335932 states and 1390185 transitions. [2019-12-07 15:27:18,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:27:18,628 INFO L276 IsEmpty]: Start isEmpty. Operand 335932 states and 1390185 transitions. [2019-12-07 15:27:18,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:27:18,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:18,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:18,664 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:18,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:18,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1574308616, now seen corresponding path program 1 times [2019-12-07 15:27:18,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:27:18,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [645852979] [2019-12-07 15:27:18,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:18,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:18,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:18,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [645852979] [2019-12-07 15:27:18,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:18,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:27:18,731 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706166174] [2019-12-07 15:27:18,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:27:18,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:27:18,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:27:18,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:18,732 INFO L87 Difference]: Start difference. First operand 335932 states and 1390185 transitions. Second operand 4 states. [2019-12-07 15:27:20,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:20,871 INFO L93 Difference]: Finished difference Result 346071 states and 1421693 transitions. [2019-12-07 15:27:20,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:27:20,872 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 15:27:20,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:21,724 INFO L225 Difference]: With dead ends: 346071 [2019-12-07 15:27:21,724 INFO L226 Difference]: Without dead ends: 346071 [2019-12-07 15:27:21,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:31,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346071 states. [2019-12-07 15:27:36,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346071 to 334440. [2019-12-07 15:27:36,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334440 states. [2019-12-07 15:27:37,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334440 states to 334440 states and 1384194 transitions. [2019-12-07 15:27:37,299 INFO L78 Accepts]: Start accepts. Automaton has 334440 states and 1384194 transitions. Word has length 22 [2019-12-07 15:27:37,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:37,299 INFO L462 AbstractCegarLoop]: Abstraction has 334440 states and 1384194 transitions. [2019-12-07 15:27:37,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:27:37,300 INFO L276 IsEmpty]: Start isEmpty. Operand 334440 states and 1384194 transitions. [2019-12-07 15:27:37,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:27:37,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:37,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:37,331 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:37,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:37,331 INFO L82 PathProgramCache]: Analyzing trace with hash -441224904, now seen corresponding path program 1 times [2019-12-07 15:27:37,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:27:37,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980286549] [2019-12-07 15:27:37,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:37,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:37,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:37,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980286549] [2019-12-07 15:27:37,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:37,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:27:37,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1596594178] [2019-12-07 15:27:37,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:27:37,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:27:37,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:27:37,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:37,378 INFO L87 Difference]: Start difference. First operand 334440 states and 1384194 transitions. Second operand 4 states. [2019-12-07 15:27:40,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:27:40,938 INFO L93 Difference]: Finished difference Result 565219 states and 2328198 transitions. [2019-12-07 15:27:40,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:27:40,938 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 15:27:40,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:27:41,780 INFO L225 Difference]: With dead ends: 565219 [2019-12-07 15:27:41,780 INFO L226 Difference]: Without dead ends: 346021 [2019-12-07 15:27:41,781 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:27:47,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346021 states. [2019-12-07 15:27:57,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346021 to 321880. [2019-12-07 15:27:57,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321880 states. [2019-12-07 15:27:58,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321880 states to 321880 states and 1284619 transitions. [2019-12-07 15:27:58,088 INFO L78 Accepts]: Start accepts. Automaton has 321880 states and 1284619 transitions. Word has length 22 [2019-12-07 15:27:58,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:27:58,089 INFO L462 AbstractCegarLoop]: Abstraction has 321880 states and 1284619 transitions. [2019-12-07 15:27:58,089 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:27:58,089 INFO L276 IsEmpty]: Start isEmpty. Operand 321880 states and 1284619 transitions. [2019-12-07 15:27:58,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:27:58,112 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:27:58,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:27:58,113 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:27:58,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:27:58,113 INFO L82 PathProgramCache]: Analyzing trace with hash -2116532531, now seen corresponding path program 1 times [2019-12-07 15:27:58,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:27:58,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077810880] [2019-12-07 15:27:58,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:27:58,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:27:58,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:27:58,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077810880] [2019-12-07 15:27:58,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:27:58,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:27:58,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1993413184] [2019-12-07 15:27:58,175 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:27:58,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:27:58,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:27:58,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:27:58,176 INFO L87 Difference]: Start difference. First operand 321880 states and 1284619 transitions. Second operand 5 states. [2019-12-07 15:28:00,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:00,723 INFO L93 Difference]: Finished difference Result 422601 states and 1658609 transitions. [2019-12-07 15:28:00,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:28:00,723 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 15:28:00,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:02,460 INFO L225 Difference]: With dead ends: 422601 [2019-12-07 15:28:02,460 INFO L226 Difference]: Without dead ends: 420683 [2019-12-07 15:28:02,461 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:09,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 420683 states. [2019-12-07 15:28:14,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 420683 to 334428. [2019-12-07 15:28:14,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334428 states. [2019-12-07 15:28:15,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334428 states to 334428 states and 1329598 transitions. [2019-12-07 15:28:15,828 INFO L78 Accepts]: Start accepts. Automaton has 334428 states and 1329598 transitions. Word has length 22 [2019-12-07 15:28:15,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:15,829 INFO L462 AbstractCegarLoop]: Abstraction has 334428 states and 1329598 transitions. [2019-12-07 15:28:15,829 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:28:15,829 INFO L276 IsEmpty]: Start isEmpty. Operand 334428 states and 1329598 transitions. [2019-12-07 15:28:15,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:28:15,862 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:15,862 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:15,862 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:15,862 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:15,862 INFO L82 PathProgramCache]: Analyzing trace with hash 212822491, now seen corresponding path program 1 times [2019-12-07 15:28:15,863 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:28:15,863 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243253903] [2019-12-07 15:28:15,863 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:15,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:15,892 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:15,893 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243253903] [2019-12-07 15:28:15,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:15,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:15,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835237708] [2019-12-07 15:28:15,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:15,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:28:15,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:15,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:15,893 INFO L87 Difference]: Start difference. First operand 334428 states and 1329598 transitions. Second operand 3 states. [2019-12-07 15:28:20,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:20,135 INFO L93 Difference]: Finished difference Result 334428 states and 1316874 transitions. [2019-12-07 15:28:20,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:20,136 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2019-12-07 15:28:20,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:20,927 INFO L225 Difference]: With dead ends: 334428 [2019-12-07 15:28:20,927 INFO L226 Difference]: Without dead ends: 334428 [2019-12-07 15:28:20,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:26,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334428 states. [2019-12-07 15:28:31,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334428 to 330776. [2019-12-07 15:28:31,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330776 states. [2019-12-07 15:28:32,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330776 states to 330776 states and 1303939 transitions. [2019-12-07 15:28:32,050 INFO L78 Accepts]: Start accepts. Automaton has 330776 states and 1303939 transitions. Word has length 23 [2019-12-07 15:28:32,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:32,050 INFO L462 AbstractCegarLoop]: Abstraction has 330776 states and 1303939 transitions. [2019-12-07 15:28:32,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:32,050 INFO L276 IsEmpty]: Start isEmpty. Operand 330776 states and 1303939 transitions. [2019-12-07 15:28:32,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:28:32,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:32,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:32,081 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:32,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:32,081 INFO L82 PathProgramCache]: Analyzing trace with hash -2043986937, now seen corresponding path program 1 times [2019-12-07 15:28:32,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:28:32,082 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1407241861] [2019-12-07 15:28:32,082 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:32,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:32,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:32,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1407241861] [2019-12-07 15:28:32,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:32,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:32,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1133759694] [2019-12-07 15:28:32,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:28:32,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:28:32,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:28:32,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:32,122 INFO L87 Difference]: Start difference. First operand 330776 states and 1303939 transitions. Second operand 4 states. [2019-12-07 15:28:34,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:34,395 INFO L93 Difference]: Finished difference Result 440700 states and 1744232 transitions. [2019-12-07 15:28:34,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:28:34,396 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 15:28:34,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:35,989 INFO L225 Difference]: With dead ends: 440700 [2019-12-07 15:28:35,989 INFO L226 Difference]: Without dead ends: 429824 [2019-12-07 15:28:35,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:42,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429824 states. [2019-12-07 15:28:47,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429824 to 331852. [2019-12-07 15:28:47,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331852 states. [2019-12-07 15:28:48,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331852 states to 331852 states and 1308420 transitions. [2019-12-07 15:28:48,715 INFO L78 Accepts]: Start accepts. Automaton has 331852 states and 1308420 transitions. Word has length 23 [2019-12-07 15:28:48,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:48,715 INFO L462 AbstractCegarLoop]: Abstraction has 331852 states and 1308420 transitions. [2019-12-07 15:28:48,715 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:28:48,715 INFO L276 IsEmpty]: Start isEmpty. Operand 331852 states and 1308420 transitions. [2019-12-07 15:28:48,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:28:48,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:48,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:48,751 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:48,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:48,751 INFO L82 PathProgramCache]: Analyzing trace with hash -276850441, now seen corresponding path program 2 times [2019-12-07 15:28:48,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:28:48,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888998590] [2019-12-07 15:28:48,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:48,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:48,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:48,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888998590] [2019-12-07 15:28:48,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:48,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:28:48,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1905941382] [2019-12-07 15:28:48,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:28:48,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:28:48,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:28:48,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:48,806 INFO L87 Difference]: Start difference. First operand 331852 states and 1308420 transitions. Second operand 5 states. [2019-12-07 15:28:54,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:54,419 INFO L93 Difference]: Finished difference Result 578689 states and 2296774 transitions. [2019-12-07 15:28:54,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:28:54,420 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 15:28:54,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:55,554 INFO L225 Difference]: With dead ends: 578689 [2019-12-07 15:28:55,555 INFO L226 Difference]: Without dead ends: 354941 [2019-12-07 15:28:55,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:29:01,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354941 states. [2019-12-07 15:29:06,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354941 to 315578. [2019-12-07 15:29:06,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315578 states. [2019-12-07 15:29:07,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315578 states to 315578 states and 1227469 transitions. [2019-12-07 15:29:07,474 INFO L78 Accepts]: Start accepts. Automaton has 315578 states and 1227469 transitions. Word has length 23 [2019-12-07 15:29:07,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:07,474 INFO L462 AbstractCegarLoop]: Abstraction has 315578 states and 1227469 transitions. [2019-12-07 15:29:07,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:29:07,474 INFO L276 IsEmpty]: Start isEmpty. Operand 315578 states and 1227469 transitions. [2019-12-07 15:29:07,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 15:29:07,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:07,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:07,506 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:07,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:07,506 INFO L82 PathProgramCache]: Analyzing trace with hash 149935729, now seen corresponding path program 3 times [2019-12-07 15:29:07,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:07,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1697757130] [2019-12-07 15:29:07,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:07,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:07,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:07,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1697757130] [2019-12-07 15:29:07,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:07,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:29:07,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2116334331] [2019-12-07 15:29:07,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:29:07,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:07,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:29:07,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:29:07,540 INFO L87 Difference]: Start difference. First operand 315578 states and 1227469 transitions. Second operand 4 states. [2019-12-07 15:29:07,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:07,779 INFO L93 Difference]: Finished difference Result 77989 states and 249624 transitions. [2019-12-07 15:29:07,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:29:07,780 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2019-12-07 15:29:07,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:07,895 INFO L225 Difference]: With dead ends: 77989 [2019-12-07 15:29:07,895 INFO L226 Difference]: Without dead ends: 77989 [2019-12-07 15:29:07,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:29:08,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77989 states. [2019-12-07 15:29:09,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77989 to 76598. [2019-12-07 15:29:09,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76598 states. [2019-12-07 15:29:09,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76598 states to 76598 states and 245086 transitions. [2019-12-07 15:29:09,467 INFO L78 Accepts]: Start accepts. Automaton has 76598 states and 245086 transitions. Word has length 23 [2019-12-07 15:29:09,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:09,467 INFO L462 AbstractCegarLoop]: Abstraction has 76598 states and 245086 transitions. [2019-12-07 15:29:09,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:29:09,467 INFO L276 IsEmpty]: Start isEmpty. Operand 76598 states and 245086 transitions. [2019-12-07 15:29:09,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 15:29:09,478 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:09,478 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:09,478 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:09,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:09,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1520730132, now seen corresponding path program 1 times [2019-12-07 15:29:09,478 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:09,478 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [957884140] [2019-12-07 15:29:09,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:09,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:09,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:09,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [957884140] [2019-12-07 15:29:09,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:09,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:29:09,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793731595] [2019-12-07 15:29:09,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:29:09,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:09,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:29:09,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:29:09,532 INFO L87 Difference]: Start difference. First operand 76598 states and 245086 transitions. Second operand 6 states. [2019-12-07 15:29:10,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:10,145 INFO L93 Difference]: Finished difference Result 103159 states and 324121 transitions. [2019-12-07 15:29:10,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 15:29:10,146 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2019-12-07 15:29:10,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:10,311 INFO L225 Difference]: With dead ends: 103159 [2019-12-07 15:29:10,311 INFO L226 Difference]: Without dead ends: 102932 [2019-12-07 15:29:10,312 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:29:10,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102932 states. [2019-12-07 15:29:11,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102932 to 80833. [2019-12-07 15:29:11,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80833 states. [2019-12-07 15:29:11,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80833 states to 80833 states and 257434 transitions. [2019-12-07 15:29:11,996 INFO L78 Accepts]: Start accepts. Automaton has 80833 states and 257434 transitions. Word has length 24 [2019-12-07 15:29:11,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:11,996 INFO L462 AbstractCegarLoop]: Abstraction has 80833 states and 257434 transitions. [2019-12-07 15:29:11,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:29:11,996 INFO L276 IsEmpty]: Start isEmpty. Operand 80833 states and 257434 transitions. [2019-12-07 15:29:12,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2019-12-07 15:29:12,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:12,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:12,009 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:12,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:12,009 INFO L82 PathProgramCache]: Analyzing trace with hash -212678054, now seen corresponding path program 2 times [2019-12-07 15:29:12,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:12,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258642101] [2019-12-07 15:29:12,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:12,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:12,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:12,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258642101] [2019-12-07 15:29:12,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:12,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:29:12,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111026601] [2019-12-07 15:29:12,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:29:12,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:12,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:29:12,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:29:12,068 INFO L87 Difference]: Start difference. First operand 80833 states and 257434 transitions. Second operand 6 states. [2019-12-07 15:29:12,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:12,904 INFO L93 Difference]: Finished difference Result 117430 states and 365730 transitions. [2019-12-07 15:29:12,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:29:12,905 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2019-12-07 15:29:12,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:13,090 INFO L225 Difference]: With dead ends: 117430 [2019-12-07 15:29:13,090 INFO L226 Difference]: Without dead ends: 117192 [2019-12-07 15:29:13,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:29:13,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117192 states. [2019-12-07 15:29:14,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117192 to 86292. [2019-12-07 15:29:14,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86292 states. [2019-12-07 15:29:14,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86292 states to 86292 states and 273229 transitions. [2019-12-07 15:29:14,787 INFO L78 Accepts]: Start accepts. Automaton has 86292 states and 273229 transitions. Word has length 24 [2019-12-07 15:29:14,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:14,787 INFO L462 AbstractCegarLoop]: Abstraction has 86292 states and 273229 transitions. [2019-12-07 15:29:14,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:29:14,787 INFO L276 IsEmpty]: Start isEmpty. Operand 86292 states and 273229 transitions. [2019-12-07 15:29:14,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 15:29:14,822 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:14,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:14,822 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:14,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:14,822 INFO L82 PathProgramCache]: Analyzing trace with hash -1179330183, now seen corresponding path program 1 times [2019-12-07 15:29:14,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:14,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124044285] [2019-12-07 15:29:14,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:14,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:14,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:14,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124044285] [2019-12-07 15:29:14,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:14,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:29:14,858 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026519949] [2019-12-07 15:29:14,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:29:14,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:14,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:29:14,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:29:14,859 INFO L87 Difference]: Start difference. First operand 86292 states and 273229 transitions. Second operand 5 states. [2019-12-07 15:29:14,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:14,999 INFO L93 Difference]: Finished difference Result 44902 states and 139120 transitions. [2019-12-07 15:29:14,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:29:14,999 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 15:29:14,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:15,051 INFO L225 Difference]: With dead ends: 44902 [2019-12-07 15:29:15,052 INFO L226 Difference]: Without dead ends: 44773 [2019-12-07 15:29:15,052 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:29:15,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44773 states. [2019-12-07 15:29:15,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44773 to 33540. [2019-12-07 15:29:15,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33540 states. [2019-12-07 15:29:15,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33540 states to 33540 states and 103570 transitions. [2019-12-07 15:29:15,636 INFO L78 Accepts]: Start accepts. Automaton has 33540 states and 103570 transitions. Word has length 31 [2019-12-07 15:29:15,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:15,636 INFO L462 AbstractCegarLoop]: Abstraction has 33540 states and 103570 transitions. [2019-12-07 15:29:15,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:29:15,636 INFO L276 IsEmpty]: Start isEmpty. Operand 33540 states and 103570 transitions. [2019-12-07 15:29:15,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 15:29:15,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:15,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:15,667 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:15,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:15,668 INFO L82 PathProgramCache]: Analyzing trace with hash 730447546, now seen corresponding path program 1 times [2019-12-07 15:29:15,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:15,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167461307] [2019-12-07 15:29:15,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:15,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:15,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:15,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167461307] [2019-12-07 15:29:15,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:15,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:29:15,754 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227587702] [2019-12-07 15:29:15,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:29:15,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:15,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:29:15,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:29:15,754 INFO L87 Difference]: Start difference. First operand 33540 states and 103570 transitions. Second operand 7 states. [2019-12-07 15:29:16,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:16,321 INFO L93 Difference]: Finished difference Result 43575 states and 130908 transitions. [2019-12-07 15:29:16,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 15:29:16,321 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 43 [2019-12-07 15:29:16,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:16,371 INFO L225 Difference]: With dead ends: 43575 [2019-12-07 15:29:16,371 INFO L226 Difference]: Without dead ends: 43120 [2019-12-07 15:29:16,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=170, Unknown=0, NotChecked=0, Total=240 [2019-12-07 15:29:16,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43120 states. [2019-12-07 15:29:16,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43120 to 34625. [2019-12-07 15:29:16,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34625 states. [2019-12-07 15:29:17,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34625 states to 34625 states and 106401 transitions. [2019-12-07 15:29:17,033 INFO L78 Accepts]: Start accepts. Automaton has 34625 states and 106401 transitions. Word has length 43 [2019-12-07 15:29:17,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:17,033 INFO L462 AbstractCegarLoop]: Abstraction has 34625 states and 106401 transitions. [2019-12-07 15:29:17,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:29:17,034 INFO L276 IsEmpty]: Start isEmpty. Operand 34625 states and 106401 transitions. [2019-12-07 15:29:17,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 15:29:17,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:17,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:17,066 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:17,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:17,066 INFO L82 PathProgramCache]: Analyzing trace with hash 2106102698, now seen corresponding path program 2 times [2019-12-07 15:29:17,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:17,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778137970] [2019-12-07 15:29:17,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:17,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:17,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:17,204 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778137970] [2019-12-07 15:29:17,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:17,204 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 15:29:17,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1961683470] [2019-12-07 15:29:17,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 15:29:17,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:17,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 15:29:17,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:29:17,205 INFO L87 Difference]: Start difference. First operand 34625 states and 106401 transitions. Second operand 9 states. [2019-12-07 15:29:18,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:18,921 INFO L93 Difference]: Finished difference Result 47668 states and 142537 transitions. [2019-12-07 15:29:18,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 15:29:18,921 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2019-12-07 15:29:18,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:18,975 INFO L225 Difference]: With dead ends: 47668 [2019-12-07 15:29:18,976 INFO L226 Difference]: Without dead ends: 47113 [2019-12-07 15:29:18,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=157, Invalid=493, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:29:19,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47113 states. [2019-12-07 15:29:19,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47113 to 32429. [2019-12-07 15:29:19,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32429 states. [2019-12-07 15:29:19,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32429 states to 32429 states and 100058 transitions. [2019-12-07 15:29:19,582 INFO L78 Accepts]: Start accepts. Automaton has 32429 states and 100058 transitions. Word has length 43 [2019-12-07 15:29:19,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:19,582 INFO L462 AbstractCegarLoop]: Abstraction has 32429 states and 100058 transitions. [2019-12-07 15:29:19,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 15:29:19,582 INFO L276 IsEmpty]: Start isEmpty. Operand 32429 states and 100058 transitions. [2019-12-07 15:29:19,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 15:29:19,613 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:19,613 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:19,614 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:19,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:19,614 INFO L82 PathProgramCache]: Analyzing trace with hash 1441960170, now seen corresponding path program 1 times [2019-12-07 15:29:19,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:19,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757418237] [2019-12-07 15:29:19,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:19,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:19,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:19,663 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757418237] [2019-12-07 15:29:19,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:19,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:29:19,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549737308] [2019-12-07 15:29:19,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:29:19,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:19,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:29:19,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:29:19,664 INFO L87 Difference]: Start difference. First operand 32429 states and 100058 transitions. Second operand 5 states. [2019-12-07 15:29:20,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:20,101 INFO L93 Difference]: Finished difference Result 49190 states and 150383 transitions. [2019-12-07 15:29:20,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:29:20,102 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-07 15:29:20,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:20,171 INFO L225 Difference]: With dead ends: 49190 [2019-12-07 15:29:20,171 INFO L226 Difference]: Without dead ends: 49190 [2019-12-07 15:29:20,171 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:29:20,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49190 states. [2019-12-07 15:29:20,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49190 to 39891. [2019-12-07 15:29:20,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39891 states. [2019-12-07 15:29:20,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39891 states to 39891 states and 123183 transitions. [2019-12-07 15:29:20,906 INFO L78 Accepts]: Start accepts. Automaton has 39891 states and 123183 transitions. Word has length 44 [2019-12-07 15:29:20,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:20,906 INFO L462 AbstractCegarLoop]: Abstraction has 39891 states and 123183 transitions. [2019-12-07 15:29:20,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:29:20,906 INFO L276 IsEmpty]: Start isEmpty. Operand 39891 states and 123183 transitions. [2019-12-07 15:29:20,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 15:29:20,943 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:20,943 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:20,943 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:20,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:20,944 INFO L82 PathProgramCache]: Analyzing trace with hash 707630878, now seen corresponding path program 2 times [2019-12-07 15:29:20,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:20,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [162315522] [2019-12-07 15:29:20,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:20,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:20,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:20,975 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [162315522] [2019-12-07 15:29:20,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:20,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:29:20,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559640225] [2019-12-07 15:29:20,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:29:20,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:20,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:29:20,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:29:20,976 INFO L87 Difference]: Start difference. First operand 39891 states and 123183 transitions. Second operand 3 states. [2019-12-07 15:29:21,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:21,063 INFO L93 Difference]: Finished difference Result 32429 states and 98894 transitions. [2019-12-07 15:29:21,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:29:21,064 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 15:29:21,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:21,102 INFO L225 Difference]: With dead ends: 32429 [2019-12-07 15:29:21,102 INFO L226 Difference]: Without dead ends: 32429 [2019-12-07 15:29:21,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:29:21,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32429 states. [2019-12-07 15:29:21,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32429 to 32012. [2019-12-07 15:29:21,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32012 states. [2019-12-07 15:29:21,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32012 states to 32012 states and 97763 transitions. [2019-12-07 15:29:21,579 INFO L78 Accepts]: Start accepts. Automaton has 32012 states and 97763 transitions. Word has length 44 [2019-12-07 15:29:21,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:21,579 INFO L462 AbstractCegarLoop]: Abstraction has 32012 states and 97763 transitions. [2019-12-07 15:29:21,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:29:21,579 INFO L276 IsEmpty]: Start isEmpty. Operand 32012 states and 97763 transitions. [2019-12-07 15:29:21,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 15:29:21,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:21,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:21,609 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:21,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:21,609 INFO L82 PathProgramCache]: Analyzing trace with hash -696296869, now seen corresponding path program 1 times [2019-12-07 15:29:21,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:21,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285108291] [2019-12-07 15:29:21,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:21,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:21,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:21,651 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285108291] [2019-12-07 15:29:21,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:21,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:29:21,651 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [348034135] [2019-12-07 15:29:21,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:29:21,652 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:21,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:29:21,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:29:21,652 INFO L87 Difference]: Start difference. First operand 32012 states and 97763 transitions. Second operand 6 states. [2019-12-07 15:29:21,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:21,753 INFO L93 Difference]: Finished difference Result 29850 states and 92812 transitions. [2019-12-07 15:29:21,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:29:21,753 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2019-12-07 15:29:21,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:21,773 INFO L225 Difference]: With dead ends: 29850 [2019-12-07 15:29:21,773 INFO L226 Difference]: Without dead ends: 17361 [2019-12-07 15:29:21,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:29:21,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17361 states. [2019-12-07 15:29:21,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17361 to 9649. [2019-12-07 15:29:21,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9649 states. [2019-12-07 15:29:21,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9649 states to 9649 states and 29800 transitions. [2019-12-07 15:29:21,966 INFO L78 Accepts]: Start accepts. Automaton has 9649 states and 29800 transitions. Word has length 45 [2019-12-07 15:29:21,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:21,966 INFO L462 AbstractCegarLoop]: Abstraction has 9649 states and 29800 transitions. [2019-12-07 15:29:21,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:29:21,966 INFO L276 IsEmpty]: Start isEmpty. Operand 9649 states and 29800 transitions. [2019-12-07 15:29:21,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 15:29:21,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:21,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:21,974 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:21,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:21,974 INFO L82 PathProgramCache]: Analyzing trace with hash -487804996, now seen corresponding path program 1 times [2019-12-07 15:29:21,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:21,974 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2144590756] [2019-12-07 15:29:21,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:21,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:29:21,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:29:21,997 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2144590756] [2019-12-07 15:29:21,997 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:29:21,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:29:21,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178160802] [2019-12-07 15:29:21,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:29:21,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:29:21,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:29:21,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:29:21,998 INFO L87 Difference]: Start difference. First operand 9649 states and 29800 transitions. Second operand 3 states. [2019-12-07 15:29:22,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:29:22,049 INFO L93 Difference]: Finished difference Result 12563 states and 38164 transitions. [2019-12-07 15:29:22,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:29:22,050 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 15:29:22,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:29:22,063 INFO L225 Difference]: With dead ends: 12563 [2019-12-07 15:29:22,063 INFO L226 Difference]: Without dead ends: 12563 [2019-12-07 15:29:22,063 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:29:22,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12563 states. [2019-12-07 15:29:22,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12563 to 9660. [2019-12-07 15:29:22,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9660 states. [2019-12-07 15:29:22,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9660 states to 9660 states and 29968 transitions. [2019-12-07 15:29:22,220 INFO L78 Accepts]: Start accepts. Automaton has 9660 states and 29968 transitions. Word has length 59 [2019-12-07 15:29:22,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:29:22,221 INFO L462 AbstractCegarLoop]: Abstraction has 9660 states and 29968 transitions. [2019-12-07 15:29:22,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:29:22,221 INFO L276 IsEmpty]: Start isEmpty. Operand 9660 states and 29968 transitions. [2019-12-07 15:29:22,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 15:29:22,229 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:29:22,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:29:22,229 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:29:22,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:29:22,229 INFO L82 PathProgramCache]: Analyzing trace with hash 1265178387, now seen corresponding path program 1 times [2019-12-07 15:29:22,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:29:22,229 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678893132] [2019-12-07 15:29:22,229 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:29:22,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:29:22,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:29:22,312 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 15:29:22,313 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:29:22,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] ULTIMATE.startENTRY-->L841: Formula: (let ((.cse0 (store |v_#valid_68| 0 0))) (and (= v_~y$mem_tmp~0_52 0) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~y$r_buff1_thd0~0_155 0) (= |v_#valid_66| (store .cse0 |v_ULTIMATE.start_main_~#t733~0.base_21| 1)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t733~0.base_21|) (= v_~y$r_buff0_thd0~0_159 0) (= v_~y$w_buff1_used~0_637 0) (= v_~y$read_delayed~0_8 0) (= v_~main$tmp_guard0~0_27 0) (= 0 v_~__unbuffered_p3_EBX~0_27) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t733~0.base_21|)) (= 0 v_~y$r_buff1_thd3~0_151) (= 0 v_~y$r_buff0_thd4~0_154) (= v_~main$tmp_guard1~0_30 0) (= 0 v_~__unbuffered_p3_EAX~0_27) (= 0 v_~y$r_buff0_thd2~0_336) (= 0 v_~y$r_buff1_thd4~0_190) (= v_~y~0_177 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$flush_delayed~0_106 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t733~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t733~0.base_21|) |v_ULTIMATE.start_main_~#t733~0.offset_16| 0)) |v_#memory_int_27|) (= v_~weak$$choice2~0_150 0) (= v_~y$w_buff1~0_392 0) (= 0 |v_ULTIMATE.start_main_~#t733~0.offset_16|) (= 0 v_~y$r_buff1_thd2~0_255) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t733~0.base_21| 4)) (= 0 v_~y$r_buff0_thd3~0_211) (= v_~a~0_32 0) (= v_~__unbuffered_cnt~0_242 0) (= |v_#NULL.offset_5| 0) (= v_~z~0_105 0) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p1_EAX~0_27) (= v_~y$w_buff0_used~0_880 0) (= 0 v_~y$w_buff0~0_485) (= 0 v_~weak$$choice0~0_13) (= 0 v_~y$r_buff1_thd1~0_85) (= v_~y$r_buff0_thd1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~x~0_47 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_48|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_70|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_92|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_32, ~y$mem_tmp~0=v_~y$mem_tmp~0_52, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_151, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_~#t736~0.base=|v_ULTIMATE.start_main_~#t736~0.base_22|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_54, ~y$flush_delayed~0=v_~y$flush_delayed~0_106, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_27, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t736~0.offset=|v_ULTIMATE.start_main_~#t736~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_190, ~y$w_buff1~0=v_~y$w_buff1~0_392, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_336, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ULTIMATE.start_main_~#t735~0.base=|v_ULTIMATE.start_main_~#t735~0.base_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_242, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_155, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t735~0.offset=|v_ULTIMATE.start_main_~#t735~0.offset_17|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_880, ULTIMATE.start_main_~#t734~0.base=|v_ULTIMATE.start_main_~#t734~0.base_21|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_46|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_52|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_52|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_85, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_211, ~y~0=v_~y~0_177, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_27, ULTIMATE.start_main_~#t733~0.base=|v_ULTIMATE.start_main_~#t733~0.base_21|, #NULL.base=|v_#NULL.base_5|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_255, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_154, ULTIMATE.start_main_~#t734~0.offset=|v_ULTIMATE.start_main_~#t734~0.offset_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_159, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_105, ULTIMATE.start_main_~#t733~0.offset=|v_ULTIMATE.start_main_~#t733~0.offset_16|, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_637} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t736~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t736~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t735~0.base, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t735~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t734~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t733~0.base, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t734~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ULTIMATE.start_main_~#t733~0.offset, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:29:22,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L841-1-->L843: Formula: (and (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t734~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t734~0.offset_10|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t734~0.base_10| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t734~0.base_10|) |v_ULTIMATE.start_main_~#t734~0.offset_10| 1)) |v_#memory_int_21|) (= (store |v_#valid_42| |v_ULTIMATE.start_main_~#t734~0.base_10| 1) |v_#valid_41|) (not (= |v_ULTIMATE.start_main_~#t734~0.base_10| 0)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t734~0.base_10| 4)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t734~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t734~0.offset=|v_ULTIMATE.start_main_~#t734~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t734~0.base=|v_ULTIMATE.start_main_~#t734~0.base_10|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t734~0.offset, ULTIMATE.start_main_~#t734~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 15:29:22,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L843-1-->L845: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t735~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t735~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t735~0.base_11|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t735~0.base_11| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t735~0.base_11|) |v_ULTIMATE.start_main_~#t735~0.offset_10| 2)) |v_#memory_int_19|) (= 0 |v_ULTIMATE.start_main_~#t735~0.offset_10|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t735~0.base_11| 4)) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t735~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t735~0.offset=|v_ULTIMATE.start_main_~#t735~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t735~0.base=|v_ULTIMATE.start_main_~#t735~0.base_11|, #length=|v_#length_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t735~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t735~0.base, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 15:29:22,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L4-->L795: Formula: (and (= v_~y$r_buff0_thd1~0_10 v_~y$r_buff1_thd1~0_10) (= v_~y$r_buff0_thd3~0_44 1) (= v_~y$r_buff0_thd2~0_91 v_~y$r_buff1_thd2~0_54) (= v_~y$r_buff0_thd4~0_33 v_~y$r_buff1_thd4~0_33) (= v_~y$r_buff0_thd3~0_45 v_~y$r_buff1_thd3~0_21) (= v_~z~0_14 1) (= v_~y$r_buff0_thd0~0_33 v_~y$r_buff1_thd0~0_32) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40 0))) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_33, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_33, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_10, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_33, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40, ~z~0=v_~z~0_14, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:29:22,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L845-1-->L847: Formula: (and (not (= |v_ULTIMATE.start_main_~#t736~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t736~0.offset_10|) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t736~0.base_11| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t736~0.base_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t736~0.base_11|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t736~0.base_11| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t736~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t736~0.base_11|) |v_ULTIMATE.start_main_~#t736~0.offset_10| 3)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t736~0.base=|v_ULTIMATE.start_main_~#t736~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_~#t736~0.offset=|v_ULTIMATE.start_main_~#t736~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t736~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t736~0.offset] because there is no mapped edge [2019-12-07 15:29:22,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L818-2-->L818-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-264658732 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-264658732 256))) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out-264658732| |P3Thread1of1ForFork0_#t~ite33_Out-264658732|))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork0_#t~ite32_Out-264658732| ~y$w_buff1~0_In-264658732) .cse2) (and (= ~y~0_In-264658732 |P3Thread1of1ForFork0_#t~ite32_Out-264658732|) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-264658732, ~y$w_buff1~0=~y$w_buff1~0_In-264658732, ~y~0=~y~0_In-264658732, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-264658732} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-264658732, ~y$w_buff1~0=~y$w_buff1~0_In-264658732, ~y~0=~y~0_In-264658732, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-264658732|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-264658732|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-264658732} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 15:29:22,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~__unbuffered_cnt~0_158 (+ v_~__unbuffered_cnt~0_159 1)) (= v_~a~0_20 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|) (= v_~x~0_28 1)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_159, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{~a~0=v_~a~0_20, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_28, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:29:22,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In342122211 256))) (.cse1 (= (mod ~y$r_buff0_thd4~0_In342122211 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In342122211 |P3Thread1of1ForFork0_#t~ite34_Out342122211|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out342122211|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In342122211, ~y$w_buff0_used~0=~y$w_buff0_used~0_In342122211} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In342122211, ~y$w_buff0_used~0=~y$w_buff0_used~0_In342122211, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out342122211|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 15:29:22,320 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L820-->L820-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-2090302670 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd4~0_In-2090302670 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-2090302670 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In-2090302670 256)))) (or (and (= ~y$w_buff1_used~0_In-2090302670 |P3Thread1of1ForFork0_#t~ite35_Out-2090302670|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out-2090302670|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2090302670, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2090302670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2090302670, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2090302670} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2090302670, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2090302670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2090302670, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out-2090302670|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2090302670} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 15:29:22,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-616753894 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-616753894 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-616753894|) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out-616753894| ~y$r_buff0_thd4~0_In-616753894) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-616753894, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-616753894} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-616753894, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-616753894, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-616753894|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:29:22,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd4~0_In407619878 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In407619878 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd4~0_In407619878 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In407619878 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork0_#t~ite37_Out407619878| ~y$r_buff1_thd4~0_In407619878)) (and (= |P3Thread1of1ForFork0_#t~ite37_Out407619878| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In407619878, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In407619878, ~y$w_buff0_used~0=~y$w_buff0_used~0_In407619878, ~y$w_buff1_used~0=~y$w_buff1_used~0_In407619878} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In407619878, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In407619878, ~y$w_buff0_used~0=~y$w_buff0_used~0_In407619878, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out407619878|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In407619878} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 15:29:22,321 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L822-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_40| v_~y$r_buff1_thd4~0_62) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_62, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_39|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:29:22,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L760-->L760-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1013006869 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1013006869| ~y$w_buff1~0_In-1013006869) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_In-1013006869| |P1Thread1of1ForFork2_#t~ite11_Out-1013006869|)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1013006869| ~y$w_buff1~0_In-1013006869) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1013006869 256)))) (or (= (mod ~y$w_buff0_used~0_In-1013006869 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1013006869 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1013006869 256) 0)))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1013006869| |P1Thread1of1ForFork2_#t~ite11_Out-1013006869|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1013006869, ~y$w_buff1~0=~y$w_buff1~0_In-1013006869, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013006869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1013006869, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-1013006869|, ~weak$$choice2~0=~weak$$choice2~0_In-1013006869, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1013006869} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1013006869, ~y$w_buff1~0=~y$w_buff1~0_In-1013006869, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013006869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1013006869, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1013006869|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1013006869|, ~weak$$choice2~0=~weak$$choice2~0_In-1013006869, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1013006869} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:29:22,322 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L761-->L761-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1315665681 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite15_Out-1315665681| |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) (= ~y$w_buff0_used~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1315665681 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1315665681 256)) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1315665681 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-1315665681 256))))) (and (= ~y$w_buff0_used~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite15_Out-1315665681|) (= |P1Thread1of1ForFork2_#t~ite14_In-1315665681| |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1315665681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1315665681, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1315665681, ~weak$$choice2~0=~weak$$choice2~0_In-1315665681, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-1315665681|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1315665681} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1315665681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1315665681, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1315665681, ~weak$$choice2~0=~weak$$choice2~0_In-1315665681, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1315665681|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-1315665681|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1315665681} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 15:29:22,323 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L764: Formula: (and (= v_~y$r_buff0_thd2~0_95 v_~y$r_buff0_thd2~0_94) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_94, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_29} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 15:29:22,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L764-->L764-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1216714402 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite24_Out-1216714402| |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (= ~y$r_buff1_thd2~0_In-1216714402 |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1216714402 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1216714402 256) 0)) (= (mod ~y$w_buff0_used~0_In-1216714402 256) 0) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1216714402 256)) .cse1)))) (and (= |P1Thread1of1ForFork2_#t~ite23_In-1216714402| |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (= |P1Thread1of1ForFork2_#t~ite24_Out-1216714402| ~y$r_buff1_thd2~0_In-1216714402) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1216714402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1216714402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-1216714402|, ~weak$$choice2~0=~weak$$choice2~0_In-1216714402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1216714402} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1216714402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1216714402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-1216714402|, ~weak$$choice2~0=~weak$$choice2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-1216714402|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1216714402} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 15:29:22,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L766-->L774: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= v_~y~0_51 v_~y$mem_tmp~0_7) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~y~0=v_~y~0_51, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 15:29:22,324 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1930138529 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1930138529 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite28_Out1930138529| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1930138529 |P2Thread1of1ForFork3_#t~ite28_Out1930138529|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1930138529, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1930138529} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1930138529, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1930138529, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out1930138529|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 15:29:22,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In456069961 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In456069961 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In456069961 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In456069961 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite29_Out456069961| ~y$w_buff1_used~0_In456069961) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out456069961|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In456069961, ~y$w_buff0_used~0=~y$w_buff0_used~0_In456069961, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In456069961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In456069961} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In456069961, ~y$w_buff0_used~0=~y$w_buff0_used~0_In456069961, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In456069961, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out456069961|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In456069961} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 15:29:22,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L798-->L799: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In753200872 256))) (.cse2 (= ~y$r_buff0_thd3~0_In753200872 ~y$r_buff0_thd3~0_Out753200872)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In753200872 256) 0))) (or (and (= 0 ~y$r_buff0_thd3~0_Out753200872) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In753200872, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In753200872} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out753200872|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In753200872, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out753200872} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:29:22,325 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In210859717 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In210859717 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In210859717 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In210859717 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork3_#t~ite31_Out210859717| 0)) (and (= |P2Thread1of1ForFork3_#t~ite31_Out210859717| ~y$r_buff1_thd3~0_In210859717) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In210859717, ~y$w_buff0_used~0=~y$w_buff0_used~0_In210859717, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In210859717, ~y$w_buff1_used~0=~y$w_buff1_used~0_In210859717} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In210859717, ~y$w_buff0_used~0=~y$w_buff0_used~0_In210859717, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In210859717, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out210859717|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In210859717} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 15:29:22,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L799-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_128 (+ v_~__unbuffered_cnt~0_129 1)) (= |v_P2Thread1of1ForFork3_#t~ite31_36| v_~y$r_buff1_thd3~0_60) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_129} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_60, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_35|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 15:29:22,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L847-1-->L853: Formula: (and (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_30) 1 0)) 0 1) v_~main$tmp_guard0~0_10) (not (= (mod v_~main$tmp_guard0~0_10 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:29:22,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L853-2-->L853-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite42_Out2135454855| |ULTIMATE.start_main_#t~ite43_Out2135454855|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2135454855 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2135454855 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out2135454855| ~y$w_buff1~0_In2135454855) .cse1 (not .cse2)) (and (= ~y~0_In2135454855 |ULTIMATE.start_main_#t~ite42_Out2135454855|) .cse1 (or .cse2 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2135454855, ~y~0=~y~0_In2135454855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2135454855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2135454855} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2135454855, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out2135454855|, ~y~0=~y~0_In2135454855, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2135454855|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2135454855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2135454855} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:29:22,326 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L854-->L854-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1345718362 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1345718362 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-1345718362| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1345718362| ~y$w_buff0_used~0_In-1345718362) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345718362, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1345718362} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345718362, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1345718362, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1345718362|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:29:22,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L855-->L855-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-2014346326 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2014346326 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-2014346326 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-2014346326 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-2014346326 |ULTIMATE.start_main_#t~ite45_Out-2014346326|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2014346326|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014346326, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2014346326, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2014346326, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2014346326} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014346326, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2014346326, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2014346326, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2014346326|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2014346326} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 15:29:22,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L856-->L856-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1832606265 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1832606265 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite46_Out1832606265|)) (and (= ~y$r_buff0_thd0~0_In1832606265 |ULTIMATE.start_main_#t~ite46_Out1832606265|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1832606265, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1832606265} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1832606265, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1832606265, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1832606265|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 15:29:22,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L857-->L857-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In2117960102 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2117960102 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In2117960102 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In2117960102 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out2117960102| ~y$r_buff1_thd0~0_In2117960102)) (and (= |ULTIMATE.start_main_#t~ite47_Out2117960102| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2117960102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2117960102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2117960102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2117960102} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2117960102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2117960102, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2117960102|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2117960102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2117960102} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:29:22,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L857-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_23 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_40|) (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p3_EAX~0_22) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_41 2) (= v_~z~0_83 2) (= 0 v_~__unbuffered_p3_EBX~0_22))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_23)) InVars {~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_22, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~z~0=v_~z~0_83, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_22, ~x~0=v_~x~0_41} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_22, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_39|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z~0=v_~z~0_83, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_22, ~x~0=v_~x~0_41, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:29:22,385 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:29:22 BasicIcfg [2019-12-07 15:29:22,385 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:29:22,385 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:29:22,385 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:29:22,385 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:29:22,386 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:24:36" (3/4) ... [2019-12-07 15:29:22,387 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:29:22,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] ULTIMATE.startENTRY-->L841: Formula: (let ((.cse0 (store |v_#valid_68| 0 0))) (and (= v_~y$mem_tmp~0_52 0) (= 0 v_~y$read_delayed_var~0.offset_8) (= v_~y$r_buff1_thd0~0_155 0) (= |v_#valid_66| (store .cse0 |v_ULTIMATE.start_main_~#t733~0.base_21| 1)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t733~0.base_21|) (= v_~y$r_buff0_thd0~0_159 0) (= v_~y$w_buff1_used~0_637 0) (= v_~y$read_delayed~0_8 0) (= v_~main$tmp_guard0~0_27 0) (= 0 v_~__unbuffered_p3_EBX~0_27) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t733~0.base_21|)) (= 0 v_~y$r_buff1_thd3~0_151) (= 0 v_~y$r_buff0_thd4~0_154) (= v_~main$tmp_guard1~0_30 0) (= 0 v_~__unbuffered_p3_EAX~0_27) (= 0 v_~y$r_buff0_thd2~0_336) (= 0 v_~y$r_buff1_thd4~0_190) (= v_~y~0_177 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~y$flush_delayed~0_106 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t733~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t733~0.base_21|) |v_ULTIMATE.start_main_~#t733~0.offset_16| 0)) |v_#memory_int_27|) (= v_~weak$$choice2~0_150 0) (= v_~y$w_buff1~0_392 0) (= 0 |v_ULTIMATE.start_main_~#t733~0.offset_16|) (= 0 v_~y$r_buff1_thd2~0_255) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t733~0.base_21| 4)) (= 0 v_~y$r_buff0_thd3~0_211) (= v_~a~0_32 0) (= v_~__unbuffered_cnt~0_242 0) (= |v_#NULL.offset_5| 0) (= v_~z~0_105 0) (= 0 v_~y$read_delayed_var~0.base_8) (= 0 v_~__unbuffered_p1_EAX~0_27) (= v_~y$w_buff0_used~0_880 0) (= 0 v_~y$w_buff0~0_485) (= 0 v_~weak$$choice0~0_13) (= 0 v_~y$r_buff1_thd1~0_85) (= v_~y$r_buff0_thd1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~x~0_47 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_68|, #memory_int=|v_#memory_int_28|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_48|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_70|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_92|, ~y$read_delayed~0=v_~y$read_delayed~0_8, ~a~0=v_~a~0_32, ~y$mem_tmp~0=v_~y$mem_tmp~0_52, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_151, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_~#t736~0.base=|v_ULTIMATE.start_main_~#t736~0.base_22|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_54, ~y$flush_delayed~0=v_~y$flush_delayed~0_106, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_27, #length=|v_#length_29|, ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_24|, ULTIMATE.start_main_~#t736~0.offset=|v_ULTIMATE.start_main_~#t736~0.offset_17|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_190, ~y$w_buff1~0=v_~y$w_buff1~0_392, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_8, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_336, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ULTIMATE.start_main_~#t735~0.base=|v_ULTIMATE.start_main_~#t735~0.base_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_242, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_155, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t735~0.offset=|v_ULTIMATE.start_main_~#t735~0.offset_17|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_8, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_880, ULTIMATE.start_main_~#t734~0.base=|v_ULTIMATE.start_main_~#t734~0.base_21|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_46|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_30, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_52|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_52|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_85, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_211, ~y~0=v_~y~0_177, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_27, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_27, ULTIMATE.start_main_~#t733~0.base=|v_ULTIMATE.start_main_~#t733~0.base_21|, #NULL.base=|v_#NULL.base_5|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_255, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_154, ULTIMATE.start_main_~#t734~0.offset=|v_ULTIMATE.start_main_~#t734~0.offset_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_17|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_159, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_105, ULTIMATE.start_main_~#t733~0.offset=|v_ULTIMATE.start_main_~#t733~0.offset_16|, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_637} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t736~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet41, ULTIMATE.start_main_~#t736~0.offset, ~weak$$choice0~0, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t735~0.base, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t735~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_~#t734~0.base, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t733~0.base, #NULL.base, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_~#t734~0.offset, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet39, ~z~0, ULTIMATE.start_main_~#t733~0.offset, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:29:22,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L841-1-->L843: Formula: (and (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t734~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t734~0.offset_10|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t734~0.base_10| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t734~0.base_10|) |v_ULTIMATE.start_main_~#t734~0.offset_10| 1)) |v_#memory_int_21|) (= (store |v_#valid_42| |v_ULTIMATE.start_main_~#t734~0.base_10| 1) |v_#valid_41|) (not (= |v_ULTIMATE.start_main_~#t734~0.base_10| 0)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t734~0.base_10| 4)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t734~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t734~0.offset=|v_ULTIMATE.start_main_~#t734~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_~#t734~0.base=|v_ULTIMATE.start_main_~#t734~0.base_10|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_5|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t734~0.offset, ULTIMATE.start_main_~#t734~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 15:29:22,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L843-1-->L845: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t735~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t735~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t735~0.base_11|)) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t735~0.base_11| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t735~0.base_11|) |v_ULTIMATE.start_main_~#t735~0.offset_10| 2)) |v_#memory_int_19|) (= 0 |v_ULTIMATE.start_main_~#t735~0.offset_10|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t735~0.base_11| 4)) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t735~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t735~0.offset=|v_ULTIMATE.start_main_~#t735~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t735~0.base=|v_ULTIMATE.start_main_~#t735~0.base_11|, #length=|v_#length_21|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t735~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t735~0.base, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 15:29:22,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L4-->L795: Formula: (and (= v_~y$r_buff0_thd1~0_10 v_~y$r_buff1_thd1~0_10) (= v_~y$r_buff0_thd3~0_44 1) (= v_~y$r_buff0_thd2~0_91 v_~y$r_buff1_thd2~0_54) (= v_~y$r_buff0_thd4~0_33 v_~y$r_buff1_thd4~0_33) (= v_~y$r_buff0_thd3~0_45 v_~y$r_buff1_thd3~0_21) (= v_~z~0_14 1) (= v_~y$r_buff0_thd0~0_33 v_~y$r_buff1_thd0~0_32) (not (= v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40 0))) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_33, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_45, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_54, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_33, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_10, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_33, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_21, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_44, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_33, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_91, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_10, P2Thread1of1ForFork3___VERIFIER_assert_~expression=v_P2Thread1of1ForFork3___VERIFIER_assert_~expression_40, ~z~0=v_~z~0_14, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~z~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 15:29:22,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L845-1-->L847: Formula: (and (not (= |v_ULTIMATE.start_main_~#t736~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t736~0.offset_10|) (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t736~0.base_11| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t736~0.base_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t736~0.base_11|)) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t736~0.base_11| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t736~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t736~0.base_11|) |v_ULTIMATE.start_main_~#t736~0.offset_10| 3)) |v_#memory_int_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_5|, ULTIMATE.start_main_~#t736~0.base=|v_ULTIMATE.start_main_~#t736~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_17|, #length=|v_#length_19|, ULTIMATE.start_main_~#t736~0.offset=|v_ULTIMATE.start_main_~#t736~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t736~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t736~0.offset] because there is no mapped edge [2019-12-07 15:29:22,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L818-2-->L818-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-264658732 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-264658732 256))) (.cse2 (= |P3Thread1of1ForFork0_#t~ite32_Out-264658732| |P3Thread1of1ForFork0_#t~ite33_Out-264658732|))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork0_#t~ite32_Out-264658732| ~y$w_buff1~0_In-264658732) .cse2) (and (= ~y~0_In-264658732 |P3Thread1of1ForFork0_#t~ite32_Out-264658732|) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-264658732, ~y$w_buff1~0=~y$w_buff1~0_In-264658732, ~y~0=~y~0_In-264658732, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-264658732} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-264658732, ~y$w_buff1~0=~y$w_buff1~0_In-264658732, ~y~0=~y~0_In-264658732, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out-264658732|, P3Thread1of1ForFork0_#t~ite32=|P3Thread1of1ForFork0_#t~ite32_Out-264658732|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-264658732} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33, P3Thread1of1ForFork0_#t~ite32] because there is no mapped edge [2019-12-07 15:29:22,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork1_#in~arg.base_17| v_P0Thread1of1ForFork1_~arg.base_15) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= v_P0Thread1of1ForFork1_~arg.offset_15 |v_P0Thread1of1ForFork1_#in~arg.offset_17|) (= v_~__unbuffered_cnt~0_158 (+ v_~__unbuffered_cnt~0_159 1)) (= v_~a~0_20 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|) (= v_~x~0_28 1)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_159, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|} OutVars{~a~0=v_~a~0_20, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_17|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_15, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_17|, ~x~0=v_~x~0_28, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_15} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 15:29:22,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In342122211 256))) (.cse1 (= (mod ~y$r_buff0_thd4~0_In342122211 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In342122211 |P3Thread1of1ForFork0_#t~ite34_Out342122211|)) (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out342122211|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In342122211, ~y$w_buff0_used~0=~y$w_buff0_used~0_In342122211} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In342122211, ~y$w_buff0_used~0=~y$w_buff0_used~0_In342122211, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out342122211|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 15:29:22,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L820-->L820-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-2090302670 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd4~0_In-2090302670 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In-2090302670 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In-2090302670 256)))) (or (and (= ~y$w_buff1_used~0_In-2090302670 |P3Thread1of1ForFork0_#t~ite35_Out-2090302670|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P3Thread1of1ForFork0_#t~ite35_Out-2090302670|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2090302670, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2090302670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2090302670, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2090302670} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2090302670, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2090302670, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2090302670, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out-2090302670|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2090302670} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35] because there is no mapped edge [2019-12-07 15:29:22,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-616753894 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-616753894 256) 0))) (or (and (not .cse0) (= 0 |P3Thread1of1ForFork0_#t~ite36_Out-616753894|) (not .cse1)) (and (= |P3Thread1of1ForFork0_#t~ite36_Out-616753894| ~y$r_buff0_thd4~0_In-616753894) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-616753894, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-616753894} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-616753894, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-616753894, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-616753894|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:29:22,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L822-->L822-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd4~0_In407619878 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In407619878 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd4~0_In407619878 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In407619878 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P3Thread1of1ForFork0_#t~ite37_Out407619878| ~y$r_buff1_thd4~0_In407619878)) (and (= |P3Thread1of1ForFork0_#t~ite37_Out407619878| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In407619878, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In407619878, ~y$w_buff0_used~0=~y$w_buff0_used~0_In407619878, ~y$w_buff1_used~0=~y$w_buff1_used~0_In407619878} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In407619878, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In407619878, ~y$w_buff0_used~0=~y$w_buff0_used~0_In407619878, P3Thread1of1ForFork0_#t~ite37=|P3Thread1of1ForFork0_#t~ite37_Out407619878|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In407619878} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite37] because there is no mapped edge [2019-12-07 15:29:22,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L822-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork0_#t~ite37_40| v_~y$r_buff1_thd4~0_62) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_40|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_62, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#t~ite37=|v_P3Thread1of1ForFork0_#t~ite37_39|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#t~ite37, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:29:22,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L760-->L760-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1013006869 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1013006869| ~y$w_buff1~0_In-1013006869) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_In-1013006869| |P1Thread1of1ForFork2_#t~ite11_Out-1013006869|)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out-1013006869| ~y$w_buff1~0_In-1013006869) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1013006869 256)))) (or (= (mod ~y$w_buff0_used~0_In-1013006869 256) 0) (and .cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1013006869 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1013006869 256) 0)))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1013006869| |P1Thread1of1ForFork2_#t~ite11_Out-1013006869|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1013006869, ~y$w_buff1~0=~y$w_buff1~0_In-1013006869, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013006869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1013006869, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_In-1013006869|, ~weak$$choice2~0=~weak$$choice2~0_In-1013006869, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1013006869} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1013006869, ~y$w_buff1~0=~y$w_buff1~0_In-1013006869, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1013006869, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1013006869, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1013006869|, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1013006869|, ~weak$$choice2~0=~weak$$choice2~0_In-1013006869, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1013006869} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12, P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:29:22,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L761-->L761-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1315665681 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite15_Out-1315665681| |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) (= ~y$w_buff0_used~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In-1315665681 256) 0))) (or (and (= 0 (mod ~y$w_buff1_used~0_In-1315665681 256)) .cse1) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1315665681 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-1315665681 256))))) (and (= ~y$w_buff0_used~0_In-1315665681 |P1Thread1of1ForFork2_#t~ite15_Out-1315665681|) (= |P1Thread1of1ForFork2_#t~ite14_In-1315665681| |P1Thread1of1ForFork2_#t~ite14_Out-1315665681|) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1315665681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1315665681, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1315665681, ~weak$$choice2~0=~weak$$choice2~0_In-1315665681, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_In-1315665681|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1315665681} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1315665681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1315665681, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1315665681, ~weak$$choice2~0=~weak$$choice2~0_In-1315665681, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1315665681|, P1Thread1of1ForFork2_#t~ite15=|P1Thread1of1ForFork2_#t~ite15_Out-1315665681|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1315665681} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 15:29:22,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L764: Formula: (and (= v_~y$r_buff0_thd2~0_95 v_~y$r_buff0_thd2~0_94) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{P1Thread1of1ForFork2_#t~ite19=|v_P1Thread1of1ForFork2_#t~ite19_6|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_94, P1Thread1of1ForFork2_#t~ite20=|v_P1Thread1of1ForFork2_#t~ite20_7|, P1Thread1of1ForFork2_#t~ite21=|v_P1Thread1of1ForFork2_#t~ite21_6|, ~weak$$choice2~0=v_~weak$$choice2~0_29} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite19, ~y$r_buff0_thd2~0, P1Thread1of1ForFork2_#t~ite20, P1Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 15:29:22,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L764-->L764-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1216714402 256)))) (or (and .cse0 (= |P1Thread1of1ForFork2_#t~ite24_Out-1216714402| |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (= ~y$r_buff1_thd2~0_In-1216714402 |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1216714402 256)))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-1216714402 256) 0)) (= (mod ~y$w_buff0_used~0_In-1216714402 256) 0) (and (= 0 (mod ~y$r_buff1_thd2~0_In-1216714402 256)) .cse1)))) (and (= |P1Thread1of1ForFork2_#t~ite23_In-1216714402| |P1Thread1of1ForFork2_#t~ite23_Out-1216714402|) (= |P1Thread1of1ForFork2_#t~ite24_Out-1216714402| ~y$r_buff1_thd2~0_In-1216714402) (not .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1216714402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1216714402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_In-1216714402|, ~weak$$choice2~0=~weak$$choice2~0_In-1216714402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1216714402} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1216714402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1216714402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite23=|P1Thread1of1ForFork2_#t~ite23_Out-1216714402|, ~weak$$choice2~0=~weak$$choice2~0_In-1216714402, P1Thread1of1ForFork2_#t~ite24=|P1Thread1of1ForFork2_#t~ite24_Out-1216714402|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1216714402} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite23, P1Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 15:29:22,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L766-->L774: Formula: (and (= 0 v_~y$flush_delayed~0_8) (= v_~y~0_51 v_~y$mem_tmp~0_7) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (not (= 0 (mod v_~y$flush_delayed~0_9 256)))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_9, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_7, ~y$flush_delayed~0=v_~y$flush_delayed~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, ~y~0=v_~y~0_51, P1Thread1of1ForFork2_#t~ite25=|v_P1Thread1of1ForFork2_#t~ite25_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#t~ite25] because there is no mapped edge [2019-12-07 15:29:22,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1930138529 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1930138529 256) 0))) (or (and (= |P2Thread1of1ForFork3_#t~ite28_Out1930138529| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1930138529 |P2Thread1of1ForFork3_#t~ite28_Out1930138529|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1930138529, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1930138529} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1930138529, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1930138529, P2Thread1of1ForFork3_#t~ite28=|P2Thread1of1ForFork3_#t~ite28_Out1930138529|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite28] because there is no mapped edge [2019-12-07 15:29:22,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In456069961 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In456069961 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In456069961 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In456069961 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork3_#t~ite29_Out456069961| ~y$w_buff1_used~0_In456069961) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork3_#t~ite29_Out456069961|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In456069961, ~y$w_buff0_used~0=~y$w_buff0_used~0_In456069961, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In456069961, ~y$w_buff1_used~0=~y$w_buff1_used~0_In456069961} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In456069961, ~y$w_buff0_used~0=~y$w_buff0_used~0_In456069961, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In456069961, P2Thread1of1ForFork3_#t~ite29=|P2Thread1of1ForFork3_#t~ite29_Out456069961|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In456069961} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite29] because there is no mapped edge [2019-12-07 15:29:22,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L798-->L799: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In753200872 256))) (.cse2 (= ~y$r_buff0_thd3~0_In753200872 ~y$r_buff0_thd3~0_Out753200872)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In753200872 256) 0))) (or (and (= 0 ~y$r_buff0_thd3~0_Out753200872) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In753200872, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In753200872} OutVars{P2Thread1of1ForFork3_#t~ite30=|P2Thread1of1ForFork3_#t~ite30_Out753200872|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In753200872, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out753200872} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite30, ~y$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 15:29:22,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In210859717 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In210859717 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In210859717 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In210859717 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork3_#t~ite31_Out210859717| 0)) (and (= |P2Thread1of1ForFork3_#t~ite31_Out210859717| ~y$r_buff1_thd3~0_In210859717) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In210859717, ~y$w_buff0_used~0=~y$w_buff0_used~0_In210859717, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In210859717, ~y$w_buff1_used~0=~y$w_buff1_used~0_In210859717} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In210859717, ~y$w_buff0_used~0=~y$w_buff0_used~0_In210859717, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In210859717, P2Thread1of1ForFork3_#t~ite31=|P2Thread1of1ForFork3_#t~ite31_Out210859717|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In210859717} AuxVars[] AssignedVars[P2Thread1of1ForFork3_#t~ite31] because there is no mapped edge [2019-12-07 15:29:22,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L799-2-->P2EXIT: Formula: (and (= v_~__unbuffered_cnt~0_128 (+ v_~__unbuffered_cnt~0_129 1)) (= |v_P2Thread1of1ForFork3_#t~ite31_36| v_~y$r_buff1_thd3~0_60) (= 0 |v_P2Thread1of1ForFork3_#res.base_3|) (= |v_P2Thread1of1ForFork3_#res.offset_3| 0)) InVars {P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_129} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_60, P2Thread1of1ForFork3_#t~ite31=|v_P2Thread1of1ForFork3_#t~ite31_35|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_128, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_3|, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork3_#t~ite31, ~__unbuffered_cnt~0, P2Thread1of1ForFork3_#res.base, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 15:29:22,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L847-1-->L853: Formula: (and (= (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_30) 1 0)) 0 1) v_~main$tmp_guard0~0_10) (not (= (mod v_~main$tmp_guard0~0_10 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30} OutVars{ULTIMATE.start_main_#t~nondet41=|v_ULTIMATE.start_main_#t~nondet41_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_10} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet41, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:29:22,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L853-2-->L853-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite42_Out2135454855| |ULTIMATE.start_main_#t~ite43_Out2135454855|)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In2135454855 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2135454855 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out2135454855| ~y$w_buff1~0_In2135454855) .cse1 (not .cse2)) (and (= ~y~0_In2135454855 |ULTIMATE.start_main_#t~ite42_Out2135454855|) .cse1 (or .cse2 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2135454855, ~y~0=~y~0_In2135454855, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2135454855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2135454855} OutVars{~y$w_buff1~0=~y$w_buff1~0_In2135454855, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out2135454855|, ~y~0=~y~0_In2135454855, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2135454855|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2135454855, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2135454855} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:29:22,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L854-->L854-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-1345718362 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1345718362 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out-1345718362| 0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite44_Out-1345718362| ~y$w_buff0_used~0_In-1345718362) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345718362, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1345718362} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1345718362, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1345718362, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1345718362|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:29:22,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L855-->L855-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-2014346326 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-2014346326 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-2014346326 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-2014346326 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-2014346326 |ULTIMATE.start_main_#t~ite45_Out-2014346326|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2014346326|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014346326, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2014346326, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2014346326, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2014346326} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2014346326, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2014346326, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2014346326, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2014346326|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2014346326} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 15:29:22,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [787] [787] L856-->L856-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1832606265 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1832606265 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite46_Out1832606265|)) (and (= ~y$r_buff0_thd0~0_In1832606265 |ULTIMATE.start_main_#t~ite46_Out1832606265|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1832606265, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1832606265} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1832606265, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1832606265, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1832606265|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 15:29:22,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L857-->L857-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In2117960102 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2117960102 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In2117960102 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In2117960102 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite47_Out2117960102| ~y$r_buff1_thd0~0_In2117960102)) (and (= |ULTIMATE.start_main_#t~ite47_Out2117960102| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2117960102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2117960102, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2117960102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2117960102} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2117960102, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2117960102, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out2117960102|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2117960102, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2117960102} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 15:29:22,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L857-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_23 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~y$r_buff1_thd0~0_133 |v_ULTIMATE.start_main_#t~ite47_40|) (= (ite (= (ite (not (and (= 2 v_~__unbuffered_p3_EAX~0_22) (= 0 v_~__unbuffered_p1_EAX~0_23) (= v_~x~0_41 2) (= v_~z~0_83 2) (= 0 v_~__unbuffered_p3_EBX~0_22))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_23)) InVars {~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_22, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_40|, ~z~0=v_~z~0_83, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_22, ~x~0=v_~x~0_41} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_22, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_39|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z~0=v_~z~0_83, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_22, ~x~0=v_~x~0_41, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:29:22,453 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_25d26eab-677b-4a9d-90a1-c74c81186bd1/bin/utaipan/witness.graphml [2019-12-07 15:29:22,453 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:29:22,454 INFO L168 Benchmark]: Toolchain (without parser) took 286757.80 ms. Allocated memory was 1.0 GB in the beginning and 10.0 GB in the end (delta: 8.9 GB). Free memory was 938.2 MB in the beginning and 4.1 GB in the end (delta: -3.2 GB). Peak memory consumption was 5.8 GB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,455 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:29:22,455 INFO L168 Benchmark]: CACSL2BoogieTranslator took 385.79 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -146.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,455 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,455 INFO L168 Benchmark]: Boogie Preprocessor took 25.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:29:22,456 INFO L168 Benchmark]: RCFGBuilder took 406.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,456 INFO L168 Benchmark]: TraceAbstraction took 285832.07 ms. Allocated memory was 1.1 GB in the beginning and 10.0 GB in the end (delta: 8.8 GB). Free memory was 1.0 GB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 5.7 GB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,456 INFO L168 Benchmark]: Witness Printer took 68.17 ms. Allocated memory is still 10.0 GB. Free memory was 4.1 GB in the beginning and 4.1 GB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:29:22,457 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 385.79 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 116.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -146.5 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.42 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 285832.07 ms. Allocated memory was 1.1 GB in the beginning and 10.0 GB in the end (delta: 8.8 GB). Free memory was 1.0 GB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 5.7 GB. Max. memory is 11.5 GB. * Witness Printer took 68.17 ms. Allocated memory is still 10.0 GB. Free memory was 4.1 GB in the beginning and 4.1 GB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 180 ProgramPointsBefore, 90 ProgramPointsAfterwards, 208 TransitionsBefore, 97 TransitionsAfterwards, 18126 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 30 ConcurrentYvCompositions, 26 ChoiceCompositions, 7595 VarBasedMoverChecksPositive, 274 VarBasedMoverChecksNegative, 123 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 74757 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L841] FCALL, FORK 0 pthread_create(&t733, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L843] FCALL, FORK 0 pthread_create(&t734, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L845] FCALL, FORK 0 pthread_create(&t735, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L779] 3 y$w_buff1 = y$w_buff0 [L780] 3 y$w_buff0 = 1 [L781] 3 y$w_buff1_used = y$w_buff0_used [L782] 3 y$w_buff0_used = (_Bool)1 [L847] FCALL, FORK 0 pthread_create(&t736, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L809] 4 z = 2 [L812] 4 __unbuffered_p3_EAX = z [L815] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L818] EXPR 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L818] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L751] 2 x = 2 [L754] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L755] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L756] 2 y$flush_delayed = weak$$choice2 [L757] 2 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L758] EXPR 2 !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1)=0, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L758] 2 y = !y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff1) [L759] EXPR 2 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L819] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L795] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L820] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L821] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L759] 2 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : y$w_buff0)) [L760] 2 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff1 : y$w_buff1)) [L761] 2 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used)) [L762] EXPR 2 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L762] 2 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L764] 2 y$r_buff1_thd2 = weak$$choice2 ? y$r_buff1_thd2 : (!y$w_buff0_used || !y$r_buff0_thd2 && !y$w_buff1_used || !y$r_buff0_thd2 && !y$r_buff1_thd2 ? y$r_buff1_thd2 : (y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L765] 2 __unbuffered_p1_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L795] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L796] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L797] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L853] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L853] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L854] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L855] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L856] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 285.6s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 63.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3850 SDtfs, 4547 SDslu, 7200 SDs, 0 SdLazy, 4350 SolverSat, 265 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 147 GetRequests, 26 SyntacticMatches, 13 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=544510occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 183.9s AutomataMinimizationTime, 22 MinimizatonAttempts, 532466 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 668 NumberOfCodeBlocks, 668 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 587 ConstructedInterpolants, 0 QuantifiedInterpolants, 112543 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...