./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c2da70db35e53acb3d8b5d515c77b284d097adf9 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 20:46:42,334 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 20:46:42,335 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 20:46:42,343 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 20:46:42,343 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 20:46:42,344 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 20:46:42,345 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 20:46:42,346 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 20:46:42,347 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 20:46:42,348 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 20:46:42,349 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 20:46:42,350 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 20:46:42,350 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 20:46:42,351 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 20:46:42,351 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 20:46:42,352 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 20:46:42,353 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 20:46:42,353 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 20:46:42,355 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 20:46:42,356 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 20:46:42,358 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 20:46:42,359 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 20:46:42,359 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 20:46:42,360 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 20:46:42,362 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 20:46:42,362 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 20:46:42,362 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 20:46:42,362 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 20:46:42,363 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 20:46:42,363 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 20:46:42,363 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 20:46:42,364 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 20:46:42,364 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 20:46:42,365 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 20:46:42,365 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 20:46:42,365 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 20:46:42,366 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 20:46:42,366 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 20:46:42,366 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 20:46:42,367 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 20:46:42,367 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 20:46:42,367 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 20:46:42,377 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 20:46:42,377 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 20:46:42,378 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 20:46:42,378 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 20:46:42,378 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 20:46:42,378 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 20:46:42,378 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 20:46:42,378 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 20:46:42,379 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 20:46:42,379 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 20:46:42,380 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 20:46:42,380 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 20:46:42,381 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 20:46:42,381 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:46:42,382 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 20:46:42,382 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 20:46:42,383 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 20:46:42,383 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 20:46:42,383 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 20:46:42,383 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c2da70db35e53acb3d8b5d515c77b284d097adf9 [2019-12-07 20:46:42,482 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 20:46:42,492 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 20:46:42,495 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 20:46:42,496 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 20:46:42,497 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 20:46:42,497 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix028_pso.oepc.i [2019-12-07 20:46:42,544 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/data/0772d0e7e/880e4560157142a5bce3b21f0a185c25/FLAGa24d89c34 [2019-12-07 20:46:42,940 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 20:46:42,941 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/sv-benchmarks/c/pthread-wmm/mix028_pso.oepc.i [2019-12-07 20:46:42,950 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/data/0772d0e7e/880e4560157142a5bce3b21f0a185c25/FLAGa24d89c34 [2019-12-07 20:46:42,958 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/data/0772d0e7e/880e4560157142a5bce3b21f0a185c25 [2019-12-07 20:46:42,960 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 20:46:42,961 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 20:46:42,961 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 20:46:42,962 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 20:46:42,964 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 20:46:42,964 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:46:42" (1/1) ... [2019-12-07 20:46:42,966 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:42, skipping insertion in model container [2019-12-07 20:46:42,966 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:46:42" (1/1) ... [2019-12-07 20:46:42,970 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 20:46:42,998 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 20:46:43,235 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:46:43,243 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 20:46:43,286 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:46:43,331 INFO L208 MainTranslator]: Completed translation [2019-12-07 20:46:43,331 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43 WrapperNode [2019-12-07 20:46:43,332 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 20:46:43,332 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 20:46:43,332 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 20:46:43,332 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 20:46:43,338 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,352 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,370 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 20:46:43,371 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 20:46:43,371 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 20:46:43,371 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 20:46:43,378 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,378 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,381 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,381 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,388 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,391 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,393 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... [2019-12-07 20:46:43,397 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 20:46:43,397 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 20:46:43,397 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 20:46:43,397 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 20:46:43,398 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:46:43,440 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 20:46:43,440 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 20:46:43,440 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 20:46:43,440 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 20:46:43,440 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 20:46:43,441 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 20:46:43,441 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 20:46:43,441 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 20:46:43,441 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 20:46:43,441 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 20:46:43,441 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 20:46:43,441 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 20:46:43,441 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 20:46:43,442 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 20:46:43,815 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 20:46:43,815 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 20:46:43,816 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:46:43 BoogieIcfgContainer [2019-12-07 20:46:43,816 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 20:46:43,816 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 20:46:43,816 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 20:46:43,818 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 20:46:43,818 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 08:46:42" (1/3) ... [2019-12-07 20:46:43,819 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@421a63ce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:46:43, skipping insertion in model container [2019-12-07 20:46:43,819 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:46:43" (2/3) ... [2019-12-07 20:46:43,819 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@421a63ce and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:46:43, skipping insertion in model container [2019-12-07 20:46:43,819 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:46:43" (3/3) ... [2019-12-07 20:46:43,820 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_pso.oepc.i [2019-12-07 20:46:43,827 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 20:46:43,827 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 20:46:43,832 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 20:46:43,832 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 20:46:43,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,858 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,859 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,860 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,861 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,862 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,863 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,864 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,865 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,866 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,866 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,866 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,866 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,866 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,867 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,868 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,869 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,870 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,871 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,872 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,873 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,874 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,875 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,876 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,877 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,878 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,879 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:46:43,890 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 20:46:43,903 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 20:46:43,903 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 20:46:43,903 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 20:46:43,903 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 20:46:43,903 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 20:46:43,903 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 20:46:43,903 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 20:46:43,904 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 20:46:43,916 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 20:46:43,918 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 20:46:43,979 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 20:46:43,979 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:46:43,993 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 682 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:46:44,014 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 20:46:44,050 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 20:46:44,050 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:46:44,056 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 682 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:46:44,073 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 20:46:44,074 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 20:46:47,268 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 20:46:47,529 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 20:46:47,614 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87070 [2019-12-07 20:46:47,614 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 20:46:47,617 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 20:47:02,449 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115112 states. [2019-12-07 20:47:02,450 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states. [2019-12-07 20:47:02,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 20:47:02,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:02,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 20:47:02,455 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:02,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:02,459 INFO L82 PathProgramCache]: Analyzing trace with hash 911890, now seen corresponding path program 1 times [2019-12-07 20:47:02,465 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:02,465 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898845737] [2019-12-07 20:47:02,465 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:02,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:02,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:02,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898845737] [2019-12-07 20:47:02,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:02,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 20:47:02,607 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279345541] [2019-12-07 20:47:02,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:02,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:02,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:02,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:02,621 INFO L87 Difference]: Start difference. First operand 115112 states. Second operand 3 states. [2019-12-07 20:47:03,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:03,416 INFO L93 Difference]: Finished difference Result 114158 states and 484836 transitions. [2019-12-07 20:47:03,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:03,418 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 20:47:03,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:03,898 INFO L225 Difference]: With dead ends: 114158 [2019-12-07 20:47:03,898 INFO L226 Difference]: Without dead ends: 107060 [2019-12-07 20:47:03,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:09,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107060 states. [2019-12-07 20:47:10,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107060 to 107060. [2019-12-07 20:47:10,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107060 states. [2019-12-07 20:47:11,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107060 states to 107060 states and 454078 transitions. [2019-12-07 20:47:11,143 INFO L78 Accepts]: Start accepts. Automaton has 107060 states and 454078 transitions. Word has length 3 [2019-12-07 20:47:11,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:11,144 INFO L462 AbstractCegarLoop]: Abstraction has 107060 states and 454078 transitions. [2019-12-07 20:47:11,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:11,144 INFO L276 IsEmpty]: Start isEmpty. Operand 107060 states and 454078 transitions. [2019-12-07 20:47:11,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 20:47:11,149 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:11,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:11,149 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:11,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:11,150 INFO L82 PathProgramCache]: Analyzing trace with hash 1487504284, now seen corresponding path program 1 times [2019-12-07 20:47:11,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:11,150 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251090720] [2019-12-07 20:47:11,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:11,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:11,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:11,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251090720] [2019-12-07 20:47:11,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:11,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:11,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861556657] [2019-12-07 20:47:11,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:47:11,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:11,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:47:11,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:11,233 INFO L87 Difference]: Start difference. First operand 107060 states and 454078 transitions. Second operand 4 states. [2019-12-07 20:47:12,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:12,124 INFO L93 Difference]: Finished difference Result 166396 states and 678148 transitions. [2019-12-07 20:47:12,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:47:12,124 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 20:47:12,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:12,639 INFO L225 Difference]: With dead ends: 166396 [2019-12-07 20:47:12,639 INFO L226 Difference]: Without dead ends: 166347 [2019-12-07 20:47:12,639 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:20,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166347 states. [2019-12-07 20:47:22,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166347 to 151934. [2019-12-07 20:47:22,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151934 states. [2019-12-07 20:47:22,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151934 states to 151934 states and 627001 transitions. [2019-12-07 20:47:22,767 INFO L78 Accepts]: Start accepts. Automaton has 151934 states and 627001 transitions. Word has length 11 [2019-12-07 20:47:22,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:22,767 INFO L462 AbstractCegarLoop]: Abstraction has 151934 states and 627001 transitions. [2019-12-07 20:47:22,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:47:22,767 INFO L276 IsEmpty]: Start isEmpty. Operand 151934 states and 627001 transitions. [2019-12-07 20:47:22,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 20:47:22,772 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:22,772 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:22,772 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:22,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:22,773 INFO L82 PathProgramCache]: Analyzing trace with hash 881606285, now seen corresponding path program 1 times [2019-12-07 20:47:22,773 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:22,773 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225354740] [2019-12-07 20:47:22,773 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:22,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:22,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:22,814 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225354740] [2019-12-07 20:47:22,814 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:22,814 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:22,814 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488190760] [2019-12-07 20:47:22,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:22,814 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:22,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:22,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:22,815 INFO L87 Difference]: Start difference. First operand 151934 states and 627001 transitions. Second operand 3 states. [2019-12-07 20:47:22,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:22,913 INFO L93 Difference]: Finished difference Result 33114 states and 107084 transitions. [2019-12-07 20:47:22,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:22,914 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 20:47:22,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:22,967 INFO L225 Difference]: With dead ends: 33114 [2019-12-07 20:47:22,967 INFO L226 Difference]: Without dead ends: 33114 [2019-12-07 20:47:22,967 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:23,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33114 states. [2019-12-07 20:47:23,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33114 to 33114. [2019-12-07 20:47:23,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33114 states. [2019-12-07 20:47:23,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33114 states to 33114 states and 107084 transitions. [2019-12-07 20:47:23,538 INFO L78 Accepts]: Start accepts. Automaton has 33114 states and 107084 transitions. Word has length 13 [2019-12-07 20:47:23,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:23,539 INFO L462 AbstractCegarLoop]: Abstraction has 33114 states and 107084 transitions. [2019-12-07 20:47:23,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:23,539 INFO L276 IsEmpty]: Start isEmpty. Operand 33114 states and 107084 transitions. [2019-12-07 20:47:23,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 20:47:23,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:23,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:23,541 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:23,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:23,542 INFO L82 PathProgramCache]: Analyzing trace with hash 1702625862, now seen corresponding path program 1 times [2019-12-07 20:47:23,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:23,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1685004981] [2019-12-07 20:47:23,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:23,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:23,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:23,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1685004981] [2019-12-07 20:47:23,599 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:23,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:23,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078150157] [2019-12-07 20:47:23,599 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:47:23,599 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:23,599 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:47:23,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:23,600 INFO L87 Difference]: Start difference. First operand 33114 states and 107084 transitions. Second operand 4 states. [2019-12-07 20:47:23,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:23,838 INFO L93 Difference]: Finished difference Result 41561 states and 133908 transitions. [2019-12-07 20:47:23,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:47:23,839 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 20:47:23,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:23,897 INFO L225 Difference]: With dead ends: 41561 [2019-12-07 20:47:23,898 INFO L226 Difference]: Without dead ends: 41561 [2019-12-07 20:47:23,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:24,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41561 states. [2019-12-07 20:47:24,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41561 to 37204. [2019-12-07 20:47:24,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37204 states. [2019-12-07 20:47:24,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37204 states to 37204 states and 120245 transitions. [2019-12-07 20:47:24,564 INFO L78 Accepts]: Start accepts. Automaton has 37204 states and 120245 transitions. Word has length 16 [2019-12-07 20:47:24,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:24,564 INFO L462 AbstractCegarLoop]: Abstraction has 37204 states and 120245 transitions. [2019-12-07 20:47:24,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:47:24,565 INFO L276 IsEmpty]: Start isEmpty. Operand 37204 states and 120245 transitions. [2019-12-07 20:47:24,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 20:47:24,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:24,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:24,572 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:24,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:24,572 INFO L82 PathProgramCache]: Analyzing trace with hash -989401703, now seen corresponding path program 1 times [2019-12-07 20:47:24,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:24,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931215769] [2019-12-07 20:47:24,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:24,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:25,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:25,044 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931215769] [2019-12-07 20:47:25,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:25,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:47:25,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951123170] [2019-12-07 20:47:25,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:47:25,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:25,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:47:25,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:25,046 INFO L87 Difference]: Start difference. First operand 37204 states and 120245 transitions. Second operand 5 states. [2019-12-07 20:47:25,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:25,488 INFO L93 Difference]: Finished difference Result 47941 states and 152440 transitions. [2019-12-07 20:47:25,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:47:25,489 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 20:47:25,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:25,553 INFO L225 Difference]: With dead ends: 47941 [2019-12-07 20:47:25,553 INFO L226 Difference]: Without dead ends: 47934 [2019-12-07 20:47:25,554 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:47:25,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47934 states. [2019-12-07 20:47:26,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47934 to 36849. [2019-12-07 20:47:26,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36849 states. [2019-12-07 20:47:26,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36849 states to 36849 states and 118974 transitions. [2019-12-07 20:47:26,265 INFO L78 Accepts]: Start accepts. Automaton has 36849 states and 118974 transitions. Word has length 22 [2019-12-07 20:47:26,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:26,265 INFO L462 AbstractCegarLoop]: Abstraction has 36849 states and 118974 transitions. [2019-12-07 20:47:26,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:47:26,265 INFO L276 IsEmpty]: Start isEmpty. Operand 36849 states and 118974 transitions. [2019-12-07 20:47:26,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 20:47:26,275 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:26,275 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:26,275 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:26,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:26,275 INFO L82 PathProgramCache]: Analyzing trace with hash -2090054503, now seen corresponding path program 1 times [2019-12-07 20:47:26,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:26,276 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375370465] [2019-12-07 20:47:26,276 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:26,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:26,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:26,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375370465] [2019-12-07 20:47:26,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:26,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:47:26,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494431] [2019-12-07 20:47:26,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:47:26,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:26,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:47:26,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:26,319 INFO L87 Difference]: Start difference. First operand 36849 states and 118974 transitions. Second operand 4 states. [2019-12-07 20:47:26,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:26,366 INFO L93 Difference]: Finished difference Result 15264 states and 46609 transitions. [2019-12-07 20:47:26,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:47:26,367 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 20:47:26,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:26,384 INFO L225 Difference]: With dead ends: 15264 [2019-12-07 20:47:26,384 INFO L226 Difference]: Without dead ends: 15264 [2019-12-07 20:47:26,384 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:26,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15264 states. [2019-12-07 20:47:26,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15264 to 14936. [2019-12-07 20:47:26,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14936 states. [2019-12-07 20:47:26,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14936 states to 14936 states and 45673 transitions. [2019-12-07 20:47:26,607 INFO L78 Accepts]: Start accepts. Automaton has 14936 states and 45673 transitions. Word has length 25 [2019-12-07 20:47:26,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:26,607 INFO L462 AbstractCegarLoop]: Abstraction has 14936 states and 45673 transitions. [2019-12-07 20:47:26,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:47:26,607 INFO L276 IsEmpty]: Start isEmpty. Operand 14936 states and 45673 transitions. [2019-12-07 20:47:26,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 20:47:26,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:26,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:26,617 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:26,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:26,617 INFO L82 PathProgramCache]: Analyzing trace with hash 1906532401, now seen corresponding path program 1 times [2019-12-07 20:47:26,617 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:26,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847137149] [2019-12-07 20:47:26,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:26,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:26,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:26,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847137149] [2019-12-07 20:47:26,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:26,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:47:26,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234297812] [2019-12-07 20:47:26,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:26,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:26,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:26,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:26,643 INFO L87 Difference]: Start difference. First operand 14936 states and 45673 transitions. Second operand 3 states. [2019-12-07 20:47:26,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:26,707 INFO L93 Difference]: Finished difference Result 21267 states and 63997 transitions. [2019-12-07 20:47:26,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:26,708 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 20:47:26,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:26,730 INFO L225 Difference]: With dead ends: 21267 [2019-12-07 20:47:26,730 INFO L226 Difference]: Without dead ends: 21267 [2019-12-07 20:47:26,730 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:26,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21267 states. [2019-12-07 20:47:26,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21267 to 15790. [2019-12-07 20:47:26,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15790 states. [2019-12-07 20:47:26,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15790 states to 15790 states and 48131 transitions. [2019-12-07 20:47:26,995 INFO L78 Accepts]: Start accepts. Automaton has 15790 states and 48131 transitions. Word has length 27 [2019-12-07 20:47:26,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:26,995 INFO L462 AbstractCegarLoop]: Abstraction has 15790 states and 48131 transitions. [2019-12-07 20:47:26,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:26,996 INFO L276 IsEmpty]: Start isEmpty. Operand 15790 states and 48131 transitions. [2019-12-07 20:47:27,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 20:47:27,006 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:27,006 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:27,006 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:27,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:27,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1466938041, now seen corresponding path program 1 times [2019-12-07 20:47:27,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:27,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313338020] [2019-12-07 20:47:27,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:27,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:27,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:27,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313338020] [2019-12-07 20:47:27,074 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:27,074 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:47:27,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128211368] [2019-12-07 20:47:27,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:47:27,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:27,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:47:27,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:47:27,075 INFO L87 Difference]: Start difference. First operand 15790 states and 48131 transitions. Second operand 6 states. [2019-12-07 20:47:27,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:27,560 INFO L93 Difference]: Finished difference Result 40724 states and 122204 transitions. [2019-12-07 20:47:27,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 20:47:27,560 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 20:47:27,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:27,607 INFO L225 Difference]: With dead ends: 40724 [2019-12-07 20:47:27,608 INFO L226 Difference]: Without dead ends: 40724 [2019-12-07 20:47:27,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:47:27,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40724 states. [2019-12-07 20:47:28,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40724 to 22567. [2019-12-07 20:47:28,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22567 states. [2019-12-07 20:47:28,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22567 states to 22567 states and 69647 transitions. [2019-12-07 20:47:28,078 INFO L78 Accepts]: Start accepts. Automaton has 22567 states and 69647 transitions. Word has length 27 [2019-12-07 20:47:28,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:28,078 INFO L462 AbstractCegarLoop]: Abstraction has 22567 states and 69647 transitions. [2019-12-07 20:47:28,078 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:47:28,078 INFO L276 IsEmpty]: Start isEmpty. Operand 22567 states and 69647 transitions. [2019-12-07 20:47:28,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 20:47:28,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:28,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:28,094 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:28,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:28,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1177717026, now seen corresponding path program 1 times [2019-12-07 20:47:28,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:28,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302060131] [2019-12-07 20:47:28,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:28,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:28,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:28,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302060131] [2019-12-07 20:47:28,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:28,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:47:28,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1114532370] [2019-12-07 20:47:28,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:47:28,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:28,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:47:28,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:47:28,169 INFO L87 Difference]: Start difference. First operand 22567 states and 69647 transitions. Second operand 6 states. [2019-12-07 20:47:28,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:28,844 INFO L93 Difference]: Finished difference Result 37765 states and 113362 transitions. [2019-12-07 20:47:28,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 20:47:28,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 20:47:28,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:28,888 INFO L225 Difference]: With dead ends: 37765 [2019-12-07 20:47:28,888 INFO L226 Difference]: Without dead ends: 37765 [2019-12-07 20:47:28,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:47:29,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37765 states. [2019-12-07 20:47:29,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37765 to 22218. [2019-12-07 20:47:29,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22218 states. [2019-12-07 20:47:29,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22218 states to 22218 states and 68697 transitions. [2019-12-07 20:47:29,339 INFO L78 Accepts]: Start accepts. Automaton has 22218 states and 68697 transitions. Word has length 28 [2019-12-07 20:47:29,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:29,339 INFO L462 AbstractCegarLoop]: Abstraction has 22218 states and 68697 transitions. [2019-12-07 20:47:29,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:47:29,339 INFO L276 IsEmpty]: Start isEmpty. Operand 22218 states and 68697 transitions. [2019-12-07 20:47:29,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 20:47:29,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:29,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:29,363 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:29,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:29,363 INFO L82 PathProgramCache]: Analyzing trace with hash 1088633804, now seen corresponding path program 1 times [2019-12-07 20:47:29,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:29,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134844173] [2019-12-07 20:47:29,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:29,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:29,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:29,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134844173] [2019-12-07 20:47:29,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:29,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:47:29,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732627272] [2019-12-07 20:47:29,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:47:29,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:29,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:47:29,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:47:29,437 INFO L87 Difference]: Start difference. First operand 22218 states and 68697 transitions. Second operand 7 states. [2019-12-07 20:47:30,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:30,764 INFO L93 Difference]: Finished difference Result 50401 states and 150592 transitions. [2019-12-07 20:47:30,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 20:47:30,764 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 20:47:30,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:30,830 INFO L225 Difference]: With dead ends: 50401 [2019-12-07 20:47:30,830 INFO L226 Difference]: Without dead ends: 50401 [2019-12-07 20:47:30,831 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2019-12-07 20:47:30,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50401 states. [2019-12-07 20:47:31,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50401 to 23449. [2019-12-07 20:47:31,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23449 states. [2019-12-07 20:47:31,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23449 states to 23449 states and 72523 transitions. [2019-12-07 20:47:31,375 INFO L78 Accepts]: Start accepts. Automaton has 23449 states and 72523 transitions. Word has length 33 [2019-12-07 20:47:31,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:31,376 INFO L462 AbstractCegarLoop]: Abstraction has 23449 states and 72523 transitions. [2019-12-07 20:47:31,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:47:31,376 INFO L276 IsEmpty]: Start isEmpty. Operand 23449 states and 72523 transitions. [2019-12-07 20:47:31,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 20:47:31,398 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:31,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:31,398 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:31,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:31,399 INFO L82 PathProgramCache]: Analyzing trace with hash 1082826604, now seen corresponding path program 1 times [2019-12-07 20:47:31,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:31,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098226755] [2019-12-07 20:47:31,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:31,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:31,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:31,420 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1098226755] [2019-12-07 20:47:31,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:31,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:47:31,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216415495] [2019-12-07 20:47:31,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:31,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:31,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:31,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:31,420 INFO L87 Difference]: Start difference. First operand 23449 states and 72523 transitions. Second operand 3 states. [2019-12-07 20:47:31,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:31,507 INFO L93 Difference]: Finished difference Result 31046 states and 92713 transitions. [2019-12-07 20:47:31,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:31,508 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 33 [2019-12-07 20:47:31,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:31,545 INFO L225 Difference]: With dead ends: 31046 [2019-12-07 20:47:31,546 INFO L226 Difference]: Without dead ends: 31046 [2019-12-07 20:47:31,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:31,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31046 states. [2019-12-07 20:47:31,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31046 to 22288. [2019-12-07 20:47:31,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22288 states. [2019-12-07 20:47:31,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22288 states to 22288 states and 66690 transitions. [2019-12-07 20:47:31,921 INFO L78 Accepts]: Start accepts. Automaton has 22288 states and 66690 transitions. Word has length 33 [2019-12-07 20:47:31,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:31,921 INFO L462 AbstractCegarLoop]: Abstraction has 22288 states and 66690 transitions. [2019-12-07 20:47:31,921 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:31,921 INFO L276 IsEmpty]: Start isEmpty. Operand 22288 states and 66690 transitions. [2019-12-07 20:47:31,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 20:47:31,937 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:31,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:31,937 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:31,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:31,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1090977820, now seen corresponding path program 2 times [2019-12-07 20:47:31,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:31,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [662961155] [2019-12-07 20:47:31,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:31,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:32,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:32,084 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [662961155] [2019-12-07 20:47:32,084 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:32,084 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:47:32,084 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1408342194] [2019-12-07 20:47:32,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 20:47:32,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:32,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 20:47:32,085 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:47:32,085 INFO L87 Difference]: Start difference. First operand 22288 states and 66690 transitions. Second operand 9 states. [2019-12-07 20:47:34,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:34,653 INFO L93 Difference]: Finished difference Result 51139 states and 149852 transitions. [2019-12-07 20:47:34,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 20:47:34,654 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2019-12-07 20:47:34,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:34,731 INFO L225 Difference]: With dead ends: 51139 [2019-12-07 20:47:34,731 INFO L226 Difference]: Without dead ends: 51139 [2019-12-07 20:47:34,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=198, Invalid=614, Unknown=0, NotChecked=0, Total=812 [2019-12-07 20:47:34,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51139 states. [2019-12-07 20:47:35,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51139 to 21685. [2019-12-07 20:47:35,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21685 states. [2019-12-07 20:47:35,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21685 states to 21685 states and 64891 transitions. [2019-12-07 20:47:35,254 INFO L78 Accepts]: Start accepts. Automaton has 21685 states and 64891 transitions. Word has length 33 [2019-12-07 20:47:35,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:35,255 INFO L462 AbstractCegarLoop]: Abstraction has 21685 states and 64891 transitions. [2019-12-07 20:47:35,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 20:47:35,255 INFO L276 IsEmpty]: Start isEmpty. Operand 21685 states and 64891 transitions. [2019-12-07 20:47:35,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 20:47:35,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:35,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:35,272 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:35,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:35,272 INFO L82 PathProgramCache]: Analyzing trace with hash 791261483, now seen corresponding path program 1 times [2019-12-07 20:47:35,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:35,272 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [924685865] [2019-12-07 20:47:35,272 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:35,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:35,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:35,356 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [924685865] [2019-12-07 20:47:35,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:35,356 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:47:35,356 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555776811] [2019-12-07 20:47:35,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:47:35,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:35,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:47:35,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:47:35,357 INFO L87 Difference]: Start difference. First operand 21685 states and 64891 transitions. Second operand 7 states. [2019-12-07 20:47:36,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:36,199 INFO L93 Difference]: Finished difference Result 37994 states and 111619 transitions. [2019-12-07 20:47:36,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 20:47:36,199 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 20:47:36,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:36,243 INFO L225 Difference]: With dead ends: 37994 [2019-12-07 20:47:36,243 INFO L226 Difference]: Without dead ends: 37994 [2019-12-07 20:47:36,243 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 20:47:36,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37994 states. [2019-12-07 20:47:36,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37994 to 20324. [2019-12-07 20:47:36,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20324 states. [2019-12-07 20:47:36,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20324 states to 20324 states and 60908 transitions. [2019-12-07 20:47:36,676 INFO L78 Accepts]: Start accepts. Automaton has 20324 states and 60908 transitions. Word has length 34 [2019-12-07 20:47:36,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:36,676 INFO L462 AbstractCegarLoop]: Abstraction has 20324 states and 60908 transitions. [2019-12-07 20:47:36,676 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:47:36,676 INFO L276 IsEmpty]: Start isEmpty. Operand 20324 states and 60908 transitions. [2019-12-07 20:47:36,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 20:47:36,691 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:36,691 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:36,692 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:36,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:36,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1244987983, now seen corresponding path program 2 times [2019-12-07 20:47:36,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:36,692 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324588200] [2019-12-07 20:47:36,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:36,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:36,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:36,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324588200] [2019-12-07 20:47:36,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:36,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:47:36,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [4208077] [2019-12-07 20:47:36,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:47:36,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:36,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:47:36,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:36,758 INFO L87 Difference]: Start difference. First operand 20324 states and 60908 transitions. Second operand 5 states. [2019-12-07 20:47:36,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:36,832 INFO L93 Difference]: Finished difference Result 20751 states and 62011 transitions. [2019-12-07 20:47:36,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:47:36,832 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 20:47:36,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:36,855 INFO L225 Difference]: With dead ends: 20751 [2019-12-07 20:47:36,855 INFO L226 Difference]: Without dead ends: 20751 [2019-12-07 20:47:36,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:36,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20751 states. [2019-12-07 20:47:37,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20751 to 20751. [2019-12-07 20:47:37,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20751 states. [2019-12-07 20:47:37,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20751 states to 20751 states and 62011 transitions. [2019-12-07 20:47:37,146 INFO L78 Accepts]: Start accepts. Automaton has 20751 states and 62011 transitions. Word has length 34 [2019-12-07 20:47:37,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:37,146 INFO L462 AbstractCegarLoop]: Abstraction has 20751 states and 62011 transitions. [2019-12-07 20:47:37,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:47:37,146 INFO L276 IsEmpty]: Start isEmpty. Operand 20751 states and 62011 transitions. [2019-12-07 20:47:37,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 20:47:37,162 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:37,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:37,162 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:37,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:37,162 INFO L82 PathProgramCache]: Analyzing trace with hash -1641645214, now seen corresponding path program 1 times [2019-12-07 20:47:37,163 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:37,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284041195] [2019-12-07 20:47:37,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:37,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:37,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:37,235 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284041195] [2019-12-07 20:47:37,235 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:37,235 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:47:37,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592245450] [2019-12-07 20:47:37,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:47:37,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:37,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:47:37,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:47:37,236 INFO L87 Difference]: Start difference. First operand 20751 states and 62011 transitions. Second operand 7 states. [2019-12-07 20:47:37,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:37,988 INFO L93 Difference]: Finished difference Result 46732 states and 134807 transitions. [2019-12-07 20:47:37,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 20:47:37,988 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-07 20:47:37,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:38,038 INFO L225 Difference]: With dead ends: 46732 [2019-12-07 20:47:38,038 INFO L226 Difference]: Without dead ends: 46732 [2019-12-07 20:47:38,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 20:47:38,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46732 states. [2019-12-07 20:47:38,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46732 to 20164. [2019-12-07 20:47:38,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20164 states. [2019-12-07 20:47:38,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20164 states to 20164 states and 60276 transitions. [2019-12-07 20:47:38,513 INFO L78 Accepts]: Start accepts. Automaton has 20164 states and 60276 transitions. Word has length 35 [2019-12-07 20:47:38,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:38,514 INFO L462 AbstractCegarLoop]: Abstraction has 20164 states and 60276 transitions. [2019-12-07 20:47:38,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:47:38,514 INFO L276 IsEmpty]: Start isEmpty. Operand 20164 states and 60276 transitions. [2019-12-07 20:47:38,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 20:47:38,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:38,528 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:38,528 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:38,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:38,528 INFO L82 PathProgramCache]: Analyzing trace with hash 1975616128, now seen corresponding path program 2 times [2019-12-07 20:47:38,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:38,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12358413] [2019-12-07 20:47:38,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:38,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:38,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:38,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12358413] [2019-12-07 20:47:38,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:38,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:47:38,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111336038] [2019-12-07 20:47:38,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 20:47:38,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:38,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 20:47:38,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:47:38,624 INFO L87 Difference]: Start difference. First operand 20164 states and 60276 transitions. Second operand 9 states. [2019-12-07 20:47:40,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:40,363 INFO L93 Difference]: Finished difference Result 41366 states and 120395 transitions. [2019-12-07 20:47:40,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 20:47:40,363 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 35 [2019-12-07 20:47:40,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:40,406 INFO L225 Difference]: With dead ends: 41366 [2019-12-07 20:47:40,406 INFO L226 Difference]: Without dead ends: 41366 [2019-12-07 20:47:40,406 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=377, Unknown=0, NotChecked=0, Total=506 [2019-12-07 20:47:40,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41366 states. [2019-12-07 20:47:40,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41366 to 19840. [2019-12-07 20:47:40,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19840 states. [2019-12-07 20:47:40,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19840 states to 19840 states and 59352 transitions. [2019-12-07 20:47:40,833 INFO L78 Accepts]: Start accepts. Automaton has 19840 states and 59352 transitions. Word has length 35 [2019-12-07 20:47:40,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:40,833 INFO L462 AbstractCegarLoop]: Abstraction has 19840 states and 59352 transitions. [2019-12-07 20:47:40,833 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 20:47:40,833 INFO L276 IsEmpty]: Start isEmpty. Operand 19840 states and 59352 transitions. [2019-12-07 20:47:40,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 20:47:40,849 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:40,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:40,849 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:40,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:40,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1420266152, now seen corresponding path program 1 times [2019-12-07 20:47:40,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:40,850 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860439009] [2019-12-07 20:47:40,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:40,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:40,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:40,900 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860439009] [2019-12-07 20:47:40,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:40,900 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:47:40,900 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [962991549] [2019-12-07 20:47:40,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:47:40,900 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:40,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:47:40,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:40,901 INFO L87 Difference]: Start difference. First operand 19840 states and 59352 transitions. Second operand 5 states. [2019-12-07 20:47:41,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:41,299 INFO L93 Difference]: Finished difference Result 28405 states and 84071 transitions. [2019-12-07 20:47:41,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 20:47:41,299 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2019-12-07 20:47:41,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:41,331 INFO L225 Difference]: With dead ends: 28405 [2019-12-07 20:47:41,331 INFO L226 Difference]: Without dead ends: 28405 [2019-12-07 20:47:41,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:47:41,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28405 states. [2019-12-07 20:47:41,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28405 to 26056. [2019-12-07 20:47:41,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26056 states. [2019-12-07 20:47:41,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26056 states to 26056 states and 77683 transitions. [2019-12-07 20:47:41,727 INFO L78 Accepts]: Start accepts. Automaton has 26056 states and 77683 transitions. Word has length 39 [2019-12-07 20:47:41,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:41,727 INFO L462 AbstractCegarLoop]: Abstraction has 26056 states and 77683 transitions. [2019-12-07 20:47:41,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:47:41,727 INFO L276 IsEmpty]: Start isEmpty. Operand 26056 states and 77683 transitions. [2019-12-07 20:47:41,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 20:47:41,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:41,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:41,748 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:41,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:41,749 INFO L82 PathProgramCache]: Analyzing trace with hash 1017444534, now seen corresponding path program 2 times [2019-12-07 20:47:41,749 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:41,749 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232979650] [2019-12-07 20:47:41,749 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:41,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:41,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:41,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232979650] [2019-12-07 20:47:41,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:41,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:41,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272393077] [2019-12-07 20:47:41,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:41,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:41,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:41,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:41,796 INFO L87 Difference]: Start difference. First operand 26056 states and 77683 transitions. Second operand 3 states. [2019-12-07 20:47:41,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:41,869 INFO L93 Difference]: Finished difference Result 26056 states and 77603 transitions. [2019-12-07 20:47:41,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:41,869 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 20:47:41,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:41,899 INFO L225 Difference]: With dead ends: 26056 [2019-12-07 20:47:41,899 INFO L226 Difference]: Without dead ends: 26056 [2019-12-07 20:47:41,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:41,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26056 states. [2019-12-07 20:47:42,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26056 to 21658. [2019-12-07 20:47:42,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21658 states. [2019-12-07 20:47:42,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21658 states to 21658 states and 65280 transitions. [2019-12-07 20:47:42,248 INFO L78 Accepts]: Start accepts. Automaton has 21658 states and 65280 transitions. Word has length 39 [2019-12-07 20:47:42,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:42,248 INFO L462 AbstractCegarLoop]: Abstraction has 21658 states and 65280 transitions. [2019-12-07 20:47:42,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:42,248 INFO L276 IsEmpty]: Start isEmpty. Operand 21658 states and 65280 transitions. [2019-12-07 20:47:42,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 20:47:42,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:42,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:42,268 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:42,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:42,268 INFO L82 PathProgramCache]: Analyzing trace with hash 1319830042, now seen corresponding path program 1 times [2019-12-07 20:47:42,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:42,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1906781516] [2019-12-07 20:47:42,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:42,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:42,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:42,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1906781516] [2019-12-07 20:47:42,302 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:42,302 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:42,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601305316] [2019-12-07 20:47:42,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:47:42,302 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:42,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:47:42,303 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:42,303 INFO L87 Difference]: Start difference. First operand 21658 states and 65280 transitions. Second operand 3 states. [2019-12-07 20:47:42,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:42,366 INFO L93 Difference]: Finished difference Result 20456 states and 60719 transitions. [2019-12-07 20:47:42,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:47:42,367 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 20:47:42,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:42,390 INFO L225 Difference]: With dead ends: 20456 [2019-12-07 20:47:42,390 INFO L226 Difference]: Without dead ends: 20456 [2019-12-07 20:47:42,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:47:42,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20456 states. [2019-12-07 20:47:42,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20456 to 19982. [2019-12-07 20:47:42,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19982 states. [2019-12-07 20:47:42,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19982 states to 19982 states and 59377 transitions. [2019-12-07 20:47:42,666 INFO L78 Accepts]: Start accepts. Automaton has 19982 states and 59377 transitions. Word has length 40 [2019-12-07 20:47:42,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:42,666 INFO L462 AbstractCegarLoop]: Abstraction has 19982 states and 59377 transitions. [2019-12-07 20:47:42,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:47:42,667 INFO L276 IsEmpty]: Start isEmpty. Operand 19982 states and 59377 transitions. [2019-12-07 20:47:42,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 20:47:42,683 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:42,683 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:42,683 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:42,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:42,683 INFO L82 PathProgramCache]: Analyzing trace with hash 2120844099, now seen corresponding path program 1 times [2019-12-07 20:47:42,683 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:42,684 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142558780] [2019-12-07 20:47:42,684 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:42,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:42,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:42,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142558780] [2019-12-07 20:47:42,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:42,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:47:42,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445233227] [2019-12-07 20:47:42,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:47:42,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:42,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:47:42,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:42,736 INFO L87 Difference]: Start difference. First operand 19982 states and 59377 transitions. Second operand 4 states. [2019-12-07 20:47:42,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:42,835 INFO L93 Difference]: Finished difference Result 37417 states and 111349 transitions. [2019-12-07 20:47:42,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:47:42,835 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 41 [2019-12-07 20:47:42,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:42,875 INFO L225 Difference]: With dead ends: 37417 [2019-12-07 20:47:42,875 INFO L226 Difference]: Without dead ends: 32935 [2019-12-07 20:47:42,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:47:42,985 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32935 states. [2019-12-07 20:47:43,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32935 to 31066. [2019-12-07 20:47:43,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31066 states. [2019-12-07 20:47:43,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31066 states to 31066 states and 91787 transitions. [2019-12-07 20:47:43,328 INFO L78 Accepts]: Start accepts. Automaton has 31066 states and 91787 transitions. Word has length 41 [2019-12-07 20:47:43,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:43,328 INFO L462 AbstractCegarLoop]: Abstraction has 31066 states and 91787 transitions. [2019-12-07 20:47:43,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:47:43,328 INFO L276 IsEmpty]: Start isEmpty. Operand 31066 states and 91787 transitions. [2019-12-07 20:47:43,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 20:47:43,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:43,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:43,358 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:43,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:43,358 INFO L82 PathProgramCache]: Analyzing trace with hash 884175412, now seen corresponding path program 1 times [2019-12-07 20:47:43,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:43,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896779189] [2019-12-07 20:47:43,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:43,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:43,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:43,398 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896779189] [2019-12-07 20:47:43,398 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:43,398 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:47:43,398 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400974878] [2019-12-07 20:47:43,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:47:43,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:43,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:47:43,399 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:43,399 INFO L87 Difference]: Start difference. First operand 31066 states and 91787 transitions. Second operand 5 states. [2019-12-07 20:47:43,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:43,481 INFO L93 Difference]: Finished difference Result 29143 states and 87630 transitions. [2019-12-07 20:47:43,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:47:43,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 20:47:43,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:43,567 INFO L225 Difference]: With dead ends: 29143 [2019-12-07 20:47:43,568 INFO L226 Difference]: Without dead ends: 28277 [2019-12-07 20:47:43,568 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:47:43,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28277 states. [2019-12-07 20:47:43,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28277 to 17755. [2019-12-07 20:47:43,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17755 states. [2019-12-07 20:47:43,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17755 states to 17755 states and 53546 transitions. [2019-12-07 20:47:43,866 INFO L78 Accepts]: Start accepts. Automaton has 17755 states and 53546 transitions. Word has length 42 [2019-12-07 20:47:43,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:43,866 INFO L462 AbstractCegarLoop]: Abstraction has 17755 states and 53546 transitions. [2019-12-07 20:47:43,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:47:43,866 INFO L276 IsEmpty]: Start isEmpty. Operand 17755 states and 53546 transitions. [2019-12-07 20:47:43,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:47:43,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:43,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:43,882 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:43,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:43,882 INFO L82 PathProgramCache]: Analyzing trace with hash 168578630, now seen corresponding path program 1 times [2019-12-07 20:47:43,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:43,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041915254] [2019-12-07 20:47:43,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:43,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:43,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:43,946 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041915254] [2019-12-07 20:47:43,946 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:43,946 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:47:43,946 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560308067] [2019-12-07 20:47:43,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:47:43,946 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:43,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:47:43,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:47:43,946 INFO L87 Difference]: Start difference. First operand 17755 states and 53546 transitions. Second operand 7 states. [2019-12-07 20:47:45,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:45,520 INFO L93 Difference]: Finished difference Result 33132 states and 98502 transitions. [2019-12-07 20:47:45,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 20:47:45,520 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 20:47:45,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:45,556 INFO L225 Difference]: With dead ends: 33132 [2019-12-07 20:47:45,556 INFO L226 Difference]: Without dead ends: 33132 [2019-12-07 20:47:45,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 20:47:45,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33132 states. [2019-12-07 20:47:45,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33132 to 18375. [2019-12-07 20:47:45,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18375 states. [2019-12-07 20:47:45,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18375 states to 18375 states and 55471 transitions. [2019-12-07 20:47:45,957 INFO L78 Accepts]: Start accepts. Automaton has 18375 states and 55471 transitions. Word has length 66 [2019-12-07 20:47:45,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:45,957 INFO L462 AbstractCegarLoop]: Abstraction has 18375 states and 55471 transitions. [2019-12-07 20:47:45,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:47:45,957 INFO L276 IsEmpty]: Start isEmpty. Operand 18375 states and 55471 transitions. [2019-12-07 20:47:45,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:47:45,973 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:45,973 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:45,973 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:45,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:45,974 INFO L82 PathProgramCache]: Analyzing trace with hash 712249250, now seen corresponding path program 2 times [2019-12-07 20:47:45,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:45,974 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119999618] [2019-12-07 20:47:45,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:45,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:46,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:46,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119999618] [2019-12-07 20:47:46,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:46,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 20:47:46,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029463464] [2019-12-07 20:47:46,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 20:47:46,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:46,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 20:47:46,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 20:47:46,055 INFO L87 Difference]: Start difference. First operand 18375 states and 55471 transitions. Second operand 8 states. [2019-12-07 20:47:48,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:48,666 INFO L93 Difference]: Finished difference Result 38013 states and 112632 transitions. [2019-12-07 20:47:48,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 20:47:48,666 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 20:47:48,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:48,707 INFO L225 Difference]: With dead ends: 38013 [2019-12-07 20:47:48,707 INFO L226 Difference]: Without dead ends: 38013 [2019-12-07 20:47:48,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 12 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 334 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=255, Invalid=1005, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 20:47:48,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38013 states. [2019-12-07 20:47:49,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38013 to 18848. [2019-12-07 20:47:49,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18848 states. [2019-12-07 20:47:49,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18848 states to 18848 states and 56884 transitions. [2019-12-07 20:47:49,153 INFO L78 Accepts]: Start accepts. Automaton has 18848 states and 56884 transitions. Word has length 66 [2019-12-07 20:47:49,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:49,153 INFO L462 AbstractCegarLoop]: Abstraction has 18848 states and 56884 transitions. [2019-12-07 20:47:49,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 20:47:49,153 INFO L276 IsEmpty]: Start isEmpty. Operand 18848 states and 56884 transitions. [2019-12-07 20:47:49,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:47:49,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:49,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:49,170 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:49,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:49,170 INFO L82 PathProgramCache]: Analyzing trace with hash 257156348, now seen corresponding path program 3 times [2019-12-07 20:47:49,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:49,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229978683] [2019-12-07 20:47:49,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:49,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:49,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:49,251 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229978683] [2019-12-07 20:47:49,251 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:49,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 20:47:49,251 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1521663642] [2019-12-07 20:47:49,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 20:47:49,252 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:49,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 20:47:49,252 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:47:49,252 INFO L87 Difference]: Start difference. First operand 18848 states and 56884 transitions. Second operand 9 states. [2019-12-07 20:47:55,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:55,747 INFO L93 Difference]: Finished difference Result 42576 states and 125519 transitions. [2019-12-07 20:47:55,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 20:47:55,747 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 20:47:55,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:55,792 INFO L225 Difference]: With dead ends: 42576 [2019-12-07 20:47:55,792 INFO L226 Difference]: Without dead ends: 42576 [2019-12-07 20:47:55,793 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 15 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 832 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=481, Invalid=2069, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 20:47:55,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42576 states. [2019-12-07 20:47:56,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42576 to 18532. [2019-12-07 20:47:56,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18532 states. [2019-12-07 20:47:56,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18532 states to 18532 states and 55893 transitions. [2019-12-07 20:47:56,313 INFO L78 Accepts]: Start accepts. Automaton has 18532 states and 55893 transitions. Word has length 66 [2019-12-07 20:47:56,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:56,313 INFO L462 AbstractCegarLoop]: Abstraction has 18532 states and 55893 transitions. [2019-12-07 20:47:56,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 20:47:56,314 INFO L276 IsEmpty]: Start isEmpty. Operand 18532 states and 55893 transitions. [2019-12-07 20:47:56,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:47:56,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:56,336 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:56,336 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:56,336 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:56,336 INFO L82 PathProgramCache]: Analyzing trace with hash 1254491896, now seen corresponding path program 4 times [2019-12-07 20:47:56,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:56,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180685834] [2019-12-07 20:47:56,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:56,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:56,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:56,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180685834] [2019-12-07 20:47:56,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:56,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 20:47:56,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138990215] [2019-12-07 20:47:56,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:47:56,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:56,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:47:56,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:47:56,438 INFO L87 Difference]: Start difference. First operand 18532 states and 55893 transitions. Second operand 7 states. [2019-12-07 20:47:56,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:47:56,912 INFO L93 Difference]: Finished difference Result 74699 states and 222991 transitions. [2019-12-07 20:47:56,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 20:47:56,913 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 20:47:56,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:47:56,981 INFO L225 Difference]: With dead ends: 74699 [2019-12-07 20:47:56,981 INFO L226 Difference]: Without dead ends: 53579 [2019-12-07 20:47:56,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 20:47:57,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53579 states. [2019-12-07 20:47:57,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53579 to 21714. [2019-12-07 20:47:57,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21714 states. [2019-12-07 20:47:57,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21714 states to 21714 states and 64848 transitions. [2019-12-07 20:47:57,523 INFO L78 Accepts]: Start accepts. Automaton has 21714 states and 64848 transitions. Word has length 66 [2019-12-07 20:47:57,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:47:57,523 INFO L462 AbstractCegarLoop]: Abstraction has 21714 states and 64848 transitions. [2019-12-07 20:47:57,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:47:57,523 INFO L276 IsEmpty]: Start isEmpty. Operand 21714 states and 64848 transitions. [2019-12-07 20:47:57,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:47:57,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:47:57,544 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:47:57,544 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:47:57,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:47:57,544 INFO L82 PathProgramCache]: Analyzing trace with hash 508796180, now seen corresponding path program 5 times [2019-12-07 20:47:57,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:47:57,544 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549461909] [2019-12-07 20:47:57,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:47:57,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:47:57,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:47:57,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549461909] [2019-12-07 20:47:57,864 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:47:57,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:47:57,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766220309] [2019-12-07 20:47:57,865 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:47:57,865 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:47:57,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:47:57,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:47:57,865 INFO L87 Difference]: Start difference. First operand 21714 states and 64848 transitions. Second operand 17 states. [2019-12-07 20:48:12,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:48:12,536 INFO L93 Difference]: Finished difference Result 98574 states and 300932 transitions. [2019-12-07 20:48:12,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 188 states. [2019-12-07 20:48:12,538 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 20:48:12,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:48:12,672 INFO L225 Difference]: With dead ends: 98574 [2019-12-07 20:48:12,672 INFO L226 Difference]: Without dead ends: 96457 [2019-12-07 20:48:12,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15927 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=4490, Invalid=31800, Unknown=0, NotChecked=0, Total=36290 [2019-12-07 20:48:12,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96457 states. [2019-12-07 20:48:13,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96457 to 25023. [2019-12-07 20:48:13,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25023 states. [2019-12-07 20:48:13,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25023 states to 25023 states and 75159 transitions. [2019-12-07 20:48:13,554 INFO L78 Accepts]: Start accepts. Automaton has 25023 states and 75159 transitions. Word has length 66 [2019-12-07 20:48:13,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:48:13,554 INFO L462 AbstractCegarLoop]: Abstraction has 25023 states and 75159 transitions. [2019-12-07 20:48:13,554 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:48:13,554 INFO L276 IsEmpty]: Start isEmpty. Operand 25023 states and 75159 transitions. [2019-12-07 20:48:13,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:48:13,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:48:13,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:48:13,580 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:48:13,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:48:13,580 INFO L82 PathProgramCache]: Analyzing trace with hash 56544828, now seen corresponding path program 6 times [2019-12-07 20:48:13,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:48:13,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [165160321] [2019-12-07 20:48:13,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:48:13,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:48:13,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:48:13,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [165160321] [2019-12-07 20:48:13,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:48:13,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:48:13,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326634529] [2019-12-07 20:48:13,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:48:13,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:48:13,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:48:13,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=234, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:48:13,885 INFO L87 Difference]: Start difference. First operand 25023 states and 75159 transitions. Second operand 17 states. [2019-12-07 20:48:14,491 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 27 [2019-12-07 20:48:15,885 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 32 DAG size of output: 31 [2019-12-07 20:48:16,111 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 20:48:19,501 WARN L192 SmtUtils]: Spent 177.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 33 [2019-12-07 20:48:19,693 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 22 DAG size of output: 21 [2019-12-07 20:48:20,660 WARN L192 SmtUtils]: Spent 213.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 38 [2019-12-07 20:48:20,883 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-12-07 20:48:21,081 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 35 DAG size of output: 34 [2019-12-07 20:48:22,374 WARN L192 SmtUtils]: Spent 242.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 38 [2019-12-07 20:48:22,777 WARN L192 SmtUtils]: Spent 312.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 42 [2019-12-07 20:48:23,039 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 20:48:23,549 WARN L192 SmtUtils]: Spent 162.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 20:48:24,161 WARN L192 SmtUtils]: Spent 210.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2019-12-07 20:48:24,523 WARN L192 SmtUtils]: Spent 277.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-07 20:48:31,084 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 20:48:31,777 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification that was a NOOP. DAG size: 34 [2019-12-07 20:48:32,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:48:32,793 INFO L93 Difference]: Finished difference Result 100852 states and 308006 transitions. [2019-12-07 20:48:32,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 191 states. [2019-12-07 20:48:32,794 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 20:48:32,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:48:32,943 INFO L225 Difference]: With dead ends: 100852 [2019-12-07 20:48:32,943 INFO L226 Difference]: Without dead ends: 100743 [2019-12-07 20:48:32,952 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16495 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=4725, Invalid=32717, Unknown=0, NotChecked=0, Total=37442 [2019-12-07 20:48:33,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100743 states. [2019-12-07 20:48:33,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100743 to 24814. [2019-12-07 20:48:33,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24814 states. [2019-12-07 20:48:33,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24814 states to 24814 states and 74508 transitions. [2019-12-07 20:48:33,880 INFO L78 Accepts]: Start accepts. Automaton has 24814 states and 74508 transitions. Word has length 66 [2019-12-07 20:48:33,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:48:33,880 INFO L462 AbstractCegarLoop]: Abstraction has 24814 states and 74508 transitions. [2019-12-07 20:48:33,880 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:48:33,880 INFO L276 IsEmpty]: Start isEmpty. Operand 24814 states and 74508 transitions. [2019-12-07 20:48:33,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:48:33,905 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:48:33,905 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:48:33,906 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:48:33,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:48:33,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1708550028, now seen corresponding path program 7 times [2019-12-07 20:48:33,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:48:33,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212029156] [2019-12-07 20:48:33,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:48:33,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:48:34,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:48:34,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212029156] [2019-12-07 20:48:34,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:48:34,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:48:34,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2143277720] [2019-12-07 20:48:34,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:48:34,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:48:34,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:48:34,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:48:34,203 INFO L87 Difference]: Start difference. First operand 24814 states and 74508 transitions. Second operand 17 states. [2019-12-07 20:48:43,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:48:43,215 INFO L93 Difference]: Finished difference Result 91661 states and 277828 transitions. [2019-12-07 20:48:43,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 191 states. [2019-12-07 20:48:43,215 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 20:48:43,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:48:43,334 INFO L225 Difference]: With dead ends: 91661 [2019-12-07 20:48:43,335 INFO L226 Difference]: Without dead ends: 91265 [2019-12-07 20:48:43,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16503 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=4538, Invalid=32904, Unknown=0, NotChecked=0, Total=37442 [2019-12-07 20:48:43,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91265 states. [2019-12-07 20:48:44,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91265 to 24185. [2019-12-07 20:48:44,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24185 states. [2019-12-07 20:48:44,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24185 states to 24185 states and 72580 transitions. [2019-12-07 20:48:44,178 INFO L78 Accepts]: Start accepts. Automaton has 24185 states and 72580 transitions. Word has length 66 [2019-12-07 20:48:44,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:48:44,178 INFO L462 AbstractCegarLoop]: Abstraction has 24185 states and 72580 transitions. [2019-12-07 20:48:44,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:48:44,178 INFO L276 IsEmpty]: Start isEmpty. Operand 24185 states and 72580 transitions. [2019-12-07 20:48:44,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:48:44,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:48:44,199 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:48:44,199 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:48:44,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:48:44,199 INFO L82 PathProgramCache]: Analyzing trace with hash 1490086356, now seen corresponding path program 8 times [2019-12-07 20:48:44,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:48:44,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1251906557] [2019-12-07 20:48:44,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:48:44,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:48:44,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:48:44,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1251906557] [2019-12-07 20:48:44,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:48:44,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:48:44,515 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [988942136] [2019-12-07 20:48:44,515 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:48:44,515 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:48:44,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:48:44,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:48:44,516 INFO L87 Difference]: Start difference. First operand 24185 states and 72580 transitions. Second operand 17 states. [2019-12-07 20:48:55,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:48:55,780 INFO L93 Difference]: Finished difference Result 88983 states and 271679 transitions. [2019-12-07 20:48:55,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 181 states. [2019-12-07 20:48:55,781 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 66 [2019-12-07 20:48:55,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:48:55,897 INFO L225 Difference]: With dead ends: 88983 [2019-12-07 20:48:55,897 INFO L226 Difference]: Without dead ends: 88304 [2019-12-07 20:48:55,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 183 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14995 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=4482, Invalid=29558, Unknown=0, NotChecked=0, Total=34040 [2019-12-07 20:48:56,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88304 states. [2019-12-07 20:48:56,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88304 to 24475. [2019-12-07 20:48:56,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24475 states. [2019-12-07 20:48:56,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24475 states to 24475 states and 73499 transitions. [2019-12-07 20:48:56,726 INFO L78 Accepts]: Start accepts. Automaton has 24475 states and 73499 transitions. Word has length 66 [2019-12-07 20:48:56,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:48:56,726 INFO L462 AbstractCegarLoop]: Abstraction has 24475 states and 73499 transitions. [2019-12-07 20:48:56,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:48:56,727 INFO L276 IsEmpty]: Start isEmpty. Operand 24475 states and 73499 transitions. [2019-12-07 20:48:56,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:48:56,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:48:56,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:48:56,748 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:48:56,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:48:56,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1601039282, now seen corresponding path program 9 times [2019-12-07 20:48:56,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:48:56,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539696780] [2019-12-07 20:48:56,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:48:56,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:48:56,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:48:56,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539696780] [2019-12-07 20:48:56,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:48:56,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:48:56,802 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712453093] [2019-12-07 20:48:56,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:48:56,802 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:48:56,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:48:56,802 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:48:56,803 INFO L87 Difference]: Start difference. First operand 24475 states and 73499 transitions. Second operand 4 states. [2019-12-07 20:48:56,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:48:56,941 INFO L93 Difference]: Finished difference Result 59289 states and 177814 transitions. [2019-12-07 20:48:56,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:48:56,941 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 20:48:56,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:48:56,991 INFO L225 Difference]: With dead ends: 59289 [2019-12-07 20:48:56,991 INFO L226 Difference]: Without dead ends: 36203 [2019-12-07 20:48:56,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:48:57,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36203 states. [2019-12-07 20:48:57,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36203 to 23082. [2019-12-07 20:48:57,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23082 states. [2019-12-07 20:48:57,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23082 states to 23082 states and 69263 transitions. [2019-12-07 20:48:57,416 INFO L78 Accepts]: Start accepts. Automaton has 23082 states and 69263 transitions. Word has length 66 [2019-12-07 20:48:57,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:48:57,416 INFO L462 AbstractCegarLoop]: Abstraction has 23082 states and 69263 transitions. [2019-12-07 20:48:57,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:48:57,416 INFO L276 IsEmpty]: Start isEmpty. Operand 23082 states and 69263 transitions. [2019-12-07 20:48:57,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:48:57,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:48:57,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:48:57,436 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:48:57,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:48:57,437 INFO L82 PathProgramCache]: Analyzing trace with hash -178270044, now seen corresponding path program 10 times [2019-12-07 20:48:57,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:48:57,437 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309140713] [2019-12-07 20:48:57,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:48:57,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:48:57,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:48:57,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309140713] [2019-12-07 20:48:57,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:48:57,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 20:48:57,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1157830896] [2019-12-07 20:48:57,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:48:57,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:48:57,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:48:57,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:48:57,724 INFO L87 Difference]: Start difference. First operand 23082 states and 69263 transitions. Second operand 15 states. [2019-12-07 20:49:07,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:07,857 INFO L93 Difference]: Finished difference Result 81412 states and 243652 transitions. [2019-12-07 20:49:07,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2019-12-07 20:49:07,858 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 20:49:07,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:07,954 INFO L225 Difference]: With dead ends: 81412 [2019-12-07 20:49:07,954 INFO L226 Difference]: Without dead ends: 77372 [2019-12-07 20:49:07,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4418 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1706, Invalid=10066, Unknown=0, NotChecked=0, Total=11772 [2019-12-07 20:49:08,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77372 states. [2019-12-07 20:49:08,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77372 to 29300. [2019-12-07 20:49:08,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29300 states. [2019-12-07 20:49:08,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29300 states to 29300 states and 87782 transitions. [2019-12-07 20:49:08,750 INFO L78 Accepts]: Start accepts. Automaton has 29300 states and 87782 transitions. Word has length 66 [2019-12-07 20:49:08,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:08,750 INFO L462 AbstractCegarLoop]: Abstraction has 29300 states and 87782 transitions. [2019-12-07 20:49:08,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:49:08,750 INFO L276 IsEmpty]: Start isEmpty. Operand 29300 states and 87782 transitions. [2019-12-07 20:49:08,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:49:08,779 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:08,779 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:08,780 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:08,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:08,780 INFO L82 PathProgramCache]: Analyzing trace with hash 1899351044, now seen corresponding path program 11 times [2019-12-07 20:49:08,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:08,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041990691] [2019-12-07 20:49:08,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:08,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:49:09,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:49:09,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041990691] [2019-12-07 20:49:09,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:49:09,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 20:49:09,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1281031987] [2019-12-07 20:49:09,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:49:09,034 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:49:09,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:49:09,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:49:09,034 INFO L87 Difference]: Start difference. First operand 29300 states and 87782 transitions. Second operand 15 states. [2019-12-07 20:49:21,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:21,519 INFO L93 Difference]: Finished difference Result 76042 states and 224473 transitions. [2019-12-07 20:49:21,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 105 states. [2019-12-07 20:49:21,520 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 20:49:21,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:21,603 INFO L225 Difference]: With dead ends: 76042 [2019-12-07 20:49:21,603 INFO L226 Difference]: Without dead ends: 55188 [2019-12-07 20:49:21,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4526 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=1759, Invalid=10231, Unknown=0, NotChecked=0, Total=11990 [2019-12-07 20:49:21,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55188 states. [2019-12-07 20:49:22,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55188 to 22933. [2019-12-07 20:49:22,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22933 states. [2019-12-07 20:49:22,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22933 states to 22933 states and 68298 transitions. [2019-12-07 20:49:22,179 INFO L78 Accepts]: Start accepts. Automaton has 22933 states and 68298 transitions. Word has length 66 [2019-12-07 20:49:22,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:22,179 INFO L462 AbstractCegarLoop]: Abstraction has 22933 states and 68298 transitions. [2019-12-07 20:49:22,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:49:22,179 INFO L276 IsEmpty]: Start isEmpty. Operand 22933 states and 68298 transitions. [2019-12-07 20:49:22,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:49:22,200 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:22,200 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:22,200 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:22,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:22,200 INFO L82 PathProgramCache]: Analyzing trace with hash -1109171142, now seen corresponding path program 12 times [2019-12-07 20:49:22,201 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:22,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435883750] [2019-12-07 20:49:22,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:22,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:49:22,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:49:22,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435883750] [2019-12-07 20:49:22,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:49:22,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 20:49:22,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653373843] [2019-12-07 20:49:22,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 20:49:22,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:49:22,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 20:49:22,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:49:22,352 INFO L87 Difference]: Start difference. First operand 22933 states and 68298 transitions. Second operand 11 states. [2019-12-07 20:49:24,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:24,324 INFO L93 Difference]: Finished difference Result 66148 states and 197813 transitions. [2019-12-07 20:49:24,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 20:49:24,324 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 20:49:24,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:24,409 INFO L225 Difference]: With dead ends: 66148 [2019-12-07 20:49:24,409 INFO L226 Difference]: Without dead ends: 63090 [2019-12-07 20:49:24,409 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=312, Invalid=1328, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 20:49:24,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63090 states. [2019-12-07 20:49:25,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63090 to 26591. [2019-12-07 20:49:25,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26591 states. [2019-12-07 20:49:25,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26591 states to 26591 states and 78923 transitions. [2019-12-07 20:49:25,083 INFO L78 Accepts]: Start accepts. Automaton has 26591 states and 78923 transitions. Word has length 66 [2019-12-07 20:49:25,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:25,083 INFO L462 AbstractCegarLoop]: Abstraction has 26591 states and 78923 transitions. [2019-12-07 20:49:25,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 20:49:25,084 INFO L276 IsEmpty]: Start isEmpty. Operand 26591 states and 78923 transitions. [2019-12-07 20:49:25,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:49:25,110 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:25,110 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:25,110 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:25,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:25,110 INFO L82 PathProgramCache]: Analyzing trace with hash -1527331064, now seen corresponding path program 13 times [2019-12-07 20:49:25,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:25,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409504742] [2019-12-07 20:49:25,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:25,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:49:25,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:49:25,236 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409504742] [2019-12-07 20:49:25,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:49:25,236 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 20:49:25,236 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87942014] [2019-12-07 20:49:25,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 20:49:25,237 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:49:25,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 20:49:25,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:49:25,237 INFO L87 Difference]: Start difference. First operand 26591 states and 78923 transitions. Second operand 11 states. [2019-12-07 20:49:26,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:26,289 INFO L93 Difference]: Finished difference Result 62307 states and 183658 transitions. [2019-12-07 20:49:26,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 20:49:26,290 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 20:49:26,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:26,345 INFO L225 Difference]: With dead ends: 62307 [2019-12-07 20:49:26,345 INFO L226 Difference]: Without dead ends: 48916 [2019-12-07 20:49:26,345 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 496 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=334, Invalid=1472, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 20:49:26,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48916 states. [2019-12-07 20:49:26,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48916 to 20589. [2019-12-07 20:49:26,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20589 states. [2019-12-07 20:49:26,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20589 states to 20589 states and 60919 transitions. [2019-12-07 20:49:26,841 INFO L78 Accepts]: Start accepts. Automaton has 20589 states and 60919 transitions. Word has length 66 [2019-12-07 20:49:26,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:26,841 INFO L462 AbstractCegarLoop]: Abstraction has 20589 states and 60919 transitions. [2019-12-07 20:49:26,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 20:49:26,841 INFO L276 IsEmpty]: Start isEmpty. Operand 20589 states and 60919 transitions. [2019-12-07 20:49:26,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:49:26,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:26,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:26,859 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:26,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:26,859 INFO L82 PathProgramCache]: Analyzing trace with hash 365887472, now seen corresponding path program 14 times [2019-12-07 20:49:26,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:26,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176485506] [2019-12-07 20:49:26,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:26,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:49:26,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:49:26,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176485506] [2019-12-07 20:49:26,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:49:26,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 20:49:26,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109398265] [2019-12-07 20:49:26,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 20:49:26,986 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:49:26,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 20:49:26,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 20:49:26,987 INFO L87 Difference]: Start difference. First operand 20589 states and 60919 transitions. Second operand 12 states. [2019-12-07 20:49:28,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:28,106 INFO L93 Difference]: Finished difference Result 49951 states and 147189 transitions. [2019-12-07 20:49:28,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 20:49:28,106 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 20:49:28,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:28,158 INFO L225 Difference]: With dead ends: 49951 [2019-12-07 20:49:28,158 INFO L226 Difference]: Without dead ends: 48302 [2019-12-07 20:49:28,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=330, Invalid=1562, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 20:49:28,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48302 states. [2019-12-07 20:49:28,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48302 to 19927. [2019-12-07 20:49:28,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19927 states. [2019-12-07 20:49:28,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19927 states to 19927 states and 59098 transitions. [2019-12-07 20:49:28,646 INFO L78 Accepts]: Start accepts. Automaton has 19927 states and 59098 transitions. Word has length 66 [2019-12-07 20:49:28,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:28,646 INFO L462 AbstractCegarLoop]: Abstraction has 19927 states and 59098 transitions. [2019-12-07 20:49:28,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 20:49:28,646 INFO L276 IsEmpty]: Start isEmpty. Operand 19927 states and 59098 transitions. [2019-12-07 20:49:28,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:49:28,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:28,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:28,665 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:28,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:28,665 INFO L82 PathProgramCache]: Analyzing trace with hash -1594558236, now seen corresponding path program 15 times [2019-12-07 20:49:28,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:28,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755178383] [2019-12-07 20:49:28,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:28,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:49:28,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:49:28,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755178383] [2019-12-07 20:49:28,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:49:28,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:49:28,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135947434] [2019-12-07 20:49:28,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:49:28,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:49:28,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:49:28,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:49:28,717 INFO L87 Difference]: Start difference. First operand 19927 states and 59098 transitions. Second operand 4 states. [2019-12-07 20:49:28,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:49:28,801 INFO L93 Difference]: Finished difference Result 21867 states and 64745 transitions. [2019-12-07 20:49:28,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:49:28,802 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 20:49:28,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:49:28,825 INFO L225 Difference]: With dead ends: 21867 [2019-12-07 20:49:28,825 INFO L226 Difference]: Without dead ends: 21867 [2019-12-07 20:49:28,825 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:49:28,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21867 states. [2019-12-07 20:49:29,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21867 to 18573. [2019-12-07 20:49:29,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18573 states. [2019-12-07 20:49:29,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18573 states to 18573 states and 55113 transitions. [2019-12-07 20:49:29,123 INFO L78 Accepts]: Start accepts. Automaton has 18573 states and 55113 transitions. Word has length 66 [2019-12-07 20:49:29,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:49:29,123 INFO L462 AbstractCegarLoop]: Abstraction has 18573 states and 55113 transitions. [2019-12-07 20:49:29,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:49:29,123 INFO L276 IsEmpty]: Start isEmpty. Operand 18573 states and 55113 transitions. [2019-12-07 20:49:29,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:49:29,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:49:29,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:49:29,140 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:49:29,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:49:29,140 INFO L82 PathProgramCache]: Analyzing trace with hash -1127178005, now seen corresponding path program 1 times [2019-12-07 20:49:29,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:49:29,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106543604] [2019-12-07 20:49:29,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:49:29,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:49:29,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:49:29,212 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 20:49:29,212 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 20:49:29,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [893] [893] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t751~0.offset_29|) (= 0 v_~z$r_buff1_thd3~0_333) (= 0 v_~__unbuffered_cnt~0_79) (= v_~z~0_222 0) (= 0 v_~x~0_150) (= 0 v_~z$flush_delayed~0_66) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t751~0.base_43|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t751~0.base_43| 1) |v_#valid_80|) (= v_~__unbuffered_p2_EBX~0_70 0) (= v_~y~0_71 0) (= v_~z$read_delayed_var~0.base_8 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$r_buff0_thd1~0_186 0) (= v_~z$w_buff1_used~0_670 0) (= v_~z$r_buff0_thd2~0_110 0) (= 0 v_~weak$$choice0~0_29) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t751~0.base_43| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t751~0.base_43|) |v_ULTIMATE.start_main_~#t751~0.offset_29| 0)) |v_#memory_int_17|) (= v_~z$w_buff0~0_701 0) (= v_~z$r_buff1_thd0~0_201 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff0_thd3~0_363) (= 0 v_~__unbuffered_p2_EAX~0_62) (= |v_#NULL.offset_5| 0) (= v_~z$mem_tmp~0_43 0) (= v_~z$r_buff0_thd0~0_137 0) (= |v_#length_27| (store |v_#length_28| |v_ULTIMATE.start_main_~#t751~0.base_43| 4)) (= v_~weak$$choice2~0_160 0) (= v_~z$r_buff1_thd1~0_144 0) (= v_~z$r_buff1_thd2~0_165 0) (= v_~z$w_buff0_used~0_1072 0) (= v_~z$w_buff1~0_410 0) (= v_~main$tmp_guard0~0_24 0) (= v_~main$tmp_guard1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~z$read_delayed_var~0.offset_8 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t751~0.base_43|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_18|, #length=|v_#length_28|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_165, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_46|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_~#t751~0.base=|v_ULTIMATE.start_main_~#t751~0.base_43|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_202|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_120|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_137, ULTIMATE.start_main_~#t751~0.offset=|v_ULTIMATE.start_main_~#t751~0.offset_29|, #length=|v_#length_27|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~z$mem_tmp~0=v_~z$mem_tmp~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_70, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_670, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ~weak$$choice0~0=v_~weak$$choice0~0_29, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_144, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_363, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ULTIMATE.start_main_~#t753~0.base=|v_ULTIMATE.start_main_~#t753~0.base_29|, ~x~0=v_~x~0_150, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_410, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_54, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_74|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t752~0.base=|v_ULTIMATE.start_main_~#t752~0.base_37|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_201, ~y~0=v_~y~0_71, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t753~0.offset=|v_ULTIMATE.start_main_~#t753~0.offset_21|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_26|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1072, ~z$w_buff0~0=v_~z$w_buff0~0_701, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_333, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t752~0.offset=|v_ULTIMATE.start_main_~#t752~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_222, ~weak$$choice2~0=v_~weak$$choice2~0_160, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_186} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_~#t751~0.base, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t752~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t751~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t753~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t752~0.offset, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t753~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 20:49:29,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L823-1-->L825: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t752~0.offset_10|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t752~0.base_11|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t752~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t752~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t752~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t752~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t752~0.base_11|) |v_ULTIMATE.start_main_~#t752~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t752~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t752~0.base=|v_ULTIMATE.start_main_~#t752~0.base_11|, ULTIMATE.start_main_~#t752~0.offset=|v_ULTIMATE.start_main_~#t752~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t752~0.base, ULTIMATE.start_main_~#t752~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 20:49:29,216 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_174 256) 0)) (not (= (mod v_~z$w_buff1_used~0_104 256) 0)))) 1 0)) (= v_~z$w_buff0_used~0_174 1) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 0)) (= v_~z$w_buff0~0_53 v_~z$w_buff1~0_38) (= v_~z$w_buff0_used~0_175 v_~z$w_buff1_used~0_104) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= 1 v_~z$w_buff0~0_52)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_175, ~z$w_buff0~0=v_~z$w_buff0~0_53, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_174, ~z$w_buff0~0=v_~z$w_buff0~0_52, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_104, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~z$w_buff1~0=v_~z$w_buff1~0_38, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 20:49:29,217 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L825-1-->L827: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t753~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t753~0.base_10|) |v_ULTIMATE.start_main_~#t753~0.offset_9| 2)) |v_#memory_int_11|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t753~0.base_10|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t753~0.base_10| 1)) (= |v_ULTIMATE.start_main_~#t753~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t753~0.base_10|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t753~0.base_10| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t753~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t753~0.offset=|v_ULTIMATE.start_main_~#t753~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t753~0.base=|v_ULTIMATE.start_main_~#t753~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t753~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t753~0.base] because there is no mapped edge [2019-12-07 20:49:29,218 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L764-2-->L764-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In2008346526 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In2008346526 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out2008346526| ~z$w_buff1~0_In2008346526) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out2008346526| ~z~0_In2008346526)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2008346526, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2008346526, ~z$w_buff1~0=~z$w_buff1~0_In2008346526, ~z~0=~z~0_In2008346526} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out2008346526|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2008346526, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2008346526, ~z$w_buff1~0=~z$w_buff1~0_In2008346526, ~z~0=~z~0_In2008346526} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 20:49:29,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In130559500 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite21_Out130559500| |P2Thread1of1ForFork2_#t~ite20_Out130559500|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In130559500 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In130559500 256))) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In130559500 256))) (= (mod ~z$w_buff0_used~0_In130559500 256) 0))) (= ~z$w_buff0~0_In130559500 |P2Thread1of1ForFork2_#t~ite20_Out130559500|)) (and (= ~z$w_buff0~0_In130559500 |P2Thread1of1ForFork2_#t~ite21_Out130559500|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In130559500| |P2Thread1of1ForFork2_#t~ite20_Out130559500|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In130559500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In130559500, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In130559500|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In130559500, ~z$w_buff1_used~0=~z$w_buff1_used~0_In130559500, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In130559500, ~weak$$choice2~0=~weak$$choice2~0_In130559500} OutVars{~z$w_buff0~0=~z$w_buff0~0_In130559500, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out130559500|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In130559500, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out130559500|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In130559500, ~z$w_buff1_used~0=~z$w_buff1_used~0_In130559500, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In130559500, ~weak$$choice2~0=~weak$$choice2~0_In130559500} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 20:49:29,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In869018788 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In869018788 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out869018788|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In869018788 |P0Thread1of1ForFork0_#t~ite5_Out869018788|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In869018788, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In869018788} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out869018788|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869018788, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In869018788} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:49:29,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In911609844 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In911609844 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In911609844 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In911609844 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out911609844| ~z$w_buff1_used~0_In911609844) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out911609844|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In911609844, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In911609844, ~z$w_buff1_used~0=~z$w_buff1_used~0_In911609844, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In911609844} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out911609844|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In911609844, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In911609844, ~z$w_buff1_used~0=~z$w_buff1_used~0_In911609844, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In911609844} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:49:29,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1093408920 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out1093408920 ~z$r_buff0_thd1~0_In1093408920)) (.cse2 (= (mod ~z$w_buff0_used~0_In1093408920 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd1~0_Out1093408920 0) (not .cse2)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1093408920, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1093408920} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1093408920, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1093408920|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1093408920} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 20:49:29,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L748-->L748-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1733955725 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1733955725 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1733955725 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1733955725 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1733955725| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd1~0_In1733955725 |P0Thread1of1ForFork0_#t~ite8_Out1733955725|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733955725} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1733955725|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733955725} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:49:29,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L748-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_62 |v_P0Thread1of1ForFork0_#t~ite8_22|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_62, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 20:49:29,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-216339353 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In-216339353 |P2Thread1of1ForFork2_#t~ite24_Out-216339353|) (= |P2Thread1of1ForFork2_#t~ite23_In-216339353| |P2Thread1of1ForFork2_#t~ite23_Out-216339353|)) (and (= ~z$w_buff1~0_In-216339353 |P2Thread1of1ForFork2_#t~ite23_Out-216339353|) (= |P2Thread1of1ForFork2_#t~ite23_Out-216339353| |P2Thread1of1ForFork2_#t~ite24_Out-216339353|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-216339353 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-216339353 256) 0) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-216339353 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-216339353 256) 0))))))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-216339353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-216339353, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-216339353, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-216339353, ~z$w_buff1~0=~z$w_buff1~0_In-216339353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-216339353, ~weak$$choice2~0=~weak$$choice2~0_In-216339353} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-216339353|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-216339353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-216339353, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-216339353, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-216339353, ~z$w_buff1~0=~z$w_buff1~0_In-216339353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-216339353, ~weak$$choice2~0=~weak$$choice2~0_In-216339353} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 20:49:29,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L791-->L791-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2123501806 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite27_Out-2123501806| ~z$w_buff0_used~0_In-2123501806) (= |P2Thread1of1ForFork2_#t~ite26_In-2123501806| |P2Thread1of1ForFork2_#t~ite26_Out-2123501806|) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite26_Out-2123501806| ~z$w_buff0_used~0_In-2123501806) (= |P2Thread1of1ForFork2_#t~ite26_Out-2123501806| |P2Thread1of1ForFork2_#t~ite27_Out-2123501806|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-2123501806 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In-2123501806 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In-2123501806 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2123501806 256))))))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-2123501806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2123501806, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2123501806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2123501806, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2123501806, ~weak$$choice2~0=~weak$$choice2~0_In-2123501806} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-2123501806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2123501806, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2123501806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2123501806, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2123501806, ~weak$$choice2~0=~weak$$choice2~0_In-2123501806, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-2123501806|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 20:49:29,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L793-->L794: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_119 v_~z$r_buff0_thd3~0_118)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_119, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_6|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:49:29,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L764-4-->L765: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~z~0_16) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 20:49:29,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In769679876 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In769679876 |P1Thread1of1ForFork1_#t~ite11_Out769679876|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out769679876|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out769679876|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:49:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In586914970 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In586914970 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In586914970 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In586914970 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out586914970|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In586914970 |P1Thread1of1ForFork1_#t~ite12_Out586914970|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In586914970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out586914970|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In586914970} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:49:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-910583816 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-910583816 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-910583816| ~z$r_buff0_thd2~0_In-910583816)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-910583816| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-910583816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-910583816|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-910583816} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 20:49:29,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L796-->L800: Formula: (and (= v_~z~0_64 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 20:49:29,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L800-2-->L800-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite39_Out1848184045| |P2Thread1of1ForFork2_#t~ite38_Out1848184045|)) (.cse0 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In1848184045 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= ~z$w_buff1~0_In1848184045 |P2Thread1of1ForFork2_#t~ite38_Out1848184045|)) (and (= ~z~0_In1848184045 |P2Thread1of1ForFork2_#t~ite38_Out1848184045|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1848184045|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1848184045|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 20:49:29,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1996696623 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-1996696623|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1996696623 |P2Thread1of1ForFork2_#t~ite40_Out-1996696623|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996696623, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-1996696623|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 20:49:29,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L802-->L802-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1059955501 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1059955501 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1059955501 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1059955501 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out1059955501| ~z$w_buff1_used~0_In1059955501) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out1059955501| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1059955501} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1059955501|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1059955501} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 20:49:29,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1893225680 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1893225680 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1893225680 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1893225680 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In-1893225680 |P1Thread1of1ForFork1_#t~ite14_Out-1893225680|)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1893225680| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893225680, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1893225680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1893225680, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1893225680} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893225680, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1893225680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1893225680, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1893225680|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1893225680} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:49:29,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_70) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_70, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:49:29,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1112231753 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1112231753 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out1112231753| ~z$r_buff0_thd3~0_In1112231753)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out1112231753| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1112231753, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1112231753} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1112231753|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1112231753, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1112231753} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 20:49:29,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In940560483 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In940560483 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In940560483 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In940560483 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite43_Out940560483| ~z$r_buff1_thd3~0_In940560483)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite43_Out940560483| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In940560483, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In940560483, ~z$w_buff1_used~0=~z$w_buff1_used~0_In940560483, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In940560483} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In940560483, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In940560483, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out940560483|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In940560483, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In940560483} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 20:49:29,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L804-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_119 |v_P2Thread1of1ForFork2_#t~ite43_26|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_119, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_25|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:49:29,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L827-1-->L833: Formula: (and (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_34) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_9 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:49:29,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L833-2-->L833-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1533216479| |ULTIMATE.start_main_#t~ite47_Out-1533216479|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1533216479 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1533216479 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-1533216479| ~z$w_buff1~0_In-1533216479) (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1533216479| ~z~0_In-1533216479) .cse0 (or .cse1 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1533216479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1533216479, ~z$w_buff1~0=~z$w_buff1~0_In-1533216479, ~z~0=~z~0_In-1533216479} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1533216479, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1533216479|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1533216479, ~z$w_buff1~0=~z$w_buff1~0_In-1533216479, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1533216479|, ~z~0=~z~0_In-1533216479} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:49:29,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1390542359 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1390542359 |ULTIMATE.start_main_#t~ite49_Out-1390542359|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-1390542359|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1390542359, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1390542359, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1390542359|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 20:49:29,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-698131140 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-698131140 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-698131140 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-698131140 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-698131140|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-698131140 |ULTIMATE.start_main_#t~ite50_Out-698131140|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-698131140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-698131140} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-698131140|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-698131140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-698131140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 20:49:29,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In459505418 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In459505418 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out459505418| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In459505418 |ULTIMATE.start_main_#t~ite51_Out459505418|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In459505418, ~z$w_buff0_used~0=~z$w_buff0_used~0_In459505418} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In459505418, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out459505418|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In459505418} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 20:49:29,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L837-->L837-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1959059075 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1959059075 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1959059075 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In1959059075 |ULTIMATE.start_main_#t~ite52_Out1959059075|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1959059075|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1959059075, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1959059075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1959059075} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1959059075|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1959059075, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1959059075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1959059075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 20:49:29,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_27 (ite (= 0 (ite (not (and (= v_~y~0_37 2) (= 2 v_~__unbuffered_p2_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_37 0) (= 2 v_~x~0_117))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_162 |v_ULTIMATE.start_main_#t~ite52_69|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_69|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_162, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:49:29,275 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 08:49:29 BasicIcfg [2019-12-07 20:49:29,275 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 20:49:29,275 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 20:49:29,275 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 20:49:29,276 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 20:49:29,276 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:46:43" (3/4) ... [2019-12-07 20:49:29,277 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 20:49:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [893] [893] ULTIMATE.startENTRY-->L823: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= 0 |v_ULTIMATE.start_main_~#t751~0.offset_29|) (= 0 v_~z$r_buff1_thd3~0_333) (= 0 v_~__unbuffered_cnt~0_79) (= v_~z~0_222 0) (= 0 v_~x~0_150) (= 0 v_~z$flush_delayed~0_66) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t751~0.base_43|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t751~0.base_43| 1) |v_#valid_80|) (= v_~__unbuffered_p2_EBX~0_70 0) (= v_~y~0_71 0) (= v_~z$read_delayed_var~0.base_8 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$r_buff0_thd1~0_186 0) (= v_~z$w_buff1_used~0_670 0) (= v_~z$r_buff0_thd2~0_110 0) (= 0 v_~weak$$choice0~0_29) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t751~0.base_43| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t751~0.base_43|) |v_ULTIMATE.start_main_~#t751~0.offset_29| 0)) |v_#memory_int_17|) (= v_~z$w_buff0~0_701 0) (= v_~z$r_buff1_thd0~0_201 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~z$r_buff0_thd3~0_363) (= 0 v_~__unbuffered_p2_EAX~0_62) (= |v_#NULL.offset_5| 0) (= v_~z$mem_tmp~0_43 0) (= v_~z$r_buff0_thd0~0_137 0) (= |v_#length_27| (store |v_#length_28| |v_ULTIMATE.start_main_~#t751~0.base_43| 4)) (= v_~weak$$choice2~0_160 0) (= v_~z$r_buff1_thd1~0_144 0) (= v_~z$r_buff1_thd2~0_165 0) (= v_~z$w_buff0_used~0_1072 0) (= v_~z$w_buff1~0_410 0) (= v_~main$tmp_guard0~0_24 0) (= v_~main$tmp_guard1~0_54 0) (= 0 |v_#NULL.base_5|) (= v_~z$read_delayed_var~0.offset_8 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t751~0.base_43|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_18|, #length=|v_#length_28|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_165, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_46|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_~#t751~0.base=|v_ULTIMATE.start_main_~#t751~0.base_43|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_202|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_120|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_137, ULTIMATE.start_main_~#t751~0.offset=|v_ULTIMATE.start_main_~#t751~0.offset_29|, #length=|v_#length_27|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_62, ~z$mem_tmp~0=v_~z$mem_tmp~0_43, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_70, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_670, ~z$flush_delayed~0=v_~z$flush_delayed~0_66, ~weak$$choice0~0=v_~weak$$choice0~0_29, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_144, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_8, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_363, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ULTIMATE.start_main_~#t753~0.base=|v_ULTIMATE.start_main_~#t753~0.base_29|, ~x~0=v_~x~0_150, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_410, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_54, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_74|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t752~0.base=|v_ULTIMATE.start_main_~#t752~0.base_37|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_201, ~y~0=v_~y~0_71, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t753~0.offset=|v_ULTIMATE.start_main_~#t753~0.offset_21|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_26|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_1072, ~z$w_buff0~0=v_~z$w_buff0~0_701, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_10|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_333, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t752~0.offset=|v_ULTIMATE.start_main_~#t752~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_31|, #valid=|v_#valid_80|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_222, ~weak$$choice2~0=v_~weak$$choice2~0_160, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_186} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_~#t751~0.base, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t752~0.base, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t751~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t753~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t752~0.offset, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t753~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 20:49:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L823-1-->L825: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t752~0.offset_10|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t752~0.base_11|) 0) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t752~0.base_11| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t752~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t752~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t752~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t752~0.base_11|) |v_ULTIMATE.start_main_~#t752~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t752~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t752~0.base=|v_ULTIMATE.start_main_~#t752~0.base_11|, ULTIMATE.start_main_~#t752~0.offset=|v_ULTIMATE.start_main_~#t752~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t752~0.base, ULTIMATE.start_main_~#t752~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 20:49:29,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19| (ite (not (and (not (= (mod v_~z$w_buff0_used~0_174 256) 0)) (not (= (mod v_~z$w_buff1_used~0_104 256) 0)))) 1 0)) (= v_~z$w_buff0_used~0_174 1) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21 0)) (= v_~z$w_buff0~0_53 v_~z$w_buff1~0_38) (= v_~z$w_buff0_used~0_175 v_~z$w_buff1_used~0_104) (= v_P0Thread1of1ForFork0_~arg.offset_19 |v_P0Thread1of1ForFork0_#in~arg.offset_21|) (= v_P0Thread1of1ForFork0_~arg.base_19 |v_P0Thread1of1ForFork0_#in~arg.base_21|) (= 1 v_~z$w_buff0~0_52)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_175, ~z$w_buff0~0=v_~z$w_buff0~0_53, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_174, ~z$w_buff0~0=v_~z$w_buff0~0_52, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_21, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_104, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_21|, ~z$w_buff1~0=v_~z$w_buff1~0_38, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_19, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_19|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_19} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 20:49:29,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L825-1-->L827: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t753~0.base_10| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t753~0.base_10|) |v_ULTIMATE.start_main_~#t753~0.offset_9| 2)) |v_#memory_int_11|) (= (select |v_#valid_30| |v_ULTIMATE.start_main_~#t753~0.base_10|) 0) (= |v_#valid_29| (store |v_#valid_30| |v_ULTIMATE.start_main_~#t753~0.base_10| 1)) (= |v_ULTIMATE.start_main_~#t753~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t753~0.base_10|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t753~0.base_10| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t753~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t753~0.offset=|v_ULTIMATE.start_main_~#t753~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_29|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t753~0.base=|v_ULTIMATE.start_main_~#t753~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t753~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t753~0.base] because there is no mapped edge [2019-12-07 20:49:29,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L764-2-->L764-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In2008346526 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In2008346526 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out2008346526| ~z$w_buff1~0_In2008346526) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out2008346526| ~z~0_In2008346526)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2008346526, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2008346526, ~z$w_buff1~0=~z$w_buff1~0_In2008346526, ~z~0=~z~0_In2008346526} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out2008346526|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2008346526, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2008346526, ~z$w_buff1~0=~z$w_buff1~0_In2008346526, ~z~0=~z~0_In2008346526} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 20:49:29,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In130559500 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite21_Out130559500| |P2Thread1of1ForFork2_#t~ite20_Out130559500|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In130559500 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In130559500 256))) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In130559500 256))) (= (mod ~z$w_buff0_used~0_In130559500 256) 0))) (= ~z$w_buff0~0_In130559500 |P2Thread1of1ForFork2_#t~ite20_Out130559500|)) (and (= ~z$w_buff0~0_In130559500 |P2Thread1of1ForFork2_#t~ite21_Out130559500|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In130559500| |P2Thread1of1ForFork2_#t~ite20_Out130559500|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In130559500, ~z$w_buff0_used~0=~z$w_buff0_used~0_In130559500, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In130559500|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In130559500, ~z$w_buff1_used~0=~z$w_buff1_used~0_In130559500, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In130559500, ~weak$$choice2~0=~weak$$choice2~0_In130559500} OutVars{~z$w_buff0~0=~z$w_buff0~0_In130559500, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out130559500|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In130559500, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out130559500|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In130559500, ~z$w_buff1_used~0=~z$w_buff1_used~0_In130559500, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In130559500, ~weak$$choice2~0=~weak$$choice2~0_In130559500} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 20:49:29,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In869018788 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In869018788 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out869018788|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In869018788 |P0Thread1of1ForFork0_#t~ite5_Out869018788|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In869018788, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In869018788} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out869018788|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869018788, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In869018788} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:49:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In911609844 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In911609844 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In911609844 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In911609844 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out911609844| ~z$w_buff1_used~0_In911609844) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out911609844|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In911609844, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In911609844, ~z$w_buff1_used~0=~z$w_buff1_used~0_In911609844, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In911609844} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out911609844|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In911609844, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In911609844, ~z$w_buff1_used~0=~z$w_buff1_used~0_In911609844, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In911609844} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:49:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L747-->L748: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1093408920 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out1093408920 ~z$r_buff0_thd1~0_In1093408920)) (.cse2 (= (mod ~z$w_buff0_used~0_In1093408920 256) 0))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd1~0_Out1093408920 0) (not .cse2)) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1093408920, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1093408920} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1093408920, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1093408920|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1093408920} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 20:49:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L748-->L748-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1733955725 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1733955725 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1733955725 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1733955725 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out1733955725| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$r_buff1_thd1~0_In1733955725 |P0Thread1of1ForFork0_#t~ite8_Out1733955725|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733955725} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1733955725|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1733955725} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:49:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L748-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_62 |v_P0Thread1of1ForFork0_#t~ite8_22|) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_62, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 20:49:29,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-216339353 256)))) (or (and (not .cse0) (= ~z$w_buff1~0_In-216339353 |P2Thread1of1ForFork2_#t~ite24_Out-216339353|) (= |P2Thread1of1ForFork2_#t~ite23_In-216339353| |P2Thread1of1ForFork2_#t~ite23_Out-216339353|)) (and (= ~z$w_buff1~0_In-216339353 |P2Thread1of1ForFork2_#t~ite23_Out-216339353|) (= |P2Thread1of1ForFork2_#t~ite23_Out-216339353| |P2Thread1of1ForFork2_#t~ite24_Out-216339353|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-216339353 256) 0))) (or (= (mod ~z$w_buff0_used~0_In-216339353 256) 0) (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-216339353 256))) (and .cse1 (= (mod ~z$w_buff1_used~0_In-216339353 256) 0))))))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-216339353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-216339353, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-216339353, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-216339353, ~z$w_buff1~0=~z$w_buff1~0_In-216339353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-216339353, ~weak$$choice2~0=~weak$$choice2~0_In-216339353} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-216339353|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-216339353|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-216339353, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-216339353, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-216339353, ~z$w_buff1~0=~z$w_buff1~0_In-216339353, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-216339353, ~weak$$choice2~0=~weak$$choice2~0_In-216339353} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 20:49:29,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L791-->L791-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2123501806 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite27_Out-2123501806| ~z$w_buff0_used~0_In-2123501806) (= |P2Thread1of1ForFork2_#t~ite26_In-2123501806| |P2Thread1of1ForFork2_#t~ite26_Out-2123501806|) (not .cse0)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite26_Out-2123501806| ~z$w_buff0_used~0_In-2123501806) (= |P2Thread1of1ForFork2_#t~ite26_Out-2123501806| |P2Thread1of1ForFork2_#t~ite27_Out-2123501806|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-2123501806 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In-2123501806 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In-2123501806 256) 0) .cse1) (= 0 (mod ~z$w_buff0_used~0_In-2123501806 256))))))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-2123501806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2123501806, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2123501806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2123501806, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2123501806, ~weak$$choice2~0=~weak$$choice2~0_In-2123501806} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-2123501806|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2123501806, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2123501806, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2123501806, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2123501806, ~weak$$choice2~0=~weak$$choice2~0_In-2123501806, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-2123501806|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 20:49:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L793-->L794: Formula: (and (not (= (mod v_~weak$$choice2~0_37 256) 0)) (= v_~z$r_buff0_thd3~0_119 v_~z$r_buff0_thd3~0_118)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_119, ~weak$$choice2~0=v_~weak$$choice2~0_37} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_6|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_37} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:49:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L764-4-->L765: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~z~0_16) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 20:49:29,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In769679876 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In769679876 |P1Thread1of1ForFork1_#t~ite11_Out769679876|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out769679876|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out769679876|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:49:29,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L766-->L766-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In586914970 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In586914970 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In586914970 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In586914970 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out586914970|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In586914970 |P1Thread1of1ForFork1_#t~ite12_Out586914970|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In586914970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out586914970|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In586914970} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:49:29,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-910583816 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-910583816 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-910583816| ~z$r_buff0_thd2~0_In-910583816)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-910583816| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-910583816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-910583816|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-910583816} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 20:49:29,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L796-->L800: Formula: (and (= v_~z~0_64 v_~z$mem_tmp~0_7) (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_64} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 20:49:29,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L800-2-->L800-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite39_Out1848184045| |P2Thread1of1ForFork2_#t~ite38_Out1848184045|)) (.cse0 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In1848184045 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= ~z$w_buff1~0_In1848184045 |P2Thread1of1ForFork2_#t~ite38_Out1848184045|)) (and (= ~z~0_In1848184045 |P2Thread1of1ForFork2_#t~ite38_Out1848184045|) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1848184045|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1848184045|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 20:49:29,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1996696623 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out-1996696623|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1996696623 |P2Thread1of1ForFork2_#t~ite40_Out-1996696623|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996696623, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-1996696623|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 20:49:29,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L802-->L802-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In1059955501 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In1059955501 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1059955501 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1059955501 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out1059955501| ~z$w_buff1_used~0_In1059955501) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite41_Out1059955501| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1059955501} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1059955501|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1059955501} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 20:49:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L768-->L768-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1893225680 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1893225680 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-1893225680 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1893225680 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd2~0_In-1893225680 |P1Thread1of1ForFork1_#t~ite14_Out-1893225680|)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1893225680| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893225680, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1893225680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1893225680, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1893225680} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1893225680, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1893225680, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1893225680, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1893225680|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1893225680} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:49:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_70) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_70, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:49:29,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L803-->L803-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1112231753 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1112231753 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out1112231753| ~z$r_buff0_thd3~0_In1112231753)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out1112231753| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1112231753, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1112231753} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1112231753|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1112231753, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1112231753} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 20:49:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In940560483 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In940560483 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In940560483 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In940560483 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite43_Out940560483| ~z$r_buff1_thd3~0_In940560483)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite43_Out940560483| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In940560483, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In940560483, ~z$w_buff1_used~0=~z$w_buff1_used~0_In940560483, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In940560483} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In940560483, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In940560483, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out940560483|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In940560483, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In940560483} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 20:49:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L804-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_119 |v_P2Thread1of1ForFork2_#t~ite43_26|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_119, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_25|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:49:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L827-1-->L833: Formula: (and (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_34) 1 0)) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_9 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:49:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L833-2-->L833-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1533216479| |ULTIMATE.start_main_#t~ite47_Out-1533216479|)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1533216479 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-1533216479 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out-1533216479| ~z$w_buff1~0_In-1533216479) (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite47_Out-1533216479| ~z~0_In-1533216479) .cse0 (or .cse1 .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1533216479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1533216479, ~z$w_buff1~0=~z$w_buff1~0_In-1533216479, ~z~0=~z~0_In-1533216479} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1533216479, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1533216479|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1533216479, ~z$w_buff1~0=~z$w_buff1~0_In-1533216479, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1533216479|, ~z~0=~z~0_In-1533216479} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:49:29,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-1390542359 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1390542359 |ULTIMATE.start_main_#t~ite49_Out-1390542359|)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-1390542359|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1390542359, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1390542359, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1390542359|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 20:49:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-698131140 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-698131140 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-698131140 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-698131140 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-698131140|)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-698131140 |ULTIMATE.start_main_#t~ite50_Out-698131140|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-698131140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-698131140} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-698131140|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-698131140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-698131140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 20:49:29,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L836-->L836-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In459505418 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In459505418 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite51_Out459505418| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In459505418 |ULTIMATE.start_main_#t~ite51_Out459505418|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In459505418, ~z$w_buff0_used~0=~z$w_buff0_used~0_In459505418} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In459505418, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out459505418|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In459505418} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 20:49:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L837-->L837-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1959059075 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In1959059075 256))) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1959059075 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd0~0_In1959059075 |ULTIMATE.start_main_#t~ite52_Out1959059075|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out1959059075|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1959059075, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1959059075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1959059075} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1959059075|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1959059075, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1959059075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1959059075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 20:49:29,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L837-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_27 (ite (= 0 (ite (not (and (= v_~y~0_37 2) (= 2 v_~__unbuffered_p2_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_37 0) (= 2 v_~x~0_117))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= (mod v_~main$tmp_guard1~0_27 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~z$r_buff1_thd0~0_162 |v_ULTIMATE.start_main_#t~ite52_69|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_69|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_37, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_162, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_30, ~y~0=v_~y~0_37, ~x~0=v_~x~0_117, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:49:29,349 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d057fc81-78f3-48ce-a28c-060189798440/bin/utaipan/witness.graphml [2019-12-07 20:49:29,350 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 20:49:29,351 INFO L168 Benchmark]: Toolchain (without parser) took 166389.88 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.3 GB). Free memory was 940.8 MB in the beginning and 1.8 GB in the end (delta: -818.9 MB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,351 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:49:29,351 INFO L168 Benchmark]: CACSL2BoogieTranslator took 370.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -121.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,351 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,351 INFO L168 Benchmark]: Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:49:29,352 INFO L168 Benchmark]: RCFGBuilder took 418.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,352 INFO L168 Benchmark]: TraceAbstraction took 165458.85 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -776.0 MB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,352 INFO L168 Benchmark]: Witness Printer took 74.24 ms. Allocated memory is still 6.3 GB. Free memory was 1.8 GB in the beginning and 1.8 GB in the end (delta: 18.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 20:49:29,353 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 370.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -121.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 418.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 165458.85 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: -776.0 MB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 74.24 ms. Allocated memory is still 6.3 GB. Free memory was 1.8 GB in the beginning and 1.8 GB in the end (delta: 18.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.6s, 175 ProgramPointsBefore, 93 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 32 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 32 ChoiceCompositions, 6798 VarBasedMoverChecksPositive, 289 VarBasedMoverChecksNegative, 75 SemBasedMoverChecksPositive, 285 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.2s, 0 MoverChecksTotal, 87070 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L823] FCALL, FORK 0 pthread_create(&t751, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t752, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t753, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L778] 3 y = 2 [L781] 3 __unbuffered_p2_EAX = y [L784] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L785] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L786] 3 z$flush_delayed = weak$$choice2 [L787] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L788] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L788] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L789] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L790] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L791] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L792] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L792] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=1, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=0] [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L794] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L795] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 165.3s, OverallIterations: 37, TraceHistogramMax: 1, AutomataDifference: 106.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 11529 SDtfs, 27677 SDslu, 49033 SDs, 0 SdLazy, 54538 SolverSat, 3204 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 51.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1477 GetRequests, 70 SyntacticMatches, 44 SemanticMatches, 1363 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76101 ImplicationChecksByTransitivity, 35.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=151934occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 34.6s AutomataMinimizationTime, 36 MinimizatonAttempts, 777950 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.5s InterpolantComputationTime, 1667 NumberOfCodeBlocks, 1667 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 1564 ConstructedInterpolants, 0 QuantifiedInterpolants, 726340 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...