./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 65d5cac0d2b984b8c73f78706c05124f2c583a64 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:04:25,984 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:04:25,985 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:04:25,994 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:04:25,994 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:04:25,995 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:04:25,996 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:04:25,997 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:04:25,999 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:04:25,999 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:04:26,000 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:04:26,001 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:04:26,001 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:04:26,002 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:04:26,002 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:04:26,003 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:04:26,004 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:04:26,004 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:04:26,006 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:04:26,007 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:04:26,008 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:04:26,009 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:04:26,010 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:04:26,010 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:04:26,012 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:04:26,012 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:04:26,012 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:04:26,013 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:04:26,013 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:04:26,014 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:04:26,014 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:04:26,014 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:04:26,015 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:04:26,015 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:04:26,016 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:04:26,016 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:04:26,016 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:04:26,016 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:04:26,017 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:04:26,017 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:04:26,018 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:04:26,018 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 17:04:26,029 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:04:26,029 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:04:26,029 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 17:04:26,030 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 17:04:26,030 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 17:04:26,031 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 17:04:26,031 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 17:04:26,031 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 17:04:26,031 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 17:04:26,031 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 17:04:26,032 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:04:26,032 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:04:26,033 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:04:26,033 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:04:26,034 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:04:26,034 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 17:04:26,035 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 65d5cac0d2b984b8c73f78706c05124f2c583a64 [2019-12-07 17:04:26,148 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:04:26,158 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:04:26,160 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:04:26,161 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:04:26,162 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:04:26,162 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i [2019-12-07 17:04:26,201 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/data/98319d039/0141ecbb6c3b44bcb3b27e736e93bb23/FLAG8e4d6b4da [2019-12-07 17:04:26,574 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:04:26,574 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/sv-benchmarks/c/pthread-wmm/mix028_rmo.opt.i [2019-12-07 17:04:26,584 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/data/98319d039/0141ecbb6c3b44bcb3b27e736e93bb23/FLAG8e4d6b4da [2019-12-07 17:04:26,593 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/data/98319d039/0141ecbb6c3b44bcb3b27e736e93bb23 [2019-12-07 17:04:26,595 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:04:26,596 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:04:26,596 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:04:26,597 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:04:26,599 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:04:26,599 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:26,601 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a1693e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26, skipping insertion in model container [2019-12-07 17:04:26,601 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:26,606 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:04:26,634 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:04:26,880 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:04:26,888 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:04:26,929 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:04:26,973 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:04:26,974 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26 WrapperNode [2019-12-07 17:04:26,974 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:04:26,974 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:04:26,974 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:04:26,974 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:04:26,980 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:26,993 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,013 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:04:27,014 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:04:27,014 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:04:27,014 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:04:27,020 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,020 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,024 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,024 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,031 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,033 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,035 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... [2019-12-07 17:04:27,039 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:04:27,039 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:04:27,039 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:04:27,039 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:04:27,040 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:04:27,081 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:04:27,081 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:04:27,081 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:04:27,081 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:04:27,082 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:04:27,082 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:04:27,083 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:04:27,447 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:04:27,447 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:04:27,448 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:04:27 BoogieIcfgContainer [2019-12-07 17:04:27,448 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:04:27,449 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:04:27,449 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:04:27,450 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:04:27,451 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:04:26" (1/3) ... [2019-12-07 17:04:27,451 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f7ce459 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:04:27, skipping insertion in model container [2019-12-07 17:04:27,451 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:04:26" (2/3) ... [2019-12-07 17:04:27,451 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f7ce459 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:04:27, skipping insertion in model container [2019-12-07 17:04:27,452 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:04:27" (3/3) ... [2019-12-07 17:04:27,453 INFO L109 eAbstractionObserver]: Analyzing ICFG mix028_rmo.opt.i [2019-12-07 17:04:27,459 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:04:27,459 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:04:27,464 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:04:27,465 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:04:27,487 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,488 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,489 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,492 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,493 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,494 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,495 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,496 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,497 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,498 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,499 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,499 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,499 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,499 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,499 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:04:27,510 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:04:27,523 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:04:27,523 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:04:27,523 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:04:27,523 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:04:27,523 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:04:27,523 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:04:27,523 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:04:27,523 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:04:27,534 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 17:04:27,535 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:04:27,589 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:04:27,589 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:04:27,597 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:04:27,612 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 17:04:27,641 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 17:04:27,641 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:04:27,646 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 577 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:04:27,661 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 17:04:27,662 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:04:30,402 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 17:04:30,488 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79058 [2019-12-07 17:04:30,488 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 17:04:30,491 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 17:04:45,947 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115078 states. [2019-12-07 17:04:45,948 INFO L276 IsEmpty]: Start isEmpty. Operand 115078 states. [2019-12-07 17:04:45,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:04:45,952 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:04:45,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:04:45,953 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:04:45,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:04:45,957 INFO L82 PathProgramCache]: Analyzing trace with hash 811621075, now seen corresponding path program 1 times [2019-12-07 17:04:45,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:04:45,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391749226] [2019-12-07 17:04:45,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:04:46,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:04:46,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:04:46,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391749226] [2019-12-07 17:04:46,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:04:46,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:04:46,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650376490] [2019-12-07 17:04:46,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:04:46,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:04:46,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:04:46,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:04:46,116 INFO L87 Difference]: Start difference. First operand 115078 states. Second operand 3 states. [2019-12-07 17:04:46,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:04:46,886 INFO L93 Difference]: Finished difference Result 114778 states and 493920 transitions. [2019-12-07 17:04:46,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:04:46,888 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:04:46,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:04:47,452 INFO L225 Difference]: With dead ends: 114778 [2019-12-07 17:04:47,453 INFO L226 Difference]: Without dead ends: 112412 [2019-12-07 17:04:47,454 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:04:51,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112412 states. [2019-12-07 17:04:54,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112412 to 112412. [2019-12-07 17:04:54,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112412 states. [2019-12-07 17:04:54,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112412 states to 112412 states and 484274 transitions. [2019-12-07 17:04:54,430 INFO L78 Accepts]: Start accepts. Automaton has 112412 states and 484274 transitions. Word has length 5 [2019-12-07 17:04:54,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:04:54,431 INFO L462 AbstractCegarLoop]: Abstraction has 112412 states and 484274 transitions. [2019-12-07 17:04:54,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:04:54,431 INFO L276 IsEmpty]: Start isEmpty. Operand 112412 states and 484274 transitions. [2019-12-07 17:04:54,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:04:54,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:04:54,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:04:54,434 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:04:54,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:04:54,434 INFO L82 PathProgramCache]: Analyzing trace with hash -287251583, now seen corresponding path program 1 times [2019-12-07 17:04:54,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:04:54,435 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529988574] [2019-12-07 17:04:54,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:04:54,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:04:54,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:04:54,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529988574] [2019-12-07 17:04:54,492 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:04:54,492 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:04:54,492 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333205048] [2019-12-07 17:04:54,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:04:54,493 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:04:54,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:04:54,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:04:54,494 INFO L87 Difference]: Start difference. First operand 112412 states and 484274 transitions. Second operand 4 states. [2019-12-07 17:04:55,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:04:55,800 INFO L93 Difference]: Finished difference Result 180702 states and 747767 transitions. [2019-12-07 17:04:55,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:04:55,801 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:04:55,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:04:56,272 INFO L225 Difference]: With dead ends: 180702 [2019-12-07 17:04:56,272 INFO L226 Difference]: Without dead ends: 180653 [2019-12-07 17:04:56,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:01,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180653 states. [2019-12-07 17:05:05,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180653 to 165577. [2019-12-07 17:05:05,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165577 states. [2019-12-07 17:05:06,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165577 states to 165577 states and 693075 transitions. [2019-12-07 17:05:06,141 INFO L78 Accepts]: Start accepts. Automaton has 165577 states and 693075 transitions. Word has length 11 [2019-12-07 17:05:06,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:06,141 INFO L462 AbstractCegarLoop]: Abstraction has 165577 states and 693075 transitions. [2019-12-07 17:05:06,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:06,141 INFO L276 IsEmpty]: Start isEmpty. Operand 165577 states and 693075 transitions. [2019-12-07 17:05:06,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:05:06,147 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:06,147 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:06,148 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:06,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:06,148 INFO L82 PathProgramCache]: Analyzing trace with hash 228163746, now seen corresponding path program 1 times [2019-12-07 17:05:06,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:05:06,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218258771] [2019-12-07 17:05:06,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:06,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:06,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:06,194 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218258771] [2019-12-07 17:05:06,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:06,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:06,195 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [295293802] [2019-12-07 17:05:06,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:05:06,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:05:06,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:05:06,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:06,195 INFO L87 Difference]: Start difference. First operand 165577 states and 693075 transitions. Second operand 4 states. [2019-12-07 17:05:07,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:07,438 INFO L93 Difference]: Finished difference Result 235681 states and 964563 transitions. [2019-12-07 17:05:07,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:05:07,439 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:05:07,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:08,110 INFO L225 Difference]: With dead ends: 235681 [2019-12-07 17:05:08,110 INFO L226 Difference]: Without dead ends: 235618 [2019-12-07 17:05:08,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:14,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235618 states. [2019-12-07 17:05:19,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235618 to 199613. [2019-12-07 17:05:19,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199613 states. [2019-12-07 17:05:20,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199613 states to 199613 states and 830031 transitions. [2019-12-07 17:05:20,498 INFO L78 Accepts]: Start accepts. Automaton has 199613 states and 830031 transitions. Word has length 13 [2019-12-07 17:05:20,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:20,499 INFO L462 AbstractCegarLoop]: Abstraction has 199613 states and 830031 transitions. [2019-12-07 17:05:20,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:20,499 INFO L276 IsEmpty]: Start isEmpty. Operand 199613 states and 830031 transitions. [2019-12-07 17:05:20,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:05:20,502 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:20,502 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:20,502 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:20,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:20,502 INFO L82 PathProgramCache]: Analyzing trace with hash 986322522, now seen corresponding path program 1 times [2019-12-07 17:05:20,503 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:05:20,503 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205929316] [2019-12-07 17:05:20,503 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:20,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:20,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:20,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205929316] [2019-12-07 17:05:20,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:20,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:05:20,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872949307] [2019-12-07 17:05:20,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:05:20,560 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:05:20,560 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:05:20,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:05:20,561 INFO L87 Difference]: Start difference. First operand 199613 states and 830031 transitions. Second operand 4 states. [2019-12-07 17:05:21,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:21,818 INFO L93 Difference]: Finished difference Result 248914 states and 1025031 transitions. [2019-12-07 17:05:21,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:05:21,819 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:05:21,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:22,466 INFO L225 Difference]: With dead ends: 248914 [2019-12-07 17:05:22,466 INFO L226 Difference]: Without dead ends: 248914 [2019-12-07 17:05:22,466 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:28,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248914 states. [2019-12-07 17:05:34,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248914 to 210888. [2019-12-07 17:05:34,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210888 states. [2019-12-07 17:05:35,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210888 states to 210888 states and 876967 transitions. [2019-12-07 17:05:35,516 INFO L78 Accepts]: Start accepts. Automaton has 210888 states and 876967 transitions. Word has length 13 [2019-12-07 17:05:35,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:35,517 INFO L462 AbstractCegarLoop]: Abstraction has 210888 states and 876967 transitions. [2019-12-07 17:05:35,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:05:35,517 INFO L276 IsEmpty]: Start isEmpty. Operand 210888 states and 876967 transitions. [2019-12-07 17:05:35,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:05:35,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:35,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:35,538 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:35,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:35,538 INFO L82 PathProgramCache]: Analyzing trace with hash -462367392, now seen corresponding path program 1 times [2019-12-07 17:05:35,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:05:35,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245052746] [2019-12-07 17:05:35,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:35,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:35,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:35,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245052746] [2019-12-07 17:05:35,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:35,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:35,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971850247] [2019-12-07 17:05:35,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:05:35,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:05:35,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:05:35,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:35,610 INFO L87 Difference]: Start difference. First operand 210888 states and 876967 transitions. Second operand 5 states. [2019-12-07 17:05:37,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:37,882 INFO L93 Difference]: Finished difference Result 307547 states and 1250410 transitions. [2019-12-07 17:05:37,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:05:37,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:05:37,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:38,657 INFO L225 Difference]: With dead ends: 307547 [2019-12-07 17:05:38,657 INFO L226 Difference]: Without dead ends: 307407 [2019-12-07 17:05:38,658 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:05:45,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307407 states. [2019-12-07 17:05:49,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307407 to 231468. [2019-12-07 17:05:49,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231468 states. [2019-12-07 17:05:50,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231468 states to 231468 states and 958023 transitions. [2019-12-07 17:05:50,641 INFO L78 Accepts]: Start accepts. Automaton has 231468 states and 958023 transitions. Word has length 19 [2019-12-07 17:05:50,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:05:50,642 INFO L462 AbstractCegarLoop]: Abstraction has 231468 states and 958023 transitions. [2019-12-07 17:05:50,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:05:50,642 INFO L276 IsEmpty]: Start isEmpty. Operand 231468 states and 958023 transitions. [2019-12-07 17:05:50,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:05:50,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:05:50,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:05:50,654 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:05:50,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:05:50,654 INFO L82 PathProgramCache]: Analyzing trace with hash 1565841874, now seen corresponding path program 1 times [2019-12-07 17:05:50,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:05:50,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276102543] [2019-12-07 17:05:50,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:05:50,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:05:50,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:05:50,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276102543] [2019-12-07 17:05:50,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:05:50,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:05:50,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1600062288] [2019-12-07 17:05:50,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:05:50,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:05:50,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:05:50,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:05:50,695 INFO L87 Difference]: Start difference. First operand 231468 states and 958023 transitions. Second operand 5 states. [2019-12-07 17:05:52,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:05:52,552 INFO L93 Difference]: Finished difference Result 336881 states and 1367511 transitions. [2019-12-07 17:05:52,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:05:52,553 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:05:52,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:05:56,605 INFO L225 Difference]: With dead ends: 336881 [2019-12-07 17:05:56,605 INFO L226 Difference]: Without dead ends: 336818 [2019-12-07 17:05:56,605 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:06:03,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336818 states. [2019-12-07 17:06:07,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336818 to 236903. [2019-12-07 17:06:07,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236903 states. [2019-12-07 17:06:08,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236903 states to 236903 states and 979540 transitions. [2019-12-07 17:06:08,193 INFO L78 Accepts]: Start accepts. Automaton has 236903 states and 979540 transitions. Word has length 19 [2019-12-07 17:06:08,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:08,193 INFO L462 AbstractCegarLoop]: Abstraction has 236903 states and 979540 transitions. [2019-12-07 17:06:08,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:06:08,194 INFO L276 IsEmpty]: Start isEmpty. Operand 236903 states and 979540 transitions. [2019-12-07 17:06:08,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:06:08,208 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:08,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:08,208 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:08,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:08,208 INFO L82 PathProgramCache]: Analyzing trace with hash 1619434579, now seen corresponding path program 1 times [2019-12-07 17:06:08,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:08,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141907362] [2019-12-07 17:06:08,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:08,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:08,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:08,255 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141907362] [2019-12-07 17:06:08,255 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:08,255 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:06:08,255 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806989432] [2019-12-07 17:06:08,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:06:08,256 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:08,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:06:08,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:06:08,256 INFO L87 Difference]: Start difference. First operand 236903 states and 979540 transitions. Second operand 5 states. [2019-12-07 17:06:10,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:10,512 INFO L93 Difference]: Finished difference Result 346916 states and 1409827 transitions. [2019-12-07 17:06:10,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:06:10,512 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:06:10,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:12,035 INFO L225 Difference]: With dead ends: 346916 [2019-12-07 17:06:12,036 INFO L226 Difference]: Without dead ends: 346853 [2019-12-07 17:06:12,036 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:06:19,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346853 states. [2019-12-07 17:06:23,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346853 to 254808. [2019-12-07 17:06:23,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254808 states. [2019-12-07 17:06:24,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254808 states to 254808 states and 1052340 transitions. [2019-12-07 17:06:24,484 INFO L78 Accepts]: Start accepts. Automaton has 254808 states and 1052340 transitions. Word has length 19 [2019-12-07 17:06:24,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:24,484 INFO L462 AbstractCegarLoop]: Abstraction has 254808 states and 1052340 transitions. [2019-12-07 17:06:24,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:06:24,484 INFO L276 IsEmpty]: Start isEmpty. Operand 254808 states and 1052340 transitions. [2019-12-07 17:06:24,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:06:24,546 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:24,546 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:24,546 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:24,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:24,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1274808359, now seen corresponding path program 1 times [2019-12-07 17:06:24,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:24,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333664726] [2019-12-07 17:06:24,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:24,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:24,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:24,600 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333664726] [2019-12-07 17:06:24,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:24,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:06:24,601 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [341821782] [2019-12-07 17:06:24,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:06:24,601 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:24,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:06:24,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:06:24,601 INFO L87 Difference]: Start difference. First operand 254808 states and 1052340 transitions. Second operand 6 states. [2019-12-07 17:06:26,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:26,646 INFO L93 Difference]: Finished difference Result 304347 states and 1241932 transitions. [2019-12-07 17:06:26,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:06:26,647 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 17:06:26,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:30,776 INFO L225 Difference]: With dead ends: 304347 [2019-12-07 17:06:30,777 INFO L226 Difference]: Without dead ends: 304207 [2019-12-07 17:06:30,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:06:37,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304207 states. [2019-12-07 17:06:40,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304207 to 209314. [2019-12-07 17:06:40,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209314 states. [2019-12-07 17:06:41,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209314 states to 209314 states and 868471 transitions. [2019-12-07 17:06:41,403 INFO L78 Accepts]: Start accepts. Automaton has 209314 states and 868471 transitions. Word has length 25 [2019-12-07 17:06:41,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:41,404 INFO L462 AbstractCegarLoop]: Abstraction has 209314 states and 868471 transitions. [2019-12-07 17:06:41,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:06:41,404 INFO L276 IsEmpty]: Start isEmpty. Operand 209314 states and 868471 transitions. [2019-12-07 17:06:41,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:06:41,477 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:41,477 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:41,477 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:41,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:41,477 INFO L82 PathProgramCache]: Analyzing trace with hash -730041914, now seen corresponding path program 1 times [2019-12-07 17:06:41,478 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:41,478 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815989529] [2019-12-07 17:06:41,478 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:41,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:41,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:41,510 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815989529] [2019-12-07 17:06:41,510 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:41,510 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:06:41,511 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906621003] [2019-12-07 17:06:41,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:06:41,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:41,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:06:41,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:41,511 INFO L87 Difference]: Start difference. First operand 209314 states and 868471 transitions. Second operand 3 states. [2019-12-07 17:06:43,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:43,146 INFO L93 Difference]: Finished difference Result 252030 states and 1035145 transitions. [2019-12-07 17:06:43,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:06:43,147 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:06:43,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:43,834 INFO L225 Difference]: With dead ends: 252030 [2019-12-07 17:06:43,834 INFO L226 Difference]: Without dead ends: 252030 [2019-12-07 17:06:43,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:49,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252030 states. [2019-12-07 17:06:53,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252030 to 220743. [2019-12-07 17:06:53,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220743 states. [2019-12-07 17:06:54,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220743 states to 220743 states and 915334 transitions. [2019-12-07 17:06:54,083 INFO L78 Accepts]: Start accepts. Automaton has 220743 states and 915334 transitions. Word has length 27 [2019-12-07 17:06:54,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:54,084 INFO L462 AbstractCegarLoop]: Abstraction has 220743 states and 915334 transitions. [2019-12-07 17:06:54,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:06:54,084 INFO L276 IsEmpty]: Start isEmpty. Operand 220743 states and 915334 transitions. [2019-12-07 17:06:54,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:06:54,152 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:54,152 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:54,152 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:54,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:54,152 INFO L82 PathProgramCache]: Analyzing trace with hash -730215328, now seen corresponding path program 1 times [2019-12-07 17:06:54,153 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:54,153 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696386567] [2019-12-07 17:06:54,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:54,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:54,176 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:54,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696386567] [2019-12-07 17:06:54,177 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:54,177 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:06:54,177 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104140855] [2019-12-07 17:06:54,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:06:54,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:54,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:06:54,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:54,177 INFO L87 Difference]: Start difference. First operand 220743 states and 915334 transitions. Second operand 3 states. [2019-12-07 17:06:54,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:54,309 INFO L93 Difference]: Finished difference Result 44700 states and 144997 transitions. [2019-12-07 17:06:54,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:06:54,310 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:06:54,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:54,378 INFO L225 Difference]: With dead ends: 44700 [2019-12-07 17:06:54,378 INFO L226 Difference]: Without dead ends: 44700 [2019-12-07 17:06:54,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:54,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44700 states. [2019-12-07 17:06:55,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44700 to 44700. [2019-12-07 17:06:55,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44700 states. [2019-12-07 17:06:55,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44700 states to 44700 states and 144997 transitions. [2019-12-07 17:06:55,500 INFO L78 Accepts]: Start accepts. Automaton has 44700 states and 144997 transitions. Word has length 27 [2019-12-07 17:06:55,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:55,500 INFO L462 AbstractCegarLoop]: Abstraction has 44700 states and 144997 transitions. [2019-12-07 17:06:55,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:06:55,500 INFO L276 IsEmpty]: Start isEmpty. Operand 44700 states and 144997 transitions. [2019-12-07 17:06:55,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 17:06:55,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:55,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:55,519 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:55,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:55,519 INFO L82 PathProgramCache]: Analyzing trace with hash -955256505, now seen corresponding path program 1 times [2019-12-07 17:06:55,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:55,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775212014] [2019-12-07 17:06:55,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:55,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:55,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:55,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775212014] [2019-12-07 17:06:55,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:55,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:06:55,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1954524959] [2019-12-07 17:06:55,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:06:55,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:55,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:06:55,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:06:55,565 INFO L87 Difference]: Start difference. First operand 44700 states and 144997 transitions. Second operand 4 states. [2019-12-07 17:06:55,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:55,596 INFO L93 Difference]: Finished difference Result 8211 states and 22128 transitions. [2019-12-07 17:06:55,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:06:55,597 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 17:06:55,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:55,604 INFO L225 Difference]: With dead ends: 8211 [2019-12-07 17:06:55,604 INFO L226 Difference]: Without dead ends: 8211 [2019-12-07 17:06:55,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:06:55,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8211 states. [2019-12-07 17:06:55,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8211 to 8071. [2019-12-07 17:06:55,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8071 states. [2019-12-07 17:06:55,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8071 states to 8071 states and 21728 transitions. [2019-12-07 17:06:55,701 INFO L78 Accepts]: Start accepts. Automaton has 8071 states and 21728 transitions. Word has length 39 [2019-12-07 17:06:55,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:55,701 INFO L462 AbstractCegarLoop]: Abstraction has 8071 states and 21728 transitions. [2019-12-07 17:06:55,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:06:55,701 INFO L276 IsEmpty]: Start isEmpty. Operand 8071 states and 21728 transitions. [2019-12-07 17:06:55,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 17:06:55,707 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:55,707 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:55,707 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:55,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:55,707 INFO L82 PathProgramCache]: Analyzing trace with hash 296426846, now seen corresponding path program 1 times [2019-12-07 17:06:55,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:55,707 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415161646] [2019-12-07 17:06:55,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:55,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:55,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:55,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415161646] [2019-12-07 17:06:55,749 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:55,749 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:06:55,749 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772276781] [2019-12-07 17:06:55,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:06:55,749 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:55,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:06:55,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:06:55,750 INFO L87 Difference]: Start difference. First operand 8071 states and 21728 transitions. Second operand 5 states. [2019-12-07 17:06:55,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:55,779 INFO L93 Difference]: Finished difference Result 5424 states and 15553 transitions. [2019-12-07 17:06:55,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:06:55,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 17:06:55,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:55,783 INFO L225 Difference]: With dead ends: 5424 [2019-12-07 17:06:55,783 INFO L226 Difference]: Without dead ends: 5424 [2019-12-07 17:06:55,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:06:55,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5424 states. [2019-12-07 17:06:55,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5424 to 5011. [2019-12-07 17:06:55,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 17:06:55,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14436 transitions. [2019-12-07 17:06:55,848 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14436 transitions. Word has length 51 [2019-12-07 17:06:55,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:55,849 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14436 transitions. [2019-12-07 17:06:55,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:06:55,849 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14436 transitions. [2019-12-07 17:06:55,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:06:55,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:55,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:55,852 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:55,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:55,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1256158932, now seen corresponding path program 1 times [2019-12-07 17:06:55,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:55,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545747925] [2019-12-07 17:06:55,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:55,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:55,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:55,913 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [545747925] [2019-12-07 17:06:55,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:55,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:06:55,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734787975] [2019-12-07 17:06:55,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:06:55,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:55,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:06:55,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:55,914 INFO L87 Difference]: Start difference. First operand 5011 states and 14436 transitions. Second operand 3 states. [2019-12-07 17:06:55,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:55,932 INFO L93 Difference]: Finished difference Result 5011 states and 14215 transitions. [2019-12-07 17:06:55,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:06:55,932 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:06:55,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:55,936 INFO L225 Difference]: With dead ends: 5011 [2019-12-07 17:06:55,936 INFO L226 Difference]: Without dead ends: 5011 [2019-12-07 17:06:55,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:55,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5011 states. [2019-12-07 17:06:55,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5011 to 5011. [2019-12-07 17:06:55,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5011 states. [2019-12-07 17:06:55,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5011 states to 5011 states and 14215 transitions. [2019-12-07 17:06:55,996 INFO L78 Accepts]: Start accepts. Automaton has 5011 states and 14215 transitions. Word has length 65 [2019-12-07 17:06:55,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:55,996 INFO L462 AbstractCegarLoop]: Abstraction has 5011 states and 14215 transitions. [2019-12-07 17:06:55,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:06:55,996 INFO L276 IsEmpty]: Start isEmpty. Operand 5011 states and 14215 transitions. [2019-12-07 17:06:55,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:06:55,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:55,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:56,000 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:56,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:56,000 INFO L82 PathProgramCache]: Analyzing trace with hash -1760720695, now seen corresponding path program 1 times [2019-12-07 17:06:56,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:56,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088154428] [2019-12-07 17:06:56,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:56,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:56,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:56,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088154428] [2019-12-07 17:06:56,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:56,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:06:56,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8602937] [2019-12-07 17:06:56,068 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:06:56,068 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:56,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:06:56,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:06:56,068 INFO L87 Difference]: Start difference. First operand 5011 states and 14215 transitions. Second operand 5 states. [2019-12-07 17:06:56,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:56,238 INFO L93 Difference]: Finished difference Result 7347 states and 20695 transitions. [2019-12-07 17:06:56,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:06:56,239 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 17:06:56,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:56,245 INFO L225 Difference]: With dead ends: 7347 [2019-12-07 17:06:56,245 INFO L226 Difference]: Without dead ends: 7347 [2019-12-07 17:06:56,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:06:56,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7347 states. [2019-12-07 17:06:56,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7347 to 6377. [2019-12-07 17:06:56,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6377 states. [2019-12-07 17:06:56,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6377 states to 6377 states and 18028 transitions. [2019-12-07 17:06:56,332 INFO L78 Accepts]: Start accepts. Automaton has 6377 states and 18028 transitions. Word has length 66 [2019-12-07 17:06:56,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:56,332 INFO L462 AbstractCegarLoop]: Abstraction has 6377 states and 18028 transitions. [2019-12-07 17:06:56,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:06:56,332 INFO L276 IsEmpty]: Start isEmpty. Operand 6377 states and 18028 transitions. [2019-12-07 17:06:56,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:06:56,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:56,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:56,337 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:56,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:56,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1764113003, now seen corresponding path program 2 times [2019-12-07 17:06:56,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:56,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811635220] [2019-12-07 17:06:56,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:56,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:56,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:56,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811635220] [2019-12-07 17:06:56,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:56,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:06:56,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451236975] [2019-12-07 17:06:56,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:06:56,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:56,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:06:56,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:06:56,388 INFO L87 Difference]: Start difference. First operand 6377 states and 18028 transitions. Second operand 5 states. [2019-12-07 17:06:56,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:56,582 INFO L93 Difference]: Finished difference Result 9089 states and 25480 transitions. [2019-12-07 17:06:56,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:06:56,583 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 17:06:56,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:56,590 INFO L225 Difference]: With dead ends: 9089 [2019-12-07 17:06:56,590 INFO L226 Difference]: Without dead ends: 9089 [2019-12-07 17:06:56,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:06:56,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9089 states. [2019-12-07 17:06:56,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9089 to 7049. [2019-12-07 17:06:56,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7049 states. [2019-12-07 17:06:56,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7049 states to 7049 states and 19977 transitions. [2019-12-07 17:06:56,689 INFO L78 Accepts]: Start accepts. Automaton has 7049 states and 19977 transitions. Word has length 66 [2019-12-07 17:06:56,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:56,690 INFO L462 AbstractCegarLoop]: Abstraction has 7049 states and 19977 transitions. [2019-12-07 17:06:56,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:06:56,690 INFO L276 IsEmpty]: Start isEmpty. Operand 7049 states and 19977 transitions. [2019-12-07 17:06:56,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:06:56,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:56,695 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:56,695 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:56,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:56,696 INFO L82 PathProgramCache]: Analyzing trace with hash 956425645, now seen corresponding path program 3 times [2019-12-07 17:06:56,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:56,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200690210] [2019-12-07 17:06:56,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:56,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:56,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:56,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [200690210] [2019-12-07 17:06:56,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:56,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:06:56,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609879319] [2019-12-07 17:06:56,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:06:56,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:56,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:06:56,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:06:56,758 INFO L87 Difference]: Start difference. First operand 7049 states and 19977 transitions. Second operand 6 states. [2019-12-07 17:06:57,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:57,016 INFO L93 Difference]: Finished difference Result 9440 states and 26391 transitions. [2019-12-07 17:06:57,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:06:57,017 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 17:06:57,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:57,024 INFO L225 Difference]: With dead ends: 9440 [2019-12-07 17:06:57,024 INFO L226 Difference]: Without dead ends: 9440 [2019-12-07 17:06:57,025 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:06:57,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9440 states. [2019-12-07 17:06:57,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9440 to 7420. [2019-12-07 17:06:57,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7420 states. [2019-12-07 17:06:57,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7420 states to 7420 states and 21016 transitions. [2019-12-07 17:06:57,130 INFO L78 Accepts]: Start accepts. Automaton has 7420 states and 21016 transitions. Word has length 66 [2019-12-07 17:06:57,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:57,130 INFO L462 AbstractCegarLoop]: Abstraction has 7420 states and 21016 transitions. [2019-12-07 17:06:57,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:06:57,130 INFO L276 IsEmpty]: Start isEmpty. Operand 7420 states and 21016 transitions. [2019-12-07 17:06:57,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:06:57,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:57,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:57,136 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:57,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:57,136 INFO L82 PathProgramCache]: Analyzing trace with hash 426723893, now seen corresponding path program 4 times [2019-12-07 17:06:57,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:57,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383897596] [2019-12-07 17:06:57,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:57,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:57,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:57,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383897596] [2019-12-07 17:06:57,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:57,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:06:57,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2113414737] [2019-12-07 17:06:57,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:06:57,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:57,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:06:57,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:57,171 INFO L87 Difference]: Start difference. First operand 7420 states and 21016 transitions. Second operand 3 states. [2019-12-07 17:06:57,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:57,209 INFO L93 Difference]: Finished difference Result 7420 states and 21015 transitions. [2019-12-07 17:06:57,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:06:57,210 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:06:57,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:57,216 INFO L225 Difference]: With dead ends: 7420 [2019-12-07 17:06:57,216 INFO L226 Difference]: Without dead ends: 7420 [2019-12-07 17:06:57,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:57,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7420 states. [2019-12-07 17:06:57,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7420 to 5669. [2019-12-07 17:06:57,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5669 states. [2019-12-07 17:06:57,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5669 states to 5669 states and 16144 transitions. [2019-12-07 17:06:57,299 INFO L78 Accepts]: Start accepts. Automaton has 5669 states and 16144 transitions. Word has length 66 [2019-12-07 17:06:57,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:57,299 INFO L462 AbstractCegarLoop]: Abstraction has 5669 states and 16144 transitions. [2019-12-07 17:06:57,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:06:57,300 INFO L276 IsEmpty]: Start isEmpty. Operand 5669 states and 16144 transitions. [2019-12-07 17:06:57,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:06:57,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:57,304 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:57,304 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:57,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:57,304 INFO L82 PathProgramCache]: Analyzing trace with hash -1488093963, now seen corresponding path program 1 times [2019-12-07 17:06:57,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:57,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996562903] [2019-12-07 17:06:57,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:57,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:57,337 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:57,337 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996562903] [2019-12-07 17:06:57,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:57,337 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:06:57,338 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310359987] [2019-12-07 17:06:57,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:06:57,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:57,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:06:57,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:57,338 INFO L87 Difference]: Start difference. First operand 5669 states and 16144 transitions. Second operand 3 states. [2019-12-07 17:06:57,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:57,358 INFO L93 Difference]: Finished difference Result 5242 states and 14662 transitions. [2019-12-07 17:06:57,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:06:57,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:06:57,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:57,363 INFO L225 Difference]: With dead ends: 5242 [2019-12-07 17:06:57,363 INFO L226 Difference]: Without dead ends: 5242 [2019-12-07 17:06:57,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:06:57,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5242 states. [2019-12-07 17:06:57,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5242 to 4738. [2019-12-07 17:06:57,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4738 states. [2019-12-07 17:06:57,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4738 states to 4738 states and 13246 transitions. [2019-12-07 17:06:57,426 INFO L78 Accepts]: Start accepts. Automaton has 4738 states and 13246 transitions. Word has length 67 [2019-12-07 17:06:57,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:57,426 INFO L462 AbstractCegarLoop]: Abstraction has 4738 states and 13246 transitions. [2019-12-07 17:06:57,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:06:57,426 INFO L276 IsEmpty]: Start isEmpty. Operand 4738 states and 13246 transitions. [2019-12-07 17:06:57,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:06:57,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:57,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:57,430 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:57,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:57,430 INFO L82 PathProgramCache]: Analyzing trace with hash -2084050195, now seen corresponding path program 1 times [2019-12-07 17:06:57,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:57,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312368359] [2019-12-07 17:06:57,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:57,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:57,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:57,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312368359] [2019-12-07 17:06:57,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:57,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:06:57,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037481050] [2019-12-07 17:06:57,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:06:57,507 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:57,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:06:57,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:06:57,507 INFO L87 Difference]: Start difference. First operand 4738 states and 13246 transitions. Second operand 6 states. [2019-12-07 17:06:57,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:57,571 INFO L93 Difference]: Finished difference Result 8114 states and 22667 transitions. [2019-12-07 17:06:57,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:06:57,571 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 17:06:57,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:57,575 INFO L225 Difference]: With dead ends: 8114 [2019-12-07 17:06:57,575 INFO L226 Difference]: Without dead ends: 4167 [2019-12-07 17:06:57,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:06:57,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4167 states. [2019-12-07 17:06:57,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4167 to 3735. [2019-12-07 17:06:57,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3735 states. [2019-12-07 17:06:57,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3735 states to 3735 states and 10373 transitions. [2019-12-07 17:06:57,625 INFO L78 Accepts]: Start accepts. Automaton has 3735 states and 10373 transitions. Word has length 68 [2019-12-07 17:06:57,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:57,625 INFO L462 AbstractCegarLoop]: Abstraction has 3735 states and 10373 transitions. [2019-12-07 17:06:57,625 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:06:57,625 INFO L276 IsEmpty]: Start isEmpty. Operand 3735 states and 10373 transitions. [2019-12-07 17:06:57,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:06:57,628 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:57,628 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:57,628 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:57,628 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:57,628 INFO L82 PathProgramCache]: Analyzing trace with hash -256019789, now seen corresponding path program 2 times [2019-12-07 17:06:57,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:57,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039485327] [2019-12-07 17:06:57,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:57,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:06:57,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:06:57,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039485327] [2019-12-07 17:06:57,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:06:57,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:06:57,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122645590] [2019-12-07 17:06:57,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 17:06:57,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:06:57,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 17:06:57,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:06:57,731 INFO L87 Difference]: Start difference. First operand 3735 states and 10373 transitions. Second operand 9 states. [2019-12-07 17:06:57,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:06:57,969 INFO L93 Difference]: Finished difference Result 6083 states and 17015 transitions. [2019-12-07 17:06:57,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 17:06:57,970 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 68 [2019-12-07 17:06:57,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:06:57,972 INFO L225 Difference]: With dead ends: 6083 [2019-12-07 17:06:57,972 INFO L226 Difference]: Without dead ends: 2359 [2019-12-07 17:06:57,972 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=176, Unknown=0, NotChecked=0, Total=240 [2019-12-07 17:06:57,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2359 states. [2019-12-07 17:06:58,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2359 to 1963. [2019-12-07 17:06:58,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1963 states. [2019-12-07 17:06:58,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1963 states to 1963 states and 5460 transitions. [2019-12-07 17:06:58,003 INFO L78 Accepts]: Start accepts. Automaton has 1963 states and 5460 transitions. Word has length 68 [2019-12-07 17:06:58,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:06:58,003 INFO L462 AbstractCegarLoop]: Abstraction has 1963 states and 5460 transitions. [2019-12-07 17:06:58,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 17:06:58,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1963 states and 5460 transitions. [2019-12-07 17:06:58,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:06:58,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:06:58,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:06:58,005 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:06:58,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:06:58,005 INFO L82 PathProgramCache]: Analyzing trace with hash -1266757317, now seen corresponding path program 3 times [2019-12-07 17:06:58,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:06:58,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268603787] [2019-12-07 17:06:58,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:06:58,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:06:58,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:06:58,302 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 17:06:58,302 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:06:58,304 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20|) |v_ULTIMATE.start_main_~#t760~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX~0_23) (= (store .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20| 1) |v_#valid_55|) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= 0 v_~x$r_buff0_thd3~0_99) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (= 0 |v_ULTIMATE.start_main_~#t760~0.offset_17|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t760~0.base_20|) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t760~0.base_20| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20|) 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t760~0.base=|v_ULTIMATE.start_main_~#t760~0.base_20|, ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t760~0.offset=|v_ULTIMATE.start_main_~#t760~0.offset_17|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_21|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_21|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_17|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t760~0.base, ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t761~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t760~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t761~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t762~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:06:58,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t761~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t761~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t761~0.offset_11|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13|) |v_ULTIMATE.start_main_~#t761~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t761~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t761~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t761~0.base] because there is no mapped edge [2019-12-07 17:06:58,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t762~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t762~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t762~0.base_13| 4) |v_#length_15|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t762~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13|) |v_ULTIMATE.start_main_~#t762~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13| 1) |v_#valid_34|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t762~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:06:58,305 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:06:58,307 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1020167835 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-1020167835 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1020167835| ~x$w_buff1~0_In-1020167835) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In-1020167835 |P2Thread1of1ForFork2_#t~ite15_Out-1020167835|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1020167835, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1020167835, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1020167835, ~x~0=~x~0_In-1020167835} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1020167835|, ~x$w_buff1~0=~x$w_buff1~0_In-1020167835, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1020167835, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1020167835, ~x~0=~x~0_In-1020167835} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:06:58,307 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 17:06:58,307 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1982859928 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In1982859928 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out1982859928| |P0Thread1of1ForFork0_#t~ite3_Out1982859928|))) (or (and (= ~x~0_In1982859928 |P0Thread1of1ForFork0_#t~ite3_Out1982859928|) .cse0 (or .cse1 .cse2)) (and (not .cse1) (not .cse2) (= ~x$w_buff1~0_In1982859928 |P0Thread1of1ForFork0_#t~ite3_Out1982859928|) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1982859928, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1982859928, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1982859928, ~x~0=~x~0_In1982859928} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1982859928|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1982859928|, ~x$w_buff1~0=~x$w_buff1~0_In1982859928, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1982859928, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1982859928, ~x~0=~x~0_In1982859928} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:06:58,307 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1174044983 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1174044983 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-1174044983| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1174044983 |P0Thread1of1ForFork0_#t~ite5_Out-1174044983|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1174044983, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1174044983} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1174044983|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1174044983, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1174044983} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:06:58,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-305101916 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-305101916 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-305101916|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-305101916 |P2Thread1of1ForFork2_#t~ite17_Out-305101916|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-305101916, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-305101916} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-305101916, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-305101916|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-305101916} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:06:58,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In125374844 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In125374844 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In125374844 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In125374844 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out125374844| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out125374844| ~x$w_buff1_used~0_In125374844) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In125374844, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In125374844, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In125374844, ~x$w_buff0_used~0=~x$w_buff0_used~0_In125374844} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In125374844, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In125374844, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In125374844, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out125374844|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In125374844} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:06:58,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1227405943 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-1227405943 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1227405943 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1227405943 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-1227405943| ~x$w_buff1_used~0_In-1227405943) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1227405943|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227405943, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1227405943, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1227405943, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227405943} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1227405943|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227405943, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1227405943, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1227405943, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227405943} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:06:58,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-602282521 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-602282521 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out-602282521| ~x$r_buff0_thd3~0_In-602282521)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-602282521|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-602282521, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-602282521} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-602282521, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-602282521|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-602282521} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:06:58,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In2044418505 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In2044418505 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2044418505 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In2044418505 256)))) (or (and (= ~x$r_buff1_thd3~0_In2044418505 |P2Thread1of1ForFork2_#t~ite20_Out2044418505|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out2044418505|)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2044418505, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2044418505, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2044418505, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2044418505} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out2044418505|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2044418505, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2044418505, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2044418505, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2044418505} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:06:58,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:06:58,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1322609719 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1322609719 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1322609719|) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1322609719| ~x$w_buff0_used~0_In-1322609719) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1322609719, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1322609719} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1322609719|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1322609719, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1322609719} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:06:58,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In-222958153 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-222958153 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-222958153 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-222958153 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-222958153|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-222958153 |P1Thread1of1ForFork1_#t~ite12_Out-222958153|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-222958153, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-222958153, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-222958153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-222958153} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-222958153, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-222958153, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-222958153|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-222958153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-222958153} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:06:58,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1000501822 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1000501822 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-1000501822 ~x$r_buff0_thd2~0_In-1000501822))) (or (and (= ~x$r_buff0_thd2~0_Out-1000501822 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1000501822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1000501822} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1000501822|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1000501822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1000501822} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:06:58,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-855489259 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-855489259 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-855489259 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-855489259 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-855489259|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out-855489259| ~x$r_buff1_thd2~0_In-855489259)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-855489259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-855489259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-855489259, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-855489259} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-855489259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-855489259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-855489259, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-855489259|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-855489259} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:06:58,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:06:58,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1006844002 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1006844002 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1006844002| ~x$r_buff0_thd1~0_In-1006844002) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out-1006844002| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1006844002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1006844002} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1006844002, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1006844002|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1006844002} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:06:58,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1023064393 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1023064393 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1023064393 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In1023064393 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1023064393|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd1~0_In1023064393 |P0Thread1of1ForFork0_#t~ite8_Out1023064393|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1023064393, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1023064393, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1023064393, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1023064393} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1023064393, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1023064393|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1023064393, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1023064393, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1023064393} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:06:58,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:06:58,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:06:58,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1709816265| |ULTIMATE.start_main_#t~ite24_Out-1709816265|)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1709816265 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1709816265 256)))) (or (and .cse0 (not .cse1) (= ~x$w_buff1~0_In-1709816265 |ULTIMATE.start_main_#t~ite24_Out-1709816265|) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out-1709816265| ~x~0_In-1709816265)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1709816265, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1709816265, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1709816265, ~x~0=~x~0_In-1709816265} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-1709816265, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1709816265|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1709816265|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1709816265, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1709816265, ~x~0=~x~0_In-1709816265} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:06:58,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In347075738 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In347075738 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out347075738|) (not .cse1)) (and (= ~x$w_buff0_used~0_In347075738 |ULTIMATE.start_main_#t~ite26_Out347075738|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In347075738, ~x$w_buff0_used~0=~x$w_buff0_used~0_In347075738} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In347075738, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out347075738|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In347075738} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:06:58,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In-441266197 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-441266197 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-441266197 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-441266197 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-441266197| 0)) (and (= |ULTIMATE.start_main_#t~ite27_Out-441266197| ~x$w_buff1_used~0_In-441266197) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-441266197, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-441266197, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-441266197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-441266197} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-441266197, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-441266197, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-441266197|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-441266197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-441266197} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:06:58,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1259795472 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1259795472 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1259795472 |ULTIMATE.start_main_#t~ite28_Out-1259795472|)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-1259795472|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1259795472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1259795472} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1259795472, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1259795472|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1259795472} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:06:58,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1009631690 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1009631690 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1009631690 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1009631690 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-1009631690| ~x$r_buff1_thd0~0_In-1009631690) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-1009631690|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1009631690, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1009631690, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1009631690, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1009631690} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1009631690, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1009631690|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1009631690, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1009631690, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1009631690} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:06:58,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:06:58,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:06:58,316 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:06:58,374 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:06:58 BasicIcfg [2019-12-07 17:06:58,374 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:06:58,374 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:06:58,374 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:06:58,374 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:06:58,375 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:04:27" (3/4) ... [2019-12-07 17:06:58,376 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:06:58,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_57| 0 0))) (and (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t760~0.base_20|) |v_ULTIMATE.start_main_~#t760~0.offset_17| 0))) (= 0 v_~__unbuffered_p2_EAX~0_23) (= (store .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20| 1) |v_#valid_55|) (= v_~z~0_18 0) (= 0 v_~weak$$choice0~0_14) (= v_~x$flush_delayed~0_41 0) (= 0 v_~x$r_buff0_thd3~0_99) (= v_~x$r_buff1_thd1~0_192 0) (= 0 v_~x$w_buff0~0_203) (= v_~weak$$choice2~0_116 0) (= 0 |v_ULTIMATE.start_main_~#t760~0.offset_17|) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$r_buff1_thd3~0_193) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_195) (= v_~x$mem_tmp~0_22 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t760~0.base_20|) (= v_~__unbuffered_p2_EBX~0_23 0) (= 0 v_~x$r_buff0_thd2~0_205) (= v_~main$tmp_guard1~0_28 0) (= v_~x$r_buff0_thd0~0_335 0) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff1_thd0~0_279 0) (= 0 v_~x$w_buff1_used~0_401) (= v_~__unbuffered_cnt~0_145 0) (= 0 v_~x$r_buff1_thd2~0_186) (= 0 v_~x$w_buff0_used~0_743) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t760~0.base_20| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= 0 v_~x~0_213) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_22 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t760~0.base_20|) 0) (= 0 v_~x$r_buff0_thd1~0_88) (= 0 |v_#NULL.base_5|) (= v_~y~0_136 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_57|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t760~0.base=|v_ULTIMATE.start_main_~#t760~0.base_20|, ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_203, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_41, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_31|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_25|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_40|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_192, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_99, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_39|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_335, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_23, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ~x$w_buff1~0=v_~x$w_buff1~0_195, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_46|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_401, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_186, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_50|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_156|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, ~x~0=v_~x~0_213, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_88, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_27|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_193, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_33|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_22, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_273|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_34|, ULTIMATE.start_main_~#t760~0.offset=|v_ULTIMATE.start_main_~#t760~0.offset_17|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_279, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_205, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_21|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_42|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_743, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_162|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_21|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_55|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_17|, #memory_int=|v_#memory_int_23|, ~z~0=v_~z~0_18, ~weak$$choice2~0=v_~weak$$choice2~0_116, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t760~0.base, ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t761~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t760~0.offset, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t761~0.base, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t762~0.offset, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:06:58,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L810-1-->L812: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t761~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13|)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t761~0.base_13|) (= 0 |v_ULTIMATE.start_main_~#t761~0.offset_11|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t761~0.base_13|) |v_ULTIMATE.start_main_~#t761~0.offset_11| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t761~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t761~0.base_13| 1) |v_#valid_36|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t761~0.offset=|v_ULTIMATE.start_main_~#t761~0.offset_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|, ULTIMATE.start_main_~#t761~0.base=|v_ULTIMATE.start_main_~#t761~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t761~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t761~0.base] because there is no mapped edge [2019-12-07 17:06:58,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L812-1-->L814: Formula: (and (not (= |v_ULTIMATE.start_main_~#t762~0.base_13| 0)) (= 0 |v_ULTIMATE.start_main_~#t762~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t762~0.base_13| 4) |v_#length_15|) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t762~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t762~0.base_13|) |v_ULTIMATE.start_main_~#t762~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t762~0.base_13| 1) |v_#valid_34|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t762~0.base=|v_ULTIMATE.start_main_~#t762~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t762~0.offset=|v_ULTIMATE.start_main_~#t762~0.offset_11|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t762~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t762~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 17:06:58,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] P1ENTRY-->L4-3: Formula: (and (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| (ite (not (and (not (= (mod v_~x$w_buff1_used~0_145 256) 0)) (not (= 0 (mod v_~x$w_buff0_used~0_300 256))))) 1 0)) (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= v_~x$w_buff0~0_44 v_~x$w_buff1~0_51) (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10)) (= 2 v_~x$w_buff0~0_43) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= 1 v_~x$w_buff0_used~0_300) (= v_~x$w_buff0_used~0_301 v_~x$w_buff1_used~0_145)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_44, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_301} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_10, ~x$w_buff0~0=v_~x$w_buff0~0_43, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_8|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, ~x$w_buff1~0=v_~x$w_buff1~0_51, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_145, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_300} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:06:58,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L787-2-->L787-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1020167835 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-1020167835 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1020167835| ~x$w_buff1~0_In-1020167835) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In-1020167835 |P2Thread1of1ForFork2_#t~ite15_Out-1020167835|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1020167835, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1020167835, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1020167835, ~x~0=~x~0_In-1020167835} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1020167835|, ~x$w_buff1~0=~x$w_buff1~0_In-1020167835, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1020167835, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1020167835, ~x~0=~x~0_In-1020167835} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:06:58,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L787-4-->L788: Formula: (= v_~x~0_30 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_7|, ~x~0=v_~x~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 17:06:58,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L735-2-->L735-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1982859928 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In1982859928 256) 0)) (.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out1982859928| |P0Thread1of1ForFork0_#t~ite3_Out1982859928|))) (or (and (= ~x~0_In1982859928 |P0Thread1of1ForFork0_#t~ite3_Out1982859928|) .cse0 (or .cse1 .cse2)) (and (not .cse1) (not .cse2) (= ~x$w_buff1~0_In1982859928 |P0Thread1of1ForFork0_#t~ite3_Out1982859928|) .cse0))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1982859928, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1982859928, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1982859928, ~x~0=~x~0_In1982859928} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1982859928|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1982859928|, ~x$w_buff1~0=~x$w_buff1~0_In1982859928, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1982859928, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1982859928, ~x~0=~x~0_In1982859928} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 17:06:58,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L736-->L736-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1174044983 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-1174044983 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-1174044983| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1174044983 |P0Thread1of1ForFork0_#t~ite5_Out-1174044983|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1174044983, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1174044983} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1174044983|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1174044983, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1174044983} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:06:58,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-305101916 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-305101916 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-305101916|)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-305101916 |P2Thread1of1ForFork2_#t~ite17_Out-305101916|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-305101916, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-305101916} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-305101916, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-305101916|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-305101916} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:06:58,379 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In125374844 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In125374844 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In125374844 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In125374844 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out125374844| 0)) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out125374844| ~x$w_buff1_used~0_In125374844) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In125374844, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In125374844, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In125374844, ~x$w_buff0_used~0=~x$w_buff0_used~0_In125374844} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In125374844, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In125374844, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In125374844, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out125374844|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In125374844} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:06:58,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [786] [786] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1227405943 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-1227405943 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1227405943 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1227405943 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-1227405943| ~x$w_buff1_used~0_In-1227405943) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1227405943|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227405943, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1227405943, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1227405943, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227405943} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1227405943|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1227405943, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1227405943, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1227405943, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1227405943} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:06:58,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-602282521 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-602282521 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out-602282521| ~x$r_buff0_thd3~0_In-602282521)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-602282521|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-602282521, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-602282521} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-602282521, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-602282521|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-602282521} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:06:58,380 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In2044418505 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In2044418505 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2044418505 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In2044418505 256)))) (or (and (= ~x$r_buff1_thd3~0_In2044418505 |P2Thread1of1ForFork2_#t~ite20_Out2044418505|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out2044418505|)))) InVars {~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2044418505, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2044418505, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2044418505, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2044418505} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out2044418505|, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2044418505, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2044418505, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2044418505, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2044418505} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:06:58,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L791-2-->P2EXIT: Formula: (and (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork2_#t~ite20_26|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_25|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:06:58,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1322609719 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1322609719 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1322609719|) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1322609719| ~x$w_buff0_used~0_In-1322609719) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1322609719, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1322609719} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1322609719|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1322609719, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1322609719} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:06:58,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In-222958153 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-222958153 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-222958153 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-222958153 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-222958153|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-222958153 |P1Thread1of1ForFork1_#t~ite12_Out-222958153|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-222958153, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-222958153, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-222958153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-222958153} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-222958153, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-222958153, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-222958153|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-222958153, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-222958153} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L767-->L768: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1000501822 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1000501822 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-1000501822 ~x$r_buff0_thd2~0_In-1000501822))) (or (and (= ~x$r_buff0_thd2~0_Out-1000501822 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1000501822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1000501822} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1000501822|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1000501822, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1000501822} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd2~0_In-855489259 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-855489259 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-855489259 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-855489259 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-855489259|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out-855489259| ~x$r_buff1_thd2~0_In-855489259)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-855489259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-855489259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-855489259, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-855489259} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-855489259, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-855489259, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-855489259, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-855489259|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-855489259} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L768-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_68 |v_P1Thread1of1ForFork1_#t~ite14_40|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_68, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L738-->L738-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1006844002 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1006844002 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-1006844002| ~x$r_buff0_thd1~0_In-1006844002) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out-1006844002| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1006844002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1006844002} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1006844002, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1006844002|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1006844002} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L739-->L739-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1023064393 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1023064393 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1023064393 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In1023064393 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1023064393|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd1~0_In1023064393 |P0Thread1of1ForFork0_#t~ite8_Out1023064393|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1023064393, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1023064393, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1023064393, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1023064393} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1023064393, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1023064393|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1023064393, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1023064393, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1023064393} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_40 |v_P0Thread1of1ForFork0_#t~ite8_18|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_28 1) v_~__unbuffered_cnt~0_27)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_18|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_17|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_27, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_40} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 17:06:58,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:06:58,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L820-2-->L820-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-1709816265| |ULTIMATE.start_main_#t~ite24_Out-1709816265|)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1709816265 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1709816265 256)))) (or (and .cse0 (not .cse1) (= ~x$w_buff1~0_In-1709816265 |ULTIMATE.start_main_#t~ite24_Out-1709816265|) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out-1709816265| ~x~0_In-1709816265)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1709816265, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1709816265, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1709816265, ~x~0=~x~0_In-1709816265} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-1709816265, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1709816265|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1709816265|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1709816265, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1709816265, ~x~0=~x~0_In-1709816265} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:06:58,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In347075738 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In347075738 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out347075738|) (not .cse1)) (and (= ~x$w_buff0_used~0_In347075738 |ULTIMATE.start_main_#t~ite26_Out347075738|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In347075738, ~x$w_buff0_used~0=~x$w_buff0_used~0_In347075738} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In347075738, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out347075738|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In347075738} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:06:58,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L822-->L822-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd0~0_In-441266197 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-441266197 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-441266197 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-441266197 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-441266197| 0)) (and (= |ULTIMATE.start_main_#t~ite27_Out-441266197| ~x$w_buff1_used~0_In-441266197) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-441266197, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-441266197, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-441266197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-441266197} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-441266197, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-441266197, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-441266197|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-441266197, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-441266197} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:06:58,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L823-->L823-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1259795472 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1259795472 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1259795472 |ULTIMATE.start_main_#t~ite28_Out-1259795472|)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-1259795472|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1259795472, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1259795472} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1259795472, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1259795472|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1259795472} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:06:58,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L824-->L824-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1009631690 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1009631690 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1009631690 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1009631690 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-1009631690| ~x$r_buff1_thd0~0_In-1009631690) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-1009631690|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1009631690, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1009631690, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1009631690, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1009631690} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1009631690, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1009631690|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1009631690, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1009631690, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1009631690} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:06:58,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L836-->L837: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd0~0_87 v_~x$r_buff0_thd0~0_86)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_87, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_6|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_27} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:06:58,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L839-->L4: Formula: (and (= v_~x$flush_delayed~0_24 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_25 256) 0)) (= v_~x$mem_tmp~0_15 v_~x~0_173)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ~x$flush_delayed~0=v_~x$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~x$mem_tmp~0=v_~x$mem_tmp~0_15, ~x~0=v_~x~0_173, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:06:58,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:06:58,443 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b0ac9266-f551-4469-bbf0-512bd0a0cd51/bin/utaipan/witness.graphml [2019-12-07 17:06:58,443 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:06:58,444 INFO L168 Benchmark]: Toolchain (without parser) took 151848.57 ms. Allocated memory was 1.0 GB in the beginning and 8.8 GB in the end (delta: 7.8 GB). Free memory was 937.1 MB in the beginning and 4.1 GB in the end (delta: -3.2 GB). Peak memory consumption was 4.6 GB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,444 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:06:58,445 INFO L168 Benchmark]: CACSL2BoogieTranslator took 377.59 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 110.6 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -140.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,445 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,445 INFO L168 Benchmark]: Boogie Preprocessor took 25.13 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:06:58,445 INFO L168 Benchmark]: RCFGBuilder took 409.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,446 INFO L168 Benchmark]: TraceAbstraction took 150925.55 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 6.6 GB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,446 INFO L168 Benchmark]: Witness Printer took 68.98 ms. Allocated memory is still 8.8 GB. Free memory was 4.1 GB in the beginning and 4.1 GB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:06:58,447 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 377.59 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 110.6 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -140.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.09 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.13 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.9 MB). Peak memory consumption was 54.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 150925.55 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 6.6 GB. Max. memory is 11.5 GB. * Witness Printer took 68.98 ms. Allocated memory is still 8.8 GB. Free memory was 4.1 GB in the beginning and 4.1 GB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 175 ProgramPointsBefore, 95 ProgramPointsAfterwards, 212 TransitionsBefore, 107 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 5405 VarBasedMoverChecksPositive, 232 VarBasedMoverChecksNegative, 72 SemBasedMoverChecksPositive, 228 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 79058 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t760, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t761, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t762, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L754] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L755] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L756] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L757] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L758] 2 x$r_buff0_thd2 = (_Bool)1 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 3 y = 2 [L781] 3 __unbuffered_p2_EAX = y [L784] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=0] [L729] 1 z = 1 [L732] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L787] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L735] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L788] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L736] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L737] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L789] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L790] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L738] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 x$flush_delayed = weak$$choice2 [L830] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L831] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L832] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L832] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L833] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L833] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L834] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L834] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L835] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L835] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] [L837] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 150.7s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 29.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3674 SDtfs, 2780 SDslu, 6332 SDs, 0 SdLazy, 3530 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 137 GetRequests, 33 SyntacticMatches, 12 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=254808occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 101.0s AutomataMinimizationTime, 20 MinimizatonAttempts, 491852 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 868 NumberOfCodeBlocks, 868 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 780 ConstructedInterpolants, 0 QuantifiedInterpolants, 117378 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...