./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix029_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix029_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 35daa092837ea7036b63be309b1abf4903b02e9b ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:49:49,606 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:49:49,608 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:49:49,615 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:49:49,615 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:49:49,616 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:49:49,617 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:49:49,618 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:49:49,619 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:49:49,620 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:49:49,621 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:49:49,621 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:49:49,621 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:49:49,622 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:49:49,623 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:49:49,624 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:49:49,624 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:49:49,625 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:49:49,626 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:49:49,627 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:49:49,628 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:49:49,629 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:49:49,630 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:49:49,630 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:49:49,632 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:49:49,632 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:49:49,632 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:49:49,633 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:49:49,633 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:49:49,633 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:49:49,634 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:49:49,634 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:49:49,634 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:49:49,635 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:49:49,636 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:49:49,636 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:49:49,636 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:49:49,636 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:49:49,636 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:49:49,637 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:49:49,637 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:49:49,638 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:49:49,648 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:49:49,648 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:49:49,648 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:49:49,648 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:49:49,648 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:49:49,649 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:49:49,649 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:49:49,650 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:49:49,650 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:49:49,650 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:49:49,650 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:49:49,650 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:49:49,651 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:49:49,652 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:49:49,652 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:49:49,652 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:49:49,653 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:49:49,653 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:49:49,653 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:49:49,653 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:49:49,653 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 35daa092837ea7036b63be309b1abf4903b02e9b [2019-12-07 15:49:49,750 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:49:49,758 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:49:49,760 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:49:49,761 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:49:49,761 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:49:49,762 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix029_power.opt.i [2019-12-07 15:49:49,797 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/data/4d0ab6b1c/c88e9b56783f41b9b79c7ce90a041096/FLAG94eb99226 [2019-12-07 15:49:50,257 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:49:50,258 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/sv-benchmarks/c/pthread-wmm/mix029_power.opt.i [2019-12-07 15:49:50,271 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/data/4d0ab6b1c/c88e9b56783f41b9b79c7ce90a041096/FLAG94eb99226 [2019-12-07 15:49:50,282 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/data/4d0ab6b1c/c88e9b56783f41b9b79c7ce90a041096 [2019-12-07 15:49:50,284 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:49:50,285 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:49:50,286 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:49:50,286 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:49:50,288 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:49:50,289 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,290 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50, skipping insertion in model container [2019-12-07 15:49:50,291 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,295 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:49:50,333 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:49:50,594 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:49:50,603 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:49:50,648 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:49:50,695 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:49:50,695 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50 WrapperNode [2019-12-07 15:49:50,695 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:49:50,696 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:49:50,696 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:49:50,696 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:49:50,701 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,715 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,735 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:49:50,735 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:49:50,736 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:49:50,736 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:49:50,742 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,742 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,745 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,746 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,753 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,756 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,758 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... [2019-12-07 15:49:50,762 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:49:50,762 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:49:50,762 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:49:50,762 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:49:50,763 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:49:50,811 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:49:50,811 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:49:50,811 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:49:50,812 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:49:50,812 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:49:50,812 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 15:49:50,812 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 15:49:50,812 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:49:50,812 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:49:50,812 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:49:50,813 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:49:51,194 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:49:51,194 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:49:51,195 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:49:51 BoogieIcfgContainer [2019-12-07 15:49:51,195 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:49:51,196 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:49:51,196 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:49:51,198 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:49:51,198 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:49:50" (1/3) ... [2019-12-07 15:49:51,198 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25e816b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:49:51, skipping insertion in model container [2019-12-07 15:49:51,198 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:49:50" (2/3) ... [2019-12-07 15:49:51,199 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25e816b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:49:51, skipping insertion in model container [2019-12-07 15:49:51,199 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:49:51" (3/3) ... [2019-12-07 15:49:51,200 INFO L109 eAbstractionObserver]: Analyzing ICFG mix029_power.opt.i [2019-12-07 15:49:51,206 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:49:51,206 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:49:51,211 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:49:51,211 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:49:51,236 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,236 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,236 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,236 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,237 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,241 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,245 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,246 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,247 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,248 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:49:51,260 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 15:49:51,272 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:49:51,273 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:49:51,273 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:49:51,273 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:49:51,273 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:49:51,273 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:49:51,273 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:49:51,273 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:49:51,284 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 192 places, 226 transitions [2019-12-07 15:49:51,285 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 226 transitions [2019-12-07 15:49:51,344 INFO L134 PetriNetUnfolder]: 47/222 cut-off events. [2019-12-07 15:49:51,344 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:49:51,355 INFO L76 FinitePrefix]: Finished finitePrefix Result has 235 conditions, 222 events. 47/222 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 586 event pairs. 12/185 useless extension candidates. Maximal degree in co-relation 190. Up to 2 conditions per place. [2019-12-07 15:49:51,369 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 226 transitions [2019-12-07 15:49:51,400 INFO L134 PetriNetUnfolder]: 47/222 cut-off events. [2019-12-07 15:49:51,400 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:49:51,406 INFO L76 FinitePrefix]: Finished finitePrefix Result has 235 conditions, 222 events. 47/222 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 586 event pairs. 12/185 useless extension candidates. Maximal degree in co-relation 190. Up to 2 conditions per place. [2019-12-07 15:49:51,421 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18432 [2019-12-07 15:49:51,422 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:49:54,547 WARN L192 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 15:49:54,646 INFO L206 etLargeBlockEncoding]: Checked pairs total: 86545 [2019-12-07 15:49:54,646 INFO L214 etLargeBlockEncoding]: Total number of compositions: 127 [2019-12-07 15:49:54,648 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 97 places, 103 transitions [2019-12-07 15:50:33,970 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 199530 states. [2019-12-07 15:50:33,972 INFO L276 IsEmpty]: Start isEmpty. Operand 199530 states. [2019-12-07 15:50:33,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 15:50:33,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:33,977 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:33,977 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:33,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:33,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1574015469, now seen corresponding path program 1 times [2019-12-07 15:50:33,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:33,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241824450] [2019-12-07 15:50:33,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:34,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:34,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:34,147 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1241824450] [2019-12-07 15:50:34,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:34,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:50:34,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639814602] [2019-12-07 15:50:34,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:50:34,152 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:34,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:50:34,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:50:34,162 INFO L87 Difference]: Start difference. First operand 199530 states. Second operand 3 states. [2019-12-07 15:50:36,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:36,937 INFO L93 Difference]: Finished difference Result 198930 states and 939730 transitions. [2019-12-07 15:50:36,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:50:36,939 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 15:50:36,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:37,811 INFO L225 Difference]: With dead ends: 198930 [2019-12-07 15:50:37,812 INFO L226 Difference]: Without dead ends: 194562 [2019-12-07 15:50:37,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:50:43,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194562 states. [2019-12-07 15:50:46,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194562 to 194562. [2019-12-07 15:50:46,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194562 states. [2019-12-07 15:50:47,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194562 states to 194562 states and 919710 transitions. [2019-12-07 15:50:47,487 INFO L78 Accepts]: Start accepts. Automaton has 194562 states and 919710 transitions. Word has length 7 [2019-12-07 15:50:47,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:50:47,488 INFO L462 AbstractCegarLoop]: Abstraction has 194562 states and 919710 transitions. [2019-12-07 15:50:47,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:50:47,489 INFO L276 IsEmpty]: Start isEmpty. Operand 194562 states and 919710 transitions. [2019-12-07 15:50:47,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:50:47,492 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:50:47,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:50:47,492 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:50:47,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:50:47,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1968556431, now seen corresponding path program 1 times [2019-12-07 15:50:47,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:50:47,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332058539] [2019-12-07 15:50:47,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:50:47,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:50:47,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:50:47,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332058539] [2019-12-07 15:50:47,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:50:47,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:50:47,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [984632920] [2019-12-07 15:50:47,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:50:47,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:50:47,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:50:47,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:50:47,562 INFO L87 Difference]: Start difference. First operand 194562 states and 919710 transitions. Second operand 4 states. [2019-12-07 15:50:51,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:50:51,927 INFO L93 Difference]: Finished difference Result 312518 states and 1424536 transitions. [2019-12-07 15:50:51,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:50:51,928 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:50:51,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:50:52,880 INFO L225 Difference]: With dead ends: 312518 [2019-12-07 15:50:52,881 INFO L226 Difference]: Without dead ends: 312420 [2019-12-07 15:50:52,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:00,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312420 states. [2019-12-07 15:51:04,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312420 to 280564. [2019-12-07 15:51:04,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280564 states. [2019-12-07 15:51:05,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280564 states to 280564 states and 1291349 transitions. [2019-12-07 15:51:05,789 INFO L78 Accepts]: Start accepts. Automaton has 280564 states and 1291349 transitions. Word has length 13 [2019-12-07 15:51:05,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:05,789 INFO L462 AbstractCegarLoop]: Abstraction has 280564 states and 1291349 transitions. [2019-12-07 15:51:05,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:51:05,789 INFO L276 IsEmpty]: Start isEmpty. Operand 280564 states and 1291349 transitions. [2019-12-07 15:51:05,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 15:51:05,794 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:05,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:05,794 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:05,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:05,794 INFO L82 PathProgramCache]: Analyzing trace with hash 381664219, now seen corresponding path program 1 times [2019-12-07 15:51:05,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:05,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958205194] [2019-12-07 15:51:05,795 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:05,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:05,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:05,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958205194] [2019-12-07 15:51:05,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:05,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:51:05,855 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232522508] [2019-12-07 15:51:05,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:51:05,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:05,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:51:05,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:51:05,856 INFO L87 Difference]: Start difference. First operand 280564 states and 1291349 transitions. Second operand 4 states. [2019-12-07 15:51:12,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:12,121 INFO L93 Difference]: Finished difference Result 400666 states and 1806688 transitions. [2019-12-07 15:51:12,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:51:12,122 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 15:51:12,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:13,361 INFO L225 Difference]: With dead ends: 400666 [2019-12-07 15:51:13,361 INFO L226 Difference]: Without dead ends: 400540 [2019-12-07 15:51:13,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:21,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 400540 states. [2019-12-07 15:51:27,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 400540 to 335984. [2019-12-07 15:51:27,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335984 states. [2019-12-07 15:51:28,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335984 states to 335984 states and 1536425 transitions. [2019-12-07 15:51:28,445 INFO L78 Accepts]: Start accepts. Automaton has 335984 states and 1536425 transitions. Word has length 15 [2019-12-07 15:51:28,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:28,445 INFO L462 AbstractCegarLoop]: Abstraction has 335984 states and 1536425 transitions. [2019-12-07 15:51:28,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:51:28,445 INFO L276 IsEmpty]: Start isEmpty. Operand 335984 states and 1536425 transitions. [2019-12-07 15:51:28,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 15:51:28,448 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:28,448 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:28,449 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:28,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:28,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1895054000, now seen corresponding path program 1 times [2019-12-07 15:51:28,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:28,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72461652] [2019-12-07 15:51:28,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:28,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:28,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:28,505 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72461652] [2019-12-07 15:51:28,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:28,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:51:28,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106419888] [2019-12-07 15:51:28,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:51:28,506 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:28,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:51:28,506 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:51:28,507 INFO L87 Difference]: Start difference. First operand 335984 states and 1536425 transitions. Second operand 4 states. [2019-12-07 15:51:30,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:30,045 INFO L93 Difference]: Finished difference Result 211585 states and 862899 transitions. [2019-12-07 15:51:30,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:51:30,046 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 15:51:30,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:30,596 INFO L225 Difference]: With dead ends: 211585 [2019-12-07 15:51:30,596 INFO L226 Difference]: Without dead ends: 202721 [2019-12-07 15:51:30,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:37,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202721 states. [2019-12-07 15:51:40,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202721 to 202721. [2019-12-07 15:51:40,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202721 states. [2019-12-07 15:51:41,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202721 states to 202721 states and 829134 transitions. [2019-12-07 15:51:41,273 INFO L78 Accepts]: Start accepts. Automaton has 202721 states and 829134 transitions. Word has length 15 [2019-12-07 15:51:41,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:41,273 INFO L462 AbstractCegarLoop]: Abstraction has 202721 states and 829134 transitions. [2019-12-07 15:51:41,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:51:41,273 INFO L276 IsEmpty]: Start isEmpty. Operand 202721 states and 829134 transitions. [2019-12-07 15:51:41,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:51:41,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:41,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:41,277 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:41,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:41,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1237573064, now seen corresponding path program 1 times [2019-12-07 15:51:41,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:41,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153437222] [2019-12-07 15:51:41,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:41,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:41,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:41,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153437222] [2019-12-07 15:51:41,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:41,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:51:41,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930401065] [2019-12-07 15:51:41,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:51:41,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:41,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:51:41,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:41,333 INFO L87 Difference]: Start difference. First operand 202721 states and 829134 transitions. Second operand 5 states. [2019-12-07 15:51:41,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:41,508 INFO L93 Difference]: Finished difference Result 47448 states and 157887 transitions. [2019-12-07 15:51:41,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:51:41,509 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:51:41,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:41,574 INFO L225 Difference]: With dead ends: 47448 [2019-12-07 15:51:41,574 INFO L226 Difference]: Without dead ends: 42021 [2019-12-07 15:51:41,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:51:41,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42021 states. [2019-12-07 15:51:42,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42021 to 41766. [2019-12-07 15:51:42,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41766 states. [2019-12-07 15:51:42,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41766 states to 41766 states and 137050 transitions. [2019-12-07 15:51:42,258 INFO L78 Accepts]: Start accepts. Automaton has 41766 states and 137050 transitions. Word has length 16 [2019-12-07 15:51:42,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:42,258 INFO L462 AbstractCegarLoop]: Abstraction has 41766 states and 137050 transitions. [2019-12-07 15:51:42,258 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:51:42,258 INFO L276 IsEmpty]: Start isEmpty. Operand 41766 states and 137050 transitions. [2019-12-07 15:51:42,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:51:42,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:42,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:42,265 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:42,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:42,265 INFO L82 PathProgramCache]: Analyzing trace with hash -244633219, now seen corresponding path program 1 times [2019-12-07 15:51:42,265 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:42,265 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977105777] [2019-12-07 15:51:42,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:42,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:42,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:42,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977105777] [2019-12-07 15:51:42,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:42,340 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:51:42,340 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [444753554] [2019-12-07 15:51:42,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:51:42,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:42,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:51:42,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:42,341 INFO L87 Difference]: Start difference. First operand 41766 states and 137050 transitions. Second operand 5 states. [2019-12-07 15:51:42,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:42,893 INFO L93 Difference]: Finished difference Result 55658 states and 178699 transitions. [2019-12-07 15:51:42,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:51:42,894 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 15:51:42,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:42,978 INFO L225 Difference]: With dead ends: 55658 [2019-12-07 15:51:42,978 INFO L226 Difference]: Without dead ends: 55309 [2019-12-07 15:51:42,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:43,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55309 states. [2019-12-07 15:51:43,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55309 to 41581. [2019-12-07 15:51:43,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41581 states. [2019-12-07 15:51:44,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41581 states to 41581 states and 136155 transitions. [2019-12-07 15:51:44,053 INFO L78 Accepts]: Start accepts. Automaton has 41581 states and 136155 transitions. Word has length 21 [2019-12-07 15:51:44,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:44,053 INFO L462 AbstractCegarLoop]: Abstraction has 41581 states and 136155 transitions. [2019-12-07 15:51:44,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:51:44,053 INFO L276 IsEmpty]: Start isEmpty. Operand 41581 states and 136155 transitions. [2019-12-07 15:51:44,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 15:51:44,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:44,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:44,065 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:44,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:44,065 INFO L82 PathProgramCache]: Analyzing trace with hash 680964803, now seen corresponding path program 1 times [2019-12-07 15:51:44,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:44,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803690345] [2019-12-07 15:51:44,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:44,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:44,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:44,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803690345] [2019-12-07 15:51:44,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:44,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:51:44,133 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1106150206] [2019-12-07 15:51:44,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:44,134 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:44,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:44,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:44,134 INFO L87 Difference]: Start difference. First operand 41581 states and 136155 transitions. Second operand 6 states. [2019-12-07 15:51:44,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:44,221 INFO L93 Difference]: Finished difference Result 13161 states and 41940 transitions. [2019-12-07 15:51:44,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:51:44,221 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 15:51:44,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:44,236 INFO L225 Difference]: With dead ends: 13161 [2019-12-07 15:51:44,237 INFO L226 Difference]: Without dead ends: 12077 [2019-12-07 15:51:44,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:44,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12077 states. [2019-12-07 15:51:44,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12077 to 11853. [2019-12-07 15:51:44,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11853 states. [2019-12-07 15:51:44,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11853 states to 11853 states and 38018 transitions. [2019-12-07 15:51:44,406 INFO L78 Accepts]: Start accepts. Automaton has 11853 states and 38018 transitions. Word has length 28 [2019-12-07 15:51:44,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:44,407 INFO L462 AbstractCegarLoop]: Abstraction has 11853 states and 38018 transitions. [2019-12-07 15:51:44,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:44,407 INFO L276 IsEmpty]: Start isEmpty. Operand 11853 states and 38018 transitions. [2019-12-07 15:51:44,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:51:44,422 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:44,422 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:44,422 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:44,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:44,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1672770928, now seen corresponding path program 1 times [2019-12-07 15:51:44,423 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:44,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500982685] [2019-12-07 15:51:44,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:44,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:44,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:44,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500982685] [2019-12-07 15:51:44,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:44,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:51:44,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942575922] [2019-12-07 15:51:44,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:51:44,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:44,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:51:44,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:51:44,485 INFO L87 Difference]: Start difference. First operand 11853 states and 38018 transitions. Second operand 7 states. [2019-12-07 15:51:44,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:44,593 INFO L93 Difference]: Finished difference Result 10087 states and 33925 transitions. [2019-12-07 15:51:44,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:51:44,593 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2019-12-07 15:51:44,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:44,606 INFO L225 Difference]: With dead ends: 10087 [2019-12-07 15:51:44,606 INFO L226 Difference]: Without dead ends: 10006 [2019-12-07 15:51:44,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:51:44,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10006 states. [2019-12-07 15:51:44,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10006 to 9278. [2019-12-07 15:51:44,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9278 states. [2019-12-07 15:51:44,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9278 states to 9278 states and 31432 transitions. [2019-12-07 15:51:44,750 INFO L78 Accepts]: Start accepts. Automaton has 9278 states and 31432 transitions. Word has length 40 [2019-12-07 15:51:44,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:44,750 INFO L462 AbstractCegarLoop]: Abstraction has 9278 states and 31432 transitions. [2019-12-07 15:51:44,750 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:51:44,750 INFO L276 IsEmpty]: Start isEmpty. Operand 9278 states and 31432 transitions. [2019-12-07 15:51:44,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:44,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:44,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:44,765 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:44,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:44,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1196827384, now seen corresponding path program 1 times [2019-12-07 15:51:44,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:44,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570256966] [2019-12-07 15:51:44,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:44,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:44,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:44,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570256966] [2019-12-07 15:51:44,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:44,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:51:44,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347764136] [2019-12-07 15:51:44,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:51:44,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:44,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:51:44,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:44,808 INFO L87 Difference]: Start difference. First operand 9278 states and 31432 transitions. Second operand 3 states. [2019-12-07 15:51:44,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:44,857 INFO L93 Difference]: Finished difference Result 9290 states and 31447 transitions. [2019-12-07 15:51:44,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:51:44,857 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 15:51:44,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:44,869 INFO L225 Difference]: With dead ends: 9290 [2019-12-07 15:51:44,869 INFO L226 Difference]: Without dead ends: 9290 [2019-12-07 15:51:44,870 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:44,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9290 states. [2019-12-07 15:51:44,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9290 to 9285. [2019-12-07 15:51:44,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9285 states. [2019-12-07 15:51:45,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9285 states to 9285 states and 31441 transitions. [2019-12-07 15:51:45,005 INFO L78 Accepts]: Start accepts. Automaton has 9285 states and 31441 transitions. Word has length 67 [2019-12-07 15:51:45,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:45,006 INFO L462 AbstractCegarLoop]: Abstraction has 9285 states and 31441 transitions. [2019-12-07 15:51:45,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:51:45,006 INFO L276 IsEmpty]: Start isEmpty. Operand 9285 states and 31441 transitions. [2019-12-07 15:51:45,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:45,019 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:45,019 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:45,019 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:45,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:45,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1012782721, now seen corresponding path program 1 times [2019-12-07 15:51:45,020 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:45,020 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754478789] [2019-12-07 15:51:45,020 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:45,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:45,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:45,080 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754478789] [2019-12-07 15:51:45,080 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:45,080 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:51:45,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930792570] [2019-12-07 15:51:45,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:51:45,081 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:45,081 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:51:45,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:51:45,081 INFO L87 Difference]: Start difference. First operand 9285 states and 31441 transitions. Second operand 5 states. [2019-12-07 15:51:45,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:45,315 INFO L93 Difference]: Finished difference Result 14779 states and 49427 transitions. [2019-12-07 15:51:45,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:51:45,315 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 15:51:45,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:45,334 INFO L225 Difference]: With dead ends: 14779 [2019-12-07 15:51:45,334 INFO L226 Difference]: Without dead ends: 14779 [2019-12-07 15:51:45,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:51:45,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14779 states. [2019-12-07 15:51:45,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14779 to 10797. [2019-12-07 15:51:45,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10797 states. [2019-12-07 15:51:45,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10797 states to 10797 states and 36657 transitions. [2019-12-07 15:51:45,515 INFO L78 Accepts]: Start accepts. Automaton has 10797 states and 36657 transitions. Word has length 67 [2019-12-07 15:51:45,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:45,516 INFO L462 AbstractCegarLoop]: Abstraction has 10797 states and 36657 transitions. [2019-12-07 15:51:45,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:51:45,516 INFO L276 IsEmpty]: Start isEmpty. Operand 10797 states and 36657 transitions. [2019-12-07 15:51:45,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:45,531 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:45,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:45,531 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:45,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:45,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1925623137, now seen corresponding path program 2 times [2019-12-07 15:51:45,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:45,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248223512] [2019-12-07 15:51:45,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:45,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:45,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:45,596 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248223512] [2019-12-07 15:51:45,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:45,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:51:45,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1087720560] [2019-12-07 15:51:45,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:45,597 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:45,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:45,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:45,597 INFO L87 Difference]: Start difference. First operand 10797 states and 36657 transitions. Second operand 6 states. [2019-12-07 15:51:45,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:45,900 INFO L93 Difference]: Finished difference Result 18221 states and 61439 transitions. [2019-12-07 15:51:45,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:51:45,901 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:51:45,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:45,925 INFO L225 Difference]: With dead ends: 18221 [2019-12-07 15:51:45,925 INFO L226 Difference]: Without dead ends: 18221 [2019-12-07 15:51:45,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:45,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18221 states. [2019-12-07 15:51:46,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18221 to 11801. [2019-12-07 15:51:46,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11801 states. [2019-12-07 15:51:46,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11801 states to 11801 states and 40143 transitions. [2019-12-07 15:51:46,147 INFO L78 Accepts]: Start accepts. Automaton has 11801 states and 40143 transitions. Word has length 67 [2019-12-07 15:51:46,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:46,147 INFO L462 AbstractCegarLoop]: Abstraction has 11801 states and 40143 transitions. [2019-12-07 15:51:46,147 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:46,147 INFO L276 IsEmpty]: Start isEmpty. Operand 11801 states and 40143 transitions. [2019-12-07 15:51:46,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:46,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:46,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:46,164 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:46,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:46,164 INFO L82 PathProgramCache]: Analyzing trace with hash 1157078727, now seen corresponding path program 3 times [2019-12-07 15:51:46,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:46,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310128880] [2019-12-07 15:51:46,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:46,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:46,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:46,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310128880] [2019-12-07 15:51:46,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:46,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:51:46,245 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241653677] [2019-12-07 15:51:46,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:46,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:46,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:46,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:46,246 INFO L87 Difference]: Start difference. First operand 11801 states and 40143 transitions. Second operand 6 states. [2019-12-07 15:51:46,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:46,533 INFO L93 Difference]: Finished difference Result 16399 states and 54897 transitions. [2019-12-07 15:51:46,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 15:51:46,534 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:51:46,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:46,555 INFO L225 Difference]: With dead ends: 16399 [2019-12-07 15:51:46,555 INFO L226 Difference]: Without dead ends: 16399 [2019-12-07 15:51:46,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:46,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16399 states. [2019-12-07 15:51:46,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16399 to 13173. [2019-12-07 15:51:46,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13173 states. [2019-12-07 15:51:46,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13173 states to 13173 states and 44679 transitions. [2019-12-07 15:51:46,850 INFO L78 Accepts]: Start accepts. Automaton has 13173 states and 44679 transitions. Word has length 67 [2019-12-07 15:51:46,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:46,851 INFO L462 AbstractCegarLoop]: Abstraction has 13173 states and 44679 transitions. [2019-12-07 15:51:46,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:46,851 INFO L276 IsEmpty]: Start isEmpty. Operand 13173 states and 44679 transitions. [2019-12-07 15:51:46,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:46,865 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:46,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:46,866 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:46,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:46,866 INFO L82 PathProgramCache]: Analyzing trace with hash -153275837, now seen corresponding path program 4 times [2019-12-07 15:51:46,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:46,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382368407] [2019-12-07 15:51:46,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:46,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:46,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:46,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382368407] [2019-12-07 15:51:46,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:46,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:51:46,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1494156270] [2019-12-07 15:51:46,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:46,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:46,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:46,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:46,937 INFO L87 Difference]: Start difference. First operand 13173 states and 44679 transitions. Second operand 6 states. [2019-12-07 15:51:47,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:47,018 INFO L93 Difference]: Finished difference Result 18555 states and 60244 transitions. [2019-12-07 15:51:47,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:51:47,019 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:51:47,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:47,034 INFO L225 Difference]: With dead ends: 18555 [2019-12-07 15:51:47,034 INFO L226 Difference]: Without dead ends: 11948 [2019-12-07 15:51:47,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:47,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11948 states. [2019-12-07 15:51:47,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11948 to 11948. [2019-12-07 15:51:47,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11948 states. [2019-12-07 15:51:47,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11948 states to 11948 states and 39934 transitions. [2019-12-07 15:51:47,204 INFO L78 Accepts]: Start accepts. Automaton has 11948 states and 39934 transitions. Word has length 67 [2019-12-07 15:51:47,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:47,205 INFO L462 AbstractCegarLoop]: Abstraction has 11948 states and 39934 transitions. [2019-12-07 15:51:47,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:47,205 INFO L276 IsEmpty]: Start isEmpty. Operand 11948 states and 39934 transitions. [2019-12-07 15:51:47,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:47,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:47,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:47,216 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:47,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:47,216 INFO L82 PathProgramCache]: Analyzing trace with hash 1227929671, now seen corresponding path program 5 times [2019-12-07 15:51:47,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:47,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476746563] [2019-12-07 15:51:47,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:47,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:47,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:47,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476746563] [2019-12-07 15:51:47,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:47,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:51:47,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186934995] [2019-12-07 15:51:47,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:51:47,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:47,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:51:47,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:51:47,291 INFO L87 Difference]: Start difference. First operand 11948 states and 39934 transitions. Second operand 8 states. [2019-12-07 15:51:47,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:47,677 INFO L93 Difference]: Finished difference Result 18216 states and 60586 transitions. [2019-12-07 15:51:47,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 15:51:47,678 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 15:51:47,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:47,700 INFO L225 Difference]: With dead ends: 18216 [2019-12-07 15:51:47,701 INFO L226 Difference]: Without dead ends: 18216 [2019-12-07 15:51:47,701 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:51:47,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18216 states. [2019-12-07 15:51:47,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18216 to 12522. [2019-12-07 15:51:47,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12522 states. [2019-12-07 15:51:47,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12522 states to 12522 states and 41875 transitions. [2019-12-07 15:51:47,935 INFO L78 Accepts]: Start accepts. Automaton has 12522 states and 41875 transitions. Word has length 67 [2019-12-07 15:51:47,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:47,936 INFO L462 AbstractCegarLoop]: Abstraction has 12522 states and 41875 transitions. [2019-12-07 15:51:47,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:51:47,936 INFO L276 IsEmpty]: Start isEmpty. Operand 12522 states and 41875 transitions. [2019-12-07 15:51:47,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:47,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:47,949 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:47,949 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:47,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:47,950 INFO L82 PathProgramCache]: Analyzing trace with hash 944098119, now seen corresponding path program 6 times [2019-12-07 15:51:47,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:47,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190401992] [2019-12-07 15:51:47,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:47,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:48,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:48,006 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190401992] [2019-12-07 15:51:48,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:48,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:51:48,006 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1526153226] [2019-12-07 15:51:48,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:48,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:48,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:48,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:48,007 INFO L87 Difference]: Start difference. First operand 12522 states and 41875 transitions. Second operand 6 states. [2019-12-07 15:51:48,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:48,288 INFO L93 Difference]: Finished difference Result 16613 states and 54544 transitions. [2019-12-07 15:51:48,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 15:51:48,289 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:51:48,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:48,309 INFO L225 Difference]: With dead ends: 16613 [2019-12-07 15:51:48,309 INFO L226 Difference]: Without dead ends: 16613 [2019-12-07 15:51:48,310 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:51:48,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16613 states. [2019-12-07 15:51:48,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16613 to 12561. [2019-12-07 15:51:48,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12561 states. [2019-12-07 15:51:48,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12561 states to 12561 states and 41575 transitions. [2019-12-07 15:51:48,544 INFO L78 Accepts]: Start accepts. Automaton has 12561 states and 41575 transitions. Word has length 67 [2019-12-07 15:51:48,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:48,545 INFO L462 AbstractCegarLoop]: Abstraction has 12561 states and 41575 transitions. [2019-12-07 15:51:48,545 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:48,545 INFO L276 IsEmpty]: Start isEmpty. Operand 12561 states and 41575 transitions. [2019-12-07 15:51:48,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:48,559 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:48,559 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:48,559 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:48,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:48,559 INFO L82 PathProgramCache]: Analyzing trace with hash 280568553, now seen corresponding path program 7 times [2019-12-07 15:51:48,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:48,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642923541] [2019-12-07 15:51:48,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:48,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:48,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:48,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642923541] [2019-12-07 15:51:48,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:48,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:51:48,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37885248] [2019-12-07 15:51:48,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:51:48,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:48,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:51:48,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:51:48,624 INFO L87 Difference]: Start difference. First operand 12561 states and 41575 transitions. Second operand 6 states. [2019-12-07 15:51:48,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:48,712 INFO L93 Difference]: Finished difference Result 17859 states and 56721 transitions. [2019-12-07 15:51:48,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:51:48,712 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:51:48,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:48,718 INFO L225 Difference]: With dead ends: 17859 [2019-12-07 15:51:48,718 INFO L226 Difference]: Without dead ends: 6125 [2019-12-07 15:51:48,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:51:48,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6125 states. [2019-12-07 15:51:48,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6125 to 6125. [2019-12-07 15:51:48,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6125 states. [2019-12-07 15:51:48,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6125 states to 6125 states and 17456 transitions. [2019-12-07 15:51:48,789 INFO L78 Accepts]: Start accepts. Automaton has 6125 states and 17456 transitions. Word has length 67 [2019-12-07 15:51:48,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:48,789 INFO L462 AbstractCegarLoop]: Abstraction has 6125 states and 17456 transitions. [2019-12-07 15:51:48,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:51:48,789 INFO L276 IsEmpty]: Start isEmpty. Operand 6125 states and 17456 transitions. [2019-12-07 15:51:48,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:48,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:48,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:48,793 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:48,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:48,793 INFO L82 PathProgramCache]: Analyzing trace with hash 2081494959, now seen corresponding path program 8 times [2019-12-07 15:51:48,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:48,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818528471] [2019-12-07 15:51:48,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:48,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:48,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:48,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818528471] [2019-12-07 15:51:48,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:48,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:51:48,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357006380] [2019-12-07 15:51:48,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 15:51:48,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:48,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 15:51:48,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 15:51:48,864 INFO L87 Difference]: Start difference. First operand 6125 states and 17456 transitions. Second operand 8 states. [2019-12-07 15:51:49,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:49,482 INFO L93 Difference]: Finished difference Result 9620 states and 26946 transitions. [2019-12-07 15:51:49,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:51:49,483 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 15:51:49,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:49,490 INFO L225 Difference]: With dead ends: 9620 [2019-12-07 15:51:49,491 INFO L226 Difference]: Without dead ends: 9620 [2019-12-07 15:51:49,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 12 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:51:49,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9620 states. [2019-12-07 15:51:49,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9620 to 5806. [2019-12-07 15:51:49,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5806 states. [2019-12-07 15:51:49,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5806 states to 5806 states and 16550 transitions. [2019-12-07 15:51:49,583 INFO L78 Accepts]: Start accepts. Automaton has 5806 states and 16550 transitions. Word has length 67 [2019-12-07 15:51:49,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:49,583 INFO L462 AbstractCegarLoop]: Abstraction has 5806 states and 16550 transitions. [2019-12-07 15:51:49,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 15:51:49,584 INFO L276 IsEmpty]: Start isEmpty. Operand 5806 states and 16550 transitions. [2019-12-07 15:51:49,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:51:49,588 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:49,588 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:49,588 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:49,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:49,588 INFO L82 PathProgramCache]: Analyzing trace with hash -2085243957, now seen corresponding path program 9 times [2019-12-07 15:51:49,588 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:49,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021050101] [2019-12-07 15:51:49,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:49,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:49,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:49,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021050101] [2019-12-07 15:51:49,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:49,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:51:49,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452045362] [2019-12-07 15:51:49,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:51:49,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:49,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:51:49,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,625 INFO L87 Difference]: Start difference. First operand 5806 states and 16550 transitions. Second operand 3 states. [2019-12-07 15:51:49,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:49,668 INFO L93 Difference]: Finished difference Result 5806 states and 16549 transitions. [2019-12-07 15:51:49,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:51:49,669 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 15:51:49,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:49,674 INFO L225 Difference]: With dead ends: 5806 [2019-12-07 15:51:49,674 INFO L226 Difference]: Without dead ends: 5806 [2019-12-07 15:51:49,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5806 states. [2019-12-07 15:51:49,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5806 to 3701. [2019-12-07 15:51:49,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3701 states. [2019-12-07 15:51:49,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3701 states to 3701 states and 10729 transitions. [2019-12-07 15:51:49,730 INFO L78 Accepts]: Start accepts. Automaton has 3701 states and 10729 transitions. Word has length 67 [2019-12-07 15:51:49,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:49,730 INFO L462 AbstractCegarLoop]: Abstraction has 3701 states and 10729 transitions. [2019-12-07 15:51:49,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:51:49,730 INFO L276 IsEmpty]: Start isEmpty. Operand 3701 states and 10729 transitions. [2019-12-07 15:51:49,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 15:51:49,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:49,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:49,733 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:49,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:49,733 INFO L82 PathProgramCache]: Analyzing trace with hash -96005622, now seen corresponding path program 1 times [2019-12-07 15:51:49,733 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:49,733 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233195424] [2019-12-07 15:51:49,733 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:49,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:49,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:49,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233195424] [2019-12-07 15:51:49,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:49,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:51:49,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1500347544] [2019-12-07 15:51:49,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:51:49,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:49,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:51:49,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,765 INFO L87 Difference]: Start difference. First operand 3701 states and 10729 transitions. Second operand 3 states. [2019-12-07 15:51:49,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:49,782 INFO L93 Difference]: Finished difference Result 3349 states and 9517 transitions. [2019-12-07 15:51:49,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:51:49,783 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2019-12-07 15:51:49,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:49,785 INFO L225 Difference]: With dead ends: 3349 [2019-12-07 15:51:49,786 INFO L226 Difference]: Without dead ends: 3349 [2019-12-07 15:51:49,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3349 states. [2019-12-07 15:51:49,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3349 to 3243. [2019-12-07 15:51:49,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3243 states. [2019-12-07 15:51:49,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3243 states to 3243 states and 9220 transitions. [2019-12-07 15:51:49,827 INFO L78 Accepts]: Start accepts. Automaton has 3243 states and 9220 transitions. Word has length 68 [2019-12-07 15:51:49,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:49,827 INFO L462 AbstractCegarLoop]: Abstraction has 3243 states and 9220 transitions. [2019-12-07 15:51:49,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:51:49,828 INFO L276 IsEmpty]: Start isEmpty. Operand 3243 states and 9220 transitions. [2019-12-07 15:51:49,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-07 15:51:49,830 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:49,830 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:49,830 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:49,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:49,830 INFO L82 PathProgramCache]: Analyzing trace with hash 1781149772, now seen corresponding path program 1 times [2019-12-07 15:51:49,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:49,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501078129] [2019-12-07 15:51:49,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:49,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:51:49,865 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:51:49,865 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501078129] [2019-12-07 15:51:49,865 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:51:49,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:51:49,866 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55425805] [2019-12-07 15:51:49,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:51:49,866 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:51:49,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:51:49,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,866 INFO L87 Difference]: Start difference. First operand 3243 states and 9220 transitions. Second operand 3 states. [2019-12-07 15:51:49,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:51:49,891 INFO L93 Difference]: Finished difference Result 3177 states and 8865 transitions. [2019-12-07 15:51:49,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:51:49,892 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-12-07 15:51:49,892 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:51:49,895 INFO L225 Difference]: With dead ends: 3177 [2019-12-07 15:51:49,895 INFO L226 Difference]: Without dead ends: 3177 [2019-12-07 15:51:49,895 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:51:49,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3177 states. [2019-12-07 15:51:49,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3177 to 2877. [2019-12-07 15:51:49,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2877 states. [2019-12-07 15:51:49,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2877 states to 2877 states and 8028 transitions. [2019-12-07 15:51:49,936 INFO L78 Accepts]: Start accepts. Automaton has 2877 states and 8028 transitions. Word has length 69 [2019-12-07 15:51:49,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:51:49,936 INFO L462 AbstractCegarLoop]: Abstraction has 2877 states and 8028 transitions. [2019-12-07 15:51:49,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:51:49,936 INFO L276 IsEmpty]: Start isEmpty. Operand 2877 states and 8028 transitions. [2019-12-07 15:51:49,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 15:51:49,938 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:51:49,938 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:51:49,938 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:51:49,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:51:49,938 INFO L82 PathProgramCache]: Analyzing trace with hash -1078025367, now seen corresponding path program 1 times [2019-12-07 15:51:49,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:51:49,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535997890] [2019-12-07 15:51:49,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:51:49,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:51:49,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:51:50,037 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 15:51:50,037 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:51:50,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= v_~x~0_55 0) (= |v_ULTIMATE.start_main_~#t773~0.offset_18| 0) (= v_~a~0_26 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff1_thd0~0_273 0) (= v_~y$r_buff0_thd1~0_30 0) (= v_~y$r_buff0_thd4~0_83 0) (= v_~main$tmp_guard0~0_39 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t773~0.base_24|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t773~0.base_24| 1) |v_#valid_71|) (= 0 v_~y$r_buff1_thd1~0_94) (= 0 v_~y$r_buff0_thd3~0_170) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t773~0.base_24|) (= v_~y~0_170 0) (= 0 v_~__unbuffered_p3_EBX~0_25) (= v_~y$read_delayed~0_6 0) (= v_~y$r_buff0_thd0~0_357 0) (= v_~y$mem_tmp~0_18 0) (= 0 v_~y$flush_delayed~0_35) (= 0 v_~__unbuffered_p3_EAX~0_21) (= v_~__unbuffered_cnt~0_136 0) (= v_~y$w_buff1_used~0_387 0) (= 0 v_~y$r_buff1_thd2~0_158) (= 0 |v_#NULL.base_4|) (= v_~y$w_buff1~0_158 0) (= 0 v_~y$read_delayed_var~0.base_7) (< 0 |v_#StackHeapBarrier_20|) (= v_~y$r_buff0_thd2~0_97 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t773~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t773~0.base_24|) |v_ULTIMATE.start_main_~#t773~0.offset_18| 0)) |v_#memory_int_27|) (= v_~z~0_109 0) (= 0 v_~__unbuffered_p0_EAX~0_27) (= 0 v_~y$w_buff0~0_171) (= 0 v_~y$r_buff1_thd4~0_149) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~y$r_buff1_thd3~0_146) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t773~0.base_24| 4)) (= v_~weak$$choice2~0_110 0) (= v_~y$w_buff0_used~0_739 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_28|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_21|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_33|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_28|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_284|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_27, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_146, ULTIMATE.start_main_~#t775~0.base=|v_ULTIMATE.start_main_~#t775~0.base_20|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_21, #length=|v_#length_31|, ULTIMATE.start_main_~#t774~0.offset=|v_ULTIMATE.start_main_~#t774~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_54|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_28|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_25|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_55|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_149, ~y$w_buff1~0=v_~y$w_buff1~0_158, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_97, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_136, ULTIMATE.start_main_~#t776~0.offset=|v_ULTIMATE.start_main_~#t776~0.offset_16|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_273, ~x~0=v_~x~0_55, ULTIMATE.start_main_~#t776~0.base=|v_ULTIMATE.start_main_~#t776~0.base_20|, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_739, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ULTIMATE.start_main_~#t775~0.offset=|v_ULTIMATE.start_main_~#t775~0.offset_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_25|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_158|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_~#t774~0.base=|v_ULTIMATE.start_main_~#t774~0.base_23|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_94, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_51|, ~y$w_buff0~0=v_~y$w_buff0~0_171, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_170, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_9|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_9|, ULTIMATE.start_main_~#t773~0.base=|v_ULTIMATE.start_main_~#t773~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_46|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_52|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_39, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_25, ULTIMATE.start_main_~#t773~0.offset=|v_ULTIMATE.start_main_~#t773~0.offset_18|, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_32|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_103|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_158, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_83, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_154|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_357, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_27|, ~z~0=v_~z~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_387} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t775~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t774~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t776~0.offset, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t776~0.base, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t775~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t774~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t773~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t773~0.offset, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L833-1-->L835: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t774~0.base_10| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t774~0.base_10|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t774~0.base_10| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t774~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t774~0.base_10|) |v_ULTIMATE.start_main_~#t774~0.offset_9| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t774~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t774~0.offset_9| 0) (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t774~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t774~0.offset=|v_ULTIMATE.start_main_~#t774~0.offset_9|, #length=|v_#length_19|, ULTIMATE.start_main_~#t774~0.base=|v_ULTIMATE.start_main_~#t774~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t774~0.offset, #length, ULTIMATE.start_main_~#t774~0.base] because there is no mapped edge [2019-12-07 15:51:50,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L835-1-->L837: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t775~0.base_11| 4) |v_#length_17|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t775~0.base_11| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t775~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t775~0.base_11|)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t775~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t775~0.base_11|) |v_ULTIMATE.start_main_~#t775~0.offset_10| 2))) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t775~0.base_11|) 0) (= |v_ULTIMATE.start_main_~#t775~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t775~0.base=|v_ULTIMATE.start_main_~#t775~0.base_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t775~0.offset=|v_ULTIMATE.start_main_~#t775~0.offset_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t775~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t775~0.offset, #length] because there is no mapped edge [2019-12-07 15:51:50,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] P2ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_105 256))) (not (= 0 (mod v_~y$w_buff0_used~0_178 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~y$w_buff0~0_34 v_~y$w_buff1~0_39) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 2 v_~y$w_buff0~0_33) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_~y$w_buff0_used~0_179 v_~y$w_buff1_used~0_105) (= v_~y$w_buff0_used~0_178 1) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_179, ~y$w_buff0~0=v_~y$w_buff0~0_34, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_178, ~y$w_buff1~0=v_~y$w_buff1~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_105} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t776~0.base_11|)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t776~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t776~0.base_11|) |v_ULTIMATE.start_main_~#t776~0.offset_9| 3)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t776~0.base_11|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t776~0.base_11| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t776~0.base_11|)) (= |v_ULTIMATE.start_main_~#t776~0.offset_9| 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t776~0.base_11| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_4|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|, ULTIMATE.start_main_~#t776~0.offset=|v_ULTIMATE.start_main_~#t776~0.offset_9|, ULTIMATE.start_main_~#t776~0.base=|v_ULTIMATE.start_main_~#t776~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, #valid, #memory_int, #length, ULTIMATE.start_main_~#t776~0.offset, ULTIMATE.start_main_~#t776~0.base] because there is no mapped edge [2019-12-07 15:51:50,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_6 |v_P0Thread1of1ForFork2_#in~arg.base_8|) (= v_~a~0_12 1) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= v_P0Thread1of1ForFork2_~arg.offset_6 |v_P0Thread1of1ForFork2_#in~arg.offset_8|) (= v_~x~0_36 v_~__unbuffered_p0_EAX~0_17) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_8|, ~x~0=v_~x~0_36} OutVars{~a~0=v_~a~0_12, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_8|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_6, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_8|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_36, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_6} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 15:51:50,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L757-2-->L757-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1401037873 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1401037873 256) 0)) (.cse2 (= |P1Thread1of1ForFork3_#t~ite4_Out-1401037873| |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|))) (or (and (= ~y$w_buff1~0_In-1401037873 |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|) (not .cse0) (not .cse1) .cse2) (and (= ~y~0_In-1401037873 |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1401037873, ~y$w_buff1~0=~y$w_buff1~0_In-1401037873, ~y~0=~y~0_In-1401037873, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1401037873} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1401037873, ~y$w_buff1~0=~y$w_buff1~0_In-1401037873, P1Thread1of1ForFork3_#t~ite4=|P1Thread1of1ForFork3_#t~ite4_Out-1401037873|, P1Thread1of1ForFork3_#t~ite3=|P1Thread1of1ForFork3_#t~ite3_Out-1401037873|, ~y~0=~y~0_In-1401037873, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1401037873} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite4, P1Thread1of1ForFork3_#t~ite3] because there is no mapped edge [2019-12-07 15:51:50,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In956531405 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In956531405 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork3_#t~ite5_Out956531405| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork3_#t~ite5_Out956531405| ~y$w_buff0_used~0_In956531405)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In956531405, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In956531405} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In956531405, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In956531405, P1Thread1of1ForFork3_#t~ite5=|P1Thread1of1ForFork3_#t~ite5_Out956531405|} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite5] because there is no mapped edge [2019-12-07 15:51:50,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L810-2-->L810-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-1152952519 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1152952519 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite15_Out-1152952519| ~y~0_In-1152952519) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork1_#t~ite15_Out-1152952519| ~y$w_buff1~0_In-1152952519)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1152952519, ~y$w_buff1~0=~y$w_buff1~0_In-1152952519, ~y~0=~y~0_In-1152952519, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1152952519} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1152952519, ~y$w_buff1~0=~y$w_buff1~0_In-1152952519, P3Thread1of1ForFork1_#t~ite15=|P3Thread1of1ForFork1_#t~ite15_Out-1152952519|, ~y~0=~y~0_In-1152952519, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1152952519} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite15] because there is no mapped edge [2019-12-07 15:51:50,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L759-->L759-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In654380926 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In654380926 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In654380926 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In654380926 256)))) (or (and (= 0 |P1Thread1of1ForFork3_#t~ite6_Out654380926|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In654380926 |P1Thread1of1ForFork3_#t~ite6_Out654380926|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In654380926, ~y$w_buff0_used~0=~y$w_buff0_used~0_In654380926, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In654380926, ~y$w_buff1_used~0=~y$w_buff1_used~0_In654380926} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In654380926, ~y$w_buff0_used~0=~y$w_buff0_used~0_In654380926, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In654380926, P1Thread1of1ForFork3_#t~ite6=|P1Thread1of1ForFork3_#t~ite6_Out654380926|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In654380926} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite6] because there is no mapped edge [2019-12-07 15:51:50,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L810-4-->L811: Formula: (= v_~y~0_28 |v_P3Thread1of1ForFork1_#t~ite15_8|) InVars {P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_8|} OutVars{P3Thread1of1ForFork1_#t~ite16=|v_P3Thread1of1ForFork1_#t~ite16_13|, P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_7|, ~y~0=v_~y~0_28} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite16, P3Thread1of1ForFork1_#t~ite15, ~y~0] because there is no mapped edge [2019-12-07 15:51:50,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In1009075687 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1009075687 256)))) (or (and (= ~y$w_buff0_used~0_In1009075687 |P3Thread1of1ForFork1_#t~ite17_Out1009075687|) (or .cse0 .cse1)) (and (= 0 |P3Thread1of1ForFork1_#t~ite17_Out1009075687|) (not .cse0) (not .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1009075687, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1009075687} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1009075687, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1009075687, P3Thread1of1ForFork1_#t~ite17=|P3Thread1of1ForFork1_#t~ite17_Out1009075687|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 15:51:50,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1094275245 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1094275245 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1094275245 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In-1094275245 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork1_#t~ite18_Out-1094275245| ~y$w_buff1_used~0_In-1094275245) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork1_#t~ite18_Out-1094275245| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1094275245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1094275245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1094275245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1094275245} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1094275245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1094275245, P3Thread1of1ForFork1_#t~ite18=|P3Thread1of1ForFork1_#t~ite18_Out-1094275245|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1094275245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1094275245} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite18] because there is no mapped edge [2019-12-07 15:51:50,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In907074519 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In907074519 256)))) (or (and (not .cse0) (= |P3Thread1of1ForFork1_#t~ite19_Out907074519| 0) (not .cse1)) (and (= |P3Thread1of1ForFork1_#t~ite19_Out907074519| ~y$r_buff0_thd4~0_In907074519) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In907074519, ~y$w_buff0_used~0=~y$w_buff0_used~0_In907074519} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In907074519, ~y$w_buff0_used~0=~y$w_buff0_used~0_In907074519, P3Thread1of1ForFork1_#t~ite19=|P3Thread1of1ForFork1_#t~ite19_Out907074519|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 15:51:50,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1516874381 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1516874381 256) 0))) (or (and (= |P1Thread1of1ForFork3_#t~ite7_Out1516874381| ~y$r_buff0_thd2~0_In1516874381) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork3_#t~ite7_Out1516874381| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1516874381, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1516874381} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1516874381, P1Thread1of1ForFork3_#t~ite7=|P1Thread1of1ForFork3_#t~ite7_Out1516874381|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1516874381} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite7] because there is no mapped edge [2019-12-07 15:51:50,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L761-->L761-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In434326272 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In434326272 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In434326272 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In434326272 256)))) (or (and (= |P1Thread1of1ForFork3_#t~ite8_Out434326272| ~y$r_buff1_thd2~0_In434326272) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork3_#t~ite8_Out434326272|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In434326272, ~y$w_buff0_used~0=~y$w_buff0_used~0_In434326272, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In434326272, ~y$w_buff1_used~0=~y$w_buff1_used~0_In434326272} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In434326272, ~y$w_buff0_used~0=~y$w_buff0_used~0_In434326272, P1Thread1of1ForFork3_#t~ite8=|P1Thread1of1ForFork3_#t~ite8_Out434326272|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In434326272, ~y$w_buff1_used~0=~y$w_buff1_used~0_In434326272} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite8] because there is no mapped edge [2019-12-07 15:51:50,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L761-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|) (= |v_P1Thread1of1ForFork3_#t~ite8_24| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_23|, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, ~y$r_buff1_thd2~0, P1Thread1of1ForFork3_#t~ite8, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:51:50,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-569878666 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-569878666 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out-569878666| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-569878666 |P2Thread1of1ForFork0_#t~ite11_Out-569878666|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-569878666, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-569878666} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-569878666, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-569878666|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-569878666} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 15:51:50,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1347582186 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In1347582186 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1347582186 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1347582186 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1347582186 |P2Thread1of1ForFork0_#t~ite12_Out1347582186|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out1347582186|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1347582186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1347582186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1347582186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1347582186} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1347582186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1347582186, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1347582186|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1347582186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1347582186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 15:51:50,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L790-->L791: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1834299319 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1834299319 256))) (.cse2 (= ~y$r_buff0_thd3~0_Out1834299319 ~y$r_buff0_thd3~0_In1834299319))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd3~0_Out1834299319 0)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1834299319, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1834299319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1834299319, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1834299319, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out1834299319|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 15:51:50,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1785178186 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1785178186 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1785178186 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1785178186 256)))) (or (and (= ~y$r_buff1_thd3~0_In-1785178186 |P2Thread1of1ForFork0_#t~ite14_Out-1785178186|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite14_Out-1785178186| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1785178186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1785178186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1785178186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1785178186} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1785178186|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1785178186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1785178186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1785178186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1785178186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 15:51:50,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~y$r_buff1_thd3~0_114 |v_P2Thread1of1ForFork0_#t~ite14_20|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_19|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_114, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:51:50,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In-864943836 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-864943836 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-864943836 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-864943836 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork1_#t~ite20_Out-864943836| 0)) (and (or .cse3 .cse2) (= |P3Thread1of1ForFork1_#t~ite20_Out-864943836| ~y$r_buff1_thd4~0_In-864943836) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-864943836, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-864943836, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-864943836, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-864943836} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-864943836, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-864943836, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-864943836, P3Thread1of1ForFork1_#t~ite20=|P3Thread1of1ForFork1_#t~ite20_Out-864943836|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-864943836} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 15:51:50,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L814-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= |v_P3Thread1of1ForFork1_#t~ite20_28| v_~y$r_buff1_thd4~0_111) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_28|} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_111, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_27|} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 15:51:50,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L843-->L845-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= (mod v_~y$w_buff0_used~0_216 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_104 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_216, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_104, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_216, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_104, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:51:50,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L845-2-->L845-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-519465706| |ULTIMATE.start_main_#t~ite26_Out-519465706|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-519465706 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-519465706 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite25_Out-519465706| ~y$w_buff1~0_In-519465706) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite25_Out-519465706| ~y~0_In-519465706)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-519465706, ~y~0=~y~0_In-519465706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-519465706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-519465706} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-519465706, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-519465706|, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-519465706|, ~y~0=~y~0_In-519465706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-519465706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-519465706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 15:51:50,049 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In921016268 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In921016268 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out921016268| ~y$w_buff0_used~0_In921016268)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite27_Out921016268| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In921016268, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In921016268} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In921016268, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In921016268, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out921016268|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 15:51:50,049 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1821924098 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1821924098 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1821924098 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1821924098 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out1821924098|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In1821924098 |ULTIMATE.start_main_#t~ite28_Out1821924098|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1821924098, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1821924098, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1821924098, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1821924098} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1821924098|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1821924098, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1821924098, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1821924098, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1821924098} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 15:51:50,049 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In2060186022 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2060186022 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In2060186022 |ULTIMATE.start_main_#t~ite29_Out2060186022|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite29_Out2060186022|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2060186022, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2060186022} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2060186022, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2060186022|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2060186022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 15:51:50,050 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1335051104 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1335051104 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1335051104 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1335051104 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite30_Out-1335051104|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In-1335051104 |ULTIMATE.start_main_#t~ite30_Out-1335051104|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1335051104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1335051104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1335051104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1335051104} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1335051104|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1335051104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1335051104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1335051104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1335051104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] because there is no mapped edge [2019-12-07 15:51:50,051 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L858-->L858-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1492239415 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-1492239415| |ULTIMATE.start_main_#t~ite39_Out-1492239415|) (= |ULTIMATE.start_main_#t~ite40_Out-1492239415| ~y$w_buff1~0_In-1492239415)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1492239415| ~y$w_buff1~0_In-1492239415) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1492239415 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1492239415 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1492239415 256)) .cse1) (and (= (mod ~y$w_buff1_used~0_In-1492239415 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite39_Out-1492239415| |ULTIMATE.start_main_#t~ite40_Out-1492239415|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1492239415, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1492239415, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-1492239415|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1492239415, ~weak$$choice2~0=~weak$$choice2~0_In-1492239415, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1492239415, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1492239415} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1492239415|, ~y$w_buff1~0=~y$w_buff1~0_In-1492239415, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1492239415, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1492239415|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1492239415, ~weak$$choice2~0=~weak$$choice2~0_In-1492239415, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1492239415, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1492239415} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:51:50,052 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L859-->L859-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In52324342 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite42_In52324342| |ULTIMATE.start_main_#t~ite42_Out52324342|) (not .cse0) (= ~y$w_buff0_used~0_In52324342 |ULTIMATE.start_main_#t~ite43_Out52324342|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In52324342 256) 0))) (or (= (mod ~y$w_buff0_used~0_In52324342 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In52324342 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In52324342 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite43_Out52324342| |ULTIMATE.start_main_#t~ite42_Out52324342|) (= ~y$w_buff0_used~0_In52324342 |ULTIMATE.start_main_#t~ite42_Out52324342|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In52324342, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In52324342, ~weak$$choice2~0=~weak$$choice2~0_In52324342, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In52324342, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_In52324342|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In52324342} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In52324342, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In52324342, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out52324342|, ~weak$$choice2~0=~weak$$choice2~0_In52324342, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out52324342|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In52324342, ~y$w_buff1_used~0=~y$w_buff1_used~0_In52324342} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:51:50,052 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L860-->L860-8: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite46_Out-1417149636| |ULTIMATE.start_main_#t~ite45_Out-1417149636|)) (.cse0 (= (mod ~weak$$choice2~0_In-1417149636 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1417149636 256) 0)) (.cse4 (= 0 (mod ~y$w_buff1_used~0_In-1417149636 256))) (.cse5 (= (mod ~y$r_buff1_thd0~0_In-1417149636 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-1417149636 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_In-1417149636| |ULTIMATE.start_main_#t~ite44_Out-1417149636|) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1417149636| |ULTIMATE.start_main_#t~ite45_In-1417149636|) (not .cse0) (= ~y$w_buff1_used~0_In-1417149636 |ULTIMATE.start_main_#t~ite46_Out-1417149636|)) (and .cse1 .cse0 (= ~y$w_buff1_used~0_In-1417149636 |ULTIMATE.start_main_#t~ite45_Out-1417149636|) (or .cse2 (and .cse3 .cse4) (and .cse5 .cse3))))) (let ((.cse6 (not .cse3))) (and .cse1 (= |ULTIMATE.start_main_#t~ite44_Out-1417149636| 0) (= |ULTIMATE.start_main_#t~ite44_Out-1417149636| |ULTIMATE.start_main_#t~ite45_Out-1417149636|) .cse0 (not .cse2) (or (not .cse4) .cse6) (or (not .cse5) .cse6))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1417149636, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1417149636, ~weak$$choice2~0=~weak$$choice2~0_In-1417149636, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1417149636|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1417149636, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-1417149636|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1417149636, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1417149636|, ~weak$$choice2~0=~weak$$choice2~0_In-1417149636, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1417149636|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1417149636, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1417149636|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:51:50,052 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L860-8-->L862: Formula: (and (not (= (mod v_~weak$$choice2~0_106 256) 0)) (= v_~y$w_buff1_used~0_383 |v_ULTIMATE.start_main_#t~ite46_36|) (= v_~y$r_buff0_thd0~0_352 v_~y$r_buff0_thd0~0_351)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_352, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~weak$$choice2~0=v_~weak$$choice2~0_106} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_351, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_31|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_34|, ~weak$$choice2~0=v_~weak$$choice2~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_33|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_383} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,053 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L864-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_25) (= v_~y~0_116 v_~y$mem_tmp~0_11) (not (= (mod v_~y$flush_delayed~0_26 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_15 256))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~y~0=v_~y~0_116, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_23|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite53, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:51:50,053 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:51:50,124 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:51:50 BasicIcfg [2019-12-07 15:51:50,124 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:51:50,124 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:51:50,124 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:51:50,124 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:51:50,125 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:49:51" (3/4) ... [2019-12-07 15:51:50,126 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:51:50,127 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_73| 0 0))) (and (= v_~x~0_55 0) (= |v_ULTIMATE.start_main_~#t773~0.offset_18| 0) (= v_~a~0_26 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff1_thd0~0_273 0) (= v_~y$r_buff0_thd1~0_30 0) (= v_~y$r_buff0_thd4~0_83 0) (= v_~main$tmp_guard0~0_39 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t773~0.base_24|)) (= (store .cse0 |v_ULTIMATE.start_main_~#t773~0.base_24| 1) |v_#valid_71|) (= 0 v_~y$r_buff1_thd1~0_94) (= 0 v_~y$r_buff0_thd3~0_170) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t773~0.base_24|) (= v_~y~0_170 0) (= 0 v_~__unbuffered_p3_EBX~0_25) (= v_~y$read_delayed~0_6 0) (= v_~y$r_buff0_thd0~0_357 0) (= v_~y$mem_tmp~0_18 0) (= 0 v_~y$flush_delayed~0_35) (= 0 v_~__unbuffered_p3_EAX~0_21) (= v_~__unbuffered_cnt~0_136 0) (= v_~y$w_buff1_used~0_387 0) (= 0 v_~y$r_buff1_thd2~0_158) (= 0 |v_#NULL.base_4|) (= v_~y$w_buff1~0_158 0) (= 0 v_~y$read_delayed_var~0.base_7) (< 0 |v_#StackHeapBarrier_20|) (= v_~y$r_buff0_thd2~0_97 0) (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t773~0.base_24| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t773~0.base_24|) |v_ULTIMATE.start_main_~#t773~0.offset_18| 0)) |v_#memory_int_27|) (= v_~z~0_109 0) (= 0 v_~__unbuffered_p0_EAX~0_27) (= 0 v_~y$w_buff0~0_171) (= 0 v_~y$r_buff1_thd4~0_149) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard1~0_24 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~y$r_buff1_thd3~0_146) (= |v_#length_31| (store |v_#length_32| |v_ULTIMATE.start_main_~#t773~0.base_24| 4)) (= v_~weak$$choice2~0_110 0) (= v_~y$w_buff0_used~0_739 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_28|, #length=|v_#length_32|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_21|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_33|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_28|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_33|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_284|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_26, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_27, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_146, ULTIMATE.start_main_~#t775~0.base=|v_ULTIMATE.start_main_~#t775~0.base_20|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_21, #length=|v_#length_31|, ULTIMATE.start_main_~#t774~0.offset=|v_ULTIMATE.start_main_~#t774~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_54|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_28|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_25|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_55|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_149, ~y$w_buff1~0=v_~y$w_buff1~0_158, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_97, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_136, ULTIMATE.start_main_~#t776~0.offset=|v_ULTIMATE.start_main_~#t776~0.offset_16|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_273, ~x~0=v_~x~0_55, ULTIMATE.start_main_~#t776~0.base=|v_ULTIMATE.start_main_~#t776~0.base_20|, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_739, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ULTIMATE.start_main_~#t775~0.offset=|v_ULTIMATE.start_main_~#t775~0.offset_17|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_24, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_25|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_158|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_~#t774~0.base=|v_ULTIMATE.start_main_~#t774~0.base_23|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_94, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_51|, ~y$w_buff0~0=v_~y$w_buff0~0_171, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_170, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_9|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_9|, ULTIMATE.start_main_~#t773~0.base=|v_ULTIMATE.start_main_~#t773~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_46|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_52|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_39, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_25, ULTIMATE.start_main_~#t773~0.offset=|v_ULTIMATE.start_main_~#t773~0.offset_18|, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_32|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_103|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_158, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_83, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_154|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_357, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_27|, ~z~0=v_~z~0_109, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_387} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t775~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t774~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$r_buff1_thd4~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t776~0.offset, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t776~0.base, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t775~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t774~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t773~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_~#t773~0.offset, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,127 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L833-1-->L835: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t774~0.base_10| 4)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t774~0.base_10|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t774~0.base_10| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t774~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t774~0.base_10|) |v_ULTIMATE.start_main_~#t774~0.offset_9| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t774~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t774~0.offset_9| 0) (= (select |v_#valid_43| |v_ULTIMATE.start_main_~#t774~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t774~0.offset=|v_ULTIMATE.start_main_~#t774~0.offset_9|, #length=|v_#length_19|, ULTIMATE.start_main_~#t774~0.base=|v_ULTIMATE.start_main_~#t774~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t774~0.offset, #length, ULTIMATE.start_main_~#t774~0.base] because there is no mapped edge [2019-12-07 15:51:50,127 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L835-1-->L837: Formula: (and (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t775~0.base_11| 4) |v_#length_17|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t775~0.base_11| 1) |v_#valid_38|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t775~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t775~0.base_11|)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t775~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t775~0.base_11|) |v_ULTIMATE.start_main_~#t775~0.offset_10| 2))) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t775~0.base_11|) 0) (= |v_ULTIMATE.start_main_~#t775~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t775~0.base=|v_ULTIMATE.start_main_~#t775~0.base_11|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t775~0.offset=|v_ULTIMATE.start_main_~#t775~0.offset_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t775~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t775~0.offset, #length] because there is no mapped edge [2019-12-07 15:51:50,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] P2ENTRY-->L4-3: Formula: (and (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_105 256))) (not (= 0 (mod v_~y$w_buff0_used~0_178 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~y$w_buff0~0_34 v_~y$w_buff1~0_39) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 2 v_~y$w_buff0~0_33) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_~y$w_buff0_used~0_179 v_~y$w_buff1_used~0_105) (= v_~y$w_buff0_used~0_178 1) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_179, ~y$w_buff0~0=v_~y$w_buff0~0_34, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_178, ~y$w_buff1~0=v_~y$w_buff1~0_39, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_8, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_105} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L837-1-->L839: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t776~0.base_11|)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t776~0.base_11| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t776~0.base_11|) |v_ULTIMATE.start_main_~#t776~0.offset_9| 3)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t776~0.base_11|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t776~0.base_11| 1)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t776~0.base_11|)) (= |v_ULTIMATE.start_main_~#t776~0.offset_9| 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t776~0.base_11| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_4|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|, ULTIMATE.start_main_~#t776~0.offset=|v_ULTIMATE.start_main_~#t776~0.offset_9|, ULTIMATE.start_main_~#t776~0.base=|v_ULTIMATE.start_main_~#t776~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, #valid, #memory_int, #length, ULTIMATE.start_main_~#t776~0.offset, ULTIMATE.start_main_~#t776~0.base] because there is no mapped edge [2019-12-07 15:51:50,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork2_~arg.base_6 |v_P0Thread1of1ForFork2_#in~arg.base_8|) (= v_~a~0_12 1) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= v_P0Thread1of1ForFork2_~arg.offset_6 |v_P0Thread1of1ForFork2_#in~arg.offset_8|) (= v_~x~0_36 v_~__unbuffered_p0_EAX~0_17) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_8|, ~x~0=v_~x~0_36} OutVars{~a~0=v_~a~0_12, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_17, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_8|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_6, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_8|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|, ~x~0=v_~x~0_36, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_6} AuxVars[] AssignedVars[~a~0, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 15:51:50,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L757-2-->L757-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1401037873 256))) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1401037873 256) 0)) (.cse2 (= |P1Thread1of1ForFork3_#t~ite4_Out-1401037873| |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|))) (or (and (= ~y$w_buff1~0_In-1401037873 |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|) (not .cse0) (not .cse1) .cse2) (and (= ~y~0_In-1401037873 |P1Thread1of1ForFork3_#t~ite3_Out-1401037873|) (or .cse0 .cse1) .cse2))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1401037873, ~y$w_buff1~0=~y$w_buff1~0_In-1401037873, ~y~0=~y~0_In-1401037873, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1401037873} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1401037873, ~y$w_buff1~0=~y$w_buff1~0_In-1401037873, P1Thread1of1ForFork3_#t~ite4=|P1Thread1of1ForFork3_#t~ite4_Out-1401037873|, P1Thread1of1ForFork3_#t~ite3=|P1Thread1of1ForFork3_#t~ite3_Out-1401037873|, ~y~0=~y~0_In-1401037873, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1401037873} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite4, P1Thread1of1ForFork3_#t~ite3] because there is no mapped edge [2019-12-07 15:51:50,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In956531405 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In956531405 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork3_#t~ite5_Out956531405| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork3_#t~ite5_Out956531405| ~y$w_buff0_used~0_In956531405)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In956531405, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In956531405} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In956531405, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In956531405, P1Thread1of1ForFork3_#t~ite5=|P1Thread1of1ForFork3_#t~ite5_Out956531405|} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite5] because there is no mapped edge [2019-12-07 15:51:50,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L810-2-->L810-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-1152952519 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1152952519 256)))) (or (and (= |P3Thread1of1ForFork1_#t~ite15_Out-1152952519| ~y~0_In-1152952519) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P3Thread1of1ForFork1_#t~ite15_Out-1152952519| ~y$w_buff1~0_In-1152952519)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1152952519, ~y$w_buff1~0=~y$w_buff1~0_In-1152952519, ~y~0=~y~0_In-1152952519, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1152952519} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1152952519, ~y$w_buff1~0=~y$w_buff1~0_In-1152952519, P3Thread1of1ForFork1_#t~ite15=|P3Thread1of1ForFork1_#t~ite15_Out-1152952519|, ~y~0=~y~0_In-1152952519, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1152952519} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite15] because there is no mapped edge [2019-12-07 15:51:50,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L759-->L759-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In654380926 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In654380926 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In654380926 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In654380926 256)))) (or (and (= 0 |P1Thread1of1ForFork3_#t~ite6_Out654380926|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$w_buff1_used~0_In654380926 |P1Thread1of1ForFork3_#t~ite6_Out654380926|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In654380926, ~y$w_buff0_used~0=~y$w_buff0_used~0_In654380926, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In654380926, ~y$w_buff1_used~0=~y$w_buff1_used~0_In654380926} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In654380926, ~y$w_buff0_used~0=~y$w_buff0_used~0_In654380926, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In654380926, P1Thread1of1ForFork3_#t~ite6=|P1Thread1of1ForFork3_#t~ite6_Out654380926|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In654380926} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite6] because there is no mapped edge [2019-12-07 15:51:50,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L810-4-->L811: Formula: (= v_~y~0_28 |v_P3Thread1of1ForFork1_#t~ite15_8|) InVars {P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_8|} OutVars{P3Thread1of1ForFork1_#t~ite16=|v_P3Thread1of1ForFork1_#t~ite16_13|, P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_7|, ~y~0=v_~y~0_28} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite16, P3Thread1of1ForFork1_#t~ite15, ~y~0] because there is no mapped edge [2019-12-07 15:51:50,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In1009075687 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1009075687 256)))) (or (and (= ~y$w_buff0_used~0_In1009075687 |P3Thread1of1ForFork1_#t~ite17_Out1009075687|) (or .cse0 .cse1)) (and (= 0 |P3Thread1of1ForFork1_#t~ite17_Out1009075687|) (not .cse0) (not .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1009075687, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1009075687} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1009075687, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1009075687, P3Thread1of1ForFork1_#t~ite17=|P3Thread1of1ForFork1_#t~ite17_Out1009075687|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 15:51:50,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd4~0_In-1094275245 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1094275245 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1094275245 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In-1094275245 256)))) (or (and (or .cse0 .cse1) (= |P3Thread1of1ForFork1_#t~ite18_Out-1094275245| ~y$w_buff1_used~0_In-1094275245) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P3Thread1of1ForFork1_#t~ite18_Out-1094275245| 0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1094275245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1094275245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1094275245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1094275245} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1094275245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1094275245, P3Thread1of1ForFork1_#t~ite18=|P3Thread1of1ForFork1_#t~ite18_Out-1094275245|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1094275245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1094275245} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite18] because there is no mapped edge [2019-12-07 15:51:50,131 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd4~0_In907074519 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In907074519 256)))) (or (and (not .cse0) (= |P3Thread1of1ForFork1_#t~ite19_Out907074519| 0) (not .cse1)) (and (= |P3Thread1of1ForFork1_#t~ite19_Out907074519| ~y$r_buff0_thd4~0_In907074519) (or .cse0 .cse1)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In907074519, ~y$w_buff0_used~0=~y$w_buff0_used~0_In907074519} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In907074519, ~y$w_buff0_used~0=~y$w_buff0_used~0_In907074519, P3Thread1of1ForFork1_#t~ite19=|P3Thread1of1ForFork1_#t~ite19_Out907074519|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 15:51:50,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1516874381 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1516874381 256) 0))) (or (and (= |P1Thread1of1ForFork3_#t~ite7_Out1516874381| ~y$r_buff0_thd2~0_In1516874381) (or .cse0 .cse1)) (and (not .cse0) (= |P1Thread1of1ForFork3_#t~ite7_Out1516874381| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1516874381, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1516874381} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1516874381, P1Thread1of1ForFork3_#t~ite7=|P1Thread1of1ForFork3_#t~ite7_Out1516874381|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1516874381} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite7] because there is no mapped edge [2019-12-07 15:51:50,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L761-->L761-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In434326272 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In434326272 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In434326272 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In434326272 256)))) (or (and (= |P1Thread1of1ForFork3_#t~ite8_Out434326272| ~y$r_buff1_thd2~0_In434326272) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork3_#t~ite8_Out434326272|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In434326272, ~y$w_buff0_used~0=~y$w_buff0_used~0_In434326272, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In434326272, ~y$w_buff1_used~0=~y$w_buff1_used~0_In434326272} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In434326272, ~y$w_buff0_used~0=~y$w_buff0_used~0_In434326272, P1Thread1of1ForFork3_#t~ite8=|P1Thread1of1ForFork3_#t~ite8_Out434326272|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In434326272, ~y$w_buff1_used~0=~y$w_buff1_used~0_In434326272} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite8] because there is no mapped edge [2019-12-07 15:51:50,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L761-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_41 1) v_~__unbuffered_cnt~0_40) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|) (= |v_P1Thread1of1ForFork3_#t~ite8_24| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_41} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_23|, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, ~y$r_buff1_thd2~0, P1Thread1of1ForFork3_#t~ite8, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:51:50,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-569878666 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-569878666 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out-569878666| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-569878666 |P2Thread1of1ForFork0_#t~ite11_Out-569878666|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-569878666, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-569878666} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-569878666, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-569878666|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-569878666} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 15:51:50,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L789-->L789-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1347582186 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In1347582186 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1347582186 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1347582186 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1347582186 |P2Thread1of1ForFork0_#t~ite12_Out1347582186|)) (and (= 0 |P2Thread1of1ForFork0_#t~ite12_Out1347582186|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1347582186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1347582186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1347582186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1347582186} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1347582186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1347582186, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1347582186|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1347582186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1347582186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 15:51:50,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L790-->L791: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1834299319 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1834299319 256))) (.cse2 (= ~y$r_buff0_thd3~0_Out1834299319 ~y$r_buff0_thd3~0_In1834299319))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd3~0_Out1834299319 0)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1834299319, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1834299319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1834299319, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out1834299319, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out1834299319|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 15:51:50,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1785178186 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1785178186 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1785178186 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1785178186 256)))) (or (and (= ~y$r_buff1_thd3~0_In-1785178186 |P2Thread1of1ForFork0_#t~ite14_Out-1785178186|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork0_#t~ite14_Out-1785178186| 0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1785178186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1785178186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1785178186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1785178186} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1785178186|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1785178186, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1785178186, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1785178186, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1785178186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 15:51:50,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_59 (+ v_~__unbuffered_cnt~0_60 1)) (= v_~y$r_buff1_thd3~0_114 |v_P2Thread1of1ForFork0_#t~ite14_20|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_19|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_114, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:51:50,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd4~0_In-864943836 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-864943836 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-864943836 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-864943836 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork1_#t~ite20_Out-864943836| 0)) (and (or .cse3 .cse2) (= |P3Thread1of1ForFork1_#t~ite20_Out-864943836| ~y$r_buff1_thd4~0_In-864943836) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-864943836, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-864943836, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-864943836, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-864943836} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-864943836, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-864943836, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-864943836, P3Thread1of1ForFork1_#t~ite20=|P3Thread1of1ForFork1_#t~ite20_Out-864943836|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-864943836} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 15:51:50,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L814-2-->P3EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= |v_P3Thread1of1ForFork1_#t~ite20_28| v_~y$r_buff1_thd4~0_111) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_28|} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_111, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_27|} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 15:51:50,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L843-->L845-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= (mod v_~y$w_buff0_used~0_216 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_104 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_216, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_104, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_216, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_104, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:51:50,134 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L845-2-->L845-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out-519465706| |ULTIMATE.start_main_#t~ite26_Out-519465706|)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-519465706 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-519465706 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite25_Out-519465706| ~y$w_buff1~0_In-519465706) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite25_Out-519465706| ~y~0_In-519465706)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-519465706, ~y~0=~y~0_In-519465706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-519465706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-519465706} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-519465706, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-519465706|, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-519465706|, ~y~0=~y~0_In-519465706, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-519465706, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-519465706} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 15:51:50,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L846-->L846-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In921016268 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd0~0_In921016268 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out921016268| ~y$w_buff0_used~0_In921016268)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite27_Out921016268| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In921016268, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In921016268} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In921016268, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In921016268, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out921016268|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 15:51:50,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1821924098 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1821924098 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1821924098 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In1821924098 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out1821924098|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In1821924098 |ULTIMATE.start_main_#t~ite28_Out1821924098|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1821924098, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1821924098, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1821924098, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1821924098} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1821924098|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1821924098, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1821924098, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1821924098, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1821924098} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 15:51:50,135 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L848-->L848-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In2060186022 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In2060186022 256) 0))) (or (and (= ~y$r_buff0_thd0~0_In2060186022 |ULTIMATE.start_main_#t~ite29_Out2060186022|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite29_Out2060186022|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2060186022, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2060186022} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2060186022, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2060186022|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2060186022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 15:51:50,136 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L849-->L849-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1335051104 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1335051104 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1335051104 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1335051104 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite30_Out-1335051104|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In-1335051104 |ULTIMATE.start_main_#t~ite30_Out-1335051104|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1335051104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1335051104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1335051104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1335051104} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1335051104|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1335051104, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1335051104, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1335051104, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1335051104} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] because there is no mapped edge [2019-12-07 15:51:50,137 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L858-->L858-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1492239415 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-1492239415| |ULTIMATE.start_main_#t~ite39_Out-1492239415|) (= |ULTIMATE.start_main_#t~ite40_Out-1492239415| ~y$w_buff1~0_In-1492239415)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1492239415| ~y$w_buff1~0_In-1492239415) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1492239415 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1492239415 256)) (and (= 0 (mod ~y$r_buff1_thd0~0_In-1492239415 256)) .cse1) (and (= (mod ~y$w_buff1_used~0_In-1492239415 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite39_Out-1492239415| |ULTIMATE.start_main_#t~ite40_Out-1492239415|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1492239415, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1492239415, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-1492239415|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1492239415, ~weak$$choice2~0=~weak$$choice2~0_In-1492239415, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1492239415, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1492239415} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-1492239415|, ~y$w_buff1~0=~y$w_buff1~0_In-1492239415, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1492239415, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1492239415|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1492239415, ~weak$$choice2~0=~weak$$choice2~0_In-1492239415, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1492239415, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1492239415} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 15:51:50,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L859-->L859-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In52324342 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite42_In52324342| |ULTIMATE.start_main_#t~ite42_Out52324342|) (not .cse0) (= ~y$w_buff0_used~0_In52324342 |ULTIMATE.start_main_#t~ite43_Out52324342|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In52324342 256) 0))) (or (= (mod ~y$w_buff0_used~0_In52324342 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In52324342 256))) (and (= 0 (mod ~y$r_buff1_thd0~0_In52324342 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite43_Out52324342| |ULTIMATE.start_main_#t~ite42_Out52324342|) (= ~y$w_buff0_used~0_In52324342 |ULTIMATE.start_main_#t~ite42_Out52324342|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In52324342, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In52324342, ~weak$$choice2~0=~weak$$choice2~0_In52324342, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In52324342, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_In52324342|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In52324342} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In52324342, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In52324342, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out52324342|, ~weak$$choice2~0=~weak$$choice2~0_In52324342, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out52324342|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In52324342, ~y$w_buff1_used~0=~y$w_buff1_used~0_In52324342} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:51:50,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L860-->L860-8: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite46_Out-1417149636| |ULTIMATE.start_main_#t~ite45_Out-1417149636|)) (.cse0 (= (mod ~weak$$choice2~0_In-1417149636 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1417149636 256) 0)) (.cse4 (= 0 (mod ~y$w_buff1_used~0_In-1417149636 256))) (.cse5 (= (mod ~y$r_buff1_thd0~0_In-1417149636 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In-1417149636 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_In-1417149636| |ULTIMATE.start_main_#t~ite44_Out-1417149636|) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1417149636| |ULTIMATE.start_main_#t~ite45_In-1417149636|) (not .cse0) (= ~y$w_buff1_used~0_In-1417149636 |ULTIMATE.start_main_#t~ite46_Out-1417149636|)) (and .cse1 .cse0 (= ~y$w_buff1_used~0_In-1417149636 |ULTIMATE.start_main_#t~ite45_Out-1417149636|) (or .cse2 (and .cse3 .cse4) (and .cse5 .cse3))))) (let ((.cse6 (not .cse3))) (and .cse1 (= |ULTIMATE.start_main_#t~ite44_Out-1417149636| 0) (= |ULTIMATE.start_main_#t~ite44_Out-1417149636| |ULTIMATE.start_main_#t~ite45_Out-1417149636|) .cse0 (not .cse2) (or (not .cse4) .cse6) (or (not .cse5) .cse6))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1417149636, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1417149636, ~weak$$choice2~0=~weak$$choice2~0_In-1417149636, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1417149636|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1417149636, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In-1417149636|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1417149636, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1417149636|, ~weak$$choice2~0=~weak$$choice2~0_In-1417149636, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1417149636, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1417149636|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1417149636, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-1417149636|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:51:50,138 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L860-8-->L862: Formula: (and (not (= (mod v_~weak$$choice2~0_106 256) 0)) (= v_~y$w_buff1_used~0_383 |v_ULTIMATE.start_main_#t~ite46_36|) (= v_~y$r_buff0_thd0~0_352 v_~y$r_buff0_thd0~0_351)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_352, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~weak$$choice2~0=v_~weak$$choice2~0_106} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_351, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_31|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_34|, ~weak$$choice2~0=v_~weak$$choice2~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_33|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_383} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 15:51:50,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L864-->L4: Formula: (and (= 0 v_~y$flush_delayed~0_25) (= v_~y~0_116 v_~y$mem_tmp~0_11) (not (= (mod v_~y$flush_delayed~0_26 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_15 256))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_11, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_11, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~y~0=v_~y~0_116, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_23|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite53, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:51:50,139 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:51:50,213 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d6ee3d9d-f044-4e10-89dc-f0892cc21d60/bin/utaipan/witness.graphml [2019-12-07 15:51:50,213 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:51:50,214 INFO L168 Benchmark]: Toolchain (without parser) took 119929.24 ms. Allocated memory was 1.0 GB in the beginning and 8.5 GB in the end (delta: 7.5 GB). Free memory was 938.7 MB in the beginning and 4.7 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,215 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:51:50,215 INFO L168 Benchmark]: CACSL2BoogieTranslator took 409.62 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -118.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,215 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:51:50,216 INFO L168 Benchmark]: Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,216 INFO L168 Benchmark]: RCFGBuilder took 433.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.6 MB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,216 INFO L168 Benchmark]: TraceAbstraction took 118928.29 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 995.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,217 INFO L168 Benchmark]: Witness Printer took 88.89 ms. Allocated memory is still 8.5 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 46.2 MB). Peak memory consumption was 46.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:51:50,219 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 409.62 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.9 MB). Free memory was 938.7 MB in the beginning and 1.1 GB in the end (delta: -118.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 433.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 995.6 MB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 118928.29 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 995.6 MB in the beginning and 4.8 GB in the end (delta: -3.8 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 88.89 ms. Allocated memory is still 8.5 GB. Free memory was 4.8 GB in the beginning and 4.7 GB in the end (delta: 46.2 MB). Peak memory consumption was 46.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 192 ProgramPointsBefore, 97 ProgramPointsAfterwards, 226 TransitionsBefore, 103 TransitionsAfterwards, 18432 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 33 ChoiceCompositions, 6018 VarBasedMoverChecksPositive, 223 VarBasedMoverChecksNegative, 64 SemBasedMoverChecksPositive, 227 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 86545 CheckedPairsTotal, 127 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t773, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L835] FCALL, FORK 0 pthread_create(&t774, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L837] FCALL, FORK 0 pthread_create(&t775, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L776] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L777] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L778] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L779] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L780] 3 y$r_buff1_thd4 = y$r_buff0_thd4 [L781] 3 y$r_buff0_thd3 = (_Bool)1 [L784] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L839] FCALL, FORK 0 pthread_create(&t776, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L801] 4 z = 2 [L804] 4 __unbuffered_p3_EAX = z [L807] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L810] 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L751] 2 x = 1 [L754] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L757] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L811] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L812] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L813] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L841] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L845] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L846] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L847] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L848] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L849] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 y$flush_delayed = weak$$choice2 [L855] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L856] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L856] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L857] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L857] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L858] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L859] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L862] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L862] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p3_EAX == 2 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=2, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 180 locations, 2 error locations. Result: UNSAFE, OverallTime: 118.7s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 22.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3000 SDtfs, 3284 SDslu, 6017 SDs, 0 SdLazy, 3650 SolverSat, 213 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 176 GetRequests, 50 SyntacticMatches, 16 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=335984occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 52.1s AutomataMinimizationTime, 20 MinimizatonAttempts, 141051 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 1032 NumberOfCodeBlocks, 1032 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 942 ConstructedInterpolants, 0 QuantifiedInterpolants, 141628 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...