./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6507a8ac59363bf3e0c02ac3bbcfdfb96f1ad9a0 ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:05:07,464 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:05:07,466 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:05:07,474 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:05:07,474 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:05:07,475 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:05:07,476 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:05:07,478 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:05:07,479 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:05:07,480 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:05:07,481 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:05:07,482 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:05:07,482 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:05:07,483 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:05:07,484 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:05:07,485 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:05:07,486 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:05:07,487 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:05:07,488 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:05:07,490 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:05:07,492 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:05:07,492 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:05:07,493 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:05:07,494 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:05:07,496 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:05:07,496 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:05:07,497 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:05:07,497 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:05:07,497 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:05:07,498 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:05:07,498 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:05:07,499 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:05:07,500 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:05:07,500 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:05:07,501 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:05:07,501 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:05:07,502 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:05:07,502 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:05:07,502 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:05:07,503 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:05:07,503 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:05:07,504 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:05:07,516 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:05:07,516 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:05:07,517 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:05:07,517 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:05:07,517 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:05:07,517 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:05:07,517 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:05:07,518 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:05:07,518 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:05:07,519 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:05:07,519 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:05:07,519 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:05:07,519 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:05:07,519 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:05:07,520 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:05:07,521 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:05:07,521 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:05:07,521 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:05:07,522 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:05:07,522 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:05:07,522 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:05:07,522 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:05:07,522 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6507a8ac59363bf3e0c02ac3bbcfdfb96f1ad9a0 [2019-12-07 19:05:07,629 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:05:07,639 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:05:07,641 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:05:07,643 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:05:07,643 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:05:07,643 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i [2019-12-07 19:05:07,682 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/data/c119577dc/b7b93c8aa9454ac9a2e2f52d67ebd656/FLAGe51dd1f7f [2019-12-07 19:05:08,073 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:05:08,073 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/sv-benchmarks/c/pthread-wmm/mix033_pso.oepc.i [2019-12-07 19:05:08,085 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/data/c119577dc/b7b93c8aa9454ac9a2e2f52d67ebd656/FLAGe51dd1f7f [2019-12-07 19:05:08,094 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/data/c119577dc/b7b93c8aa9454ac9a2e2f52d67ebd656 [2019-12-07 19:05:08,096 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:05:08,097 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:05:08,098 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:05:08,098 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:05:08,101 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:05:08,101 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,103 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08, skipping insertion in model container [2019-12-07 19:05:08,103 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,108 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:05:08,138 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:05:08,401 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:05:08,409 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:05:08,455 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:05:08,502 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:05:08,502 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08 WrapperNode [2019-12-07 19:05:08,502 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:05:08,503 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:05:08,503 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:05:08,503 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:05:08,509 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,522 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,541 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:05:08,542 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:05:08,542 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:05:08,542 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:05:08,548 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,548 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,552 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,552 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,559 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,562 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,565 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... [2019-12-07 19:05:08,568 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:05:08,568 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:05:08,568 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:05:08,569 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:05:08,569 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:05:08,616 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:05:08,616 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:05:08,616 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:05:08,616 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:05:08,616 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:05:08,617 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:05:08,617 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:05:08,617 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:05:08,617 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:05:08,617 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:05:08,617 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:05:08,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:05:08,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:05:08,618 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:05:09,006 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:05:09,007 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:05:09,008 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:05:09 BoogieIcfgContainer [2019-12-07 19:05:09,008 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:05:09,008 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:05:09,009 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:05:09,010 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:05:09,011 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:05:08" (1/3) ... [2019-12-07 19:05:09,011 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5789fdb0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:05:09, skipping insertion in model container [2019-12-07 19:05:09,011 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:05:08" (2/3) ... [2019-12-07 19:05:09,011 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5789fdb0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:05:09, skipping insertion in model container [2019-12-07 19:05:09,012 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:05:09" (3/3) ... [2019-12-07 19:05:09,013 INFO L109 eAbstractionObserver]: Analyzing ICFG mix033_pso.oepc.i [2019-12-07 19:05:09,019 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:05:09,020 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:05:09,025 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:05:09,026 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:05:09,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,055 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,055 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,060 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,061 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,062 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,069 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,074 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,075 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,076 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,076 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:05:09,088 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 19:05:09,100 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:05:09,100 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:05:09,100 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:05:09,100 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:05:09,100 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:05:09,101 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:05:09,101 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:05:09,101 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:05:09,111 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 19:05:09,112 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 19:05:09,167 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 19:05:09,167 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:05:09,176 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:05:09,193 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 19:05:09,226 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 19:05:09,226 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:05:09,231 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 694 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 19:05:09,247 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 19:05:09,248 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:05:12,318 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 19:05:12,547 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 48 [2019-12-07 19:05:12,569 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80691 [2019-12-07 19:05:12,569 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 19:05:12,571 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 102 transitions [2019-12-07 19:05:25,210 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 109594 states. [2019-12-07 19:05:25,212 INFO L276 IsEmpty]: Start isEmpty. Operand 109594 states. [2019-12-07 19:05:25,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 19:05:25,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:25,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 19:05:25,216 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:25,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:25,220 INFO L82 PathProgramCache]: Analyzing trace with hash 925663, now seen corresponding path program 1 times [2019-12-07 19:05:25,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:05:25,226 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866891739] [2019-12-07 19:05:25,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:25,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:05:25,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:05:25,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866891739] [2019-12-07 19:05:25,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:05:25,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:05:25,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971743178] [2019-12-07 19:05:25,371 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:05:25,371 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:05:25,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:05:25,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:05:25,382 INFO L87 Difference]: Start difference. First operand 109594 states. Second operand 3 states. [2019-12-07 19:05:26,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:26,249 INFO L93 Difference]: Finished difference Result 108584 states and 463030 transitions. [2019-12-07 19:05:26,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:05:26,251 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 19:05:26,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:26,753 INFO L225 Difference]: With dead ends: 108584 [2019-12-07 19:05:26,753 INFO L226 Difference]: Without dead ends: 102344 [2019-12-07 19:05:26,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:05:30,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102344 states. [2019-12-07 19:05:31,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102344 to 102344. [2019-12-07 19:05:31,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102344 states. [2019-12-07 19:05:33,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102344 states to 102344 states and 435834 transitions. [2019-12-07 19:05:33,995 INFO L78 Accepts]: Start accepts. Automaton has 102344 states and 435834 transitions. Word has length 3 [2019-12-07 19:05:33,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:05:33,995 INFO L462 AbstractCegarLoop]: Abstraction has 102344 states and 435834 transitions. [2019-12-07 19:05:33,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:05:33,995 INFO L276 IsEmpty]: Start isEmpty. Operand 102344 states and 435834 transitions. [2019-12-07 19:05:33,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 19:05:33,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:33,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:05:33,998 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:33,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:33,998 INFO L82 PathProgramCache]: Analyzing trace with hash 295188242, now seen corresponding path program 1 times [2019-12-07 19:05:33,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:05:33,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397835799] [2019-12-07 19:05:33,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:34,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:05:34,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:05:34,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1397835799] [2019-12-07 19:05:34,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:05:34,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:05:34,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001461236] [2019-12-07 19:05:34,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:05:34,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:05:34,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:05:34,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:05:34,072 INFO L87 Difference]: Start difference. First operand 102344 states and 435834 transitions. Second operand 4 states. [2019-12-07 19:05:34,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:34,951 INFO L93 Difference]: Finished difference Result 162816 states and 664963 transitions. [2019-12-07 19:05:34,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:05:34,952 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 19:05:34,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:35,392 INFO L225 Difference]: With dead ends: 162816 [2019-12-07 19:05:35,392 INFO L226 Difference]: Without dead ends: 162767 [2019-12-07 19:05:35,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:05:40,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162767 states. [2019-12-07 19:05:42,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162767 to 148375. [2019-12-07 19:05:42,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148375 states. [2019-12-07 19:05:42,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148375 states to 148375 states and 613985 transitions. [2019-12-07 19:05:42,890 INFO L78 Accepts]: Start accepts. Automaton has 148375 states and 613985 transitions. Word has length 11 [2019-12-07 19:05:42,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:05:42,890 INFO L462 AbstractCegarLoop]: Abstraction has 148375 states and 613985 transitions. [2019-12-07 19:05:42,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:05:42,890 INFO L276 IsEmpty]: Start isEmpty. Operand 148375 states and 613985 transitions. [2019-12-07 19:05:42,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:05:42,895 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:42,896 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:05:42,896 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:42,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:42,896 INFO L82 PathProgramCache]: Analyzing trace with hash 1979345710, now seen corresponding path program 1 times [2019-12-07 19:05:42,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:05:42,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050254920] [2019-12-07 19:05:42,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:42,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:05:42,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:05:42,947 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050254920] [2019-12-07 19:05:42,947 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:05:42,947 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:05:42,947 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199816253] [2019-12-07 19:05:42,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:05:42,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:05:42,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:05:42,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:05:42,948 INFO L87 Difference]: Start difference. First operand 148375 states and 613985 transitions. Second operand 4 states. [2019-12-07 19:05:44,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:44,026 INFO L93 Difference]: Finished difference Result 208037 states and 841937 transitions. [2019-12-07 19:05:44,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:05:44,027 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:05:44,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:44,553 INFO L225 Difference]: With dead ends: 208037 [2019-12-07 19:05:44,553 INFO L226 Difference]: Without dead ends: 207981 [2019-12-07 19:05:44,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:05:51,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207981 states. [2019-12-07 19:05:54,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207981 to 175449. [2019-12-07 19:05:54,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175449 states. [2019-12-07 19:05:54,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175449 states to 175449 states and 722246 transitions. [2019-12-07 19:05:54,600 INFO L78 Accepts]: Start accepts. Automaton has 175449 states and 722246 transitions. Word has length 13 [2019-12-07 19:05:54,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:05:54,601 INFO L462 AbstractCegarLoop]: Abstraction has 175449 states and 722246 transitions. [2019-12-07 19:05:54,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:05:54,601 INFO L276 IsEmpty]: Start isEmpty. Operand 175449 states and 722246 transitions. [2019-12-07 19:05:54,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:05:54,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:05:54,608 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:05:54,608 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:05:54,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:05:54,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1850281775, now seen corresponding path program 1 times [2019-12-07 19:05:54,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:05:54,608 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853775417] [2019-12-07 19:05:54,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:05:54,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:05:54,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:05:54,635 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853775417] [2019-12-07 19:05:54,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:05:54,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:05:54,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2106440308] [2019-12-07 19:05:54,636 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:05:54,636 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:05:54,636 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:05:54,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:05:54,636 INFO L87 Difference]: Start difference. First operand 175449 states and 722246 transitions. Second operand 3 states. [2019-12-07 19:05:56,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:05:56,213 INFO L93 Difference]: Finished difference Result 259190 states and 1053818 transitions. [2019-12-07 19:05:56,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:05:56,214 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 19:05:56,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:05:56,855 INFO L225 Difference]: With dead ends: 259190 [2019-12-07 19:05:56,855 INFO L226 Difference]: Without dead ends: 259190 [2019-12-07 19:05:56,855 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:06:04,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259190 states. [2019-12-07 19:06:07,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259190 to 195219. [2019-12-07 19:06:07,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195219 states. [2019-12-07 19:06:08,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195219 states to 195219 states and 799392 transitions. [2019-12-07 19:06:08,374 INFO L78 Accepts]: Start accepts. Automaton has 195219 states and 799392 transitions. Word has length 16 [2019-12-07 19:06:08,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:06:08,374 INFO L462 AbstractCegarLoop]: Abstraction has 195219 states and 799392 transitions. [2019-12-07 19:06:08,374 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:06:08,374 INFO L276 IsEmpty]: Start isEmpty. Operand 195219 states and 799392 transitions. [2019-12-07 19:06:08,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:06:08,380 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:06:08,380 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:06:08,381 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:06:08,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:06:08,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1985443542, now seen corresponding path program 1 times [2019-12-07 19:06:08,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:06:08,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [320674380] [2019-12-07 19:06:08,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:06:08,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:06:08,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:06:08,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [320674380] [2019-12-07 19:06:08,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:06:08,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:06:08,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731400000] [2019-12-07 19:06:08,425 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:06:08,425 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:06:08,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:06:08,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:06:08,425 INFO L87 Difference]: Start difference. First operand 195219 states and 799392 transitions. Second operand 4 states. [2019-12-07 19:06:09,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:06:09,568 INFO L93 Difference]: Finished difference Result 227593 states and 924546 transitions. [2019-12-07 19:06:09,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:06:09,569 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:06:09,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:06:10,162 INFO L225 Difference]: With dead ends: 227593 [2019-12-07 19:06:10,162 INFO L226 Difference]: Without dead ends: 227593 [2019-12-07 19:06:10,162 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:06:15,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227593 states. [2019-12-07 19:06:21,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227593 to 204638. [2019-12-07 19:06:21,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204638 states. [2019-12-07 19:06:21,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204638 states to 204638 states and 837381 transitions. [2019-12-07 19:06:21,748 INFO L78 Accepts]: Start accepts. Automaton has 204638 states and 837381 transitions. Word has length 16 [2019-12-07 19:06:21,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:06:21,749 INFO L462 AbstractCegarLoop]: Abstraction has 204638 states and 837381 transitions. [2019-12-07 19:06:21,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:06:21,749 INFO L276 IsEmpty]: Start isEmpty. Operand 204638 states and 837381 transitions. [2019-12-07 19:06:21,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 19:06:21,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:06:21,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:06:21,756 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:06:21,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:06:21,756 INFO L82 PathProgramCache]: Analyzing trace with hash -32753983, now seen corresponding path program 1 times [2019-12-07 19:06:21,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:06:21,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141182917] [2019-12-07 19:06:21,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:06:21,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:06:21,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:06:21,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141182917] [2019-12-07 19:06:21,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:06:21,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:06:21,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438555914] [2019-12-07 19:06:21,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:06:21,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:06:21,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:06:21,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:06:21,797 INFO L87 Difference]: Start difference. First operand 204638 states and 837381 transitions. Second operand 4 states. [2019-12-07 19:06:23,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:06:23,359 INFO L93 Difference]: Finished difference Result 239634 states and 974592 transitions. [2019-12-07 19:06:23,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:06:23,360 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 19:06:23,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:06:23,984 INFO L225 Difference]: With dead ends: 239634 [2019-12-07 19:06:23,984 INFO L226 Difference]: Without dead ends: 239634 [2019-12-07 19:06:23,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:06:29,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239634 states. [2019-12-07 19:06:32,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239634 to 207981. [2019-12-07 19:06:32,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207981 states. [2019-12-07 19:06:33,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207981 states to 207981 states and 851409 transitions. [2019-12-07 19:06:33,779 INFO L78 Accepts]: Start accepts. Automaton has 207981 states and 851409 transitions. Word has length 16 [2019-12-07 19:06:33,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:06:33,779 INFO L462 AbstractCegarLoop]: Abstraction has 207981 states and 851409 transitions. [2019-12-07 19:06:33,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:06:33,780 INFO L276 IsEmpty]: Start isEmpty. Operand 207981 states and 851409 transitions. [2019-12-07 19:06:33,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 19:06:33,792 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:06:33,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:06:33,793 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:06:33,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:06:33,793 INFO L82 PathProgramCache]: Analyzing trace with hash -486126770, now seen corresponding path program 1 times [2019-12-07 19:06:33,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:06:33,793 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169519516] [2019-12-07 19:06:33,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:06:33,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:06:33,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:06:33,824 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169519516] [2019-12-07 19:06:33,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:06:33,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:06:33,825 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782840203] [2019-12-07 19:06:33,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:06:33,825 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:06:33,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:06:33,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:06:33,825 INFO L87 Difference]: Start difference. First operand 207981 states and 851409 transitions. Second operand 3 states. [2019-12-07 19:06:34,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:06:34,660 INFO L93 Difference]: Finished difference Result 195999 states and 793327 transitions. [2019-12-07 19:06:34,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:06:34,661 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 19:06:34,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:06:35,135 INFO L225 Difference]: With dead ends: 195999 [2019-12-07 19:06:35,135 INFO L226 Difference]: Without dead ends: 195999 [2019-12-07 19:06:35,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:06:42,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195999 states. [2019-12-07 19:06:44,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195999 to 192467. [2019-12-07 19:06:44,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192467 states. [2019-12-07 19:06:45,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192467 states to 192467 states and 780243 transitions. [2019-12-07 19:06:45,062 INFO L78 Accepts]: Start accepts. Automaton has 192467 states and 780243 transitions. Word has length 18 [2019-12-07 19:06:45,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:06:45,062 INFO L462 AbstractCegarLoop]: Abstraction has 192467 states and 780243 transitions. [2019-12-07 19:06:45,062 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:06:45,062 INFO L276 IsEmpty]: Start isEmpty. Operand 192467 states and 780243 transitions. [2019-12-07 19:06:45,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 19:06:45,071 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:06:45,071 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:06:45,071 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:06:45,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:06:45,071 INFO L82 PathProgramCache]: Analyzing trace with hash 15459224, now seen corresponding path program 1 times [2019-12-07 19:06:45,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:06:45,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [568081411] [2019-12-07 19:06:45,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:06:45,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:06:45,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:06:45,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [568081411] [2019-12-07 19:06:45,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:06:45,120 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:06:45,120 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879427772] [2019-12-07 19:06:45,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:06:45,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:06:45,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:06:45,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:06:45,121 INFO L87 Difference]: Start difference. First operand 192467 states and 780243 transitions. Second operand 3 states. [2019-12-07 19:06:46,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:06:46,901 INFO L93 Difference]: Finished difference Result 344016 states and 1384860 transitions. [2019-12-07 19:06:46,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:06:46,901 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 19:06:46,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:06:47,643 INFO L225 Difference]: With dead ends: 344016 [2019-12-07 19:06:47,643 INFO L226 Difference]: Without dead ends: 313472 [2019-12-07 19:06:47,643 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:06:53,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313472 states. [2019-12-07 19:06:58,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313472 to 300329. [2019-12-07 19:06:58,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300329 states. [2019-12-07 19:06:59,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300329 states to 300329 states and 1217797 transitions. [2019-12-07 19:06:59,295 INFO L78 Accepts]: Start accepts. Automaton has 300329 states and 1217797 transitions. Word has length 18 [2019-12-07 19:06:59,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:06:59,295 INFO L462 AbstractCegarLoop]: Abstraction has 300329 states and 1217797 transitions. [2019-12-07 19:06:59,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:06:59,295 INFO L276 IsEmpty]: Start isEmpty. Operand 300329 states and 1217797 transitions. [2019-12-07 19:06:59,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:06:59,311 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:06:59,311 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:06:59,311 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:06:59,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:06:59,311 INFO L82 PathProgramCache]: Analyzing trace with hash -1539660278, now seen corresponding path program 1 times [2019-12-07 19:06:59,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:06:59,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1098427756] [2019-12-07 19:06:59,311 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:06:59,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:06:59,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:06:59,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1098427756] [2019-12-07 19:06:59,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:06:59,361 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:06:59,361 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725070506] [2019-12-07 19:06:59,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:06:59,361 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:06:59,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:06:59,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:06:59,362 INFO L87 Difference]: Start difference. First operand 300329 states and 1217797 transitions. Second operand 5 states. [2019-12-07 19:07:01,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:01,998 INFO L93 Difference]: Finished difference Result 434584 states and 1724888 transitions. [2019-12-07 19:07:01,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:07:01,999 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 19:07:01,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:06,863 INFO L225 Difference]: With dead ends: 434584 [2019-12-07 19:07:06,864 INFO L226 Difference]: Without dead ends: 434493 [2019-12-07 19:07:06,864 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:07:13,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434493 states. [2019-12-07 19:07:18,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434493 to 325092. [2019-12-07 19:07:18,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325092 states. [2019-12-07 19:07:19,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325092 states to 325092 states and 1312244 transitions. [2019-12-07 19:07:19,977 INFO L78 Accepts]: Start accepts. Automaton has 325092 states and 1312244 transitions. Word has length 19 [2019-12-07 19:07:19,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:07:19,978 INFO L462 AbstractCegarLoop]: Abstraction has 325092 states and 1312244 transitions. [2019-12-07 19:07:19,978 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:07:19,978 INFO L276 IsEmpty]: Start isEmpty. Operand 325092 states and 1312244 transitions. [2019-12-07 19:07:19,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:07:19,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:07:19,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:07:19,998 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:07:19,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:07:19,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1910526168, now seen corresponding path program 1 times [2019-12-07 19:07:19,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:07:19,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724023303] [2019-12-07 19:07:19,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:07:20,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:07:20,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:07:20,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724023303] [2019-12-07 19:07:20,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:07:20,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:07:20,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804568822] [2019-12-07 19:07:20,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:07:20,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:07:20,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:07:20,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:07:20,047 INFO L87 Difference]: Start difference. First operand 325092 states and 1312244 transitions. Second operand 4 states. [2019-12-07 19:07:21,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:21,896 INFO L93 Difference]: Finished difference Result 337096 states and 1348933 transitions. [2019-12-07 19:07:21,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:07:21,896 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 19:07:21,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:23,400 INFO L225 Difference]: With dead ends: 337096 [2019-12-07 19:07:23,400 INFO L226 Difference]: Without dead ends: 337096 [2019-12-07 19:07:23,401 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:07:29,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337096 states. [2019-12-07 19:07:33,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337096 to 321894. [2019-12-07 19:07:33,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321894 states. [2019-12-07 19:07:40,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321894 states to 321894 states and 1300178 transitions. [2019-12-07 19:07:40,280 INFO L78 Accepts]: Start accepts. Automaton has 321894 states and 1300178 transitions. Word has length 19 [2019-12-07 19:07:40,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:07:40,281 INFO L462 AbstractCegarLoop]: Abstraction has 321894 states and 1300178 transitions. [2019-12-07 19:07:40,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:07:40,281 INFO L276 IsEmpty]: Start isEmpty. Operand 321894 states and 1300178 transitions. [2019-12-07 19:07:40,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 19:07:40,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:07:40,302 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:07:40,302 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:07:40,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:07:40,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1804312711, now seen corresponding path program 1 times [2019-12-07 19:07:40,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:07:40,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812968801] [2019-12-07 19:07:40,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:07:40,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:07:40,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:07:40,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812968801] [2019-12-07 19:07:40,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:07:40,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:07:40,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773989294] [2019-12-07 19:07:40,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:07:40,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:07:40,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:07:40,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:07:40,346 INFO L87 Difference]: Start difference. First operand 321894 states and 1300178 transitions. Second operand 4 states. [2019-12-07 19:07:42,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:42,127 INFO L93 Difference]: Finished difference Result 334949 states and 1340993 transitions. [2019-12-07 19:07:42,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:07:42,128 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 19:07:42,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:42,946 INFO L225 Difference]: With dead ends: 334949 [2019-12-07 19:07:42,947 INFO L226 Difference]: Without dead ends: 334949 [2019-12-07 19:07:42,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:07:48,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334949 states. [2019-12-07 19:07:53,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334949 to 310982. [2019-12-07 19:07:53,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310982 states. [2019-12-07 19:07:54,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310982 states to 310982 states and 1255856 transitions. [2019-12-07 19:07:54,674 INFO L78 Accepts]: Start accepts. Automaton has 310982 states and 1255856 transitions. Word has length 19 [2019-12-07 19:07:54,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:07:54,674 INFO L462 AbstractCegarLoop]: Abstraction has 310982 states and 1255856 transitions. [2019-12-07 19:07:54,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:07:54,674 INFO L276 IsEmpty]: Start isEmpty. Operand 310982 states and 1255856 transitions. [2019-12-07 19:07:54,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 19:07:54,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:07:54,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:07:54,699 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:07:54,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:07:54,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1380317719, now seen corresponding path program 1 times [2019-12-07 19:07:54,700 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:07:54,700 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855857215] [2019-12-07 19:07:54,700 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:07:54,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:07:54,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:07:54,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855857215] [2019-12-07 19:07:54,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:07:54,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:07:54,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855880092] [2019-12-07 19:07:54,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:07:54,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:07:54,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:07:54,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:07:54,738 INFO L87 Difference]: Start difference. First operand 310982 states and 1255856 transitions. Second operand 4 states. [2019-12-07 19:07:55,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:55,033 INFO L93 Difference]: Finished difference Result 86910 states and 292872 transitions. [2019-12-07 19:07:55,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:07:55,034 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 19:07:55,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:55,141 INFO L225 Difference]: With dead ends: 86910 [2019-12-07 19:07:55,141 INFO L226 Difference]: Without dead ends: 65685 [2019-12-07 19:07:55,141 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:07:55,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65685 states. [2019-12-07 19:07:56,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65685 to 65573. [2019-12-07 19:07:56,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65573 states. [2019-12-07 19:07:56,566 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65573 states to 65573 states and 208360 transitions. [2019-12-07 19:07:56,566 INFO L78 Accepts]: Start accepts. Automaton has 65573 states and 208360 transitions. Word has length 20 [2019-12-07 19:07:56,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:07:56,566 INFO L462 AbstractCegarLoop]: Abstraction has 65573 states and 208360 transitions. [2019-12-07 19:07:56,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:07:56,566 INFO L276 IsEmpty]: Start isEmpty. Operand 65573 states and 208360 transitions. [2019-12-07 19:07:56,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:07:56,573 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:07:56,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:07:56,573 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:07:56,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:07:56,573 INFO L82 PathProgramCache]: Analyzing trace with hash 1141389468, now seen corresponding path program 1 times [2019-12-07 19:07:56,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:07:56,574 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [940837108] [2019-12-07 19:07:56,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:07:56,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:07:56,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:07:56,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [940837108] [2019-12-07 19:07:56,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:07:56,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:07:56,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511342069] [2019-12-07 19:07:56,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:07:56,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:07:56,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:07:56,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:07:56,603 INFO L87 Difference]: Start difference. First operand 65573 states and 208360 transitions. Second operand 5 states. [2019-12-07 19:07:57,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:57,063 INFO L93 Difference]: Finished difference Result 82355 states and 256944 transitions. [2019-12-07 19:07:57,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:07:57,063 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:07:57,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:57,172 INFO L225 Difference]: With dead ends: 82355 [2019-12-07 19:07:57,173 INFO L226 Difference]: Without dead ends: 82299 [2019-12-07 19:07:57,173 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:07:57,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82299 states. [2019-12-07 19:07:58,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82299 to 68425. [2019-12-07 19:07:58,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68425 states. [2019-12-07 19:07:58,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68425 states to 68425 states and 216910 transitions. [2019-12-07 19:07:58,748 INFO L78 Accepts]: Start accepts. Automaton has 68425 states and 216910 transitions. Word has length 22 [2019-12-07 19:07:58,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:07:58,748 INFO L462 AbstractCegarLoop]: Abstraction has 68425 states and 216910 transitions. [2019-12-07 19:07:58,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:07:58,748 INFO L276 IsEmpty]: Start isEmpty. Operand 68425 states and 216910 transitions. [2019-12-07 19:07:58,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:07:58,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:07:58,754 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:07:58,754 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:07:58,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:07:58,754 INFO L82 PathProgramCache]: Analyzing trace with hash 1541375313, now seen corresponding path program 1 times [2019-12-07 19:07:58,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:07:58,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376190751] [2019-12-07 19:07:58,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:07:58,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:07:58,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:07:58,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376190751] [2019-12-07 19:07:58,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:07:58,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:07:58,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723205408] [2019-12-07 19:07:58,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:07:58,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:07:58,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:07:58,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:07:58,797 INFO L87 Difference]: Start difference. First operand 68425 states and 216910 transitions. Second operand 5 states. [2019-12-07 19:07:59,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:07:59,287 INFO L93 Difference]: Finished difference Result 85549 states and 267008 transitions. [2019-12-07 19:07:59,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:07:59,288 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:07:59,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:07:59,407 INFO L225 Difference]: With dead ends: 85549 [2019-12-07 19:07:59,407 INFO L226 Difference]: Without dead ends: 85493 [2019-12-07 19:07:59,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:07:59,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85493 states. [2019-12-07 19:08:00,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85493 to 68439. [2019-12-07 19:08:00,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68439 states. [2019-12-07 19:08:00,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68439 states to 68439 states and 216766 transitions. [2019-12-07 19:08:00,622 INFO L78 Accepts]: Start accepts. Automaton has 68439 states and 216766 transitions. Word has length 22 [2019-12-07 19:08:00,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:00,623 INFO L462 AbstractCegarLoop]: Abstraction has 68439 states and 216766 transitions. [2019-12-07 19:08:00,623 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:00,623 INFO L276 IsEmpty]: Start isEmpty. Operand 68439 states and 216766 transitions. [2019-12-07 19:08:00,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 19:08:00,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:00,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:00,637 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:00,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:00,637 INFO L82 PathProgramCache]: Analyzing trace with hash 2020314615, now seen corresponding path program 1 times [2019-12-07 19:08:00,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:00,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767955615] [2019-12-07 19:08:00,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:00,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:00,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:00,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767955615] [2019-12-07 19:08:00,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:00,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:08:00,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933942591] [2019-12-07 19:08:00,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:08:00,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:00,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:08:00,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:00,676 INFO L87 Difference]: Start difference. First operand 68439 states and 216766 transitions. Second operand 5 states. [2019-12-07 19:08:01,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:01,041 INFO L93 Difference]: Finished difference Result 80305 states and 251119 transitions. [2019-12-07 19:08:01,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:08:01,042 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 19:08:01,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:01,145 INFO L225 Difference]: With dead ends: 80305 [2019-12-07 19:08:01,145 INFO L226 Difference]: Without dead ends: 80137 [2019-12-07 19:08:01,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:08:01,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80137 states. [2019-12-07 19:08:02,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80137 to 70638. [2019-12-07 19:08:02,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 19:08:02,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 223242 transitions. [2019-12-07 19:08:02,405 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 223242 transitions. Word has length 26 [2019-12-07 19:08:02,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:02,405 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 223242 transitions. [2019-12-07 19:08:02,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:02,406 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 223242 transitions. [2019-12-07 19:08:02,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 19:08:02,420 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:02,420 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:02,420 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:02,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:02,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1824549582, now seen corresponding path program 1 times [2019-12-07 19:08:02,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:02,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498728493] [2019-12-07 19:08:02,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:02,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:02,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:02,443 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498728493] [2019-12-07 19:08:02,443 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:02,443 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:08:02,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522402683] [2019-12-07 19:08:02,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:02,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:02,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:02,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:02,444 INFO L87 Difference]: Start difference. First operand 70638 states and 223242 transitions. Second operand 3 states. [2019-12-07 19:08:02,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:02,671 INFO L93 Difference]: Finished difference Result 84647 states and 260398 transitions. [2019-12-07 19:08:02,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:02,672 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 26 [2019-12-07 19:08:02,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:02,785 INFO L225 Difference]: With dead ends: 84647 [2019-12-07 19:08:02,786 INFO L226 Difference]: Without dead ends: 84647 [2019-12-07 19:08:02,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:03,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84647 states. [2019-12-07 19:08:03,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84647 to 70638. [2019-12-07 19:08:03,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70638 states. [2019-12-07 19:08:04,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70638 states to 70638 states and 217847 transitions. [2019-12-07 19:08:04,045 INFO L78 Accepts]: Start accepts. Automaton has 70638 states and 217847 transitions. Word has length 26 [2019-12-07 19:08:04,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:04,045 INFO L462 AbstractCegarLoop]: Abstraction has 70638 states and 217847 transitions. [2019-12-07 19:08:04,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:04,045 INFO L276 IsEmpty]: Start isEmpty. Operand 70638 states and 217847 transitions. [2019-12-07 19:08:04,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:08:04,063 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:04,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:04,064 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:04,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:04,064 INFO L82 PathProgramCache]: Analyzing trace with hash -77744514, now seen corresponding path program 1 times [2019-12-07 19:08:04,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:04,064 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249410020] [2019-12-07 19:08:04,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:04,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:04,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:04,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [249410020] [2019-12-07 19:08:04,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:04,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:08:04,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956508814] [2019-12-07 19:08:04,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:08:04,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:04,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:08:04,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:04,098 INFO L87 Difference]: Start difference. First operand 70638 states and 217847 transitions. Second operand 5 states. [2019-12-07 19:08:04,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:04,481 INFO L93 Difference]: Finished difference Result 82875 states and 253074 transitions. [2019-12-07 19:08:04,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:08:04,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 19:08:04,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:04,592 INFO L225 Difference]: With dead ends: 82875 [2019-12-07 19:08:04,592 INFO L226 Difference]: Without dead ends: 82691 [2019-12-07 19:08:04,592 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:08:04,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82691 states. [2019-12-07 19:08:05,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82691 to 70276. [2019-12-07 19:08:05,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70276 states. [2019-12-07 19:08:05,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70276 states to 70276 states and 216644 transitions. [2019-12-07 19:08:05,968 INFO L78 Accepts]: Start accepts. Automaton has 70276 states and 216644 transitions. Word has length 28 [2019-12-07 19:08:05,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:05,968 INFO L462 AbstractCegarLoop]: Abstraction has 70276 states and 216644 transitions. [2019-12-07 19:08:05,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:05,969 INFO L276 IsEmpty]: Start isEmpty. Operand 70276 states and 216644 transitions. [2019-12-07 19:08:05,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 19:08:05,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:05,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:05,994 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:05,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:05,994 INFO L82 PathProgramCache]: Analyzing trace with hash -604665634, now seen corresponding path program 1 times [2019-12-07 19:08:05,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:05,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009513350] [2019-12-07 19:08:05,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:06,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:06,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:06,039 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009513350] [2019-12-07 19:08:06,039 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:06,039 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:08:06,039 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [512459017] [2019-12-07 19:08:06,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:08:06,040 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:06,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:08:06,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:08:06,040 INFO L87 Difference]: Start difference. First operand 70276 states and 216644 transitions. Second operand 5 states. [2019-12-07 19:08:06,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:06,146 INFO L93 Difference]: Finished difference Result 31139 states and 92090 transitions. [2019-12-07 19:08:06,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:08:06,146 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 19:08:06,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:06,178 INFO L225 Difference]: With dead ends: 31139 [2019-12-07 19:08:06,178 INFO L226 Difference]: Without dead ends: 27075 [2019-12-07 19:08:06,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:08:06,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27075 states. [2019-12-07 19:08:06,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27075 to 25552. [2019-12-07 19:08:06,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25552 states. [2019-12-07 19:08:06,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25552 states to 25552 states and 75390 transitions. [2019-12-07 19:08:06,551 INFO L78 Accepts]: Start accepts. Automaton has 25552 states and 75390 transitions. Word has length 31 [2019-12-07 19:08:06,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:06,551 INFO L462 AbstractCegarLoop]: Abstraction has 25552 states and 75390 transitions. [2019-12-07 19:08:06,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:08:06,551 INFO L276 IsEmpty]: Start isEmpty. Operand 25552 states and 75390 transitions. [2019-12-07 19:08:06,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 19:08:06,568 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:06,568 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:06,568 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:06,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:06,569 INFO L82 PathProgramCache]: Analyzing trace with hash 147507175, now seen corresponding path program 1 times [2019-12-07 19:08:06,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:06,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [677619164] [2019-12-07 19:08:06,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:06,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:06,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:06,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [677619164] [2019-12-07 19:08:06,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:06,626 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:08:06,626 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [652292896] [2019-12-07 19:08:06,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:06,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:06,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:06,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:06,627 INFO L87 Difference]: Start difference. First operand 25552 states and 75390 transitions. Second operand 6 states. [2019-12-07 19:08:07,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:07,002 INFO L93 Difference]: Finished difference Result 30385 states and 88582 transitions. [2019-12-07 19:08:07,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:08:07,003 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 19:08:07,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:07,035 INFO L225 Difference]: With dead ends: 30385 [2019-12-07 19:08:07,035 INFO L226 Difference]: Without dead ends: 30129 [2019-12-07 19:08:07,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:08:07,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30129 states. [2019-12-07 19:08:07,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30129 to 25617. [2019-12-07 19:08:07,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25617 states. [2019-12-07 19:08:07,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25617 states to 25617 states and 75584 transitions. [2019-12-07 19:08:07,432 INFO L78 Accepts]: Start accepts. Automaton has 25617 states and 75584 transitions. Word has length 32 [2019-12-07 19:08:07,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:07,432 INFO L462 AbstractCegarLoop]: Abstraction has 25617 states and 75584 transitions. [2019-12-07 19:08:07,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:07,433 INFO L276 IsEmpty]: Start isEmpty. Operand 25617 states and 75584 transitions. [2019-12-07 19:08:07,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 19:08:07,450 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:07,450 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:07,450 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:07,451 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:07,451 INFO L82 PathProgramCache]: Analyzing trace with hash -1407969559, now seen corresponding path program 2 times [2019-12-07 19:08:07,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:07,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446671831] [2019-12-07 19:08:07,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:07,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:07,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:07,498 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [446671831] [2019-12-07 19:08:07,498 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:07,498 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:08:07,498 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492223944] [2019-12-07 19:08:07,498 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:07,498 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:07,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:07,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:07,498 INFO L87 Difference]: Start difference. First operand 25617 states and 75584 transitions. Second operand 6 states. [2019-12-07 19:08:07,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:07,910 INFO L93 Difference]: Finished difference Result 30678 states and 89487 transitions. [2019-12-07 19:08:07,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:08:07,910 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2019-12-07 19:08:07,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:07,943 INFO L225 Difference]: With dead ends: 30678 [2019-12-07 19:08:07,943 INFO L226 Difference]: Without dead ends: 30361 [2019-12-07 19:08:07,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:08:08,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30361 states. [2019-12-07 19:08:08,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30361 to 25584. [2019-12-07 19:08:08,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25584 states. [2019-12-07 19:08:08,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25584 states to 25584 states and 75501 transitions. [2019-12-07 19:08:08,351 INFO L78 Accepts]: Start accepts. Automaton has 25584 states and 75501 transitions. Word has length 32 [2019-12-07 19:08:08,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:08,351 INFO L462 AbstractCegarLoop]: Abstraction has 25584 states and 75501 transitions. [2019-12-07 19:08:08,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:08,351 INFO L276 IsEmpty]: Start isEmpty. Operand 25584 states and 75501 transitions. [2019-12-07 19:08:08,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 19:08:08,370 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:08,370 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:08,370 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:08,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:08,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1247784206, now seen corresponding path program 1 times [2019-12-07 19:08:08,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:08,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346337061] [2019-12-07 19:08:08,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:08,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:08,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:08,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346337061] [2019-12-07 19:08:08,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:08,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:08:08,413 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [944612141] [2019-12-07 19:08:08,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:08,413 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:08,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:08,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:08,413 INFO L87 Difference]: Start difference. First operand 25584 states and 75501 transitions. Second operand 6 states. [2019-12-07 19:08:08,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:08,810 INFO L93 Difference]: Finished difference Result 29652 states and 86454 transitions. [2019-12-07 19:08:08,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 19:08:08,811 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 19:08:08,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:08,842 INFO L225 Difference]: With dead ends: 29652 [2019-12-07 19:08:08,842 INFO L226 Difference]: Without dead ends: 29277 [2019-12-07 19:08:08,843 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:08:08,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29277 states. [2019-12-07 19:08:09,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29277 to 24506. [2019-12-07 19:08:09,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24506 states. [2019-12-07 19:08:09,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24506 states to 24506 states and 72314 transitions. [2019-12-07 19:08:09,241 INFO L78 Accepts]: Start accepts. Automaton has 24506 states and 72314 transitions. Word has length 34 [2019-12-07 19:08:09,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:09,241 INFO L462 AbstractCegarLoop]: Abstraction has 24506 states and 72314 transitions. [2019-12-07 19:08:09,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:09,242 INFO L276 IsEmpty]: Start isEmpty. Operand 24506 states and 72314 transitions. [2019-12-07 19:08:09,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 19:08:09,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:09,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:09,262 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:09,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:09,262 INFO L82 PathProgramCache]: Analyzing trace with hash 280000667, now seen corresponding path program 1 times [2019-12-07 19:08:09,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:09,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248290307] [2019-12-07 19:08:09,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:09,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:09,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:09,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248290307] [2019-12-07 19:08:09,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:09,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:09,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593905404] [2019-12-07 19:08:09,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:09,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:09,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:09,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:09,291 INFO L87 Difference]: Start difference. First operand 24506 states and 72314 transitions. Second operand 3 states. [2019-12-07 19:08:09,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:09,349 INFO L93 Difference]: Finished difference Result 24506 states and 71350 transitions. [2019-12-07 19:08:09,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:09,350 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 19:08:09,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:09,377 INFO L225 Difference]: With dead ends: 24506 [2019-12-07 19:08:09,377 INFO L226 Difference]: Without dead ends: 24506 [2019-12-07 19:08:09,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:09,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24506 states. [2019-12-07 19:08:09,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24506 to 24244. [2019-12-07 19:08:09,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24244 states. [2019-12-07 19:08:09,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24244 states to 24244 states and 70629 transitions. [2019-12-07 19:08:09,717 INFO L78 Accepts]: Start accepts. Automaton has 24244 states and 70629 transitions. Word has length 41 [2019-12-07 19:08:09,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:09,717 INFO L462 AbstractCegarLoop]: Abstraction has 24244 states and 70629 transitions. [2019-12-07 19:08:09,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:09,717 INFO L276 IsEmpty]: Start isEmpty. Operand 24244 states and 70629 transitions. [2019-12-07 19:08:09,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:08:09,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:09,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:09,737 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:09,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:09,737 INFO L82 PathProgramCache]: Analyzing trace with hash 1735658860, now seen corresponding path program 1 times [2019-12-07 19:08:09,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:09,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821273838] [2019-12-07 19:08:09,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:09,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:09,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:09,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821273838] [2019-12-07 19:08:09,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:09,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:09,770 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920772431] [2019-12-07 19:08:09,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:09,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:09,771 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:09,771 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:09,771 INFO L87 Difference]: Start difference. First operand 24244 states and 70629 transitions. Second operand 3 states. [2019-12-07 19:08:09,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:09,861 INFO L93 Difference]: Finished difference Result 32760 states and 95798 transitions. [2019-12-07 19:08:09,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:09,861 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-12-07 19:08:09,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:09,873 INFO L225 Difference]: With dead ends: 32760 [2019-12-07 19:08:09,873 INFO L226 Difference]: Without dead ends: 12034 [2019-12-07 19:08:09,873 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:09,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12034 states. [2019-12-07 19:08:10,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12034 to 11990. [2019-12-07 19:08:10,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11990 states. [2019-12-07 19:08:10,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11990 states to 11990 states and 34388 transitions. [2019-12-07 19:08:10,034 INFO L78 Accepts]: Start accepts. Automaton has 11990 states and 34388 transitions. Word has length 42 [2019-12-07 19:08:10,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:10,034 INFO L462 AbstractCegarLoop]: Abstraction has 11990 states and 34388 transitions. [2019-12-07 19:08:10,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:10,034 INFO L276 IsEmpty]: Start isEmpty. Operand 11990 states and 34388 transitions. [2019-12-07 19:08:10,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:08:10,043 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:10,043 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:10,043 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:10,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:10,043 INFO L82 PathProgramCache]: Analyzing trace with hash 1498841336, now seen corresponding path program 2 times [2019-12-07 19:08:10,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:10,044 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127060444] [2019-12-07 19:08:10,044 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:10,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:10,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:10,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127060444] [2019-12-07 19:08:10,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:10,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:08:10,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860764824] [2019-12-07 19:08:10,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:08:10,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:10,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:08:10,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:08:10,098 INFO L87 Difference]: Start difference. First operand 11990 states and 34388 transitions. Second operand 6 states. [2019-12-07 19:08:10,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:10,163 INFO L93 Difference]: Finished difference Result 11043 states and 32390 transitions. [2019-12-07 19:08:10,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:08:10,163 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 19:08:10,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:10,175 INFO L225 Difference]: With dead ends: 11043 [2019-12-07 19:08:10,175 INFO L226 Difference]: Without dead ends: 9390 [2019-12-07 19:08:10,175 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:08:10,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9390 states. [2019-12-07 19:08:10,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9390 to 9390. [2019-12-07 19:08:10,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9390 states. [2019-12-07 19:08:10,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9390 states to 9390 states and 28429 transitions. [2019-12-07 19:08:10,313 INFO L78 Accepts]: Start accepts. Automaton has 9390 states and 28429 transitions. Word has length 42 [2019-12-07 19:08:10,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:10,314 INFO L462 AbstractCegarLoop]: Abstraction has 9390 states and 28429 transitions. [2019-12-07 19:08:10,314 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:08:10,314 INFO L276 IsEmpty]: Start isEmpty. Operand 9390 states and 28429 transitions. [2019-12-07 19:08:10,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 19:08:10,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:10,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:10,322 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:10,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:10,322 INFO L82 PathProgramCache]: Analyzing trace with hash -224937897, now seen corresponding path program 1 times [2019-12-07 19:08:10,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:10,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968785212] [2019-12-07 19:08:10,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:10,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:10,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:10,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968785212] [2019-12-07 19:08:10,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:10,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:08:10,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875068541] [2019-12-07 19:08:10,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:08:10,356 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:10,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:08:10,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:10,356 INFO L87 Difference]: Start difference. First operand 9390 states and 28429 transitions. Second operand 3 states. [2019-12-07 19:08:10,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:10,408 INFO L93 Difference]: Finished difference Result 11908 states and 36020 transitions. [2019-12-07 19:08:10,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:08:10,409 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 19:08:10,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:10,420 INFO L225 Difference]: With dead ends: 11908 [2019-12-07 19:08:10,420 INFO L226 Difference]: Without dead ends: 11908 [2019-12-07 19:08:10,420 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:08:10,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11908 states. [2019-12-07 19:08:10,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11908 to 9150. [2019-12-07 19:08:10,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9150 states. [2019-12-07 19:08:10,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9150 states to 9150 states and 27905 transitions. [2019-12-07 19:08:10,564 INFO L78 Accepts]: Start accepts. Automaton has 9150 states and 27905 transitions. Word has length 65 [2019-12-07 19:08:10,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:10,564 INFO L462 AbstractCegarLoop]: Abstraction has 9150 states and 27905 transitions. [2019-12-07 19:08:10,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:08:10,565 INFO L276 IsEmpty]: Start isEmpty. Operand 9150 states and 27905 transitions. [2019-12-07 19:08:10,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:10,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:10,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:10,572 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:10,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:10,572 INFO L82 PathProgramCache]: Analyzing trace with hash -623699513, now seen corresponding path program 1 times [2019-12-07 19:08:10,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:10,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855358770] [2019-12-07 19:08:10,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:10,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:10,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:10,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855358770] [2019-12-07 19:08:10,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:10,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:08:10,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795399092] [2019-12-07 19:08:10,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:08:10,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:10,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:08:10,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:08:10,714 INFO L87 Difference]: Start difference. First operand 9150 states and 27905 transitions. Second operand 10 states. [2019-12-07 19:08:12,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:12,302 INFO L93 Difference]: Finished difference Result 25143 states and 76490 transitions. [2019-12-07 19:08:12,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 19:08:12,303 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 19:08:12,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:12,320 INFO L225 Difference]: With dead ends: 25143 [2019-12-07 19:08:12,320 INFO L226 Difference]: Without dead ends: 17439 [2019-12-07 19:08:12,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=179, Invalid=813, Unknown=0, NotChecked=0, Total=992 [2019-12-07 19:08:12,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17439 states. [2019-12-07 19:08:12,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17439 to 11527. [2019-12-07 19:08:12,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11527 states. [2019-12-07 19:08:12,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11527 states to 11527 states and 34885 transitions. [2019-12-07 19:08:12,534 INFO L78 Accepts]: Start accepts. Automaton has 11527 states and 34885 transitions. Word has length 66 [2019-12-07 19:08:12,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:12,535 INFO L462 AbstractCegarLoop]: Abstraction has 11527 states and 34885 transitions. [2019-12-07 19:08:12,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:08:12,535 INFO L276 IsEmpty]: Start isEmpty. Operand 11527 states and 34885 transitions. [2019-12-07 19:08:12,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:12,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:12,544 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:12,544 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:12,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:12,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1795841111, now seen corresponding path program 2 times [2019-12-07 19:08:12,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:12,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158842617] [2019-12-07 19:08:12,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:12,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:12,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:12,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158842617] [2019-12-07 19:08:12,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:12,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:08:12,651 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738507168] [2019-12-07 19:08:12,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:08:12,651 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:12,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:08:12,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:12,651 INFO L87 Difference]: Start difference. First operand 11527 states and 34885 transitions. Second operand 11 states. [2019-12-07 19:08:13,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:13,806 INFO L93 Difference]: Finished difference Result 23263 states and 69782 transitions. [2019-12-07 19:08:13,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 19:08:13,806 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 19:08:13,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:13,823 INFO L225 Difference]: With dead ends: 23263 [2019-12-07 19:08:13,823 INFO L226 Difference]: Without dead ends: 16905 [2019-12-07 19:08:13,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=180, Invalid=750, Unknown=0, NotChecked=0, Total=930 [2019-12-07 19:08:13,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16905 states. [2019-12-07 19:08:14,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16905 to 11531. [2019-12-07 19:08:14,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11531 states. [2019-12-07 19:08:14,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11531 states to 11531 states and 34747 transitions. [2019-12-07 19:08:14,018 INFO L78 Accepts]: Start accepts. Automaton has 11531 states and 34747 transitions. Word has length 66 [2019-12-07 19:08:14,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:14,019 INFO L462 AbstractCegarLoop]: Abstraction has 11531 states and 34747 transitions. [2019-12-07 19:08:14,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:08:14,019 INFO L276 IsEmpty]: Start isEmpty. Operand 11531 states and 34747 transitions. [2019-12-07 19:08:14,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:14,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:14,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:14,028 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:14,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:14,028 INFO L82 PathProgramCache]: Analyzing trace with hash -131673981, now seen corresponding path program 3 times [2019-12-07 19:08:14,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:14,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743760614] [2019-12-07 19:08:14,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:14,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:14,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:14,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1743760614] [2019-12-07 19:08:14,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:14,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 19:08:14,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380763676] [2019-12-07 19:08:14,387 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 19:08:14,387 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:14,387 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 19:08:14,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 19:08:14,388 INFO L87 Difference]: Start difference. First operand 11531 states and 34747 transitions. Second operand 14 states. [2019-12-07 19:08:20,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:20,976 INFO L93 Difference]: Finished difference Result 27422 states and 81381 transitions. [2019-12-07 19:08:20,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2019-12-07 19:08:20,978 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2019-12-07 19:08:20,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:21,002 INFO L225 Difference]: With dead ends: 27422 [2019-12-07 19:08:21,002 INFO L226 Difference]: Without dead ends: 23229 [2019-12-07 19:08:21,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 950 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=555, Invalid=2751, Unknown=0, NotChecked=0, Total=3306 [2019-12-07 19:08:21,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23229 states. [2019-12-07 19:08:21,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23229 to 12410. [2019-12-07 19:08:21,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12410 states. [2019-12-07 19:08:21,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12410 states to 12410 states and 37144 transitions. [2019-12-07 19:08:21,240 INFO L78 Accepts]: Start accepts. Automaton has 12410 states and 37144 transitions. Word has length 66 [2019-12-07 19:08:21,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:21,240 INFO L462 AbstractCegarLoop]: Abstraction has 12410 states and 37144 transitions. [2019-12-07 19:08:21,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 19:08:21,240 INFO L276 IsEmpty]: Start isEmpty. Operand 12410 states and 37144 transitions. [2019-12-07 19:08:21,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:21,252 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:21,252 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:21,252 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:21,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:21,252 INFO L82 PathProgramCache]: Analyzing trace with hash 461520025, now seen corresponding path program 4 times [2019-12-07 19:08:21,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:21,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479175062] [2019-12-07 19:08:21,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:21,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:21,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:21,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479175062] [2019-12-07 19:08:21,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:21,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 19:08:21,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211270201] [2019-12-07 19:08:21,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 19:08:21,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:21,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 19:08:21,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 19:08:21,568 INFO L87 Difference]: Start difference. First operand 12410 states and 37144 transitions. Second operand 15 states. [2019-12-07 19:08:25,537 WARN L192 SmtUtils]: Spent 120.00 ms on a formula simplification. DAG size of input: 25 DAG size of output: 24 [2019-12-07 19:08:26,207 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 19:08:28,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:28,312 INFO L93 Difference]: Finished difference Result 25000 states and 73927 transitions. [2019-12-07 19:08:28,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 19:08:28,312 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 19:08:28,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:28,335 INFO L225 Difference]: With dead ends: 25000 [2019-12-07 19:08:28,336 INFO L226 Difference]: Without dead ends: 23188 [2019-12-07 19:08:28,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1271 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=730, Invalid=3430, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 19:08:28,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23188 states. [2019-12-07 19:08:28,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23188 to 12384. [2019-12-07 19:08:28,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12384 states. [2019-12-07 19:08:28,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12384 states to 12384 states and 37086 transitions. [2019-12-07 19:08:28,584 INFO L78 Accepts]: Start accepts. Automaton has 12384 states and 37086 transitions. Word has length 66 [2019-12-07 19:08:28,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:28,584 INFO L462 AbstractCegarLoop]: Abstraction has 12384 states and 37086 transitions. [2019-12-07 19:08:28,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 19:08:28,584 INFO L276 IsEmpty]: Start isEmpty. Operand 12384 states and 37086 transitions. [2019-12-07 19:08:28,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:28,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:28,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:28,596 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:28,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:28,596 INFO L82 PathProgramCache]: Analyzing trace with hash -2041557437, now seen corresponding path program 5 times [2019-12-07 19:08:28,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:28,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686932333] [2019-12-07 19:08:28,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:28,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:28,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:28,748 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686932333] [2019-12-07 19:08:28,748 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:28,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:08:28,748 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264094737] [2019-12-07 19:08:28,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:08:28,748 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:28,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:08:28,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:08:28,749 INFO L87 Difference]: Start difference. First operand 12384 states and 37086 transitions. Second operand 10 states. [2019-12-07 19:08:29,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:29,523 INFO L93 Difference]: Finished difference Result 35544 states and 106979 transitions. [2019-12-07 19:08:29,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 19:08:29,523 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 19:08:29,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:29,556 INFO L225 Difference]: With dead ends: 35544 [2019-12-07 19:08:29,556 INFO L226 Difference]: Without dead ends: 29789 [2019-12-07 19:08:29,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 266 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=240, Invalid=882, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 19:08:29,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29789 states. [2019-12-07 19:08:29,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29789 to 15211. [2019-12-07 19:08:29,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15211 states. [2019-12-07 19:08:29,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15211 states to 15211 states and 45631 transitions. [2019-12-07 19:08:29,890 INFO L78 Accepts]: Start accepts. Automaton has 15211 states and 45631 transitions. Word has length 66 [2019-12-07 19:08:29,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:29,890 INFO L462 AbstractCegarLoop]: Abstraction has 15211 states and 45631 transitions. [2019-12-07 19:08:29,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:08:29,890 INFO L276 IsEmpty]: Start isEmpty. Operand 15211 states and 45631 transitions. [2019-12-07 19:08:29,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:29,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:29,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:29,903 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:29,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:29,904 INFO L82 PathProgramCache]: Analyzing trace with hash -788175025, now seen corresponding path program 6 times [2019-12-07 19:08:29,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:29,904 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100327046] [2019-12-07 19:08:29,904 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:29,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:30,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:30,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100327046] [2019-12-07 19:08:30,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:30,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 19:08:30,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264135924] [2019-12-07 19:08:30,032 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 19:08:30,032 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:30,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 19:08:30,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 19:08:30,032 INFO L87 Difference]: Start difference. First operand 15211 states and 45631 transitions. Second operand 10 states. [2019-12-07 19:08:30,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:30,711 INFO L93 Difference]: Finished difference Result 33554 states and 99769 transitions. [2019-12-07 19:08:30,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 19:08:30,712 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 19:08:30,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:30,734 INFO L225 Difference]: With dead ends: 33554 [2019-12-07 19:08:30,734 INFO L226 Difference]: Without dead ends: 22895 [2019-12-07 19:08:30,735 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=226, Invalid=830, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 19:08:30,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22895 states. [2019-12-07 19:08:30,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22895 to 11955. [2019-12-07 19:08:30,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11955 states. [2019-12-07 19:08:30,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11955 states to 11955 states and 35921 transitions. [2019-12-07 19:08:30,972 INFO L78 Accepts]: Start accepts. Automaton has 11955 states and 35921 transitions. Word has length 66 [2019-12-07 19:08:30,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:30,972 INFO L462 AbstractCegarLoop]: Abstraction has 11955 states and 35921 transitions. [2019-12-07 19:08:30,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 19:08:30,972 INFO L276 IsEmpty]: Start isEmpty. Operand 11955 states and 35921 transitions. [2019-12-07 19:08:30,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:30,982 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:30,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:30,983 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:30,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:30,983 INFO L82 PathProgramCache]: Analyzing trace with hash 1119880499, now seen corresponding path program 7 times [2019-12-07 19:08:30,983 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:30,983 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863962693] [2019-12-07 19:08:30,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:30,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:31,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:31,128 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863962693] [2019-12-07 19:08:31,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:31,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:08:31,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600198724] [2019-12-07 19:08:31,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:08:31,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:31,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:08:31,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:31,129 INFO L87 Difference]: Start difference. First operand 11955 states and 35921 transitions. Second operand 11 states. [2019-12-07 19:08:32,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:32,156 INFO L93 Difference]: Finished difference Result 26214 states and 79003 transitions. [2019-12-07 19:08:32,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 19:08:32,156 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 19:08:32,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:32,185 INFO L225 Difference]: With dead ends: 26214 [2019-12-07 19:08:32,185 INFO L226 Difference]: Without dead ends: 24979 [2019-12-07 19:08:32,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 210 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=198, Invalid=794, Unknown=0, NotChecked=0, Total=992 [2019-12-07 19:08:32,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24979 states. [2019-12-07 19:08:32,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24979 to 13679. [2019-12-07 19:08:32,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13679 states. [2019-12-07 19:08:32,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13679 states to 13679 states and 41050 transitions. [2019-12-07 19:08:32,472 INFO L78 Accepts]: Start accepts. Automaton has 13679 states and 41050 transitions. Word has length 66 [2019-12-07 19:08:32,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:32,472 INFO L462 AbstractCegarLoop]: Abstraction has 13679 states and 41050 transitions. [2019-12-07 19:08:32,472 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:08:32,472 INFO L276 IsEmpty]: Start isEmpty. Operand 13679 states and 41050 transitions. [2019-12-07 19:08:32,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:32,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:32,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:32,484 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:32,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:32,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1921704385, now seen corresponding path program 8 times [2019-12-07 19:08:32,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:32,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381774937] [2019-12-07 19:08:32,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:32,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:08:32,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:08:32,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381774937] [2019-12-07 19:08:32,615 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:08:32,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 19:08:32,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517998518] [2019-12-07 19:08:32,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 19:08:32,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:08:32,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 19:08:32,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:08:32,616 INFO L87 Difference]: Start difference. First operand 13679 states and 41050 transitions. Second operand 11 states. [2019-12-07 19:08:33,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:08:33,432 INFO L93 Difference]: Finished difference Result 25535 states and 76455 transitions. [2019-12-07 19:08:33,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 19:08:33,433 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 19:08:33,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:08:33,455 INFO L225 Difference]: With dead ends: 25535 [2019-12-07 19:08:33,455 INFO L226 Difference]: Without dead ends: 22344 [2019-12-07 19:08:33,455 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=210, Invalid=846, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 19:08:33,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22344 states. [2019-12-07 19:08:33,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22344 to 11159. [2019-12-07 19:08:33,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11159 states. [2019-12-07 19:08:33,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11159 states to 11159 states and 33602 transitions. [2019-12-07 19:08:33,681 INFO L78 Accepts]: Start accepts. Automaton has 11159 states and 33602 transitions. Word has length 66 [2019-12-07 19:08:33,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:08:33,681 INFO L462 AbstractCegarLoop]: Abstraction has 11159 states and 33602 transitions. [2019-12-07 19:08:33,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 19:08:33,681 INFO L276 IsEmpty]: Start isEmpty. Operand 11159 states and 33602 transitions. [2019-12-07 19:08:33,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 19:08:33,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:08:33,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:08:33,691 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:08:33,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:08:33,691 INFO L82 PathProgramCache]: Analyzing trace with hash -663530261, now seen corresponding path program 9 times [2019-12-07 19:08:33,691 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:08:33,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1358295529] [2019-12-07 19:08:33,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:08:33,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:08:33,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:08:33,756 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:08:33,756 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:08:33,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_ULTIMATE.start_main_~#t879~0.offset_22| 0) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30|) |v_ULTIMATE.start_main_~#t879~0.offset_22| 0)) |v_#memory_int_25|) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t879~0.base_30|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t879~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30|)) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30| 1) |v_#valid_69|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_18|, ULTIMATE.start_main_~#t879~0.offset=|v_ULTIMATE.start_main_~#t879~0.offset_22|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t879~0.base=|v_ULTIMATE.start_main_~#t879~0.base_30|, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_24|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t880~0.offset, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ULTIMATE.start_main_~#t881~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t881~0.base, ULTIMATE.start_main_~#t879~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t879~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 19:08:33,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12| 1)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12|) |v_ULTIMATE.start_main_~#t880~0.offset_10| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t880~0.base_12|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t880~0.base_12| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t880~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t880~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t880~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, #length] because there is no mapped edge [2019-12-07 19:08:33,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= ~b$r_buff0_thd0~0_In122521200 ~b$r_buff1_thd0~0_Out122521200) (= ~b$r_buff1_thd3~0_Out122521200 ~b$r_buff0_thd3~0_In122521200) (= ~b$r_buff1_thd2~0_Out122521200 ~b$r_buff0_thd2~0_In122521200) (= ~b$r_buff1_thd1~0_Out122521200 ~b$r_buff0_thd1~0_In122521200) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200 0)) (= ~b$r_buff0_thd1~0_Out122521200 1) (= 1 ~x~0_Out122521200)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In122521200, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In122521200, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In122521200, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In122521200} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out122521200, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In122521200, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In122521200, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out122521200, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out122521200, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out122521200, ~x~0=~x~0_Out122521200, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out122521200, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In122521200} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 19:08:33,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-1888449916| |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|)) (.cse1 (= (mod ~b$r_buff1_thd2~0_In-1888449916 256) 0)) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In-1888449916 256)))) (or (and (= ~b~0_In-1888449916 |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|) .cse0 (or .cse1 .cse2)) (and .cse0 (not .cse1) (not .cse2) (= ~b$w_buff1~0_In-1888449916 |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1888449916, ~b~0=~b~0_In-1888449916, ~b$w_buff1~0=~b$w_buff1~0_In-1888449916, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1888449916} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1888449916|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1888449916, ~b~0=~b~0_In-1888449916, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1888449916|, ~b$w_buff1~0=~b$w_buff1~0_In-1888449916, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1888449916} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:08:33,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd1~0_In-2120576798 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In-2120576798 256) 0))) (or (and (= ~b$w_buff0_used~0_In-2120576798 |P0Thread1of1ForFork1_#t~ite5_Out-2120576798|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-2120576798|) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2120576798, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2120576798} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2120576798, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-2120576798|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2120576798} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:08:33,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1829481280 256))) (.cse3 (= (mod ~b$w_buff0_used~0_In-1829481280 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd1~0_In-1829481280 256) 0)) (.cse1 (= (mod ~b$w_buff1_used~0_In-1829481280 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1829481280| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out-1829481280| ~b$w_buff1_used~0_In-1829481280)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1829481280, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1829481280, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1829481280, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1829481280} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1829481280, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1829481280, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1829481280, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1829481280, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1829481280|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:08:33,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In882108058 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In882108058 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out882108058| ~b$w_buff0_used~0_In882108058) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out882108058| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In882108058, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In882108058} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In882108058, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In882108058, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out882108058|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:08:33,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd1~0_In-478302881 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-478302881 256) 0)) (.cse1 (= ~b$r_buff0_thd1~0_In-478302881 ~b$r_buff0_thd1~0_Out-478302881))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~b$r_buff0_thd1~0_Out-478302881)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-478302881, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-478302881} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-478302881, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-478302881, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-478302881|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 19:08:33,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In1270628512 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In1270628512 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In1270628512 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1270628512 256)))) (or (and (= ~b$r_buff1_thd1~0_In1270628512 |P0Thread1of1ForFork1_#t~ite8_Out1270628512|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1270628512|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1270628512, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1270628512, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1270628512, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1270628512} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1270628512, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1270628512, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1270628512, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1270628512|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1270628512} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:08:33,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:08:33,763 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t881~0.base_12|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t881~0.offset_10|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t881~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t881~0.base_12| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12|) |v_ULTIMATE.start_main_~#t881~0.offset_10| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t881~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t881~0.base] because there is no mapped edge [2019-12-07 19:08:33,766 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In612344116 256) 0))) (or (and (= ~b$w_buff1_used~0_In612344116 |P2Thread1of1ForFork0_#t~ite30_Out612344116|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In612344116| |P2Thread1of1ForFork0_#t~ite29_Out612344116|)) (and (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In612344116 256) 0))) (or (and (= 0 (mod ~b$w_buff1_used~0_In612344116 256)) .cse1) (= (mod ~b$w_buff0_used~0_In612344116 256) 0) (and .cse1 (= 0 (mod ~b$r_buff1_thd3~0_In612344116 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out612344116| ~b$w_buff1_used~0_In612344116) (= |P2Thread1of1ForFork0_#t~ite29_Out612344116| |P2Thread1of1ForFork0_#t~ite30_Out612344116|) .cse0))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In612344116, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In612344116, ~b$w_buff1_used~0=~b$w_buff1_used~0_In612344116, ~weak$$choice2~0=~weak$$choice2~0_In612344116, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In612344116|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In612344116} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In612344116, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In612344116, ~b$w_buff1_used~0=~b$w_buff1_used~0_In612344116, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out612344116|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out612344116|, ~weak$$choice2~0=~weak$$choice2~0_In612344116, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In612344116} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:08:33,766 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:08:33,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 19:08:33,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1210618163| |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|)) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In-1210618163 256))) (.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1210618163 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= ~b$w_buff1~0_In-1210618163 |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|)) (and .cse0 (= ~b~0_In-1210618163 |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|) (or .cse2 .cse1)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1210618163, ~b~0=~b~0_In-1210618163, ~b$w_buff1~0=~b$w_buff1~0_In-1210618163, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1210618163} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1210618163|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1210618163|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1210618163, ~b~0=~b~0_In-1210618163, ~b$w_buff1~0=~b$w_buff1~0_In-1210618163, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1210618163} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:08:33,767 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~b$w_buff0_used~0_In1082240770 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1082240770 256)))) (or (and (= ~b$w_buff0_used~0_In1082240770 |P2Thread1of1ForFork0_#t~ite40_Out1082240770|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1082240770|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1082240770, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1082240770} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1082240770, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1082240770, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1082240770|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:08:33,768 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~b$r_buff0_thd3~0_In745316202 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In745316202 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In745316202 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In745316202 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff1_used~0_In745316202 |P2Thread1of1ForFork0_#t~ite41_Out745316202|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out745316202|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In745316202, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In745316202, ~b$w_buff1_used~0=~b$w_buff1_used~0_In745316202, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In745316202} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In745316202, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In745316202, ~b$w_buff1_used~0=~b$w_buff1_used~0_In745316202, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out745316202|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In745316202} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:08:33,768 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1618529024 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1618529024 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1618529024| ~b$r_buff0_thd3~0_In-1618529024)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1618529024|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1618529024, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1618529024} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1618529024, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1618529024, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1618529024|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:08:33,769 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse2 (= (mod ~b$r_buff0_thd3~0_In-1709836715 256) 0)) (.cse3 (= (mod ~b$w_buff0_used~0_In-1709836715 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd3~0_In-1709836715 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In-1709836715 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd3~0_In-1709836715 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1709836715, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1709836715, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1709836715, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1709836715} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1709836715, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1709836715, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1709836715|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1709836715, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1709836715} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:08:33,769 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:08:33,769 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In-2143664203 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd2~0_In-2143664203 256) 0)) (.cse3 (= (mod ~b$r_buff0_thd2~0_In-2143664203 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-2143664203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2143664203| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2143664203| ~b$w_buff1_used~0_In-2143664203) (or .cse3 .cse2)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143664203, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2143664203, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143664203, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2143664203} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143664203, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2143664203, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143664203, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2143664203|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2143664203} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:08:33,769 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd2~0_In-1515191680 256) 0)) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1515191680 256)))) (or (and (= ~b$r_buff0_thd2~0_In-1515191680 |P1Thread1of1ForFork2_#t~ite13_Out-1515191680|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-1515191680|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1515191680, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1515191680} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1515191680, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1515191680, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1515191680|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:08:33,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$r_buff1_thd2~0_In-2134331003 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-2134331003 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In-2134331003 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-2134331003 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2134331003| ~b$r_buff1_thd2~0_In-2134331003) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-2134331003|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2134331003, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2134331003, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2134331003, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2134331003} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2134331003, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2134331003, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2134331003, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2134331003|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2134331003} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:08:33,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:08:33,770 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:08:33,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In746743505 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In746743505 256) 0))) (or (and (= ~b~0_In746743505 |ULTIMATE.start_main_#t~ite47_Out746743505|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~b$w_buff1~0_In746743505 |ULTIMATE.start_main_#t~ite47_Out746743505|)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In746743505, ~b$w_buff1_used~0=~b$w_buff1_used~0_In746743505, ~b~0=~b~0_In746743505, ~b$w_buff1~0=~b$w_buff1~0_In746743505} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In746743505, ~b$w_buff1_used~0=~b$w_buff1_used~0_In746743505, ~b~0=~b~0_In746743505, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out746743505|, ~b$w_buff1~0=~b$w_buff1~0_In746743505} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:08:33,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:08:33,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In1085798377 256))) (.cse0 (= (mod ~b$r_buff0_thd0~0_In1085798377 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In1085798377 |ULTIMATE.start_main_#t~ite49_Out1085798377|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out1085798377|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1085798377, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1085798377} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1085798377, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1085798377|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1085798377} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:08:33,771 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In-1080951997 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-1080951997 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd0~0_In-1080951997 256))) (.cse1 (= (mod ~b$w_buff1_used~0_In-1080951997 256) 0))) (or (and (= ~b$w_buff1_used~0_In-1080951997 |ULTIMATE.start_main_#t~ite50_Out-1080951997|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1080951997|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1080951997, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1080951997, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1080951997, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1080951997} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1080951997|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1080951997, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1080951997, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1080951997, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1080951997} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:08:33,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In683921878 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In683921878 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out683921878| ~b$r_buff0_thd0~0_In683921878)) (and (= |ULTIMATE.start_main_#t~ite51_Out683921878| 0) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In683921878, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In683921878} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In683921878, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out683921878|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In683921878} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:08:33,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In1951345974 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In1951345974 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In1951345974 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In1951345974 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1951345974| 0)) (and (= |ULTIMATE.start_main_#t~ite52_Out1951345974| ~b$r_buff1_thd0~0_In1951345974) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1951345974, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1951345974, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1951345974, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1951345974} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1951345974, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1951345974|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1951345974, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1951345974, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1951345974} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:08:33,772 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:08:33,824 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:08:33 BasicIcfg [2019-12-07 19:08:33,824 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:08:33,825 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:08:33,825 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:08:33,825 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:08:33,825 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:05:09" (3/4) ... [2019-12-07 19:08:33,827 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:08:33,827 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= |v_ULTIMATE.start_main_~#t879~0.offset_22| 0) (= v_~main$tmp_guard0~0_40 0) (= 0 v_~b$r_buff1_thd1~0_173) (= 0 v_~__unbuffered_p1_EAX~0_44) (= 0 v_~x~0_134) (= v_~z~0_33 0) (= 0 v_~weak$$choice0~0_14) (= |v_#NULL.offset_6| 0) (= 0 v_~b$r_buff0_thd2~0_158) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t879~0.base_30|) |v_ULTIMATE.start_main_~#t879~0.offset_22| 0)) |v_#memory_int_25|) (= v_~__unbuffered_p2_EBX~0_34 0) (= 0 v_~b$read_delayed~0_7) (= v_~a~0_13 0) (= v_~b$w_buff1~0_227 0) (< 0 |v_#StackHeapBarrier_19|) (= v_~weak$$choice2~0_143 0) (= 0 v_~b$r_buff0_thd3~0_397) (= v_~b$r_buff1_thd0~0_151 0) (= 0 v_~b$r_buff1_thd3~0_304) (= 0 v_~b$r_buff0_thd1~0_258) (= v_~__unbuffered_p1_EBX~0_44 0) (= v_~__unbuffered_cnt~0_127 0) (= v_~b$read_delayed_var~0.offset_7 0) (= v_~b~0_156 0) (= v_~y~0_27 0) (= v_~main$tmp_guard1~0_28 0) (= 0 |v_#NULL.base_6|) (= 0 v_~__unbuffered_p2_EAX~0_34) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t879~0.base_30|) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t879~0.base_30| 4)) (= v_~b$mem_tmp~0_17 0) (= 0 v_~b$r_buff1_thd2~0_163) (= v_~b$flush_delayed~0_32 0) (= 0 v_~b$w_buff1_used~0_458) (= 0 v_~b$w_buff0_used~0_811) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30|)) (= v_~b$r_buff0_thd0~0_167 0) (= 0 v_~b$w_buff0~0_363) (= 0 v_~b$read_delayed_var~0.base_7) (= (store .cse0 |v_ULTIMATE.start_main_~#t879~0.base_30| 1) |v_#valid_69|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_26|, #length=|v_#length_26|} OutVars{~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_397, ~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_173, ~b$read_delayed_var~0.offset=v_~b$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_64|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_38|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_38|, ~b$w_buff0_used~0=v_~b$w_buff0_used~0_811, ~a~0=v_~a~0_13, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_58|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_25|, ~b$w_buff0~0=v_~b$w_buff0~0_363, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_167, ~b$r_buff0_thd2~0=v_~b$r_buff0_thd2~0_158, ~b$mem_tmp~0=v_~b$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ~b$flush_delayed~0=v_~b$flush_delayed~0_32, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~b$read_delayed~0=v_~b$read_delayed~0_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ~b$w_buff1~0=v_~b$w_buff1~0_227, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127, ~x~0=v_~x~0_134, ~b$r_buff0_thd1~0=v_~b$r_buff0_thd1~0_258, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_15|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_105|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_18|, ULTIMATE.start_main_~#t879~0.offset=|v_ULTIMATE.start_main_~#t879~0.offset_22|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_42|, ~b$w_buff1_used~0=v_~b$w_buff1_used~0_458, ~y~0=v_~y~0_27, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_163, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_151, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_44, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_40, #NULL.base=|v_#NULL.base_6|, ~b$read_delayed_var~0.base=v_~b$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t879~0.base=|v_ULTIMATE.start_main_~#t879~0.base_30|, ~b~0=v_~b~0_156, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_24|, ~z~0=v_~z~0_33, ~weak$$choice2~0=v_~weak$$choice2~0_143, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_304} AuxVars[] AssignedVars[~b$r_buff0_thd3~0, ~b$r_buff1_thd1~0, ~b$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ~b$w_buff0_used~0, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t880~0.offset, ~__unbuffered_p1_EAX~0, #length, ~b$w_buff0~0, ~__unbuffered_p2_EAX~0, ~b$r_buff0_thd0~0, ~b$r_buff0_thd2~0, ~b$mem_tmp~0, ~__unbuffered_p2_EBX~0, ~b$flush_delayed~0, ULTIMATE.start_main_#t~nondet45, ~b$read_delayed~0, ~weak$$choice0~0, ~b$w_buff1~0, ~__unbuffered_cnt~0, ~x~0, ~b$r_buff0_thd1~0, ULTIMATE.start_main_~#t881~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t881~0.base, ULTIMATE.start_main_~#t879~0.offset, ULTIMATE.start_main_#t~ite51, ~b$w_buff1_used~0, ~y~0, ~b$r_buff1_thd2~0, ~b$r_buff1_thd0~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~main$tmp_guard0~0, #NULL.base, ~b$read_delayed_var~0.base, ULTIMATE.start_main_~#t879~0.base, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, ~z~0, ~weak$$choice2~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 19:08:33,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L840-1-->L842: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12| 1)) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t880~0.base_12|) 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t880~0.base_12|) |v_ULTIMATE.start_main_~#t880~0.offset_10| 1)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t880~0.base_12|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t880~0.base_12| 4) |v_#length_17|) (= 0 |v_ULTIMATE.start_main_~#t880~0.offset_10|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t880~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t880~0.offset=|v_ULTIMATE.start_main_~#t880~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t880~0.base=|v_ULTIMATE.start_main_~#t880~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t880~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t880~0.base, #length] because there is no mapped edge [2019-12-07 19:08:33,828 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L752: Formula: (and (= ~b$r_buff0_thd0~0_In122521200 ~b$r_buff1_thd0~0_Out122521200) (= ~b$r_buff1_thd3~0_Out122521200 ~b$r_buff0_thd3~0_In122521200) (= ~b$r_buff1_thd2~0_Out122521200 ~b$r_buff0_thd2~0_In122521200) (= ~b$r_buff1_thd1~0_Out122521200 ~b$r_buff0_thd1~0_In122521200) (not (= P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200 0)) (= ~b$r_buff0_thd1~0_Out122521200 1) (= 1 ~x~0_Out122521200)) InVars {~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In122521200, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In122521200, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In122521200, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In122521200} OutVars{~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out122521200, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In122521200, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In122521200, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_Out122521200, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_Out122521200, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In122521200, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_Out122521200, ~x~0=~x~0_Out122521200, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_Out122521200, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In122521200} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, ~b$r_buff1_thd1~0, ~b$r_buff1_thd0~0, ~b$r_buff1_thd2~0, ~x~0, ~b$r_buff1_thd3~0] because there is no mapped edge [2019-12-07 19:08:33,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L778-2-->L778-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite10_Out-1888449916| |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|)) (.cse1 (= (mod ~b$r_buff1_thd2~0_In-1888449916 256) 0)) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In-1888449916 256)))) (or (and (= ~b~0_In-1888449916 |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|) .cse0 (or .cse1 .cse2)) (and .cse0 (not .cse1) (not .cse2) (= ~b$w_buff1~0_In-1888449916 |P1Thread1of1ForFork2_#t~ite9_Out-1888449916|)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1888449916, ~b~0=~b~0_In-1888449916, ~b$w_buff1~0=~b$w_buff1~0_In-1888449916, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1888449916} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1888449916|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1888449916, ~b~0=~b~0_In-1888449916, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-1888449916|, ~b$w_buff1~0=~b$w_buff1~0_In-1888449916, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-1888449916} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 19:08:33,829 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L753-->L753-2: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd1~0_In-2120576798 256) 0)) (.cse1 (= (mod ~b$w_buff0_used~0_In-2120576798 256) 0))) (or (and (= ~b$w_buff0_used~0_In-2120576798 |P0Thread1of1ForFork1_#t~ite5_Out-2120576798|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out-2120576798|) (not .cse0) (not .cse1)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2120576798, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2120576798} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2120576798, P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-2120576798|, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-2120576798} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:08:33,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L754-->L754-2: Formula: (let ((.cse2 (= 0 (mod ~b$r_buff0_thd1~0_In-1829481280 256))) (.cse3 (= (mod ~b$w_buff0_used~0_In-1829481280 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd1~0_In-1829481280 256) 0)) (.cse1 (= (mod ~b$w_buff1_used~0_In-1829481280 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1829481280| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out-1829481280| ~b$w_buff1_used~0_In-1829481280)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1829481280, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1829481280, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1829481280, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1829481280} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1829481280, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-1829481280, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In-1829481280, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1829481280, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1829481280|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:08:33,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In882108058 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In882108058 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out882108058| ~b$w_buff0_used~0_In882108058) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite11_Out882108058| 0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In882108058, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In882108058} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In882108058, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In882108058, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out882108058|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:08:33,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L755-->L756: Formula: (let ((.cse0 (= (mod ~b$r_buff0_thd1~0_In-478302881 256) 0)) (.cse2 (= (mod ~b$w_buff0_used~0_In-478302881 256) 0)) (.cse1 (= ~b$r_buff0_thd1~0_In-478302881 ~b$r_buff0_thd1~0_Out-478302881))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~b$r_buff0_thd1~0_Out-478302881)) (and .cse2 .cse1))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-478302881, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In-478302881} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-478302881, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_Out-478302881, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-478302881|} AuxVars[] AssignedVars[~b$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 19:08:33,830 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~b$r_buff1_thd1~0_In1270628512 256))) (.cse0 (= (mod ~b$w_buff1_used~0_In1270628512 256) 0)) (.cse3 (= 0 (mod ~b$r_buff0_thd1~0_In1270628512 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In1270628512 256)))) (or (and (= ~b$r_buff1_thd1~0_In1270628512 |P0Thread1of1ForFork1_#t~ite8_Out1270628512|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1270628512|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1270628512, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1270628512, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1270628512, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1270628512} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1270628512, ~b$r_buff0_thd1~0=~b$r_buff0_thd1~0_In1270628512, ~b$r_buff1_thd1~0=~b$r_buff1_thd1~0_In1270628512, P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1270628512|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1270628512} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:08:33,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~b$r_buff1_thd1~0_107 |v_P0Thread1of1ForFork1_#t~ite8_46|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_87 1) v_~__unbuffered_cnt~0_86)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87} OutVars{~b$r_buff1_thd1~0=v_~b$r_buff1_thd1~0_107, P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_45|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_86} AuxVars[] AssignedVars[~b$r_buff1_thd1~0, P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:08:33,831 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L842-1-->L844: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t881~0.base_12|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t881~0.offset_10|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t881~0.base_12|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t881~0.base_12| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t881~0.base_12|) |v_ULTIMATE.start_main_~#t881~0.offset_10| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t881~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t881~0.offset=|v_ULTIMATE.start_main_~#t881~0.offset_10|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_15|, #length=|v_#length_15|, ULTIMATE.start_main_~#t881~0.base=|v_ULTIMATE.start_main_~#t881~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t881~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t881~0.base] because there is no mapped edge [2019-12-07 19:08:33,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L809-->L809-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In612344116 256) 0))) (or (and (= ~b$w_buff1_used~0_In612344116 |P2Thread1of1ForFork0_#t~ite30_Out612344116|) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite29_In612344116| |P2Thread1of1ForFork0_#t~ite29_Out612344116|)) (and (let ((.cse1 (= (mod ~b$r_buff0_thd3~0_In612344116 256) 0))) (or (and (= 0 (mod ~b$w_buff1_used~0_In612344116 256)) .cse1) (= (mod ~b$w_buff0_used~0_In612344116 256) 0) (and .cse1 (= 0 (mod ~b$r_buff1_thd3~0_In612344116 256))))) (= |P2Thread1of1ForFork0_#t~ite29_Out612344116| ~b$w_buff1_used~0_In612344116) (= |P2Thread1of1ForFork0_#t~ite29_Out612344116| |P2Thread1of1ForFork0_#t~ite30_Out612344116|) .cse0))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In612344116, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In612344116, ~b$w_buff1_used~0=~b$w_buff1_used~0_In612344116, ~weak$$choice2~0=~weak$$choice2~0_In612344116, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In612344116|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In612344116} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In612344116, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In612344116, ~b$w_buff1_used~0=~b$w_buff1_used~0_In612344116, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out612344116|, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out612344116|, ~weak$$choice2~0=~weak$$choice2~0_In612344116, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In612344116} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 19:08:33,834 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [897] [897] L810-->L811-8: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite36_36| v_~b$r_buff1_thd3~0_279) (= v_~b$r_buff0_thd3~0_376 v_~b$r_buff0_thd3~0_375) (not (= 0 (mod v_~weak$$choice2~0_126 256))) (= |v_P2Thread1of1ForFork0_#t~ite34_29| |v_P2Thread1of1ForFork0_#t~ite34_28|) (= |v_P2Thread1of1ForFork0_#t~ite35_33| |v_P2Thread1of1ForFork0_#t~ite35_32|)) InVars {~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_376, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_33|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_29|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} OutVars{P2Thread1of1ForFork0_#t~ite36=|v_P2Thread1of1ForFork0_#t~ite36_36|, ~b$r_buff0_thd3~0=v_~b$r_buff0_thd3~0_375, P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_23|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_32|, P2Thread1of1ForFork0_#t~ite35=|v_P2Thread1of1ForFork0_#t~ite35_32|, P2Thread1of1ForFork0_#t~ite34=|v_P2Thread1of1ForFork0_#t~ite34_28|, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_25|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_279} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite36, ~b$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, P2Thread1of1ForFork0_#t~ite35, P2Thread1of1ForFork0_#t~ite34, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 19:08:33,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L813-->L817: Formula: (and (= v_~b$flush_delayed~0_6 0) (not (= (mod v_~b$flush_delayed~0_7 256) 0)) (= v_~b~0_16 v_~b$mem_tmp~0_4)) InVars {~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b$flush_delayed~0=v_~b$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~b$mem_tmp~0=v_~b$mem_tmp~0_4, ~b~0=v_~b~0_16, ~b$flush_delayed~0=v_~b$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~b~0, ~b$flush_delayed~0] because there is no mapped edge [2019-12-07 19:08:33,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L817-2-->L817-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1210618163| |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|)) (.cse2 (= 0 (mod ~b$w_buff1_used~0_In-1210618163 256))) (.cse1 (= 0 (mod ~b$r_buff1_thd3~0_In-1210618163 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= ~b$w_buff1~0_In-1210618163 |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|)) (and .cse0 (= ~b~0_In-1210618163 |P2Thread1of1ForFork0_#t~ite38_Out-1210618163|) (or .cse2 .cse1)))) InVars {~b$w_buff1_used~0=~b$w_buff1_used~0_In-1210618163, ~b~0=~b~0_In-1210618163, ~b$w_buff1~0=~b$w_buff1~0_In-1210618163, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1210618163} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1210618163|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1210618163|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1210618163, ~b~0=~b~0_In-1210618163, ~b$w_buff1~0=~b$w_buff1~0_In-1210618163, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1210618163} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 19:08:33,835 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L818-->L818-2: Formula: (let ((.cse1 (= (mod ~b$w_buff0_used~0_In1082240770 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In1082240770 256)))) (or (and (= ~b$w_buff0_used~0_In1082240770 |P2Thread1of1ForFork0_#t~ite40_Out1082240770|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork0_#t~ite40_Out1082240770|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1082240770, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1082240770} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1082240770, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In1082240770, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1082240770|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 19:08:33,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~b$r_buff0_thd3~0_In745316202 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In745316202 256))) (.cse1 (= (mod ~b$r_buff1_thd3~0_In745316202 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In745316202 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff1_used~0_In745316202 |P2Thread1of1ForFork0_#t~ite41_Out745316202|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out745316202|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In745316202, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In745316202, ~b$w_buff1_used~0=~b$w_buff1_used~0_In745316202, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In745316202} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In745316202, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In745316202, ~b$w_buff1_used~0=~b$w_buff1_used~0_In745316202, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out745316202|, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In745316202} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 19:08:33,836 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In-1618529024 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd3~0_In-1618529024 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-1618529024| ~b$r_buff0_thd3~0_In-1618529024)) (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1618529024|) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1618529024, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1618529024} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1618529024, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1618529024, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1618529024|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 19:08:33,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L821-->L821-2: Formula: (let ((.cse2 (= (mod ~b$r_buff0_thd3~0_In-1709836715 256) 0)) (.cse3 (= (mod ~b$w_buff0_used~0_In-1709836715 256) 0)) (.cse0 (= (mod ~b$r_buff1_thd3~0_In-1709836715 256) 0)) (.cse1 (= 0 (mod ~b$w_buff1_used~0_In-1709836715 256)))) (or (and (or .cse0 .cse1) (= ~b$r_buff1_thd3~0_In-1709836715 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1709836715|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1709836715, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1709836715, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1709836715, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1709836715} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1709836715, ~b$r_buff0_thd3~0=~b$r_buff0_thd3~0_In-1709836715, P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1709836715|, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1709836715, ~b$r_buff1_thd3~0=~b$r_buff1_thd3~0_In-1709836715} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 19:08:33,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L821-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite43_34| v_~b$r_buff1_thd3~0_101)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_33|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, ~b$r_buff1_thd3~0=v_~b$r_buff1_thd3~0_101, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~__unbuffered_cnt~0, ~b$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:08:33,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In-2143664203 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd2~0_In-2143664203 256) 0)) (.cse3 (= (mod ~b$r_buff0_thd2~0_In-2143664203 256) 0)) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-2143664203 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-2143664203| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2143664203| ~b$w_buff1_used~0_In-2143664203) (or .cse3 .cse2)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143664203, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2143664203, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143664203, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2143664203} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2143664203, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2143664203, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2143664203, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2143664203|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2143664203} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:08:33,837 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~b$r_buff0_thd2~0_In-1515191680 256) 0)) (.cse0 (= 0 (mod ~b$w_buff0_used~0_In-1515191680 256)))) (or (and (= ~b$r_buff0_thd2~0_In-1515191680 |P1Thread1of1ForFork2_#t~ite13_Out-1515191680|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-1515191680|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1515191680, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1515191680} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-1515191680, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-1515191680, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-1515191680|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 19:08:33,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L782-->L782-2: Formula: (let ((.cse3 (= (mod ~b$r_buff1_thd2~0_In-2134331003 256) 0)) (.cse2 (= (mod ~b$w_buff1_used~0_In-2134331003 256) 0)) (.cse0 (= 0 (mod ~b$r_buff0_thd2~0_In-2134331003 256))) (.cse1 (= (mod ~b$w_buff0_used~0_In-2134331003 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2134331003| ~b$r_buff1_thd2~0_In-2134331003) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-2134331003|)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-2134331003, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2134331003, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2134331003, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2134331003} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In-2134331003, ~b$r_buff0_thd2~0=~b$r_buff0_thd2~0_In-2134331003, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-2134331003, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2134331003|, ~b$r_buff1_thd2~0=~b$r_buff1_thd2~0_In-2134331003} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:08:33,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~b$r_buff1_thd2~0_91 |v_P1Thread1of1ForFork2_#t~ite14_50|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_50|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_49|, ~b$r_buff1_thd2~0=v_~b$r_buff1_thd2~0_91, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, ~b$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 19:08:33,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L848-->L850-2: Formula: (and (or (= 0 (mod v_~b$w_buff0_used~0_159 256)) (= 0 (mod v_~b$r_buff0_thd0~0_23 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} OutVars{~b$w_buff0_used~0=v_~b$w_buff0_used~0_159, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5, ~b$r_buff0_thd0~0=v_~b$r_buff0_thd0~0_23} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 19:08:33,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L850-2-->L850-4: Formula: (let ((.cse0 (= (mod ~b$w_buff1_used~0_In746743505 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In746743505 256) 0))) (or (and (= ~b~0_In746743505 |ULTIMATE.start_main_#t~ite47_Out746743505|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~b$w_buff1~0_In746743505 |ULTIMATE.start_main_#t~ite47_Out746743505|)))) InVars {~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In746743505, ~b$w_buff1_used~0=~b$w_buff1_used~0_In746743505, ~b~0=~b~0_In746743505, ~b$w_buff1~0=~b$w_buff1~0_In746743505} OutVars{~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In746743505, ~b$w_buff1_used~0=~b$w_buff1_used~0_In746743505, ~b~0=~b~0_In746743505, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out746743505|, ~b$w_buff1~0=~b$w_buff1~0_In746743505} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 19:08:33,838 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L850-4-->L851: Formula: (= v_~b~0_28 |v_ULTIMATE.start_main_#t~ite47_9|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|} OutVars{~b~0=v_~b~0_28, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_12|} AuxVars[] AssignedVars[~b~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:08:33,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L851-->L851-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In1085798377 256))) (.cse0 (= (mod ~b$r_buff0_thd0~0_In1085798377 256) 0))) (or (and (or .cse0 .cse1) (= ~b$w_buff0_used~0_In1085798377 |ULTIMATE.start_main_#t~ite49_Out1085798377|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out1085798377|) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1085798377, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1085798377} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1085798377, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1085798377|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1085798377} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 19:08:33,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L852-->L852-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In-1080951997 256))) (.cse2 (= 0 (mod ~b$w_buff0_used~0_In-1080951997 256))) (.cse0 (= 0 (mod ~b$r_buff1_thd0~0_In-1080951997 256))) (.cse1 (= (mod ~b$w_buff1_used~0_In-1080951997 256) 0))) (or (and (= ~b$w_buff1_used~0_In-1080951997 |ULTIMATE.start_main_#t~ite50_Out-1080951997|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-1080951997|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In-1080951997, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1080951997, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1080951997, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1080951997} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1080951997|, ~b$w_buff0_used~0=~b$w_buff0_used~0_In-1080951997, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In-1080951997, ~b$w_buff1_used~0=~b$w_buff1_used~0_In-1080951997, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In-1080951997} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 19:08:33,839 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L853-->L853-2: Formula: (let ((.cse1 (= 0 (mod ~b$w_buff0_used~0_In683921878 256))) (.cse0 (= 0 (mod ~b$r_buff0_thd0~0_In683921878 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite51_Out683921878| ~b$r_buff0_thd0~0_In683921878)) (and (= |ULTIMATE.start_main_#t~ite51_Out683921878| 0) (not .cse1) (not .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In683921878, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In683921878} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In683921878, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out683921878|, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In683921878} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 19:08:33,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L854-->L854-2: Formula: (let ((.cse3 (= 0 (mod ~b$r_buff0_thd0~0_In1951345974 256))) (.cse2 (= (mod ~b$w_buff0_used~0_In1951345974 256) 0)) (.cse1 (= (mod ~b$r_buff1_thd0~0_In1951345974 256) 0)) (.cse0 (= (mod ~b$w_buff1_used~0_In1951345974 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1951345974| 0)) (and (= |ULTIMATE.start_main_#t~ite52_Out1951345974| ~b$r_buff1_thd0~0_In1951345974) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~b$w_buff0_used~0=~b$w_buff0_used~0_In1951345974, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1951345974, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1951345974, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1951345974} OutVars{~b$w_buff0_used~0=~b$w_buff0_used~0_In1951345974, ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1951345974|, ~b$r_buff1_thd0~0=~b$r_buff1_thd0~0_In1951345974, ~b$w_buff1_used~0=~b$w_buff1_used~0_In1951345974, ~b$r_buff0_thd0~0=~b$r_buff0_thd0~0_In1951345974} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 19:08:33,840 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L854-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 1 v_~__unbuffered_p1_EAX~0_30) (= v_~__unbuffered_p2_EBX~0_21 0) (= v_~x~0_96 2) (= v_~__unbuffered_p1_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0) (= v_~b$r_buff1_thd0~0_116 |v_ULTIMATE.start_main_#t~ite52_39|)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_30, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_21, ~b$r_buff1_thd0~0=v_~b$r_buff1_thd0~0_116, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_30, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_96, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~b$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:08:33,891 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_70e43ca2-139e-4e73-836d-27ce25b0f5d1/bin/utaipan/witness.graphml [2019-12-07 19:08:33,891 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:08:33,892 INFO L168 Benchmark]: Toolchain (without parser) took 205794.86 ms. Allocated memory was 1.0 GB in the beginning and 10.3 GB in the end (delta: 9.3 GB). Free memory was 935.5 MB in the beginning and 2.7 GB in the end (delta: -1.8 GB). Peak memory consumption was 7.5 GB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,892 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:08:33,893 INFO L168 Benchmark]: CACSL2BoogieTranslator took 404.35 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -136.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,893 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,893 INFO L168 Benchmark]: Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:08:33,893 INFO L168 Benchmark]: RCFGBuilder took 439.36 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 61.6 MB). Peak memory consumption was 61.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,893 INFO L168 Benchmark]: TraceAbstraction took 204816.06 ms. Allocated memory was 1.1 GB in the beginning and 10.3 GB in the end (delta: 9.2 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 7.4 GB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,894 INFO L168 Benchmark]: Witness Printer took 66.43 ms. Allocated memory is still 10.3 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. [2019-12-07 19:08:33,895 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 404.35 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.8 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -136.0 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.86 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.39 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 439.36 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 61.6 MB). Peak memory consumption was 61.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 204816.06 ms. Allocated memory was 1.1 GB in the beginning and 10.3 GB in the end (delta: 9.2 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 7.4 GB. Max. memory is 11.5 GB. * Witness Printer took 66.43 ms. Allocated memory is still 10.3 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 47.7 MB). Peak memory consumption was 47.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 179 ProgramPointsBefore, 93 ProgramPointsAfterwards, 216 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 36 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 32 ChoiceCompositions, 7364 VarBasedMoverChecksPositive, 244 VarBasedMoverChecksNegative, 47 SemBasedMoverChecksPositive, 271 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 80691 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L840] FCALL, FORK 0 pthread_create(&t879, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L842] FCALL, FORK 0 pthread_create(&t880, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=0, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=0, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L737] 1 b$w_buff1 = b$w_buff0 [L738] 1 b$w_buff0 = 1 [L739] 1 b$w_buff1_used = b$w_buff0_used [L740] 1 b$w_buff0_used = (_Bool)1 [L752] EXPR 1 b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L766] 2 x = 2 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L778] EXPR 2 b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=1, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L752] 1 b = b$w_buff0_used && b$r_buff0_thd1 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd1 ? b$w_buff1 : b) [L778] 2 b = b$w_buff0_used && b$r_buff0_thd2 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd2 ? b$w_buff1 : b) [L753] 1 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd1 ? (_Bool)0 : b$w_buff0_used [L754] 1 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd1 || b$w_buff1_used && b$r_buff1_thd1 ? (_Bool)0 : b$w_buff1_used [L844] FCALL, FORK 0 pthread_create(&t881, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0] [L792] 3 z = 1 [L795] 3 a = 1 [L798] 3 __unbuffered_p2_EAX = a [L801] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L802] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L803] 3 b$flush_delayed = weak$$choice2 [L804] 3 b$mem_tmp = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] EXPR 3 !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) VAL [!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1)=0, __unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L805] 3 b = !b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff1) [L806] EXPR 3 weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0))=1, x=2, y=1, z=1] [L806] 3 b$w_buff0 = weak$$choice2 ? b$w_buff0 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : b$w_buff0)) [L807] EXPR 3 weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1))=0, x=2, y=1, z=1] [L807] 3 b$w_buff1 = weak$$choice2 ? b$w_buff1 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1 : (b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff1 : b$w_buff1)) [L808] EXPR 3 weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used))=0, x=2, y=1, z=1] [L808] 3 b$w_buff0_used = weak$$choice2 ? b$w_buff0_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff0_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used)) [L809] 3 b$w_buff1_used = weak$$choice2 ? b$w_buff1_used : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$w_buff1_used : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L811] 3 b$r_buff1_thd3 = weak$$choice2 ? b$r_buff1_thd3 : (!b$w_buff0_used || !b$r_buff0_thd3 && !b$w_buff1_used || !b$r_buff0_thd3 && !b$r_buff1_thd3 ? b$r_buff1_thd3 : (b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L812] 3 __unbuffered_p2_EBX = b VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=1, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] EXPR 3 b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L817] 3 b = b$w_buff0_used && b$r_buff0_thd3 ? b$w_buff0 : (b$w_buff1_used && b$r_buff1_thd3 ? b$w_buff1 : b) [L818] 3 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$w_buff0_used [L819] 3 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd3 || b$w_buff1_used && b$r_buff1_thd3 ? (_Bool)0 : b$w_buff1_used [L820] 3 b$r_buff0_thd3 = b$w_buff0_used && b$r_buff0_thd3 ? (_Bool)0 : b$r_buff0_thd3 [L779] 2 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$w_buff0_used [L780] 2 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd2 || b$w_buff1_used && b$r_buff1_thd2 ? (_Bool)0 : b$w_buff1_used [L781] 2 b$r_buff0_thd2 = b$w_buff0_used && b$r_buff0_thd2 ? (_Bool)0 : b$r_buff0_thd2 [L846] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=0, b$flush_delayed=0, b$mem_tmp=0, b$r_buff0_thd0=0, b$r_buff0_thd1=1, b$r_buff0_thd2=0, b$r_buff0_thd3=0, b$r_buff1_thd0=0, b$r_buff1_thd1=0, b$r_buff1_thd2=0, b$r_buff1_thd3=0, b$read_delayed=0, b$read_delayed_var={0:0}, b$w_buff0=1, b$w_buff0_used=0, b$w_buff1=0, b$w_buff1_used=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, z=1] [L851] 0 b$w_buff0_used = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$w_buff0_used [L852] 0 b$w_buff1_used = b$w_buff0_used && b$r_buff0_thd0 || b$w_buff1_used && b$r_buff1_thd0 ? (_Bool)0 : b$w_buff1_used [L853] 0 b$r_buff0_thd0 = b$w_buff0_used && b$r_buff0_thd0 ? (_Bool)0 : b$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 204.6s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 51.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8888 SDtfs, 10984 SDslu, 31791 SDs, 0 SdLazy, 22275 SolverSat, 427 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 14.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 452 GetRequests, 35 SyntacticMatches, 16 SemanticMatches, 401 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3624 ImplicationChecksByTransitivity, 5.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=325092occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 133.4s AutomataMinimizationTime, 33 MinimizatonAttempts, 497270 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 1225 NumberOfCodeBlocks, 1225 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1126 ConstructedInterpolants, 0 QuantifiedInterpolants, 455159 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...