./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix035_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix035_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e26bb2f8862e1d9a90c30fba0ca29a6f12858607 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:12:26,980 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:12:26,982 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:12:26,989 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:12:26,989 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:12:26,990 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:12:26,991 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:12:26,992 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:12:26,994 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:12:26,995 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:12:26,995 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:12:26,996 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:12:26,996 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:12:26,997 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:12:26,998 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:12:26,999 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:12:26,999 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:12:27,000 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:12:27,002 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:12:27,003 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:12:27,004 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:12:27,005 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:12:27,005 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:12:27,006 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:12:27,007 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:12:27,008 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:12:27,008 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:12:27,008 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:12:27,008 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:12:27,009 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:12:27,009 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:12:27,010 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:12:27,010 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:12:27,011 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:12:27,011 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:12:27,012 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:12:27,012 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:12:27,012 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:12:27,012 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:12:27,013 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:12:27,014 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:12:27,014 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 16:12:27,027 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:12:27,027 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:12:27,028 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 16:12:27,028 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 16:12:27,029 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 16:12:27,029 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 16:12:27,029 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 16:12:27,029 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 16:12:27,029 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 16:12:27,029 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 16:12:27,030 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 16:12:27,030 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 16:12:27,030 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 16:12:27,030 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 16:12:27,030 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 16:12:27,031 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:12:27,031 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:12:27,031 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:12:27,032 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 16:12:27,033 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:12:27,033 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:12:27,033 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:12:27,033 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:12:27,033 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:12:27,034 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:12:27,034 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:12:27,034 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:12:27,034 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:12:27,034 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:12:27,035 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 16:12:27,036 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e26bb2f8862e1d9a90c30fba0ca29a6f12858607 [2019-12-07 16:12:27,141 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:12:27,149 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:12:27,151 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:12:27,152 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:12:27,153 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:12:27,153 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix035_pso.oepc.i [2019-12-07 16:12:27,189 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/data/fda37606c/baa54bb3b95a43f2b6a1067422f65044/FLAGc49695f53 [2019-12-07 16:12:27,550 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:12:27,550 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/sv-benchmarks/c/pthread-wmm/mix035_pso.oepc.i [2019-12-07 16:12:27,561 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/data/fda37606c/baa54bb3b95a43f2b6a1067422f65044/FLAGc49695f53 [2019-12-07 16:12:27,573 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/data/fda37606c/baa54bb3b95a43f2b6a1067422f65044 [2019-12-07 16:12:27,576 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:12:27,577 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:12:27,578 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:12:27,578 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:12:27,581 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:12:27,582 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:27,584 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27, skipping insertion in model container [2019-12-07 16:12:27,584 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:27,589 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:12:27,628 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:12:27,892 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:12:27,899 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:12:27,945 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:12:27,992 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:12:27,992 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27 WrapperNode [2019-12-07 16:12:27,992 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:12:27,993 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:12:27,993 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:12:27,993 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:12:28,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,013 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,030 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:12:28,030 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:12:28,030 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:12:28,031 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:12:28,037 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,037 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,040 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,040 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,047 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,050 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,053 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... [2019-12-07 16:12:28,056 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:12:28,056 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:12:28,056 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:12:28,056 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:12:28,057 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:12:28,096 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:12:28,097 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:12:28,097 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:12:28,097 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:12:28,097 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:12:28,097 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:12:28,099 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:12:28,467 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:12:28,467 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:12:28,468 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:12:28 BoogieIcfgContainer [2019-12-07 16:12:28,468 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:12:28,469 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:12:28,469 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:12:28,471 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:12:28,471 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:12:27" (1/3) ... [2019-12-07 16:12:28,471 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fbde7b8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:12:28, skipping insertion in model container [2019-12-07 16:12:28,471 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:12:27" (2/3) ... [2019-12-07 16:12:28,472 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fbde7b8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:12:28, skipping insertion in model container [2019-12-07 16:12:28,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:12:28" (3/3) ... [2019-12-07 16:12:28,473 INFO L109 eAbstractionObserver]: Analyzing ICFG mix035_pso.oepc.i [2019-12-07 16:12:28,479 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:12:28,479 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:12:28,484 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:12:28,485 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,510 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,511 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,512 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,513 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,514 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,515 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,516 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,517 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,518 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,518 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,530 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:12:28,541 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:12:28,553 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:12:28,553 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:12:28,553 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:12:28,553 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:12:28,553 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:12:28,553 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:12:28,554 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:12:28,554 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:12:28,565 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 16:12:28,566 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:12:28,622 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:12:28,622 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:12:28,633 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 707 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:12:28,649 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 16:12:28,682 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 16:12:28,682 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:12:28,687 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 707 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:12:28,703 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 16:12:28,704 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:12:31,664 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 16:12:31,879 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 43 [2019-12-07 16:12:31,919 INFO L206 etLargeBlockEncoding]: Checked pairs total: 83880 [2019-12-07 16:12:31,919 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 16:12:31,921 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 16:12:47,518 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118052 states. [2019-12-07 16:12:47,520 INFO L276 IsEmpty]: Start isEmpty. Operand 118052 states. [2019-12-07 16:12:47,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:12:47,523 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:12:47,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:12:47,524 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:12:47,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:12:47,528 INFO L82 PathProgramCache]: Analyzing trace with hash 918883, now seen corresponding path program 1 times [2019-12-07 16:12:47,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:12:47,534 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617055961] [2019-12-07 16:12:47,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:12:47,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:12:47,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:12:47,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617055961] [2019-12-07 16:12:47,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:12:47,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:12:47,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039259424] [2019-12-07 16:12:47,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:12:47,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:12:47,688 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:12:47,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:12:47,690 INFO L87 Difference]: Start difference. First operand 118052 states. Second operand 3 states. [2019-12-07 16:12:48,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:12:48,408 INFO L93 Difference]: Finished difference Result 117122 states and 502402 transitions. [2019-12-07 16:12:48,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:12:48,409 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:12:48,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:12:48,892 INFO L225 Difference]: With dead ends: 117122 [2019-12-07 16:12:48,892 INFO L226 Difference]: Without dead ends: 109842 [2019-12-07 16:12:48,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:12:53,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109842 states. [2019-12-07 16:12:55,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109842 to 109842. [2019-12-07 16:12:55,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109842 states. [2019-12-07 16:12:56,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109842 states to 109842 states and 470538 transitions. [2019-12-07 16:12:56,175 INFO L78 Accepts]: Start accepts. Automaton has 109842 states and 470538 transitions. Word has length 3 [2019-12-07 16:12:56,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:12:56,176 INFO L462 AbstractCegarLoop]: Abstraction has 109842 states and 470538 transitions. [2019-12-07 16:12:56,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:12:56,176 INFO L276 IsEmpty]: Start isEmpty. Operand 109842 states and 470538 transitions. [2019-12-07 16:12:56,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:12:56,180 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:12:56,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:12:56,180 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:12:56,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:12:56,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1326055600, now seen corresponding path program 1 times [2019-12-07 16:12:56,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:12:56,181 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1062152748] [2019-12-07 16:12:56,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:12:56,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:12:56,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:12:56,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1062152748] [2019-12-07 16:12:56,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:12:56,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:12:56,256 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537309345] [2019-12-07 16:12:56,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:12:56,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:12:56,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:12:56,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:12:56,258 INFO L87 Difference]: Start difference. First operand 109842 states and 470538 transitions. Second operand 4 states. [2019-12-07 16:12:57,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:12:57,488 INFO L93 Difference]: Finished difference Result 170700 states and 702967 transitions. [2019-12-07 16:12:57,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:12:57,489 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:12:57,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:12:57,933 INFO L225 Difference]: With dead ends: 170700 [2019-12-07 16:12:57,933 INFO L226 Difference]: Without dead ends: 170651 [2019-12-07 16:12:57,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:13:03,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170651 states. [2019-12-07 16:13:07,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170651 to 155174. [2019-12-07 16:13:07,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155174 states. [2019-12-07 16:13:08,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155174 states to 155174 states and 647977 transitions. [2019-12-07 16:13:08,134 INFO L78 Accepts]: Start accepts. Automaton has 155174 states and 647977 transitions. Word has length 11 [2019-12-07 16:13:08,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:13:08,134 INFO L462 AbstractCegarLoop]: Abstraction has 155174 states and 647977 transitions. [2019-12-07 16:13:08,134 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:13:08,134 INFO L276 IsEmpty]: Start isEmpty. Operand 155174 states and 647977 transitions. [2019-12-07 16:13:08,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:13:08,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:13:08,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:13:08,138 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:13:08,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:13:08,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1447855061, now seen corresponding path program 1 times [2019-12-07 16:13:08,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:13:08,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858114568] [2019-12-07 16:13:08,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:13:08,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:13:08,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:13:08,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858114568] [2019-12-07 16:13:08,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:13:08,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:13:08,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723280902] [2019-12-07 16:13:08,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:13:08,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:13:08,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:13:08,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:13:08,200 INFO L87 Difference]: Start difference. First operand 155174 states and 647977 transitions. Second operand 4 states. [2019-12-07 16:13:09,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:13:09,361 INFO L93 Difference]: Finished difference Result 224055 states and 913655 transitions. [2019-12-07 16:13:09,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:13:09,362 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:13:09,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:13:09,989 INFO L225 Difference]: With dead ends: 224055 [2019-12-07 16:13:09,989 INFO L226 Difference]: Without dead ends: 223999 [2019-12-07 16:13:09,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:13:16,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223999 states. [2019-12-07 16:13:21,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223999 to 186994. [2019-12-07 16:13:21,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186994 states. [2019-12-07 16:13:22,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186994 states to 186994 states and 776530 transitions. [2019-12-07 16:13:22,057 INFO L78 Accepts]: Start accepts. Automaton has 186994 states and 776530 transitions. Word has length 13 [2019-12-07 16:13:22,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:13:22,058 INFO L462 AbstractCegarLoop]: Abstraction has 186994 states and 776530 transitions. [2019-12-07 16:13:22,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:13:22,058 INFO L276 IsEmpty]: Start isEmpty. Operand 186994 states and 776530 transitions. [2019-12-07 16:13:22,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:13:22,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:13:22,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:13:22,066 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:13:22,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:13:22,067 INFO L82 PathProgramCache]: Analyzing trace with hash 627665056, now seen corresponding path program 1 times [2019-12-07 16:13:22,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:13:22,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430272324] [2019-12-07 16:13:22,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:13:22,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:13:22,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:13:22,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430272324] [2019-12-07 16:13:22,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:13:22,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:13:22,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213181034] [2019-12-07 16:13:22,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:13:22,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:13:22,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:13:22,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:13:22,096 INFO L87 Difference]: Start difference. First operand 186994 states and 776530 transitions. Second operand 3 states. [2019-12-07 16:13:23,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:13:23,623 INFO L93 Difference]: Finished difference Result 280132 states and 1157620 transitions. [2019-12-07 16:13:23,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:13:23,624 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 16:13:23,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:13:24,399 INFO L225 Difference]: With dead ends: 280132 [2019-12-07 16:13:24,400 INFO L226 Difference]: Without dead ends: 280132 [2019-12-07 16:13:24,400 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:13:31,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280132 states. [2019-12-07 16:13:34,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280132 to 219156. [2019-12-07 16:13:34,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219156 states. [2019-12-07 16:13:35,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219156 states to 219156 states and 912840 transitions. [2019-12-07 16:13:35,361 INFO L78 Accepts]: Start accepts. Automaton has 219156 states and 912840 transitions. Word has length 16 [2019-12-07 16:13:35,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:13:35,362 INFO L462 AbstractCegarLoop]: Abstraction has 219156 states and 912840 transitions. [2019-12-07 16:13:35,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:13:35,362 INFO L276 IsEmpty]: Start isEmpty. Operand 219156 states and 912840 transitions. [2019-12-07 16:13:35,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:13:35,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:13:35,370 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:13:35,370 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:13:35,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:13:35,370 INFO L82 PathProgramCache]: Analyzing trace with hash 712450242, now seen corresponding path program 1 times [2019-12-07 16:13:35,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:13:35,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638107189] [2019-12-07 16:13:35,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:13:35,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:13:35,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:13:35,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638107189] [2019-12-07 16:13:35,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:13:35,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:13:35,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849973100] [2019-12-07 16:13:35,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:13:35,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:13:35,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:13:35,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:13:35,423 INFO L87 Difference]: Start difference. First operand 219156 states and 912840 transitions. Second operand 4 states. [2019-12-07 16:13:39,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:13:39,508 INFO L93 Difference]: Finished difference Result 260201 states and 1070965 transitions. [2019-12-07 16:13:39,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:13:39,509 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 16:13:39,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:13:40,191 INFO L225 Difference]: With dead ends: 260201 [2019-12-07 16:13:40,191 INFO L226 Difference]: Without dead ends: 260201 [2019-12-07 16:13:40,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:13:46,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260201 states. [2019-12-07 16:13:50,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260201 to 231090. [2019-12-07 16:13:50,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231090 states. [2019-12-07 16:13:51,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231090 states to 231090 states and 960623 transitions. [2019-12-07 16:13:51,105 INFO L78 Accepts]: Start accepts. Automaton has 231090 states and 960623 transitions. Word has length 16 [2019-12-07 16:13:51,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:13:51,105 INFO L462 AbstractCegarLoop]: Abstraction has 231090 states and 960623 transitions. [2019-12-07 16:13:51,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:13:51,105 INFO L276 IsEmpty]: Start isEmpty. Operand 231090 states and 960623 transitions. [2019-12-07 16:13:51,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 16:13:51,111 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:13:51,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:13:51,112 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:13:51,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:13:51,112 INFO L82 PathProgramCache]: Analyzing trace with hash 646000998, now seen corresponding path program 1 times [2019-12-07 16:13:51,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:13:51,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625376644] [2019-12-07 16:13:51,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:13:51,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:13:51,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:13:51,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625376644] [2019-12-07 16:13:51,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:13:51,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:13:51,151 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1402095373] [2019-12-07 16:13:51,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:13:51,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:13:51,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:13:51,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:13:51,151 INFO L87 Difference]: Start difference. First operand 231090 states and 960623 transitions. Second operand 4 states. [2019-12-07 16:13:52,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:13:52,919 INFO L93 Difference]: Finished difference Result 274316 states and 1132270 transitions. [2019-12-07 16:13:52,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:13:52,920 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 16:13:52,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:13:53,645 INFO L225 Difference]: With dead ends: 274316 [2019-12-07 16:13:53,645 INFO L226 Difference]: Without dead ends: 274316 [2019-12-07 16:13:53,645 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:01,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274316 states. [2019-12-07 16:14:07,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274316 to 234317. [2019-12-07 16:14:07,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234317 states. [2019-12-07 16:14:08,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234317 states to 234317 states and 974891 transitions. [2019-12-07 16:14:08,472 INFO L78 Accepts]: Start accepts. Automaton has 234317 states and 974891 transitions. Word has length 16 [2019-12-07 16:14:08,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:08,472 INFO L462 AbstractCegarLoop]: Abstraction has 234317 states and 974891 transitions. [2019-12-07 16:14:08,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:08,473 INFO L276 IsEmpty]: Start isEmpty. Operand 234317 states and 974891 transitions. [2019-12-07 16:14:08,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:14:08,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:08,484 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:08,485 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:08,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:08,485 INFO L82 PathProgramCache]: Analyzing trace with hash 910996381, now seen corresponding path program 1 times [2019-12-07 16:14:08,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:08,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018478482] [2019-12-07 16:14:08,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:08,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:08,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:08,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018478482] [2019-12-07 16:14:08,537 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:08,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:08,537 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1541418166] [2019-12-07 16:14:08,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:08,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:08,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:08,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:08,538 INFO L87 Difference]: Start difference. First operand 234317 states and 974891 transitions. Second operand 3 states. [2019-12-07 16:14:09,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:09,588 INFO L93 Difference]: Finished difference Result 234317 states and 965027 transitions. [2019-12-07 16:14:09,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:09,589 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:14:09,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:10,739 INFO L225 Difference]: With dead ends: 234317 [2019-12-07 16:14:10,739 INFO L226 Difference]: Without dead ends: 234317 [2019-12-07 16:14:10,739 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:17,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234317 states. [2019-12-07 16:14:20,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234317 to 230795. [2019-12-07 16:14:20,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230795 states. [2019-12-07 16:14:21,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230795 states to 230795 states and 951941 transitions. [2019-12-07 16:14:21,207 INFO L78 Accepts]: Start accepts. Automaton has 230795 states and 951941 transitions. Word has length 18 [2019-12-07 16:14:21,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:21,207 INFO L462 AbstractCegarLoop]: Abstraction has 230795 states and 951941 transitions. [2019-12-07 16:14:21,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:21,208 INFO L276 IsEmpty]: Start isEmpty. Operand 230795 states and 951941 transitions. [2019-12-07 16:14:21,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 16:14:21,218 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:21,218 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:21,218 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:21,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:21,218 INFO L82 PathProgramCache]: Analyzing trace with hash 704033498, now seen corresponding path program 1 times [2019-12-07 16:14:21,218 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:21,219 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [889224669] [2019-12-07 16:14:21,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:21,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:21,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:21,257 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [889224669] [2019-12-07 16:14:21,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:21,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:14:21,257 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184896586] [2019-12-07 16:14:21,258 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:21,258 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:21,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:21,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:21,258 INFO L87 Difference]: Start difference. First operand 230795 states and 951941 transitions. Second operand 3 states. [2019-12-07 16:14:24,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:24,781 INFO L93 Difference]: Finished difference Result 232502 states and 956244 transitions. [2019-12-07 16:14:24,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:24,782 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 16:14:24,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:25,373 INFO L225 Difference]: With dead ends: 232502 [2019-12-07 16:14:25,374 INFO L226 Difference]: Without dead ends: 232502 [2019-12-07 16:14:25,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:31,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232502 states. [2019-12-07 16:14:34,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232502 to 230792. [2019-12-07 16:14:34,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230792 states. [2019-12-07 16:14:35,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230792 states to 230792 states and 951929 transitions. [2019-12-07 16:14:35,383 INFO L78 Accepts]: Start accepts. Automaton has 230792 states and 951929 transitions. Word has length 18 [2019-12-07 16:14:35,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:35,384 INFO L462 AbstractCegarLoop]: Abstraction has 230792 states and 951929 transitions. [2019-12-07 16:14:35,384 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:35,384 INFO L276 IsEmpty]: Start isEmpty. Operand 230792 states and 951929 transitions. [2019-12-07 16:14:35,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:14:35,397 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:35,397 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:35,398 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:35,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:35,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1866087035, now seen corresponding path program 1 times [2019-12-07 16:14:35,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:35,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319845598] [2019-12-07 16:14:35,398 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:35,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:35,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:35,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319845598] [2019-12-07 16:14:35,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:35,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:35,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313499028] [2019-12-07 16:14:35,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:35,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:35,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:35,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:35,422 INFO L87 Difference]: Start difference. First operand 230792 states and 951929 transitions. Second operand 3 states. [2019-12-07 16:14:35,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:35,550 INFO L93 Difference]: Finished difference Result 42224 states and 137418 transitions. [2019-12-07 16:14:35,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:35,551 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 16:14:35,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:35,610 INFO L225 Difference]: With dead ends: 42224 [2019-12-07 16:14:35,610 INFO L226 Difference]: Without dead ends: 42224 [2019-12-07 16:14:35,610 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:35,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42224 states. [2019-12-07 16:14:36,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42224 to 42224. [2019-12-07 16:14:36,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42224 states. [2019-12-07 16:14:36,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42224 states to 42224 states and 137418 transitions. [2019-12-07 16:14:36,707 INFO L78 Accepts]: Start accepts. Automaton has 42224 states and 137418 transitions. Word has length 19 [2019-12-07 16:14:36,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:36,707 INFO L462 AbstractCegarLoop]: Abstraction has 42224 states and 137418 transitions. [2019-12-07 16:14:36,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:36,708 INFO L276 IsEmpty]: Start isEmpty. Operand 42224 states and 137418 transitions. [2019-12-07 16:14:36,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:14:36,713 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:36,713 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:36,713 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:36,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:36,714 INFO L82 PathProgramCache]: Analyzing trace with hash -2051800974, now seen corresponding path program 1 times [2019-12-07 16:14:36,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:36,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923269812] [2019-12-07 16:14:36,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:36,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:36,759 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:36,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1923269812] [2019-12-07 16:14:36,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:36,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:36,760 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [894031601] [2019-12-07 16:14:36,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:36,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:36,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:36,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:36,760 INFO L87 Difference]: Start difference. First operand 42224 states and 137418 transitions. Second operand 5 states. [2019-12-07 16:14:37,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:37,208 INFO L93 Difference]: Finished difference Result 58561 states and 186001 transitions. [2019-12-07 16:14:37,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:14:37,208 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:14:37,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:37,296 INFO L225 Difference]: With dead ends: 58561 [2019-12-07 16:14:37,296 INFO L226 Difference]: Without dead ends: 58554 [2019-12-07 16:14:37,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:14:37,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58554 states. [2019-12-07 16:14:38,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58554 to 43370. [2019-12-07 16:14:38,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43370 states. [2019-12-07 16:14:38,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43370 states to 43370 states and 140931 transitions. [2019-12-07 16:14:38,156 INFO L78 Accepts]: Start accepts. Automaton has 43370 states and 140931 transitions. Word has length 22 [2019-12-07 16:14:38,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:38,156 INFO L462 AbstractCegarLoop]: Abstraction has 43370 states and 140931 transitions. [2019-12-07 16:14:38,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:38,156 INFO L276 IsEmpty]: Start isEmpty. Operand 43370 states and 140931 transitions. [2019-12-07 16:14:38,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 16:14:38,163 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:38,163 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:38,163 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:38,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:38,163 INFO L82 PathProgramCache]: Analyzing trace with hash -2118250218, now seen corresponding path program 1 times [2019-12-07 16:14:38,163 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:38,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001327767] [2019-12-07 16:14:38,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:38,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:38,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:38,209 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001327767] [2019-12-07 16:14:38,209 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:38,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:38,209 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1143217163] [2019-12-07 16:14:38,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:38,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:38,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:38,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:38,210 INFO L87 Difference]: Start difference. First operand 43370 states and 140931 transitions. Second operand 5 states. [2019-12-07 16:14:38,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:38,628 INFO L93 Difference]: Finished difference Result 60212 states and 191098 transitions. [2019-12-07 16:14:38,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:14:38,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 16:14:38,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:38,720 INFO L225 Difference]: With dead ends: 60212 [2019-12-07 16:14:38,720 INFO L226 Difference]: Without dead ends: 60205 [2019-12-07 16:14:38,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:14:38,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60205 states. [2019-12-07 16:14:39,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60205 to 41889. [2019-12-07 16:14:39,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41889 states. [2019-12-07 16:14:39,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41889 states to 41889 states and 136198 transitions. [2019-12-07 16:14:39,790 INFO L78 Accepts]: Start accepts. Automaton has 41889 states and 136198 transitions. Word has length 22 [2019-12-07 16:14:39,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:39,790 INFO L462 AbstractCegarLoop]: Abstraction has 41889 states and 136198 transitions. [2019-12-07 16:14:39,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:39,790 INFO L276 IsEmpty]: Start isEmpty. Operand 41889 states and 136198 transitions. [2019-12-07 16:14:39,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:14:39,801 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:39,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:39,801 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:39,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:39,801 INFO L82 PathProgramCache]: Analyzing trace with hash 1701171988, now seen corresponding path program 1 times [2019-12-07 16:14:39,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:39,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109381043] [2019-12-07 16:14:39,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:39,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:39,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:39,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109381043] [2019-12-07 16:14:39,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:39,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:39,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [796034551] [2019-12-07 16:14:39,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:39,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:39,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:39,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:39,848 INFO L87 Difference]: Start difference. First operand 41889 states and 136198 transitions. Second operand 5 states. [2019-12-07 16:14:40,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:40,259 INFO L93 Difference]: Finished difference Result 59280 states and 188111 transitions. [2019-12-07 16:14:40,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:14:40,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 16:14:40,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:40,349 INFO L225 Difference]: With dead ends: 59280 [2019-12-07 16:14:40,350 INFO L226 Difference]: Without dead ends: 59267 [2019-12-07 16:14:40,350 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:40,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59267 states. [2019-12-07 16:14:41,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59267 to 49514. [2019-12-07 16:14:41,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49514 states. [2019-12-07 16:14:41,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49514 states to 49514 states and 160027 transitions. [2019-12-07 16:14:41,297 INFO L78 Accepts]: Start accepts. Automaton has 49514 states and 160027 transitions. Word has length 25 [2019-12-07 16:14:41,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:41,297 INFO L462 AbstractCegarLoop]: Abstraction has 49514 states and 160027 transitions. [2019-12-07 16:14:41,297 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:41,297 INFO L276 IsEmpty]: Start isEmpty. Operand 49514 states and 160027 transitions. [2019-12-07 16:14:41,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:14:41,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:41,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:41,314 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:41,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:41,314 INFO L82 PathProgramCache]: Analyzing trace with hash -735951720, now seen corresponding path program 1 times [2019-12-07 16:14:41,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:41,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146178704] [2019-12-07 16:14:41,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:41,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:41,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:41,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146178704] [2019-12-07 16:14:41,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:41,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:41,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [280986372] [2019-12-07 16:14:41,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:41,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:41,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:41,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:41,343 INFO L87 Difference]: Start difference. First operand 49514 states and 160027 transitions. Second operand 3 states. [2019-12-07 16:14:41,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:41,530 INFO L93 Difference]: Finished difference Result 63939 states and 198208 transitions. [2019-12-07 16:14:41,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:41,531 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 16:14:41,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:41,623 INFO L225 Difference]: With dead ends: 63939 [2019-12-07 16:14:41,623 INFO L226 Difference]: Without dead ends: 63939 [2019-12-07 16:14:41,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:41,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63939 states. [2019-12-07 16:14:42,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63939 to 49038. [2019-12-07 16:14:42,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49038 states. [2019-12-07 16:14:42,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49038 states to 49038 states and 151959 transitions. [2019-12-07 16:14:42,572 INFO L78 Accepts]: Start accepts. Automaton has 49038 states and 151959 transitions. Word has length 27 [2019-12-07 16:14:42,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:42,573 INFO L462 AbstractCegarLoop]: Abstraction has 49038 states and 151959 transitions. [2019-12-07 16:14:42,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:42,573 INFO L276 IsEmpty]: Start isEmpty. Operand 49038 states and 151959 transitions. [2019-12-07 16:14:42,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:14:42,586 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:42,587 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:42,587 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:42,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:42,587 INFO L82 PathProgramCache]: Analyzing trace with hash -963527987, now seen corresponding path program 1 times [2019-12-07 16:14:42,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:42,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422813775] [2019-12-07 16:14:42,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:42,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:42,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:42,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422813775] [2019-12-07 16:14:42,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:42,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:42,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207272117] [2019-12-07 16:14:42,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:42,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:42,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:42,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:42,635 INFO L87 Difference]: Start difference. First operand 49038 states and 151959 transitions. Second operand 5 states. [2019-12-07 16:14:42,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:42,964 INFO L93 Difference]: Finished difference Result 60471 states and 185646 transitions. [2019-12-07 16:14:42,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:14:42,964 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 16:14:42,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:43,051 INFO L225 Difference]: With dead ends: 60471 [2019-12-07 16:14:43,051 INFO L226 Difference]: Without dead ends: 60450 [2019-12-07 16:14:43,051 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:43,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60450 states. [2019-12-07 16:14:43,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60450 to 51228. [2019-12-07 16:14:43,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51228 states. [2019-12-07 16:14:43,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51228 states to 51228 states and 158640 transitions. [2019-12-07 16:14:43,982 INFO L78 Accepts]: Start accepts. Automaton has 51228 states and 158640 transitions. Word has length 27 [2019-12-07 16:14:43,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:43,982 INFO L462 AbstractCegarLoop]: Abstraction has 51228 states and 158640 transitions. [2019-12-07 16:14:43,982 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:43,982 INFO L276 IsEmpty]: Start isEmpty. Operand 51228 states and 158640 transitions. [2019-12-07 16:14:43,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 16:14:43,996 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:43,996 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:43,996 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:43,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:43,996 INFO L82 PathProgramCache]: Analyzing trace with hash 1072867226, now seen corresponding path program 1 times [2019-12-07 16:14:43,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:43,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241740144] [2019-12-07 16:14:43,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:44,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:44,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:44,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241740144] [2019-12-07 16:14:44,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:44,050 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:44,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375382633] [2019-12-07 16:14:44,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:44,051 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:44,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:44,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:44,051 INFO L87 Difference]: Start difference. First operand 51228 states and 158640 transitions. Second operand 5 states. [2019-12-07 16:14:44,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:44,467 INFO L93 Difference]: Finished difference Result 62332 states and 191201 transitions. [2019-12-07 16:14:44,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:14:44,468 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 16:14:44,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:44,553 INFO L225 Difference]: With dead ends: 62332 [2019-12-07 16:14:44,553 INFO L226 Difference]: Without dead ends: 62310 [2019-12-07 16:14:44,553 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:44,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62310 states. [2019-12-07 16:14:45,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62310 to 50997. [2019-12-07 16:14:45,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50997 states. [2019-12-07 16:14:45,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50997 states to 50997 states and 157840 transitions. [2019-12-07 16:14:45,482 INFO L78 Accepts]: Start accepts. Automaton has 50997 states and 157840 transitions. Word has length 28 [2019-12-07 16:14:45,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:45,482 INFO L462 AbstractCegarLoop]: Abstraction has 50997 states and 157840 transitions. [2019-12-07 16:14:45,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:45,482 INFO L276 IsEmpty]: Start isEmpty. Operand 50997 states and 157840 transitions. [2019-12-07 16:14:45,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 16:14:45,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:45,496 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:45,496 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:45,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:45,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1702632904, now seen corresponding path program 1 times [2019-12-07 16:14:45,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:45,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731960594] [2019-12-07 16:14:45,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:45,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:45,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:45,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731960594] [2019-12-07 16:14:45,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:45,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:45,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1065190148] [2019-12-07 16:14:45,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:14:45,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:45,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:14:45,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:45,526 INFO L87 Difference]: Start difference. First operand 50997 states and 157840 transitions. Second operand 4 states. [2019-12-07 16:14:45,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:45,582 INFO L93 Difference]: Finished difference Result 19999 states and 59320 transitions. [2019-12-07 16:14:45,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:14:45,583 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 16:14:45,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:45,605 INFO L225 Difference]: With dead ends: 19999 [2019-12-07 16:14:45,606 INFO L226 Difference]: Without dead ends: 19999 [2019-12-07 16:14:45,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:45,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19999 states. [2019-12-07 16:14:45,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19999 to 18858. [2019-12-07 16:14:45,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18858 states. [2019-12-07 16:14:45,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18858 states to 18858 states and 56004 transitions. [2019-12-07 16:14:45,887 INFO L78 Accepts]: Start accepts. Automaton has 18858 states and 56004 transitions. Word has length 29 [2019-12-07 16:14:45,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:45,888 INFO L462 AbstractCegarLoop]: Abstraction has 18858 states and 56004 transitions. [2019-12-07 16:14:45,888 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:45,888 INFO L276 IsEmpty]: Start isEmpty. Operand 18858 states and 56004 transitions. [2019-12-07 16:14:45,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 16:14:45,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:45,902 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:45,902 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:45,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:45,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1459957021, now seen corresponding path program 1 times [2019-12-07 16:14:45,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:45,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385372020] [2019-12-07 16:14:45,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:45,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:45,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:45,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385372020] [2019-12-07 16:14:45,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:45,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:14:45,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671378637] [2019-12-07 16:14:45,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:45,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:45,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:45,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:45,962 INFO L87 Difference]: Start difference. First operand 18858 states and 56004 transitions. Second operand 6 states. [2019-12-07 16:14:46,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:46,417 INFO L93 Difference]: Finished difference Result 23795 states and 69855 transitions. [2019-12-07 16:14:46,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:14:46,418 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 16:14:46,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:46,454 INFO L225 Difference]: With dead ends: 23795 [2019-12-07 16:14:46,454 INFO L226 Difference]: Without dead ends: 23795 [2019-12-07 16:14:46,455 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:14:46,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23795 states. [2019-12-07 16:14:46,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23795 to 19042. [2019-12-07 16:14:46,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19042 states. [2019-12-07 16:14:46,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19042 states to 19042 states and 56585 transitions. [2019-12-07 16:14:46,767 INFO L78 Accepts]: Start accepts. Automaton has 19042 states and 56585 transitions. Word has length 33 [2019-12-07 16:14:46,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:46,767 INFO L462 AbstractCegarLoop]: Abstraction has 19042 states and 56585 transitions. [2019-12-07 16:14:46,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:46,767 INFO L276 IsEmpty]: Start isEmpty. Operand 19042 states and 56585 transitions. [2019-12-07 16:14:46,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 16:14:46,782 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:46,782 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:46,782 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:46,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:46,782 INFO L82 PathProgramCache]: Analyzing trace with hash -1108508854, now seen corresponding path program 1 times [2019-12-07 16:14:46,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:46,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951390521] [2019-12-07 16:14:46,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:46,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:46,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:46,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951390521] [2019-12-07 16:14:46,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:46,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:14:46,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [464450427] [2019-12-07 16:14:46,890 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:46,890 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:46,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:46,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:46,890 INFO L87 Difference]: Start difference. First operand 19042 states and 56585 transitions. Second operand 6 states. [2019-12-07 16:14:47,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:47,305 INFO L93 Difference]: Finished difference Result 23301 states and 68430 transitions. [2019-12-07 16:14:47,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:14:47,306 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 16:14:47,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:47,331 INFO L225 Difference]: With dead ends: 23301 [2019-12-07 16:14:47,332 INFO L226 Difference]: Without dead ends: 23301 [2019-12-07 16:14:47,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:14:47,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23301 states. [2019-12-07 16:14:47,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23301 to 18309. [2019-12-07 16:14:47,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18309 states. [2019-12-07 16:14:47,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18309 states to 18309 states and 54421 transitions. [2019-12-07 16:14:47,633 INFO L78 Accepts]: Start accepts. Automaton has 18309 states and 54421 transitions. Word has length 34 [2019-12-07 16:14:47,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:47,633 INFO L462 AbstractCegarLoop]: Abstraction has 18309 states and 54421 transitions. [2019-12-07 16:14:47,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:47,633 INFO L276 IsEmpty]: Start isEmpty. Operand 18309 states and 54421 transitions. [2019-12-07 16:14:47,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:14:47,653 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:47,653 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:47,653 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:47,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:47,654 INFO L82 PathProgramCache]: Analyzing trace with hash -730896502, now seen corresponding path program 1 times [2019-12-07 16:14:47,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:47,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779447444] [2019-12-07 16:14:47,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:47,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:47,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:47,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779447444] [2019-12-07 16:14:47,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:47,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:14:47,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2001893088] [2019-12-07 16:14:47,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:47,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:47,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:47,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:47,700 INFO L87 Difference]: Start difference. First operand 18309 states and 54421 transitions. Second operand 5 states. [2019-12-07 16:14:48,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:48,088 INFO L93 Difference]: Finished difference Result 26303 states and 77426 transitions. [2019-12-07 16:14:48,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:14:48,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 16:14:48,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:48,119 INFO L225 Difference]: With dead ends: 26303 [2019-12-07 16:14:48,120 INFO L226 Difference]: Without dead ends: 26303 [2019-12-07 16:14:48,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:48,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26303 states. [2019-12-07 16:14:48,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26303 to 22358. [2019-12-07 16:14:48,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22358 states. [2019-12-07 16:14:48,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22358 states to 22358 states and 66604 transitions. [2019-12-07 16:14:48,475 INFO L78 Accepts]: Start accepts. Automaton has 22358 states and 66604 transitions. Word has length 40 [2019-12-07 16:14:48,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:48,475 INFO L462 AbstractCegarLoop]: Abstraction has 22358 states and 66604 transitions. [2019-12-07 16:14:48,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:48,475 INFO L276 IsEmpty]: Start isEmpty. Operand 22358 states and 66604 transitions. [2019-12-07 16:14:48,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 16:14:48,494 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:48,494 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:48,494 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:48,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:48,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1880616532, now seen corresponding path program 2 times [2019-12-07 16:14:48,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:48,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78189649] [2019-12-07 16:14:48,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:48,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:48,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:48,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78189649] [2019-12-07 16:14:48,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:48,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:14:48,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769972918] [2019-12-07 16:14:48,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:14:48,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:48,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:14:48,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:48,534 INFO L87 Difference]: Start difference. First operand 22358 states and 66604 transitions. Second operand 5 states. [2019-12-07 16:14:48,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:48,600 INFO L93 Difference]: Finished difference Result 20895 states and 63469 transitions. [2019-12-07 16:14:48,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:14:48,600 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 16:14:48,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:48,626 INFO L225 Difference]: With dead ends: 20895 [2019-12-07 16:14:48,626 INFO L226 Difference]: Without dead ends: 20895 [2019-12-07 16:14:48,626 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:48,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20895 states. [2019-12-07 16:14:48,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20895 to 19387. [2019-12-07 16:14:48,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19387 states. [2019-12-07 16:14:48,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19387 states to 19387 states and 59138 transitions. [2019-12-07 16:14:48,926 INFO L78 Accepts]: Start accepts. Automaton has 19387 states and 59138 transitions. Word has length 40 [2019-12-07 16:14:48,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:48,927 INFO L462 AbstractCegarLoop]: Abstraction has 19387 states and 59138 transitions. [2019-12-07 16:14:48,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:14:48,927 INFO L276 IsEmpty]: Start isEmpty. Operand 19387 states and 59138 transitions. [2019-12-07 16:14:48,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:14:48,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:48,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:48,945 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:48,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:48,945 INFO L82 PathProgramCache]: Analyzing trace with hash -1104102808, now seen corresponding path program 1 times [2019-12-07 16:14:48,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:48,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212091787] [2019-12-07 16:14:48,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:48,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:48,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:48,999 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212091787] [2019-12-07 16:14:48,999 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:49,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:49,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44594948] [2019-12-07 16:14:49,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:49,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:49,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:49,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:49,000 INFO L87 Difference]: Start difference. First operand 19387 states and 59138 transitions. Second operand 6 states. [2019-12-07 16:14:49,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:49,533 INFO L93 Difference]: Finished difference Result 25626 states and 77040 transitions. [2019-12-07 16:14:49,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:14:49,533 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 16:14:49,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:49,564 INFO L225 Difference]: With dead ends: 25626 [2019-12-07 16:14:49,564 INFO L226 Difference]: Without dead ends: 25626 [2019-12-07 16:14:49,564 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:14:49,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25626 states. [2019-12-07 16:14:49,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25626 to 20172. [2019-12-07 16:14:49,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20172 states. [2019-12-07 16:14:49,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20172 states to 20172 states and 61501 transitions. [2019-12-07 16:14:49,960 INFO L78 Accepts]: Start accepts. Automaton has 20172 states and 61501 transitions. Word has length 65 [2019-12-07 16:14:49,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:49,961 INFO L462 AbstractCegarLoop]: Abstraction has 20172 states and 61501 transitions. [2019-12-07 16:14:49,961 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:49,961 INFO L276 IsEmpty]: Start isEmpty. Operand 20172 states and 61501 transitions. [2019-12-07 16:14:49,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:14:49,977 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:49,977 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:49,978 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:49,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:49,978 INFO L82 PathProgramCache]: Analyzing trace with hash 982875086, now seen corresponding path program 2 times [2019-12-07 16:14:49,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:49,978 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145004424] [2019-12-07 16:14:49,978 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:49,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:50,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:50,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145004424] [2019-12-07 16:14:50,020 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:50,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:50,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476307368] [2019-12-07 16:14:50,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:50,020 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:50,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:50,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:50,021 INFO L87 Difference]: Start difference. First operand 20172 states and 61501 transitions. Second operand 3 states. [2019-12-07 16:14:50,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:50,107 INFO L93 Difference]: Finished difference Result 23651 states and 72289 transitions. [2019-12-07 16:14:50,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:50,107 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:14:50,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:50,135 INFO L225 Difference]: With dead ends: 23651 [2019-12-07 16:14:50,135 INFO L226 Difference]: Without dead ends: 23651 [2019-12-07 16:14:50,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:50,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23651 states. [2019-12-07 16:14:50,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23651 to 18096. [2019-12-07 16:14:50,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18096 states. [2019-12-07 16:14:50,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18096 states to 18096 states and 55782 transitions. [2019-12-07 16:14:50,440 INFO L78 Accepts]: Start accepts. Automaton has 18096 states and 55782 transitions. Word has length 65 [2019-12-07 16:14:50,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:50,441 INFO L462 AbstractCegarLoop]: Abstraction has 18096 states and 55782 transitions. [2019-12-07 16:14:50,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:50,441 INFO L276 IsEmpty]: Start isEmpty. Operand 18096 states and 55782 transitions. [2019-12-07 16:14:50,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:50,457 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:50,457 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:50,458 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:50,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:50,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1879963745, now seen corresponding path program 1 times [2019-12-07 16:14:50,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:50,458 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409966998] [2019-12-07 16:14:50,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:50,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:50,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:50,512 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409966998] [2019-12-07 16:14:50,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:50,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:50,512 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2063624010] [2019-12-07 16:14:50,512 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:14:50,512 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:50,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:14:50,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:14:50,512 INFO L87 Difference]: Start difference. First operand 18096 states and 55782 transitions. Second operand 6 states. [2019-12-07 16:14:51,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:51,024 INFO L93 Difference]: Finished difference Result 24967 states and 75472 transitions. [2019-12-07 16:14:51,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:14:51,024 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 16:14:51,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:51,054 INFO L225 Difference]: With dead ends: 24967 [2019-12-07 16:14:51,055 INFO L226 Difference]: Without dead ends: 24967 [2019-12-07 16:14:51,055 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:14:51,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24967 states. [2019-12-07 16:14:51,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24967 to 17903. [2019-12-07 16:14:51,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17903 states. [2019-12-07 16:14:51,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17903 states to 17903 states and 55278 transitions. [2019-12-07 16:14:51,374 INFO L78 Accepts]: Start accepts. Automaton has 17903 states and 55278 transitions. Word has length 66 [2019-12-07 16:14:51,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:51,375 INFO L462 AbstractCegarLoop]: Abstraction has 17903 states and 55278 transitions. [2019-12-07 16:14:51,375 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:14:51,375 INFO L276 IsEmpty]: Start isEmpty. Operand 17903 states and 55278 transitions. [2019-12-07 16:14:51,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:51,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:51,391 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:51,391 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:51,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:51,391 INFO L82 PathProgramCache]: Analyzing trace with hash 1192905868, now seen corresponding path program 1 times [2019-12-07 16:14:51,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:51,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752980589] [2019-12-07 16:14:51,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:51,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:51,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:51,451 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752980589] [2019-12-07 16:14:51,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:51,451 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:14:51,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166384589] [2019-12-07 16:14:51,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:14:51,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:51,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:14:51,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:51,452 INFO L87 Difference]: Start difference. First operand 17903 states and 55278 transitions. Second operand 7 states. [2019-12-07 16:14:52,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:52,201 INFO L93 Difference]: Finished difference Result 25954 states and 78340 transitions. [2019-12-07 16:14:52,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 16:14:52,201 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 16:14:52,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:52,230 INFO L225 Difference]: With dead ends: 25954 [2019-12-07 16:14:52,230 INFO L226 Difference]: Without dead ends: 25954 [2019-12-07 16:14:52,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2019-12-07 16:14:52,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25954 states. [2019-12-07 16:14:52,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25954 to 18081. [2019-12-07 16:14:52,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18081 states. [2019-12-07 16:14:52,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18081 states to 18081 states and 55811 transitions. [2019-12-07 16:14:52,545 INFO L78 Accepts]: Start accepts. Automaton has 18081 states and 55811 transitions. Word has length 66 [2019-12-07 16:14:52,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:52,545 INFO L462 AbstractCegarLoop]: Abstraction has 18081 states and 55811 transitions. [2019-12-07 16:14:52,545 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:14:52,545 INFO L276 IsEmpty]: Start isEmpty. Operand 18081 states and 55811 transitions. [2019-12-07 16:14:52,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:52,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:52,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:52,560 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:52,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:52,561 INFO L82 PathProgramCache]: Analyzing trace with hash -1400647699, now seen corresponding path program 2 times [2019-12-07 16:14:52,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:52,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619478081] [2019-12-07 16:14:52,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:52,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:52,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:52,605 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619478081] [2019-12-07 16:14:52,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:52,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:14:52,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [889132078] [2019-12-07 16:14:52,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:14:52,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:52,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:14:52,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:14:52,606 INFO L87 Difference]: Start difference. First operand 18081 states and 55811 transitions. Second operand 4 states. [2019-12-07 16:14:52,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:52,700 INFO L93 Difference]: Finished difference Result 17865 states and 54923 transitions. [2019-12-07 16:14:52,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:14:52,701 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 16:14:52,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:52,723 INFO L225 Difference]: With dead ends: 17865 [2019-12-07 16:14:52,723 INFO L226 Difference]: Without dead ends: 17865 [2019-12-07 16:14:52,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:14:52,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17865 states. [2019-12-07 16:14:52,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17865 to 15664. [2019-12-07 16:14:52,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15664 states. [2019-12-07 16:14:52,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15664 states to 15664 states and 48124 transitions. [2019-12-07 16:14:52,977 INFO L78 Accepts]: Start accepts. Automaton has 15664 states and 48124 transitions. Word has length 66 [2019-12-07 16:14:52,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:52,977 INFO L462 AbstractCegarLoop]: Abstraction has 15664 states and 48124 transitions. [2019-12-07 16:14:52,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:14:52,977 INFO L276 IsEmpty]: Start isEmpty. Operand 15664 states and 48124 transitions. [2019-12-07 16:14:52,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:52,991 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:52,992 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:52,992 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:52,992 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:52,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1744017498, now seen corresponding path program 2 times [2019-12-07 16:14:52,992 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:52,992 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1752774263] [2019-12-07 16:14:52,992 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:53,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:53,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:53,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1752774263] [2019-12-07 16:14:53,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:53,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:14:53,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645100619] [2019-12-07 16:14:53,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 16:14:53,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:53,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 16:14:53,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:14:53,059 INFO L87 Difference]: Start difference. First operand 15664 states and 48124 transitions. Second operand 7 states. [2019-12-07 16:14:53,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:53,364 INFO L93 Difference]: Finished difference Result 43290 states and 131130 transitions. [2019-12-07 16:14:53,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 16:14:53,364 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 16:14:53,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:53,404 INFO L225 Difference]: With dead ends: 43290 [2019-12-07 16:14:53,404 INFO L226 Difference]: Without dead ends: 33996 [2019-12-07 16:14:53,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 16:14:53,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33996 states. [2019-12-07 16:14:53,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33996 to 19202. [2019-12-07 16:14:53,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19202 states. [2019-12-07 16:14:53,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19202 states to 19202 states and 59144 transitions. [2019-12-07 16:14:53,793 INFO L78 Accepts]: Start accepts. Automaton has 19202 states and 59144 transitions. Word has length 66 [2019-12-07 16:14:53,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:53,793 INFO L462 AbstractCegarLoop]: Abstraction has 19202 states and 59144 transitions. [2019-12-07 16:14:53,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 16:14:53,793 INFO L276 IsEmpty]: Start isEmpty. Operand 19202 states and 59144 transitions. [2019-12-07 16:14:53,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:53,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:53,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:53,810 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:53,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:53,810 INFO L82 PathProgramCache]: Analyzing trace with hash 1399873038, now seen corresponding path program 3 times [2019-12-07 16:14:53,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:53,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168647480] [2019-12-07 16:14:53,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:53,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:53,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:53,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168647480] [2019-12-07 16:14:53,997 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:53,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:14:53,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1806107487] [2019-12-07 16:14:53,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:14:53,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:53,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:14:53,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=131, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:14:53,997 INFO L87 Difference]: Start difference. First operand 19202 states and 59144 transitions. Second operand 13 states. [2019-12-07 16:14:54,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:54,671 INFO L93 Difference]: Finished difference Result 27177 states and 81726 transitions. [2019-12-07 16:14:54,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 16:14:54,671 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 66 [2019-12-07 16:14:54,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:54,700 INFO L225 Difference]: With dead ends: 27177 [2019-12-07 16:14:54,700 INFO L226 Difference]: Without dead ends: 23949 [2019-12-07 16:14:54,701 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=458, Unknown=0, NotChecked=0, Total=552 [2019-12-07 16:14:54,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23949 states. [2019-12-07 16:14:54,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23949 to 20427. [2019-12-07 16:14:54,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20427 states. [2019-12-07 16:14:55,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20427 states to 20427 states and 62125 transitions. [2019-12-07 16:14:55,023 INFO L78 Accepts]: Start accepts. Automaton has 20427 states and 62125 transitions. Word has length 66 [2019-12-07 16:14:55,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:55,024 INFO L462 AbstractCegarLoop]: Abstraction has 20427 states and 62125 transitions. [2019-12-07 16:14:55,024 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:14:55,024 INFO L276 IsEmpty]: Start isEmpty. Operand 20427 states and 62125 transitions. [2019-12-07 16:14:55,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:14:55,044 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:55,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:55,044 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:55,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:55,044 INFO L82 PathProgramCache]: Analyzing trace with hash -205645456, now seen corresponding path program 4 times [2019-12-07 16:14:55,044 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:55,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1596943908] [2019-12-07 16:14:55,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:55,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:55,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:55,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1596943908] [2019-12-07 16:14:55,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:55,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:14:55,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28048286] [2019-12-07 16:14:55,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:14:55,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:55,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:14:55,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:55,089 INFO L87 Difference]: Start difference. First operand 20427 states and 62125 transitions. Second operand 3 states. [2019-12-07 16:14:55,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:55,140 INFO L93 Difference]: Finished difference Result 16981 states and 50649 transitions. [2019-12-07 16:14:55,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:14:55,140 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:14:55,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:55,159 INFO L225 Difference]: With dead ends: 16981 [2019-12-07 16:14:55,159 INFO L226 Difference]: Without dead ends: 16981 [2019-12-07 16:14:55,160 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:14:55,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16981 states. [2019-12-07 16:14:55,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16981 to 14937. [2019-12-07 16:14:55,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14937 states. [2019-12-07 16:14:55,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14937 states to 14937 states and 44490 transitions. [2019-12-07 16:14:55,394 INFO L78 Accepts]: Start accepts. Automaton has 14937 states and 44490 transitions. Word has length 66 [2019-12-07 16:14:55,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:55,394 INFO L462 AbstractCegarLoop]: Abstraction has 14937 states and 44490 transitions. [2019-12-07 16:14:55,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:14:55,395 INFO L276 IsEmpty]: Start isEmpty. Operand 14937 states and 44490 transitions. [2019-12-07 16:14:55,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:14:55,408 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:55,408 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:55,408 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:55,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:55,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1509100091, now seen corresponding path program 1 times [2019-12-07 16:14:55,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:55,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669717656] [2019-12-07 16:14:55,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:55,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:14:55,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:14:55,530 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669717656] [2019-12-07 16:14:55,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:14:55,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 16:14:55,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840411253] [2019-12-07 16:14:55,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:14:55,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 16:14:55,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:14:55,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:14:55,532 INFO L87 Difference]: Start difference. First operand 14937 states and 44490 transitions. Second operand 11 states. [2019-12-07 16:14:56,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:14:56,335 INFO L93 Difference]: Finished difference Result 41312 states and 122315 transitions. [2019-12-07 16:14:56,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 16:14:56,335 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 16:14:56,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:14:56,365 INFO L225 Difference]: With dead ends: 41312 [2019-12-07 16:14:56,365 INFO L226 Difference]: Without dead ends: 26358 [2019-12-07 16:14:56,366 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 412 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=291, Invalid=1269, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 16:14:56,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26358 states. [2019-12-07 16:14:56,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26358 to 15185. [2019-12-07 16:14:56,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15185 states. [2019-12-07 16:14:56,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15185 states to 15185 states and 44999 transitions. [2019-12-07 16:14:56,694 INFO L78 Accepts]: Start accepts. Automaton has 15185 states and 44999 transitions. Word has length 67 [2019-12-07 16:14:56,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:14:56,694 INFO L462 AbstractCegarLoop]: Abstraction has 15185 states and 44999 transitions. [2019-12-07 16:14:56,694 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:14:56,694 INFO L276 IsEmpty]: Start isEmpty. Operand 15185 states and 44999 transitions. [2019-12-07 16:14:56,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:14:56,707 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:14:56,707 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:14:56,707 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:14:56,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:14:56,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1209104993, now seen corresponding path program 2 times [2019-12-07 16:14:56,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 16:14:56,708 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060655146] [2019-12-07 16:14:56,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:14:56,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:14:56,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:14:56,792 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 16:14:56,792 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:14:56,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_69| 0 0))) (and (= v_~a$w_buff0~0_303 0) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~__unbuffered_p2_EBX~0_46 0) (= v_~z~0_13 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t919~0.base_30|) 0) (= |v_#NULL.offset_7| 0) (= v_~a~0_199 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd2~0_205) (= |v_ULTIMATE.start_main_~#t919~0.offset_22| 0) (= v_~a$r_buff0_thd3~0_412 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~a$read_delayed~0_7) (= v_~a$read_delayed_var~0.offset_7 0) (= v_~y~0_30 0) (= v_~a$r_buff1_thd3~0_326 0) (= v_~main$tmp_guard0~0_25 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t919~0.base_30| 4)) (= 0 v_~__unbuffered_cnt~0_83) (< 0 |v_#StackHeapBarrier_16|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t919~0.base_30|) (= 0 v_~a$w_buff1_used~0_450) (= 0 v_~__unbuffered_p0_EAX~0_159) (= |v_#valid_67| (store .cse0 |v_ULTIMATE.start_main_~#t919~0.base_30| 1)) (= v_~a$flush_delayed~0_27 0) (= 0 v_~a$r_buff1_thd2~0_197) (= v_~a$mem_tmp~0_16 0) (= v_~main$tmp_guard1~0_32 0) (= 0 |v_#NULL.base_7|) (= 0 v_~a$r_buff1_thd1~0_190) (= v_~a$r_buff1_thd0~0_208 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t919~0.base_30| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t919~0.base_30|) |v_ULTIMATE.start_main_~#t919~0.offset_22| 0)) |v_#memory_int_19|) (= 0 v_~x~0_153) (= 0 v_~a$w_buff1~0_206) (= 0 v_~a$r_buff0_thd1~0_334) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~a$r_buff0_thd0~0_214 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~a$w_buff0_used~0_788))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_197, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_53|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_53|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_214, ULTIMATE.start_main_~#t919~0.offset=|v_ULTIMATE.start_main_~#t919~0.offset_22|, ULTIMATE.start_main_~#t921~0.offset=|v_ULTIMATE.start_main_~#t921~0.offset_13|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_33|, ~a~0=v_~a~0_199, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_159, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_326, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_788, ULTIMATE.start_main_~#t920~0.base=|v_ULTIMATE.start_main_~#t920~0.base_23|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_334, ULTIMATE.start_main_~#t919~0.base=|v_ULTIMATE.start_main_~#t919~0.base_30|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_303, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_208, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x~0=v_~x~0_153, ULTIMATE.start_main_~#t920~0.offset=|v_ULTIMATE.start_main_~#t920~0.offset_17|, ULTIMATE.start_main_~#t921~0.base=|v_ULTIMATE.start_main_~#t921~0.base_15|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_79|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_206, ~y~0=v_~y~0_30, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_190, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_412, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_450, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t919~0.offset, ULTIMATE.start_main_~#t921~0.offset, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ULTIMATE.start_main_~#t920~0.base, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t919~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t920~0.offset, ULTIMATE.start_main_~#t921~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 16:14:56,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L750: Formula: (and (= ~a$r_buff1_thd3~0_Out-763739491 ~a$r_buff0_thd3~0_In-763739491) (= ~a$r_buff1_thd0~0_Out-763739491 ~a$r_buff0_thd0~0_In-763739491) (= ~__unbuffered_p0_EAX~0_Out-763739491 ~x~0_In-763739491) (= 1 ~a$r_buff0_thd1~0_Out-763739491) (= ~a$r_buff0_thd2~0_In-763739491 ~a$r_buff1_thd2~0_Out-763739491) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491)) (= ~a$r_buff0_thd1~0_In-763739491 ~a$r_buff1_thd1~0_Out-763739491)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-763739491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-763739491, ~x~0=~x~0_In-763739491} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-763739491, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-763739491, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-763739491, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-763739491, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-763739491, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-763739491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-763739491, ~x~0=~x~0_In-763739491} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:14:56,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L832-1-->L834: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t920~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t920~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t920~0.base_11|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t920~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t920~0.base_11|) |v_ULTIMATE.start_main_~#t920~0.offset_10| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t920~0.offset_10|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t920~0.base_11| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t920~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t920~0.base=|v_ULTIMATE.start_main_~#t920~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t920~0.offset=|v_ULTIMATE.start_main_~#t920~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t920~0.base, #length, ULTIMATE.start_main_~#t920~0.offset] because there is no mapped edge [2019-12-07 16:14:56,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L834-1-->L836: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t921~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t921~0.offset_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t921~0.base_11| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t921~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t921~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t921~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t921~0.base_11|) |v_ULTIMATE.start_main_~#t921~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t921~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t921~0.base=|v_ULTIMATE.start_main_~#t921~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t921~0.offset=|v_ULTIMATE.start_main_~#t921~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t921~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t921~0.offset] because there is no mapped edge [2019-12-07 16:14:56,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L770-2-->L770-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-844131025 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-844131025 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-844131025| ~a$w_buff1~0_In-844131025) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-844131025| ~a~0_In-844131025)))) InVars {~a~0=~a~0_In-844131025, ~a$w_buff1~0=~a$w_buff1~0_In-844131025, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-844131025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-844131025} OutVars{~a~0=~a~0_In-844131025, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-844131025|, ~a$w_buff1~0=~a$w_buff1~0_In-844131025, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-844131025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-844131025} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:14:56,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L770-4-->L771: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_28| v_~a~0_66) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_28|} OutVars{~a~0=v_~a~0_66, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_27|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_41|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:14:56,798 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-237946391 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-237946391 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-237946391| ~a$w_buff0_used~0_In-237946391) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-237946391|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-237946391, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-237946391} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-237946391, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-237946391, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-237946391|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:14:56,798 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L772-->L772-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1294532941 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1294532941 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1294532941 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1294532941 256)))) (or (and (= ~a$w_buff1_used~0_In-1294532941 |P1Thread1of1ForFork2_#t~ite12_Out-1294532941|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1294532941|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1294532941, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1294532941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1294532941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1294532941} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1294532941, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1294532941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1294532941, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1294532941|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1294532941} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:14:56,798 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-885664710 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-885664710 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-885664710| 0)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-885664710 |P1Thread1of1ForFork2_#t~ite13_Out-885664710|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-885664710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-885664710} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-885664710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-885664710, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-885664710|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:14:56,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-949988016 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-949988016 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-949988016 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-949988016 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-949988016|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-949988016| ~a$r_buff1_thd2~0_In-949988016) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-949988016, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-949988016, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-949988016, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-949988016} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-949988016, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-949988016, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-949988016, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-949988016, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-949988016|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:14:56,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L774-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_51) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:14:56,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1982259744 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1982259744 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1982259744|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1982259744 |P0Thread1of1ForFork1_#t~ite5_Out1982259744|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1982259744, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982259744} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1982259744|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1982259744, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982259744} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:14:56,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1776576061 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-1776576061 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1776576061 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1776576061 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1776576061| ~a$w_buff1_used~0_In-1776576061)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1776576061| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1776576061, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1776576061, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1776576061, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1776576061} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1776576061|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1776576061, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1776576061, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1776576061, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1776576061} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:14:56,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-183153968 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-183153968 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-183153968 ~a$r_buff0_thd1~0_In-183153968))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-183153968 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-183153968, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-183153968} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-183153968|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183153968, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-183153968} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:14:56,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In1566620036 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1566620036 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In1566620036 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1566620036 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1566620036| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1566620036| ~a$r_buff1_thd1~0_In1566620036) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1566620036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566620036, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566620036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1566620036} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1566620036|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1566620036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566620036, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566620036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1566620036} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:14:56,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L754-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_87 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_87, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:14:56,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1150389372 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1150389372| |P2Thread1of1ForFork0_#t~ite30_Out-1150389372|) (= |P2Thread1of1ForFork0_#t~ite29_Out-1150389372| ~a$w_buff1_used~0_In-1150389372) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1150389372 256)))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-1150389372 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1150389372 256))) (= 0 (mod ~a$w_buff0_used~0_In-1150389372 256))))) (and (= |P2Thread1of1ForFork0_#t~ite30_Out-1150389372| ~a$w_buff1_used~0_In-1150389372) (= |P2Thread1of1ForFork0_#t~ite29_In-1150389372| |P2Thread1of1ForFork0_#t~ite29_Out-1150389372|) (not .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1150389372, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1150389372, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1150389372, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1150389372, ~weak$$choice2~0=~weak$$choice2~0_In-1150389372, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1150389372|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1150389372, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1150389372, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1150389372, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1150389372, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1150389372|, ~weak$$choice2~0=~weak$$choice2~0_In-1150389372, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1150389372|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:14:56,803 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~a$r_buff0_thd3~0_66 v_~a$r_buff0_thd3~0_65)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_65, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:14:56,804 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L805-->L809: Formula: (and (= v_~a$flush_delayed~0_11 0) (= v_~a~0_48 v_~a$mem_tmp~0_5) (not (= (mod v_~a$flush_delayed~0_12 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_11} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:14:56,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L809-2-->L809-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In439626548 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In439626548 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out439626548| ~a$w_buff1~0_In439626548)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out439626548| ~a~0_In439626548) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In439626548, ~a$w_buff1~0=~a$w_buff1~0_In439626548, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In439626548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In439626548} OutVars{~a~0=~a~0_In439626548, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out439626548|, ~a$w_buff1~0=~a$w_buff1~0_In439626548, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In439626548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In439626548} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:14:56,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L809-4-->L810: Formula: (= v_~a~0_37 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{~a~0=v_~a~0_37, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:14:56,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-921163490 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-921163490 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-921163490| 0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-921163490 |P2Thread1of1ForFork0_#t~ite40_Out-921163490|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-921163490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-921163490} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-921163490|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-921163490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-921163490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:14:56,805 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1435793214 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1435793214 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1435793214 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1435793214 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1435793214|)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1435793214| ~a$w_buff1_used~0_In-1435793214) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1435793214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1435793214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1435793214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1435793214} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1435793214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1435793214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1435793214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1435793214, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1435793214|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:14:56,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-977940874 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-977940874 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-977940874| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-977940874| ~a$r_buff0_thd3~0_In-977940874)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-977940874, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977940874} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-977940874, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977940874, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-977940874|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:14:56,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L813-->L813-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1739963601 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1739963601 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-1739963601 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1739963601 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite43_Out-1739963601| ~a$r_buff1_thd3~0_In-1739963601)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1739963601| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1739963601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1739963601, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1739963601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1739963601} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1739963601|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1739963601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1739963601, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1739963601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1739963601} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:14:56,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L813-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_201 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_201, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:14:56,806 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:14:56,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L842-2-->L842-5: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-386699446 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-386699446 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-386699446| |ULTIMATE.start_main_#t~ite48_Out-386699446|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-386699446| ~a~0_In-386699446)) (and (= |ULTIMATE.start_main_#t~ite47_Out-386699446| ~a$w_buff1~0_In-386699446) (not .cse1) (not .cse0) .cse2))) InVars {~a~0=~a~0_In-386699446, ~a$w_buff1~0=~a$w_buff1~0_In-386699446, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-386699446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-386699446} OutVars{~a~0=~a~0_In-386699446, ~a$w_buff1~0=~a$w_buff1~0_In-386699446, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-386699446|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-386699446, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-386699446|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-386699446} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:14:56,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In2048669462 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In2048669462 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out2048669462|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out2048669462| ~a$w_buff0_used~0_In2048669462) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2048669462, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2048669462} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2048669462, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2048669462|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2048669462} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:14:56,807 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In125168192 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In125168192 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In125168192 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In125168192 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out125168192| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In125168192 |ULTIMATE.start_main_#t~ite50_Out125168192|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In125168192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In125168192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In125168192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In125168192} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out125168192|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In125168192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In125168192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In125168192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In125168192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:14:56,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L845-->L845-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1896129861 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1896129861 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1896129861| 0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-1896129861| ~a$r_buff0_thd0~0_In-1896129861) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1896129861, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1896129861} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1896129861|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1896129861, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1896129861} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:14:56,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In281274050 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In281274050 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In281274050 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In281274050 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out281274050| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out281274050| ~a$r_buff1_thd0~0_In281274050)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281274050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In281274050, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In281274050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281274050} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out281274050|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281274050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In281274050, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In281274050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281274050} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:14:56,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~a$r_buff1_thd0~0_170 |v_ULTIMATE.start_main_#t~ite52_39|) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_32 0) (= 1 v_~__unbuffered_p2_EAX~0_21) (= 0 v_~__unbuffered_p0_EAX~0_128))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_170, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:14:56,859 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:14:56 BasicIcfg [2019-12-07 16:14:56,859 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:14:56,859 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:14:56,859 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:14:56,859 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:14:56,860 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:12:28" (3/4) ... [2019-12-07 16:14:56,861 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:14:56,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [900] [900] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_69| 0 0))) (and (= v_~a$w_buff0~0_303 0) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~__unbuffered_p2_EBX~0_46 0) (= v_~z~0_13 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t919~0.base_30|) 0) (= |v_#NULL.offset_7| 0) (= v_~a~0_199 0) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$r_buff0_thd2~0_205) (= |v_ULTIMATE.start_main_~#t919~0.offset_22| 0) (= v_~a$r_buff0_thd3~0_412 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~a$read_delayed~0_7) (= v_~a$read_delayed_var~0.offset_7 0) (= v_~y~0_30 0) (= v_~a$r_buff1_thd3~0_326 0) (= v_~main$tmp_guard0~0_25 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t919~0.base_30| 4)) (= 0 v_~__unbuffered_cnt~0_83) (< 0 |v_#StackHeapBarrier_16|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t919~0.base_30|) (= 0 v_~a$w_buff1_used~0_450) (= 0 v_~__unbuffered_p0_EAX~0_159) (= |v_#valid_67| (store .cse0 |v_ULTIMATE.start_main_~#t919~0.base_30| 1)) (= v_~a$flush_delayed~0_27 0) (= 0 v_~a$r_buff1_thd2~0_197) (= v_~a$mem_tmp~0_16 0) (= v_~main$tmp_guard1~0_32 0) (= 0 |v_#NULL.base_7|) (= 0 v_~a$r_buff1_thd1~0_190) (= v_~a$r_buff1_thd0~0_208 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t919~0.base_30| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t919~0.base_30|) |v_ULTIMATE.start_main_~#t919~0.offset_22| 0)) |v_#memory_int_19|) (= 0 v_~x~0_153) (= 0 v_~a$w_buff1~0_206) (= 0 v_~a$r_buff0_thd1~0_334) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~a$r_buff0_thd0~0_214 0) (= 0 v_~weak$$choice0~0_13) (= 0 v_~a$w_buff0_used~0_788))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_197, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_53|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_53|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_214, ULTIMATE.start_main_~#t919~0.offset=|v_ULTIMATE.start_main_~#t919~0.offset_22|, ULTIMATE.start_main_~#t921~0.offset=|v_ULTIMATE.start_main_~#t921~0.offset_13|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_33|, ~a~0=v_~a~0_199, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_159, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_46, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_326, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_788, ULTIMATE.start_main_~#t920~0.base=|v_ULTIMATE.start_main_~#t920~0.base_23|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_334, ULTIMATE.start_main_~#t919~0.base=|v_ULTIMATE.start_main_~#t919~0.base_30|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_303, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_208, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, ~x~0=v_~x~0_153, ULTIMATE.start_main_~#t920~0.offset=|v_ULTIMATE.start_main_~#t920~0.offset_17|, ULTIMATE.start_main_~#t921~0.base=|v_ULTIMATE.start_main_~#t921~0.base_15|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_205, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_79|, ~a$mem_tmp~0=v_~a$mem_tmp~0_16, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_45|, ~a$w_buff1~0=v_~a$w_buff1~0_206, ~y~0=v_~y~0_30, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_190, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_412, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_25, #NULL.base=|v_#NULL.base_7|, ~a$flush_delayed~0=v_~a$flush_delayed~0_27, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_67|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_450, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_~#t919~0.offset, ULTIMATE.start_main_~#t921~0.offset, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ULTIMATE.start_main_~#t920~0.base, ~a$r_buff0_thd1~0, ULTIMATE.start_main_~#t919~0.base, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t920~0.offset, ULTIMATE.start_main_~#t921~0.base, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 16:14:56,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L4-->L750: Formula: (and (= ~a$r_buff1_thd3~0_Out-763739491 ~a$r_buff0_thd3~0_In-763739491) (= ~a$r_buff1_thd0~0_Out-763739491 ~a$r_buff0_thd0~0_In-763739491) (= ~__unbuffered_p0_EAX~0_Out-763739491 ~x~0_In-763739491) (= 1 ~a$r_buff0_thd1~0_Out-763739491) (= ~a$r_buff0_thd2~0_In-763739491 ~a$r_buff1_thd2~0_Out-763739491) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491)) (= ~a$r_buff0_thd1~0_In-763739491 ~a$r_buff1_thd1~0_Out-763739491)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-763739491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-763739491, ~x~0=~x~0_In-763739491} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-763739491, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out-763739491, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out-763739491, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out-763739491, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-763739491, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out-763739491, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-763739491, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-763739491, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-763739491, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-763739491, ~x~0=~x~0_In-763739491} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:14:56,862 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L832-1-->L834: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t920~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t920~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t920~0.base_11|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t920~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t920~0.base_11|) |v_ULTIMATE.start_main_~#t920~0.offset_10| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t920~0.offset_10|) (= |v_#valid_41| (store |v_#valid_42| |v_ULTIMATE.start_main_~#t920~0.base_11| 1)) (= 0 (select |v_#valid_42| |v_ULTIMATE.start_main_~#t920~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t920~0.base=|v_ULTIMATE.start_main_~#t920~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t920~0.offset=|v_ULTIMATE.start_main_~#t920~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t920~0.base, #length, ULTIMATE.start_main_~#t920~0.offset] because there is no mapped edge [2019-12-07 16:14:56,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] L834-1-->L836: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t921~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t921~0.offset_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t921~0.base_11| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t921~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t921~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t921~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t921~0.base_11|) |v_ULTIMATE.start_main_~#t921~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t921~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t921~0.base=|v_ULTIMATE.start_main_~#t921~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t921~0.offset=|v_ULTIMATE.start_main_~#t921~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t921~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length, ULTIMATE.start_main_~#t921~0.offset] because there is no mapped edge [2019-12-07 16:14:56,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L770-2-->L770-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-844131025 256) 0)) (.cse0 (= 0 (mod ~a$r_buff1_thd2~0_In-844131025 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-844131025| ~a$w_buff1~0_In-844131025) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-844131025| ~a~0_In-844131025)))) InVars {~a~0=~a~0_In-844131025, ~a$w_buff1~0=~a$w_buff1~0_In-844131025, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-844131025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-844131025} OutVars{~a~0=~a~0_In-844131025, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-844131025|, ~a$w_buff1~0=~a$w_buff1~0_In-844131025, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-844131025, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-844131025} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 16:14:56,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L770-4-->L771: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_28| v_~a~0_66) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_28|} OutVars{~a~0=v_~a~0_66, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_27|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_41|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 16:14:56,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In-237946391 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-237946391 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out-237946391| ~a$w_buff0_used~0_In-237946391) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-237946391|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-237946391, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-237946391} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-237946391, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-237946391, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-237946391|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 16:14:56,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L772-->L772-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd2~0_In-1294532941 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1294532941 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd2~0_In-1294532941 256) 0)) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In-1294532941 256)))) (or (and (= ~a$w_buff1_used~0_In-1294532941 |P1Thread1of1ForFork2_#t~ite12_Out-1294532941|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1294532941|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1294532941, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1294532941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1294532941, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1294532941} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1294532941, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1294532941, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1294532941, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1294532941|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1294532941} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 16:14:56,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L773-->L773-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-885664710 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd2~0_In-885664710 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-885664710| 0)) (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-885664710 |P1Thread1of1ForFork2_#t~ite13_Out-885664710|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-885664710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-885664710} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-885664710, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-885664710, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-885664710|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 16:14:56,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L774-->L774-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-949988016 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-949988016 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-949988016 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-949988016 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-949988016|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork2_#t~ite14_Out-949988016| ~a$r_buff1_thd2~0_In-949988016) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-949988016, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-949988016, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-949988016, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-949988016} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-949988016, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-949988016, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-949988016, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-949988016, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-949988016|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 16:14:56,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L774-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_22| v_~a$r_buff1_thd2~0_51) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_22|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_51, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_21|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 16:14:56,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1982259744 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd1~0_In1982259744 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1982259744|) (not .cse1)) (and (= ~a$w_buff0_used~0_In1982259744 |P0Thread1of1ForFork1_#t~ite5_Out1982259744|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1982259744, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982259744} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1982259744|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1982259744, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1982259744} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 16:14:56,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1776576061 256))) (.cse1 (= (mod ~a$r_buff1_thd1~0_In-1776576061 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-1776576061 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In-1776576061 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-1776576061| ~a$w_buff1_used~0_In-1776576061)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out-1776576061| 0)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1776576061, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1776576061, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1776576061, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1776576061} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1776576061|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1776576061, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1776576061, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1776576061, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1776576061} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 16:14:56,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-183153968 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-183153968 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-183153968 ~a$r_buff0_thd1~0_In-183153968))) (or (and (not .cse0) (not .cse1) (= ~a$r_buff0_thd1~0_Out-183153968 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-183153968, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-183153968} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-183153968|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-183153968, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-183153968} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:14:56,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~a$r_buff1_thd1~0_In1566620036 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In1566620036 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd1~0_In1566620036 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1566620036 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1566620036| 0)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1566620036| ~a$r_buff1_thd1~0_In1566620036) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1566620036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566620036, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566620036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1566620036} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1566620036|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1566620036, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566620036, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566620036, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1566620036} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 16:14:56,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L754-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_87 |v_P0Thread1of1ForFork1_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_35|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_87, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:14:56,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1150389372 256)))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite29_Out-1150389372| |P2Thread1of1ForFork0_#t~ite30_Out-1150389372|) (= |P2Thread1of1ForFork0_#t~ite29_Out-1150389372| ~a$w_buff1_used~0_In-1150389372) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1150389372 256)))) (or (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-1150389372 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1150389372 256))) (= 0 (mod ~a$w_buff0_used~0_In-1150389372 256))))) (and (= |P2Thread1of1ForFork0_#t~ite30_Out-1150389372| ~a$w_buff1_used~0_In-1150389372) (= |P2Thread1of1ForFork0_#t~ite29_In-1150389372| |P2Thread1of1ForFork0_#t~ite29_Out-1150389372|) (not .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1150389372, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1150389372, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1150389372, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1150389372, ~weak$$choice2~0=~weak$$choice2~0_In-1150389372, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1150389372|} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1150389372, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1150389372, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1150389372, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1150389372, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1150389372|, ~weak$$choice2~0=~weak$$choice2~0_In-1150389372, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1150389372|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 16:14:56,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~a$r_buff0_thd3~0_66 v_~a$r_buff0_thd3~0_65)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_66, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_65, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 16:14:56,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L805-->L809: Formula: (and (= v_~a$flush_delayed~0_11 0) (= v_~a~0_48 v_~a$mem_tmp~0_5) (not (= (mod v_~a$flush_delayed~0_12 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~a~0=v_~a~0_48, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_11} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 16:14:56,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L809-2-->L809-4: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In439626548 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In439626548 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out439626548| ~a$w_buff1~0_In439626548)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out439626548| ~a~0_In439626548) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In439626548, ~a$w_buff1~0=~a$w_buff1~0_In439626548, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In439626548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In439626548} OutVars{~a~0=~a~0_In439626548, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out439626548|, ~a$w_buff1~0=~a$w_buff1~0_In439626548, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In439626548, ~a$w_buff1_used~0=~a$w_buff1_used~0_In439626548} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:14:56,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L809-4-->L810: Formula: (= v_~a~0_37 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{~a~0=v_~a~0_37, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 16:14:56,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-921163490 256))) (.cse0 (= (mod ~a$w_buff0_used~0_In-921163490 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out-921163490| 0) (not .cse1)) (and (= ~a$w_buff0_used~0_In-921163490 |P2Thread1of1ForFork0_#t~ite40_Out-921163490|) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-921163490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-921163490} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-921163490|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-921163490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-921163490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 16:14:56,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In-1435793214 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In-1435793214 256) 0)) (.cse3 (= 0 (mod ~a$r_buff0_thd3~0_In-1435793214 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1435793214 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-1435793214|)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out-1435793214| ~a$w_buff1_used~0_In-1435793214) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1435793214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1435793214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1435793214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1435793214} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1435793214, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1435793214, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1435793214, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1435793214, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1435793214|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 16:14:56,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L812-->L812-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-977940874 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-977940874 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-977940874| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out-977940874| ~a$r_buff0_thd3~0_In-977940874)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-977940874, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977940874} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-977940874, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-977940874, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-977940874|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 16:14:56,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L813-->L813-2: Formula: (let ((.cse3 (= 0 (mod ~a$w_buff0_used~0_In-1739963601 256))) (.cse2 (= (mod ~a$r_buff0_thd3~0_In-1739963601 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In-1739963601 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-1739963601 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite43_Out-1739963601| ~a$r_buff1_thd3~0_In-1739963601)) (and (= |P2Thread1of1ForFork0_#t~ite43_Out-1739963601| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1739963601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1739963601, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1739963601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1739963601} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1739963601|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1739963601, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1739963601, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1739963601, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1739963601} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 16:14:56,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L813-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~a$r_buff1_thd3~0_201 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_201, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 16:14:56,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:14:56,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L842-2-->L842-5: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-386699446 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-386699446 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-386699446| |ULTIMATE.start_main_#t~ite48_Out-386699446|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-386699446| ~a~0_In-386699446)) (and (= |ULTIMATE.start_main_#t~ite47_Out-386699446| ~a$w_buff1~0_In-386699446) (not .cse1) (not .cse0) .cse2))) InVars {~a~0=~a~0_In-386699446, ~a$w_buff1~0=~a$w_buff1~0_In-386699446, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-386699446, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-386699446} OutVars{~a~0=~a~0_In-386699446, ~a$w_buff1~0=~a$w_buff1~0_In-386699446, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-386699446|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-386699446, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-386699446|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-386699446} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:14:56,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In2048669462 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In2048669462 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out2048669462|) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out2048669462| ~a$w_buff0_used~0_In2048669462) (or .cse1 .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In2048669462, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2048669462} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In2048669462, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out2048669462|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In2048669462} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 16:14:56,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L844-->L844-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd0~0_In125168192 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In125168192 256) 0)) (.cse2 (= (mod ~a$r_buff0_thd0~0_In125168192 256) 0)) (.cse3 (= (mod ~a$w_buff0_used~0_In125168192 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out125168192| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~a$w_buff1_used~0_In125168192 |ULTIMATE.start_main_#t~ite50_Out125168192|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In125168192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In125168192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In125168192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In125168192} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out125168192|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In125168192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In125168192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In125168192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In125168192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 16:14:56,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L845-->L845-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-1896129861 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1896129861 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-1896129861| 0)) (and (= |ULTIMATE.start_main_#t~ite51_Out-1896129861| ~a$r_buff0_thd0~0_In-1896129861) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1896129861, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1896129861} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1896129861|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1896129861, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1896129861} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:14:56,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L846-->L846-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In281274050 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In281274050 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd0~0_In281274050 256))) (.cse3 (= (mod ~a$w_buff1_used~0_In281274050 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out281274050| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out281274050| ~a$r_buff1_thd0~0_In281274050)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281274050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In281274050, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In281274050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281274050} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out281274050|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In281274050, ~a$w_buff0_used~0=~a$w_buff0_used~0_In281274050, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In281274050, ~a$w_buff1_used~0=~a$w_buff1_used~0_In281274050} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 16:14:56,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= v_~a$r_buff1_thd0~0_170 |v_ULTIMATE.start_main_#t~ite52_39|) (= (ite (= (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_21) (= v_~__unbuffered_p2_EBX~0_32 0) (= 1 v_~__unbuffered_p2_EAX~0_21) (= 0 v_~__unbuffered_p0_EAX~0_128))) 1 0) 0) 0 1) v_~main$tmp_guard1~0_17)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_39|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_128, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_32, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_21, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_170, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:14:56,926 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3541ac8d-1ddf-4691-9b38-7e2027f89fb5/bin/utaipan/witness.graphml [2019-12-07 16:14:56,926 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:14:56,927 INFO L168 Benchmark]: Toolchain (without parser) took 149350.46 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 938.2 MB in the beginning and 4.8 GB in the end (delta: -3.9 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,927 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:14:56,928 INFO L168 Benchmark]: CACSL2BoogieTranslator took 414.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -131.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,928 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,928 INFO L168 Benchmark]: Boogie Preprocessor took 25.47 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:14:56,928 INFO L168 Benchmark]: RCFGBuilder took 412.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,929 INFO L168 Benchmark]: TraceAbstraction took 148390.10 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,929 INFO L168 Benchmark]: Witness Printer took 67.25 ms. Allocated memory is still 8.0 GB. Free memory was 4.9 GB in the beginning and 4.8 GB in the end (delta: 10.8 MB). Peak memory consumption was 10.8 MB. Max. memory is 11.5 GB. [2019-12-07 16:14:56,930 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 414.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.7 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -131.3 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.53 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.47 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 412.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 148390.10 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.8 GB). Free memory was 1.0 GB in the beginning and 4.9 GB in the end (delta: -3.9 GB). Peak memory consumption was 3.0 GB. Max. memory is 11.5 GB. * Witness Printer took 67.25 ms. Allocated memory is still 8.0 GB. Free memory was 4.9 GB in the beginning and 4.8 GB in the end (delta: 10.8 MB). Peak memory consumption was 10.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 94 ProgramPointsAfterwards, 215 TransitionsBefore, 104 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 35 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 31 ChoiceCompositions, 7408 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 42 SemBasedMoverChecksPositive, 283 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 83880 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t919, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L735] 1 a$w_buff1 = a$w_buff0 [L736] 1 a$w_buff0 = 1 [L737] 1 a$w_buff1_used = a$w_buff0_used [L738] 1 a$w_buff0_used = (_Bool)1 [L750] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L834] FCALL, FORK 0 pthread_create(&t920, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L770] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L750] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L771] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L772] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L773] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L751] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L752] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L836] FCALL, FORK 0 pthread_create(&t921, ((void *)0), P2, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L784] 3 y = 1 [L787] 3 z = 1 [L790] 3 __unbuffered_p2_EAX = z [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 a$flush_delayed = weak$$choice2 [L796] 3 a$mem_tmp = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L797] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L797] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L798] EXPR 3 weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0))=1, x=1, y=1, z=1] [L798] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L799] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L800] EXPR 3 weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used))=0, x=1, y=1, z=1] [L800] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L801] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L803] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L809] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L810] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L811] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L812] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L842] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L842] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L843] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L844] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L845] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 148.2s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 29.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6164 SDtfs, 6175 SDslu, 15674 SDs, 0 SdLazy, 8075 SolverSat, 201 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 260 GetRequests, 47 SyntacticMatches, 22 SemanticMatches, 191 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 608 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=234317occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 97.9s AutomataMinimizationTime, 29 MinimizatonAttempts, 342508 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.2s InterpolantComputationTime, 1117 NumberOfCodeBlocks, 1117 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 1021 ConstructedInterpolants, 0 QuantifiedInterpolants, 229413 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...