./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a915a003cada48d1fa52e765b0fadd5bb0232a79 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:52:25,764 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:52:25,765 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:52:25,773 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:52:25,773 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:52:25,773 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:52:25,774 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:52:25,776 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:52:25,777 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:52:25,777 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:52:25,778 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:52:25,779 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:52:25,779 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:52:25,780 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:52:25,780 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:52:25,781 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:52:25,782 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:52:25,782 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:52:25,784 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:52:25,785 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:52:25,786 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:52:25,787 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:52:25,788 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:52:25,788 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:52:25,790 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:52:25,790 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:52:25,790 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:52:25,790 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:52:25,791 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:52:25,791 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:52:25,791 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:52:25,792 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:52:25,792 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:52:25,793 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:52:25,793 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:52:25,793 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:52:25,794 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:52:25,794 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:52:25,794 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:52:25,794 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:52:25,795 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:52:25,795 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:52:25,805 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:52:25,805 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:52:25,805 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:52:25,806 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:52:25,806 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:52:25,807 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:52:25,807 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:52:25,807 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:52:25,807 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:52:25,807 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:52:25,807 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:52:25,807 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:52:25,808 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:52:25,809 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:52:25,809 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:52:25,809 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:52:25,810 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:52:25,810 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:52:25,810 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:52:25,810 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:52:25,810 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a915a003cada48d1fa52e765b0fadd5bb0232a79 [2019-12-07 13:52:25,908 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:52:25,916 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:52:25,919 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:52:25,920 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:52:25,921 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:52:25,921 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i [2019-12-07 13:52:25,963 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/data/55094bbc2/c5ff959b088d470cb78f7215314ab543/FLAG5ff423e61 [2019-12-07 13:52:26,433 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:52:26,434 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/sv-benchmarks/c/pthread-wmm/mix038_pso.oepc.i [2019-12-07 13:52:26,446 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/data/55094bbc2/c5ff959b088d470cb78f7215314ab543/FLAG5ff423e61 [2019-12-07 13:52:26,456 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/data/55094bbc2/c5ff959b088d470cb78f7215314ab543 [2019-12-07 13:52:26,458 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:52:26,459 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:52:26,460 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:52:26,460 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:52:26,462 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:52:26,463 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,464 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26, skipping insertion in model container [2019-12-07 13:52:26,465 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,469 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:52:26,500 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:52:26,752 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:52:26,760 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:52:26,805 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:52:26,849 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:52:26,850 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26 WrapperNode [2019-12-07 13:52:26,850 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:52:26,850 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:52:26,850 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:52:26,851 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:52:26,856 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,871 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,890 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:52:26,890 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:52:26,890 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:52:26,891 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:52:26,897 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,897 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,901 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,901 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,909 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,912 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,915 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... [2019-12-07 13:52:26,918 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:52:26,918 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:52:26,919 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:52:26,919 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:52:26,919 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:52:26,962 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:52:26,962 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:52:26,963 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:52:26,963 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:52:26,963 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:52:26,963 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:52:26,964 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:52:26,965 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:52:27,330 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:52:27,330 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:52:27,331 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:52:27 BoogieIcfgContainer [2019-12-07 13:52:27,331 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:52:27,332 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:52:27,332 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:52:27,334 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:52:27,335 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:52:26" (1/3) ... [2019-12-07 13:52:27,335 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e7f86c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:52:27, skipping insertion in model container [2019-12-07 13:52:27,335 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:52:26" (2/3) ... [2019-12-07 13:52:27,336 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7e7f86c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:52:27, skipping insertion in model container [2019-12-07 13:52:27,336 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:52:27" (3/3) ... [2019-12-07 13:52:27,337 INFO L109 eAbstractionObserver]: Analyzing ICFG mix038_pso.oepc.i [2019-12-07 13:52:27,344 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:52:27,344 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:52:27,349 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:52:27,350 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:52:27,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,375 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,375 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,375 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,375 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,376 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,378 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,379 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,379 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,379 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,379 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,379 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,380 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,380 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,380 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,380 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,380 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,381 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,381 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,382 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,382 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,384 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,385 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,386 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,386 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,386 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,403 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,404 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,405 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,406 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:52:27,417 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:52:27,430 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:52:27,430 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:52:27,430 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:52:27,430 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:52:27,430 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:52:27,430 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:52:27,430 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:52:27,430 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:52:27,442 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 177 places, 214 transitions [2019-12-07 13:52:27,443 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:52:27,500 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:52:27,501 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:52:27,511 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:52:27,526 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 177 places, 214 transitions [2019-12-07 13:52:27,557 INFO L134 PetriNetUnfolder]: 47/211 cut-off events. [2019-12-07 13:52:27,558 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:52:27,563 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 211 events. 47/211 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 699 event pairs. 9/171 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:52:27,578 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 13:52:27,579 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:52:30,530 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 48 DAG size of output: 44 [2019-12-07 13:52:30,848 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 13:52:30,939 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87212 [2019-12-07 13:52:30,939 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 13:52:30,941 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 13:52:42,670 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 13:52:42,672 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 13:52:42,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:52:42,676 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:42,677 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:52:42,677 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:42,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:42,682 INFO L82 PathProgramCache]: Analyzing trace with hash 919766, now seen corresponding path program 1 times [2019-12-07 13:52:42,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:52:42,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042254302] [2019-12-07 13:52:42,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:42,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:42,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:42,836 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042254302] [2019-12-07 13:52:42,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:42,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:52:42,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667343968] [2019-12-07 13:52:42,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:52:42,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:52:42,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:52:42,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:42,851 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 13:52:43,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:43,519 INFO L93 Difference]: Finished difference Result 101544 states and 430594 transitions. [2019-12-07 13:52:43,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:52:43,521 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:52:43,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:44,080 INFO L225 Difference]: With dead ends: 101544 [2019-12-07 13:52:44,080 INFO L226 Difference]: Without dead ends: 95304 [2019-12-07 13:52:44,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:52:47,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95304 states. [2019-12-07 13:52:48,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95304 to 95304. [2019-12-07 13:52:48,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95304 states. [2019-12-07 13:52:48,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95304 states to 95304 states and 403554 transitions. [2019-12-07 13:52:48,725 INFO L78 Accepts]: Start accepts. Automaton has 95304 states and 403554 transitions. Word has length 3 [2019-12-07 13:52:48,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:48,726 INFO L462 AbstractCegarLoop]: Abstraction has 95304 states and 403554 transitions. [2019-12-07 13:52:48,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:52:48,726 INFO L276 IsEmpty]: Start isEmpty. Operand 95304 states and 403554 transitions. [2019-12-07 13:52:48,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:52:48,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:48,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:48,729 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:48,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:48,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1982627867, now seen corresponding path program 1 times [2019-12-07 13:52:48,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:52:48,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803648575] [2019-12-07 13:52:48,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:48,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:48,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:48,789 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803648575] [2019-12-07 13:52:48,789 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:48,789 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:52:48,789 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007402720] [2019-12-07 13:52:48,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:52:48,790 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:52:48,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:52:48,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:52:48,790 INFO L87 Difference]: Start difference. First operand 95304 states and 403554 transitions. Second operand 4 states. [2019-12-07 13:52:51,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:51,251 INFO L93 Difference]: Finished difference Result 152040 states and 617140 transitions. [2019-12-07 13:52:51,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:52:51,252 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:52:51,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:51,594 INFO L225 Difference]: With dead ends: 152040 [2019-12-07 13:52:51,594 INFO L226 Difference]: Without dead ends: 151991 [2019-12-07 13:52:51,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:52:55,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151991 states. [2019-12-07 13:52:57,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151991 to 137801. [2019-12-07 13:52:57,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137801 states. [2019-12-07 13:52:57,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137801 states to 137801 states and 566928 transitions. [2019-12-07 13:52:57,866 INFO L78 Accepts]: Start accepts. Automaton has 137801 states and 566928 transitions. Word has length 11 [2019-12-07 13:52:57,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:52:57,867 INFO L462 AbstractCegarLoop]: Abstraction has 137801 states and 566928 transitions. [2019-12-07 13:52:57,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:52:57,867 INFO L276 IsEmpty]: Start isEmpty. Operand 137801 states and 566928 transitions. [2019-12-07 13:52:57,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:52:57,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:52:57,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:52:57,871 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:52:57,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:52:57,871 INFO L82 PathProgramCache]: Analyzing trace with hash -1673757482, now seen corresponding path program 1 times [2019-12-07 13:52:57,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:52:57,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554888703] [2019-12-07 13:52:57,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:52:57,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:52:57,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:52:57,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554888703] [2019-12-07 13:52:57,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:52:57,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:52:57,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1948283745] [2019-12-07 13:52:57,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:52:57,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:52:57,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:52:57,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:52:57,930 INFO L87 Difference]: Start difference. First operand 137801 states and 566928 transitions. Second operand 4 states. [2019-12-07 13:52:59,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:52:59,239 INFO L93 Difference]: Finished difference Result 197752 states and 794963 transitions. [2019-12-07 13:52:59,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:52:59,240 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:52:59,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:52:59,710 INFO L225 Difference]: With dead ends: 197752 [2019-12-07 13:52:59,710 INFO L226 Difference]: Without dead ends: 197696 [2019-12-07 13:52:59,710 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:53:06,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197696 states. [2019-12-07 13:53:08,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197696 to 164675. [2019-12-07 13:53:08,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164675 states. [2019-12-07 13:53:08,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164675 states to 164675 states and 674105 transitions. [2019-12-07 13:53:08,971 INFO L78 Accepts]: Start accepts. Automaton has 164675 states and 674105 transitions. Word has length 13 [2019-12-07 13:53:08,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:08,972 INFO L462 AbstractCegarLoop]: Abstraction has 164675 states and 674105 transitions. [2019-12-07 13:53:08,972 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:53:08,972 INFO L276 IsEmpty]: Start isEmpty. Operand 164675 states and 674105 transitions. [2019-12-07 13:53:08,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 13:53:08,978 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:08,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:08,978 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:08,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:08,978 INFO L82 PathProgramCache]: Analyzing trace with hash 841711145, now seen corresponding path program 1 times [2019-12-07 13:53:08,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:53:08,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520010174] [2019-12-07 13:53:08,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:08,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:09,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:09,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520010174] [2019-12-07 13:53:09,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:09,031 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:53:09,031 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976411087] [2019-12-07 13:53:09,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:53:09,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:53:09,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:53:09,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:53:09,032 INFO L87 Difference]: Start difference. First operand 164675 states and 674105 transitions. Second operand 4 states. [2019-12-07 13:53:09,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:09,953 INFO L93 Difference]: Finished difference Result 202675 states and 826980 transitions. [2019-12-07 13:53:09,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:53:09,954 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 13:53:09,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:10,475 INFO L225 Difference]: With dead ends: 202675 [2019-12-07 13:53:10,475 INFO L226 Difference]: Without dead ends: 202675 [2019-12-07 13:53:10,476 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:53:15,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202675 states. [2019-12-07 13:53:19,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202675 to 172880. [2019-12-07 13:53:19,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172880 states. [2019-12-07 13:53:20,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172880 states to 172880 states and 708759 transitions. [2019-12-07 13:53:20,321 INFO L78 Accepts]: Start accepts. Automaton has 172880 states and 708759 transitions. Word has length 16 [2019-12-07 13:53:20,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:20,321 INFO L462 AbstractCegarLoop]: Abstraction has 172880 states and 708759 transitions. [2019-12-07 13:53:20,321 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:53:20,321 INFO L276 IsEmpty]: Start isEmpty. Operand 172880 states and 708759 transitions. [2019-12-07 13:53:20,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 13:53:20,332 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:20,332 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:20,332 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:20,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:20,332 INFO L82 PathProgramCache]: Analyzing trace with hash -118269295, now seen corresponding path program 1 times [2019-12-07 13:53:20,333 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:53:20,333 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849916103] [2019-12-07 13:53:20,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:20,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:20,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:20,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1849916103] [2019-12-07 13:53:20,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:20,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:53:20,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926851973] [2019-12-07 13:53:20,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:53:20,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:53:20,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:53:20,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:53:20,383 INFO L87 Difference]: Start difference. First operand 172880 states and 708759 transitions. Second operand 3 states. [2019-12-07 13:53:22,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:22,028 INFO L93 Difference]: Finished difference Result 309307 states and 1259353 transitions. [2019-12-07 13:53:22,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:53:22,028 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 13:53:22,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:22,679 INFO L225 Difference]: With dead ends: 309307 [2019-12-07 13:53:22,679 INFO L226 Difference]: Without dead ends: 274877 [2019-12-07 13:53:22,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:53:30,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274877 states. [2019-12-07 13:53:34,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274877 to 263353. [2019-12-07 13:53:34,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263353 states. [2019-12-07 13:53:35,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263353 states to 263353 states and 1079819 transitions. [2019-12-07 13:53:35,355 INFO L78 Accepts]: Start accepts. Automaton has 263353 states and 1079819 transitions. Word has length 18 [2019-12-07 13:53:35,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:35,355 INFO L462 AbstractCegarLoop]: Abstraction has 263353 states and 1079819 transitions. [2019-12-07 13:53:35,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:53:35,355 INFO L276 IsEmpty]: Start isEmpty. Operand 263353 states and 1079819 transitions. [2019-12-07 13:53:35,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:53:35,375 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:35,375 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:35,375 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:35,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:35,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1108465109, now seen corresponding path program 1 times [2019-12-07 13:53:35,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:53:35,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450133010] [2019-12-07 13:53:35,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:35,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:35,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:35,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450133010] [2019-12-07 13:53:35,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:35,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:53:35,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1336803730] [2019-12-07 13:53:35,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:53:35,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:53:35,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:53:35,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:53:35,429 INFO L87 Difference]: Start difference. First operand 263353 states and 1079819 transitions. Second operand 4 states. [2019-12-07 13:53:36,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:36,469 INFO L93 Difference]: Finished difference Result 273771 states and 1111706 transitions. [2019-12-07 13:53:36,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:53:36,469 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:53:36,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:37,134 INFO L225 Difference]: With dead ends: 273771 [2019-12-07 13:53:37,134 INFO L226 Difference]: Without dead ends: 273771 [2019-12-07 13:53:37,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:53:43,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273771 states. [2019-12-07 13:53:50,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273771 to 260248. [2019-12-07 13:53:50,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260248 states. [2019-12-07 13:53:50,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260248 states to 260248 states and 1067976 transitions. [2019-12-07 13:53:50,851 INFO L78 Accepts]: Start accepts. Automaton has 260248 states and 1067976 transitions. Word has length 19 [2019-12-07 13:53:50,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:53:50,851 INFO L462 AbstractCegarLoop]: Abstraction has 260248 states and 1067976 transitions. [2019-12-07 13:53:50,851 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:53:50,851 INFO L276 IsEmpty]: Start isEmpty. Operand 260248 states and 1067976 transitions. [2019-12-07 13:53:50,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:53:50,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:53:50,867 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:53:50,867 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:53:50,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:53:50,867 INFO L82 PathProgramCache]: Analyzing trace with hash -430896444, now seen corresponding path program 1 times [2019-12-07 13:53:50,867 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:53:50,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012535837] [2019-12-07 13:53:50,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:53:50,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:53:50,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:53:50,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012535837] [2019-12-07 13:53:50,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:53:50,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:53:50,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507143605] [2019-12-07 13:53:50,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:53:50,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:53:50,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:53:50,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:53:50,914 INFO L87 Difference]: Start difference. First operand 260248 states and 1067976 transitions. Second operand 4 states. [2019-12-07 13:53:52,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:53:52,357 INFO L93 Difference]: Finished difference Result 272869 states and 1108690 transitions. [2019-12-07 13:53:52,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:53:52,357 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 13:53:52,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:53:52,991 INFO L225 Difference]: With dead ends: 272869 [2019-12-07 13:53:52,991 INFO L226 Difference]: Without dead ends: 272869 [2019-12-07 13:53:52,991 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:53:58,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272869 states. [2019-12-07 13:54:02,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272869 to 260064. [2019-12-07 13:54:02,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260064 states. [2019-12-07 13:54:03,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260064 states to 260064 states and 1067236 transitions. [2019-12-07 13:54:03,154 INFO L78 Accepts]: Start accepts. Automaton has 260064 states and 1067236 transitions. Word has length 19 [2019-12-07 13:54:03,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:03,154 INFO L462 AbstractCegarLoop]: Abstraction has 260064 states and 1067236 transitions. [2019-12-07 13:54:03,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:54:03,154 INFO L276 IsEmpty]: Start isEmpty. Operand 260064 states and 1067236 transitions. [2019-12-07 13:54:03,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:54:03,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:03,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:03,171 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:03,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:03,171 INFO L82 PathProgramCache]: Analyzing trace with hash -2120254288, now seen corresponding path program 1 times [2019-12-07 13:54:03,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:03,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725201208] [2019-12-07 13:54:03,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:03,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:03,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:03,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725201208] [2019-12-07 13:54:03,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:03,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:03,221 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302401537] [2019-12-07 13:54:03,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:54:03,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:03,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:54:03,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:54:03,221 INFO L87 Difference]: Start difference. First operand 260064 states and 1067236 transitions. Second operand 5 states. [2019-12-07 13:54:04,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:04,982 INFO L93 Difference]: Finished difference Result 370203 states and 1490927 transitions. [2019-12-07 13:54:04,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:54:04,983 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:54:04,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:09,071 INFO L225 Difference]: With dead ends: 370203 [2019-12-07 13:54:09,071 INFO L226 Difference]: Without dead ends: 370112 [2019-12-07 13:54:09,071 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:15,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370112 states. [2019-12-07 13:54:19,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370112 to 277479. [2019-12-07 13:54:19,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277479 states. [2019-12-07 13:54:20,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277479 states to 277479 states and 1137649 transitions. [2019-12-07 13:54:20,812 INFO L78 Accepts]: Start accepts. Automaton has 277479 states and 1137649 transitions. Word has length 19 [2019-12-07 13:54:20,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:20,812 INFO L462 AbstractCegarLoop]: Abstraction has 277479 states and 1137649 transitions. [2019-12-07 13:54:20,812 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:54:20,812 INFO L276 IsEmpty]: Start isEmpty. Operand 277479 states and 1137649 transitions. [2019-12-07 13:54:20,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 13:54:20,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:20,835 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:20,835 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:20,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:20,836 INFO L82 PathProgramCache]: Analyzing trace with hash 1127256632, now seen corresponding path program 1 times [2019-12-07 13:54:20,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:20,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1434480909] [2019-12-07 13:54:20,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:20,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:20,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:20,862 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1434480909] [2019-12-07 13:54:20,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:20,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:54:20,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [408678600] [2019-12-07 13:54:20,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:20,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:20,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:20,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:20,863 INFO L87 Difference]: Start difference. First operand 277479 states and 1137649 transitions. Second operand 3 states. [2019-12-07 13:54:21,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:21,055 INFO L93 Difference]: Finished difference Result 58094 states and 187512 transitions. [2019-12-07 13:54:21,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:21,055 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 13:54:21,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:21,140 INFO L225 Difference]: With dead ends: 58094 [2019-12-07 13:54:21,140 INFO L226 Difference]: Without dead ends: 58094 [2019-12-07 13:54:21,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:21,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58094 states. [2019-12-07 13:54:21,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58094 to 57994. [2019-12-07 13:54:21,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57994 states. [2019-12-07 13:54:22,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57994 states to 57994 states and 187232 transitions. [2019-12-07 13:54:22,456 INFO L78 Accepts]: Start accepts. Automaton has 57994 states and 187232 transitions. Word has length 20 [2019-12-07 13:54:22,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:22,456 INFO L462 AbstractCegarLoop]: Abstraction has 57994 states and 187232 transitions. [2019-12-07 13:54:22,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:22,456 INFO L276 IsEmpty]: Start isEmpty. Operand 57994 states and 187232 transitions. [2019-12-07 13:54:22,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 13:54:22,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:22,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:22,462 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:22,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:22,462 INFO L82 PathProgramCache]: Analyzing trace with hash 361242897, now seen corresponding path program 1 times [2019-12-07 13:54:22,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:22,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659304863] [2019-12-07 13:54:22,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:22,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:22,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:22,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [659304863] [2019-12-07 13:54:22,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:22,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:22,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546718087] [2019-12-07 13:54:22,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:54:22,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:22,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:54:22,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:54:22,510 INFO L87 Difference]: Start difference. First operand 57994 states and 187232 transitions. Second operand 5 states. [2019-12-07 13:54:22,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:22,994 INFO L93 Difference]: Finished difference Result 75336 states and 239530 transitions. [2019-12-07 13:54:22,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:54:22,994 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 13:54:22,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:23,099 INFO L225 Difference]: With dead ends: 75336 [2019-12-07 13:54:23,099 INFO L226 Difference]: Without dead ends: 75329 [2019-12-07 13:54:23,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:23,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75329 states. [2019-12-07 13:54:24,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75329 to 60197. [2019-12-07 13:54:24,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60197 states. [2019-12-07 13:54:24,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60197 states to 60197 states and 193610 transitions. [2019-12-07 13:54:24,119 INFO L78 Accepts]: Start accepts. Automaton has 60197 states and 193610 transitions. Word has length 22 [2019-12-07 13:54:24,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:24,120 INFO L462 AbstractCegarLoop]: Abstraction has 60197 states and 193610 transitions. [2019-12-07 13:54:24,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:54:24,120 INFO L276 IsEmpty]: Start isEmpty. Operand 60197 states and 193610 transitions. [2019-12-07 13:54:24,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:54:24,137 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:24,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:24,138 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:24,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:24,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1429942457, now seen corresponding path program 1 times [2019-12-07 13:54:24,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:24,138 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989976347] [2019-12-07 13:54:24,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:24,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:24,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:24,164 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989976347] [2019-12-07 13:54:24,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:24,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:24,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974011437] [2019-12-07 13:54:24,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:24,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:24,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:24,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:24,165 INFO L87 Difference]: Start difference. First operand 60197 states and 193610 transitions. Second operand 3 states. [2019-12-07 13:54:24,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:24,379 INFO L93 Difference]: Finished difference Result 79610 states and 252797 transitions. [2019-12-07 13:54:24,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:24,379 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:54:24,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:24,484 INFO L225 Difference]: With dead ends: 79610 [2019-12-07 13:54:24,484 INFO L226 Difference]: Without dead ends: 79610 [2019-12-07 13:54:24,484 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:24,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79610 states. [2019-12-07 13:54:25,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79610 to 64631. [2019-12-07 13:54:25,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64631 states. [2019-12-07 13:54:25,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64631 states to 64631 states and 206882 transitions. [2019-12-07 13:54:25,777 INFO L78 Accepts]: Start accepts. Automaton has 64631 states and 206882 transitions. Word has length 27 [2019-12-07 13:54:25,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:25,777 INFO L462 AbstractCegarLoop]: Abstraction has 64631 states and 206882 transitions. [2019-12-07 13:54:25,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:25,777 INFO L276 IsEmpty]: Start isEmpty. Operand 64631 states and 206882 transitions. [2019-12-07 13:54:25,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:54:25,791 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:25,791 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:25,791 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:25,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:25,791 INFO L82 PathProgramCache]: Analyzing trace with hash -535275942, now seen corresponding path program 1 times [2019-12-07 13:54:25,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:25,792 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625550474] [2019-12-07 13:54:25,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:25,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:25,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:25,812 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625550474] [2019-12-07 13:54:25,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:25,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:25,812 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069706449] [2019-12-07 13:54:25,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:25,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:25,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:25,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:25,813 INFO L87 Difference]: Start difference. First operand 64631 states and 206882 transitions. Second operand 3 states. [2019-12-07 13:54:26,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:26,044 INFO L93 Difference]: Finished difference Result 89756 states and 280562 transitions. [2019-12-07 13:54:26,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:26,044 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 13:54:26,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:26,168 INFO L225 Difference]: With dead ends: 89756 [2019-12-07 13:54:26,168 INFO L226 Difference]: Without dead ends: 89756 [2019-12-07 13:54:26,169 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:26,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89756 states. [2019-12-07 13:54:27,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89756 to 74777. [2019-12-07 13:54:27,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74777 states. [2019-12-07 13:54:27,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74777 states to 74777 states and 234647 transitions. [2019-12-07 13:54:27,437 INFO L78 Accepts]: Start accepts. Automaton has 74777 states and 234647 transitions. Word has length 27 [2019-12-07 13:54:27,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:27,437 INFO L462 AbstractCegarLoop]: Abstraction has 74777 states and 234647 transitions. [2019-12-07 13:54:27,437 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:27,437 INFO L276 IsEmpty]: Start isEmpty. Operand 74777 states and 234647 transitions. [2019-12-07 13:54:27,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 13:54:27,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:27,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:27,452 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:27,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:27,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1457952739, now seen corresponding path program 1 times [2019-12-07 13:54:27,452 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:27,452 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768808970] [2019-12-07 13:54:27,452 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:27,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:27,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:27,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768808970] [2019-12-07 13:54:27,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:27,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:54:27,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400755186] [2019-12-07 13:54:27,501 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:54:27,501 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:27,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:54:27,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:54:27,501 INFO L87 Difference]: Start difference. First operand 74777 states and 234647 transitions. Second operand 6 states. [2019-12-07 13:54:28,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:28,129 INFO L93 Difference]: Finished difference Result 129123 states and 403319 transitions. [2019-12-07 13:54:28,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:54:28,130 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 13:54:28,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:28,322 INFO L225 Difference]: With dead ends: 129123 [2019-12-07 13:54:28,322 INFO L226 Difference]: Without dead ends: 129104 [2019-12-07 13:54:28,322 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:28,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129104 states. [2019-12-07 13:54:29,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129104 to 79870. [2019-12-07 13:54:29,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79870 states. [2019-12-07 13:54:29,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79870 states to 79870 states and 250139 transitions. [2019-12-07 13:54:29,947 INFO L78 Accepts]: Start accepts. Automaton has 79870 states and 250139 transitions. Word has length 27 [2019-12-07 13:54:29,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:29,947 INFO L462 AbstractCegarLoop]: Abstraction has 79870 states and 250139 transitions. [2019-12-07 13:54:29,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:54:29,947 INFO L276 IsEmpty]: Start isEmpty. Operand 79870 states and 250139 transitions. [2019-12-07 13:54:29,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 13:54:29,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:29,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:29,964 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:29,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:29,965 INFO L82 PathProgramCache]: Analyzing trace with hash 294567066, now seen corresponding path program 1 times [2019-12-07 13:54:29,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:29,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477389508] [2019-12-07 13:54:29,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:29,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:30,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:30,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477389508] [2019-12-07 13:54:30,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:30,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:54:30,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580659722] [2019-12-07 13:54:30,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:54:30,018 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:30,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:54:30,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:54:30,018 INFO L87 Difference]: Start difference. First operand 79870 states and 250139 transitions. Second operand 6 states. [2019-12-07 13:54:30,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:30,658 INFO L93 Difference]: Finished difference Result 118689 states and 367669 transitions. [2019-12-07 13:54:30,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:54:30,658 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 13:54:30,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:30,820 INFO L225 Difference]: With dead ends: 118689 [2019-12-07 13:54:30,820 INFO L226 Difference]: Without dead ends: 118667 [2019-12-07 13:54:30,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:31,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118667 states. [2019-12-07 13:54:32,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118667 to 80003. [2019-12-07 13:54:32,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80003 states. [2019-12-07 13:54:32,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80003 states to 80003 states and 250423 transitions. [2019-12-07 13:54:32,451 INFO L78 Accepts]: Start accepts. Automaton has 80003 states and 250423 transitions. Word has length 28 [2019-12-07 13:54:32,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:32,451 INFO L462 AbstractCegarLoop]: Abstraction has 80003 states and 250423 transitions. [2019-12-07 13:54:32,451 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:54:32,451 INFO L276 IsEmpty]: Start isEmpty. Operand 80003 states and 250423 transitions. [2019-12-07 13:54:32,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:54:32,470 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:32,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:32,470 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:32,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:32,471 INFO L82 PathProgramCache]: Analyzing trace with hash -2114729111, now seen corresponding path program 1 times [2019-12-07 13:54:32,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:32,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [439725063] [2019-12-07 13:54:32,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:32,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:32,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:32,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [439725063] [2019-12-07 13:54:32,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:32,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:32,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [524042630] [2019-12-07 13:54:32,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:54:32,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:32,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:54:32,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:54:32,517 INFO L87 Difference]: Start difference. First operand 80003 states and 250423 transitions. Second operand 4 states. [2019-12-07 13:54:32,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:32,813 INFO L93 Difference]: Finished difference Result 107354 states and 337509 transitions. [2019-12-07 13:54:32,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:54:32,813 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 13:54:32,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:32,873 INFO L225 Difference]: With dead ends: 107354 [2019-12-07 13:54:32,873 INFO L226 Difference]: Without dead ends: 41624 [2019-12-07 13:54:32,873 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:54:33,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41624 states. [2019-12-07 13:54:33,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41624 to 39316. [2019-12-07 13:54:33,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39316 states. [2019-12-07 13:54:33,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39316 states to 39316 states and 121768 transitions. [2019-12-07 13:54:33,477 INFO L78 Accepts]: Start accepts. Automaton has 39316 states and 121768 transitions. Word has length 29 [2019-12-07 13:54:33,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:33,477 INFO L462 AbstractCegarLoop]: Abstraction has 39316 states and 121768 transitions. [2019-12-07 13:54:33,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:54:33,477 INFO L276 IsEmpty]: Start isEmpty. Operand 39316 states and 121768 transitions. [2019-12-07 13:54:33,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:54:33,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:33,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:33,486 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:33,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:33,486 INFO L82 PathProgramCache]: Analyzing trace with hash -163042027, now seen corresponding path program 1 times [2019-12-07 13:54:33,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:33,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668285331] [2019-12-07 13:54:33,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:33,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:33,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:33,510 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668285331] [2019-12-07 13:54:33,510 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:33,510 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:33,510 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974825280] [2019-12-07 13:54:33,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:54:33,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:33,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:54:33,511 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:54:33,511 INFO L87 Difference]: Start difference. First operand 39316 states and 121768 transitions. Second operand 4 states. [2019-12-07 13:54:33,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:33,557 INFO L93 Difference]: Finished difference Result 16440 states and 47645 transitions. [2019-12-07 13:54:33,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:54:33,558 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:54:33,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:33,574 INFO L225 Difference]: With dead ends: 16440 [2019-12-07 13:54:33,575 INFO L226 Difference]: Without dead ends: 16440 [2019-12-07 13:54:33,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:54:33,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16440 states. [2019-12-07 13:54:33,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16440 to 15770. [2019-12-07 13:54:33,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15770 states. [2019-12-07 13:54:33,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15770 states to 15770 states and 45983 transitions. [2019-12-07 13:54:33,779 INFO L78 Accepts]: Start accepts. Automaton has 15770 states and 45983 transitions. Word has length 30 [2019-12-07 13:54:33,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:33,780 INFO L462 AbstractCegarLoop]: Abstraction has 15770 states and 45983 transitions. [2019-12-07 13:54:33,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:54:33,780 INFO L276 IsEmpty]: Start isEmpty. Operand 15770 states and 45983 transitions. [2019-12-07 13:54:33,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:54:33,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:33,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:33,787 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:33,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:33,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1705939963, now seen corresponding path program 1 times [2019-12-07 13:54:33,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:33,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482372237] [2019-12-07 13:54:33,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:33,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:33,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:33,840 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482372237] [2019-12-07 13:54:33,840 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:33,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:54:33,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [960012511] [2019-12-07 13:54:33,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:54:33,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:33,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:54:33,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:54:33,841 INFO L87 Difference]: Start difference. First operand 15770 states and 45983 transitions. Second operand 7 states. [2019-12-07 13:54:34,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:34,495 INFO L93 Difference]: Finished difference Result 31434 states and 90035 transitions. [2019-12-07 13:54:34,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:54:34,496 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 13:54:34,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:34,526 INFO L225 Difference]: With dead ends: 31434 [2019-12-07 13:54:34,527 INFO L226 Difference]: Without dead ends: 31434 [2019-12-07 13:54:34,527 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:54:34,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31434 states. [2019-12-07 13:54:34,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31434 to 17037. [2019-12-07 13:54:34,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17037 states. [2019-12-07 13:54:34,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17037 states to 17037 states and 49611 transitions. [2019-12-07 13:54:34,863 INFO L78 Accepts]: Start accepts. Automaton has 17037 states and 49611 transitions. Word has length 33 [2019-12-07 13:54:34,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:34,863 INFO L462 AbstractCegarLoop]: Abstraction has 17037 states and 49611 transitions. [2019-12-07 13:54:34,863 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:54:34,863 INFO L276 IsEmpty]: Start isEmpty. Operand 17037 states and 49611 transitions. [2019-12-07 13:54:34,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 13:54:34,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:34,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:34,871 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:34,871 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:34,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1567643153, now seen corresponding path program 2 times [2019-12-07 13:54:34,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:34,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550677627] [2019-12-07 13:54:34,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:34,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:34,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:34,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550677627] [2019-12-07 13:54:34,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:34,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:54:34,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [637245481] [2019-12-07 13:54:34,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:54:34,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:34,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:54:34,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:54:34,933 INFO L87 Difference]: Start difference. First operand 17037 states and 49611 transitions. Second operand 8 states. [2019-12-07 13:54:35,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:35,777 INFO L93 Difference]: Finished difference Result 36870 states and 104615 transitions. [2019-12-07 13:54:35,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:54:35,777 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 13:54:35,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:35,812 INFO L225 Difference]: With dead ends: 36870 [2019-12-07 13:54:35,813 INFO L226 Difference]: Without dead ends: 36870 [2019-12-07 13:54:35,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:54:35,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36870 states. [2019-12-07 13:54:36,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36870 to 16575. [2019-12-07 13:54:36,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16575 states. [2019-12-07 13:54:36,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16575 states to 16575 states and 48344 transitions. [2019-12-07 13:54:36,155 INFO L78 Accepts]: Start accepts. Automaton has 16575 states and 48344 transitions. Word has length 33 [2019-12-07 13:54:36,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:36,155 INFO L462 AbstractCegarLoop]: Abstraction has 16575 states and 48344 transitions. [2019-12-07 13:54:36,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:54:36,155 INFO L276 IsEmpty]: Start isEmpty. Operand 16575 states and 48344 transitions. [2019-12-07 13:54:36,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:54:36,163 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:36,163 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:36,164 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:36,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:36,164 INFO L82 PathProgramCache]: Analyzing trace with hash -607763582, now seen corresponding path program 1 times [2019-12-07 13:54:36,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:36,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967062519] [2019-12-07 13:54:36,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:36,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:36,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:36,228 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967062519] [2019-12-07 13:54:36,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:36,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:54:36,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037980361] [2019-12-07 13:54:36,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:54:36,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:36,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:54:36,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:54:36,229 INFO L87 Difference]: Start difference. First operand 16575 states and 48344 transitions. Second operand 7 states. [2019-12-07 13:54:36,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:36,875 INFO L93 Difference]: Finished difference Result 28655 states and 81599 transitions. [2019-12-07 13:54:36,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:54:36,876 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 13:54:36,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:36,904 INFO L225 Difference]: With dead ends: 28655 [2019-12-07 13:54:36,904 INFO L226 Difference]: Without dead ends: 28655 [2019-12-07 13:54:36,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=253, Unknown=0, NotChecked=0, Total=342 [2019-12-07 13:54:36,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28655 states. [2019-12-07 13:54:37,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28655 to 15877. [2019-12-07 13:54:37,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15877 states. [2019-12-07 13:54:37,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15877 states to 15877 states and 46314 transitions. [2019-12-07 13:54:37,193 INFO L78 Accepts]: Start accepts. Automaton has 15877 states and 46314 transitions. Word has length 34 [2019-12-07 13:54:37,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:37,193 INFO L462 AbstractCegarLoop]: Abstraction has 15877 states and 46314 transitions. [2019-12-07 13:54:37,193 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:54:37,193 INFO L276 IsEmpty]: Start isEmpty. Operand 15877 states and 46314 transitions. [2019-12-07 13:54:37,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:54:37,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:37,201 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:37,201 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:37,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:37,202 INFO L82 PathProgramCache]: Analyzing trace with hash 846412022, now seen corresponding path program 2 times [2019-12-07 13:54:37,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:37,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179407377] [2019-12-07 13:54:37,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:37,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:37,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:37,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179407377] [2019-12-07 13:54:37,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:37,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:54:37,265 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653843859] [2019-12-07 13:54:37,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:54:37,266 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:37,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:54:37,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:54:37,266 INFO L87 Difference]: Start difference. First operand 15877 states and 46314 transitions. Second operand 7 states. [2019-12-07 13:54:38,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:38,082 INFO L93 Difference]: Finished difference Result 36129 states and 101221 transitions. [2019-12-07 13:54:38,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:54:38,084 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 13:54:38,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:38,129 INFO L225 Difference]: With dead ends: 36129 [2019-12-07 13:54:38,129 INFO L226 Difference]: Without dead ends: 36129 [2019-12-07 13:54:38,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=225, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:54:38,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36129 states. [2019-12-07 13:54:38,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36129 to 15367. [2019-12-07 13:54:38,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15367 states. [2019-12-07 13:54:38,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15367 states to 15367 states and 44848 transitions. [2019-12-07 13:54:38,457 INFO L78 Accepts]: Start accepts. Automaton has 15367 states and 44848 transitions. Word has length 34 [2019-12-07 13:54:38,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:38,457 INFO L462 AbstractCegarLoop]: Abstraction has 15367 states and 44848 transitions. [2019-12-07 13:54:38,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:54:38,458 INFO L276 IsEmpty]: Start isEmpty. Operand 15367 states and 44848 transitions. [2019-12-07 13:54:38,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 13:54:38,465 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:38,465 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:38,465 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:38,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:38,466 INFO L82 PathProgramCache]: Analyzing trace with hash -211414604, now seen corresponding path program 3 times [2019-12-07 13:54:38,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:38,466 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518300071] [2019-12-07 13:54:38,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:38,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:38,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:38,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518300071] [2019-12-07 13:54:38,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:38,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:54:38,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474163915] [2019-12-07 13:54:38,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 13:54:38,525 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:38,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 13:54:38,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 13:54:38,526 INFO L87 Difference]: Start difference. First operand 15367 states and 44848 transitions. Second operand 8 states. [2019-12-07 13:54:39,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:39,410 INFO L93 Difference]: Finished difference Result 31719 states and 89324 transitions. [2019-12-07 13:54:39,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 13:54:39,410 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2019-12-07 13:54:39,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:39,441 INFO L225 Difference]: With dead ends: 31719 [2019-12-07 13:54:39,441 INFO L226 Difference]: Without dead ends: 31719 [2019-12-07 13:54:39,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 150 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=161, Invalid=489, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:54:39,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31719 states. [2019-12-07 13:54:39,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31719 to 14372. [2019-12-07 13:54:39,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14372 states. [2019-12-07 13:54:39,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14372 states to 14372 states and 42003 transitions. [2019-12-07 13:54:39,731 INFO L78 Accepts]: Start accepts. Automaton has 14372 states and 42003 transitions. Word has length 34 [2019-12-07 13:54:39,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:39,732 INFO L462 AbstractCegarLoop]: Abstraction has 14372 states and 42003 transitions. [2019-12-07 13:54:39,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 13:54:39,732 INFO L276 IsEmpty]: Start isEmpty. Operand 14372 states and 42003 transitions. [2019-12-07 13:54:39,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 13:54:39,742 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:39,742 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:39,742 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:39,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:39,742 INFO L82 PathProgramCache]: Analyzing trace with hash -1365979560, now seen corresponding path program 1 times [2019-12-07 13:54:39,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:39,743 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850599426] [2019-12-07 13:54:39,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:39,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:39,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:39,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850599426] [2019-12-07 13:54:39,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:39,769 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:54:39,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119763153] [2019-12-07 13:54:39,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:39,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:39,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:39,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:39,770 INFO L87 Difference]: Start difference. First operand 14372 states and 42003 transitions. Second operand 3 states. [2019-12-07 13:54:39,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:39,808 INFO L93 Difference]: Finished difference Result 14372 states and 41929 transitions. [2019-12-07 13:54:39,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:39,809 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 13:54:39,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:39,822 INFO L225 Difference]: With dead ends: 14372 [2019-12-07 13:54:39,823 INFO L226 Difference]: Without dead ends: 14372 [2019-12-07 13:54:39,823 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:39,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14372 states. [2019-12-07 13:54:39,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14372 to 12672. [2019-12-07 13:54:39,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12672 states. [2019-12-07 13:54:40,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12672 states to 12672 states and 37416 transitions. [2019-12-07 13:54:40,000 INFO L78 Accepts]: Start accepts. Automaton has 12672 states and 37416 transitions. Word has length 40 [2019-12-07 13:54:40,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:40,000 INFO L462 AbstractCegarLoop]: Abstraction has 12672 states and 37416 transitions. [2019-12-07 13:54:40,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:40,000 INFO L276 IsEmpty]: Start isEmpty. Operand 12672 states and 37416 transitions. [2019-12-07 13:54:40,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 13:54:40,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:40,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:40,009 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:40,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:40,009 INFO L82 PathProgramCache]: Analyzing trace with hash 1677421997, now seen corresponding path program 1 times [2019-12-07 13:54:40,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:40,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1594411100] [2019-12-07 13:54:40,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:40,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:40,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:40,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1594411100] [2019-12-07 13:54:40,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:40,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:54:40,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1972867987] [2019-12-07 13:54:40,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:40,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:40,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:40,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,034 INFO L87 Difference]: Start difference. First operand 12672 states and 37416 transitions. Second operand 3 states. [2019-12-07 13:54:40,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:40,067 INFO L93 Difference]: Finished difference Result 12672 states and 36780 transitions. [2019-12-07 13:54:40,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:40,067 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 13:54:40,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:40,079 INFO L225 Difference]: With dead ends: 12672 [2019-12-07 13:54:40,079 INFO L226 Difference]: Without dead ends: 12672 [2019-12-07 13:54:40,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12672 states. [2019-12-07 13:54:40,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12672 to 12410. [2019-12-07 13:54:40,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12410 states. [2019-12-07 13:54:40,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12410 states to 12410 states and 36059 transitions. [2019-12-07 13:54:40,241 INFO L78 Accepts]: Start accepts. Automaton has 12410 states and 36059 transitions. Word has length 41 [2019-12-07 13:54:40,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:40,241 INFO L462 AbstractCegarLoop]: Abstraction has 12410 states and 36059 transitions. [2019-12-07 13:54:40,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:40,241 INFO L276 IsEmpty]: Start isEmpty. Operand 12410 states and 36059 transitions. [2019-12-07 13:54:40,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 13:54:40,249 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:40,249 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:40,250 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:40,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:40,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1399805170, now seen corresponding path program 1 times [2019-12-07 13:54:40,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:40,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623234425] [2019-12-07 13:54:40,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:40,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:40,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:40,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [623234425] [2019-12-07 13:54:40,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:40,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:54:40,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1850879519] [2019-12-07 13:54:40,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:54:40,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:40,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:54:40,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:54:40,288 INFO L87 Difference]: Start difference. First operand 12410 states and 36059 transitions. Second operand 5 states. [2019-12-07 13:54:40,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:40,332 INFO L93 Difference]: Finished difference Result 11343 states and 33779 transitions. [2019-12-07 13:54:40,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:54:40,333 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 13:54:40,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:40,342 INFO L225 Difference]: With dead ends: 11343 [2019-12-07 13:54:40,342 INFO L226 Difference]: Without dead ends: 9787 [2019-12-07 13:54:40,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:54:40,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9787 states. [2019-12-07 13:54:40,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9787 to 9787. [2019-12-07 13:54:40,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9787 states. [2019-12-07 13:54:40,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9787 states to 9787 states and 30036 transitions. [2019-12-07 13:54:40,480 INFO L78 Accepts]: Start accepts. Automaton has 9787 states and 30036 transitions. Word has length 42 [2019-12-07 13:54:40,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:40,480 INFO L462 AbstractCegarLoop]: Abstraction has 9787 states and 30036 transitions. [2019-12-07 13:54:40,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:54:40,480 INFO L276 IsEmpty]: Start isEmpty. Operand 9787 states and 30036 transitions. [2019-12-07 13:54:40,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:54:40,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:40,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:40,487 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:40,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:40,488 INFO L82 PathProgramCache]: Analyzing trace with hash 622120387, now seen corresponding path program 1 times [2019-12-07 13:54:40,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:40,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522940288] [2019-12-07 13:54:40,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:40,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:40,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:40,519 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522940288] [2019-12-07 13:54:40,519 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:40,519 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:54:40,519 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [299590001] [2019-12-07 13:54:40,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:40,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:40,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:40,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,520 INFO L87 Difference]: Start difference. First operand 9787 states and 30036 transitions. Second operand 3 states. [2019-12-07 13:54:40,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:40,571 INFO L93 Difference]: Finished difference Result 11999 states and 36749 transitions. [2019-12-07 13:54:40,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:40,571 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:54:40,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:40,583 INFO L225 Difference]: With dead ends: 11999 [2019-12-07 13:54:40,583 INFO L226 Difference]: Without dead ends: 11999 [2019-12-07 13:54:40,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11999 states. [2019-12-07 13:54:40,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11999 to 9449. [2019-12-07 13:54:40,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9449 states. [2019-12-07 13:54:40,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9449 states to 9449 states and 29216 transitions. [2019-12-07 13:54:40,726 INFO L78 Accepts]: Start accepts. Automaton has 9449 states and 29216 transitions. Word has length 66 [2019-12-07 13:54:40,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:40,726 INFO L462 AbstractCegarLoop]: Abstraction has 9449 states and 29216 transitions. [2019-12-07 13:54:40,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:40,726 INFO L276 IsEmpty]: Start isEmpty. Operand 9449 states and 29216 transitions. [2019-12-07 13:54:40,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:54:40,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:40,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:40,734 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:40,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:40,734 INFO L82 PathProgramCache]: Analyzing trace with hash -586454608, now seen corresponding path program 1 times [2019-12-07 13:54:40,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:40,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41055278] [2019-12-07 13:54:40,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:40,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:40,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:40,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [41055278] [2019-12-07 13:54:40,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:40,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:40,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [111985170] [2019-12-07 13:54:40,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:54:40,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:40,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:54:40,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,763 INFO L87 Difference]: Start difference. First operand 9449 states and 29216 transitions. Second operand 3 states. [2019-12-07 13:54:40,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:40,867 INFO L93 Difference]: Finished difference Result 13600 states and 42235 transitions. [2019-12-07 13:54:40,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:54:40,867 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 13:54:40,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:40,882 INFO L225 Difference]: With dead ends: 13600 [2019-12-07 13:54:40,882 INFO L226 Difference]: Without dead ends: 13600 [2019-12-07 13:54:40,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:54:40,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13600 states. [2019-12-07 13:54:41,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13600 to 9705. [2019-12-07 13:54:41,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9705 states. [2019-12-07 13:54:41,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9705 states to 9705 states and 30072 transitions. [2019-12-07 13:54:41,037 INFO L78 Accepts]: Start accepts. Automaton has 9705 states and 30072 transitions. Word has length 67 [2019-12-07 13:54:41,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:41,037 INFO L462 AbstractCegarLoop]: Abstraction has 9705 states and 30072 transitions. [2019-12-07 13:54:41,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:54:41,037 INFO L276 IsEmpty]: Start isEmpty. Operand 9705 states and 30072 transitions. [2019-12-07 13:54:41,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:54:41,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:41,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:41,045 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:41,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:41,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1786041058, now seen corresponding path program 1 times [2019-12-07 13:54:41,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:41,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1121453324] [2019-12-07 13:54:41,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:41,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:41,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:41,088 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1121453324] [2019-12-07 13:54:41,088 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:41,088 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:54:41,088 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8233699] [2019-12-07 13:54:41,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:54:41,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:41,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:54:41,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:54:41,089 INFO L87 Difference]: Start difference. First operand 9705 states and 30072 transitions. Second operand 4 states. [2019-12-07 13:54:41,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:41,146 INFO L93 Difference]: Finished difference Result 9561 states and 29502 transitions. [2019-12-07 13:54:41,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:54:41,147 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 13:54:41,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:41,156 INFO L225 Difference]: With dead ends: 9561 [2019-12-07 13:54:41,156 INFO L226 Difference]: Without dead ends: 9561 [2019-12-07 13:54:41,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:54:41,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9561 states. [2019-12-07 13:54:41,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9561 to 8427. [2019-12-07 13:54:41,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8427 states. [2019-12-07 13:54:41,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8427 states to 8427 states and 25886 transitions. [2019-12-07 13:54:41,281 INFO L78 Accepts]: Start accepts. Automaton has 8427 states and 25886 transitions. Word has length 67 [2019-12-07 13:54:41,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:41,281 INFO L462 AbstractCegarLoop]: Abstraction has 8427 states and 25886 transitions. [2019-12-07 13:54:41,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:54:41,281 INFO L276 IsEmpty]: Start isEmpty. Operand 8427 states and 25886 transitions. [2019-12-07 13:54:41,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:54:41,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:41,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:41,288 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:41,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:41,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1398756383, now seen corresponding path program 1 times [2019-12-07 13:54:41,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:41,288 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1440880499] [2019-12-07 13:54:41,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:41,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:41,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:41,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1440880499] [2019-12-07 13:54:41,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:41,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:54:41,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872734023] [2019-12-07 13:54:41,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:54:41,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:41,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:54:41,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:41,382 INFO L87 Difference]: Start difference. First operand 8427 states and 25886 transitions. Second operand 9 states. [2019-12-07 13:54:42,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:42,059 INFO L93 Difference]: Finished difference Result 50277 states and 150585 transitions. [2019-12-07 13:54:42,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 13:54:42,059 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 13:54:42,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:42,106 INFO L225 Difference]: With dead ends: 50277 [2019-12-07 13:54:42,106 INFO L226 Difference]: Without dead ends: 46047 [2019-12-07 13:54:42,106 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=151, Invalid=499, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:54:42,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46047 states. [2019-12-07 13:54:42,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46047 to 9408. [2019-12-07 13:54:42,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9408 states. [2019-12-07 13:54:42,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9408 states to 9408 states and 29101 transitions. [2019-12-07 13:54:42,465 INFO L78 Accepts]: Start accepts. Automaton has 9408 states and 29101 transitions. Word has length 67 [2019-12-07 13:54:42,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:42,465 INFO L462 AbstractCegarLoop]: Abstraction has 9408 states and 29101 transitions. [2019-12-07 13:54:42,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:54:42,465 INFO L276 IsEmpty]: Start isEmpty. Operand 9408 states and 29101 transitions. [2019-12-07 13:54:42,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:54:42,472 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:42,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:42,473 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:42,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:42,473 INFO L82 PathProgramCache]: Analyzing trace with hash 579351643, now seen corresponding path program 2 times [2019-12-07 13:54:42,473 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:42,473 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065949115] [2019-12-07 13:54:42,473 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:42,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:54:42,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:54:42,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065949115] [2019-12-07 13:54:42,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:54:42,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 13:54:42,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843403610] [2019-12-07 13:54:42,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 13:54:42,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:54:42,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 13:54:42,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:54:42,549 INFO L87 Difference]: Start difference. First operand 9408 states and 29101 transitions. Second operand 9 states. [2019-12-07 13:54:43,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:54:43,420 INFO L93 Difference]: Finished difference Result 57004 states and 169271 transitions. [2019-12-07 13:54:43,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 13:54:43,420 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 13:54:43,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:54:43,458 INFO L225 Difference]: With dead ends: 57004 [2019-12-07 13:54:43,458 INFO L226 Difference]: Without dead ends: 39748 [2019-12-07 13:54:43,458 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 340 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=291, Invalid=969, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 13:54:43,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39748 states. [2019-12-07 13:54:43,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39748 to 10686. [2019-12-07 13:54:43,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10686 states. [2019-12-07 13:54:43,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10686 states to 10686 states and 33051 transitions. [2019-12-07 13:54:43,779 INFO L78 Accepts]: Start accepts. Automaton has 10686 states and 33051 transitions. Word has length 67 [2019-12-07 13:54:43,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:54:43,779 INFO L462 AbstractCegarLoop]: Abstraction has 10686 states and 33051 transitions. [2019-12-07 13:54:43,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 13:54:43,780 INFO L276 IsEmpty]: Start isEmpty. Operand 10686 states and 33051 transitions. [2019-12-07 13:54:43,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:54:43,788 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:54:43,788 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:54:43,788 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:54:43,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:54:43,788 INFO L82 PathProgramCache]: Analyzing trace with hash 1790496915, now seen corresponding path program 3 times [2019-12-07 13:54:43,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:54:43,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210021544] [2019-12-07 13:54:43,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:54:43,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:54:43,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:54:43,863 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:54:43,863 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:54:43,865 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51|)) (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51|) |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1007~0.base_51|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51| 1) |v_#valid_87|) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1007~0.base_51| 4)) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_19|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_39|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ULTIMATE.start_main_~#t1007~0.offset=|v_ULTIMATE.start_main_~#t1007~0.offset_32|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_20|, ULTIMATE.start_main_~#t1007~0.base=|v_ULTIMATE.start_main_~#t1007~0.base_51|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1007~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ULTIMATE.start_main_~#t1009~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1009~0.offset, ULTIMATE.start_main_~#t1007~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 13:54:43,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out1921475958 ~a$r_buff0_thd3~0_In1921475958) (= 1 ~x~0_Out1921475958) (= ~a$r_buff1_thd0~0_Out1921475958 ~a$r_buff0_thd0~0_In1921475958) (= 1 ~a$r_buff0_thd1~0_Out1921475958) (= ~a$r_buff0_thd1~0_In1921475958 ~a$r_buff1_thd1~0_Out1921475958) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958)) (= ~a$r_buff0_thd2~0_In1921475958 ~a$r_buff1_thd2~0_Out1921475958)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1921475958, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1921475958, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1921475958, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921475958} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1921475958, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1921475958, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1921475958, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1921475958, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1921475958, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1921475958, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1921475958, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921475958, ~x~0=~x~0_Out1921475958} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:54:43,866 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1008~0.offset_7| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1008~0.base_9|)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1008~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1008~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9|) |v_ULTIMATE.start_main_~#t1008~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_7|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:54:43,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1009~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1009~0.base_9| 4)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) |v_ULTIMATE.start_main_~#t1009~0.offset_8| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1009~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1009~0.base, #length] because there is no mapped edge [2019-12-07 13:54:43,867 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-292692101 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-292692101 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| |P1Thread1of1ForFork2_#t~ite10_Out-292692101|))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| ~a~0_In-292692101) .cse2) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| ~a$w_buff1~0_In-292692101) (not .cse1) .cse2))) InVars {~a~0=~a~0_In-292692101, ~a$w_buff1~0=~a$w_buff1~0_In-292692101, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-292692101, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-292692101} OutVars{~a~0=~a~0_In-292692101, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-292692101|, ~a$w_buff1~0=~a$w_buff1~0_In-292692101, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-292692101, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-292692101|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-292692101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:54:43,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1572570503 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1572570503 256)))) (or (and (= ~a$w_buff0_used~0_In-1572570503 |P1Thread1of1ForFork2_#t~ite11_Out-1572570503|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1572570503|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1572570503, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1572570503} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1572570503, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1572570503, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1572570503|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:54:43,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-2099227300 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-2099227300 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2099227300 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-2099227300 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2099227300|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2099227300| ~a$w_buff1_used~0_In-2099227300) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2099227300, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2099227300, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2099227300|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:54:43,869 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-631354767 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-631354767| |P2Thread1of1ForFork0_#t~ite21_Out-631354767|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-631354767 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-631354767 256)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-631354767 256))) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-631354767 256))))) (= |P2Thread1of1ForFork0_#t~ite20_Out-631354767| ~a$w_buff0~0_In-631354767)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-631354767| ~a$w_buff0~0_In-631354767) (= |P2Thread1of1ForFork0_#t~ite20_In-631354767| |P2Thread1of1ForFork0_#t~ite20_Out-631354767|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-631354767, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-631354767, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-631354767, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-631354767, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-631354767, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-631354767|, ~weak$$choice2~0=~weak$$choice2~0_In-631354767} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-631354767|, ~a$w_buff0~0=~a$w_buff0~0_In-631354767, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-631354767, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-631354767, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-631354767, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-631354767|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-631354767, ~weak$$choice2~0=~weak$$choice2~0_In-631354767} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:54:43,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-925856461 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-925856461 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-925856461 |P1Thread1of1ForFork2_#t~ite13_Out-925856461|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-925856461|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-925856461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-925856461} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-925856461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-925856461, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-925856461|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:54:43,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1473440477 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1473440477 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-1473440477 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-1473440477 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1473440477|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1473440477 |P1Thread1of1ForFork2_#t~ite14_Out-1473440477|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1473440477, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1473440477} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1473440477, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1473440477, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1473440477|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:54:43,870 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:54:43,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-114096490 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite23_Out-114096490| ~a$w_buff1~0_In-114096490) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-114096490 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-114096490 256)) .cse1) (and .cse1 (= (mod ~a$w_buff1_used~0_In-114096490 256) 0)) (= (mod ~a$w_buff0_used~0_In-114096490 256) 0))) (= |P2Thread1of1ForFork0_#t~ite23_Out-114096490| |P2Thread1of1ForFork0_#t~ite24_Out-114096490|)) (and (= |P2Thread1of1ForFork0_#t~ite23_In-114096490| |P2Thread1of1ForFork0_#t~ite23_Out-114096490|) (not .cse0) (= ~a$w_buff1~0_In-114096490 |P2Thread1of1ForFork0_#t~ite24_Out-114096490|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-114096490, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-114096490|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114096490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114096490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114096490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114096490, ~weak$$choice2~0=~weak$$choice2~0_In-114096490} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-114096490, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-114096490|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-114096490|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114096490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114096490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114096490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114096490, ~weak$$choice2~0=~weak$$choice2~0_In-114096490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:54:43,871 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-413194067 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-413194067| ~a$w_buff0_used~0_In-413194067) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-413194067| |P2Thread1of1ForFork0_#t~ite26_Out-413194067|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out-413194067| |P2Thread1of1ForFork0_#t~ite26_Out-413194067|) (= ~a$w_buff0_used~0_In-413194067 |P2Thread1of1ForFork0_#t~ite26_Out-413194067|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-413194067 256) 0))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-413194067 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-413194067 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-413194067 256) 0) .cse1)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-413194067|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, ~weak$$choice2~0=~weak$$choice2~0_In-413194067} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-413194067|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-413194067|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, ~weak$$choice2~0=~weak$$choice2~0_In-413194067} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:54:43,872 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:54:43,873 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:54:43,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1862333176 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1862333176 256) 0))) (or (and (= ~a$w_buff1~0_In1862333176 |P2Thread1of1ForFork0_#t~ite38_Out1862333176|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1862333176| ~a~0_In1862333176)))) InVars {~a~0=~a~0_In1862333176, ~a$w_buff1~0=~a$w_buff1~0_In1862333176, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1862333176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1862333176} OutVars{~a~0=~a~0_In1862333176, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1862333176|, ~a$w_buff1~0=~a$w_buff1~0_In1862333176, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1862333176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1862333176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:54:43,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:54:43,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In926361585 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In926361585 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out926361585| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out926361585| ~a$w_buff0_used~0_In926361585) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In926361585} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out926361585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In926361585} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:54:43,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1660019355 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1660019355 256)))) (or (and (= ~a$w_buff0_used~0_In1660019355 |P0Thread1of1ForFork1_#t~ite5_Out1660019355|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1660019355|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1660019355|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:54:43,874 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1091333495 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1091333495 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1091333495 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1091333495 256) 0))) (or (and (= ~a$w_buff1_used~0_In1091333495 |P0Thread1of1ForFork1_#t~ite6_Out1091333495|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1091333495|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1091333495|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:54:43,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1566783785 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out1566783785 ~a$r_buff0_thd1~0_In1566783785)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1566783785 256) 0))) (or (and (= ~a$r_buff0_thd1~0_Out1566783785 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566783785} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1566783785|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1566783785} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:54:43,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1651619703 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1651619703 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1651619703 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1651619703 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1651619703| ~a$r_buff1_thd1~0_In1651619703) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1651619703|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1651619703|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:54:43,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:54:43,875 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd3~0_In1617421882 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1617421882 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1617421882 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1617421882 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1617421882 |P2Thread1of1ForFork0_#t~ite41_Out1617421882|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1617421882|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1617421882|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:54:43,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1007074940 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1007074940 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1007074940| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1007074940| ~a$r_buff0_thd3~0_In1007074940)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1007074940} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1007074940, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1007074940|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:54:43,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1645277169 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1645277169 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1645277169 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-1645277169 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1645277169| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out-1645277169| ~a$r_buff1_thd3~0_In-1645277169) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1645277169, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1645277169, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1645277169, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1645277169} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1645277169|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1645277169, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1645277169, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1645277169, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1645277169} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:54:43,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:54:43,876 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:54:43,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-532396099 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-532396099 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-532396099| |ULTIMATE.start_main_#t~ite48_Out-532396099|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-532396099 |ULTIMATE.start_main_#t~ite47_Out-532396099|)) (and (or .cse1 .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-532396099| ~a~0_In-532396099)))) InVars {~a~0=~a~0_In-532396099, ~a$w_buff1~0=~a$w_buff1~0_In-532396099, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-532396099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-532396099} OutVars{~a~0=~a~0_In-532396099, ~a$w_buff1~0=~a$w_buff1~0_In-532396099, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-532396099|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-532396099, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-532396099|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-532396099} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:54:43,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In951771507 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In951771507 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out951771507| ~a$w_buff0_used~0_In951771507) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out951771507| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In951771507, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In951771507} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In951771507, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out951771507|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In951771507} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:54:43,877 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-83270188 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-83270188 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-83270188 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-83270188 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-83270188| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite50_Out-83270188| ~a$w_buff1_used~0_In-83270188) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-83270188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-83270188, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-83270188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-83270188} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-83270188|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-83270188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-83270188, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-83270188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-83270188} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:54:43,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1540550293 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1540550293 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1540550293 |ULTIMATE.start_main_#t~ite51_Out1540550293|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1540550293|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1540550293} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1540550293|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1540550293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:54:43,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-841087192 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-841087192 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-841087192 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-841087192 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-841087192| ~a$r_buff1_thd0~0_In-841087192)) (and (= |ULTIMATE.start_main_#t~ite52_Out-841087192| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-841087192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-841087192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-841087192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-841087192} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-841087192|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-841087192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-841087192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-841087192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-841087192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:54:43,878 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:54:43,928 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:54:43 BasicIcfg [2019-12-07 13:54:43,929 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:54:43,929 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:54:43,929 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:54:43,929 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:54:43,929 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:52:27" (3/4) ... [2019-12-07 13:54:43,931 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:54:43,931 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L830: Formula: (let ((.cse0 (store |v_#valid_89| 0 0))) (and (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51|)) (= v_~main$tmp_guard0~0_31 0) (= v_~y~0_33 0) (= v_~main$tmp_guard1~0_50 0) (= 0 v_~a$read_delayed_var~0.base_8) (= v_~a$mem_tmp~0_19 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1007~0.base_51|) |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0)) |v_#memory_int_21|) (= v_~a$r_buff1_thd3~0_279 0) (= 0 v_~a$r_buff1_thd2~0_156) (= v_~a$r_buff0_thd0~0_153 0) (= v_~a$r_buff0_thd3~0_364 0) (= v_~z~0_14 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1007~0.base_51|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1007~0.offset_32| 0) (= 0 v_~weak$$choice0~0_15) (= 0 v_~a$w_buff1~0_224) (= 0 v_~__unbuffered_cnt~0_98) (= 0 v_~a$w_buff0_used~0_781) (= 0 v_~a$r_buff1_thd1~0_124) (= 0 v_~a$r_buff0_thd2~0_146) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p1_EAX~0_57) (= 0 v_~a$w_buff1_used~0_506) (= (store .cse0 |v_ULTIMATE.start_main_~#t1007~0.base_51| 1) |v_#valid_87|) (= v_~a$r_buff1_thd0~0_160 0) (= |v_#NULL.offset_4| 0) (= v_~a$w_buff0~0_325 0) (= v_~a$flush_delayed~0_30 0) (= 0 v_~x~0_130) (= v_~a$read_delayed_var~0.offset_8 0) (= v_~weak$$choice2~0_108 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1007~0.base_51| 4)) (= v_~a~0_163 0) (= v_~__unbuffered_p2_EBX~0_61 0) (= 0 v_~__unbuffered_p2_EAX~0_52) (= 0 v_~a$r_buff0_thd1~0_224) (= 0 v_~a$read_delayed~0_8))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_89|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_156, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_60|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_153, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_210|, ~a~0=v_~a~0_163, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_19|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_39|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_57, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_52, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_61, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_9|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_279, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_781, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_224, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_8, ~a$w_buff0~0=v_~a$w_buff0~0_325, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_98, ~x~0=v_~x~0_130, ULTIMATE.start_main_~#t1007~0.offset=|v_ULTIMATE.start_main_~#t1007~0.offset_32|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_146, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_50, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_32|, ~a$mem_tmp~0=v_~a$mem_tmp~0_19, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_44|, ~a$w_buff1~0=v_~a$w_buff1~0_224, ~y~0=v_~y~0_33, ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_20|, ULTIMATE.start_main_~#t1007~0.base=|v_ULTIMATE.start_main_~#t1007~0.base_51|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_28|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_124, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_364, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_31, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_30, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_33|, #valid=|v_#valid_87|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_14, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_506, ~weak$$choice2~0=v_~weak$$choice2~0_108, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_8} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1007~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ULTIMATE.start_main_~#t1009~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t1009~0.offset, ULTIMATE.start_main_~#t1007~0.base, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 13:54:43,932 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L4-->L748: Formula: (and (= ~a$r_buff1_thd3~0_Out1921475958 ~a$r_buff0_thd3~0_In1921475958) (= 1 ~x~0_Out1921475958) (= ~a$r_buff1_thd0~0_Out1921475958 ~a$r_buff0_thd0~0_In1921475958) (= 1 ~a$r_buff0_thd1~0_Out1921475958) (= ~a$r_buff0_thd1~0_In1921475958 ~a$r_buff1_thd1~0_Out1921475958) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958)) (= ~a$r_buff0_thd2~0_In1921475958 ~a$r_buff1_thd2~0_Out1921475958)) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1921475958, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1921475958, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1921475958, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921475958} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_Out1921475958, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_Out1921475958, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_Out1921475958, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1921475958, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In1921475958, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1921475958, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In1921475958, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1921475958, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1921475958, ~x~0=~x~0_Out1921475958} AuxVars[] AssignedVars[~a$r_buff1_thd1~0, ~a$r_buff1_thd3~0, ~a$r_buff1_thd2~0, ~a$r_buff1_thd0~0, ~a$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 13:54:43,932 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L830-1-->L832: Formula: (and (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1008~0.offset_7| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1008~0.base_9|)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t1008~0.base_9|) 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1008~0.base_9| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1008~0.base_9|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1008~0.base_9|) |v_ULTIMATE.start_main_~#t1008~0.offset_7| 1)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1008~0.offset=|v_ULTIMATE.start_main_~#t1008~0.offset_7|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1008~0.base=|v_ULTIMATE.start_main_~#t1008~0.base_9|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1008~0.offset, ULTIMATE.start_main_~#t1008~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:54:43,933 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [858] [858] L832-1-->L834: Formula: (and (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1009~0.offset_8| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1009~0.base_9| 4)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t1009~0.base_9|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1009~0.base_9|) |v_ULTIMATE.start_main_~#t1009~0.offset_8| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t1009~0.offset=|v_ULTIMATE.start_main_~#t1009~0.offset_8|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_4|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1009~0.base=|v_ULTIMATE.start_main_~#t1009~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1009~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1009~0.base, #length] because there is no mapped edge [2019-12-07 13:54:43,933 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In-292692101 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In-292692101 256))) (.cse2 (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| |P1Thread1of1ForFork2_#t~ite10_Out-292692101|))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| ~a~0_In-292692101) .cse2) (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite9_Out-292692101| ~a$w_buff1~0_In-292692101) (not .cse1) .cse2))) InVars {~a~0=~a~0_In-292692101, ~a$w_buff1~0=~a$w_buff1~0_In-292692101, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-292692101, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-292692101} OutVars{~a~0=~a~0_In-292692101, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-292692101|, ~a$w_buff1~0=~a$w_buff1~0_In-292692101, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-292692101, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-292692101|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-292692101} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 13:54:43,934 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-1572570503 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-1572570503 256)))) (or (and (= ~a$w_buff0_used~0_In-1572570503 |P1Thread1of1ForFork2_#t~ite11_Out-1572570503|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1572570503|) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1572570503, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1572570503} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1572570503, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1572570503, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1572570503|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 13:54:43,934 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L770-->L770-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-2099227300 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-2099227300 256) 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In-2099227300 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd2~0_In-2099227300 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-2099227300|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-2099227300| ~a$w_buff1_used~0_In-2099227300) (or .cse3 .cse2)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2099227300, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-2099227300, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-2099227300, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2099227300, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-2099227300|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2099227300} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 13:54:43,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L796-->L796-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-631354767 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite20_Out-631354767| |P2Thread1of1ForFork0_#t~ite21_Out-631354767|) (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-631354767 256)))) (or (= 0 (mod ~a$w_buff0_used~0_In-631354767 256)) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-631354767 256))) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-631354767 256))))) (= |P2Thread1of1ForFork0_#t~ite20_Out-631354767| ~a$w_buff0~0_In-631354767)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-631354767| ~a$w_buff0~0_In-631354767) (= |P2Thread1of1ForFork0_#t~ite20_In-631354767| |P2Thread1of1ForFork0_#t~ite20_Out-631354767|) (not .cse0)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-631354767, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-631354767, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-631354767, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-631354767, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-631354767, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-631354767|, ~weak$$choice2~0=~weak$$choice2~0_In-631354767} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-631354767|, ~a$w_buff0~0=~a$w_buff0~0_In-631354767, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-631354767, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-631354767, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-631354767, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-631354767|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-631354767, ~weak$$choice2~0=~weak$$choice2~0_In-631354767} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 13:54:43,935 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L771-->L771-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff0_used~0_In-925856461 256))) (.cse0 (= 0 (mod ~a$r_buff0_thd2~0_In-925856461 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd2~0_In-925856461 |P1Thread1of1ForFork2_#t~ite13_Out-925856461|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-925856461|) (not .cse1) (not .cse0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-925856461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-925856461} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-925856461, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-925856461, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-925856461|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 13:54:43,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L772-->L772-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff0_thd2~0_In-1473440477 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In-1473440477 256) 0)) (.cse0 (= (mod ~a$w_buff1_used~0_In-1473440477 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd2~0_In-1473440477 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite14_Out-1473440477|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd2~0_In-1473440477 |P1Thread1of1ForFork2_#t~ite14_Out-1473440477|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1473440477, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1473440477} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-1473440477, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1473440477, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1473440477, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1473440477, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-1473440477|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 13:54:43,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L772-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_48| v_~a$r_buff1_thd2~0_119) (= (+ v_~__unbuffered_cnt~0_84 1) v_~__unbuffered_cnt~0_83)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_48|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_119, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_47|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 13:54:43,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L797-->L797-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-114096490 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork0_#t~ite23_Out-114096490| ~a$w_buff1~0_In-114096490) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-114096490 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd3~0_In-114096490 256)) .cse1) (and .cse1 (= (mod ~a$w_buff1_used~0_In-114096490 256) 0)) (= (mod ~a$w_buff0_used~0_In-114096490 256) 0))) (= |P2Thread1of1ForFork0_#t~ite23_Out-114096490| |P2Thread1of1ForFork0_#t~ite24_Out-114096490|)) (and (= |P2Thread1of1ForFork0_#t~ite23_In-114096490| |P2Thread1of1ForFork0_#t~ite23_Out-114096490|) (not .cse0) (= ~a$w_buff1~0_In-114096490 |P2Thread1of1ForFork0_#t~ite24_Out-114096490|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-114096490, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_In-114096490|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114096490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114096490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114096490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114096490, ~weak$$choice2~0=~weak$$choice2~0_In-114096490} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-114096490, P2Thread1of1ForFork0_#t~ite23=|P2Thread1of1ForFork0_#t~ite23_Out-114096490|, P2Thread1of1ForFork0_#t~ite24=|P2Thread1of1ForFork0_#t~ite24_Out-114096490|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-114096490, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-114096490, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-114096490, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-114096490, ~weak$$choice2~0=~weak$$choice2~0_In-114096490} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite23, P2Thread1of1ForFork0_#t~ite24] because there is no mapped edge [2019-12-07 13:54:43,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L798-->L798-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-413194067 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite27_Out-413194067| ~a$w_buff0_used~0_In-413194067) (not .cse0) (= |P2Thread1of1ForFork0_#t~ite26_In-413194067| |P2Thread1of1ForFork0_#t~ite26_Out-413194067|)) (and .cse0 (= |P2Thread1of1ForFork0_#t~ite27_Out-413194067| |P2Thread1of1ForFork0_#t~ite26_Out-413194067|) (= ~a$w_buff0_used~0_In-413194067 |P2Thread1of1ForFork0_#t~ite26_Out-413194067|) (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-413194067 256) 0))) (or (and (= 0 (mod ~a$w_buff1_used~0_In-413194067 256)) .cse1) (= (mod ~a$w_buff0_used~0_In-413194067 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-413194067 256) 0) .cse1)))))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-413194067|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, ~weak$$choice2~0=~weak$$choice2~0_In-413194067} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-413194067|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-413194067|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-413194067, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-413194067, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-413194067, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-413194067, ~weak$$choice2~0=~weak$$choice2~0_In-413194067} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 13:54:43,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L800-->L801: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_16 256))) (= v_~a$r_buff0_thd3~0_71 v_~a$r_buff0_thd3~0_70)) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_16} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_70, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_16} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 13:54:43,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L803-->L807: Formula: (and (not (= 0 (mod v_~a$flush_delayed~0_8 256))) (= v_~a$flush_delayed~0_7 0) (= v_~a~0_39 v_~a$mem_tmp~0_5)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_39, ~a$mem_tmp~0=v_~a$mem_tmp~0_5, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 13:54:43,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L807-2-->L807-4: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1862333176 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1862333176 256) 0))) (or (and (= ~a$w_buff1~0_In1862333176 |P2Thread1of1ForFork0_#t~ite38_Out1862333176|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out1862333176| ~a~0_In1862333176)))) InVars {~a~0=~a~0_In1862333176, ~a$w_buff1~0=~a$w_buff1~0_In1862333176, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1862333176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1862333176} OutVars{~a~0=~a~0_In1862333176, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1862333176|, ~a$w_buff1~0=~a$w_buff1~0_In1862333176, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1862333176, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1862333176} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:54:43,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L807-4-->L808: Formula: (= v_~a~0_19 |v_P2Thread1of1ForFork0_#t~ite38_10|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_10|} OutVars{~a~0=v_~a~0_19, P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_5|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_9|} AuxVars[] AssignedVars[~a~0, P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 13:54:43,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L808-->L808-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In926361585 256))) (.cse1 (= (mod ~a$r_buff0_thd3~0_In926361585 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out926361585| 0)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out926361585| ~a$w_buff0_used~0_In926361585) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In926361585} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out926361585|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In926361585, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In926361585} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 13:54:43,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L749-->L749-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In1660019355 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In1660019355 256)))) (or (and (= ~a$w_buff0_used~0_In1660019355 |P0Thread1of1ForFork1_#t~ite5_Out1660019355|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1660019355|) (not .cse0) (not .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1660019355|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1660019355, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1660019355} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 13:54:43,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L750-->L750-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In1091333495 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd1~0_In1091333495 256))) (.cse2 (= (mod ~a$w_buff0_used~0_In1091333495 256) 0)) (.cse3 (= (mod ~a$r_buff0_thd1~0_In1091333495 256) 0))) (or (and (= ~a$w_buff1_used~0_In1091333495 |P0Thread1of1ForFork1_#t~ite6_Out1091333495|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1091333495|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1091333495|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1091333495, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1091333495, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1091333495, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1091333495} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 13:54:43,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L751-->L752: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1566783785 256))) (.cse2 (= ~a$r_buff0_thd1~0_Out1566783785 ~a$r_buff0_thd1~0_In1566783785)) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1566783785 256) 0))) (or (and (= ~a$r_buff0_thd1~0_Out1566783785 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1566783785} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1566783785|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1566783785, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out1566783785} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:54:43,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~a$w_buff1_used~0_In1651619703 256) 0)) (.cse2 (= 0 (mod ~a$r_buff1_thd1~0_In1651619703 256))) (.cse0 (= 0 (mod ~a$w_buff0_used~0_In1651619703 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In1651619703 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out1651619703| ~a$r_buff1_thd1~0_In1651619703) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1651619703|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1651619703|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1651619703, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1651619703, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1651619703, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1651619703} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 13:54:43,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L752-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~a$r_buff1_thd1~0_67 |v_P0Thread1of1ForFork1_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_48 1) v_~__unbuffered_cnt~0_47) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_25|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_67, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_47} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:54:43,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-->L809-2: Formula: (let ((.cse2 (= (mod ~a$r_buff0_thd3~0_In1617421882 256) 0)) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In1617421882 256))) (.cse1 (= 0 (mod ~a$w_buff1_used~0_In1617421882 256))) (.cse0 (= 0 (mod ~a$r_buff1_thd3~0_In1617421882 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In1617421882 |P2Thread1of1ForFork0_#t~ite41_Out1617421882|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1617421882|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1617421882, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1617421882, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1617421882, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1617421882, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1617421882|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 13:54:43,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In1007074940 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In1007074940 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1007074940| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out1007074940| ~a$r_buff0_thd3~0_In1007074940)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1007074940} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In1007074940, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1007074940, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1007074940|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 13:54:43,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1645277169 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In-1645277169 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1645277169 256))) (.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In-1645277169 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite43_Out-1645277169| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite43_Out-1645277169| ~a$r_buff1_thd3~0_In-1645277169) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1645277169, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1645277169, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1645277169, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1645277169} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1645277169|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1645277169, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1645277169, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1645277169, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1645277169} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 13:54:43,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L811-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_38 1) v_~__unbuffered_cnt~0_37) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~a$r_buff1_thd3~0_120 |v_P2Thread1of1ForFork0_#t~ite43_28|)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_37, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 13:54:43,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_24) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:54:43,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L840-2-->L840-5: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-532396099 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-532396099 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-532396099| |ULTIMATE.start_main_#t~ite48_Out-532396099|))) (or (and (not .cse0) (not .cse1) .cse2 (= ~a$w_buff1~0_In-532396099 |ULTIMATE.start_main_#t~ite47_Out-532396099|)) (and (or .cse1 .cse0) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out-532396099| ~a~0_In-532396099)))) InVars {~a~0=~a~0_In-532396099, ~a$w_buff1~0=~a$w_buff1~0_In-532396099, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-532396099, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-532396099} OutVars{~a~0=~a~0_In-532396099, ~a$w_buff1~0=~a$w_buff1~0_In-532396099, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-532396099|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-532396099, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-532396099|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-532396099} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:54:43,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L841-->L841-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd0~0_In951771507 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In951771507 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out951771507| ~a$w_buff0_used~0_In951771507) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out951771507| 0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In951771507, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In951771507} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In951771507, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out951771507|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In951771507} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 13:54:43,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L842-->L842-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd0~0_In-83270188 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-83270188 256))) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In-83270188 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd0~0_In-83270188 256)))) (or (and (= |ULTIMATE.start_main_#t~ite50_Out-83270188| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite50_Out-83270188| ~a$w_buff1_used~0_In-83270188) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-83270188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-83270188, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-83270188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-83270188} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-83270188|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-83270188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-83270188, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-83270188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-83270188} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 13:54:43,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L843-->L843-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In1540550293 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1540550293 256) 0))) (or (and (= ~a$r_buff0_thd0~0_In1540550293 |ULTIMATE.start_main_#t~ite51_Out1540550293|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1540550293|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1540550293} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1540550293|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1540550293, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1540550293} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 13:54:43,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L844-->L844-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In-841087192 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In-841087192 256))) (.cse3 (= (mod ~a$r_buff1_thd0~0_In-841087192 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-841087192 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-841087192| ~a$r_buff1_thd0~0_In-841087192)) (and (= |ULTIMATE.start_main_#t~ite52_Out-841087192| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-841087192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-841087192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-841087192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-841087192} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-841087192|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-841087192, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-841087192, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-841087192, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-841087192} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 13:54:43,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L844-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_19 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_24) (= v_~x~0_77 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= (mod v_~main$tmp_guard1~0_19 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~a$r_buff1_thd0~0_109 |v_ULTIMATE.start_main_#t~ite52_38|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_38|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_37|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_24, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_109, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_77, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:54:43,992 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_fc3048d5-f868-4413-86c1-b011750958e8/bin/utaipan/witness.graphml [2019-12-07 13:54:43,992 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:54:43,993 INFO L168 Benchmark]: Toolchain (without parser) took 137534.21 ms. Allocated memory was 1.0 GB in the beginning and 8.5 GB in the end (delta: 7.5 GB). Free memory was 938.1 MB in the beginning and 4.2 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,993 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:54:43,993 INFO L168 Benchmark]: CACSL2BoogieTranslator took 390.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.9 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -137.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,994 INFO L168 Benchmark]: Boogie Procedure Inliner took 39.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,994 INFO L168 Benchmark]: Boogie Preprocessor took 27.81 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:54:43,994 INFO L168 Benchmark]: RCFGBuilder took 412.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,994 INFO L168 Benchmark]: TraceAbstraction took 136596.80 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,995 INFO L168 Benchmark]: Witness Printer took 63.16 ms. Allocated memory is still 8.5 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:54:43,996 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 390.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 104.9 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -137.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 39.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.81 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 412.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 136596.80 ms. Allocated memory was 1.1 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 63.16 ms. Allocated memory is still 8.5 GB. Free memory was 4.3 GB in the beginning and 4.2 GB in the end (delta: 45.8 MB). Peak memory consumption was 45.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 177 ProgramPointsBefore, 92 ProgramPointsAfterwards, 214 TransitionsBefore, 100 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 33 ChoiceCompositions, 7286 VarBasedMoverChecksPositive, 247 VarBasedMoverChecksNegative, 37 SemBasedMoverChecksPositive, 286 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 87212 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L830] FCALL, FORK 0 pthread_create(&t1007, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L733] 1 a$w_buff1 = a$w_buff0 [L734] 1 a$w_buff0 = 1 [L735] 1 a$w_buff1_used = a$w_buff0_used [L736] 1 a$w_buff0_used = (_Bool)1 [L832] FCALL, FORK 0 pthread_create(&t1008, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0] [L762] 2 x = 2 [L765] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] EXPR 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L768] 2 a = a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) [L834] FCALL, FORK 0 pthread_create(&t1009, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, z=0] [L782] 3 y = 1 [L785] 3 z = 1 [L788] 3 __unbuffered_p2_EAX = z [L791] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L792] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L793] 3 a$flush_delayed = weak$$choice2 [L794] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L795] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L769] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L796] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L770] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L771] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L748] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L797] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L798] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L799] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L799] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=1] [L801] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L802] 3 __unbuffered_p2_EBX = a VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L748] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L807] 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L749] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L750] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L808] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L809] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L810] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L840] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1] [L840] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L841] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L842] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L843] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 168 locations, 2 error locations. Result: UNSAFE, OverallTime: 136.4s, OverallIterations: 30, TraceHistogramMax: 1, AutomataDifference: 28.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5609 SDtfs, 7996 SDslu, 12295 SDs, 0 SdLazy, 7141 SolverSat, 504 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 268 GetRequests, 36 SyntacticMatches, 16 SemanticMatches, 216 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 988 ImplicationChecksByTransitivity, 1.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=277479occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 90.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 504378 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 1020 NumberOfCodeBlocks, 1020 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 924 ConstructedInterpolants, 0 QuantifiedInterpolants, 138995 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 29 InterpolantComputations, 29 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...