./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 54003f2b4870d7af6966ed22460f3781d186d1ed ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 21:19:21,330 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 21:19:21,332 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 21:19:21,341 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 21:19:21,341 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 21:19:21,342 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 21:19:21,343 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 21:19:21,344 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 21:19:21,346 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 21:19:21,346 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 21:19:21,347 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 21:19:21,348 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 21:19:21,348 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 21:19:21,349 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 21:19:21,349 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 21:19:21,350 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 21:19:21,351 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 21:19:21,351 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 21:19:21,352 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 21:19:21,354 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 21:19:21,355 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 21:19:21,356 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 21:19:21,357 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 21:19:21,358 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 21:19:21,360 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 21:19:21,360 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 21:19:21,360 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 21:19:21,360 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 21:19:21,361 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 21:19:21,361 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 21:19:21,362 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 21:19:21,362 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 21:19:21,363 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 21:19:21,363 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 21:19:21,364 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 21:19:21,364 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 21:19:21,365 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 21:19:21,365 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 21:19:21,365 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 21:19:21,366 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 21:19:21,366 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 21:19:21,367 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 21:19:21,379 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 21:19:21,379 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 21:19:21,380 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 21:19:21,380 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 21:19:21,380 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 21:19:21,380 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 21:19:21,380 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 21:19:21,380 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 21:19:21,380 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 21:19:21,381 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 21:19:21,381 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 21:19:21,381 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 21:19:21,381 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 21:19:21,381 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 21:19:21,381 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 21:19:21,382 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 21:19:21,382 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 21:19:21,383 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 21:19:21,383 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:19:21,384 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 21:19:21,384 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 54003f2b4870d7af6966ed22460f3781d186d1ed [2019-12-07 21:19:21,483 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 21:19:21,491 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 21:19:21,493 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 21:19:21,494 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 21:19:21,494 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 21:19:21,495 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i [2019-12-07 21:19:21,532 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/data/245459e5d/d334eae8da3d4d359a29e3ce9fc1e002/FLAGfca97325a [2019-12-07 21:19:21,889 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 21:19:21,890 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/sv-benchmarks/c/pthread-wmm/mix043_rmo.opt.i [2019-12-07 21:19:21,902 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/data/245459e5d/d334eae8da3d4d359a29e3ce9fc1e002/FLAGfca97325a [2019-12-07 21:19:21,910 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/data/245459e5d/d334eae8da3d4d359a29e3ce9fc1e002 [2019-12-07 21:19:21,912 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 21:19:21,913 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 21:19:21,914 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 21:19:21,914 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 21:19:21,916 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 21:19:21,917 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:19:21" (1/1) ... [2019-12-07 21:19:21,918 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:21, skipping insertion in model container [2019-12-07 21:19:21,918 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:19:21" (1/1) ... [2019-12-07 21:19:21,923 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 21:19:21,953 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 21:19:22,203 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:19:22,211 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 21:19:22,255 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:19:22,301 INFO L208 MainTranslator]: Completed translation [2019-12-07 21:19:22,301 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22 WrapperNode [2019-12-07 21:19:22,301 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 21:19:22,302 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 21:19:22,302 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 21:19:22,302 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 21:19:22,307 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,320 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,342 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 21:19:22,342 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 21:19:22,342 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 21:19:22,342 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 21:19:22,349 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,349 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,353 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,353 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,360 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,363 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,365 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... [2019-12-07 21:19:22,368 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 21:19:22,369 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 21:19:22,369 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 21:19:22,369 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 21:19:22,369 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 21:19:22,410 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 21:19:22,410 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 21:19:22,410 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 21:19:22,410 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 21:19:22,411 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 21:19:22,411 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 21:19:22,411 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 21:19:22,411 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 21:19:22,411 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 21:19:22,412 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 21:19:22,757 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 21:19:22,757 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 21:19:22,758 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:22 BoogieIcfgContainer [2019-12-07 21:19:22,759 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 21:19:22,759 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 21:19:22,760 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 21:19:22,762 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 21:19:22,762 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 09:19:21" (1/3) ... [2019-12-07 21:19:22,763 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1add939f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:19:22, skipping insertion in model container [2019-12-07 21:19:22,763 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:22" (2/3) ... [2019-12-07 21:19:22,763 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1add939f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:19:22, skipping insertion in model container [2019-12-07 21:19:22,763 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:22" (3/3) ... [2019-12-07 21:19:22,765 INFO L109 eAbstractionObserver]: Analyzing ICFG mix043_rmo.opt.i [2019-12-07 21:19:22,773 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 21:19:22,773 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 21:19:22,779 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 21:19:22,780 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 21:19:22,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,811 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,811 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,811 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,812 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,812 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,812 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,812 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,813 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,813 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,814 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,814 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,814 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,815 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,816 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,817 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,818 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,819 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,819 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,820 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,821 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,821 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,821 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,821 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,821 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,822 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,823 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,824 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,825 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,825 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,825 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,825 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:22,837 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 21:19:22,850 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 21:19:22,850 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 21:19:22,850 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 21:19:22,850 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 21:19:22,850 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 21:19:22,850 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 21:19:22,850 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 21:19:22,850 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 21:19:22,861 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-07 21:19:22,862 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 21:19:22,916 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 21:19:22,916 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:19:22,925 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 21:19:22,937 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-07 21:19:22,963 INFO L134 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-07 21:19:22,964 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:19:22,967 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 469 event pairs. 12/175 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 21:19:22,980 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 21:19:22,981 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 21:19:26,035 WARN L192 SmtUtils]: Spent 188.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-07 21:19:26,137 INFO L206 etLargeBlockEncoding]: Checked pairs total: 56592 [2019-12-07 21:19:26,137 INFO L214 etLargeBlockEncoding]: Total number of compositions: 126 [2019-12-07 21:19:26,139 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 90 places, 97 transitions [2019-12-07 21:19:27,923 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 33838 states. [2019-12-07 21:19:27,924 INFO L276 IsEmpty]: Start isEmpty. Operand 33838 states. [2019-12-07 21:19:27,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 21:19:27,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:27,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:27,929 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:27,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:27,933 INFO L82 PathProgramCache]: Analyzing trace with hash -1752766824, now seen corresponding path program 1 times [2019-12-07 21:19:27,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:27,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1143474260] [2019-12-07 21:19:27,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:28,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:28,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:28,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1143474260] [2019-12-07 21:19:28,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:28,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:19:28,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2071525281] [2019-12-07 21:19:28,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:19:28,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:28,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:19:28,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:28,105 INFO L87 Difference]: Start difference. First operand 33838 states. Second operand 3 states. [2019-12-07 21:19:28,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:28,435 INFO L93 Difference]: Finished difference Result 33638 states and 143712 transitions. [2019-12-07 21:19:28,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:19:28,436 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 21:19:28,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:28,614 INFO L225 Difference]: With dead ends: 33638 [2019-12-07 21:19:28,615 INFO L226 Difference]: Without dead ends: 32966 [2019-12-07 21:19:28,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:28,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32966 states. [2019-12-07 21:19:29,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32966 to 32966. [2019-12-07 21:19:29,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32966 states. [2019-12-07 21:19:29,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32966 states to 32966 states and 140968 transitions. [2019-12-07 21:19:29,600 INFO L78 Accepts]: Start accepts. Automaton has 32966 states and 140968 transitions. Word has length 9 [2019-12-07 21:19:29,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:29,601 INFO L462 AbstractCegarLoop]: Abstraction has 32966 states and 140968 transitions. [2019-12-07 21:19:29,602 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:19:29,602 INFO L276 IsEmpty]: Start isEmpty. Operand 32966 states and 140968 transitions. [2019-12-07 21:19:29,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 21:19:29,607 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:29,607 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:29,608 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:29,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:29,608 INFO L82 PathProgramCache]: Analyzing trace with hash -666575947, now seen corresponding path program 1 times [2019-12-07 21:19:29,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:29,608 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540212332] [2019-12-07 21:19:29,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:29,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:29,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:29,770 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1540212332] [2019-12-07 21:19:29,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:29,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:19:29,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1605944957] [2019-12-07 21:19:29,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:19:29,772 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:29,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:19:29,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:19:29,772 INFO L87 Difference]: Start difference. First operand 32966 states and 140968 transitions. Second operand 4 states. [2019-12-07 21:19:30,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:30,104 INFO L93 Difference]: Finished difference Result 44494 states and 185824 transitions. [2019-12-07 21:19:30,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:19:30,105 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 21:19:30,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:30,287 INFO L225 Difference]: With dead ends: 44494 [2019-12-07 21:19:30,287 INFO L226 Difference]: Without dead ends: 44494 [2019-12-07 21:19:30,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:19:30,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44494 states. [2019-12-07 21:19:31,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44494 to 43986. [2019-12-07 21:19:31,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43986 states. [2019-12-07 21:19:31,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43986 states to 43986 states and 183912 transitions. [2019-12-07 21:19:31,276 INFO L78 Accepts]: Start accepts. Automaton has 43986 states and 183912 transitions. Word has length 15 [2019-12-07 21:19:31,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:31,276 INFO L462 AbstractCegarLoop]: Abstraction has 43986 states and 183912 transitions. [2019-12-07 21:19:31,276 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:19:31,276 INFO L276 IsEmpty]: Start isEmpty. Operand 43986 states and 183912 transitions. [2019-12-07 21:19:31,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 21:19:31,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:31,278 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:31,278 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:31,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:31,279 INFO L82 PathProgramCache]: Analyzing trace with hash 703479247, now seen corresponding path program 1 times [2019-12-07 21:19:31,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:31,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259429021] [2019-12-07 21:19:31,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:31,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:31,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:31,322 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259429021] [2019-12-07 21:19:31,322 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:31,322 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:19:31,322 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111557850] [2019-12-07 21:19:31,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:19:31,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:31,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:19:31,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:19:31,323 INFO L87 Difference]: Start difference. First operand 43986 states and 183912 transitions. Second operand 4 states. [2019-12-07 21:19:31,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:31,850 INFO L93 Difference]: Finished difference Result 62082 states and 254960 transitions. [2019-12-07 21:19:31,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:19:31,851 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 21:19:31,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:31,983 INFO L225 Difference]: With dead ends: 62082 [2019-12-07 21:19:31,983 INFO L226 Difference]: Without dead ends: 62054 [2019-12-07 21:19:31,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:19:32,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62054 states. [2019-12-07 21:19:33,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62054 to 51774. [2019-12-07 21:19:33,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51774 states. [2019-12-07 21:19:33,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51774 states to 51774 states and 215576 transitions. [2019-12-07 21:19:33,204 INFO L78 Accepts]: Start accepts. Automaton has 51774 states and 215576 transitions. Word has length 15 [2019-12-07 21:19:33,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:33,204 INFO L462 AbstractCegarLoop]: Abstraction has 51774 states and 215576 transitions. [2019-12-07 21:19:33,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:19:33,204 INFO L276 IsEmpty]: Start isEmpty. Operand 51774 states and 215576 transitions. [2019-12-07 21:19:33,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 21:19:33,215 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:33,215 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:33,215 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:33,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:33,215 INFO L82 PathProgramCache]: Analyzing trace with hash -1831569488, now seen corresponding path program 1 times [2019-12-07 21:19:33,215 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:33,215 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814766098] [2019-12-07 21:19:33,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:33,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:33,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:33,270 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814766098] [2019-12-07 21:19:33,270 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:33,271 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:19:33,271 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507992440] [2019-12-07 21:19:33,271 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:19:33,271 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:33,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:19:33,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:19:33,271 INFO L87 Difference]: Start difference. First operand 51774 states and 215576 transitions. Second operand 5 states. [2019-12-07 21:19:33,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:33,763 INFO L93 Difference]: Finished difference Result 68854 states and 281988 transitions. [2019-12-07 21:19:33,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 21:19:33,763 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 21:19:33,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:34,090 INFO L225 Difference]: With dead ends: 68854 [2019-12-07 21:19:34,090 INFO L226 Difference]: Without dead ends: 68826 [2019-12-07 21:19:34,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:19:34,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68826 states. [2019-12-07 21:19:35,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68826 to 51450. [2019-12-07 21:19:35,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51450 states. [2019-12-07 21:19:36,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51450 states to 51450 states and 213896 transitions. [2019-12-07 21:19:36,541 INFO L78 Accepts]: Start accepts. Automaton has 51450 states and 213896 transitions. Word has length 21 [2019-12-07 21:19:36,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:36,541 INFO L462 AbstractCegarLoop]: Abstraction has 51450 states and 213896 transitions. [2019-12-07 21:19:36,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:19:36,542 INFO L276 IsEmpty]: Start isEmpty. Operand 51450 states and 213896 transitions. [2019-12-07 21:19:36,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 21:19:36,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:36,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:36,573 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:36,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:36,573 INFO L82 PathProgramCache]: Analyzing trace with hash 2027885083, now seen corresponding path program 1 times [2019-12-07 21:19:36,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:36,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352404748] [2019-12-07 21:19:36,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:36,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:36,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:36,606 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352404748] [2019-12-07 21:19:36,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:36,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:19:36,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [494524571] [2019-12-07 21:19:36,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:19:36,607 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:36,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:19:36,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:36,607 INFO L87 Difference]: Start difference. First operand 51450 states and 213896 transitions. Second operand 3 states. [2019-12-07 21:19:36,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:36,886 INFO L93 Difference]: Finished difference Result 64130 states and 263832 transitions. [2019-12-07 21:19:36,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:19:36,887 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 21:19:36,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:37,032 INFO L225 Difference]: With dead ends: 64130 [2019-12-07 21:19:37,032 INFO L226 Difference]: Without dead ends: 64130 [2019-12-07 21:19:37,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:37,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64130 states. [2019-12-07 21:19:38,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64130 to 56646. [2019-12-07 21:19:38,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56646 states. [2019-12-07 21:19:38,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56646 states to 56646 states and 234808 transitions. [2019-12-07 21:19:38,368 INFO L78 Accepts]: Start accepts. Automaton has 56646 states and 234808 transitions. Word has length 29 [2019-12-07 21:19:38,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:38,369 INFO L462 AbstractCegarLoop]: Abstraction has 56646 states and 234808 transitions. [2019-12-07 21:19:38,369 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:19:38,369 INFO L276 IsEmpty]: Start isEmpty. Operand 56646 states and 234808 transitions. [2019-12-07 21:19:38,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 21:19:38,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:38,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:38,396 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:38,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:38,397 INFO L82 PathProgramCache]: Analyzing trace with hash 1811393886, now seen corresponding path program 1 times [2019-12-07 21:19:38,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:38,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1718742076] [2019-12-07 21:19:38,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:38,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:38,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:38,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1718742076] [2019-12-07 21:19:38,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:38,451 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:19:38,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128582647] [2019-12-07 21:19:38,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:19:38,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:38,451 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:19:38,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:19:38,452 INFO L87 Difference]: Start difference. First operand 56646 states and 234808 transitions. Second operand 6 states. [2019-12-07 21:19:38,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:38,953 INFO L93 Difference]: Finished difference Result 81602 states and 332376 transitions. [2019-12-07 21:19:38,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 21:19:38,953 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-07 21:19:38,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:39,132 INFO L225 Difference]: With dead ends: 81602 [2019-12-07 21:19:39,132 INFO L226 Difference]: Without dead ends: 81538 [2019-12-07 21:19:39,132 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:19:39,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81538 states. [2019-12-07 21:19:40,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81538 to 65578. [2019-12-07 21:19:40,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65578 states. [2019-12-07 21:19:40,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65578 states to 65578 states and 270440 transitions. [2019-12-07 21:19:40,667 INFO L78 Accepts]: Start accepts. Automaton has 65578 states and 270440 transitions. Word has length 29 [2019-12-07 21:19:40,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:40,667 INFO L462 AbstractCegarLoop]: Abstraction has 65578 states and 270440 transitions. [2019-12-07 21:19:40,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:19:40,667 INFO L276 IsEmpty]: Start isEmpty. Operand 65578 states and 270440 transitions. [2019-12-07 21:19:40,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 21:19:40,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:40,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:40,723 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:40,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:40,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1048930675, now seen corresponding path program 1 times [2019-12-07 21:19:40,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:40,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194004405] [2019-12-07 21:19:40,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:40,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:40,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:40,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194004405] [2019-12-07 21:19:40,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:40,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:19:40,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695810615] [2019-12-07 21:19:40,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:19:40,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:40,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:19:40,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:40,775 INFO L87 Difference]: Start difference. First operand 65578 states and 270440 transitions. Second operand 3 states. [2019-12-07 21:19:41,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:41,064 INFO L93 Difference]: Finished difference Result 65578 states and 269720 transitions. [2019-12-07 21:19:41,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:19:41,065 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2019-12-07 21:19:41,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:41,213 INFO L225 Difference]: With dead ends: 65578 [2019-12-07 21:19:41,214 INFO L226 Difference]: Without dead ends: 65578 [2019-12-07 21:19:41,214 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:41,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65578 states. [2019-12-07 21:19:42,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65578 to 65578. [2019-12-07 21:19:42,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65578 states. [2019-12-07 21:19:42,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65578 states to 65578 states and 269720 transitions. [2019-12-07 21:19:42,487 INFO L78 Accepts]: Start accepts. Automaton has 65578 states and 269720 transitions. Word has length 35 [2019-12-07 21:19:42,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:42,487 INFO L462 AbstractCegarLoop]: Abstraction has 65578 states and 269720 transitions. [2019-12-07 21:19:42,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:19:42,487 INFO L276 IsEmpty]: Start isEmpty. Operand 65578 states and 269720 transitions. [2019-12-07 21:19:42,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 21:19:42,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:42,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:42,751 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:42,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:42,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1735231015, now seen corresponding path program 1 times [2019-12-07 21:19:42,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:42,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1178236921] [2019-12-07 21:19:42,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:42,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:42,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:42,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1178236921] [2019-12-07 21:19:42,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:42,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:19:42,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122974929] [2019-12-07 21:19:42,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:19:42,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:42,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:19:42,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:19:42,818 INFO L87 Difference]: Start difference. First operand 65578 states and 269720 transitions. Second operand 7 states. [2019-12-07 21:19:43,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:43,625 INFO L93 Difference]: Finished difference Result 89414 states and 361616 transitions. [2019-12-07 21:19:43,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 21:19:43,626 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-07 21:19:43,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:43,819 INFO L225 Difference]: With dead ends: 89414 [2019-12-07 21:19:43,819 INFO L226 Difference]: Without dead ends: 89310 [2019-12-07 21:19:43,819 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 21:19:44,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89310 states. [2019-12-07 21:19:45,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89310 to 58886. [2019-12-07 21:19:45,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58886 states. [2019-12-07 21:19:45,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58886 states to 58886 states and 243296 transitions. [2019-12-07 21:19:45,207 INFO L78 Accepts]: Start accepts. Automaton has 58886 states and 243296 transitions. Word has length 35 [2019-12-07 21:19:45,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:45,207 INFO L462 AbstractCegarLoop]: Abstraction has 58886 states and 243296 transitions. [2019-12-07 21:19:45,207 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:19:45,208 INFO L276 IsEmpty]: Start isEmpty. Operand 58886 states and 243296 transitions. [2019-12-07 21:19:45,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-07 21:19:45,255 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:45,255 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:45,255 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:45,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:45,255 INFO L82 PathProgramCache]: Analyzing trace with hash 903389864, now seen corresponding path program 1 times [2019-12-07 21:19:45,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:45,256 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200964139] [2019-12-07 21:19:45,256 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:45,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:45,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:45,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1200964139] [2019-12-07 21:19:45,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:45,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:19:45,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1338043214] [2019-12-07 21:19:45,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:19:45,302 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:45,302 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:19:45,302 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:19:45,302 INFO L87 Difference]: Start difference. First operand 58886 states and 243296 transitions. Second operand 4 states. [2019-12-07 21:19:45,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:45,599 INFO L93 Difference]: Finished difference Result 47360 states and 179978 transitions. [2019-12-07 21:19:45,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:19:45,600 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 35 [2019-12-07 21:19:45,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:45,683 INFO L225 Difference]: With dead ends: 47360 [2019-12-07 21:19:45,683 INFO L226 Difference]: Without dead ends: 46252 [2019-12-07 21:19:45,684 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:19:45,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46252 states. [2019-12-07 21:19:46,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46252 to 46252. [2019-12-07 21:19:46,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46252 states. [2019-12-07 21:19:46,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46252 states to 46252 states and 176502 transitions. [2019-12-07 21:19:46,484 INFO L78 Accepts]: Start accepts. Automaton has 46252 states and 176502 transitions. Word has length 35 [2019-12-07 21:19:46,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:46,484 INFO L462 AbstractCegarLoop]: Abstraction has 46252 states and 176502 transitions. [2019-12-07 21:19:46,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:19:46,484 INFO L276 IsEmpty]: Start isEmpty. Operand 46252 states and 176502 transitions. [2019-12-07 21:19:46,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-07 21:19:46,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:46,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:46,514 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:46,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:46,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1617947594, now seen corresponding path program 1 times [2019-12-07 21:19:46,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:46,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714413676] [2019-12-07 21:19:46,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:46,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:46,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:46,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [714413676] [2019-12-07 21:19:46,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:46,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:19:46,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126426459] [2019-12-07 21:19:46,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:19:46,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:46,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:19:46,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:19:46,595 INFO L87 Difference]: Start difference. First operand 46252 states and 176502 transitions. Second operand 6 states. [2019-12-07 21:19:46,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:46,921 INFO L93 Difference]: Finished difference Result 58248 states and 224178 transitions. [2019-12-07 21:19:46,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 21:19:46,922 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2019-12-07 21:19:46,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:47,028 INFO L225 Difference]: With dead ends: 58248 [2019-12-07 21:19:47,028 INFO L226 Difference]: Without dead ends: 55647 [2019-12-07 21:19:47,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:19:47,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55647 states. [2019-12-07 21:19:47,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55647 to 51679. [2019-12-07 21:19:47,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51679 states. [2019-12-07 21:19:48,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51679 states to 51679 states and 198408 transitions. [2019-12-07 21:19:48,010 INFO L78 Accepts]: Start accepts. Automaton has 51679 states and 198408 transitions. Word has length 36 [2019-12-07 21:19:48,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:48,011 INFO L462 AbstractCegarLoop]: Abstraction has 51679 states and 198408 transitions. [2019-12-07 21:19:48,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:19:48,011 INFO L276 IsEmpty]: Start isEmpty. Operand 51679 states and 198408 transitions. [2019-12-07 21:19:48,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 21:19:48,053 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:48,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:48,053 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:48,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:48,054 INFO L82 PathProgramCache]: Analyzing trace with hash 859028932, now seen corresponding path program 1 times [2019-12-07 21:19:48,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:48,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970863752] [2019-12-07 21:19:48,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:48,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:48,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:48,107 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1970863752] [2019-12-07 21:19:48,107 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:48,108 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:19:48,108 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803061170] [2019-12-07 21:19:48,108 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:19:48,108 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:48,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:19:48,108 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:19:48,108 INFO L87 Difference]: Start difference. First operand 51679 states and 198408 transitions. Second operand 5 states. [2019-12-07 21:19:48,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:48,188 INFO L93 Difference]: Finished difference Result 22140 states and 70370 transitions. [2019-12-07 21:19:48,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:19:48,188 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2019-12-07 21:19:48,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:48,213 INFO L225 Difference]: With dead ends: 22140 [2019-12-07 21:19:48,213 INFO L226 Difference]: Without dead ends: 21264 [2019-12-07 21:19:48,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:19:48,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21264 states. [2019-12-07 21:19:48,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21264 to 21264. [2019-12-07 21:19:48,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21264 states. [2019-12-07 21:19:48,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21264 states to 21264 states and 67572 transitions. [2019-12-07 21:19:48,597 INFO L78 Accepts]: Start accepts. Automaton has 21264 states and 67572 transitions. Word has length 38 [2019-12-07 21:19:48,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:48,597 INFO L462 AbstractCegarLoop]: Abstraction has 21264 states and 67572 transitions. [2019-12-07 21:19:48,598 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:19:48,598 INFO L276 IsEmpty]: Start isEmpty. Operand 21264 states and 67572 transitions. [2019-12-07 21:19:48,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 21:19:48,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:48,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:48,609 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:48,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:48,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1508152385, now seen corresponding path program 1 times [2019-12-07 21:19:48,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:48,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14784834] [2019-12-07 21:19:48,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:48,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:48,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:48,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14784834] [2019-12-07 21:19:48,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:48,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 21:19:48,687 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130899849] [2019-12-07 21:19:48,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:19:48,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:48,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:19:48,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:19:48,687 INFO L87 Difference]: Start difference. First operand 21264 states and 67572 transitions. Second operand 7 states. [2019-12-07 21:19:48,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:48,874 INFO L93 Difference]: Finished difference Result 36395 states and 116077 transitions. [2019-12-07 21:19:48,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 21:19:48,874 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 21:19:48,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:48,895 INFO L225 Difference]: With dead ends: 36395 [2019-12-07 21:19:48,895 INFO L226 Difference]: Without dead ends: 17493 [2019-12-07 21:19:48,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:19:48,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17493 states. [2019-12-07 21:19:49,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17493 to 16368. [2019-12-07 21:19:49,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16368 states. [2019-12-07 21:19:49,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16368 states to 16368 states and 52247 transitions. [2019-12-07 21:19:49,140 INFO L78 Accepts]: Start accepts. Automaton has 16368 states and 52247 transitions. Word has length 39 [2019-12-07 21:19:49,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:49,141 INFO L462 AbstractCegarLoop]: Abstraction has 16368 states and 52247 transitions. [2019-12-07 21:19:49,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:19:49,141 INFO L276 IsEmpty]: Start isEmpty. Operand 16368 states and 52247 transitions. [2019-12-07 21:19:49,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 21:19:49,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:49,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:49,149 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:49,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:49,149 INFO L82 PathProgramCache]: Analyzing trace with hash 2053204377, now seen corresponding path program 2 times [2019-12-07 21:19:49,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:49,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1767220539] [2019-12-07 21:19:49,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:49,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:49,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:49,277 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1767220539] [2019-12-07 21:19:49,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:49,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 21:19:49,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [638170103] [2019-12-07 21:19:49,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 21:19:49,278 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:49,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 21:19:49,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:19:49,279 INFO L87 Difference]: Start difference. First operand 16368 states and 52247 transitions. Second operand 10 states. [2019-12-07 21:19:49,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:49,750 INFO L93 Difference]: Finished difference Result 25059 states and 80548 transitions. [2019-12-07 21:19:49,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 21:19:49,750 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2019-12-07 21:19:49,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:49,776 INFO L225 Difference]: With dead ends: 25059 [2019-12-07 21:19:49,776 INFO L226 Difference]: Without dead ends: 21883 [2019-12-07 21:19:49,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=70, Invalid=272, Unknown=0, NotChecked=0, Total=342 [2019-12-07 21:19:49,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21883 states. [2019-12-07 21:19:50,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21883 to 19009. [2019-12-07 21:19:50,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19009 states. [2019-12-07 21:19:50,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19009 states to 19009 states and 60693 transitions. [2019-12-07 21:19:50,060 INFO L78 Accepts]: Start accepts. Automaton has 19009 states and 60693 transitions. Word has length 39 [2019-12-07 21:19:50,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:50,061 INFO L462 AbstractCegarLoop]: Abstraction has 19009 states and 60693 transitions. [2019-12-07 21:19:50,061 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 21:19:50,061 INFO L276 IsEmpty]: Start isEmpty. Operand 19009 states and 60693 transitions. [2019-12-07 21:19:50,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 21:19:50,074 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,074 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:50,075 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1961307543, now seen corresponding path program 1 times [2019-12-07 21:19:50,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,075 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425231579] [2019-12-07 21:19:50,075 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,130 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425231579] [2019-12-07 21:19:50,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:19:50,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039854415] [2019-12-07 21:19:50,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:19:50,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:19:50,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:19:50,131 INFO L87 Difference]: Start difference. First operand 19009 states and 60693 transitions. Second operand 6 states. [2019-12-07 21:19:50,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:50,173 INFO L93 Difference]: Finished difference Result 3342 states and 8386 transitions. [2019-12-07 21:19:50,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 21:19:50,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 21:19:50,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:50,175 INFO L225 Difference]: With dead ends: 3342 [2019-12-07 21:19:50,175 INFO L226 Difference]: Without dead ends: 3011 [2019-12-07 21:19:50,176 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:19:50,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3011 states. [2019-12-07 21:19:50,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3011 to 3011. [2019-12-07 21:19:50,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3011 states. [2019-12-07 21:19:50,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3011 states to 3011 states and 7460 transitions. [2019-12-07 21:19:50,200 INFO L78 Accepts]: Start accepts. Automaton has 3011 states and 7460 transitions. Word has length 40 [2019-12-07 21:19:50,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:50,201 INFO L462 AbstractCegarLoop]: Abstraction has 3011 states and 7460 transitions. [2019-12-07 21:19:50,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:19:50,201 INFO L276 IsEmpty]: Start isEmpty. Operand 3011 states and 7460 transitions. [2019-12-07 21:19:50,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-07 21:19:50,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:50,202 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,203 INFO L82 PathProgramCache]: Analyzing trace with hash -784185183, now seen corresponding path program 1 times [2019-12-07 21:19:50,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392864227] [2019-12-07 21:19:50,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392864227] [2019-12-07 21:19:50,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 21:19:50,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1751644015] [2019-12-07 21:19:50,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:19:50,255 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:19:50,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:19:50,255 INFO L87 Difference]: Start difference. First operand 3011 states and 7460 transitions. Second operand 7 states. [2019-12-07 21:19:50,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:50,313 INFO L93 Difference]: Finished difference Result 1216 states and 3318 transitions. [2019-12-07 21:19:50,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 21:19:50,313 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2019-12-07 21:19:50,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:50,315 INFO L225 Difference]: With dead ends: 1216 [2019-12-07 21:19:50,315 INFO L226 Difference]: Without dead ends: 1170 [2019-12-07 21:19:50,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:19:50,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1170 states. [2019-12-07 21:19:50,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1170 to 1058. [2019-12-07 21:19:50,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1058 states. [2019-12-07 21:19:50,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1058 states to 1058 states and 2908 transitions. [2019-12-07 21:19:50,325 INFO L78 Accepts]: Start accepts. Automaton has 1058 states and 2908 transitions. Word has length 48 [2019-12-07 21:19:50,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:50,325 INFO L462 AbstractCegarLoop]: Abstraction has 1058 states and 2908 transitions. [2019-12-07 21:19:50,325 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:19:50,325 INFO L276 IsEmpty]: Start isEmpty. Operand 1058 states and 2908 transitions. [2019-12-07 21:19:50,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 21:19:50,326 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,326 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:50,326 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,327 INFO L82 PathProgramCache]: Analyzing trace with hash -1193491105, now seen corresponding path program 1 times [2019-12-07 21:19:50,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,327 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203510486] [2019-12-07 21:19:50,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203510486] [2019-12-07 21:19:50,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:19:50,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [315721501] [2019-12-07 21:19:50,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:19:50,406 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:19:50,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:19:50,406 INFO L87 Difference]: Start difference. First operand 1058 states and 2908 transitions. Second operand 6 states. [2019-12-07 21:19:50,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:50,450 INFO L93 Difference]: Finished difference Result 1592 states and 4093 transitions. [2019-12-07 21:19:50,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 21:19:50,450 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-07 21:19:50,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:50,451 INFO L225 Difference]: With dead ends: 1592 [2019-12-07 21:19:50,451 INFO L226 Difference]: Without dead ends: 595 [2019-12-07 21:19:50,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:19:50,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 595 states. [2019-12-07 21:19:50,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 595 to 595. [2019-12-07 21:19:50,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 595 states. [2019-12-07 21:19:50,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 595 states to 595 states and 1322 transitions. [2019-12-07 21:19:50,456 INFO L78 Accepts]: Start accepts. Automaton has 595 states and 1322 transitions. Word has length 59 [2019-12-07 21:19:50,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:50,456 INFO L462 AbstractCegarLoop]: Abstraction has 595 states and 1322 transitions. [2019-12-07 21:19:50,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:19:50,456 INFO L276 IsEmpty]: Start isEmpty. Operand 595 states and 1322 transitions. [2019-12-07 21:19:50,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 21:19:50,457 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,457 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:50,457 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1632162753, now seen corresponding path program 2 times [2019-12-07 21:19:50,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118853919] [2019-12-07 21:19:50,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,494 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [118853919] [2019-12-07 21:19:50,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,494 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:19:50,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044810300] [2019-12-07 21:19:50,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:19:50,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:19:50,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:50,495 INFO L87 Difference]: Start difference. First operand 595 states and 1322 transitions. Second operand 3 states. [2019-12-07 21:19:50,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:50,505 INFO L93 Difference]: Finished difference Result 572 states and 1242 transitions. [2019-12-07 21:19:50,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:19:50,505 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 21:19:50,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:50,506 INFO L225 Difference]: With dead ends: 572 [2019-12-07 21:19:50,506 INFO L226 Difference]: Without dead ends: 572 [2019-12-07 21:19:50,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:50,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2019-12-07 21:19:50,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 572. [2019-12-07 21:19:50,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 572 states. [2019-12-07 21:19:50,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 572 states to 572 states and 1242 transitions. [2019-12-07 21:19:50,513 INFO L78 Accepts]: Start accepts. Automaton has 572 states and 1242 transitions. Word has length 59 [2019-12-07 21:19:50,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:50,513 INFO L462 AbstractCegarLoop]: Abstraction has 572 states and 1242 transitions. [2019-12-07 21:19:50,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:19:50,514 INFO L276 IsEmpty]: Start isEmpty. Operand 572 states and 1242 transitions. [2019-12-07 21:19:50,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 21:19:50,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:50,515 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,515 INFO L82 PathProgramCache]: Analyzing trace with hash 1384719400, now seen corresponding path program 1 times [2019-12-07 21:19:50,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110052992] [2019-12-07 21:19:50,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110052992] [2019-12-07 21:19:50,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 21:19:50,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [731345685] [2019-12-07 21:19:50,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 21:19:50,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 21:19:50,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 21:19:50,741 INFO L87 Difference]: Start difference. First operand 572 states and 1242 transitions. Second operand 13 states. [2019-12-07 21:19:51,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:51,089 INFO L93 Difference]: Finished difference Result 909 states and 1982 transitions. [2019-12-07 21:19:51,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 21:19:51,089 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 60 [2019-12-07 21:19:51,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:51,090 INFO L225 Difference]: With dead ends: 909 [2019-12-07 21:19:51,090 INFO L226 Difference]: Without dead ends: 875 [2019-12-07 21:19:51,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=94, Invalid=368, Unknown=0, NotChecked=0, Total=462 [2019-12-07 21:19:51,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 875 states. [2019-12-07 21:19:51,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 875 to 752. [2019-12-07 21:19:51,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 752 states. [2019-12-07 21:19:51,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 752 states to 752 states and 1641 transitions. [2019-12-07 21:19:51,097 INFO L78 Accepts]: Start accepts. Automaton has 752 states and 1641 transitions. Word has length 60 [2019-12-07 21:19:51,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:51,098 INFO L462 AbstractCegarLoop]: Abstraction has 752 states and 1641 transitions. [2019-12-07 21:19:51,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 21:19:51,098 INFO L276 IsEmpty]: Start isEmpty. Operand 752 states and 1641 transitions. [2019-12-07 21:19:51,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 21:19:51,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:51,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:51,099 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:51,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:51,099 INFO L82 PathProgramCache]: Analyzing trace with hash -713679046, now seen corresponding path program 2 times [2019-12-07 21:19:51,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:51,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2133868479] [2019-12-07 21:19:51,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:51,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:51,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:51,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2133868479] [2019-12-07 21:19:51,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:51,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 21:19:51,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [548058023] [2019-12-07 21:19:51,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 21:19:51,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:51,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 21:19:51,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 21:19:51,389 INFO L87 Difference]: Start difference. First operand 752 states and 1641 transitions. Second operand 15 states. [2019-12-07 21:19:51,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:51,925 INFO L93 Difference]: Finished difference Result 1016 states and 2202 transitions. [2019-12-07 21:19:51,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 21:19:51,925 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 60 [2019-12-07 21:19:51,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:51,926 INFO L225 Difference]: With dead ends: 1016 [2019-12-07 21:19:51,926 INFO L226 Difference]: Without dead ends: 980 [2019-12-07 21:19:51,926 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=160, Invalid=710, Unknown=0, NotChecked=0, Total=870 [2019-12-07 21:19:51,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 980 states. [2019-12-07 21:19:51,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 980 to 760. [2019-12-07 21:19:51,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 760 states. [2019-12-07 21:19:51,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 760 states to 760 states and 1659 transitions. [2019-12-07 21:19:51,933 INFO L78 Accepts]: Start accepts. Automaton has 760 states and 1659 transitions. Word has length 60 [2019-12-07 21:19:51,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:51,933 INFO L462 AbstractCegarLoop]: Abstraction has 760 states and 1659 transitions. [2019-12-07 21:19:51,933 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 21:19:51,933 INFO L276 IsEmpty]: Start isEmpty. Operand 760 states and 1659 transitions. [2019-12-07 21:19:51,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 21:19:51,934 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:51,934 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:51,934 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:51,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:51,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1887301962, now seen corresponding path program 3 times [2019-12-07 21:19:51,934 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:51,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [759317036] [2019-12-07 21:19:51,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:51,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:52,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:52,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [759317036] [2019-12-07 21:19:52,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:52,174 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 21:19:52,174 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19356207] [2019-12-07 21:19:52,174 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 21:19:52,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:52,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 21:19:52,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2019-12-07 21:19:52,175 INFO L87 Difference]: Start difference. First operand 760 states and 1659 transitions. Second operand 17 states. [2019-12-07 21:19:52,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:52,908 INFO L93 Difference]: Finished difference Result 1420 states and 3121 transitions. [2019-12-07 21:19:52,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 21:19:52,908 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 60 [2019-12-07 21:19:52,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:52,909 INFO L225 Difference]: With dead ends: 1420 [2019-12-07 21:19:52,909 INFO L226 Difference]: Without dead ends: 1386 [2019-12-07 21:19:52,910 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=185, Invalid=937, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 21:19:52,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1386 states. [2019-12-07 21:19:52,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1386 to 772. [2019-12-07 21:19:52,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 772 states. [2019-12-07 21:19:52,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 772 states to 772 states and 1687 transitions. [2019-12-07 21:19:52,917 INFO L78 Accepts]: Start accepts. Automaton has 772 states and 1687 transitions. Word has length 60 [2019-12-07 21:19:52,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:52,917 INFO L462 AbstractCegarLoop]: Abstraction has 772 states and 1687 transitions. [2019-12-07 21:19:52,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 21:19:52,917 INFO L276 IsEmpty]: Start isEmpty. Operand 772 states and 1687 transitions. [2019-12-07 21:19:52,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 21:19:52,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:52,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:52,918 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:52,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:52,918 INFO L82 PathProgramCache]: Analyzing trace with hash -1448363402, now seen corresponding path program 4 times [2019-12-07 21:19:52,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:52,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503198641] [2019-12-07 21:19:52,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:52,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:53,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:53,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503198641] [2019-12-07 21:19:53,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:53,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 21:19:53,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340949575] [2019-12-07 21:19:53,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 21:19:53,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:53,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 21:19:53,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 21:19:53,122 INFO L87 Difference]: Start difference. First operand 772 states and 1687 transitions. Second operand 14 states. [2019-12-07 21:19:53,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:53,492 INFO L93 Difference]: Finished difference Result 1001 states and 2163 transitions. [2019-12-07 21:19:53,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 21:19:53,492 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-07 21:19:53,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:53,493 INFO L225 Difference]: With dead ends: 1001 [2019-12-07 21:19:53,493 INFO L226 Difference]: Without dead ends: 967 [2019-12-07 21:19:53,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=520, Unknown=0, NotChecked=0, Total=650 [2019-12-07 21:19:53,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 967 states. [2019-12-07 21:19:53,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 967 to 776. [2019-12-07 21:19:53,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 776 states. [2019-12-07 21:19:53,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 776 states to 776 states and 1695 transitions. [2019-12-07 21:19:53,503 INFO L78 Accepts]: Start accepts. Automaton has 776 states and 1695 transitions. Word has length 60 [2019-12-07 21:19:53,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:53,503 INFO L462 AbstractCegarLoop]: Abstraction has 776 states and 1695 transitions. [2019-12-07 21:19:53,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 21:19:53,503 INFO L276 IsEmpty]: Start isEmpty. Operand 776 states and 1695 transitions. [2019-12-07 21:19:53,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 21:19:53,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:53,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:53,505 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:53,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:53,505 INFO L82 PathProgramCache]: Analyzing trace with hash 483952232, now seen corresponding path program 5 times [2019-12-07 21:19:53,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:53,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212900030] [2019-12-07 21:19:53,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:53,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:19:53,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:19:53,579 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 21:19:53,579 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 21:19:53,582 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21|) |v_ULTIMATE.start_main_~#t1149~0.offset_16| 0))) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1149~0.base_21|) (= v_~z$r_buff0_thd2~0_135 0) (= 0 v_~z$r_buff1_thd3~0_221) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21| 1)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21|)) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| 4) |v_#length_27|) (= 0 v_~z$r_buff1_thd4~0_193) (= 0 |v_ULTIMATE.start_main_~#t1149~0.offset_16|) (= v_~z$w_buff0~0_113 0) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_21|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_22|, ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_~#t1149~0.offset=|v_ULTIMATE.start_main_~#t1149~0.offset_16|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_16|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1149~0.base=|v_ULTIMATE.start_main_~#t1149~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_16|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1151~0.base, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1152~0.base, ULTIMATE.start_main_~#t1150~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1150~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1149~0.offset, ULTIMATE.start_main_~#t1152~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1149~0.base, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1151~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:19:53,582 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1150~0.base_12| 0)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1150~0.offset_10| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1150~0.base_12|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12|) |v_ULTIMATE.start_main_~#t1150~0.offset_10| 1)) |v_#memory_int_21|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12| 1)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1150~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1150~0.base] because there is no mapped edge [2019-12-07 21:19:53,583 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1151~0.offset_8|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8|) |v_ULTIMATE.start_main_~#t1151~0.offset_8| 2)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1151~0.base_8|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1151~0.base_8|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| 4)) (= (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8|) 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_8|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1151~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1151~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 21:19:53,583 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1152~0.base_12|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12|) |v_ULTIMATE.start_main_~#t1152~0.offset_10| 3)) |v_#memory_int_23|) (= |v_ULTIMATE.start_main_~#t1152~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1152~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1152~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1152~0.base] because there is no mapped edge [2019-12-07 21:19:53,584 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~z$r_buff1_thd3~0_Out2049038153 ~z$r_buff0_thd3~0_In2049038153) (= ~__unbuffered_p3_EAX~0_Out2049038153 ~a~0_Out2049038153) (= 1 ~a~0_Out2049038153) (not (= P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153 0)) (= ~z$r_buff0_thd1~0_In2049038153 ~z$r_buff1_thd1~0_Out2049038153) (= ~__unbuffered_p3_EBX~0_Out2049038153 ~b~0_In2049038153) (= ~z$r_buff0_thd4~0_Out2049038153 1) (= ~z$r_buff0_thd4~0_In2049038153 ~z$r_buff1_thd4~0_Out2049038153) (= ~z$r_buff0_thd2~0_In2049038153 ~z$r_buff1_thd2~0_Out2049038153) (= ~z$r_buff1_thd0~0_Out2049038153 ~z$r_buff0_thd0~0_In2049038153)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2049038153, ~b~0=~b~0_In2049038153, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2049038153, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2049038153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2049038153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2049038153} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out2049038153, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2049038153, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2049038153, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out2049038153, ~a~0=~a~0_Out2049038153, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2049038153, ~b~0=~b~0_In2049038153, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2049038153, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2049038153, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out2049038153, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2049038153, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2049038153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2049038153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2049038153} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 21:19:53,584 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 21:19:53,585 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 21:19:53,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In1652636296 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1652636296 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out1652636296|) (not .cse0) (not .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out1652636296| ~z$w_buff0_used~0_In1652636296) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1652636296, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1652636296} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1652636296, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1652636296, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1652636296|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 21:19:53,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-459337520 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-459337520 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In-459337520 |P2Thread1of1ForFork2_#t~ite3_Out-459337520|)) (and (= ~z$w_buff1~0_In-459337520 |P2Thread1of1ForFork2_#t~ite3_Out-459337520|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-459337520, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-459337520, ~z$w_buff1~0=~z$w_buff1~0_In-459337520, ~z~0=~z~0_In-459337520} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-459337520|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-459337520, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-459337520, ~z$w_buff1~0=~z$w_buff1~0_In-459337520, ~z~0=~z~0_In-459337520} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:19:53,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 21:19:53,586 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1698118909 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1698118909 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1698118909 |P2Thread1of1ForFork2_#t~ite5_Out1698118909|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out1698118909|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1698118909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1698118909} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out1698118909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1698118909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1698118909} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 21:19:53,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1384290115 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1384290115 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1384290115 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1384290115 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1384290115 |P2Thread1of1ForFork2_#t~ite6_Out-1384290115|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1384290115|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1384290115, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1384290115, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1384290115, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1384290115} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1384290115|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1384290115, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1384290115, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1384290115, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1384290115} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 21:19:53,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1549007579 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1549007579 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1549007579| ~z$r_buff0_thd3~0_In1549007579)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1549007579| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1549007579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1549007579} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1549007579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1549007579, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1549007579|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 21:19:53,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-2089957058 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-2089957058 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-2089957058 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2089957058 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite8_Out-2089957058| ~z$r_buff1_thd3~0_In-2089957058) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite8_Out-2089957058| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2089957058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2089957058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2089957058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2089957058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2089957058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2089957058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2089957058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2089957058, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-2089957058|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:19:53,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:19:53,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd4~0_In-691009542 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-691009542 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-691009542 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-691009542 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-691009542 |P3Thread1of1ForFork3_#t~ite12_Out-691009542|)) (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-691009542|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-691009542, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-691009542, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-691009542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-691009542} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-691009542, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-691009542, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-691009542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-691009542, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-691009542|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 21:19:53,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In544928346 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In544928346 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_Out544928346 ~z$r_buff0_thd4~0_In544928346))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd4~0_Out544928346 0) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In544928346, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In544928346} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In544928346, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out544928346, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out544928346|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 21:19:53,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd4~0_In-1924902558 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1924902558 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1924902558 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1924902558 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite14_Out-1924902558| 0)) (and (= ~z$r_buff1_thd4~0_In-1924902558 |P3Thread1of1ForFork3_#t~ite14_Out-1924902558|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1924902558, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1924902558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1924902558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1924902558} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1924902558, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1924902558, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1924902558|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1924902558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1924902558} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 21:19:53,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 21:19:53,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 21:19:53,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-1198860939 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1198860939| |ULTIMATE.start_main_#t~ite20_Out-1198860939|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1198860939 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1198860939 |ULTIMATE.start_main_#t~ite19_Out-1198860939|)) (and (not .cse1) .cse0 (= ~z$w_buff1~0_In-1198860939 |ULTIMATE.start_main_#t~ite19_Out-1198860939|) (not .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1198860939, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1198860939, ~z$w_buff1~0=~z$w_buff1~0_In-1198860939, ~z~0=~z~0_In-1198860939} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1198860939|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1198860939, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1198860939, ~z$w_buff1~0=~z$w_buff1~0_In-1198860939, ~z~0=~z~0_In-1198860939, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1198860939|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 21:19:53,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1535996969 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1535996969 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1535996969|)) (and (= |ULTIMATE.start_main_#t~ite21_Out1535996969| ~z$w_buff0_used~0_In1535996969) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1535996969, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1535996969} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1535996969, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1535996969, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1535996969|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 21:19:53,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-351854040 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-351854040 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-351854040 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-351854040 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-351854040 |ULTIMATE.start_main_#t~ite22_Out-351854040|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-351854040| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-351854040, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-351854040, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-351854040, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351854040} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-351854040, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-351854040, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-351854040, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351854040, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-351854040|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 21:19:53,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2128996647 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-2128996647 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite23_Out-2128996647| 0)) (and (= ~z$r_buff0_thd0~0_In-2128996647 |ULTIMATE.start_main_#t~ite23_Out-2128996647|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2128996647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2128996647} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2128996647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2128996647, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-2128996647|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 21:19:53,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1124203111 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1124203111 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1124203111 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1124203111 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out-1124203111| 0)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In-1124203111 |ULTIMATE.start_main_#t~ite24_Out-1124203111|) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1124203111, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1124203111, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1124203111, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1124203111} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1124203111, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1124203111, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1124203111, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1124203111|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1124203111} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 21:19:53,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1291782453 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_In-1291782453| |ULTIMATE.start_main_#t~ite36_Out-1291782453|) (= |ULTIMATE.start_main_#t~ite37_Out-1291782453| ~z$w_buff0_used~0_In-1291782453) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite36_Out-1291782453| ~z$w_buff0_used~0_In-1291782453) (= |ULTIMATE.start_main_#t~ite37_Out-1291782453| |ULTIMATE.start_main_#t~ite36_Out-1291782453|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1291782453 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-1291782453 256)) (and (= 0 (mod ~z$w_buff1_used~0_In-1291782453 256)) .cse1) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1291782453 256)))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1291782453, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1291782453, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1291782453, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1291782453, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-1291782453|, ~weak$$choice2~0=~weak$$choice2~0_In-1291782453} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1291782453, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1291782453, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1291782453, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1291782453, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1291782453|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1291782453|, ~weak$$choice2~0=~weak$$choice2~0_In-1291782453} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 21:19:53,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1360458393 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite39_In1360458393| |ULTIMATE.start_main_#t~ite39_Out1360458393|) (= ~z$w_buff1_used~0_In1360458393 |ULTIMATE.start_main_#t~ite40_Out1360458393|) (not .cse0)) (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1360458393 256)))) (or (and (= (mod ~z$w_buff1_used~0_In1360458393 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1360458393 256) 0) (and (= 0 (mod ~z$r_buff1_thd0~0_In1360458393 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite40_Out1360458393| |ULTIMATE.start_main_#t~ite39_Out1360458393|) (= ~z$w_buff1_used~0_In1360458393 |ULTIMATE.start_main_#t~ite39_Out1360458393|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1360458393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1360458393, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1360458393|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1360458393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1360458393, ~weak$$choice2~0=~weak$$choice2~0_In1360458393} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1360458393, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1360458393|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1360458393|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1360458393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1360458393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1360458393, ~weak$$choice2~0=~weak$$choice2~0_In1360458393} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 21:19:53,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 21:19:53,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:19:53,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 21:19:53,651 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 09:19:53 BasicIcfg [2019-12-07 21:19:53,651 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 21:19:53,652 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 21:19:53,652 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 21:19:53,652 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 21:19:53,652 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:22" (3/4) ... [2019-12-07 21:19:53,654 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 21:19:53,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= v_~z$r_buff1_thd1~0_136 0) (= 0 v_~__unbuffered_p3_EBX~0_151) (= |v_#memory_int_27| (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1149~0.base_21|) |v_ULTIMATE.start_main_~#t1149~0.offset_16| 0))) (= 0 v_~__unbuffered_p0_EAX~0_45) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~__unbuffered_p3_EAX~0_151 0) (= v_~__unbuffered_cnt~0_172 0) (= v_~main$tmp_guard0~0_29 0) (= v_~z$r_buff1_thd0~0_320 0) (= v_~y~0_38 0) (= v_~z$w_buff1~0_115 0) (= 0 v_~weak$$choice0~0_17) (= v_~z$mem_tmp~0_24 0) (= v_~z$read_delayed~0_5 0) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1149~0.base_21|) (= v_~z$r_buff0_thd2~0_135 0) (= 0 v_~z$r_buff1_thd3~0_221) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21| 1)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$r_buff1_thd2~0_136 0) (= v_~z$w_buff1_used~0_340 0) (= v_~main$tmp_guard1~0_28 0) (= 0 v_~z$flush_delayed~0_43) (= v_~z$w_buff0_used~0_571 0) (= v_~b~0_164 0) (= 0 v_~z$r_buff0_thd3~0_200) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1149~0.base_21|)) (< 0 |v_#StackHeapBarrier_20|) (= 0 |v_#NULL.base_7|) (= v_~z~0_188 0) (= v_~weak$$choice2~0_123 0) (= v_~a~0_136 0) (= v_~z$r_buff0_thd0~0_374 0) (= v_~z$r_buff0_thd1~0_137 0) (= 0 v_~__unbuffered_p1_EAX~0_36) (= (store |v_#length_28| |v_ULTIMATE.start_main_~#t1149~0.base_21| 4) |v_#length_27|) (= 0 v_~z$r_buff1_thd4~0_193) (= 0 |v_ULTIMATE.start_main_~#t1149~0.offset_16|) (= v_~z$w_buff0~0_113 0) (= v_~x~0_47 0) (= 0 v_~z$r_buff0_thd4~0_323))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_80|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_136, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_35|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_27|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_16|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_49|, ~a~0=v_~a~0_136, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_45, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_36, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_323, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_151, #length=|v_#length_27|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_73|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_105|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_21|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_340, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_192|, ~z$flush_delayed~0=v_~z$flush_delayed~0_43, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_44|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_136, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_200, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_172, ~x~0=v_~x~0_47, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_22|, ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_193, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_27|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_35|, ~z$w_buff1~0=v_~z$w_buff1~0_115, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_42|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_22|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_32|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_22|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_35|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_33|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_320, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_26|, ~y~0=v_~y~0_38, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_135, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_571, ~z$w_buff0~0=v_~z$w_buff0~0_113, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_26|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_221, ULTIMATE.start_main_~#t1149~0.offset=|v_ULTIMATE.start_main_~#t1149~0.offset_16|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_16|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_120|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_30|, ULTIMATE.start_main_~#t1149~0.base=|v_ULTIMATE.start_main_~#t1149~0.base_21|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_151, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_34|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_27|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_24|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_16|, ~b~0=v_~b~0_164, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_15|, ~z~0=v_~z~0_188, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t1151~0.base, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1152~0.base, ULTIMATE.start_main_~#t1150~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t1150~0.base, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t1149~0.offset, ULTIMATE.start_main_~#t1152~0.offset, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t1149~0.base, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1151~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:19:53,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L835-1-->L837: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1150~0.base_12| 0)) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1150~0.offset_10| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1150~0.base_12|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1150~0.base_12|) |v_ULTIMATE.start_main_~#t1150~0.offset_10| 1)) |v_#memory_int_21|) (= |v_#valid_44| (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1150~0.base_12| 1)) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1150~0.base_12| 4) |v_#length_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1150~0.offset=|v_ULTIMATE.start_main_~#t1150~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1150~0.base=|v_ULTIMATE.start_main_~#t1150~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1150~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1150~0.base] because there is no mapped edge [2019-12-07 21:19:53,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L837-1-->L839: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1151~0.offset_8|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1151~0.base_8|) |v_ULTIMATE.start_main_~#t1151~0.offset_8| 2)) |v_#memory_int_17|) (not (= 0 |v_ULTIMATE.start_main_~#t1151~0.base_8|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1151~0.base_8|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1151~0.base_8| 4)) (= (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8|) 0) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1151~0.base_8| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1151~0.offset=|v_ULTIMATE.start_main_~#t1151~0.offset_8|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1151~0.base=|v_ULTIMATE.start_main_~#t1151~0.base_8|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1151~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1151~0.base, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 21:19:53,655 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L839-1-->L841: Formula: (and (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1152~0.base_12|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1152~0.base_12|) |v_ULTIMATE.start_main_~#t1152~0.offset_10| 3)) |v_#memory_int_23|) (= |v_ULTIMATE.start_main_~#t1152~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1152~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1152~0.base_12| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12| 1)) (= (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1152~0.base_12|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1152~0.offset=|v_ULTIMATE.start_main_~#t1152~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|, ULTIMATE.start_main_~#t1152~0.base=|v_ULTIMATE.start_main_~#t1152~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1152~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1152~0.base] because there is no mapped edge [2019-12-07 21:19:53,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L4-->L812: Formula: (and (= ~z$r_buff1_thd3~0_Out2049038153 ~z$r_buff0_thd3~0_In2049038153) (= ~__unbuffered_p3_EAX~0_Out2049038153 ~a~0_Out2049038153) (= 1 ~a~0_Out2049038153) (not (= P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153 0)) (= ~z$r_buff0_thd1~0_In2049038153 ~z$r_buff1_thd1~0_Out2049038153) (= ~__unbuffered_p3_EBX~0_Out2049038153 ~b~0_In2049038153) (= ~z$r_buff0_thd4~0_Out2049038153 1) (= ~z$r_buff0_thd4~0_In2049038153 ~z$r_buff1_thd4~0_Out2049038153) (= ~z$r_buff0_thd2~0_In2049038153 ~z$r_buff1_thd2~0_Out2049038153) (= ~z$r_buff1_thd0~0_Out2049038153 ~z$r_buff0_thd0~0_In2049038153)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2049038153, ~b~0=~b~0_In2049038153, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2049038153, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2049038153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2049038153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2049038153} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In2049038153, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out2049038153, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out2049038153, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out2049038153, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out2049038153, ~a~0=~a~0_Out2049038153, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2049038153, ~b~0=~b~0_In2049038153, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out2049038153, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out2049038153, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out2049038153, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2049038153, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2049038153, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2049038153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2049038153} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 21:19:53,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] P0ENTRY-->P0EXIT: Formula: (and (= v_P0Thread1of1ForFork0_~arg.base_18 |v_P0Thread1of1ForFork0_#in~arg.base_20|) (= v_P0Thread1of1ForFork0_~arg.offset_18 |v_P0Thread1of1ForFork0_#in~arg.offset_20|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x~0_33 v_~__unbuffered_p0_EAX~0_26) (= v_~b~0_72 1) (= v_~__unbuffered_cnt~0_115 (+ v_~__unbuffered_cnt~0_116 1))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_116, ~x~0=v_~x~0_33} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_20|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_26, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, ~b~0=v_~b~0_72, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_20|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_115, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_18, ~x~0=v_~x~0_33, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_18} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 21:19:53,656 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] P1ENTRY-->P1EXIT: Formula: (and (= v_P1Thread1of1ForFork1_~arg.offset_8 |v_P1Thread1of1ForFork1_#in~arg.offset_10|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_P1Thread1of1ForFork1_~arg.base_8 |v_P1Thread1of1ForFork1_#in~arg.base_10|) (= v_~y~0_25 v_~__unbuffered_p1_EAX~0_14) (= v_~x~0_18 1) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y~0=v_~y~0_25} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_8, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_14, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_8, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_10|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, ~y~0=v_~y~0_25, ~x~0=v_~x~0_18, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 21:19:53,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd4~0_In1652636296 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1652636296 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite11_Out1652636296|) (not .cse0) (not .cse1)) (and (= |P3Thread1of1ForFork3_#t~ite11_Out1652636296| ~z$w_buff0_used~0_In1652636296) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1652636296, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1652636296} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1652636296, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1652636296, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out1652636296|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 21:19:53,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-459337520 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-459337520 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In-459337520 |P2Thread1of1ForFork2_#t~ite3_Out-459337520|)) (and (= ~z$w_buff1~0_In-459337520 |P2Thread1of1ForFork2_#t~ite3_Out-459337520|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-459337520, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-459337520, ~z$w_buff1~0=~z$w_buff1~0_In-459337520, ~z~0=~z~0_In-459337520} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-459337520|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-459337520, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-459337520, ~z$w_buff1~0=~z$w_buff1~0_In-459337520, ~z~0=~z~0_In-459337520} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:19:53,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_18 |v_P2Thread1of1ForFork2_#t~ite3_6|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_6|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_5|, ~z~0=v_~z~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 21:19:53,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1698118909 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1698118909 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1698118909 |P2Thread1of1ForFork2_#t~ite5_Out1698118909|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite5_Out1698118909|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1698118909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1698118909} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out1698118909|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1698118909, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1698118909} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 21:19:53,657 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1384290115 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1384290115 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1384290115 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-1384290115 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1384290115 |P2Thread1of1ForFork2_#t~ite6_Out-1384290115|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite6_Out-1384290115|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1384290115, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1384290115, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1384290115, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1384290115} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out-1384290115|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1384290115, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1384290115, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1384290115, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1384290115} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 21:19:53,658 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1549007579 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1549007579 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1549007579| ~z$r_buff0_thd3~0_In1549007579)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite7_Out1549007579| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1549007579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1549007579} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1549007579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1549007579, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1549007579|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 21:19:53,658 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-2089957058 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-2089957058 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-2089957058 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-2089957058 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite8_Out-2089957058| ~z$r_buff1_thd3~0_In-2089957058) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P2Thread1of1ForFork2_#t~ite8_Out-2089957058| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2089957058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2089957058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2089957058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2089957058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2089957058, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2089957058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2089957058, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2089957058, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-2089957058|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:19:53,658 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L780-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork2_#t~ite8_42| v_~z$r_buff1_thd3~0_114) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_83 1) v_~__unbuffered_cnt~0_82)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_83, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_42|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_114, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_41|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd4~0_In-691009542 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-691009542 256))) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-691009542 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-691009542 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-691009542 |P3Thread1of1ForFork3_#t~ite12_Out-691009542|)) (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-691009542|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-691009542, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-691009542, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-691009542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-691009542} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-691009542, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-691009542, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-691009542, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-691009542, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-691009542|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In544928346 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In544928346 256) 0)) (.cse1 (= ~z$r_buff0_thd4~0_Out544928346 ~z$r_buff0_thd4~0_In544928346))) (or (and .cse0 .cse1) (and (not .cse0) (= ~z$r_buff0_thd4~0_Out544928346 0) (not .cse2)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In544928346, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In544928346} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In544928346, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out544928346, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out544928346|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd4~0_In-1924902558 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1924902558 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1924902558 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd4~0_In-1924902558 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork3_#t~ite14_Out-1924902558| 0)) (and (= ~z$r_buff1_thd4~0_In-1924902558 |P3Thread1of1ForFork3_#t~ite14_Out-1924902558|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1924902558, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1924902558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1924902558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1924902558} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1924902558, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1924902558, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1924902558|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1924902558, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1924902558} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_46| v_~z$r_buff1_thd4~0_102) (= v_~__unbuffered_cnt~0_106 (+ v_~__unbuffered_cnt~0_107 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_46|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_107} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_102, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_45|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_106, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= 0 (mod v_~z$w_buff0_used~0_79 256)) (= (mod v_~z$r_buff0_thd0~0_53 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_53, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_79, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 21:19:53,659 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In-1198860939 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite19_Out-1198860939| |ULTIMATE.start_main_#t~ite20_Out-1198860939|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1198860939 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In-1198860939 |ULTIMATE.start_main_#t~ite19_Out-1198860939|)) (and (not .cse1) .cse0 (= ~z$w_buff1~0_In-1198860939 |ULTIMATE.start_main_#t~ite19_Out-1198860939|) (not .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1198860939, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1198860939, ~z$w_buff1~0=~z$w_buff1~0_In-1198860939, ~z~0=~z~0_In-1198860939} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1198860939|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1198860939, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1198860939, ~z$w_buff1~0=~z$w_buff1~0_In-1198860939, ~z~0=~z~0_In-1198860939, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1198860939|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 21:19:53,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In1535996969 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1535996969 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1535996969|)) (and (= |ULTIMATE.start_main_#t~ite21_Out1535996969| ~z$w_buff0_used~0_In1535996969) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1535996969, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1535996969} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1535996969, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1535996969, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1535996969|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 21:19:53,660 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd0~0_In-351854040 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-351854040 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-351854040 256))) (.cse2 (= (mod ~z$r_buff0_thd0~0_In-351854040 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-351854040 |ULTIMATE.start_main_#t~ite22_Out-351854040|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out-351854040| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-351854040, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-351854040, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-351854040, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351854040} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-351854040, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-351854040, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-351854040, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351854040, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-351854040|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 21:19:53,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-2128996647 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-2128996647 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite23_Out-2128996647| 0)) (and (= ~z$r_buff0_thd0~0_In-2128996647 |ULTIMATE.start_main_#t~ite23_Out-2128996647|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2128996647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2128996647} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2128996647, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2128996647, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-2128996647|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 21:19:53,661 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1124203111 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1124203111 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1124203111 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1124203111 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite24_Out-1124203111| 0)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In-1124203111 |ULTIMATE.start_main_#t~ite24_Out-1124203111|) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1124203111, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1124203111, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1124203111, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1124203111} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1124203111, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1124203111, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1124203111, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1124203111|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1124203111} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 21:19:53,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L861-->L861-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1291782453 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite36_In-1291782453| |ULTIMATE.start_main_#t~ite36_Out-1291782453|) (= |ULTIMATE.start_main_#t~ite37_Out-1291782453| ~z$w_buff0_used~0_In-1291782453) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite36_Out-1291782453| ~z$w_buff0_used~0_In-1291782453) (= |ULTIMATE.start_main_#t~ite37_Out-1291782453| |ULTIMATE.start_main_#t~ite36_Out-1291782453|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1291782453 256)))) (or (= 0 (mod ~z$w_buff0_used~0_In-1291782453 256)) (and (= 0 (mod ~z$w_buff1_used~0_In-1291782453 256)) .cse1) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1291782453 256)))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1291782453, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1291782453, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1291782453, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1291782453, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In-1291782453|, ~weak$$choice2~0=~weak$$choice2~0_In-1291782453} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1291782453, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1291782453, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1291782453, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1291782453, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-1291782453|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-1291782453|, ~weak$$choice2~0=~weak$$choice2~0_In-1291782453} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 21:19:53,663 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L862-->L862-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1360458393 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite39_In1360458393| |ULTIMATE.start_main_#t~ite39_Out1360458393|) (= ~z$w_buff1_used~0_In1360458393 |ULTIMATE.start_main_#t~ite40_Out1360458393|) (not .cse0)) (and .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1360458393 256)))) (or (and (= (mod ~z$w_buff1_used~0_In1360458393 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1360458393 256) 0) (and (= 0 (mod ~z$r_buff1_thd0~0_In1360458393 256)) .cse1))) (= |ULTIMATE.start_main_#t~ite40_Out1360458393| |ULTIMATE.start_main_#t~ite39_Out1360458393|) (= ~z$w_buff1_used~0_In1360458393 |ULTIMATE.start_main_#t~ite39_Out1360458393|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1360458393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1360458393, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1360458393|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1360458393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1360458393, ~weak$$choice2~0=~weak$$choice2~0_In1360458393} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1360458393, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1360458393|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1360458393|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1360458393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1360458393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1360458393, ~weak$$choice2~0=~weak$$choice2~0_In1360458393} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 21:19:53,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~z$r_buff0_thd0~0_79 v_~z$r_buff0_thd0~0_80)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_80, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_79, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_24, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 21:19:53,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (not (= (mod v_~z$flush_delayed~0_29 256) 0)) (= v_~z$mem_tmp~0_15 v_~z~0_103) (= 0 v_~z$flush_delayed~0_28)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_29} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_15, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_23|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~z~0=v_~z~0_103, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:19:53,664 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 21:19:53,718 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c73d76cc-f364-4ff0-8e3b-746d22ce6c87/bin/utaipan/witness.graphml [2019-12-07 21:19:53,719 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 21:19:53,719 INFO L168 Benchmark]: Toolchain (without parser) took 31806.54 ms. Allocated memory was 1.0 GB in the beginning and 4.4 GB in the end (delta: 3.4 GB). Free memory was 941.9 MB in the beginning and 1.2 GB in the end (delta: -216.4 MB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,720 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:19:53,720 INFO L168 Benchmark]: CACSL2BoogieTranslator took 387.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -130.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,720 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,720 INFO L168 Benchmark]: Boogie Preprocessor took 26.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,721 INFO L168 Benchmark]: RCFGBuilder took 389.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.3 MB). Peak memory consumption was 50.3 MB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,721 INFO L168 Benchmark]: TraceAbstraction took 30891.91 ms. Allocated memory was 1.1 GB in the beginning and 4.4 GB in the end (delta: 3.3 GB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -201.5 MB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,721 INFO L168 Benchmark]: Witness Printer took 67.01 ms. Allocated memory is still 4.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 54.0 MB). Peak memory consumption was 54.0 MB. Max. memory is 11.5 GB. [2019-12-07 21:19:53,723 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 387.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.4 MB). Free memory was 941.9 MB in the beginning and 1.1 GB in the end (delta: -130.0 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 389.99 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.3 MB). Peak memory consumption was 50.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 30891.91 ms. Allocated memory was 1.1 GB in the beginning and 4.4 GB in the end (delta: 3.3 GB). Free memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: -201.5 MB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 67.01 ms. Allocated memory is still 4.4 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 54.0 MB). Peak memory consumption was 54.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 182 ProgramPointsBefore, 90 ProgramPointsAfterwards, 210 TransitionsBefore, 97 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 26 ChoiceCompositions, 4720 VarBasedMoverChecksPositive, 197 VarBasedMoverChecksNegative, 35 SemBasedMoverChecksPositive, 226 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 56592 CheckedPairsTotal, 126 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t1149, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1150, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1151, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t1152, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L790] 4 z$w_buff1 = z$w_buff0 [L791] 4 z$w_buff0 = 2 [L792] 4 z$w_buff1_used = z$w_buff0_used [L793] 4 z$w_buff0_used = (_Bool)1 [L812] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 y = 1 [L773] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L812] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L776] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L777] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L778] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L779] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L813] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L814] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L848] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L849] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L850] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L851] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L854] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L855] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L856] 0 z$flush_delayed = weak$$choice2 [L857] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L859] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L860] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L860] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L861] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L862] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L864] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L865] 0 main$tmp_guard1 = !(z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 30.7s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 8.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2909 SDtfs, 3978 SDslu, 9046 SDs, 0 SdLazy, 4622 SolverSat, 344 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 242 GetRequests, 22 SyntacticMatches, 11 SemanticMatches, 209 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 624 ImplicationChecksByTransitivity, 2.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=65578occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 13.9s AutomataMinimizationTime, 21 MinimizatonAttempts, 91259 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 881 NumberOfCodeBlocks, 881 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 800 ConstructedInterpolants, 0 QuantifiedInterpolants, 220699 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...