./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 59e2b1725c1502dd253eba1e4da61f4b0d63f61a ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 21:48:45,329 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 21:48:45,330 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 21:48:45,338 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 21:48:45,338 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 21:48:45,339 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 21:48:45,340 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 21:48:45,342 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 21:48:45,344 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 21:48:45,345 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 21:48:45,346 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 21:48:45,347 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 21:48:45,347 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 21:48:45,348 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 21:48:45,349 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 21:48:45,350 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 21:48:45,351 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 21:48:45,351 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 21:48:45,352 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 21:48:45,354 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 21:48:45,355 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 21:48:45,355 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 21:48:45,356 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 21:48:45,357 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 21:48:45,358 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 21:48:45,358 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 21:48:45,359 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 21:48:45,359 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 21:48:45,359 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 21:48:45,360 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 21:48:45,360 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 21:48:45,360 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 21:48:45,361 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 21:48:45,362 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 21:48:45,363 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 21:48:45,363 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 21:48:45,363 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 21:48:45,363 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 21:48:45,364 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 21:48:45,364 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 21:48:45,365 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 21:48:45,366 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 21:48:45,379 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 21:48:45,379 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 21:48:45,380 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 21:48:45,380 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 21:48:45,380 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 21:48:45,380 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 21:48:45,380 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 21:48:45,381 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 21:48:45,381 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 21:48:45,381 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 21:48:45,381 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 21:48:45,381 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 21:48:45,381 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 21:48:45,382 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 21:48:45,382 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 21:48:45,382 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 21:48:45,383 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 21:48:45,384 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 21:48:45,384 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 21:48:45,385 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 21:48:45,385 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 21:48:45,385 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:48:45,385 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 21:48:45,385 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 21:48:45,385 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 21:48:45,386 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 59e2b1725c1502dd253eba1e4da61f4b0d63f61a [2019-12-07 21:48:45,494 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 21:48:45,504 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 21:48:45,506 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 21:48:45,507 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 21:48:45,508 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 21:48:45,508 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i [2019-12-07 21:48:45,552 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/data/31008e765/790ed1604f664c4ba1934e924b9232d1/FLAGbed78b7a4 [2019-12-07 21:48:46,025 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 21:48:46,026 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/sv-benchmarks/c/pthread-wmm/mix045_pso.opt.i [2019-12-07 21:48:46,036 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/data/31008e765/790ed1604f664c4ba1934e924b9232d1/FLAGbed78b7a4 [2019-12-07 21:48:46,045 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/data/31008e765/790ed1604f664c4ba1934e924b9232d1 [2019-12-07 21:48:46,047 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 21:48:46,048 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 21:48:46,049 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 21:48:46,049 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 21:48:46,051 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 21:48:46,052 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,053 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46, skipping insertion in model container [2019-12-07 21:48:46,054 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,059 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 21:48:46,087 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 21:48:46,322 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:48:46,330 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 21:48:46,373 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:48:46,420 INFO L208 MainTranslator]: Completed translation [2019-12-07 21:48:46,421 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46 WrapperNode [2019-12-07 21:48:46,421 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 21:48:46,422 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 21:48:46,422 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 21:48:46,422 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 21:48:46,428 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,440 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,462 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 21:48:46,462 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 21:48:46,463 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 21:48:46,463 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 21:48:46,469 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,469 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,473 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,473 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,480 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,483 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,485 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... [2019-12-07 21:48:46,488 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 21:48:46,489 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 21:48:46,489 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 21:48:46,489 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 21:48:46,490 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:48:46,534 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 21:48:46,535 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 21:48:46,535 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 21:48:46,535 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 21:48:46,535 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 21:48:46,535 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 21:48:46,535 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 21:48:46,535 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 21:48:46,536 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 21:48:46,536 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 21:48:46,536 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 21:48:46,536 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 21:48:46,536 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 21:48:46,537 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 21:48:46,895 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 21:48:46,895 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 21:48:46,896 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:46 BoogieIcfgContainer [2019-12-07 21:48:46,896 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 21:48:46,897 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 21:48:46,897 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 21:48:46,899 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 21:48:46,900 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 09:48:46" (1/3) ... [2019-12-07 21:48:46,900 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@397a3959 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:48:46, skipping insertion in model container [2019-12-07 21:48:46,900 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:48:46" (2/3) ... [2019-12-07 21:48:46,900 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@397a3959 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:48:46, skipping insertion in model container [2019-12-07 21:48:46,901 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:46" (3/3) ... [2019-12-07 21:48:46,902 INFO L109 eAbstractionObserver]: Analyzing ICFG mix045_pso.opt.i [2019-12-07 21:48:46,909 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 21:48:46,909 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 21:48:46,914 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 21:48:46,915 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,939 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,940 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,940 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,940 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,941 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,942 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,942 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,942 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,942 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,943 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,944 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,945 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,946 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,946 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,947 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,947 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,947 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,949 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,950 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,951 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:48:46,962 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 21:48:46,975 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 21:48:46,975 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 21:48:46,975 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 21:48:46,975 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 21:48:46,975 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 21:48:46,975 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 21:48:46,975 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 21:48:46,975 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 21:48:46,986 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 164 places, 195 transitions [2019-12-07 21:48:46,987 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 21:48:47,037 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 21:48:47,037 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:48:47,045 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 21:48:47,056 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 164 places, 195 transitions [2019-12-07 21:48:47,081 INFO L134 PetriNetUnfolder]: 41/192 cut-off events. [2019-12-07 21:48:47,082 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:48:47,086 INFO L76 FinitePrefix]: Finished finitePrefix Result has 202 conditions, 192 events. 41/192 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 469 event pairs. 9/158 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 21:48:47,097 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 21:48:47,098 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 21:48:49,939 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 21:48:50,023 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46792 [2019-12-07 21:48:50,023 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 21:48:50,025 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 82 places, 91 transitions [2019-12-07 21:48:50,715 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16134 states. [2019-12-07 21:48:50,717 INFO L276 IsEmpty]: Start isEmpty. Operand 16134 states. [2019-12-07 21:48:50,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 21:48:50,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:50,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:50,722 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:50,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:50,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1643101290, now seen corresponding path program 1 times [2019-12-07 21:48:50,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:50,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215930114] [2019-12-07 21:48:50,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:50,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:50,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:50,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215930114] [2019-12-07 21:48:50,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:50,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:48:50,886 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [540488021] [2019-12-07 21:48:50,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:50,889 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:50,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:50,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:50,899 INFO L87 Difference]: Start difference. First operand 16134 states. Second operand 3 states. [2019-12-07 21:48:51,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:51,113 INFO L93 Difference]: Finished difference Result 16034 states and 60310 transitions. [2019-12-07 21:48:51,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:51,114 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 21:48:51,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:51,274 INFO L225 Difference]: With dead ends: 16034 [2019-12-07 21:48:51,275 INFO L226 Difference]: Without dead ends: 15698 [2019-12-07 21:48:51,275 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:51,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15698 states. [2019-12-07 21:48:51,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15698 to 15698. [2019-12-07 21:48:51,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15698 states. [2019-12-07 21:48:51,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15698 states to 15698 states and 59106 transitions. [2019-12-07 21:48:51,773 INFO L78 Accepts]: Start accepts. Automaton has 15698 states and 59106 transitions. Word has length 7 [2019-12-07 21:48:51,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:51,774 INFO L462 AbstractCegarLoop]: Abstraction has 15698 states and 59106 transitions. [2019-12-07 21:48:51,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:51,774 INFO L276 IsEmpty]: Start isEmpty. Operand 15698 states and 59106 transitions. [2019-12-07 21:48:51,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 21:48:51,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:51,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:51,778 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:51,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:51,779 INFO L82 PathProgramCache]: Analyzing trace with hash 565568960, now seen corresponding path program 1 times [2019-12-07 21:48:51,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:51,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623230082] [2019-12-07 21:48:51,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:51,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:51,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:51,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623230082] [2019-12-07 21:48:51,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:51,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:51,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1153017147] [2019-12-07 21:48:51,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:48:51,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:51,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:48:51,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:51,870 INFO L87 Difference]: Start difference. First operand 15698 states and 59106 transitions. Second operand 4 states. [2019-12-07 21:48:52,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:52,200 INFO L93 Difference]: Finished difference Result 24414 states and 88322 transitions. [2019-12-07 21:48:52,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:48:52,200 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 21:48:52,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:52,267 INFO L225 Difference]: With dead ends: 24414 [2019-12-07 21:48:52,267 INFO L226 Difference]: Without dead ends: 24400 [2019-12-07 21:48:52,268 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:52,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24400 states. [2019-12-07 21:48:52,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24400 to 22284. [2019-12-07 21:48:52,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22284 states. [2019-12-07 21:48:52,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22284 states to 22284 states and 81513 transitions. [2019-12-07 21:48:52,825 INFO L78 Accepts]: Start accepts. Automaton has 22284 states and 81513 transitions. Word has length 13 [2019-12-07 21:48:52,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:52,825 INFO L462 AbstractCegarLoop]: Abstraction has 22284 states and 81513 transitions. [2019-12-07 21:48:52,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:48:52,825 INFO L276 IsEmpty]: Start isEmpty. Operand 22284 states and 81513 transitions. [2019-12-07 21:48:52,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 21:48:52,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:52,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:52,828 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:52,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:52,828 INFO L82 PathProgramCache]: Analyzing trace with hash 1863901117, now seen corresponding path program 1 times [2019-12-07 21:48:52,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:52,828 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985663132] [2019-12-07 21:48:52,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:52,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:52,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:52,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985663132] [2019-12-07 21:48:52,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:52,884 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:52,884 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1827379682] [2019-12-07 21:48:52,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:48:52,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:52,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:48:52,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:52,885 INFO L87 Difference]: Start difference. First operand 22284 states and 81513 transitions. Second operand 4 states. [2019-12-07 21:48:53,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:53,128 INFO L93 Difference]: Finished difference Result 27604 states and 99705 transitions. [2019-12-07 21:48:53,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:48:53,129 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 21:48:53,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:53,176 INFO L225 Difference]: With dead ends: 27604 [2019-12-07 21:48:53,176 INFO L226 Difference]: Without dead ends: 27604 [2019-12-07 21:48:53,177 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:53,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27604 states. [2019-12-07 21:48:53,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27604 to 24754. [2019-12-07 21:48:53,597 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24754 states. [2019-12-07 21:48:53,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24754 states to 24754 states and 90160 transitions. [2019-12-07 21:48:53,648 INFO L78 Accepts]: Start accepts. Automaton has 24754 states and 90160 transitions. Word has length 13 [2019-12-07 21:48:53,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:53,649 INFO L462 AbstractCegarLoop]: Abstraction has 24754 states and 90160 transitions. [2019-12-07 21:48:53,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:48:53,649 INFO L276 IsEmpty]: Start isEmpty. Operand 24754 states and 90160 transitions. [2019-12-07 21:48:53,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 21:48:53,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:53,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:53,654 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:53,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:53,654 INFO L82 PathProgramCache]: Analyzing trace with hash -1245036147, now seen corresponding path program 1 times [2019-12-07 21:48:53,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:53,654 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127944871] [2019-12-07 21:48:53,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:53,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:53,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:53,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127944871] [2019-12-07 21:48:53,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:53,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:48:53,720 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540718797] [2019-12-07 21:48:53,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:48:53,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:53,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:48:53,721 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:53,721 INFO L87 Difference]: Start difference. First operand 24754 states and 90160 transitions. Second operand 5 states. [2019-12-07 21:48:54,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:54,088 INFO L93 Difference]: Finished difference Result 32988 states and 117873 transitions. [2019-12-07 21:48:54,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 21:48:54,089 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 21:48:54,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:54,247 INFO L225 Difference]: With dead ends: 32988 [2019-12-07 21:48:54,247 INFO L226 Difference]: Without dead ends: 32974 [2019-12-07 21:48:54,247 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:48:54,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32974 states. [2019-12-07 21:48:54,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32974 to 24678. [2019-12-07 21:48:54,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24678 states. [2019-12-07 21:48:54,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24678 states to 24678 states and 89720 transitions. [2019-12-07 21:48:54,709 INFO L78 Accepts]: Start accepts. Automaton has 24678 states and 89720 transitions. Word has length 19 [2019-12-07 21:48:54,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:54,709 INFO L462 AbstractCegarLoop]: Abstraction has 24678 states and 89720 transitions. [2019-12-07 21:48:54,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:48:54,709 INFO L276 IsEmpty]: Start isEmpty. Operand 24678 states and 89720 transitions. [2019-12-07 21:48:54,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 21:48:54,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:54,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:54,727 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:54,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:54,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1893835320, now seen corresponding path program 1 times [2019-12-07 21:48:54,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:54,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1168520307] [2019-12-07 21:48:54,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:54,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:54,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:54,766 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1168520307] [2019-12-07 21:48:54,766 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:54,766 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:54,767 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1841657048] [2019-12-07 21:48:54,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:54,767 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:54,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:54,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:54,767 INFO L87 Difference]: Start difference. First operand 24678 states and 89720 transitions. Second operand 3 states. [2019-12-07 21:48:54,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:54,807 INFO L93 Difference]: Finished difference Result 14127 states and 44412 transitions. [2019-12-07 21:48:54,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:54,807 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 21:48:54,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:54,827 INFO L225 Difference]: With dead ends: 14127 [2019-12-07 21:48:54,827 INFO L226 Difference]: Without dead ends: 14127 [2019-12-07 21:48:54,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:54,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14127 states. [2019-12-07 21:48:55,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14127 to 14127. [2019-12-07 21:48:55,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14127 states. [2019-12-07 21:48:55,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14127 states to 14127 states and 44412 transitions. [2019-12-07 21:48:55,087 INFO L78 Accepts]: Start accepts. Automaton has 14127 states and 44412 transitions. Word has length 27 [2019-12-07 21:48:55,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,087 INFO L462 AbstractCegarLoop]: Abstraction has 14127 states and 44412 transitions. [2019-12-07 21:48:55,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:55,087 INFO L276 IsEmpty]: Start isEmpty. Operand 14127 states and 44412 transitions. [2019-12-07 21:48:55,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 21:48:55,093 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,094 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1629892990, now seen corresponding path program 1 times [2019-12-07 21:48:55,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,094 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [14589539] [2019-12-07 21:48:55,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [14589539] [2019-12-07 21:48:55,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:48:55,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354074201] [2019-12-07 21:48:55,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:48:55,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:48:55,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:55,133 INFO L87 Difference]: Start difference. First operand 14127 states and 44412 transitions. Second operand 4 states. [2019-12-07 21:48:55,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,148 INFO L93 Difference]: Finished difference Result 2152 states and 4956 transitions. [2019-12-07 21:48:55,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:48:55,148 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 21:48:55,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,151 INFO L225 Difference]: With dead ends: 2152 [2019-12-07 21:48:55,151 INFO L226 Difference]: Without dead ends: 2152 [2019-12-07 21:48:55,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:48:55,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2152 states. [2019-12-07 21:48:55,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2152 to 2152. [2019-12-07 21:48:55,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2152 states. [2019-12-07 21:48:55,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2152 states to 2152 states and 4956 transitions. [2019-12-07 21:48:55,170 INFO L78 Accepts]: Start accepts. Automaton has 2152 states and 4956 transitions. Word has length 28 [2019-12-07 21:48:55,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,170 INFO L462 AbstractCegarLoop]: Abstraction has 2152 states and 4956 transitions. [2019-12-07 21:48:55,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:48:55,171 INFO L276 IsEmpty]: Start isEmpty. Operand 2152 states and 4956 transitions. [2019-12-07 21:48:55,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 21:48:55,173 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,173 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,173 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1098055765, now seen corresponding path program 1 times [2019-12-07 21:48:55,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173046475] [2019-12-07 21:48:55,174 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173046475] [2019-12-07 21:48:55,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:48:55,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148440074] [2019-12-07 21:48:55,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:48:55,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:48:55,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:55,226 INFO L87 Difference]: Start difference. First operand 2152 states and 4956 transitions. Second operand 5 states. [2019-12-07 21:48:55,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,242 INFO L93 Difference]: Finished difference Result 670 states and 1551 transitions. [2019-12-07 21:48:55,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:48:55,243 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 21:48:55,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,244 INFO L225 Difference]: With dead ends: 670 [2019-12-07 21:48:55,244 INFO L226 Difference]: Without dead ends: 670 [2019-12-07 21:48:55,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:55,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 670 states. [2019-12-07 21:48:55,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 670 to 614. [2019-12-07 21:48:55,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 614 states. [2019-12-07 21:48:55,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 614 states to 614 states and 1419 transitions. [2019-12-07 21:48:55,250 INFO L78 Accepts]: Start accepts. Automaton has 614 states and 1419 transitions. Word has length 40 [2019-12-07 21:48:55,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,250 INFO L462 AbstractCegarLoop]: Abstraction has 614 states and 1419 transitions. [2019-12-07 21:48:55,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:48:55,251 INFO L276 IsEmpty]: Start isEmpty. Operand 614 states and 1419 transitions. [2019-12-07 21:48:55,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 21:48:55,252 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,253 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,253 INFO L82 PathProgramCache]: Analyzing trace with hash 827870922, now seen corresponding path program 1 times [2019-12-07 21:48:55,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370367567] [2019-12-07 21:48:55,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1370367567] [2019-12-07 21:48:55,304 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,304 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:48:55,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592608769] [2019-12-07 21:48:55,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:55,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:55,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,305 INFO L87 Difference]: Start difference. First operand 614 states and 1419 transitions. Second operand 3 states. [2019-12-07 21:48:55,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,335 INFO L93 Difference]: Finished difference Result 629 states and 1439 transitions. [2019-12-07 21:48:55,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:55,335 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 21:48:55,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,336 INFO L225 Difference]: With dead ends: 629 [2019-12-07 21:48:55,336 INFO L226 Difference]: Without dead ends: 629 [2019-12-07 21:48:55,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 629 states. [2019-12-07 21:48:55,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 629 to 625. [2019-12-07 21:48:55,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 625 states. [2019-12-07 21:48:55,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 625 states to 625 states and 1435 transitions. [2019-12-07 21:48:55,344 INFO L78 Accepts]: Start accepts. Automaton has 625 states and 1435 transitions. Word has length 55 [2019-12-07 21:48:55,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,345 INFO L462 AbstractCegarLoop]: Abstraction has 625 states and 1435 transitions. [2019-12-07 21:48:55,345 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:55,345 INFO L276 IsEmpty]: Start isEmpty. Operand 625 states and 1435 transitions. [2019-12-07 21:48:55,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 21:48:55,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,347 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,347 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,347 INFO L82 PathProgramCache]: Analyzing trace with hash -345025503, now seen corresponding path program 1 times [2019-12-07 21:48:55,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,347 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127057880] [2019-12-07 21:48:55,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,397 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,397 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127057880] [2019-12-07 21:48:55,397 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,397 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:48:55,398 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [663604052] [2019-12-07 21:48:55,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:55,398 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:55,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,399 INFO L87 Difference]: Start difference. First operand 625 states and 1435 transitions. Second operand 3 states. [2019-12-07 21:48:55,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,428 INFO L93 Difference]: Finished difference Result 629 states and 1432 transitions. [2019-12-07 21:48:55,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:55,428 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 21:48:55,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,429 INFO L225 Difference]: With dead ends: 629 [2019-12-07 21:48:55,429 INFO L226 Difference]: Without dead ends: 629 [2019-12-07 21:48:55,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 629 states. [2019-12-07 21:48:55,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 629 to 621. [2019-12-07 21:48:55,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 621 states. [2019-12-07 21:48:55,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 1424 transitions. [2019-12-07 21:48:55,435 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 1424 transitions. Word has length 55 [2019-12-07 21:48:55,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,435 INFO L462 AbstractCegarLoop]: Abstraction has 621 states and 1424 transitions. [2019-12-07 21:48:55,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:55,435 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 1424 transitions. [2019-12-07 21:48:55,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 21:48:55,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,437 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,437 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,437 INFO L82 PathProgramCache]: Analyzing trace with hash -349465323, now seen corresponding path program 1 times [2019-12-07 21:48:55,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,437 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079041502] [2019-12-07 21:48:55,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,494 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079041502] [2019-12-07 21:48:55,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,494 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:48:55,494 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156384038] [2019-12-07 21:48:55,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:48:55,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:48:55,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:48:55,495 INFO L87 Difference]: Start difference. First operand 621 states and 1424 transitions. Second operand 5 states. [2019-12-07 21:48:55,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,630 INFO L93 Difference]: Finished difference Result 910 states and 2096 transitions. [2019-12-07 21:48:55,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 21:48:55,630 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 21:48:55,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,631 INFO L225 Difference]: With dead ends: 910 [2019-12-07 21:48:55,631 INFO L226 Difference]: Without dead ends: 910 [2019-12-07 21:48:55,631 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:48:55,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 910 states. [2019-12-07 21:48:55,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 910 to 820. [2019-12-07 21:48:55,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 820 states. [2019-12-07 21:48:55,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 820 states to 820 states and 1891 transitions. [2019-12-07 21:48:55,638 INFO L78 Accepts]: Start accepts. Automaton has 820 states and 1891 transitions. Word has length 55 [2019-12-07 21:48:55,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,638 INFO L462 AbstractCegarLoop]: Abstraction has 820 states and 1891 transitions. [2019-12-07 21:48:55,638 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:48:55,638 INFO L276 IsEmpty]: Start isEmpty. Operand 820 states and 1891 transitions. [2019-12-07 21:48:55,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 21:48:55,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,640 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1055549477, now seen corresponding path program 2 times [2019-12-07 21:48:55,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110427849] [2019-12-07 21:48:55,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,691 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110427849] [2019-12-07 21:48:55,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,691 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:55,691 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766478552] [2019-12-07 21:48:55,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:55,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:55,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,692 INFO L87 Difference]: Start difference. First operand 820 states and 1891 transitions. Second operand 3 states. [2019-12-07 21:48:55,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,720 INFO L93 Difference]: Finished difference Result 820 states and 1890 transitions. [2019-12-07 21:48:55,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:55,720 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 21:48:55,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,721 INFO L225 Difference]: With dead ends: 820 [2019-12-07 21:48:55,721 INFO L226 Difference]: Without dead ends: 820 [2019-12-07 21:48:55,721 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 820 states. [2019-12-07 21:48:55,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 820 to 657. [2019-12-07 21:48:55,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 657 states. [2019-12-07 21:48:55,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 657 states to 657 states and 1515 transitions. [2019-12-07 21:48:55,730 INFO L78 Accepts]: Start accepts. Automaton has 657 states and 1515 transitions. Word has length 55 [2019-12-07 21:48:55,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,730 INFO L462 AbstractCegarLoop]: Abstraction has 657 states and 1515 transitions. [2019-12-07 21:48:55,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:55,730 INFO L276 IsEmpty]: Start isEmpty. Operand 657 states and 1515 transitions. [2019-12-07 21:48:55,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 21:48:55,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,732 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,732 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,732 INFO L82 PathProgramCache]: Analyzing trace with hash -916645642, now seen corresponding path program 1 times [2019-12-07 21:48:55,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528008515] [2019-12-07 21:48:55,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1528008515] [2019-12-07 21:48:55,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:48:55,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42227848] [2019-12-07 21:48:55,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:48:55,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:48:55,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:48:55,816 INFO L87 Difference]: Start difference. First operand 657 states and 1515 transitions. Second operand 6 states. [2019-12-07 21:48:55,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,862 INFO L93 Difference]: Finished difference Result 953 states and 2041 transitions. [2019-12-07 21:48:55,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 21:48:55,862 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 21:48:55,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,863 INFO L225 Difference]: With dead ends: 953 [2019-12-07 21:48:55,863 INFO L226 Difference]: Without dead ends: 594 [2019-12-07 21:48:55,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:48:55,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2019-12-07 21:48:55,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 594. [2019-12-07 21:48:55,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 594 states. [2019-12-07 21:48:55,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 594 states to 594 states and 1332 transitions. [2019-12-07 21:48:55,869 INFO L78 Accepts]: Start accepts. Automaton has 594 states and 1332 transitions. Word has length 56 [2019-12-07 21:48:55,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,869 INFO L462 AbstractCegarLoop]: Abstraction has 594 states and 1332 transitions. [2019-12-07 21:48:55,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:48:55,869 INFO L276 IsEmpty]: Start isEmpty. Operand 594 states and 1332 transitions. [2019-12-07 21:48:55,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 21:48:55,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,870 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,870 INFO L82 PathProgramCache]: Analyzing trace with hash -310787320, now seen corresponding path program 2 times [2019-12-07 21:48:55,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133517494] [2019-12-07 21:48:55,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:55,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:55,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133517494] [2019-12-07 21:48:55,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:55,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:48:55,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845401009] [2019-12-07 21:48:55,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:48:55,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:55,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:48:55,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,925 INFO L87 Difference]: Start difference. First operand 594 states and 1332 transitions. Second operand 3 states. [2019-12-07 21:48:55,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:55,935 INFO L93 Difference]: Finished difference Result 571 states and 1246 transitions. [2019-12-07 21:48:55,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:48:55,935 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 21:48:55,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:55,936 INFO L225 Difference]: With dead ends: 571 [2019-12-07 21:48:55,936 INFO L226 Difference]: Without dead ends: 571 [2019-12-07 21:48:55,936 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:48:55,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states. [2019-12-07 21:48:55,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 535. [2019-12-07 21:48:55,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2019-12-07 21:48:55,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 1160 transitions. [2019-12-07 21:48:55,943 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 1160 transitions. Word has length 56 [2019-12-07 21:48:55,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:55,943 INFO L462 AbstractCegarLoop]: Abstraction has 535 states and 1160 transitions. [2019-12-07 21:48:55,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:48:55,943 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1160 transitions. [2019-12-07 21:48:55,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 21:48:55,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:55,945 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:55,945 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:55,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:55,945 INFO L82 PathProgramCache]: Analyzing trace with hash 704044892, now seen corresponding path program 1 times [2019-12-07 21:48:55,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:55,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969458482] [2019-12-07 21:48:55,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:55,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:56,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:56,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969458482] [2019-12-07 21:48:56,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:56,031 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:48:56,031 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588003444] [2019-12-07 21:48:56,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:48:56,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:56,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:48:56,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:48:56,032 INFO L87 Difference]: Start difference. First operand 535 states and 1160 transitions. Second operand 6 states. [2019-12-07 21:48:56,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:56,085 INFO L93 Difference]: Finished difference Result 770 states and 1612 transitions. [2019-12-07 21:48:56,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 21:48:56,085 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-12-07 21:48:56,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:56,086 INFO L225 Difference]: With dead ends: 770 [2019-12-07 21:48:56,086 INFO L226 Difference]: Without dead ends: 233 [2019-12-07 21:48:56,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 21:48:56,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2019-12-07 21:48:56,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 209. [2019-12-07 21:48:56,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 21:48:56,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 361 transitions. [2019-12-07 21:48:56,088 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 361 transitions. Word has length 57 [2019-12-07 21:48:56,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:56,089 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 361 transitions. [2019-12-07 21:48:56,089 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:48:56,089 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 361 transitions. [2019-12-07 21:48:56,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 21:48:56,089 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:56,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:56,089 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:56,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:56,090 INFO L82 PathProgramCache]: Analyzing trace with hash -876750572, now seen corresponding path program 2 times [2019-12-07 21:48:56,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:56,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193364295] [2019-12-07 21:48:56,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:56,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:48:56,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:48:56,214 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [193364295] [2019-12-07 21:48:56,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:48:56,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 21:48:56,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353426747] [2019-12-07 21:48:56,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 21:48:56,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:48:56,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 21:48:56,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 21:48:56,215 INFO L87 Difference]: Start difference. First operand 209 states and 361 transitions. Second operand 12 states. [2019-12-07 21:48:56,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:48:56,400 INFO L93 Difference]: Finished difference Result 360 states and 604 transitions. [2019-12-07 21:48:56,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 21:48:56,400 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 21:48:56,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:48:56,401 INFO L225 Difference]: With dead ends: 360 [2019-12-07 21:48:56,401 INFO L226 Difference]: Without dead ends: 327 [2019-12-07 21:48:56,401 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2019-12-07 21:48:56,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2019-12-07 21:48:56,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 317. [2019-12-07 21:48:56,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-12-07 21:48:56,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 546 transitions. [2019-12-07 21:48:56,404 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 546 transitions. Word has length 57 [2019-12-07 21:48:56,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:48:56,404 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 546 transitions. [2019-12-07 21:48:56,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 21:48:56,404 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 546 transitions. [2019-12-07 21:48:56,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 21:48:56,405 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:48:56,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:48:56,405 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:48:56,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:48:56,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1963724718, now seen corresponding path program 3 times [2019-12-07 21:48:56,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:48:56,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541248963] [2019-12-07 21:48:56,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:48:56,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:48:56,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:48:56,476 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 21:48:56,476 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 21:48:56,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25| 1) |v_#valid_62|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1202~0.base_25| 4)) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25|)) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25|) |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0)) |v_#memory_int_21|) (= v_~y$r_buff1_thd0~0_281 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1202~0.base_25|) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_19|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_~#t1202~0.base=|v_ULTIMATE.start_main_~#t1202~0.base_25|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_25|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ULTIMATE.start_main_~#t1202~0.offset=|v_ULTIMATE.start_main_~#t1202~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1204~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1204~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1202~0.base, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1203~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1203~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1202~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 21:48:56,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1203~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1203~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13|) |v_ULTIMATE.start_main_~#t1203~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1203~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1203~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1203~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1203~0.offset] because there is no mapped edge [2019-12-07 21:48:56,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13|) |v_ULTIMATE.start_main_~#t1204~0.offset_11| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1204~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1204~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1204~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1204~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1204~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1204~0.base] because there is no mapped edge [2019-12-07 21:48:56,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 21:48:56,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 21:48:56,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-1024596040 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1024596040 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-1024596040|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1024596040 |P2Thread1of1ForFork0_#t~ite11_Out-1024596040|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1024596040, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1024596040} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1024596040, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1024596040|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1024596040} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 21:48:56,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1506096029 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In1506096029 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1506096029 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1506096029 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out1506096029| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite12_Out1506096029| ~y$w_buff1_used~0_In1506096029) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1506096029, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1506096029} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1506096029, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1506096029|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1506096029} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 21:48:56,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_Out-348157237 ~y$r_buff0_thd3~0_In-348157237)) (.cse2 (= (mod ~y$w_buff0_used~0_In-348157237 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-348157237 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out-348157237)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-348157237, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-348157237} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-348157237, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-348157237, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-348157237|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 21:48:56,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In977824286 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In977824286 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In977824286 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In977824286 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out977824286| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out977824286| ~y$r_buff1_thd3~0_In977824286)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In977824286, ~y$w_buff0_used~0=~y$w_buff0_used~0_In977824286, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In977824286, ~y$w_buff1_used~0=~y$w_buff1_used~0_In977824286} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out977824286|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In977824286, ~y$w_buff0_used~0=~y$w_buff0_used~0_In977824286, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In977824286, ~y$w_buff1_used~0=~y$w_buff1_used~0_In977824286} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 21:48:56,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:48:56,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In664576017 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In664576017 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out664576017| ~y~0_In664576017)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out664576017| ~y$w_buff1~0_In664576017)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In664576017, ~y$w_buff1~0=~y$w_buff1~0_In664576017, ~y~0=~y~0_In664576017, ~y$w_buff1_used~0=~y$w_buff1_used~0_In664576017} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In664576017, ~y$w_buff1~0=~y$w_buff1~0_In664576017, ~y~0=~y~0_In664576017, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out664576017|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In664576017} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:48:56,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:48:56,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In2122701319 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In2122701319 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In2122701319 |P1Thread1of1ForFork2_#t~ite5_Out2122701319|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out2122701319| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2122701319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2122701319, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out2122701319|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 21:48:56,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-204041933 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-204041933 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-204041933 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-204041933 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out-204041933| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite6_Out-204041933| ~y$w_buff1_used~0_In-204041933)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-204041933, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-204041933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-204041933, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-204041933, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-204041933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-204041933, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-204041933|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 21:48:56,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In878161127 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In878161127 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out878161127| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out878161127| ~y$r_buff0_thd2~0_In878161127) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out878161127|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 21:48:56,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1617963135 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1617963135 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1617963135 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1617963135 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out-1617963135| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite8_Out-1617963135| ~y$r_buff1_thd2~0_In-1617963135) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1617963135, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1617963135, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1617963135} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1617963135, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1617963135|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1617963135, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1617963135} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:48:56,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:48:56,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:48:56,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite19_Out-1467949986| |ULTIMATE.start_main_#t~ite18_Out-1467949986|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1467949986 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1467949986 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1467949986| ~y$w_buff1~0_In-1467949986)) (and .cse2 (= ~y~0_In-1467949986 |ULTIMATE.start_main_#t~ite18_Out-1467949986|) (or .cse1 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1467949986, ~y~0=~y~0_In-1467949986, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1467949986, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1467949986|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1467949986|, ~y~0=~y~0_In-1467949986, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 21:48:56,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1180315853| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out1180315853| ~y$w_buff0_used~0_In1180315853)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1180315853|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 21:48:56,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1595864320 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1595864320| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-1595864320 |ULTIMATE.start_main_#t~ite21_Out-1595864320|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1595864320|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 21:48:56,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In923640753 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In923640753 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out923640753| ~y$r_buff0_thd0~0_In923640753) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out923640753| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In923640753} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In923640753, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out923640753|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 21:48:56,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In401782435 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In401782435 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In401782435 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In401782435 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out401782435| ~y$r_buff1_thd0~0_In401782435) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out401782435| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In401782435, ~y$w_buff1_used~0=~y$w_buff1_used~0_In401782435} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In401782435, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out401782435|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In401782435} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 21:48:56,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In6450241 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In6450241 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In6450241 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In6450241 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In6450241 256) 0))) (= |ULTIMATE.start_main_#t~ite32_Out6450241| ~y$w_buff1~0_In6450241) (= |ULTIMATE.start_main_#t~ite32_Out6450241| |ULTIMATE.start_main_#t~ite33_Out6450241|) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite33_Out6450241| ~y$w_buff1~0_In6450241) (= |ULTIMATE.start_main_#t~ite32_In6450241| |ULTIMATE.start_main_#t~ite32_Out6450241|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In6450241, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In6450241|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} OutVars{~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In6450241, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out6450241|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out6450241|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 21:48:56,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-797291343 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-797291343 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-797291343 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-797291343 256))) (and .cse0 (= (mod ~y$w_buff1_used~0_In-797291343 256) 0)))) (= |ULTIMATE.start_main_#t~ite35_Out-797291343| |ULTIMATE.start_main_#t~ite36_Out-797291343|) (= |ULTIMATE.start_main_#t~ite35_Out-797291343| ~y$w_buff0_used~0_In-797291343) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite35_In-797291343| |ULTIMATE.start_main_#t~ite35_Out-797291343|) (= |ULTIMATE.start_main_#t~ite36_Out-797291343| ~y$w_buff0_used~0_In-797291343)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-797291343, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-797291343|, ~weak$$choice2~0=~weak$$choice2~0_In-797291343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-797291343, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-797291343|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-797291343|, ~weak$$choice2~0=~weak$$choice2~0_In-797291343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 21:48:56,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1707165567 256)))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1707165567 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1707165567 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In1707165567 256)) .cse0) (= (mod ~y$w_buff0_used~0_In1707165567 256) 0))) (= ~y$w_buff1_used~0_In1707165567 |ULTIMATE.start_main_#t~ite38_Out1707165567|) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out1707165567| |ULTIMATE.start_main_#t~ite39_Out1707165567|)) (and (= |ULTIMATE.start_main_#t~ite38_In1707165567| |ULTIMATE.start_main_#t~ite38_Out1707165567|) (= ~y$w_buff1_used~0_In1707165567 |ULTIMATE.start_main_#t~ite39_Out1707165567|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1707165567, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1707165567, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1707165567|, ~weak$$choice2~0=~weak$$choice2~0_In1707165567, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1707165567, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1707165567} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1707165567, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1707165567|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1707165567, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1707165567|, ~weak$$choice2~0=~weak$$choice2~0_In1707165567, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1707165567, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1707165567} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 21:48:56,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 21:48:56,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:48:56,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 21:48:56,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 09:48:56 BasicIcfg [2019-12-07 21:48:56,533 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 21:48:56,533 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 21:48:56,533 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 21:48:56,533 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 21:48:56,533 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:48:46" (3/4) ... [2019-12-07 21:48:56,535 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 21:48:56,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] ULTIMATE.startENTRY-->L810: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~y$w_buff0~0_225) (= v_~x~0_72 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$r_buff0_thd1~0_30 0) (= 0 v_~__unbuffered_cnt~0_82) (= v_~y$w_buff1_used~0_382 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~__unbuffered_p2_EBX~0_120 0) (= 0 v_~y$r_buff1_thd2~0_163) (= v_~y$r_buff1_thd1~0_106 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25| 1) |v_#valid_62|) (< 0 |v_#StackHeapBarrier_17|) (= |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1202~0.base_25| 4)) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~y$r_buff0_thd3~0_195) (= 0 v_~y$r_buff0_thd2~0_108) (= 0 v_~y$flush_delayed~0_58) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1202~0.base_25|)) (= v_~z~0_106 0) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$w_buff1~0_183 0) (= v_~y$mem_tmp~0_20 0) (= 0 v_~__unbuffered_p2_EAX~0_120) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~a~0_45 0) (= v_~y~0_155 0) (= 0 v_~y$r_buff1_thd3~0_156) (= v_~y$r_buff0_thd0~0_325 0) (= v_~weak$$choice2~0_108 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1202~0.base_25|) |v_ULTIMATE.start_main_~#t1202~0.offset_19| 0)) |v_#memory_int_21|) (= v_~y$r_buff1_thd0~0_281 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1202~0.base_25|) (= v_~y$w_buff0_used~0_625 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_37|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_22|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_28|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_45|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~a~0=v_~a~0_45, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_156, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_30, ~y$flush_delayed~0=v_~y$flush_delayed~0_58, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_120, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_25|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_120, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_26|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_30|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_24|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_37|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~y$w_buff1~0=v_~y$w_buff1~0_183, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_108, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_82, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_281, ~x~0=v_~x~0_72, ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_19|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_625, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_41|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_67|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_106|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_33|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_38|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_53|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_106, ULTIMATE.start_main_~#t1202~0.base=|v_ULTIMATE.start_main_~#t1202~0.base_25|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_24|, ~y$w_buff0~0=v_~y$w_buff0~0_225, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_195, ~y~0=v_~y~0_155, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_25|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_28|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_47|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_48|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_19|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_29|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_163, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_325, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_106, ~weak$$choice2~0=v_~weak$$choice2~0_108, ULTIMATE.start_main_~#t1202~0.offset=|v_ULTIMATE.start_main_~#t1202~0.offset_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_382} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~a~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1204~0.base, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_~#t1204~0.offset, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t1202~0.base, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1203~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1203~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t1202~0.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 21:48:56,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L810-1-->L812: Formula: (and (= 0 (select |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1203~0.offset_11| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1203~0.base_13| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1203~0.base_13|) |v_ULTIMATE.start_main_~#t1203~0.offset_11| 1)) |v_#memory_int_15|) (= |v_#valid_42| (store |v_#valid_43| |v_ULTIMATE.start_main_~#t1203~0.base_13| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1203~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1203~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1203~0.base=|v_ULTIMATE.start_main_~#t1203~0.base_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1203~0.offset=|v_ULTIMATE.start_main_~#t1203~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1203~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1203~0.offset] because there is no mapped edge [2019-12-07 21:48:56,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L812-1-->L814: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1204~0.base_13|) |v_ULTIMATE.start_main_~#t1204~0.offset_11| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1204~0.base_13|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13|)) (= |v_ULTIMATE.start_main_~#t1204~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1204~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1204~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1204~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1204~0.offset=|v_ULTIMATE.start_main_~#t1204~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1204~0.base=|v_ULTIMATE.start_main_~#t1204~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1204~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1204~0.base] because there is no mapped edge [2019-12-07 21:48:56,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [634] [634] P2ENTRY-->L4-3: Formula: (and (= |v_P2Thread1of1ForFork0_#in~arg.base_12| v_P2Thread1of1ForFork0_~arg.base_10) (= |v_P2Thread1of1ForFork0_#in~arg.offset_12| v_P2Thread1of1ForFork0_~arg.offset_10) (= v_~y$w_buff0~0_33 v_~y$w_buff1~0_29) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12)) (= v_~y$w_buff0_used~0_130 1) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_130 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_75 256))))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= 2 v_~y$w_buff0~0_32) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|) (= v_~y$w_buff1_used~0_75 v_~y$w_buff0_used~0_131)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_131, ~y$w_buff0~0=v_~y$w_buff0~0_33, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_10, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_12|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_10|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_130, ~y$w_buff1~0=v_~y$w_buff1~0_29, ~y$w_buff0~0=v_~y$w_buff0~0_32, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_10, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_12|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_12, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_75} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 21:48:56,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= 0 |v_P0Thread1of1ForFork1_#res.offset_7|) (= |v_P0Thread1of1ForFork1_#in~arg.base_15| v_P0Thread1of1ForFork1_~arg.base_13) (= v_~a~0_29 1) (= v_P0Thread1of1ForFork1_~arg.offset_13 |v_P0Thread1of1ForFork1_#in~arg.offset_15|) (= v_~x~0_52 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_7|)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|} OutVars{~a~0=v_~a~0_29, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_7|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_15|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_7|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_13, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_15|, ~x~0=v_~x~0_52, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 21:48:56,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L788-->L788-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-1024596040 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1024596040 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-1024596040|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1024596040 |P2Thread1of1ForFork0_#t~ite11_Out-1024596040|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1024596040, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1024596040} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1024596040, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1024596040|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1024596040} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 21:48:56,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In1506096029 256))) (.cse1 (= (mod ~y$r_buff1_thd3~0_In1506096029 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1506096029 256))) (.cse2 (= (mod ~y$r_buff0_thd3~0_In1506096029 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out1506096029| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite12_Out1506096029| ~y$w_buff1_used~0_In1506096029) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1506096029, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1506096029} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1506096029, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1506096029, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1506096029|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1506096029, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1506096029} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L790-->L791: Formula: (let ((.cse0 (= ~y$r_buff0_thd3~0_Out-348157237 ~y$r_buff0_thd3~0_In-348157237)) (.cse2 (= (mod ~y$w_buff0_used~0_In-348157237 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In-348157237 256) 0))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse2) (not .cse1) (= 0 ~y$r_buff0_thd3~0_Out-348157237)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-348157237, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-348157237} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-348157237, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-348157237, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-348157237|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L791-->L791-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In977824286 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In977824286 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In977824286 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In977824286 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out977824286| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite14_Out977824286| ~y$r_buff1_thd3~0_In977824286)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In977824286, ~y$w_buff0_used~0=~y$w_buff0_used~0_In977824286, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In977824286, ~y$w_buff1_used~0=~y$w_buff1_used~0_In977824286} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out977824286|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In977824286, ~y$w_buff0_used~0=~y$w_buff0_used~0_In977824286, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In977824286, ~y$w_buff1_used~0=~y$w_buff1_used~0_In977824286} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L791-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_26| v_~y$r_buff1_thd3~0_94)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_25|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_94, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L752-2-->L752-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In664576017 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In664576017 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out664576017| ~y~0_In664576017)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out664576017| ~y$w_buff1~0_In664576017)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In664576017, ~y$w_buff1~0=~y$w_buff1~0_In664576017, ~y~0=~y~0_In664576017, ~y$w_buff1_used~0=~y$w_buff1_used~0_In664576017} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In664576017, ~y$w_buff1~0=~y$w_buff1~0_In664576017, ~y~0=~y~0_In664576017, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out664576017|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In664576017} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [629] [629] L752-4-->L753: Formula: (= v_~y~0_39 |v_P1Thread1of1ForFork2_#t~ite3_6|) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_6|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_7|, ~y~0=v_~y~0_39, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L753-->L753-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In2122701319 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In2122701319 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In2122701319 |P1Thread1of1ForFork2_#t~ite5_Out2122701319|)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite5_Out2122701319| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2122701319} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2122701319, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2122701319, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out2122701319|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 21:48:56,538 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L754-->L754-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-204041933 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-204041933 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-204041933 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-204041933 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out-204041933| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite6_Out-204041933| ~y$w_buff1_used~0_In-204041933)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-204041933, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-204041933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-204041933, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-204041933, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-204041933, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-204041933, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out-204041933|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-204041933} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 21:48:56,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] L755-->L755-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In878161127 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In878161127 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite7_Out878161127| 0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite7_Out878161127| ~y$r_buff0_thd2~0_In878161127) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In878161127, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In878161127, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out878161127|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 21:48:56,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1617963135 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1617963135 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1617963135 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1617963135 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out-1617963135| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork2_#t~ite8_Out-1617963135| ~y$r_buff1_thd2~0_In-1617963135) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1617963135, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1617963135, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1617963135} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1617963135, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1617963135, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1617963135|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1617963135, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1617963135} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 21:48:56,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L756-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork2_#t~ite8_28| v_~y$r_buff1_thd2~0_111)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_111, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_27|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:48:56,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [661] [661] L814-1-->L820: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_11 256))) (= v_~main$tmp_guard0~0_11 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_28) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_28, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:48:56,539 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L820-2-->L820-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite19_Out-1467949986| |ULTIMATE.start_main_#t~ite18_Out-1467949986|)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1467949986 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1467949986 256)))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite18_Out-1467949986| ~y$w_buff1~0_In-1467949986)) (and .cse2 (= ~y~0_In-1467949986 |ULTIMATE.start_main_#t~ite18_Out-1467949986|) (or .cse1 .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1467949986, ~y~0=~y~0_In-1467949986, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1467949986, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-1467949986|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1467949986|, ~y~0=~y~0_In-1467949986, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1467949986, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1467949986} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 21:48:56,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L821-->L821-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1180315853 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1180315853 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out1180315853| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out1180315853| ~y$w_buff0_used~0_In1180315853)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1180315853, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1180315853, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1180315853|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 21:48:56,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L822-->L822-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In-1595864320 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1595864320 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1595864320 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1595864320 256)))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out-1595864320| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In-1595864320 |ULTIMATE.start_main_#t~ite21_Out-1595864320|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1595864320, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1595864320, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-1595864320|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1595864320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1595864320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 21:48:56,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L823-->L823-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In923640753 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In923640753 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out923640753| ~y$r_buff0_thd0~0_In923640753) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite22_Out923640753| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In923640753} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In923640753, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In923640753, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out923640753|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 21:48:56,541 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L824-->L824-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In401782435 256))) (.cse0 (= (mod ~y$r_buff1_thd0~0_In401782435 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In401782435 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In401782435 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite23_Out401782435| ~y$r_buff1_thd0~0_In401782435) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite23_Out401782435| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In401782435, ~y$w_buff1_used~0=~y$w_buff1_used~0_In401782435} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In401782435, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In401782435, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In401782435, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out401782435|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In401782435} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 21:48:56,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L833-->L833-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In6450241 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In6450241 256)))) (or (and (= 0 (mod ~y$r_buff1_thd0~0_In6450241 256)) .cse0) (and (= (mod ~y$w_buff1_used~0_In6450241 256) 0) .cse0) (= (mod ~y$w_buff0_used~0_In6450241 256) 0))) (= |ULTIMATE.start_main_#t~ite32_Out6450241| ~y$w_buff1~0_In6450241) (= |ULTIMATE.start_main_#t~ite32_Out6450241| |ULTIMATE.start_main_#t~ite33_Out6450241|) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite33_Out6450241| ~y$w_buff1~0_In6450241) (= |ULTIMATE.start_main_#t~ite32_In6450241| |ULTIMATE.start_main_#t~ite32_Out6450241|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In6450241, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_In6450241|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} OutVars{~y$w_buff1~0=~y$w_buff1~0_In6450241, ~y$w_buff0_used~0=~y$w_buff0_used~0_In6450241, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In6450241, ~weak$$choice2~0=~weak$$choice2~0_In6450241, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out6450241|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In6450241, ULTIMATE.start_main_#t~ite33=|ULTIMATE.start_main_#t~ite33_Out6450241|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In6450241} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_#t~ite33] because there is no mapped edge [2019-12-07 21:48:56,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L834-->L834-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-797291343 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-797291343 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-797291343 256)) (and .cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-797291343 256))) (and .cse0 (= (mod ~y$w_buff1_used~0_In-797291343 256) 0)))) (= |ULTIMATE.start_main_#t~ite35_Out-797291343| |ULTIMATE.start_main_#t~ite36_Out-797291343|) (= |ULTIMATE.start_main_#t~ite35_Out-797291343| ~y$w_buff0_used~0_In-797291343) .cse1) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite35_In-797291343| |ULTIMATE.start_main_#t~ite35_Out-797291343|) (= |ULTIMATE.start_main_#t~ite36_Out-797291343| ~y$w_buff0_used~0_In-797291343)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-797291343, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_In-797291343|, ~weak$$choice2~0=~weak$$choice2~0_In-797291343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-797291343, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-797291343, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-797291343|, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out-797291343|, ~weak$$choice2~0=~weak$$choice2~0_In-797291343, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-797291343, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-797291343} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite36] because there is no mapped edge [2019-12-07 21:48:56,542 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L835-->L835-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1707165567 256)))) (or (and (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1707165567 256) 0))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In1707165567 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In1707165567 256)) .cse0) (= (mod ~y$w_buff0_used~0_In1707165567 256) 0))) (= ~y$w_buff1_used~0_In1707165567 |ULTIMATE.start_main_#t~ite38_Out1707165567|) .cse1 (= |ULTIMATE.start_main_#t~ite38_Out1707165567| |ULTIMATE.start_main_#t~ite39_Out1707165567|)) (and (= |ULTIMATE.start_main_#t~ite38_In1707165567| |ULTIMATE.start_main_#t~ite38_Out1707165567|) (= ~y$w_buff1_used~0_In1707165567 |ULTIMATE.start_main_#t~ite39_Out1707165567|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1707165567, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1707165567, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In1707165567|, ~weak$$choice2~0=~weak$$choice2~0_In1707165567, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1707165567, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1707165567} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1707165567, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1707165567|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1707165567, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out1707165567|, ~weak$$choice2~0=~weak$$choice2~0_In1707165567, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1707165567, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1707165567} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 21:48:56,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [665] [665] L836-->L837: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_29 256))) (= v_~y$r_buff0_thd0~0_100 v_~y$r_buff0_thd0~0_99)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_99, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 21:48:56,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L839-->L4: Formula: (and (= v_~y~0_138 v_~y$mem_tmp~0_17) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= 0 v_~y$flush_delayed~0_52) (not (= (mod v_~y$flush_delayed~0_53 256) 0))) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_17, ~y$flush_delayed~0=v_~y$flush_delayed~0_53, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_17, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_52, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~y~0=v_~y~0_138, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:48:56,543 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 21:48:56,593 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_780700da-aa69-40da-bec7-bb5dfbeed05b/bin/utaipan/witness.graphml [2019-12-07 21:48:56,593 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 21:48:56,594 INFO L168 Benchmark]: Toolchain (without parser) took 10546.25 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 720.9 MB). Free memory was 932.7 MB in the beginning and 901.7 MB in the end (delta: 31.1 MB). Peak memory consumption was 752.0 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,595 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:48:56,595 INFO L168 Benchmark]: CACSL2BoogieTranslator took 372.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 932.7 MB in the beginning and 1.1 GB in the end (delta: -131.9 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,595 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,595 INFO L168 Benchmark]: Boogie Preprocessor took 26.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:48:56,596 INFO L168 Benchmark]: RCFGBuilder took 407.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,596 INFO L168 Benchmark]: TraceAbstraction took 9635.41 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 623.9 MB). Free memory was 1.0 GB in the beginning and 937.1 MB in the end (delta: 65.4 MB). Peak memory consumption was 689.3 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,596 INFO L168 Benchmark]: Witness Printer took 60.31 ms. Allocated memory is still 1.8 GB. Free memory was 937.1 MB in the beginning and 901.7 MB in the end (delta: 35.5 MB). Peak memory consumption was 35.5 MB. Max. memory is 11.5 GB. [2019-12-07 21:48:56,598 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 372.54 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 932.7 MB in the beginning and 1.1 GB in the end (delta: -131.9 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.10 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 407.75 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9635.41 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 623.9 MB). Free memory was 1.0 GB in the beginning and 937.1 MB in the end (delta: 65.4 MB). Peak memory consumption was 689.3 MB. Max. memory is 11.5 GB. * Witness Printer took 60.31 ms. Allocated memory is still 1.8 GB. Free memory was 937.1 MB in the beginning and 901.7 MB in the end (delta: 35.5 MB). Peak memory consumption was 35.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 164 ProgramPointsBefore, 82 ProgramPointsAfterwards, 195 TransitionsBefore, 91 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 33 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 26 ChoiceCompositions, 4376 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 58 SemBasedMoverChecksPositive, 191 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46792 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L810] FCALL, FORK 0 pthread_create(&t1202, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L812] FCALL, FORK 0 pthread_create(&t1203, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L814] FCALL, FORK 0 pthread_create(&t1204, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L771] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L772] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L773] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L774] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L775] 3 y$r_buff0_thd3 = (_Bool)1 [L778] 3 z = 1 [L781] 3 __unbuffered_p2_EAX = z [L784] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L746] 2 x = 2 [L749] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L787] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L788] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L789] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L752] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L753] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L754] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L820] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L820] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L821] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L822] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L823] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L824] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L827] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L828] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L829] 0 y$flush_delayed = weak$$choice2 [L830] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L831] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L832] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L832] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L833] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L834] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L835] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L837] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L837] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L838] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 155 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.5s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 2.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1556 SDtfs, 1194 SDslu, 2779 SDs, 0 SdLazy, 1071 SolverSat, 87 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 81 GetRequests, 18 SyntacticMatches, 6 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=24754occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.3s AutomataMinimizationTime, 15 MinimizatonAttempts, 13653 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 650 NumberOfCodeBlocks, 650 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 578 ConstructedInterpolants, 0 QuantifiedInterpolants, 84607 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...