./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix046_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix046_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 49aee5098ff80190424cfb43e754563e7321bf44 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:36:32,445 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:36:32,447 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:36:32,454 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:36:32,454 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:36:32,455 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:36:32,456 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:36:32,457 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:36:32,458 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:36:32,459 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:36:32,460 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:36:32,460 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:36:32,461 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:36:32,461 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:36:32,462 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:36:32,463 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:36:32,463 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:36:32,464 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:36:32,465 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:36:32,467 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:36:32,468 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:36:32,468 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:36:32,469 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:36:32,470 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:36:32,471 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:36:32,472 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:36:32,472 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:36:32,472 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:36:32,472 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:36:32,473 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:36:32,473 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:36:32,473 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:36:32,474 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:36:32,474 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:36:32,475 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:36:32,475 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:36:32,475 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:36:32,476 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:36:32,476 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:36:32,476 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:36:32,476 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:36:32,477 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 13:36:32,486 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:36:32,487 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:36:32,487 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 13:36:32,487 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 13:36:32,487 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 13:36:32,487 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 13:36:32,488 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 13:36:32,488 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 13:36:32,489 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:36:32,489 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:36:32,490 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:36:32,490 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:36:32,491 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:36:32,491 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 13:36:32,492 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 49aee5098ff80190424cfb43e754563e7321bf44 [2019-12-07 13:36:32,589 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:36:32,597 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:36:32,599 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:36:32,600 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:36:32,601 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:36:32,601 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix046_tso.opt.i [2019-12-07 13:36:32,639 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/data/e404f3499/2f7d93f5ffce493a8533fdce211577e7/FLAGd08c35c4e [2019-12-07 13:36:33,109 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:36:33,110 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/sv-benchmarks/c/pthread-wmm/mix046_tso.opt.i [2019-12-07 13:36:33,120 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/data/e404f3499/2f7d93f5ffce493a8533fdce211577e7/FLAGd08c35c4e [2019-12-07 13:36:33,130 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/data/e404f3499/2f7d93f5ffce493a8533fdce211577e7 [2019-12-07 13:36:33,131 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:36:33,132 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:36:33,133 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:36:33,133 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:36:33,135 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:36:33,136 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,138 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33, skipping insertion in model container [2019-12-07 13:36:33,138 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,143 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:36:33,174 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:36:33,434 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:36:33,442 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:36:33,486 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:36:33,541 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:36:33,541 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33 WrapperNode [2019-12-07 13:36:33,541 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:36:33,542 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:36:33,542 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:36:33,542 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:36:33,548 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,561 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,585 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:36:33,586 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:36:33,586 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:36:33,586 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:36:33,593 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,593 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,596 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,597 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,604 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,607 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,610 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... [2019-12-07 13:36:33,613 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:36:33,613 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:36:33,613 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:36:33,614 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:36:33,614 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:36:33,659 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:36:33,659 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:36:33,660 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:36:33,660 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:36:33,660 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:36:33,660 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 13:36:33,660 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 13:36:33,660 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:36:33,660 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:36:33,660 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:36:33,662 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:36:34,022 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:36:34,022 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:36:34,023 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:36:34 BoogieIcfgContainer [2019-12-07 13:36:34,023 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:36:34,024 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:36:34,024 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:36:34,025 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:36:34,026 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:36:33" (1/3) ... [2019-12-07 13:36:34,026 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f2c3a2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:36:34, skipping insertion in model container [2019-12-07 13:36:34,026 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:36:33" (2/3) ... [2019-12-07 13:36:34,026 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f2c3a2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:36:34, skipping insertion in model container [2019-12-07 13:36:34,027 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:36:34" (3/3) ... [2019-12-07 13:36:34,028 INFO L109 eAbstractionObserver]: Analyzing ICFG mix046_tso.opt.i [2019-12-07 13:36:34,034 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:36:34,034 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:36:34,039 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:36:34,039 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:36:34,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,063 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,064 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,065 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,066 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,067 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,068 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,069 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,070 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,071 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,072 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,072 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:36:34,086 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 13:36:34,102 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:36:34,103 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:36:34,103 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:36:34,103 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:36:34,103 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:36:34,103 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:36:34,103 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:36:34,103 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:36:34,113 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 181 places, 209 transitions [2019-12-07 13:36:34,115 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 13:36:34,176 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 13:36:34,176 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:36:34,186 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:36:34,197 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 181 places, 209 transitions [2019-12-07 13:36:34,223 INFO L134 PetriNetUnfolder]: 41/205 cut-off events. [2019-12-07 13:36:34,223 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:36:34,227 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 205 events. 41/205 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 12/174 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 13:36:34,238 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 13:36:34,239 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:36:37,152 WARN L192 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 99 DAG size of output: 97 [2019-12-07 13:36:37,264 INFO L206 etLargeBlockEncoding]: Checked pairs total: 52490 [2019-12-07 13:36:37,264 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 13:36:37,266 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 100 transitions [2019-12-07 13:36:39,236 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 37086 states. [2019-12-07 13:36:39,237 INFO L276 IsEmpty]: Start isEmpty. Operand 37086 states. [2019-12-07 13:36:39,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 13:36:39,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:39,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:39,243 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:39,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:39,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1862617909, now seen corresponding path program 1 times [2019-12-07 13:36:39,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:39,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1403947184] [2019-12-07 13:36:39,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:39,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:39,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:39,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1403947184] [2019-12-07 13:36:39,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:39,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:36:39,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [172683265] [2019-12-07 13:36:39,425 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:39,425 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:39,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:39,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:39,436 INFO L87 Difference]: Start difference. First operand 37086 states. Second operand 3 states. [2019-12-07 13:36:39,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:39,797 INFO L93 Difference]: Finished difference Result 36830 states and 157144 transitions. [2019-12-07 13:36:39,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:39,798 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 13:36:39,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:40,023 INFO L225 Difference]: With dead ends: 36830 [2019-12-07 13:36:40,023 INFO L226 Difference]: Without dead ends: 36102 [2019-12-07 13:36:40,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:40,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36102 states. [2019-12-07 13:36:40,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36102 to 36102. [2019-12-07 13:36:40,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36102 states. [2019-12-07 13:36:41,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36102 states to 36102 states and 154176 transitions. [2019-12-07 13:36:41,170 INFO L78 Accepts]: Start accepts. Automaton has 36102 states and 154176 transitions. Word has length 9 [2019-12-07 13:36:41,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:41,171 INFO L462 AbstractCegarLoop]: Abstraction has 36102 states and 154176 transitions. [2019-12-07 13:36:41,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:41,171 INFO L276 IsEmpty]: Start isEmpty. Operand 36102 states and 154176 transitions. [2019-12-07 13:36:41,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:36:41,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:41,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:41,178 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:41,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:41,179 INFO L82 PathProgramCache]: Analyzing trace with hash 290643941, now seen corresponding path program 1 times [2019-12-07 13:36:41,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:41,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767348616] [2019-12-07 13:36:41,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:41,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:41,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:41,240 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767348616] [2019-12-07 13:36:41,240 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:41,240 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:41,240 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265314506] [2019-12-07 13:36:41,241 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:41,241 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:41,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:41,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:41,242 INFO L87 Difference]: Start difference. First operand 36102 states and 154176 transitions. Second operand 4 states. [2019-12-07 13:36:41,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:41,687 INFO L93 Difference]: Finished difference Result 56134 states and 231868 transitions. [2019-12-07 13:36:41,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:41,688 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:36:41,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:41,915 INFO L225 Difference]: With dead ends: 56134 [2019-12-07 13:36:41,915 INFO L226 Difference]: Without dead ends: 56106 [2019-12-07 13:36:41,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:42,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56106 states. [2019-12-07 13:36:43,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56106 to 51222. [2019-12-07 13:36:43,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51222 states. [2019-12-07 13:36:43,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51222 states to 51222 states and 213628 transitions. [2019-12-07 13:36:43,315 INFO L78 Accepts]: Start accepts. Automaton has 51222 states and 213628 transitions. Word has length 15 [2019-12-07 13:36:43,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:43,315 INFO L462 AbstractCegarLoop]: Abstraction has 51222 states and 213628 transitions. [2019-12-07 13:36:43,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:43,315 INFO L276 IsEmpty]: Start isEmpty. Operand 51222 states and 213628 transitions. [2019-12-07 13:36:43,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 13:36:43,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:43,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:43,318 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:43,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:43,318 INFO L82 PathProgramCache]: Analyzing trace with hash -497322091, now seen corresponding path program 1 times [2019-12-07 13:36:43,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:43,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2147157139] [2019-12-07 13:36:43,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:43,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:43,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:43,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2147157139] [2019-12-07 13:36:43,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:43,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:43,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798990297] [2019-12-07 13:36:43,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:43,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:43,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:43,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:43,378 INFO L87 Difference]: Start difference. First operand 51222 states and 213628 transitions. Second operand 4 states. [2019-12-07 13:36:43,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:43,734 INFO L93 Difference]: Finished difference Result 64218 states and 266056 transitions. [2019-12-07 13:36:43,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:43,735 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 13:36:43,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:43,882 INFO L225 Difference]: With dead ends: 64218 [2019-12-07 13:36:43,882 INFO L226 Difference]: Without dead ends: 64218 [2019-12-07 13:36:43,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:44,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64218 states. [2019-12-07 13:36:45,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64218 to 57026. [2019-12-07 13:36:45,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57026 states. [2019-12-07 13:36:45,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57026 states to 57026 states and 237588 transitions. [2019-12-07 13:36:45,212 INFO L78 Accepts]: Start accepts. Automaton has 57026 states and 237588 transitions. Word has length 15 [2019-12-07 13:36:45,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:45,212 INFO L462 AbstractCegarLoop]: Abstraction has 57026 states and 237588 transitions. [2019-12-07 13:36:45,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:45,212 INFO L276 IsEmpty]: Start isEmpty. Operand 57026 states and 237588 transitions. [2019-12-07 13:36:45,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 13:36:45,223 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:45,223 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:45,223 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:45,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:45,223 INFO L82 PathProgramCache]: Analyzing trace with hash -210168677, now seen corresponding path program 1 times [2019-12-07 13:36:45,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:45,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477795453] [2019-12-07 13:36:45,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:45,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:45,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:45,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477795453] [2019-12-07 13:36:45,274 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:45,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:45,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176471093] [2019-12-07 13:36:45,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:45,275 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:45,275 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:45,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:45,276 INFO L87 Difference]: Start difference. First operand 57026 states and 237588 transitions. Second operand 5 states. [2019-12-07 13:36:45,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:45,902 INFO L93 Difference]: Finished difference Result 76194 states and 312200 transitions. [2019-12-07 13:36:45,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:36:45,903 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 13:36:45,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:46,058 INFO L225 Difference]: With dead ends: 76194 [2019-12-07 13:36:46,058 INFO L226 Difference]: Without dead ends: 76166 [2019-12-07 13:36:46,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:46,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76166 states. [2019-12-07 13:36:48,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76166 to 57282. [2019-12-07 13:36:48,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57282 states. [2019-12-07 13:36:48,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57282 states to 57282 states and 238068 transitions. [2019-12-07 13:36:48,351 INFO L78 Accepts]: Start accepts. Automaton has 57282 states and 238068 transitions. Word has length 21 [2019-12-07 13:36:48,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:48,351 INFO L462 AbstractCegarLoop]: Abstraction has 57282 states and 238068 transitions. [2019-12-07 13:36:48,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:48,352 INFO L276 IsEmpty]: Start isEmpty. Operand 57282 states and 238068 transitions. [2019-12-07 13:36:48,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 13:36:48,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:48,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:48,384 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:48,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:48,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1504447988, now seen corresponding path program 1 times [2019-12-07 13:36:48,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:48,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376631102] [2019-12-07 13:36:48,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:48,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:48,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:48,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376631102] [2019-12-07 13:36:48,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:48,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:48,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973178770] [2019-12-07 13:36:48,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:48,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:48,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:48,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:48,427 INFO L87 Difference]: Start difference. First operand 57282 states and 238068 transitions. Second operand 3 states. [2019-12-07 13:36:48,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:48,589 INFO L93 Difference]: Finished difference Result 44947 states and 172600 transitions. [2019-12-07 13:36:48,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:48,589 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 13:36:48,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:48,667 INFO L225 Difference]: With dead ends: 44947 [2019-12-07 13:36:48,668 INFO L226 Difference]: Without dead ends: 44947 [2019-12-07 13:36:48,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:48,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44947 states. [2019-12-07 13:36:49,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44947 to 44947. [2019-12-07 13:36:49,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44947 states. [2019-12-07 13:36:49,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44947 states to 44947 states and 172600 transitions. [2019-12-07 13:36:49,609 INFO L78 Accepts]: Start accepts. Automaton has 44947 states and 172600 transitions. Word has length 29 [2019-12-07 13:36:49,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:49,609 INFO L462 AbstractCegarLoop]: Abstraction has 44947 states and 172600 transitions. [2019-12-07 13:36:49,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:49,609 INFO L276 IsEmpty]: Start isEmpty. Operand 44947 states and 172600 transitions. [2019-12-07 13:36:49,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 13:36:49,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:49,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:49,633 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:49,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:49,634 INFO L82 PathProgramCache]: Analyzing trace with hash -28022635, now seen corresponding path program 1 times [2019-12-07 13:36:49,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:49,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43564707] [2019-12-07 13:36:49,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:49,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:49,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:49,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43564707] [2019-12-07 13:36:49,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:49,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:49,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008209457] [2019-12-07 13:36:49,670 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:36:49,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:49,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:36:49,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:49,671 INFO L87 Difference]: Start difference. First operand 44947 states and 172600 transitions. Second operand 4 states. [2019-12-07 13:36:49,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:49,730 INFO L93 Difference]: Finished difference Result 18682 states and 59454 transitions. [2019-12-07 13:36:49,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:36:49,731 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 13:36:49,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:49,753 INFO L225 Difference]: With dead ends: 18682 [2019-12-07 13:36:49,753 INFO L226 Difference]: Without dead ends: 18682 [2019-12-07 13:36:49,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:36:49,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18682 states. [2019-12-07 13:36:49,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18682 to 18682. [2019-12-07 13:36:49,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18682 states. [2019-12-07 13:36:50,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18682 states to 18682 states and 59454 transitions. [2019-12-07 13:36:50,013 INFO L78 Accepts]: Start accepts. Automaton has 18682 states and 59454 transitions. Word has length 30 [2019-12-07 13:36:50,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,013 INFO L462 AbstractCegarLoop]: Abstraction has 18682 states and 59454 transitions. [2019-12-07 13:36:50,013 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:36:50,013 INFO L276 IsEmpty]: Start isEmpty. Operand 18682 states and 59454 transitions. [2019-12-07 13:36:50,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 13:36:50,022 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,022 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,022 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,022 INFO L82 PathProgramCache]: Analyzing trace with hash -882612910, now seen corresponding path program 1 times [2019-12-07 13:36:50,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,022 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794290174] [2019-12-07 13:36:50,022 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,058 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794290174] [2019-12-07 13:36:50,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:50,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254793716] [2019-12-07 13:36:50,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:50,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:50,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:50,059 INFO L87 Difference]: Start difference. First operand 18682 states and 59454 transitions. Second operand 5 states. [2019-12-07 13:36:50,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,087 INFO L93 Difference]: Finished difference Result 3095 states and 7883 transitions. [2019-12-07 13:36:50,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:50,087 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 13:36:50,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,090 INFO L225 Difference]: With dead ends: 3095 [2019-12-07 13:36:50,091 INFO L226 Difference]: Without dead ends: 3095 [2019-12-07 13:36:50,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:50,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3095 states. [2019-12-07 13:36:50,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3095 to 3095. [2019-12-07 13:36:50,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2019-12-07 13:36:50,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 7883 transitions. [2019-12-07 13:36:50,121 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 7883 transitions. Word has length 31 [2019-12-07 13:36:50,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,121 INFO L462 AbstractCegarLoop]: Abstraction has 3095 states and 7883 transitions. [2019-12-07 13:36:50,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:50,121 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 7883 transitions. [2019-12-07 13:36:50,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 13:36:50,124 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,125 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,125 INFO L82 PathProgramCache]: Analyzing trace with hash 368185348, now seen corresponding path program 1 times [2019-12-07 13:36:50,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316080463] [2019-12-07 13:36:50,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316080463] [2019-12-07 13:36:50,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,183 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:50,183 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103701510] [2019-12-07 13:36:50,183 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:50,183 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:50,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:50,184 INFO L87 Difference]: Start difference. First operand 3095 states and 7883 transitions. Second operand 6 states. [2019-12-07 13:36:50,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,214 INFO L93 Difference]: Finished difference Result 1376 states and 3911 transitions. [2019-12-07 13:36:50,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:36:50,215 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 13:36:50,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,217 INFO L225 Difference]: With dead ends: 1376 [2019-12-07 13:36:50,217 INFO L226 Difference]: Without dead ends: 1376 [2019-12-07 13:36:50,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:50,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1376 states. [2019-12-07 13:36:50,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1376 to 1236. [2019-12-07 13:36:50,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1236 states. [2019-12-07 13:36:50,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1236 states to 1236 states and 3511 transitions. [2019-12-07 13:36:50,236 INFO L78 Accepts]: Start accepts. Automaton has 1236 states and 3511 transitions. Word has length 43 [2019-12-07 13:36:50,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,237 INFO L462 AbstractCegarLoop]: Abstraction has 1236 states and 3511 transitions. [2019-12-07 13:36:50,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:50,237 INFO L276 IsEmpty]: Start isEmpty. Operand 1236 states and 3511 transitions. [2019-12-07 13:36:50,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:50,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,240 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,240 INFO L82 PathProgramCache]: Analyzing trace with hash 2028178460, now seen corresponding path program 1 times [2019-12-07 13:36:50,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2008976991] [2019-12-07 13:36:50,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2008976991] [2019-12-07 13:36:50,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:50,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186989863] [2019-12-07 13:36:50,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:50,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:50,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:50,291 INFO L87 Difference]: Start difference. First operand 1236 states and 3511 transitions. Second operand 3 states. [2019-12-07 13:36:50,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,325 INFO L93 Difference]: Finished difference Result 1249 states and 3529 transitions. [2019-12-07 13:36:50,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:50,325 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 13:36:50,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,327 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 13:36:50,327 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 13:36:50,327 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:50,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 13:36:50,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1243. [2019-12-07 13:36:50,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1243 states. [2019-12-07 13:36:50,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1243 states to 1243 states and 3522 transitions. [2019-12-07 13:36:50,341 INFO L78 Accepts]: Start accepts. Automaton has 1243 states and 3522 transitions. Word has length 58 [2019-12-07 13:36:50,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,341 INFO L462 AbstractCegarLoop]: Abstraction has 1243 states and 3522 transitions. [2019-12-07 13:36:50,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:50,341 INFO L276 IsEmpty]: Start isEmpty. Operand 1243 states and 3522 transitions. [2019-12-07 13:36:50,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:50,343 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,343 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,343 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1114375606, now seen corresponding path program 1 times [2019-12-07 13:36:50,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753345187] [2019-12-07 13:36:50,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753345187] [2019-12-07 13:36:50,379 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:36:50,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1122460076] [2019-12-07 13:36:50,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:50,380 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:50,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:50,381 INFO L87 Difference]: Start difference. First operand 1243 states and 3522 transitions. Second operand 3 states. [2019-12-07 13:36:50,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,413 INFO L93 Difference]: Finished difference Result 1249 states and 3519 transitions. [2019-12-07 13:36:50,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:50,414 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 13:36:50,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,416 INFO L225 Difference]: With dead ends: 1249 [2019-12-07 13:36:50,416 INFO L226 Difference]: Without dead ends: 1249 [2019-12-07 13:36:50,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:50,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1249 states. [2019-12-07 13:36:50,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1249 to 1240. [2019-12-07 13:36:50,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1240 states. [2019-12-07 13:36:50,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1240 states to 1240 states and 3510 transitions. [2019-12-07 13:36:50,433 INFO L78 Accepts]: Start accepts. Automaton has 1240 states and 3510 transitions. Word has length 58 [2019-12-07 13:36:50,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,434 INFO L462 AbstractCegarLoop]: Abstraction has 1240 states and 3510 transitions. [2019-12-07 13:36:50,434 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:50,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1240 states and 3510 transitions. [2019-12-07 13:36:50,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:50,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,437 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,437 INFO L82 PathProgramCache]: Analyzing trace with hash 1114895507, now seen corresponding path program 1 times [2019-12-07 13:36:50,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,437 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683002586] [2019-12-07 13:36:50,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,507 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683002586] [2019-12-07 13:36:50,507 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:36:50,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1132821480] [2019-12-07 13:36:50,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:50,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:50,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:50,508 INFO L87 Difference]: Start difference. First operand 1240 states and 3510 transitions. Second operand 5 states. [2019-12-07 13:36:50,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,631 INFO L93 Difference]: Finished difference Result 1781 states and 5032 transitions. [2019-12-07 13:36:50,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:36:50,632 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 13:36:50,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,634 INFO L225 Difference]: With dead ends: 1781 [2019-12-07 13:36:50,634 INFO L226 Difference]: Without dead ends: 1781 [2019-12-07 13:36:50,635 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:50,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1781 states. [2019-12-07 13:36:50,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1781 to 1605. [2019-12-07 13:36:50,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1605 states. [2019-12-07 13:36:50,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1605 states to 1605 states and 4540 transitions. [2019-12-07 13:36:50,659 INFO L78 Accepts]: Start accepts. Automaton has 1605 states and 4540 transitions. Word has length 58 [2019-12-07 13:36:50,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,659 INFO L462 AbstractCegarLoop]: Abstraction has 1605 states and 4540 transitions. [2019-12-07 13:36:50,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:50,659 INFO L276 IsEmpty]: Start isEmpty. Operand 1605 states and 4540 transitions. [2019-12-07 13:36:50,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:50,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,663 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,663 INFO L82 PathProgramCache]: Analyzing trace with hash -217131029, now seen corresponding path program 2 times [2019-12-07 13:36:50,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414445064] [2019-12-07 13:36:50,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:50,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:50,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:50,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414445064] [2019-12-07 13:36:50,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:50,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:50,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41485068] [2019-12-07 13:36:50,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:50,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:50,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:50,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:50,739 INFO L87 Difference]: Start difference. First operand 1605 states and 4540 transitions. Second operand 6 states. [2019-12-07 13:36:50,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:50,974 INFO L93 Difference]: Finished difference Result 2387 states and 6749 transitions. [2019-12-07 13:36:50,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:36:50,974 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 13:36:50,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:50,976 INFO L225 Difference]: With dead ends: 2387 [2019-12-07 13:36:50,976 INFO L226 Difference]: Without dead ends: 2387 [2019-12-07 13:36:50,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:36:50,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2387 states. [2019-12-07 13:36:50,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2387 to 1749. [2019-12-07 13:36:50,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1749 states. [2019-12-07 13:36:50,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 4968 transitions. [2019-12-07 13:36:50,996 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 4968 transitions. Word has length 58 [2019-12-07 13:36:50,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:50,997 INFO L462 AbstractCegarLoop]: Abstraction has 1749 states and 4968 transitions. [2019-12-07 13:36:50,997 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:50,997 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 4968 transitions. [2019-12-07 13:36:50,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:50,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:50,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:50,999 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:50,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:50,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1417485459, now seen corresponding path program 3 times [2019-12-07 13:36:50,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:50,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799388001] [2019-12-07 13:36:51,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:51,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:51,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:51,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799388001] [2019-12-07 13:36:51,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:51,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:36:51,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185433365] [2019-12-07 13:36:51,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:36:51,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:51,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:36:51,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:36:51,059 INFO L87 Difference]: Start difference. First operand 1749 states and 4968 transitions. Second operand 6 states. [2019-12-07 13:36:51,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:51,249 INFO L93 Difference]: Finished difference Result 2563 states and 7224 transitions. [2019-12-07 13:36:51,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 13:36:51,249 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 13:36:51,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:51,252 INFO L225 Difference]: With dead ends: 2563 [2019-12-07 13:36:51,252 INFO L226 Difference]: Without dead ends: 2563 [2019-12-07 13:36:51,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:36:51,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2563 states. [2019-12-07 13:36:51,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2563 to 1909. [2019-12-07 13:36:51,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1909 states. [2019-12-07 13:36:51,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1909 states to 1909 states and 5424 transitions. [2019-12-07 13:36:51,274 INFO L78 Accepts]: Start accepts. Automaton has 1909 states and 5424 transitions. Word has length 58 [2019-12-07 13:36:51,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:51,275 INFO L462 AbstractCegarLoop]: Abstraction has 1909 states and 5424 transitions. [2019-12-07 13:36:51,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:36:51,275 INFO L276 IsEmpty]: Start isEmpty. Operand 1909 states and 5424 transitions. [2019-12-07 13:36:51,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 13:36:51,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:51,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:51,277 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:51,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:51,277 INFO L82 PathProgramCache]: Analyzing trace with hash -687244225, now seen corresponding path program 4 times [2019-12-07 13:36:51,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:51,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505491970] [2019-12-07 13:36:51,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:51,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:51,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:51,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1505491970] [2019-12-07 13:36:51,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:51,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:36:51,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106683401] [2019-12-07 13:36:51,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:36:51,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:51,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:36:51,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:51,338 INFO L87 Difference]: Start difference. First operand 1909 states and 5424 transitions. Second operand 7 states. [2019-12-07 13:36:51,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:51,612 INFO L93 Difference]: Finished difference Result 2844 states and 8023 transitions. [2019-12-07 13:36:51,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 13:36:51,612 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 58 [2019-12-07 13:36:51,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:51,615 INFO L225 Difference]: With dead ends: 2844 [2019-12-07 13:36:51,615 INFO L226 Difference]: Without dead ends: 2844 [2019-12-07 13:36:51,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 13:36:51,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2844 states. [2019-12-07 13:36:51,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2844 to 1853. [2019-12-07 13:36:51,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1853 states. [2019-12-07 13:36:51,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1853 states to 1853 states and 5264 transitions. [2019-12-07 13:36:51,637 INFO L78 Accepts]: Start accepts. Automaton has 1853 states and 5264 transitions. Word has length 58 [2019-12-07 13:36:51,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:51,637 INFO L462 AbstractCegarLoop]: Abstraction has 1853 states and 5264 transitions. [2019-12-07 13:36:51,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:36:51,637 INFO L276 IsEmpty]: Start isEmpty. Operand 1853 states and 5264 transitions. [2019-12-07 13:36:51,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:36:51,640 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:51,640 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:51,640 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:51,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:51,640 INFO L82 PathProgramCache]: Analyzing trace with hash 658273713, now seen corresponding path program 1 times [2019-12-07 13:36:51,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:51,640 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250788912] [2019-12-07 13:36:51,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:51,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:51,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:51,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250788912] [2019-12-07 13:36:51,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:51,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:51,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937389037] [2019-12-07 13:36:51,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:51,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:51,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:51,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:51,677 INFO L87 Difference]: Start difference. First operand 1853 states and 5264 transitions. Second operand 3 states. [2019-12-07 13:36:51,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:51,795 INFO L93 Difference]: Finished difference Result 1852 states and 5262 transitions. [2019-12-07 13:36:51,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:51,795 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 13:36:51,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:51,797 INFO L225 Difference]: With dead ends: 1852 [2019-12-07 13:36:51,797 INFO L226 Difference]: Without dead ends: 1852 [2019-12-07 13:36:51,797 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:51,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1852 states. [2019-12-07 13:36:51,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1852 to 1319. [2019-12-07 13:36:51,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1319 states. [2019-12-07 13:36:51,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1319 states to 1319 states and 3756 transitions. [2019-12-07 13:36:51,811 INFO L78 Accepts]: Start accepts. Automaton has 1319 states and 3756 transitions. Word has length 59 [2019-12-07 13:36:51,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:51,811 INFO L462 AbstractCegarLoop]: Abstraction has 1319 states and 3756 transitions. [2019-12-07 13:36:51,811 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:51,811 INFO L276 IsEmpty]: Start isEmpty. Operand 1319 states and 3756 transitions. [2019-12-07 13:36:51,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:36:51,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:51,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:51,813 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:51,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:51,813 INFO L82 PathProgramCache]: Analyzing trace with hash 368051854, now seen corresponding path program 1 times [2019-12-07 13:36:51,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:51,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780404683] [2019-12-07 13:36:51,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:51,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:51,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:51,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780404683] [2019-12-07 13:36:51,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:51,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 13:36:51,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733243154] [2019-12-07 13:36:51,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:36:51,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:51,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:36:51,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:36:51,963 INFO L87 Difference]: Start difference. First operand 1319 states and 3756 transitions. Second operand 12 states. [2019-12-07 13:36:52,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:52,357 INFO L93 Difference]: Finished difference Result 3062 states and 7900 transitions. [2019-12-07 13:36:52,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:36:52,357 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 59 [2019-12-07 13:36:52,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:52,359 INFO L225 Difference]: With dead ends: 3062 [2019-12-07 13:36:52,359 INFO L226 Difference]: Without dead ends: 1845 [2019-12-07 13:36:52,359 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 13:36:52,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1845 states. [2019-12-07 13:36:52,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1845 to 1187. [2019-12-07 13:36:52,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1187 states. [2019-12-07 13:36:52,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 3309 transitions. [2019-12-07 13:36:52,372 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 3309 transitions. Word has length 59 [2019-12-07 13:36:52,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:52,373 INFO L462 AbstractCegarLoop]: Abstraction has 1187 states and 3309 transitions. [2019-12-07 13:36:52,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:36:52,373 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 3309 transitions. [2019-12-07 13:36:52,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:36:52,374 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:52,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:52,374 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:52,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:52,375 INFO L82 PathProgramCache]: Analyzing trace with hash 1147587362, now seen corresponding path program 2 times [2019-12-07 13:36:52,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:52,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043091873] [2019-12-07 13:36:52,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:52,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:52,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:52,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043091873] [2019-12-07 13:36:52,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:52,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 13:36:52,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [74293386] [2019-12-07 13:36:52,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 13:36:52,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:52,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 13:36:52,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 13:36:52,565 INFO L87 Difference]: Start difference. First operand 1187 states and 3309 transitions. Second operand 13 states. [2019-12-07 13:36:53,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:53,105 INFO L93 Difference]: Finished difference Result 2791 states and 6966 transitions. [2019-12-07 13:36:53,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 13:36:53,105 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 59 [2019-12-07 13:36:53,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:53,107 INFO L225 Difference]: With dead ends: 2791 [2019-12-07 13:36:53,107 INFO L226 Difference]: Without dead ends: 1216 [2019-12-07 13:36:53,107 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=502, Unknown=0, NotChecked=0, Total=702 [2019-12-07 13:36:53,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1216 states. [2019-12-07 13:36:53,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1216 to 875. [2019-12-07 13:36:53,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 875 states. [2019-12-07 13:36:53,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 875 states to 875 states and 2144 transitions. [2019-12-07 13:36:53,116 INFO L78 Accepts]: Start accepts. Automaton has 875 states and 2144 transitions. Word has length 59 [2019-12-07 13:36:53,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:53,116 INFO L462 AbstractCegarLoop]: Abstraction has 875 states and 2144 transitions. [2019-12-07 13:36:53,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 13:36:53,116 INFO L276 IsEmpty]: Start isEmpty. Operand 875 states and 2144 transitions. [2019-12-07 13:36:53,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 13:36:53,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:53,117 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:53,117 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:53,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:53,117 INFO L82 PathProgramCache]: Analyzing trace with hash 83225480, now seen corresponding path program 3 times [2019-12-07 13:36:53,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:53,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701469619] [2019-12-07 13:36:53,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:53,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:53,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:53,147 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701469619] [2019-12-07 13:36:53,147 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:53,147 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:36:53,147 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40332860] [2019-12-07 13:36:53,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:36:53,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:53,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:36:53,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:53,148 INFO L87 Difference]: Start difference. First operand 875 states and 2144 transitions. Second operand 3 states. [2019-12-07 13:36:53,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:53,158 INFO L93 Difference]: Finished difference Result 830 states and 1977 transitions. [2019-12-07 13:36:53,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:36:53,159 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 13:36:53,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:53,159 INFO L225 Difference]: With dead ends: 830 [2019-12-07 13:36:53,159 INFO L226 Difference]: Without dead ends: 830 [2019-12-07 13:36:53,160 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:36:53,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 830 states. [2019-12-07 13:36:53,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 830 to 782. [2019-12-07 13:36:53,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2019-12-07 13:36:53,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 1855 transitions. [2019-12-07 13:36:53,170 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 1855 transitions. Word has length 59 [2019-12-07 13:36:53,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:53,170 INFO L462 AbstractCegarLoop]: Abstraction has 782 states and 1855 transitions. [2019-12-07 13:36:53,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:36:53,170 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 1855 transitions. [2019-12-07 13:36:53,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:36:53,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:53,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:53,172 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:53,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:53,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1492443498, now seen corresponding path program 1 times [2019-12-07 13:36:53,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:53,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326603724] [2019-12-07 13:36:53,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:53,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:53,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:53,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326603724] [2019-12-07 13:36:53,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:53,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:36:53,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [411457998] [2019-12-07 13:36:53,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:36:53,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:53,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:36:53,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:36:53,226 INFO L87 Difference]: Start difference. First operand 782 states and 1855 transitions. Second operand 5 states. [2019-12-07 13:36:53,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:53,259 INFO L93 Difference]: Finished difference Result 972 states and 2186 transitions. [2019-12-07 13:36:53,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:36:53,259 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2019-12-07 13:36:53,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:53,259 INFO L225 Difference]: With dead ends: 972 [2019-12-07 13:36:53,259 INFO L226 Difference]: Without dead ends: 237 [2019-12-07 13:36:53,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:36:53,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2019-12-07 13:36:53,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 237. [2019-12-07 13:36:53,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2019-12-07 13:36:53,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 414 transitions. [2019-12-07 13:36:53,262 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 414 transitions. Word has length 60 [2019-12-07 13:36:53,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:53,262 INFO L462 AbstractCegarLoop]: Abstraction has 237 states and 414 transitions. [2019-12-07 13:36:53,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:36:53,262 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 414 transitions. [2019-12-07 13:36:53,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:36:53,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:53,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:53,263 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:53,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:53,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1893006908, now seen corresponding path program 2 times [2019-12-07 13:36:53,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:53,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312963310] [2019-12-07 13:36:53,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:53,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:53,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:53,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312963310] [2019-12-07 13:36:53,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:53,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 13:36:53,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [115436709] [2019-12-07 13:36:53,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 13:36:53,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:53,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 13:36:53,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:36:53,458 INFO L87 Difference]: Start difference. First operand 237 states and 414 transitions. Second operand 15 states. [2019-12-07 13:36:53,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:53,850 INFO L93 Difference]: Finished difference Result 411 states and 699 transitions. [2019-12-07 13:36:53,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 13:36:53,850 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 60 [2019-12-07 13:36:53,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:53,851 INFO L225 Difference]: With dead ends: 411 [2019-12-07 13:36:53,851 INFO L226 Difference]: Without dead ends: 379 [2019-12-07 13:36:53,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=538, Unknown=0, NotChecked=0, Total=650 [2019-12-07 13:36:53,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2019-12-07 13:36:53,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 337. [2019-12-07 13:36:53,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2019-12-07 13:36:53,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 585 transitions. [2019-12-07 13:36:53,855 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 585 transitions. Word has length 60 [2019-12-07 13:36:53,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:53,856 INFO L462 AbstractCegarLoop]: Abstraction has 337 states and 585 transitions. [2019-12-07 13:36:53,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 13:36:53,856 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 585 transitions. [2019-12-07 13:36:53,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:36:53,856 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:53,856 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:53,857 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:53,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:53,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1191078724, now seen corresponding path program 3 times [2019-12-07 13:36:53,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:53,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634037890] [2019-12-07 13:36:53,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:53,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:36:53,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:36:53,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634037890] [2019-12-07 13:36:53,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:36:53,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:36:53,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1101458686] [2019-12-07 13:36:53,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:36:53,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 13:36:53,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:36:53,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:36:53,984 INFO L87 Difference]: Start difference. First operand 337 states and 585 transitions. Second operand 12 states. [2019-12-07 13:36:54,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:36:54,142 INFO L93 Difference]: Finished difference Result 439 states and 735 transitions. [2019-12-07 13:36:54,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 13:36:54,143 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-12-07 13:36:54,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:36:54,143 INFO L225 Difference]: With dead ends: 439 [2019-12-07 13:36:54,143 INFO L226 Difference]: Without dead ends: 407 [2019-12-07 13:36:54,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=246, Unknown=0, NotChecked=0, Total=306 [2019-12-07 13:36:54,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2019-12-07 13:36:54,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 345. [2019-12-07 13:36:54,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-07 13:36:54,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 599 transitions. [2019-12-07 13:36:54,148 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 599 transitions. Word has length 60 [2019-12-07 13:36:54,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:36:54,148 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 599 transitions. [2019-12-07 13:36:54,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:36:54,148 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 599 transitions. [2019-12-07 13:36:54,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 13:36:54,149 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:36:54,149 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:36:54,149 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:36:54,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:36:54,149 INFO L82 PathProgramCache]: Analyzing trace with hash -1108974140, now seen corresponding path program 4 times [2019-12-07 13:36:54,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 13:36:54,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69975008] [2019-12-07 13:36:54,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:36:54,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:36:54,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:36:54,232 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 13:36:54,232 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:36:54,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 |v_ULTIMATE.start_main_~#t1245~0.offset_16|) (= v_~z$r_buff0_thd0~0_435 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1245~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1245~0.base_19|) |v_ULTIMATE.start_main_~#t1245~0.offset_16| 0)) |v_#memory_int_25|) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1245~0.base_19| 4)) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1245~0.base_19|) (= v_~z$r_buff0_thd1~0_87 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1245~0.base_19| 1)) (= v_~z$w_buff1_used~0_620 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1245~0.base_19|) 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ULTIMATE.start_main_~#t1246~0.offset=|v_ULTIMATE.start_main_~#t1246~0.offset_17|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ULTIMATE.start_main_~#t1246~0.base=|v_ULTIMATE.start_main_~#t1246~0.base_22|, ULTIMATE.start_main_~#t1247~0.base=|v_ULTIMATE.start_main_~#t1247~0.base_21|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ULTIMATE.start_main_~#t1245~0.offset=|v_ULTIMATE.start_main_~#t1245~0.offset_16|, ~x~0=v_~x~0_30, ULTIMATE.start_main_~#t1245~0.base=|v_ULTIMATE.start_main_~#t1245~0.base_19|, ULTIMATE.start_main_~#t1248~0.base=|v_ULTIMATE.start_main_~#t1248~0.base_22|, ULTIMATE.start_main_~#t1247~0.offset=|v_ULTIMATE.start_main_~#t1247~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1248~0.offset=|v_ULTIMATE.start_main_~#t1248~0.offset_17|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ULTIMATE.start_main_~#t1246~0.offset, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t1246~0.base, ULTIMATE.start_main_~#t1247~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1245~0.offset, ~x~0, ULTIMATE.start_main_~#t1245~0.base, ULTIMATE.start_main_~#t1248~0.base, ULTIMATE.start_main_~#t1247~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1248~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:36:54,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= |v_ULTIMATE.start_main_~#t1246~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1246~0.base_13|)) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1246~0.base_13|)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1246~0.base_13| 1)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1246~0.base_13| 4) |v_#length_23|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1246~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1246~0.base_13|) |v_ULTIMATE.start_main_~#t1246~0.offset_11| 1)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1246~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1246~0.offset=|v_ULTIMATE.start_main_~#t1246~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1246~0.base=|v_ULTIMATE.start_main_~#t1246~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1246~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1246~0.base] because there is no mapped edge [2019-12-07 13:36:54,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1247~0.base_12| 1) |v_#valid_46|) (not (= |v_ULTIMATE.start_main_~#t1247~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t1247~0.offset_10| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1247~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1247~0.base_12|) |v_ULTIMATE.start_main_~#t1247~0.offset_10| 2)) |v_#memory_int_17|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1247~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1247~0.base_12|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1247~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1247~0.offset=|v_ULTIMATE.start_main_~#t1247~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1247~0.base=|v_ULTIMATE.start_main_~#t1247~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1247~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1247~0.base] because there is no mapped edge [2019-12-07 13:36:54,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1248~0.base_12| 1)) (not (= |v_ULTIMATE.start_main_~#t1248~0.base_12| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1248~0.base_12| 4)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1248~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1248~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1248~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1248~0.base_12|) |v_ULTIMATE.start_main_~#t1248~0.offset_10| 3)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1248~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1248~0.base=|v_ULTIMATE.start_main_~#t1248~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1248~0.offset=|v_ULTIMATE.start_main_~#t1248~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1248~0.base, ULTIMATE.start_main_~#t1248~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 13:36:54,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:36:54,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:36:54,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:36:54,238 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-1683167558 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1683167558 256)))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-1683167558| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1683167558| ~z$w_buff0_used~0_In-1683167558)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1683167558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1683167558} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1683167558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1683167558, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1683167558|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:36:54,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-866420506 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-866420506 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In-866420506 |P2Thread1of1ForFork2_#t~ite3_Out-866420506|)) (and (not .cse1) (not .cse0) (= ~z$w_buff1~0_In-866420506 |P2Thread1of1ForFork2_#t~ite3_Out-866420506|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-866420506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866420506, ~z$w_buff1~0=~z$w_buff1~0_In-866420506, ~z~0=~z~0_In-866420506} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-866420506|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-866420506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866420506, ~z$w_buff1~0=~z$w_buff1~0_In-866420506, ~z~0=~z~0_In-866420506} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:36:54,239 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1898741722 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1898741722 256))) (.cse1 (= (mod ~z$r_buff1_thd4~0_In-1898741722 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1898741722 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-1898741722|)) (and (= ~z$w_buff1_used~0_In-1898741722 |P3Thread1of1ForFork3_#t~ite12_Out-1898741722|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1898741722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1898741722, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1898741722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1898741722} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1898741722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1898741722, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1898741722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1898741722, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1898741722|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= ~z$r_buff0_thd4~0_Out680750930 ~z$r_buff0_thd4~0_In680750930)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In680750930 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In680750930 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= 0 ~z$r_buff0_thd4~0_Out680750930) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In680750930} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out680750930, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out680750930|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1709604888 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In-1709604888 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1709604888 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-1709604888 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1709604888| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd4~0_In-1709604888 |P3Thread1of1ForFork3_#t~ite14_Out-1709604888|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1709604888, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1709604888, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1709604888, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1709604888} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1709604888, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1709604888, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1709604888|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1709604888, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1709604888} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1996925979 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1996925979 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1996925979| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1996925979 |P2Thread1of1ForFork2_#t~ite5_Out-1996925979|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996925979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996925979} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1996925979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996925979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996925979} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:36:54,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In159571 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In159571 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In159571 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In159571 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite6_Out159571| ~z$w_buff1_used~0_In159571) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite6_Out159571| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In159571, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In159571, ~z$w_buff1_used~0=~z$w_buff1_used~0_In159571, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In159571} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out159571|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In159571, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In159571, ~z$w_buff1_used~0=~z$w_buff1_used~0_In159571, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In159571} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:36:54,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1945376630 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1945376630 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out1945376630|) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out1945376630| ~z$r_buff0_thd3~0_In1945376630) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1945376630, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1945376630} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1945376630, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1945376630, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1945376630|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:36:54,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1535385938 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1535385938 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1535385938 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1535385938 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out-1535385938| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite8_Out-1535385938| ~z$r_buff1_thd3~0_In-1535385938) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1535385938, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1535385938, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1535385938, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1535385938} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1535385938, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1535385938, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1535385938, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1535385938, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1535385938|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:36:54,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:36:54,241 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 13:36:54,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1702816528 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1702816528 256)))) (or (and (= ~z~0_In-1702816528 |ULTIMATE.start_main_#t~ite19_Out-1702816528|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1702816528 |ULTIMATE.start_main_#t~ite19_Out-1702816528|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702816528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702816528, ~z$w_buff1~0=~z$w_buff1~0_In-1702816528, ~z~0=~z~0_In-1702816528} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1702816528|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702816528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702816528, ~z$w_buff1~0=~z$w_buff1~0_In-1702816528, ~z~0=~z~0_In-1702816528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:36:54,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:36:54,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1527255017 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1527255017 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out1527255017| ~z$w_buff0_used~0_In1527255017)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out1527255017|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1527255017, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1527255017} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1527255017, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1527255017, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1527255017|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:36:54,242 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In115977584 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In115977584 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In115977584 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In115977584 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out115977584|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In115977584 |ULTIMATE.start_main_#t~ite22_Out115977584|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In115977584, ~z$w_buff0_used~0=~z$w_buff0_used~0_In115977584, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In115977584, ~z$w_buff1_used~0=~z$w_buff1_used~0_In115977584} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In115977584, ~z$w_buff0_used~0=~z$w_buff0_used~0_In115977584, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In115977584, ~z$w_buff1_used~0=~z$w_buff1_used~0_In115977584, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out115977584|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:36:54,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1795374250 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1795374250 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1795374250 |ULTIMATE.start_main_#t~ite23_Out-1795374250|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite23_Out-1795374250| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1795374250, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1795374250} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1795374250, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1795374250, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1795374250|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:36:54,243 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In207516245 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In207516245 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In207516245 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In207516245 256)))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out207516245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite24_Out207516245| ~z$r_buff1_thd0~0_In207516245)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In207516245, ~z$w_buff0_used~0=~z$w_buff0_used~0_In207516245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In207516245, ~z$w_buff1_used~0=~z$w_buff1_used~0_In207516245} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In207516245, ~z$w_buff0_used~0=~z$w_buff0_used~0_In207516245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In207516245, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out207516245|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In207516245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:36:54,245 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1062062143 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1062062143 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1062062143 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1062062143 256) 0) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1062062143 256))))) (= |ULTIMATE.start_main_#t~ite39_Out1062062143| ~z$w_buff1_used~0_In1062062143) (= |ULTIMATE.start_main_#t~ite39_Out1062062143| |ULTIMATE.start_main_#t~ite40_Out1062062143|)) (and (not .cse0) (= ~z$w_buff1_used~0_In1062062143 |ULTIMATE.start_main_#t~ite40_Out1062062143|) (= |ULTIMATE.start_main_#t~ite39_In1062062143| |ULTIMATE.start_main_#t~ite39_Out1062062143|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1062062143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1062062143, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1062062143|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1062062143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1062062143, ~weak$$choice2~0=~weak$$choice2~0_In1062062143} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1062062143, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1062062143|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1062062143|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1062062143, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1062062143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1062062143, ~weak$$choice2~0=~weak$$choice2~0_In1062062143} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:36:54,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:36:54,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1623597840 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_In-1623597840| |ULTIMATE.start_main_#t~ite45_Out-1623597840|) (= |ULTIMATE.start_main_#t~ite46_Out-1623597840| ~z$r_buff1_thd0~0_In-1623597840) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite45_Out-1623597840| ~z$r_buff1_thd0~0_In-1623597840) (= |ULTIMATE.start_main_#t~ite46_Out-1623597840| |ULTIMATE.start_main_#t~ite45_Out-1623597840|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1623597840 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1623597840 256)) (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-1623597840 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1623597840 256)))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1623597840, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1623597840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1623597840, ~weak$$choice2~0=~weak$$choice2~0_In-1623597840, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1623597840|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1623597840, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1623597840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1623597840, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1623597840|, ~weak$$choice2~0=~weak$$choice2~0_In-1623597840, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1623597840|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:36:54,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:36:54,246 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:36:54,306 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:36:54 BasicIcfg [2019-12-07 13:36:54,306 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:36:54,306 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:36:54,306 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:36:54,306 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:36:54,306 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:36:34" (3/4) ... [2019-12-07 13:36:54,308 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:36:54,308 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] ULTIMATE.startENTRY-->L833: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= 0 v_~__unbuffered_p0_EAX~0_33) (= v_~z$w_buff0_used~0_862 0) (= 0 v_~z$r_buff1_thd3~0_308) (= 0 v_~z$r_buff0_thd3~0_195) (= |v_#NULL.offset_7| 0) (= v_~x~0_30 0) (= v_~z$r_buff1_thd1~0_233 0) (< 0 |v_#StackHeapBarrier_21|) (= v_~z$r_buff1_thd0~0_427 0) (= v_~b~0_102 0) (= v_~__unbuffered_cnt~0_109 0) (= 0 v_~z$flush_delayed~0_82) (= 0 v_~weak$$choice0~0_17) (= v_~z$w_buff1~0_400 0) (= v_~z$r_buff0_thd2~0_88 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~__unbuffered_p3_EAX~0_243 0) (= 0 |v_ULTIMATE.start_main_~#t1245~0.offset_16|) (= v_~z$r_buff0_thd0~0_435 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1245~0.base_19| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1245~0.base_19|) |v_ULTIMATE.start_main_~#t1245~0.offset_16| 0)) |v_#memory_int_25|) (= 0 v_~__unbuffered_p3_EBX~0_243) (= 0 v_~z$r_buff0_thd4~0_372) (= v_~y~0_50 0) (= v_~z$w_buff0~0_412 0) (= v_~weak$$choice2~0_150 0) (= 0 v_~z$r_buff1_thd4~0_281) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1245~0.base_19| 4)) (= v_~z~0_221 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff1_thd2~0_234 0) (= v_~z$read_delayed~0_7 0) (= 0 |v_#NULL.base_7|) (< |v_#StackHeapBarrier_21| |v_ULTIMATE.start_main_~#t1245~0.base_19|) (= v_~z$r_buff0_thd1~0_87 0) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t1245~0.base_19| 1)) (= v_~z$w_buff1_used~0_620 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1245~0.base_19|) 0) (= v_~main$tmp_guard1~0_25 0) (= v_~a~0_234 0) (= v_~main$tmp_guard0~0_24 0) (= v_~z$mem_tmp~0_23 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_21|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_234, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_44|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_101|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_38|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_120|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_57|, ~a~0=v_~a~0_234, ULTIMATE.start_main_~#t1246~0.offset=|v_ULTIMATE.start_main_~#t1246~0.offset_17|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_435, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_33, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_372, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_243, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_23, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_45|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_41|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_620, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_40|, ULTIMATE.start_main_~#t1246~0.base=|v_ULTIMATE.start_main_~#t1246~0.base_22|, ULTIMATE.start_main_~#t1247~0.base=|v_ULTIMATE.start_main_~#t1247~0.base_21|, ~z$flush_delayed~0=v_~z$flush_delayed~0_82, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_36|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_69|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_21|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_47|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_233, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_195, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ULTIMATE.start_main_~#t1245~0.offset=|v_ULTIMATE.start_main_~#t1245~0.offset_16|, ~x~0=v_~x~0_30, ULTIMATE.start_main_~#t1245~0.base=|v_ULTIMATE.start_main_~#t1245~0.base_19|, ULTIMATE.start_main_~#t1248~0.base=|v_ULTIMATE.start_main_~#t1248~0.base_22|, ULTIMATE.start_main_~#t1247~0.offset=|v_ULTIMATE.start_main_~#t1247~0.offset_16|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_281, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_43|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_40|, ~z$w_buff1~0=v_~z$w_buff1~0_400, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_34|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_36|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_36|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_40|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_55|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_427, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_28|, ~y~0=v_~y~0_50, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_88, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_862, ~z$w_buff0~0=v_~z$w_buff0~0_412, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_40|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_28|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_308, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_46|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_243, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_61|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_64|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_36|, ULTIMATE.start_main_~#t1248~0.offset=|v_ULTIMATE.start_main_~#t1248~0.offset_17|, ~b~0=v_~b~0_102, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_14|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_22|, ~z~0=v_~z~0_221, ~weak$$choice2~0=v_~weak$$choice2~0_150, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_87} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ULTIMATE.start_main_~#t1246~0.offset, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t1246~0.base, ULTIMATE.start_main_~#t1247~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1245~0.offset, ~x~0, ULTIMATE.start_main_~#t1245~0.base, ULTIMATE.start_main_~#t1248~0.base, ULTIMATE.start_main_~#t1247~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t1248~0.offset, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:36:54,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L833-1-->L835: Formula: (and (= |v_ULTIMATE.start_main_~#t1246~0.offset_11| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1246~0.base_13|)) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1246~0.base_13|)) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1246~0.base_13| 1)) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1246~0.base_13| 4) |v_#length_23|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1246~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1246~0.base_13|) |v_ULTIMATE.start_main_~#t1246~0.offset_11| 1)) |v_#memory_int_19|) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1246~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1246~0.offset=|v_ULTIMATE.start_main_~#t1246~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_23|, ULTIMATE.start_main_~#t1246~0.base=|v_ULTIMATE.start_main_~#t1246~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1246~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1246~0.base] because there is no mapped edge [2019-12-07 13:36:54,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L835-1-->L837: Formula: (and (= (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1247~0.base_12| 1) |v_#valid_46|) (not (= |v_ULTIMATE.start_main_~#t1247~0.base_12| 0)) (= |v_ULTIMATE.start_main_~#t1247~0.offset_10| 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1247~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1247~0.base_12|) |v_ULTIMATE.start_main_~#t1247~0.offset_10| 2)) |v_#memory_int_17|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1247~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1247~0.base_12|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1247~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1247~0.offset=|v_ULTIMATE.start_main_~#t1247~0.offset_10|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_21|, ULTIMATE.start_main_~#t1247~0.base=|v_ULTIMATE.start_main_~#t1247~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1247~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t1247~0.base] because there is no mapped edge [2019-12-07 13:36:54,309 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L837-1-->L839: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1248~0.base_12| 1)) (not (= |v_ULTIMATE.start_main_~#t1248~0.base_12| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1248~0.base_12| 4)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1248~0.base_12|)) (= |v_ULTIMATE.start_main_~#t1248~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1248~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1248~0.base_12|) |v_ULTIMATE.start_main_~#t1248~0.offset_10| 3)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1248~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1248~0.base=|v_ULTIMATE.start_main_~#t1248~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t1248~0.offset=|v_ULTIMATE.start_main_~#t1248~0.offset_10|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1248~0.base, ULTIMATE.start_main_~#t1248~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17] because there is no mapped edge [2019-12-07 13:36:54,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [660] [660] L4-->L810: Formula: (and (= v_~z$r_buff0_thd0~0_60 v_~z$r_buff1_thd0~0_36) (= v_~__unbuffered_p3_EBX~0_4 v_~b~0_4) (= v_~__unbuffered_p3_EAX~0_4 v_~a~0_3) (= v_~z$r_buff1_thd1~0_3 v_~z$r_buff0_thd1~0_3) (= v_~z$r_buff1_thd2~0_4 v_~z$r_buff0_thd2~0_4) (= v_~z$r_buff0_thd4~0_20 v_~z$r_buff1_thd4~0_14) (= 1 v_~a~0_3) (= v_~z$r_buff0_thd4~0_19 1) (= v_~z$r_buff0_thd3~0_17 v_~z$r_buff1_thd3~0_11) (not (= 0 v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6))) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_20, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=v_P3Thread1of1ForFork3___VERIFIER_assert_~expression_6, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_14, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_11, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_4, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_4, ~a~0=v_~a~0_3, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_60, ~b~0=v_~b~0_4, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_36, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_3, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_4, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_19, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_17, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_3, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_4} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-07 13:36:54,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork0_#res.base_7|) (= v_P0Thread1of1ForFork0_~arg.base_13 |v_P0Thread1of1ForFork0_#in~arg.base_15|) (= v_~b~0_77 1) (= v_~x~0_21 v_~__unbuffered_p0_EAX~0_21) (= |v_P0Thread1of1ForFork0_#res.offset_7| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_P0Thread1of1ForFork0_~arg.offset_13 |v_P0Thread1of1ForFork0_#in~arg.offset_15|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, ~x~0=v_~x~0_21} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_15|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_21, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_7|, ~b~0=v_~b~0_77, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_15|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_13, ~x~0=v_~x~0_21, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_13} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:36:54,310 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] P1ENTRY-->P1EXIT: Formula: (and (= v_~y~0_35 1) (= v_~x~0_26 1) (= v_P1Thread1of1ForFork1_~arg.base_10 |v_P1Thread1of1ForFork1_#in~arg.base_12|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_12| v_P1Thread1of1ForFork1_~arg.offset_10) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_89 1) v_~__unbuffered_cnt~0_88)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_89} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_10, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_10, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_12|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_12|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_88, ~y~0=v_~y~0_35, ~x~0=v_~x~0_26, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~y~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:36:54,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-1683167558 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1683167558 256)))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-1683167558| 0)) (and (or .cse1 .cse0) (= |P3Thread1of1ForFork3_#t~ite11_Out-1683167558| ~z$w_buff0_used~0_In-1683167558)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1683167558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1683167558} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1683167558, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1683167558, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1683167558|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-07 13:36:54,311 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [717] [717] L774-2-->L774-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-866420506 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-866420506 256) 0))) (or (and (or .cse0 .cse1) (= ~z~0_In-866420506 |P2Thread1of1ForFork2_#t~ite3_Out-866420506|)) (and (not .cse1) (not .cse0) (= ~z$w_buff1~0_In-866420506 |P2Thread1of1ForFork2_#t~ite3_Out-866420506|)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-866420506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866420506, ~z$w_buff1~0=~z$w_buff1~0_In-866420506, ~z~0=~z~0_In-866420506} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out-866420506|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-866420506, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-866420506, ~z$w_buff1~0=~z$w_buff1~0_In-866420506, ~z~0=~z~0_In-866420506} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L812-->L812-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In-1898741722 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1898741722 256))) (.cse1 (= (mod ~z$r_buff1_thd4~0_In-1898741722 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1898741722 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork3_#t~ite12_Out-1898741722|)) (and (= ~z$w_buff1_used~0_In-1898741722 |P3Thread1of1ForFork3_#t~ite12_Out-1898741722|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1898741722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1898741722, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1898741722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1898741722} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1898741722, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1898741722, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1898741722, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1898741722, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out-1898741722|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L813-->L814: Formula: (let ((.cse1 (= ~z$r_buff0_thd4~0_Out680750930 ~z$r_buff0_thd4~0_In680750930)) (.cse2 (= (mod ~z$r_buff0_thd4~0_In680750930 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In680750930 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse2) (= 0 ~z$r_buff0_thd4~0_Out680750930) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In680750930} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In680750930, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out680750930, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out680750930|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L814-->L814-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-1709604888 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd4~0_In-1709604888 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1709604888 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd4~0_In-1709604888 256) 0))) (or (and (= |P3Thread1of1ForFork3_#t~ite14_Out-1709604888| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$r_buff1_thd4~0_In-1709604888 |P3Thread1of1ForFork3_#t~ite14_Out-1709604888|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1709604888, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1709604888, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1709604888, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1709604888} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-1709604888, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1709604888, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-1709604888|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1709604888, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1709604888} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L814-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_30| v_~z$r_buff1_thd4~0_45) (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P3Thread1of1ForFork3_#res.base_3|) (= 0 |v_P3Thread1of1ForFork3_#res.offset_3|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_45, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_29|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] L774-4-->L775: Formula: (= |v_P2Thread1of1ForFork2_#t~ite3_14| v_~z~0_56) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_14|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_9|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_13|, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-07 13:36:54,312 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1996925979 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1996925979 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite5_Out-1996925979| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1996925979 |P2Thread1of1ForFork2_#t~ite5_Out-1996925979|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996925979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996925979} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out-1996925979|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996925979, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1996925979} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 13:36:54,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L776-->L776-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In159571 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In159571 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In159571 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In159571 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite6_Out159571| ~z$w_buff1_used~0_In159571) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite6_Out159571| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In159571, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In159571, ~z$w_buff1_used~0=~z$w_buff1_used~0_In159571, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In159571} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out159571|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In159571, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In159571, ~z$w_buff1_used~0=~z$w_buff1_used~0_In159571, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In159571} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 13:36:54,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1945376630 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1945376630 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out1945376630|) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite7_Out1945376630| ~z$r_buff0_thd3~0_In1945376630) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1945376630, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1945376630} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1945376630, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1945376630, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out1945376630|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 13:36:54,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [726] [726] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-1535385938 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1535385938 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1535385938 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1535385938 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite8_Out-1535385938| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite8_Out-1535385938| ~z$r_buff1_thd3~0_In-1535385938) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1535385938, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1535385938, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1535385938, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1535385938} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1535385938, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1535385938, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1535385938, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1535385938, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out-1535385938|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:36:54,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L778-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite8_28| v_~z$r_buff1_thd3~0_74)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_28|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_74, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_27|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 13:36:54,313 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L839-1-->L845: Formula: (and (not (= (mod v_~main$tmp_guard0~0_13 256) 0)) (= (ite (= (ite (= 4 v_~__unbuffered_cnt~0_34) 1 0) 0) 0 1) v_~main$tmp_guard0~0_13)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_34, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_13, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_12|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 13:36:54,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L845-2-->L845-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1702816528 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1702816528 256)))) (or (and (= ~z~0_In-1702816528 |ULTIMATE.start_main_#t~ite19_Out-1702816528|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-1702816528 |ULTIMATE.start_main_#t~ite19_Out-1702816528|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702816528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702816528, ~z$w_buff1~0=~z$w_buff1~0_In-1702816528, ~z~0=~z~0_In-1702816528} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1702816528|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1702816528, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1702816528, ~z$w_buff1~0=~z$w_buff1~0_In-1702816528, ~z~0=~z~0_In-1702816528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 13:36:54,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L845-4-->L846: Formula: (= v_~z~0_30 |v_ULTIMATE.start_main_#t~ite19_9|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_9|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|, ~z~0=v_~z~0_30, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 13:36:54,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L846-->L846-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1527255017 256))) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1527255017 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out1527255017| ~z$w_buff0_used~0_In1527255017)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite21_Out1527255017|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1527255017, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1527255017} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1527255017, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1527255017, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1527255017|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 13:36:54,314 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L847-->L847-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In115977584 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In115977584 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In115977584 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In115977584 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite22_Out115977584|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In115977584 |ULTIMATE.start_main_#t~ite22_Out115977584|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In115977584, ~z$w_buff0_used~0=~z$w_buff0_used~0_In115977584, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In115977584, ~z$w_buff1_used~0=~z$w_buff1_used~0_In115977584} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In115977584, ~z$w_buff0_used~0=~z$w_buff0_used~0_In115977584, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In115977584, ~z$w_buff1_used~0=~z$w_buff1_used~0_In115977584, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out115977584|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 13:36:54,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1795374250 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-1795374250 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1795374250 |ULTIMATE.start_main_#t~ite23_Out-1795374250|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite23_Out-1795374250| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1795374250, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1795374250} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1795374250, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1795374250, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1795374250|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 13:36:54,315 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In207516245 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In207516245 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In207516245 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In207516245 256)))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out207516245| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite24_Out207516245| ~z$r_buff1_thd0~0_In207516245)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In207516245, ~z$w_buff0_used~0=~z$w_buff0_used~0_In207516245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In207516245, ~z$w_buff1_used~0=~z$w_buff1_used~0_In207516245} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In207516245, ~z$w_buff0_used~0=~z$w_buff0_used~0_In207516245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In207516245, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out207516245|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In207516245} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 13:36:54,317 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L860-->L860-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1062062143 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1062062143 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1062062143 256) 0) .cse1) (= (mod ~z$w_buff0_used~0_In1062062143 256) 0) (and .cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1062062143 256))))) (= |ULTIMATE.start_main_#t~ite39_Out1062062143| ~z$w_buff1_used~0_In1062062143) (= |ULTIMATE.start_main_#t~ite39_Out1062062143| |ULTIMATE.start_main_#t~ite40_Out1062062143|)) (and (not .cse0) (= ~z$w_buff1_used~0_In1062062143 |ULTIMATE.start_main_#t~ite40_Out1062062143|) (= |ULTIMATE.start_main_#t~ite39_In1062062143| |ULTIMATE.start_main_#t~ite39_Out1062062143|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1062062143, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1062062143, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1062062143|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1062062143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1062062143, ~weak$$choice2~0=~weak$$choice2~0_In1062062143} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1062062143, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1062062143|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1062062143|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1062062143, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1062062143, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1062062143, ~weak$$choice2~0=~weak$$choice2~0_In1062062143} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 13:36:54,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L861-->L862: Formula: (and (= v_~z$r_buff0_thd0~0_125 v_~z$r_buff0_thd0~0_124) (not (= (mod v_~weak$$choice2~0_28 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_28} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_124, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_28, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 13:36:54,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1623597840 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_In-1623597840| |ULTIMATE.start_main_#t~ite45_Out-1623597840|) (= |ULTIMATE.start_main_#t~ite46_Out-1623597840| ~z$r_buff1_thd0~0_In-1623597840) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite45_Out-1623597840| ~z$r_buff1_thd0~0_In-1623597840) (= |ULTIMATE.start_main_#t~ite46_Out-1623597840| |ULTIMATE.start_main_#t~ite45_Out-1623597840|) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1623597840 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1623597840 256)) (and .cse1 (= (mod ~z$r_buff1_thd0~0_In-1623597840 256) 0)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1623597840 256)))))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1623597840, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1623597840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1623597840, ~weak$$choice2~0=~weak$$choice2~0_In-1623597840, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In-1623597840|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1623597840, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1623597840, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1623597840, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1623597840, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1623597840|, ~weak$$choice2~0=~weak$$choice2~0_In-1623597840, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1623597840|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 13:36:54,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L864-->L4: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_110) (not (= 0 (mod v_~z$flush_delayed~0_38 256))) (= 0 v_~z$flush_delayed~0_37) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_38} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_47|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_37, ~z~0=v_~z~0_110, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:36:54,318 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:36:54,371 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_0bfed56c-fd5e-4ba7-ac3f-d01d27b1e19e/bin/utaipan/witness.graphml [2019-12-07 13:36:54,372 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:36:54,373 INFO L168 Benchmark]: Toolchain (without parser) took 21240.33 ms. Allocated memory was 1.0 GB in the beginning and 3.7 GB in the end (delta: 2.6 GB). Free memory was 939.8 MB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,373 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:36:54,373 INFO L168 Benchmark]: CACSL2BoogieTranslator took 408.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -139.6 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,373 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,373 INFO L168 Benchmark]: Boogie Preprocessor took 27.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.4 MB). Peak memory consumption was 6.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,374 INFO L168 Benchmark]: RCFGBuilder took 409.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,374 INFO L168 Benchmark]: TraceAbstraction took 20282.17 ms. Allocated memory was 1.1 GB in the beginning and 3.7 GB in the end (delta: 2.5 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,374 INFO L168 Benchmark]: Witness Printer took 65.74 ms. Allocated memory is still 3.7 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 41.2 MB). Peak memory consumption was 41.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:36:54,376 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 408.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -139.6 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.4 MB). Peak memory consumption was 6.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 409.64 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 20282.17 ms. Allocated memory was 1.1 GB in the beginning and 3.7 GB in the end (delta: 2.5 GB). Free memory was 1.0 GB in the beginning and 2.1 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. * Witness Printer took 65.74 ms. Allocated memory is still 3.7 GB. Free memory was 2.1 GB in the beginning and 2.1 GB in the end (delta: 41.2 MB). Peak memory consumption was 41.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 181 ProgramPointsBefore, 92 ProgramPointsAfterwards, 209 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 7 FixpointIterations, 37 TrivialSequentialCompositions, 50 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 4988 VarBasedMoverChecksPositive, 283 VarBasedMoverChecksNegative, 145 SemBasedMoverChecksPositive, 210 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 52490 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L833] FCALL, FORK 0 pthread_create(&t1245, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] FCALL, FORK 0 pthread_create(&t1246, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1247, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1248, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L788] 4 z$w_buff1 = z$w_buff0 [L789] 4 z$w_buff0 = 2 [L790] 4 z$w_buff1_used = z$w_buff0_used [L791] 4 z$w_buff0_used = (_Bool)1 [L810] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 y = 2 [L771] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L810] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L774] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L811] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L812] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L775] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L776] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L777] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L845] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L847] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L848] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L849] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L852] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L853] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L854] 0 z$flush_delayed = weak$$choice2 [L855] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L856] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L857] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L857] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L858] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L859] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L860] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L862] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L863] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 20.1s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 5.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2528 SDtfs, 3078 SDslu, 6725 SDs, 0 SdLazy, 3529 SolverSat, 228 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 207 GetRequests, 42 SyntacticMatches, 15 SemanticMatches, 150 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57282occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.5s AutomataMinimizationTime, 21 MinimizatonAttempts, 35258 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1017 NumberOfCodeBlocks, 1017 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 936 ConstructedInterpolants, 0 QuantifiedInterpolants, 194501 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...