./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 52f17a1e60f5348ed9714f763e8ce532e7cd146f ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:36:20,931 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:36:20,933 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:36:20,941 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:36:20,941 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:36:20,942 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:36:20,943 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:36:20,945 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:36:20,946 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:36:20,947 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:36:20,948 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:36:20,949 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:36:20,949 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:36:20,950 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:36:20,951 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:36:20,952 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:36:20,953 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:36:20,954 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:36:20,955 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:36:20,957 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:36:20,958 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:36:20,959 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:36:20,960 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:36:20,961 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:36:20,963 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:36:20,963 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:36:20,964 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:36:20,964 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:36:20,964 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:36:20,965 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:36:20,965 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:36:20,966 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:36:20,966 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:36:20,967 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:36:20,968 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:36:20,968 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:36:20,968 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:36:20,968 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:36:20,969 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:36:20,969 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:36:20,970 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:36:20,971 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 14:36:20,983 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:36:20,983 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:36:20,983 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 14:36:20,984 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 14:36:20,984 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 14:36:20,985 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 14:36:20,985 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 14:36:20,985 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 14:36:20,985 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 14:36:20,985 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:36:20,986 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:36:20,987 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:36:20,987 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:36:20,987 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 14:36:20,988 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 52f17a1e60f5348ed9714f763e8ce532e7cd146f [2019-12-07 14:36:21,098 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:36:21,108 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:36:21,110 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:36:21,112 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:36:21,112 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:36:21,112 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix049_power.opt.i [2019-12-07 14:36:21,153 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/data/8e6226ea0/c0fec374594d47da8954b8b65c90779c/FLAGff80a0070 [2019-12-07 14:36:21,598 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:36:21,598 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/sv-benchmarks/c/pthread-wmm/mix049_power.opt.i [2019-12-07 14:36:21,609 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/data/8e6226ea0/c0fec374594d47da8954b8b65c90779c/FLAGff80a0070 [2019-12-07 14:36:21,618 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/data/8e6226ea0/c0fec374594d47da8954b8b65c90779c [2019-12-07 14:36:21,620 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:36:21,621 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:36:21,621 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:36:21,621 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:36:21,624 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:36:21,624 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:21,626 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21, skipping insertion in model container [2019-12-07 14:36:21,626 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:21,630 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:36:21,659 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:36:21,900 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:36:21,908 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:36:21,950 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:36:21,995 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:36:21,995 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21 WrapperNode [2019-12-07 14:36:21,995 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:36:21,996 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:36:21,996 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:36:21,996 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:36:22,001 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,014 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,032 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:36:22,032 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:36:22,032 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:36:22,032 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:36:22,039 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,039 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,042 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,042 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,049 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,052 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,055 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... [2019-12-07 14:36:22,058 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:36:22,058 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:36:22,058 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:36:22,058 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:36:22,059 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:36:22,098 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:36:22,098 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:36:22,098 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:36:22,099 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:36:22,099 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:36:22,099 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:36:22,099 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:36:22,099 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:36:22,100 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:36:22,457 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:36:22,457 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:36:22,458 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:36:22 BoogieIcfgContainer [2019-12-07 14:36:22,458 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:36:22,459 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:36:22,459 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:36:22,461 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:36:22,461 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:36:21" (1/3) ... [2019-12-07 14:36:22,462 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5894885c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:36:22, skipping insertion in model container [2019-12-07 14:36:22,462 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:36:21" (2/3) ... [2019-12-07 14:36:22,462 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5894885c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:36:22, skipping insertion in model container [2019-12-07 14:36:22,462 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:36:22" (3/3) ... [2019-12-07 14:36:22,463 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_power.opt.i [2019-12-07 14:36:22,470 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:36:22,470 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:36:22,475 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:36:22,476 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:36:22,502 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,502 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,502 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,502 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,502 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,503 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,503 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,503 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,503 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,504 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,505 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,506 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,507 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,508 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,508 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,508 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,508 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,509 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,509 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,509 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,510 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,511 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,512 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,513 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,513 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,514 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,515 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,516 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,517 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,518 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,519 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,520 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,521 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,522 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,523 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,524 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,525 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,526 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,527 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,528 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,529 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:36:22,539 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:36:22,552 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:36:22,552 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:36:22,553 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:36:22,553 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:36:22,553 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:36:22,553 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:36:22,553 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:36:22,553 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:36:22,566 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 14:36:22,567 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 14:36:22,634 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 14:36:22,634 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:36:22,644 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:36:22,660 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 14:36:22,699 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 14:36:22,699 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:36:22,705 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:36:22,722 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 14:36:22,722 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:36:25,619 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 14:36:25,912 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 14:36:25,913 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 14:36:25,915 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 14:36:45,402 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 14:36:45,404 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 14:36:45,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:36:45,408 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:36:45,408 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:36:45,408 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:36:45,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:36:45,412 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 14:36:45,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:36:45,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498771167] [2019-12-07 14:36:45,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:36:45,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:36:45,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:36:45,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498771167] [2019-12-07 14:36:45,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:36:45,550 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:36:45,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279140529] [2019-12-07 14:36:45,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:36:45,554 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:36:45,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:36:45,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:36:45,565 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 14:36:46,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:36:46,342 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 14:36:46,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:36:46,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:36:46,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:36:46,812 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 14:36:46,812 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 14:36:46,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:36:51,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 14:36:52,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 14:36:52,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 14:36:53,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 14:36:53,106 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 14:36:53,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:36:53,106 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 14:36:53,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:36:53,106 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 14:36:53,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:36:53,110 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:36:54,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:36:54,752 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:36:54,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:36:54,752 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 14:36:54,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:36:54,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212220092] [2019-12-07 14:36:54,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:36:54,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:36:54,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:36:54,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212220092] [2019-12-07 14:36:54,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:36:54,829 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:36:54,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23273543] [2019-12-07 14:36:54,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:36:54,830 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:36:54,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:36:54,830 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:36:54,830 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 14:36:55,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:36:55,784 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 14:36:55,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:36:55,784 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:36:55,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:36:56,251 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 14:36:56,251 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 14:36:56,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:37:01,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 14:37:04,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 14:37:04,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 14:37:04,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 14:37:04,688 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 14:37:04,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:37:04,688 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 14:37:04,688 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:37:04,688 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 14:37:04,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:37:04,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:37:04,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:37:04,693 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:37:04,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:37:04,693 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 14:37:04,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:37:04,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855047609] [2019-12-07 14:37:04,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:37:04,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:37:04,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:37:04,752 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855047609] [2019-12-07 14:37:04,752 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:37:04,752 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:37:04,752 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264980460] [2019-12-07 14:37:04,752 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:37:04,752 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:37:04,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:37:04,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:37:04,753 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 14:37:07,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:37:07,988 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 14:37:07,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:37:07,989 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:37:07,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:37:08,622 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 14:37:08,622 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 14:37:08,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:37:15,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 14:37:18,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 14:37:18,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 14:37:18,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 14:37:18,650 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 14:37:18,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:37:18,650 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 14:37:18,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:37:18,650 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 14:37:18,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:37:18,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:37:18,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:37:18,658 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:37:18,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:37:18,659 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 14:37:18,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:37:18,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [425484939] [2019-12-07 14:37:18,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:37:18,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:37:18,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:37:18,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [425484939] [2019-12-07 14:37:18,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:37:18,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:37:18,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224570646] [2019-12-07 14:37:18,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:37:18,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:37:18,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:37:18,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:37:18,684 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 14:37:19,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:37:19,921 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 14:37:19,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:37:19,921 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 14:37:19,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:37:20,660 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 14:37:20,660 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 14:37:20,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:37:28,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 14:37:34,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 14:37:34,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 14:37:35,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 14:37:35,163 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 14:37:35,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:37:35,163 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 14:37:35,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:37:35,164 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 14:37:35,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:37:35,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:37:35,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:37:35,170 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:37:35,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:37:35,170 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 14:37:35,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:37:35,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247693751] [2019-12-07 14:37:35,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:37:35,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:37:35,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:37:35,212 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247693751] [2019-12-07 14:37:35,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:37:35,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:37:35,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1624402555] [2019-12-07 14:37:35,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:37:35,213 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:37:35,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:37:35,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:37:35,213 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 14:37:36,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:37:36,815 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 14:37:36,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:37:36,816 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 14:37:36,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:37:37,603 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 14:37:37,603 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 14:37:37,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:37:48,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 14:37:51,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 14:37:51,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 14:37:53,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 14:37:53,154 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 14:37:53,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:37:53,154 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 14:37:53,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:37:53,154 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 14:37:53,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:37:53,166 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:37:53,166 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:37:53,166 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:37:53,166 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:37:53,166 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 14:37:53,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:37:53,167 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355705713] [2019-12-07 14:37:53,167 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:37:53,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:37:53,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:37:53,205 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355705713] [2019-12-07 14:37:53,205 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:37:53,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:37:53,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1514648826] [2019-12-07 14:37:53,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:37:53,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:37:53,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:37:53,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:37:53,207 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 14:37:54,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:37:54,297 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 14:37:54,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:37:54,298 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:37:54,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:37:54,913 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 14:37:54,913 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 14:37:54,913 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:01,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 14:38:05,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 14:38:05,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 14:38:06,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 14:38:06,103 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 14:38:06,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:06,103 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 14:38:06,103 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:38:06,103 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 14:38:06,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:38:06,115 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:06,115 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:06,115 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:06,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:06,115 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 14:38:06,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:06,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199134670] [2019-12-07 14:38:06,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:09,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:09,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:09,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199134670] [2019-12-07 14:38:09,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:09,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:38:09,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525277454] [2019-12-07 14:38:09,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:38:09,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:09,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:38:09,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:09,422 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 14:38:09,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:09,549 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 14:38:09,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:38:09,550 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:38:09,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:09,613 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 14:38:09,613 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 14:38:09,613 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:09,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 14:38:10,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 14:38:10,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 14:38:10,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 14:38:10,331 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 14:38:10,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:10,332 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 14:38:10,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:38:10,332 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 14:38:10,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:38:10,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:10,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:10,338 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:10,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:10,338 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 14:38:10,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:10,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943032281] [2019-12-07 14:38:10,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:10,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:10,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:10,383 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1943032281] [2019-12-07 14:38:10,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:10,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:38:10,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779102037] [2019-12-07 14:38:10,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:38:10,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:10,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:38:10,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:38:10,385 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 14:38:10,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:10,970 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 14:38:10,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:38:10,971 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 14:38:10,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:11,069 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 14:38:11,069 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 14:38:11,069 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:38:11,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 14:38:11,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 14:38:11,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 14:38:12,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 14:38:12,083 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 14:38:12,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:12,083 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 14:38:12,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:38:12,083 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 14:38:12,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:38:12,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:12,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:12,093 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:12,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:12,093 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 14:38:12,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:12,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996327688] [2019-12-07 14:38:12,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:12,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:12,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:12,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996327688] [2019-12-07 14:38:12,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:12,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:38:12,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064951167] [2019-12-07 14:38:12,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:38:12,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:12,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:38:12,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:38:12,199 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 14:38:12,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:12,631 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 14:38:12,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 14:38:12,632 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 14:38:12,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:12,719 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 14:38:12,720 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 14:38:12,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:38:12,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 14:38:13,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 14:38:13,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 14:38:13,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 14:38:13,672 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 14:38:13,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:13,672 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 14:38:13,672 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:38:13,672 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 14:38:13,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:38:13,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:13,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:13,689 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:13,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:13,689 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 14:38:13,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:13,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865811918] [2019-12-07 14:38:13,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:13,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:13,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:13,732 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865811918] [2019-12-07 14:38:13,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:13,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:38:13,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2045583858] [2019-12-07 14:38:13,732 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:38:13,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:13,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:38:13,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:38:13,733 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 14:38:14,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:14,220 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 14:38:14,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:38:14,220 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 14:38:14,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:14,324 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 14:38:14,324 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 14:38:14,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:38:14,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 14:38:15,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 14:38:15,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 14:38:15,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 14:38:15,476 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 14:38:15,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:15,477 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 14:38:15,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:38:15,477 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 14:38:15,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:38:15,498 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:15,498 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:15,498 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:15,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:15,498 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 14:38:15,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:15,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673233721] [2019-12-07 14:38:15,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:15,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:15,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:15,536 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673233721] [2019-12-07 14:38:15,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:15,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:38:15,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61657699] [2019-12-07 14:38:15,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:38:15,536 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:15,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:38:15,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:38:15,537 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 14:38:15,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:15,601 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 14:38:15,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:38:15,601 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 14:38:15,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:15,624 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 14:38:15,624 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 14:38:15,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:38:15,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 14:38:15,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 14:38:15,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 14:38:15,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 14:38:15,916 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 14:38:15,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:15,916 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 14:38:15,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:38:15,916 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 14:38:15,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:38:15,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:15,935 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:15,935 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:15,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:15,935 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 14:38:15,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:15,935 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968427903] [2019-12-07 14:38:15,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:15,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:15,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:15,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968427903] [2019-12-07 14:38:15,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:15,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:38:15,994 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1567784913] [2019-12-07 14:38:15,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:38:15,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:15,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:38:15,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:38:15,995 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 14:38:16,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:16,707 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 14:38:16,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 14:38:16,708 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 14:38:16,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:16,741 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 14:38:16,741 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 14:38:16,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:38:16,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 14:38:17,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 14:38:17,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 14:38:17,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 14:38:17,104 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 14:38:17,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:17,104 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 14:38:17,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:38:17,104 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 14:38:17,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:38:17,122 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:17,122 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:17,122 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:17,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:17,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 14:38:17,123 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:17,123 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808291420] [2019-12-07 14:38:17,123 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:17,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:17,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:17,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808291420] [2019-12-07 14:38:17,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:17,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:38:17,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1466370502] [2019-12-07 14:38:17,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:38:17,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:17,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:38:17,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:17,170 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 14:38:17,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:17,221 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 14:38:17,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:38:17,221 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 14:38:17,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:17,241 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 14:38:17,241 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 14:38:17,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:17,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 14:38:17,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 14:38:17,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 14:38:17,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 14:38:17,522 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 14:38:17,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:17,523 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 14:38:17,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:38:17,523 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 14:38:17,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:38:17,537 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:17,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:17,537 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:17,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:17,538 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 14:38:17,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:17,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33972704] [2019-12-07 14:38:17,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:17,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:17,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:17,593 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33972704] [2019-12-07 14:38:17,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:17,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:38:17,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [482323384] [2019-12-07 14:38:17,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:38:17,594 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:17,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:38:17,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:38:17,594 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 14:38:17,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:17,651 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 14:38:17,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:38:17,651 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 14:38:17,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:17,677 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 14:38:17,677 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 14:38:17,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:38:17,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 14:38:17,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 14:38:17,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 14:38:17,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 14:38:17,918 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 14:38:17,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:17,918 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 14:38:17,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:38:17,918 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 14:38:17,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:38:17,933 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:17,933 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:17,933 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:17,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:17,933 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 14:38:17,933 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:17,934 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762810522] [2019-12-07 14:38:17,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:17,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:17,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:17,972 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762810522] [2019-12-07 14:38:17,972 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:17,972 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:38:17,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [594104231] [2019-12-07 14:38:17,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:38:17,973 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:17,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:38:17,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:17,973 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 14:38:18,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:18,047 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 14:38:18,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:38:18,048 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:38:18,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:18,069 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 14:38:18,069 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 14:38:18,069 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:38:18,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 14:38:18,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 14:38:18,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 14:38:18,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 14:38:18,330 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 14:38:18,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:18,330 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 14:38:18,330 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:38:18,330 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 14:38:18,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:18,345 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:18,345 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:18,345 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:18,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:18,346 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 14:38:18,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:18,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104863147] [2019-12-07 14:38:18,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:18,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:18,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:18,392 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104863147] [2019-12-07 14:38:18,392 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:18,392 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:38:18,392 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [499495204] [2019-12-07 14:38:18,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:38:18,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:18,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:38:18,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:38:18,393 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 14:38:18,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:18,491 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 14:38:18,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:38:18,492 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 14:38:18,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:18,513 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 14:38:18,513 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 14:38:18,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:38:18,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 14:38:18,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 14:38:18,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 14:38:18,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 14:38:18,773 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 14:38:18,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:18,773 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 14:38:18,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:38:18,773 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 14:38:18,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:18,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:18,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:18,787 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:18,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:18,787 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 14:38:18,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:18,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531985889] [2019-12-07 14:38:18,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:18,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:18,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:18,912 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531985889] [2019-12-07 14:38:18,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:18,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:38:18,912 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105435121] [2019-12-07 14:38:18,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:38:18,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:18,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:38:18,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:38:18,913 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 14:38:20,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:20,381 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 14:38:20,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 14:38:20,381 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 14:38:20,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:20,410 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 14:38:20,410 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 14:38:20,410 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:38:20,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 14:38:20,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 14:38:20,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 14:38:20,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 14:38:20,752 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 14:38:20,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:20,753 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 14:38:20,753 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:38:20,753 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 14:38:20,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:20,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:20,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:20,768 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:20,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:20,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 14:38:20,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:20,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282409013] [2019-12-07 14:38:20,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:20,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:20,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:20,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1282409013] [2019-12-07 14:38:20,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:20,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:38:20,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1942608612] [2019-12-07 14:38:20,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:38:20,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:20,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:38:20,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:38:20,922 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 14:38:22,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:22,079 INFO L93 Difference]: Finished difference Result 30684 states and 95180 transitions. [2019-12-07 14:38:22,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 14:38:22,079 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 14:38:22,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:22,111 INFO L225 Difference]: With dead ends: 30684 [2019-12-07 14:38:22,111 INFO L226 Difference]: Without dead ends: 26361 [2019-12-07 14:38:22,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:38:22,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26361 states. [2019-12-07 14:38:22,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26361 to 18534. [2019-12-07 14:38:22,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 14:38:22,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 14:38:22,449 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 14:38:22,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:22,450 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 14:38:22,450 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:38:22,450 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 14:38:22,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:22,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:22,466 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:22,466 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:22,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:22,467 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 14:38:22,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:22,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932173615] [2019-12-07 14:38:22,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:22,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:22,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:22,598 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932173615] [2019-12-07 14:38:22,598 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:22,598 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:38:22,598 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076432913] [2019-12-07 14:38:22,599 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:38:22,599 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:22,599 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:38:22,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:38:22,599 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 14:38:23,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:23,865 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 14:38:23,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 14:38:23,866 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:38:23,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:23,911 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 14:38:23,911 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 14:38:23,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 14:38:24,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 14:38:24,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 14:38:24,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 14:38:24,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 14:38:24,245 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 14:38:24,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:24,245 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 14:38:24,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:38:24,245 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 14:38:24,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:24,262 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:24,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:24,262 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:24,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:24,262 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 14:38:24,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:24,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597315829] [2019-12-07 14:38:24,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:24,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:24,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:24,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597315829] [2019-12-07 14:38:24,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:24,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:38:24,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [240034749] [2019-12-07 14:38:24,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:38:24,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:24,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:38:24,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:38:24,368 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 11 states. [2019-12-07 14:38:25,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:25,833 INFO L93 Difference]: Finished difference Result 28640 states and 88718 transitions. [2019-12-07 14:38:25,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 14:38:25,834 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:38:25,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:25,869 INFO L225 Difference]: With dead ends: 28640 [2019-12-07 14:38:25,870 INFO L226 Difference]: Without dead ends: 25567 [2019-12-07 14:38:25,870 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 14:38:25,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25567 states. [2019-12-07 14:38:26,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25567 to 18324. [2019-12-07 14:38:26,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18324 states. [2019-12-07 14:38:26,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18324 states to 18324 states and 56925 transitions. [2019-12-07 14:38:26,204 INFO L78 Accepts]: Start accepts. Automaton has 18324 states and 56925 transitions. Word has length 67 [2019-12-07 14:38:26,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:26,204 INFO L462 AbstractCegarLoop]: Abstraction has 18324 states and 56925 transitions. [2019-12-07 14:38:26,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:38:26,204 INFO L276 IsEmpty]: Start isEmpty. Operand 18324 states and 56925 transitions. [2019-12-07 14:38:26,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:26,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:26,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:26,221 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:26,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:26,221 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 5 times [2019-12-07 14:38:26,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:26,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429755605] [2019-12-07 14:38:26,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:26,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:26,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:26,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429755605] [2019-12-07 14:38:26,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:26,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:38:26,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137226685] [2019-12-07 14:38:26,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:38:26,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:26,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:38:26,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:38:26,341 INFO L87 Difference]: Start difference. First operand 18324 states and 56925 transitions. Second operand 12 states. [2019-12-07 14:38:28,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:28,497 INFO L93 Difference]: Finished difference Result 27306 states and 84540 transitions. [2019-12-07 14:38:28,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 14:38:28,498 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 14:38:28,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:28,547 INFO L225 Difference]: With dead ends: 27306 [2019-12-07 14:38:28,547 INFO L226 Difference]: Without dead ends: 26115 [2019-12-07 14:38:28,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 14:38:28,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26115 states. [2019-12-07 14:38:28,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26115 to 18192. [2019-12-07 14:38:28,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18192 states. [2019-12-07 14:38:28,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18192 states to 18192 states and 56581 transitions. [2019-12-07 14:38:28,888 INFO L78 Accepts]: Start accepts. Automaton has 18192 states and 56581 transitions. Word has length 67 [2019-12-07 14:38:28,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:28,889 INFO L462 AbstractCegarLoop]: Abstraction has 18192 states and 56581 transitions. [2019-12-07 14:38:28,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:38:28,889 INFO L276 IsEmpty]: Start isEmpty. Operand 18192 states and 56581 transitions. [2019-12-07 14:38:28,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:28,905 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:28,905 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:28,906 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:28,906 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:28,906 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 6 times [2019-12-07 14:38:28,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:28,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661531299] [2019-12-07 14:38:28,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:28,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:29,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:29,283 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661531299] [2019-12-07 14:38:29,283 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:29,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 14:38:29,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096150996] [2019-12-07 14:38:29,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 14:38:29,284 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:29,284 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 14:38:29,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:38:29,285 INFO L87 Difference]: Start difference. First operand 18192 states and 56581 transitions. Second operand 19 states. [2019-12-07 14:38:38,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:38,776 INFO L93 Difference]: Finished difference Result 33096 states and 102440 transitions. [2019-12-07 14:38:38,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2019-12-07 14:38:38,777 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 14:38:38,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:38,815 INFO L225 Difference]: With dead ends: 33096 [2019-12-07 14:38:38,815 INFO L226 Difference]: Without dead ends: 32065 [2019-12-07 14:38:38,817 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1062 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=574, Invalid=3848, Unknown=0, NotChecked=0, Total=4422 [2019-12-07 14:38:38,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32065 states. [2019-12-07 14:38:39,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32065 to 21350. [2019-12-07 14:38:39,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21350 states. [2019-12-07 14:38:39,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21350 states to 21350 states and 66209 transitions. [2019-12-07 14:38:39,221 INFO L78 Accepts]: Start accepts. Automaton has 21350 states and 66209 transitions. Word has length 67 [2019-12-07 14:38:39,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:39,221 INFO L462 AbstractCegarLoop]: Abstraction has 21350 states and 66209 transitions. [2019-12-07 14:38:39,221 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 14:38:39,221 INFO L276 IsEmpty]: Start isEmpty. Operand 21350 states and 66209 transitions. [2019-12-07 14:38:39,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:39,240 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:39,240 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:39,240 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:39,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:39,240 INFO L82 PathProgramCache]: Analyzing trace with hash 2040469818, now seen corresponding path program 7 times [2019-12-07 14:38:39,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:39,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104252279] [2019-12-07 14:38:39,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:39,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:39,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:39,364 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104252279] [2019-12-07 14:38:39,364 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:39,364 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:38:39,365 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [195885768] [2019-12-07 14:38:39,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:38:39,365 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:39,365 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:38:39,365 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:38:39,365 INFO L87 Difference]: Start difference. First operand 21350 states and 66209 transitions. Second operand 12 states. [2019-12-07 14:38:41,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:41,301 INFO L93 Difference]: Finished difference Result 36981 states and 113587 transitions. [2019-12-07 14:38:41,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 14:38:41,302 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 14:38:41,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:41,333 INFO L225 Difference]: With dead ends: 36981 [2019-12-07 14:38:41,333 INFO L226 Difference]: Without dead ends: 29466 [2019-12-07 14:38:41,333 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 253 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=215, Invalid=1045, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 14:38:41,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29466 states. [2019-12-07 14:38:41,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29466 to 19133. [2019-12-07 14:38:41,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19133 states. [2019-12-07 14:38:41,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19133 states to 19133 states and 59181 transitions. [2019-12-07 14:38:41,683 INFO L78 Accepts]: Start accepts. Automaton has 19133 states and 59181 transitions. Word has length 67 [2019-12-07 14:38:41,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:41,684 INFO L462 AbstractCegarLoop]: Abstraction has 19133 states and 59181 transitions. [2019-12-07 14:38:41,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:38:41,684 INFO L276 IsEmpty]: Start isEmpty. Operand 19133 states and 59181 transitions. [2019-12-07 14:38:41,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:41,700 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:41,700 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:41,700 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:41,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:41,700 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 8 times [2019-12-07 14:38:41,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:41,701 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119877640] [2019-12-07 14:38:41,701 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:41,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:41,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:41,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119877640] [2019-12-07 14:38:41,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:41,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:38:41,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839382690] [2019-12-07 14:38:41,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:38:41,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:41,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:38:41,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:38:41,816 INFO L87 Difference]: Start difference. First operand 19133 states and 59181 transitions. Second operand 11 states. [2019-12-07 14:38:42,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:42,990 INFO L93 Difference]: Finished difference Result 29916 states and 91731 transitions. [2019-12-07 14:38:42,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 14:38:42,991 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:38:42,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:43,024 INFO L225 Difference]: With dead ends: 29916 [2019-12-07 14:38:43,024 INFO L226 Difference]: Without dead ends: 28689 [2019-12-07 14:38:43,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:38:43,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28689 states. [2019-12-07 14:38:43,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28689 to 19037. [2019-12-07 14:38:43,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19037 states. [2019-12-07 14:38:43,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19037 states to 19037 states and 58926 transitions. [2019-12-07 14:38:43,382 INFO L78 Accepts]: Start accepts. Automaton has 19037 states and 58926 transitions. Word has length 67 [2019-12-07 14:38:43,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:43,382 INFO L462 AbstractCegarLoop]: Abstraction has 19037 states and 58926 transitions. [2019-12-07 14:38:43,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:38:43,382 INFO L276 IsEmpty]: Start isEmpty. Operand 19037 states and 58926 transitions. [2019-12-07 14:38:43,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:43,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:43,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:43,399 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:43,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:43,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 9 times [2019-12-07 14:38:43,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:43,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246682255] [2019-12-07 14:38:43,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:43,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:38:43,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:38:43,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246682255] [2019-12-07 14:38:43,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:38:43,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:38:43,450 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [691181651] [2019-12-07 14:38:43,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:38:43,450 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:38:43,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:38:43,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:38:43,450 INFO L87 Difference]: Start difference. First operand 19037 states and 58926 transitions. Second operand 6 states. [2019-12-07 14:38:43,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:38:43,714 INFO L93 Difference]: Finished difference Result 47046 states and 144425 transitions. [2019-12-07 14:38:43,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 14:38:43,714 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 14:38:43,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:38:43,759 INFO L225 Difference]: With dead ends: 47046 [2019-12-07 14:38:43,759 INFO L226 Difference]: Without dead ends: 37334 [2019-12-07 14:38:43,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:38:43,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37334 states. [2019-12-07 14:38:44,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37334 to 20005. [2019-12-07 14:38:44,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20005 states. [2019-12-07 14:38:44,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20005 states to 20005 states and 62048 transitions. [2019-12-07 14:38:44,187 INFO L78 Accepts]: Start accepts. Automaton has 20005 states and 62048 transitions. Word has length 67 [2019-12-07 14:38:44,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:38:44,187 INFO L462 AbstractCegarLoop]: Abstraction has 20005 states and 62048 transitions. [2019-12-07 14:38:44,187 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:38:44,187 INFO L276 IsEmpty]: Start isEmpty. Operand 20005 states and 62048 transitions. [2019-12-07 14:38:44,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:38:44,205 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:38:44,206 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:38:44,206 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:38:44,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:38:44,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 10 times [2019-12-07 14:38:44,206 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:38:44,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909425933] [2019-12-07 14:38:44,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:38:44,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:38:44,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:38:44,280 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 14:38:44,280 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:38:44,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1300~0.base_23|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23|) |v_ULTIMATE.start_main_~#t1300~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= 0 |v_ULTIMATE.start_main_~#t1300~0.offset_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1300~0.base_23| 4)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_12|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1300~0.base=|v_ULTIMATE.start_main_~#t1300~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1300~0.offset=|v_ULTIMATE.start_main_~#t1300~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1301~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1302~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1301~0.base, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1300~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1300~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1301~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11|) |v_ULTIMATE.start_main_~#t1301~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1301~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11| 1) |v_#valid_38|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1301~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_9|, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1301~0.offset, ULTIMATE.start_main_~#t1301~0.base, #length] because there is no mapped edge [2019-12-07 14:38:44,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1500091116 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1500091116 256) 0))) (or (and (= ~z$w_buff1~0_In-1500091116 |P1Thread1of1ForFork2_#t~ite9_Out-1500091116|) (not .cse0) (not .cse1)) (and (= ~z~0_In-1500091116 |P1Thread1of1ForFork2_#t~ite9_Out-1500091116|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1500091116, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500091116, ~z$w_buff1~0=~z$w_buff1~0_In-1500091116, ~z~0=~z~0_In-1500091116} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1500091116|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1500091116, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500091116, ~z$w_buff1~0=~z$w_buff1~0_In-1500091116, ~z~0=~z~0_In-1500091116} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:38:44,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 14:38:44,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1302~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1302~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1302~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1302~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13|) |v_ULTIMATE.start_main_~#t1302~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, #length, ULTIMATE.start_main_~#t1302~0.base] because there is no mapped edge [2019-12-07 14:38:44,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484602651 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1484602651 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1484602651| ~z$w_buff0_used~0_In1484602651) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1484602651| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484602651, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484602651} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484602651, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1484602651|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484602651} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:38:44,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-490842736 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-490842736 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-490842736 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-490842736 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-490842736| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-490842736 |P1Thread1of1ForFork2_#t~ite12_Out-490842736|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-490842736, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-490842736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490842736, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-490842736} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-490842736, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-490842736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490842736, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-490842736|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-490842736} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:38:44,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-312449153 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-312449153 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-312449153| ~z$r_buff0_thd2~0_In-312449153)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-312449153| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-312449153} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-312449153|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-312449153} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:38:44,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1851830422 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1851830422 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In1851830422 256) 0) .cse0) (and .cse0 (= (mod ~z$w_buff1_used~0_In1851830422 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1851830422 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1851830422| ~z$w_buff0_used~0_In1851830422) (= |P2Thread1of1ForFork0_#t~ite26_Out1851830422| |P2Thread1of1ForFork0_#t~ite27_Out1851830422|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1851830422| |P2Thread1of1ForFork0_#t~ite26_Out1851830422|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite27_Out1851830422| ~z$w_buff0_used~0_In1851830422)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1851830422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851830422, ~weak$$choice2~0=~weak$$choice2~0_In1851830422} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1851830422|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1851830422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851830422, ~weak$$choice2~0=~weak$$choice2~0_In1851830422} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:38:44,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:38:44,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1527361123 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1527361123 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1527361123| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1527361123 |P0Thread1of1ForFork1_#t~ite5_Out-1527361123|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1527361123, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1527361123} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1527361123|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1527361123, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1527361123} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:38:44,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:38:44,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1591910011 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1591910011 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out1591910011| |P2Thread1of1ForFork0_#t~ite38_Out1591910011|))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1591910011| ~z$w_buff1~0_In1591910011) (not .cse1) .cse2) (and (or .cse0 .cse1) (= ~z~0_In1591910011 |P2Thread1of1ForFork0_#t~ite38_Out1591910011|) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1591910011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591910011, ~z$w_buff1~0=~z$w_buff1~0_In1591910011, ~z~0=~z~0_In1591910011} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1591910011|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1591910011|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1591910011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591910011, ~z$w_buff1~0=~z$w_buff1~0_In1591910011, ~z~0=~z~0_In1591910011} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:38:44,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1976033204 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1976033204 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1976033204|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1976033204 |P2Thread1of1ForFork0_#t~ite40_Out-1976033204|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976033204, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1976033204} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976033204, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1976033204|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1976033204} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:38:44,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1366225039 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1366225039 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1366225039 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1366225039 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1366225039 |P2Thread1of1ForFork0_#t~ite41_Out1366225039|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1366225039|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1366225039, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1366225039, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366225039, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1366225039} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1366225039, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1366225039, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366225039, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1366225039, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1366225039|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:38:44,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-889150515 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-889150515 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-889150515|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-889150515| ~z$r_buff0_thd3~0_In-889150515) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-889150515, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-889150515} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-889150515, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-889150515, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-889150515|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:38:44,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1402410507 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1402410507 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1402410507 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1402410507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-1402410507 |P2Thread1of1ForFork0_#t~ite43_Out-1402410507|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1402410507} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1402410507|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1402410507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:38:44,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:38:44,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1885753882 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1885753882 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1885753882 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1885753882 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1885753882| 0)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out1885753882| ~z$w_buff1_used~0_In1885753882) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1885753882, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1885753882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1885753882, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1885753882|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1885753882} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1327560572 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1327560572 256))) (.cse2 (= ~z$r_buff0_thd1~0_In1327560572 ~z$r_buff0_thd1~0_Out1327560572))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out1327560572)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1327560572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1327560572|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1327560572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd1~0_In908748135 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In908748135 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In908748135 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In908748135 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out908748135|)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out908748135| ~z$r_buff1_thd1~0_In908748135) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In908748135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In908748135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In908748135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In908748135} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out908748135|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In908748135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In908748135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In908748135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In908748135} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484081150 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1484081150 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1484081150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1484081150 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1484081150| ~z$r_buff1_thd2~0_In1484081150)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out1484081150| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1484081150|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:38:44,293 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:38:44,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| |ULTIMATE.start_main_#t~ite48_Out-1642538921|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1642538921 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1642538921 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| ~z$w_buff1~0_In-1642538921)) (and .cse1 (or .cse2 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| ~z~0_In-1642538921)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1642538921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1642538921, ~z$w_buff1~0=~z$w_buff1~0_In-1642538921, ~z~0=~z~0_In-1642538921} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1642538921, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1642538921|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1642538921, ~z$w_buff1~0=~z$w_buff1~0_In-1642538921, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1642538921|, ~z~0=~z~0_In-1642538921} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:38:44,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-405469233 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-405469233 256)))) (or (and (= ~z$w_buff0_used~0_In-405469233 |ULTIMATE.start_main_#t~ite49_Out-405469233|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-405469233|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-405469233, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-405469233} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-405469233, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-405469233, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-405469233|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:38:44,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In22202349 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In22202349 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In22202349 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In22202349 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In22202349 |ULTIMATE.start_main_#t~ite50_Out22202349|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out22202349|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In22202349, ~z$w_buff0_used~0=~z$w_buff0_used~0_In22202349, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In22202349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In22202349} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out22202349|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In22202349, ~z$w_buff0_used~0=~z$w_buff0_used~0_In22202349, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In22202349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In22202349} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:38:44,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In582057751 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In582057751 256)))) (or (and (= ~z$r_buff0_thd0~0_In582057751 |ULTIMATE.start_main_#t~ite51_Out582057751|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out582057751| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In582057751, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582057751} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In582057751, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out582057751|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582057751} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:38:44,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1135078191 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1135078191 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1135078191 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1135078191 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1135078191| ~z$r_buff1_thd0~0_In-1135078191) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite52_Out-1135078191| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1135078191, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1135078191, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1135078191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1135078191} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1135078191|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1135078191, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1135078191, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1135078191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1135078191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:38:44,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:38:44,347 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:38:44 BasicIcfg [2019-12-07 14:38:44,347 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:38:44,348 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:38:44,348 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:38:44,348 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:38:44,348 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:36:22" (3/4) ... [2019-12-07 14:38:44,350 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:38:44,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1300~0.base_23|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1300~0.base_23|) |v_ULTIMATE.start_main_~#t1300~0.offset_17| 0)) |v_#memory_int_17|) (= v_~z$read_delayed~0_7 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23| 1)) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1300~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= 0 |v_ULTIMATE.start_main_~#t1300~0.offset_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1300~0.base_23| 4)) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_12|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_17|, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1300~0.base=|v_ULTIMATE.start_main_~#t1300~0.base_23|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1300~0.offset=|v_ULTIMATE.start_main_~#t1300~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_14|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1301~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1302~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1301~0.base, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1300~0.base, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1300~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1301~0.offset_9|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1301~0.base_11|) |v_ULTIMATE.start_main_~#t1301~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1301~0.base_11|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1301~0.base_11| 1) |v_#valid_38|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1301~0.base_11| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1301~0.offset=|v_ULTIMATE.start_main_~#t1301~0.offset_9|, ULTIMATE.start_main_~#t1301~0.base=|v_ULTIMATE.start_main_~#t1301~0.base_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1301~0.offset, ULTIMATE.start_main_~#t1301~0.base, #length] because there is no mapped edge [2019-12-07 14:38:44,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1500091116 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1500091116 256) 0))) (or (and (= ~z$w_buff1~0_In-1500091116 |P1Thread1of1ForFork2_#t~ite9_Out-1500091116|) (not .cse0) (not .cse1)) (and (= ~z~0_In-1500091116 |P1Thread1of1ForFork2_#t~ite9_Out-1500091116|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1500091116, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500091116, ~z$w_buff1~0=~z$w_buff1~0_In-1500091116, ~z~0=~z~0_In-1500091116} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-1500091116|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1500091116, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1500091116, ~z$w_buff1~0=~z$w_buff1~0_In-1500091116, ~z~0=~z~0_In-1500091116} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:38:44,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 14:38:44,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1302~0.offset_11|) (not (= |v_ULTIMATE.start_main_~#t1302~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1302~0.base_13|) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1302~0.base_13| 1)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1302~0.base_13| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1302~0.base_13|) |v_ULTIMATE.start_main_~#t1302~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1302~0.offset=|v_ULTIMATE.start_main_~#t1302~0.offset_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1302~0.base=|v_ULTIMATE.start_main_~#t1302~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1302~0.offset, #length, ULTIMATE.start_main_~#t1302~0.base] because there is no mapped edge [2019-12-07 14:38:44,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484602651 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1484602651 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1484602651| ~z$w_buff0_used~0_In1484602651) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1484602651| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484602651, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484602651} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484602651, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1484602651|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484602651} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:38:44,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In-490842736 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-490842736 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-490842736 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-490842736 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-490842736| 0)) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-490842736 |P1Thread1of1ForFork2_#t~ite12_Out-490842736|) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-490842736, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-490842736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490842736, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-490842736} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-490842736, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-490842736, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490842736, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-490842736|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-490842736} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:38:44,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-312449153 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-312449153 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-312449153| ~z$r_buff0_thd2~0_In-312449153)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out-312449153| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-312449153} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-312449153, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-312449153|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-312449153} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:38:44,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1851830422 256)))) (or (and (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1851830422 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In1851830422 256) 0) .cse0) (and .cse0 (= (mod ~z$w_buff1_used~0_In1851830422 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1851830422 256)))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out1851830422| ~z$w_buff0_used~0_In1851830422) (= |P2Thread1of1ForFork0_#t~ite26_Out1851830422| |P2Thread1of1ForFork0_#t~ite27_Out1851830422|)) (and (= |P2Thread1of1ForFork0_#t~ite26_In1851830422| |P2Thread1of1ForFork0_#t~ite26_Out1851830422|) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite27_Out1851830422| ~z$w_buff0_used~0_In1851830422)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In1851830422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851830422, ~weak$$choice2~0=~weak$$choice2~0_In1851830422} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out1851830422|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out1851830422|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1851830422, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851830422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851830422, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851830422, ~weak$$choice2~0=~weak$$choice2~0_In1851830422} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:38:44,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:38:44,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1527361123 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1527361123 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork1_#t~ite5_Out-1527361123| 0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1527361123 |P0Thread1of1ForFork1_#t~ite5_Out-1527361123|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1527361123, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1527361123} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-1527361123|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1527361123, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1527361123} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:38:44,357 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 14:38:44,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1591910011 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In1591910011 256) 0)) (.cse2 (= |P2Thread1of1ForFork0_#t~ite39_Out1591910011| |P2Thread1of1ForFork0_#t~ite38_Out1591910011|))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out1591910011| ~z$w_buff1~0_In1591910011) (not .cse1) .cse2) (and (or .cse0 .cse1) (= ~z~0_In1591910011 |P2Thread1of1ForFork0_#t~ite38_Out1591910011|) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1591910011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591910011, ~z$w_buff1~0=~z$w_buff1~0_In1591910011, ~z~0=~z~0_In1591910011} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out1591910011|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out1591910011|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1591910011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1591910011, ~z$w_buff1~0=~z$w_buff1~0_In1591910011, ~z~0=~z~0_In1591910011} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:38:44,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1976033204 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1976033204 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite40_Out-1976033204|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1976033204 |P2Thread1of1ForFork0_#t~ite40_Out-1976033204|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976033204, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1976033204} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976033204, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-1976033204|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1976033204} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:38:44,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1366225039 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1366225039 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In1366225039 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1366225039 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1366225039 |P2Thread1of1ForFork0_#t~ite41_Out1366225039|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out1366225039|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1366225039, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1366225039, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366225039, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1366225039} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1366225039, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1366225039, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366225039, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1366225039, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1366225039|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:38:44,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-889150515 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-889150515 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-889150515|)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-889150515| ~z$r_buff0_thd3~0_In-889150515) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-889150515, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-889150515} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-889150515, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-889150515, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-889150515|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:38:44,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1402410507 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-1402410507 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1402410507 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1402410507 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1402410507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$r_buff1_thd3~0_In-1402410507 |P2Thread1of1ForFork0_#t~ite43_Out-1402410507|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1402410507} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1402410507|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1402410507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1402410507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1402410507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1402410507} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:38:44,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:38:44,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1885753882 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1885753882 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1885753882 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1885753882 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1885753882| 0)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out1885753882| ~z$w_buff1_used~0_In1885753882) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1885753882, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1885753882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1885753882, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1885753882|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1885753882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1885753882, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1885753882} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:38:44,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1327560572 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1327560572 256))) (.cse2 (= ~z$r_buff0_thd1~0_In1327560572 ~z$r_buff0_thd1~0_Out1327560572))) (or (and (not .cse0) (not .cse1) (= 0 ~z$r_buff0_thd1~0_Out1327560572)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1327560572} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1327560572, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1327560572|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1327560572} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:38:44,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd1~0_In908748135 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In908748135 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In908748135 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In908748135 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out908748135|)) (and (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out908748135| ~z$r_buff1_thd1~0_In908748135) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In908748135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In908748135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In908748135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In908748135} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out908748135|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In908748135, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In908748135, ~z$w_buff1_used~0=~z$w_buff1_used~0_In908748135, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In908748135} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:38:44,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:38:44,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1484081150 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1484081150 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1484081150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In1484081150 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1484081150| ~z$r_buff1_thd2~0_In1484081150)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork2_#t~ite14_Out1484081150| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1484081150, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1484081150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1484081150, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1484081150|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1484081150} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:38:44,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:38:44,360 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:38:44,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| |ULTIMATE.start_main_#t~ite48_Out-1642538921|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1642538921 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1642538921 256)))) (or (and (not .cse0) .cse1 (not .cse2) (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| ~z$w_buff1~0_In-1642538921)) (and .cse1 (or .cse2 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out-1642538921| ~z~0_In-1642538921)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1642538921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1642538921, ~z$w_buff1~0=~z$w_buff1~0_In-1642538921, ~z~0=~z~0_In-1642538921} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1642538921, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1642538921|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1642538921, ~z$w_buff1~0=~z$w_buff1~0_In-1642538921, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1642538921|, ~z~0=~z~0_In-1642538921} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:38:44,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-405469233 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-405469233 256)))) (or (and (= ~z$w_buff0_used~0_In-405469233 |ULTIMATE.start_main_#t~ite49_Out-405469233|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-405469233|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-405469233, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-405469233} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-405469233, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-405469233, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-405469233|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:38:44,361 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In22202349 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In22202349 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In22202349 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In22202349 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In22202349 |ULTIMATE.start_main_#t~ite50_Out22202349|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out22202349|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In22202349, ~z$w_buff0_used~0=~z$w_buff0_used~0_In22202349, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In22202349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In22202349} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out22202349|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In22202349, ~z$w_buff0_used~0=~z$w_buff0_used~0_In22202349, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In22202349, ~z$w_buff1_used~0=~z$w_buff1_used~0_In22202349} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:38:44,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In582057751 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In582057751 256)))) (or (and (= ~z$r_buff0_thd0~0_In582057751 |ULTIMATE.start_main_#t~ite51_Out582057751|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out582057751| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In582057751, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582057751} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In582057751, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out582057751|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In582057751} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:38:44,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1135078191 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1135078191 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1135078191 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-1135078191 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out-1135078191| ~z$r_buff1_thd0~0_In-1135078191) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite52_Out-1135078191| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1135078191, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1135078191, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1135078191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1135078191} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1135078191|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1135078191, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1135078191, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1135078191, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1135078191} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:38:44,362 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:38:44,440 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6f380c70-2ad1-4241-b3a7-84a8bcbe171a/bin/utaipan/witness.graphml [2019-12-07 14:38:44,440 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:38:44,441 INFO L168 Benchmark]: Toolchain (without parser) took 142820.92 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.2 GB). Free memory was 934.4 MB in the beginning and 5.8 GB in the end (delta: -4.9 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,442 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:38:44,442 INFO L168 Benchmark]: CACSL2BoogieTranslator took 374.06 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -139.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,442 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,442 INFO L168 Benchmark]: Boogie Preprocessor took 25.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:38:44,443 INFO L168 Benchmark]: RCFGBuilder took 400.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,443 INFO L168 Benchmark]: TraceAbstraction took 141888.59 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,443 INFO L168 Benchmark]: Witness Printer took 92.75 ms. Allocated memory was 8.2 GB in the beginning and 8.2 GB in the end (delta: -10.5 MB). Free memory was 4.3 GB in the beginning and 5.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 9.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:38:44,444 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 374.06 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -139.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 400.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 141888.59 ms. Allocated memory was 1.1 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 1.0 GB in the beginning and 4.3 GB in the end (delta: -3.3 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 92.75 ms. Allocated memory was 8.2 GB in the beginning and 8.2 GB in the end (delta: -10.5 MB). Free memory was 4.3 GB in the beginning and 5.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 9.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1300, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1301, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1302, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 141.7s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 36.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6450 SDtfs, 7416 SDslu, 24987 SDs, 0 SdLazy, 24569 SolverSat, 367 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 15.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 354 GetRequests, 38 SyntacticMatches, 12 SemanticMatches, 304 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1847 ImplicationChecksByTransitivity, 3.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 74.7s AutomataMinimizationTime, 25 MinimizatonAttempts, 323811 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 1115 NumberOfCodeBlocks, 1115 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1023 ConstructedInterpolants, 0 QuantifiedInterpolants, 272297 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...