./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a56c4d7c809c202f44f99842e3c4e5b1665d5a24 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:17:59,883 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:17:59,885 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:17:59,894 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:17:59,894 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:17:59,895 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:17:59,896 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:17:59,897 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:17:59,898 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:17:59,899 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:17:59,899 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:17:59,900 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:17:59,900 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:17:59,901 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:17:59,902 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:17:59,903 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:17:59,903 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:17:59,904 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:17:59,905 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:17:59,907 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:17:59,908 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:17:59,909 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:17:59,910 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:17:59,911 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:17:59,912 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:17:59,913 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:17:59,913 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:17:59,913 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:17:59,914 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:17:59,914 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:17:59,914 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:17:59,915 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:17:59,916 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:17:59,916 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:17:59,917 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:17:59,917 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:17:59,918 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:17:59,918 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:17:59,918 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:17:59,919 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:17:59,919 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:17:59,920 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 15:17:59,933 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:17:59,933 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:17:59,934 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 15:17:59,934 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 15:17:59,934 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 15:17:59,934 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 15:17:59,934 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 15:17:59,935 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 15:17:59,935 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 15:17:59,935 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 15:17:59,935 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 15:17:59,935 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 15:17:59,936 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 15:17:59,936 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 15:17:59,936 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 15:17:59,936 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:17:59,937 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:17:59,937 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:17:59,937 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:17:59,937 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:17:59,937 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:17:59,938 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:17:59,939 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:17:59,939 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:17:59,939 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:17:59,939 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:17:59,939 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:17:59,940 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:17:59,940 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:17:59,940 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:17:59,940 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 15:17:59,940 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:17:59,940 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:17:59,941 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:17:59,941 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 15:17:59,941 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a56c4d7c809c202f44f99842e3c4e5b1665d5a24 [2019-12-07 15:18:00,047 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:18:00,054 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:18:00,057 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:18:00,058 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:18:00,058 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:18:00,058 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i [2019-12-07 15:18:00,094 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/data/0deab9cd8/7ae2963260ea4a7a8348200ecf037298/FLAG37505c90f [2019-12-07 15:18:00,585 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:18:00,585 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/sv-benchmarks/c/pthread-wmm/mix049_tso.opt.i [2019-12-07 15:18:00,596 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/data/0deab9cd8/7ae2963260ea4a7a8348200ecf037298/FLAG37505c90f [2019-12-07 15:18:00,607 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/data/0deab9cd8/7ae2963260ea4a7a8348200ecf037298 [2019-12-07 15:18:00,609 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:18:00,610 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:18:00,611 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:18:00,611 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:18:00,614 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:18:00,615 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:18:00" (1/1) ... [2019-12-07 15:18:00,617 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:00, skipping insertion in model container [2019-12-07 15:18:00,617 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:18:00" (1/1) ... [2019-12-07 15:18:00,623 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:18:00,653 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:18:00,906 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:18:00,914 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:18:00,957 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:18:01,003 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:18:01,003 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01 WrapperNode [2019-12-07 15:18:01,003 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:18:01,003 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:18:01,004 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:18:01,004 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:18:01,009 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,023 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,041 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:18:01,041 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:18:01,041 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:18:01,041 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:18:01,048 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,048 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,051 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,051 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,058 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,061 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,064 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... [2019-12-07 15:18:01,067 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:18:01,067 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:18:01,068 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:18:01,068 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:18:01,068 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:18:01,111 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:18:01,111 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:18:01,111 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:18:01,112 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:18:01,112 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:18:01,112 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:18:01,112 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:18:01,112 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:18:01,113 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:18:01,473 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:18:01,473 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 15:18:01,474 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:18:01 BoogieIcfgContainer [2019-12-07 15:18:01,474 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:18:01,475 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:18:01,475 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:18:01,478 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:18:01,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:18:00" (1/3) ... [2019-12-07 15:18:01,478 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a063be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:18:01, skipping insertion in model container [2019-12-07 15:18:01,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:18:01" (2/3) ... [2019-12-07 15:18:01,479 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a063be8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:18:01, skipping insertion in model container [2019-12-07 15:18:01,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:18:01" (3/3) ... [2019-12-07 15:18:01,480 INFO L109 eAbstractionObserver]: Analyzing ICFG mix049_tso.opt.i [2019-12-07 15:18:01,489 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:18:01,489 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:18:01,495 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 15:18:01,496 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,522 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,527 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,528 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,529 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,530 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,531 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,531 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,531 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,532 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,533 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,534 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,535 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,536 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,537 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,538 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,539 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,545 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:18:01,556 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 15:18:01,568 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:18:01,568 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:18:01,568 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:18:01,568 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:18:01,569 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:18:01,569 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:18:01,569 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:18:01,569 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:18:01,580 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 15:18:01,581 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:18:01,637 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:18:01,637 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:18:01,646 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:18:01,661 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 15:18:01,692 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 15:18:01,692 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:18:01,698 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 15:18:01,713 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 15:18:01,714 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:18:04,611 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 15:18:04,906 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 15:18:04,907 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 15:18:04,909 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 15:18:23,963 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 15:18:23,965 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 15:18:23,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 15:18:23,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:18:23,969 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 15:18:23,969 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:18:23,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:18:23,973 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 15:18:23,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:18:23,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588935031] [2019-12-07 15:18:23,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:18:24,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:18:24,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:18:24,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588935031] [2019-12-07 15:18:24,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:18:24,116 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 15:18:24,117 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474674988] [2019-12-07 15:18:24,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:18:24,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:18:24,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:18:24,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:18:24,132 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 15:18:25,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:18:25,017 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 15:18:25,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:18:25,018 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 15:18:25,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:18:25,490 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 15:18:25,490 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 15:18:25,491 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:18:30,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 15:18:33,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 15:18:33,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 15:18:33,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 15:18:33,949 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 15:18:33,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:18:33,949 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 15:18:33,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:18:33,949 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 15:18:33,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 15:18:33,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:18:33,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:18:33,953 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:18:33,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:18:33,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 15:18:33,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:18:33,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156079825] [2019-12-07 15:18:33,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:18:33,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:18:34,010 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:18:34,010 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156079825] [2019-12-07 15:18:34,010 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:18:34,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:18:34,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867521992] [2019-12-07 15:18:34,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:18:34,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:18:34,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:18:34,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:18:34,012 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 15:18:34,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:18:34,903 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 15:18:34,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:18:34,904 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 15:18:34,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:18:35,356 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 15:18:35,356 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 15:18:35,357 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:18:41,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 15:18:43,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 15:18:43,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 15:18:43,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 15:18:43,916 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 15:18:43,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:18:43,916 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 15:18:43,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:18:43,916 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 15:18:43,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 15:18:43,920 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:18:43,920 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:18:43,920 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:18:43,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:18:43,921 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 15:18:43,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:18:43,921 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723798205] [2019-12-07 15:18:43,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:18:43,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:18:43,970 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:18:43,971 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723798205] [2019-12-07 15:18:43,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:18:43,971 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:18:43,971 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315702522] [2019-12-07 15:18:43,972 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:18:43,972 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:18:43,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:18:43,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:18:43,972 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 15:18:47,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:18:47,371 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 15:18:47,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:18:47,372 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 15:18:47,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:18:47,931 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 15:18:47,931 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 15:18:47,931 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:18:54,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 15:18:57,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 15:18:57,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 15:18:57,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 15:18:57,599 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 15:18:57,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:18:57,600 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 15:18:57,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:18:57,600 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 15:18:57,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:18:57,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:18:57,608 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:18:57,608 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:18:57,608 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:18:57,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 15:18:57,608 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:18:57,608 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393152898] [2019-12-07 15:18:57,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:18:57,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:18:57,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:18:57,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393152898] [2019-12-07 15:18:57,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:18:57,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:18:57,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959623926] [2019-12-07 15:18:57,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:18:57,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:18:57,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:18:57,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:18:57,635 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 15:18:59,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:18:59,273 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 15:18:59,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:18:59,274 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 15:18:59,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:18:59,977 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 15:18:59,977 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 15:18:59,977 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:09,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 15:19:12,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 15:19:12,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 15:19:13,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 15:19:13,366 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 15:19:13,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:13,366 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 15:19:13,366 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:19:13,366 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 15:19:13,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 15:19:13,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:13,373 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:13,373 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:13,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:13,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 15:19:13,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:13,374 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707722292] [2019-12-07 15:19:13,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:13,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:13,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:13,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707722292] [2019-12-07 15:19:13,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:13,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:19:13,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2002200007] [2019-12-07 15:19:13,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:19:13,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:13,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:19:13,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:19:13,415 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 15:19:15,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:15,300 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 15:19:15,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:19:15,301 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 15:19:15,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:16,044 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 15:19:16,044 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 15:19:16,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:19:23,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 15:19:30,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 15:19:30,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 15:19:30,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 15:19:30,778 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 15:19:30,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:30,778 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 15:19:30,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:19:30,778 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 15:19:30,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:19:30,790 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:30,790 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:30,790 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:30,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:30,791 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 15:19:30,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:30,791 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664346836] [2019-12-07 15:19:30,791 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:30,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:30,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664346836] [2019-12-07 15:19:30,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:30,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:19:30,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871769770] [2019-12-07 15:19:30,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:19:30,828 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:30,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:19:30,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:30,829 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 15:19:32,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:32,241 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 15:19:32,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:19:32,242 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:19:32,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:32,844 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 15:19:32,844 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 15:19:32,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:42,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 15:19:45,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 15:19:45,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 15:19:46,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 15:19:46,555 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 15:19:46,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:46,556 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 15:19:46,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:19:46,556 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 15:19:46,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 15:19:46,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:46,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:46,566 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:46,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:46,566 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 15:19:46,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:46,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [438158847] [2019-12-07 15:19:46,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:46,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:46,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:46,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [438158847] [2019-12-07 15:19:46,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:46,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:19:46,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1222347040] [2019-12-07 15:19:46,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:19:46,594 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:46,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:19:46,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:46,595 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 15:19:46,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:46,708 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 15:19:46,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:19:46,709 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 15:19:46,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:46,768 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 15:19:46,768 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 15:19:46,769 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:47,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 15:19:47,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 15:19:47,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 15:19:47,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 15:19:47,474 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 15:19:47,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:47,474 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 15:19:47,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:19:47,474 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 15:19:47,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:19:47,480 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:47,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:47,480 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:47,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:47,480 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 15:19:47,481 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:47,481 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029595518] [2019-12-07 15:19:47,481 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:47,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:47,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:47,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029595518] [2019-12-07 15:19:47,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:47,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:19:47,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1263264302] [2019-12-07 15:19:47,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:19:47,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:47,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:19:47,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:19:47,528 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 15:19:48,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:48,094 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 15:19:48,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 15:19:48,095 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 15:19:48,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:48,188 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 15:19:48,188 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 15:19:48,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 15:19:48,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 15:19:49,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 15:19:49,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 15:19:49,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 15:19:49,430 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 15:19:49,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:49,430 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 15:19:49,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:19:49,430 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 15:19:49,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 15:19:49,440 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:49,440 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:49,440 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:49,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:49,441 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 15:19:49,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:49,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530192490] [2019-12-07 15:19:49,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:49,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:49,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:49,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [530192490] [2019-12-07 15:19:49,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:49,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:19:49,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406854321] [2019-12-07 15:19:49,501 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:19:49,501 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:49,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:19:49,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:19:49,502 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 5 states. [2019-12-07 15:19:49,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:49,930 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 15:19:49,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:19:49,931 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 15:19:49,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:50,027 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 15:19:50,027 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 15:19:50,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:19:50,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 15:19:50,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 15:19:50,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 15:19:50,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 15:19:50,988 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 15:19:50,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:50,989 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 15:19:50,989 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:19:50,989 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 15:19:51,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 15:19:51,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:51,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:51,005 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:51,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:51,005 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 15:19:51,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:51,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084290511] [2019-12-07 15:19:51,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:51,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:51,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:51,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084290511] [2019-12-07 15:19:51,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:51,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:19:51,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1428028691] [2019-12-07 15:19:51,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:19:51,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:51,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:19:51,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:19:51,048 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 15:19:51,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:51,559 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 15:19:51,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 15:19:51,560 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 15:19:51,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:51,660 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 15:19:51,661 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 15:19:51,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:19:51,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 15:19:52,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 15:19:52,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 15:19:52,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 15:19:52,765 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 15:19:52,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:52,766 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 15:19:52,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:19:52,766 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 15:19:52,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 15:19:52,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:52,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:52,787 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:52,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:52,787 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 15:19:52,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:52,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355817611] [2019-12-07 15:19:52,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:52,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:52,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:52,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355817611] [2019-12-07 15:19:52,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:52,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:19:52,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372957241] [2019-12-07 15:19:52,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:19:52,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:52,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:19:52,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:19:52,826 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 15:19:52,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:52,888 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 15:19:52,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:19:52,888 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 15:19:52,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:52,911 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 15:19:52,911 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 15:19:52,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:19:53,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 15:19:53,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 15:19:53,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 15:19:53,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 15:19:53,205 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 15:19:53,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:53,205 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 15:19:53,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:19:53,205 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 15:19:53,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:19:53,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:53,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:53,224 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:53,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:53,224 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 15:19:53,224 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:53,224 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212910859] [2019-12-07 15:19:53,224 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:53,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:53,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:53,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212910859] [2019-12-07 15:19:53,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:53,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:19:53,284 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1083921879] [2019-12-07 15:19:53,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:19:53,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:53,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:19:53,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:19:53,285 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 15:19:53,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:53,995 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 15:19:53,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 15:19:53,995 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:19:53,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:54,025 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 15:19:54,025 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 15:19:54,025 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:19:54,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 15:19:54,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 15:19:54,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 15:19:54,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 15:19:54,373 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 15:19:54,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:54,373 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 15:19:54,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:19:54,373 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 15:19:54,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 15:19:54,389 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:54,389 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:54,389 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:54,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:54,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 15:19:54,390 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:54,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677277061] [2019-12-07 15:19:54,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:54,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:54,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:54,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677277061] [2019-12-07 15:19:54,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:54,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:19:54,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649960927] [2019-12-07 15:19:54,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:19:54,447 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:54,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:19:54,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:54,447 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 15:19:54,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:54,496 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 15:19:54,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:19:54,497 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 15:19:54,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:54,518 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 15:19:54,518 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 15:19:54,519 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:54,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 15:19:54,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 15:19:54,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 15:19:54,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 15:19:54,808 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 15:19:54,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:54,808 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 15:19:54,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:19:54,808 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 15:19:54,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 15:19:54,823 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:54,823 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:54,823 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:54,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:54,824 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 15:19:54,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:54,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977914392] [2019-12-07 15:19:54,824 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:54,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:54,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:54,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977914392] [2019-12-07 15:19:54,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:54,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:19:54,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463158730] [2019-12-07 15:19:54,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:19:54,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:54,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:19:54,883 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:19:54,883 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 15:19:54,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:54,945 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 15:19:54,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:19:54,945 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 15:19:54,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:54,965 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 15:19:54,965 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 15:19:54,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:19:55,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 15:19:55,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 15:19:55,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 15:19:55,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 15:19:55,206 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 15:19:55,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:55,206 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 15:19:55,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:19:55,206 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 15:19:55,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:19:55,220 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:55,220 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:55,220 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:55,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:55,220 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 15:19:55,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:55,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71796166] [2019-12-07 15:19:55,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:55,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:55,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:55,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [71796166] [2019-12-07 15:19:55,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:55,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:19:55,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [914529264] [2019-12-07 15:19:55,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:19:55,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:55,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:19:55,261 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:55,261 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 15:19:55,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:55,342 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 15:19:55,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:19:55,343 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:19:55,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:55,363 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 15:19:55,363 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 15:19:55,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:19:55,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 15:19:55,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 15:19:55,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 15:19:55,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 15:19:55,617 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 15:19:55,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:55,617 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 15:19:55,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:19:55,617 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 15:19:55,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:19:55,631 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:55,632 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:55,632 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:55,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:55,632 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 15:19:55,632 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:55,632 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398579353] [2019-12-07 15:19:55,632 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:55,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:55,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:55,677 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398579353] [2019-12-07 15:19:55,677 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:55,677 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:19:55,677 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958342761] [2019-12-07 15:19:55,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:19:55,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:55,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:19:55,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:19:55,677 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 15:19:55,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:55,774 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 15:19:55,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:19:55,775 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 15:19:55,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:55,795 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 15:19:55,795 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 15:19:55,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:19:55,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 15:19:56,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 15:19:56,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 15:19:56,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 15:19:56,049 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 15:19:56,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:56,050 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 15:19:56,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:19:56,050 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 15:19:56,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:19:56,062 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:56,063 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:56,063 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:56,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:56,063 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 15:19:56,063 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:56,063 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1151387414] [2019-12-07 15:19:56,063 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:56,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:56,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:56,180 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1151387414] [2019-12-07 15:19:56,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:56,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:19:56,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123929826] [2019-12-07 15:19:56,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:19:56,180 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:56,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:19:56,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:19:56,181 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 10 states. [2019-12-07 15:19:57,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:57,329 INFO L93 Difference]: Finished difference Result 35073 states and 109582 transitions. [2019-12-07 15:19:57,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 15:19:57,329 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:19:57,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:57,355 INFO L225 Difference]: With dead ends: 35073 [2019-12-07 15:19:57,355 INFO L226 Difference]: Without dead ends: 24437 [2019-12-07 15:19:57,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 121 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=140, Invalid=562, Unknown=0, NotChecked=0, Total=702 [2019-12-07 15:19:57,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24437 states. [2019-12-07 15:19:57,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24437 to 18082. [2019-12-07 15:19:57,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18082 states. [2019-12-07 15:19:57,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18082 states to 18082 states and 56427 transitions. [2019-12-07 15:19:57,684 INFO L78 Accepts]: Start accepts. Automaton has 18082 states and 56427 transitions. Word has length 67 [2019-12-07 15:19:57,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:57,684 INFO L462 AbstractCegarLoop]: Abstraction has 18082 states and 56427 transitions. [2019-12-07 15:19:57,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:19:57,685 INFO L276 IsEmpty]: Start isEmpty. Operand 18082 states and 56427 transitions. [2019-12-07 15:19:57,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:19:57,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:57,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:57,699 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:57,700 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:57,700 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 15:19:57,700 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:57,700 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756291073] [2019-12-07 15:19:57,700 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:57,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:57,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:57,824 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756291073] [2019-12-07 15:19:57,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:57,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 15:19:57,825 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936818107] [2019-12-07 15:19:57,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 15:19:57,825 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:57,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 15:19:57,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 15:19:57,825 INFO L87 Difference]: Start difference. First operand 18082 states and 56427 transitions. Second operand 10 states. [2019-12-07 15:19:58,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:19:58,764 INFO L93 Difference]: Finished difference Result 30956 states and 95936 transitions. [2019-12-07 15:19:58,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 15:19:58,764 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 15:19:58,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:19:58,795 INFO L225 Difference]: With dead ends: 30956 [2019-12-07 15:19:58,795 INFO L226 Difference]: Without dead ends: 26393 [2019-12-07 15:19:58,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=241, Unknown=0, NotChecked=0, Total=306 [2019-12-07 15:19:58,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26393 states. [2019-12-07 15:19:59,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26393 to 18534. [2019-12-07 15:19:59,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18534 states. [2019-12-07 15:19:59,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18534 states to 18534 states and 57675 transitions. [2019-12-07 15:19:59,130 INFO L78 Accepts]: Start accepts. Automaton has 18534 states and 57675 transitions. Word has length 67 [2019-12-07 15:19:59,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:19:59,130 INFO L462 AbstractCegarLoop]: Abstraction has 18534 states and 57675 transitions. [2019-12-07 15:19:59,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 15:19:59,131 INFO L276 IsEmpty]: Start isEmpty. Operand 18534 states and 57675 transitions. [2019-12-07 15:19:59,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:19:59,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:19:59,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:19:59,146 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:19:59,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:19:59,146 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 15:19:59,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:19:59,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355534840] [2019-12-07 15:19:59,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:19:59,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:19:59,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:19:59,250 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355534840] [2019-12-07 15:19:59,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:19:59,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:19:59,250 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231869988] [2019-12-07 15:19:59,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:19:59,250 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:19:59,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:19:59,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:19:59,251 INFO L87 Difference]: Start difference. First operand 18534 states and 57675 transitions. Second operand 11 states. [2019-12-07 15:20:00,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:00,575 INFO L93 Difference]: Finished difference Result 29036 states and 89939 transitions. [2019-12-07 15:20:00,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 15:20:00,577 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:20:00,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:00,618 INFO L225 Difference]: With dead ends: 29036 [2019-12-07 15:20:00,618 INFO L226 Difference]: Without dead ends: 25553 [2019-12-07 15:20:00,618 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=341, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:20:00,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25553 states. [2019-12-07 15:20:00,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25553 to 18102. [2019-12-07 15:20:00,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18102 states. [2019-12-07 15:20:00,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18102 states to 18102 states and 56343 transitions. [2019-12-07 15:20:00,948 INFO L78 Accepts]: Start accepts. Automaton has 18102 states and 56343 transitions. Word has length 67 [2019-12-07 15:20:00,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:00,948 INFO L462 AbstractCegarLoop]: Abstraction has 18102 states and 56343 transitions. [2019-12-07 15:20:00,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:20:00,948 INFO L276 IsEmpty]: Start isEmpty. Operand 18102 states and 56343 transitions. [2019-12-07 15:20:00,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:00,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:00,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:00,964 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:00,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:00,964 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 4 times [2019-12-07 15:20:00,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:00,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279413183] [2019-12-07 15:20:00,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:00,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:01,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:01,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [279413183] [2019-12-07 15:20:01,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:01,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2019-12-07 15:20:01,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1360255461] [2019-12-07 15:20:01,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2019-12-07 15:20:01,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:01,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 15:20:01,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=444, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:20:01,987 INFO L87 Difference]: Start difference. First operand 18102 states and 56343 transitions. Second operand 23 states. [2019-12-07 15:20:06,305 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2019-12-07 15:20:08,382 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:20:08,972 WARN L192 SmtUtils]: Spent 113.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 27 [2019-12-07 15:20:09,191 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 23 DAG size of output: 22 [2019-12-07 15:20:09,487 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 29 [2019-12-07 15:20:10,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:10,978 INFO L93 Difference]: Finished difference Result 23916 states and 72568 transitions. [2019-12-07 15:20:10,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2019-12-07 15:20:10,979 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 67 [2019-12-07 15:20:10,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:11,015 INFO L225 Difference]: With dead ends: 23916 [2019-12-07 15:20:11,015 INFO L226 Difference]: Without dead ends: 21924 [2019-12-07 15:20:11,016 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 4 SyntacticMatches, 6 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 905 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=541, Invalid=3491, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 15:20:11,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21924 states. [2019-12-07 15:20:11,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21924 to 20348. [2019-12-07 15:20:11,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20348 states. [2019-12-07 15:20:11,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20348 states to 20348 states and 62649 transitions. [2019-12-07 15:20:11,324 INFO L78 Accepts]: Start accepts. Automaton has 20348 states and 62649 transitions. Word has length 67 [2019-12-07 15:20:11,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:11,324 INFO L462 AbstractCegarLoop]: Abstraction has 20348 states and 62649 transitions. [2019-12-07 15:20:11,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 23 states. [2019-12-07 15:20:11,324 INFO L276 IsEmpty]: Start isEmpty. Operand 20348 states and 62649 transitions. [2019-12-07 15:20:11,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:11,341 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:11,341 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:11,342 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:11,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:11,342 INFO L82 PathProgramCache]: Analyzing trace with hash 68355254, now seen corresponding path program 5 times [2019-12-07 15:20:11,342 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:11,342 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422248262] [2019-12-07 15:20:11,342 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:11,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:11,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:11,444 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422248262] [2019-12-07 15:20:11,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:11,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 15:20:11,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937514332] [2019-12-07 15:20:11,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 15:20:11,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:11,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 15:20:11,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:20:11,445 INFO L87 Difference]: Start difference. First operand 20348 states and 62649 transitions. Second operand 11 states. [2019-12-07 15:20:12,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:12,413 INFO L93 Difference]: Finished difference Result 27887 states and 84982 transitions. [2019-12-07 15:20:12,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 15:20:12,414 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 15:20:12,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:12,444 INFO L225 Difference]: With dead ends: 27887 [2019-12-07 15:20:12,444 INFO L226 Difference]: Without dead ends: 24640 [2019-12-07 15:20:12,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 15:20:12,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24640 states. [2019-12-07 15:20:12,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24640 to 20546. [2019-12-07 15:20:12,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20546 states. [2019-12-07 15:20:12,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20546 states to 20546 states and 63158 transitions. [2019-12-07 15:20:12,768 INFO L78 Accepts]: Start accepts. Automaton has 20546 states and 63158 transitions. Word has length 67 [2019-12-07 15:20:12,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:12,768 INFO L462 AbstractCegarLoop]: Abstraction has 20546 states and 63158 transitions. [2019-12-07 15:20:12,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 15:20:12,768 INFO L276 IsEmpty]: Start isEmpty. Operand 20546 states and 63158 transitions. [2019-12-07 15:20:12,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:12,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:12,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:12,785 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:12,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:12,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 6 times [2019-12-07 15:20:12,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:12,785 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622558701] [2019-12-07 15:20:12,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:12,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:12,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:12,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622558701] [2019-12-07 15:20:12,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:12,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:20:12,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404139835] [2019-12-07 15:20:12,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:20:12,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:12,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:20:12,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:20:12,891 INFO L87 Difference]: Start difference. First operand 20546 states and 63158 transitions. Second operand 12 states. [2019-12-07 15:20:13,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:13,725 INFO L93 Difference]: Finished difference Result 26283 states and 79967 transitions. [2019-12-07 15:20:13,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 15:20:13,725 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:20:13,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:13,754 INFO L225 Difference]: With dead ends: 26283 [2019-12-07 15:20:13,754 INFO L226 Difference]: Without dead ends: 25068 [2019-12-07 15:20:13,754 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:20:13,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25068 states. [2019-12-07 15:20:14,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25068 to 20408. [2019-12-07 15:20:14,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20408 states. [2019-12-07 15:20:14,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20408 states to 20408 states and 62794 transitions. [2019-12-07 15:20:14,092 INFO L78 Accepts]: Start accepts. Automaton has 20408 states and 62794 transitions. Word has length 67 [2019-12-07 15:20:14,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:14,092 INFO L462 AbstractCegarLoop]: Abstraction has 20408 states and 62794 transitions. [2019-12-07 15:20:14,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:20:14,093 INFO L276 IsEmpty]: Start isEmpty. Operand 20408 states and 62794 transitions. [2019-12-07 15:20:14,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:14,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:14,110 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:14,110 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:14,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:14,110 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 7 times [2019-12-07 15:20:14,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:14,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025416085] [2019-12-07 15:20:14,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:14,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:14,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:14,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025416085] [2019-12-07 15:20:14,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:14,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 15:20:14,515 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826230061] [2019-12-07 15:20:14,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 15:20:14,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:14,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 15:20:14,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2019-12-07 15:20:14,516 INFO L87 Difference]: Start difference. First operand 20408 states and 62794 transitions. Second operand 19 states. [2019-12-07 15:20:20,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:20,423 INFO L93 Difference]: Finished difference Result 27906 states and 85734 transitions. [2019-12-07 15:20:20,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 15:20:20,424 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 15:20:20,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:20,452 INFO L225 Difference]: With dead ends: 27906 [2019-12-07 15:20:20,452 INFO L226 Difference]: Without dead ends: 26911 [2019-12-07 15:20:20,454 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1018 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=558, Invalid=3732, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 15:20:20,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26911 states. [2019-12-07 15:20:20,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26911 to 22383. [2019-12-07 15:20:20,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22383 states. [2019-12-07 15:20:20,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22383 states to 22383 states and 68973 transitions. [2019-12-07 15:20:20,797 INFO L78 Accepts]: Start accepts. Automaton has 22383 states and 68973 transitions. Word has length 67 [2019-12-07 15:20:20,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:20,797 INFO L462 AbstractCegarLoop]: Abstraction has 22383 states and 68973 transitions. [2019-12-07 15:20:20,797 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 15:20:20,797 INFO L276 IsEmpty]: Start isEmpty. Operand 22383 states and 68973 transitions. [2019-12-07 15:20:20,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:20,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:20,815 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:20,815 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:20,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:20,815 INFO L82 PathProgramCache]: Analyzing trace with hash 2040469818, now seen corresponding path program 8 times [2019-12-07 15:20:20,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:20,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [248117853] [2019-12-07 15:20:20,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:20,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:21,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:21,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [248117853] [2019-12-07 15:20:21,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:21,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:20:21,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [473533676] [2019-12-07 15:20:21,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:20:21,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:21,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:20:21,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:20:21,247 INFO L87 Difference]: Start difference. First operand 22383 states and 68973 transitions. Second operand 21 states. [2019-12-07 15:20:24,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:24,557 INFO L93 Difference]: Finished difference Result 27143 states and 82592 transitions. [2019-12-07 15:20:24,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 15:20:24,558 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:20:24,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:24,584 INFO L225 Difference]: With dead ends: 27143 [2019-12-07 15:20:24,584 INFO L226 Difference]: Without dead ends: 25277 [2019-12-07 15:20:24,585 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=418, Invalid=2338, Unknown=0, NotChecked=0, Total=2756 [2019-12-07 15:20:24,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25277 states. [2019-12-07 15:20:24,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25277 to 22593. [2019-12-07 15:20:24,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22593 states. [2019-12-07 15:20:24,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22593 states to 22593 states and 69381 transitions. [2019-12-07 15:20:24,910 INFO L78 Accepts]: Start accepts. Automaton has 22593 states and 69381 transitions. Word has length 67 [2019-12-07 15:20:24,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:24,911 INFO L462 AbstractCegarLoop]: Abstraction has 22593 states and 69381 transitions. [2019-12-07 15:20:24,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:20:24,911 INFO L276 IsEmpty]: Start isEmpty. Operand 22593 states and 69381 transitions. [2019-12-07 15:20:24,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:24,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:24,929 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:24,929 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:24,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:24,930 INFO L82 PathProgramCache]: Analyzing trace with hash 1575321640, now seen corresponding path program 9 times [2019-12-07 15:20:24,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:24,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956484461] [2019-12-07 15:20:24,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:24,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:25,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:25,470 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956484461] [2019-12-07 15:20:25,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:25,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:20:25,471 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1661205528] [2019-12-07 15:20:25,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:20:25,471 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:25,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:20:25,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=360, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:20:25,471 INFO L87 Difference]: Start difference. First operand 22593 states and 69381 transitions. Second operand 21 states. [2019-12-07 15:20:30,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:30,264 INFO L93 Difference]: Finished difference Result 28207 states and 85267 transitions. [2019-12-07 15:20:30,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 15:20:30,265 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:20:30,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:30,293 INFO L225 Difference]: With dead ends: 28207 [2019-12-07 15:20:30,293 INFO L226 Difference]: Without dead ends: 25106 [2019-12-07 15:20:30,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 894 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=596, Invalid=3564, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 15:20:30,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25106 states. [2019-12-07 15:20:30,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25106 to 21039. [2019-12-07 15:20:30,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21039 states. [2019-12-07 15:20:30,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21039 states to 21039 states and 64416 transitions. [2019-12-07 15:20:30,669 INFO L78 Accepts]: Start accepts. Automaton has 21039 states and 64416 transitions. Word has length 67 [2019-12-07 15:20:30,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:30,669 INFO L462 AbstractCegarLoop]: Abstraction has 21039 states and 64416 transitions. [2019-12-07 15:20:30,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:20:30,670 INFO L276 IsEmpty]: Start isEmpty. Operand 21039 states and 64416 transitions. [2019-12-07 15:20:30,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:30,688 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:30,688 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:30,688 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:30,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:30,689 INFO L82 PathProgramCache]: Analyzing trace with hash -190162996, now seen corresponding path program 10 times [2019-12-07 15:20:30,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:30,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015307453] [2019-12-07 15:20:30,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:30,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:30,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:30,805 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2015307453] [2019-12-07 15:20:30,805 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:30,805 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:20:30,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695339891] [2019-12-07 15:20:30,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:20:30,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:30,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:20:30,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:20:30,806 INFO L87 Difference]: Start difference. First operand 21039 states and 64416 transitions. Second operand 12 states. [2019-12-07 15:20:32,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:32,342 INFO L93 Difference]: Finished difference Result 30897 states and 93015 transitions. [2019-12-07 15:20:32,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 15:20:32,344 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:20:32,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:32,390 INFO L225 Difference]: With dead ends: 30897 [2019-12-07 15:20:32,391 INFO L226 Difference]: Without dead ends: 26933 [2019-12-07 15:20:32,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 144 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=163, Invalid=707, Unknown=0, NotChecked=0, Total=870 [2019-12-07 15:20:32,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26933 states. [2019-12-07 15:20:32,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26933 to 20589. [2019-12-07 15:20:32,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20589 states. [2019-12-07 15:20:32,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20589 states to 20589 states and 63065 transitions. [2019-12-07 15:20:32,746 INFO L78 Accepts]: Start accepts. Automaton has 20589 states and 63065 transitions. Word has length 67 [2019-12-07 15:20:32,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:32,746 INFO L462 AbstractCegarLoop]: Abstraction has 20589 states and 63065 transitions. [2019-12-07 15:20:32,746 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:20:32,746 INFO L276 IsEmpty]: Start isEmpty. Operand 20589 states and 63065 transitions. [2019-12-07 15:20:32,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:32,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:32,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:32,764 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:32,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:32,764 INFO L82 PathProgramCache]: Analyzing trace with hash 993470682, now seen corresponding path program 11 times [2019-12-07 15:20:32,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:32,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250052518] [2019-12-07 15:20:32,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:32,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:33,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:33,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250052518] [2019-12-07 15:20:33,376 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:33,376 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-07 15:20:33,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156897193] [2019-12-07 15:20:33,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2019-12-07 15:20:33,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:33,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 15:20:33,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2019-12-07 15:20:33,377 INFO L87 Difference]: Start difference. First operand 20589 states and 63065 transitions. Second operand 22 states. [2019-12-07 15:20:41,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:41,383 INFO L93 Difference]: Finished difference Result 24877 states and 75134 transitions. [2019-12-07 15:20:41,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 15:20:41,384 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 67 [2019-12-07 15:20:41,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:41,411 INFO L225 Difference]: With dead ends: 24877 [2019-12-07 15:20:41,411 INFO L226 Difference]: Without dead ends: 24565 [2019-12-07 15:20:41,412 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 613 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=482, Invalid=2710, Unknown=0, NotChecked=0, Total=3192 [2019-12-07 15:20:41,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24565 states. [2019-12-07 15:20:41,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24565 to 20572. [2019-12-07 15:20:41,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20572 states. [2019-12-07 15:20:41,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20572 states to 20572 states and 63001 transitions. [2019-12-07 15:20:41,735 INFO L78 Accepts]: Start accepts. Automaton has 20572 states and 63001 transitions. Word has length 67 [2019-12-07 15:20:41,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:41,735 INFO L462 AbstractCegarLoop]: Abstraction has 20572 states and 63001 transitions. [2019-12-07 15:20:41,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 22 states. [2019-12-07 15:20:41,735 INFO L276 IsEmpty]: Start isEmpty. Operand 20572 states and 63001 transitions. [2019-12-07 15:20:41,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:41,753 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:41,753 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:41,753 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:41,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:41,754 INFO L82 PathProgramCache]: Analyzing trace with hash 1616492466, now seen corresponding path program 12 times [2019-12-07 15:20:41,754 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:41,754 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696115010] [2019-12-07 15:20:41,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:41,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:42,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:42,125 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696115010] [2019-12-07 15:20:42,125 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:42,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2019-12-07 15:20:42,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972799260] [2019-12-07 15:20:42,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-07 15:20:42,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:42,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 15:20:42,126 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420 [2019-12-07 15:20:42,126 INFO L87 Difference]: Start difference. First operand 20572 states and 63001 transitions. Second operand 21 states. [2019-12-07 15:20:46,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:46,360 INFO L93 Difference]: Finished difference Result 24863 states and 74786 transitions. [2019-12-07 15:20:46,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 15:20:46,360 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2019-12-07 15:20:46,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:46,389 INFO L225 Difference]: With dead ends: 24863 [2019-12-07 15:20:46,389 INFO L226 Difference]: Without dead ends: 22994 [2019-12-07 15:20:46,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=266, Invalid=1456, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 15:20:46,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22994 states. [2019-12-07 15:20:46,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22994 to 21121. [2019-12-07 15:20:46,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21121 states. [2019-12-07 15:20:46,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21121 states to 21121 states and 64542 transitions. [2019-12-07 15:20:46,713 INFO L78 Accepts]: Start accepts. Automaton has 21121 states and 64542 transitions. Word has length 67 [2019-12-07 15:20:46,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:46,713 INFO L462 AbstractCegarLoop]: Abstraction has 21121 states and 64542 transitions. [2019-12-07 15:20:46,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-07 15:20:46,713 INFO L276 IsEmpty]: Start isEmpty. Operand 21121 states and 64542 transitions. [2019-12-07 15:20:46,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:46,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:46,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:46,733 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:46,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:46,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 13 times [2019-12-07 15:20:46,733 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:46,733 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050201450] [2019-12-07 15:20:46,733 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:46,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:46,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:46,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050201450] [2019-12-07 15:20:46,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:46,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 15:20:46,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521267788] [2019-12-07 15:20:46,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 15:20:46,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:46,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 15:20:46,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 15:20:46,844 INFO L87 Difference]: Start difference. First operand 21121 states and 64542 transitions. Second operand 12 states. [2019-12-07 15:20:49,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:49,438 INFO L93 Difference]: Finished difference Result 27950 states and 84092 transitions. [2019-12-07 15:20:49,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 15:20:49,439 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 15:20:49,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:49,467 INFO L225 Difference]: With dead ends: 27950 [2019-12-07 15:20:49,467 INFO L226 Difference]: Without dead ends: 26723 [2019-12-07 15:20:49,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=122, Invalid=528, Unknown=0, NotChecked=0, Total=650 [2019-12-07 15:20:49,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26723 states. [2019-12-07 15:20:49,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26723 to 21005. [2019-12-07 15:20:49,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21005 states. [2019-12-07 15:20:49,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21005 states to 21005 states and 64239 transitions. [2019-12-07 15:20:49,798 INFO L78 Accepts]: Start accepts. Automaton has 21005 states and 64239 transitions. Word has length 67 [2019-12-07 15:20:49,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:49,798 INFO L462 AbstractCegarLoop]: Abstraction has 21005 states and 64239 transitions. [2019-12-07 15:20:49,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 15:20:49,798 INFO L276 IsEmpty]: Start isEmpty. Operand 21005 states and 64239 transitions. [2019-12-07 15:20:49,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:49,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:49,815 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:49,815 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:49,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:49,815 INFO L82 PathProgramCache]: Analyzing trace with hash -1372468028, now seen corresponding path program 14 times [2019-12-07 15:20:49,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:49,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [186680988] [2019-12-07 15:20:49,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:49,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:49,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:49,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [186680988] [2019-12-07 15:20:49,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:49,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 15:20:49,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [15791614] [2019-12-07 15:20:49,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 15:20:49,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:49,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 15:20:49,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:20:49,984 INFO L87 Difference]: Start difference. First operand 21005 states and 64239 transitions. Second operand 15 states. [2019-12-07 15:20:51,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:51,716 INFO L93 Difference]: Finished difference Result 29430 states and 88672 transitions. [2019-12-07 15:20:51,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 15:20:51,717 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 15:20:51,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:51,763 INFO L225 Difference]: With dead ends: 29430 [2019-12-07 15:20:51,763 INFO L226 Difference]: Without dead ends: 27260 [2019-12-07 15:20:51,763 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=204, Invalid=918, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 15:20:51,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27260 states. [2019-12-07 15:20:52,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27260 to 20273. [2019-12-07 15:20:52,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20273 states. [2019-12-07 15:20:52,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20273 states to 20273 states and 62183 transitions. [2019-12-07 15:20:52,121 INFO L78 Accepts]: Start accepts. Automaton has 20273 states and 62183 transitions. Word has length 67 [2019-12-07 15:20:52,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:52,121 INFO L462 AbstractCegarLoop]: Abstraction has 20273 states and 62183 transitions. [2019-12-07 15:20:52,121 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 15:20:52,121 INFO L276 IsEmpty]: Start isEmpty. Operand 20273 states and 62183 transitions. [2019-12-07 15:20:52,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:52,139 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:52,139 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:52,139 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:52,140 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:52,140 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 15 times [2019-12-07 15:20:52,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:52,140 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248063864] [2019-12-07 15:20:52,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:52,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:20:52,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:20:52,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248063864] [2019-12-07 15:20:52,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:20:52,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:20:52,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078700424] [2019-12-07 15:20:52,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:20:52,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 15:20:52,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:20:52,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:20:52,202 INFO L87 Difference]: Start difference. First operand 20273 states and 62183 transitions. Second operand 6 states. [2019-12-07 15:20:52,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:20:52,462 INFO L93 Difference]: Finished difference Result 47425 states and 144846 transitions. [2019-12-07 15:20:52,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 15:20:52,462 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 15:20:52,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:20:52,506 INFO L225 Difference]: With dead ends: 47425 [2019-12-07 15:20:52,506 INFO L226 Difference]: Without dead ends: 38035 [2019-12-07 15:20:52,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:20:52,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38035 states. [2019-12-07 15:20:52,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38035 to 21401. [2019-12-07 15:20:52,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21401 states. [2019-12-07 15:20:52,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21401 states to 21401 states and 65865 transitions. [2019-12-07 15:20:52,936 INFO L78 Accepts]: Start accepts. Automaton has 21401 states and 65865 transitions. Word has length 67 [2019-12-07 15:20:52,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:20:52,936 INFO L462 AbstractCegarLoop]: Abstraction has 21401 states and 65865 transitions. [2019-12-07 15:20:52,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:20:52,936 INFO L276 IsEmpty]: Start isEmpty. Operand 21401 states and 65865 transitions. [2019-12-07 15:20:53,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 15:20:53,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:20:53,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:20:53,005 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:20:53,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:20:53,006 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 16 times [2019-12-07 15:20:53,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 15:20:53,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1200286050] [2019-12-07 15:20:53,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:20:53,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:20:53,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:20:53,087 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 15:20:53,087 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:20:53,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23|)) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1318~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1318~0.base_23| 4)) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23|) |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0)) |v_#memory_int_17|) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1318~0.base=|v_ULTIMATE.start_main_~#t1318~0.base_23|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ULTIMATE.start_main_~#t1318~0.offset=|v_ULTIMATE.start_main_~#t1318~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_14|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_12|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1320~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1318~0.base, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1318~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1320~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1319~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11| 1) |v_#valid_38|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11|) |v_ULTIMATE.start_main_~#t1319~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1319~0.base_11| 4) |v_#length_17|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t1319~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t1319~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_9|, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:20:53,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In386598775 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|)) (and (= ~z~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out386598775|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:20:53,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:20:53,092 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13| 1) |v_#valid_36|) (= |v_ULTIMATE.start_main_~#t1320~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1320~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t1320~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1320~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13|) |v_ULTIMATE.start_main_~#t1320~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1320~0.base, #length, ULTIMATE.start_main_~#t1320~0.offset] because there is no mapped edge [2019-12-07 15:20:53,093 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-16581287 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-16581287|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:20:53,093 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1592832274 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1592832274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1592832274 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1592832274 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| ~z$w_buff1_used~0_In-1592832274) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1592832274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:20:53,095 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2005253206 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out2005253206| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In2005253206 |P1Thread1of1ForFork2_#t~ite13_Out2005253206|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2005253206|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:20:53,096 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-647140950 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| ~z$w_buff0_used~0_In-647140950) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-647140950 256) 0))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In-647140950 256) 0)) (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| |P2Thread1of1ForFork0_#t~ite27_Out-647140950|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-647140950| ~z$w_buff0_used~0_In-647140950) (= |P2Thread1of1ForFork0_#t~ite26_In-647140950| |P2Thread1of1ForFork0_#t~ite26_Out-647140950|) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-647140950|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:20:53,097 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:20:53,098 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1041155812 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1041155812 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1041155812|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:20:53,098 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:20:53,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| |P2Thread1of1ForFork0_#t~ite39_Out-535386570|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-535386570 256) 0))) (or (and .cse0 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z$w_buff1~0_In-535386570) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z~0_In-535386570)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-535386570|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-535386570|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:20:53,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-988525752| 0)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-988525752 |P2Thread1of1ForFork0_#t~ite40_Out-988525752|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-988525752|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:20:53,099 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-254870859 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-254870859 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-254870859 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-254870859|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:20:53,100 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1375098561 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1375098561 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| ~z$r_buff0_thd3~0_In1375098561) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1375098561|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:20:53,100 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1101784427 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1101784427 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1101784427|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:20:53,100 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:20:53,100 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In760265765 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In760265765 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In760265765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out760265765|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In760265765 |P0Thread1of1ForFork1_#t~ite6_Out760265765|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out760265765|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1903474534 ~z$r_buff0_thd1~0_In1903474534)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1903474534 256) 0))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out1903474534) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1903474534|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1903474534} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In260823075 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In260823075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In260823075 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In260823075 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out260823075| ~z$r_buff1_thd1~0_In260823075)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out260823075|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out260823075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| ~z$r_buff1_thd2~0_In1825162012)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1825162012|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:20:53,101 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:20:53,102 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out439139011| |ULTIMATE.start_main_#t~ite47_Out439139011|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In439139011 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In439139011 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z$w_buff1~0_In439139011) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z~0_In439139011)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ~z~0=~z~0_In439139011} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out439139011|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out439139011|, ~z~0=~z~0_In439139011} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:20:53,102 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-24977062 256)))) (or (and (= ~z$w_buff0_used~0_In-24977062 |ULTIMATE.start_main_#t~ite49_Out-24977062|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-24977062| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-24977062|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:20:53,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In10111743 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In10111743 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In10111743 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out10111743|)) (and (= ~z$w_buff1_used~0_In10111743 |ULTIMATE.start_main_#t~ite50_Out10111743|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out10111743|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:20:53,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-380531429 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-380531429|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-380531429 |ULTIMATE.start_main_#t~ite51_Out-380531429|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-380531429|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:20:53,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1799265621 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1799265621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1799265621|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite52_Out-1799265621|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1799265621|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:20:53,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:20:53,167 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:20:53 BasicIcfg [2019-12-07 15:20:53,167 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:20:53,168 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:20:53,168 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:20:53,168 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:20:53,168 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:18:01" (3/4) ... [2019-12-07 15:20:53,170 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:20:53,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (= 0 v_~__unbuffered_p1_EAX~0_44) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23|)) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store .cse0 |v_ULTIMATE.start_main_~#t1318~0.base_23| 1) |v_#valid_60|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1318~0.base_23|) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1318~0.base_23| 4)) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1318~0.base_23|) |v_ULTIMATE.start_main_~#t1318~0.offset_17| 0)) |v_#memory_int_17|) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_17|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t1318~0.base=|v_ULTIMATE.start_main_~#t1318~0.base_23|, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_19|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ULTIMATE.start_main_~#t1318~0.offset=|v_ULTIMATE.start_main_~#t1318~0.offset_17|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_14|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_12|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1320~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1318~0.base, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1318~0.offset, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1320~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1319~0.base_11|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11| 1) |v_#valid_38|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1319~0.base_11|) |v_ULTIMATE.start_main_~#t1319~0.offset_9| 1)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1319~0.base_11| 4) |v_#length_17|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1319~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t1319~0.base_11| 0)) (= 0 |v_ULTIMATE.start_main_~#t1319~0.offset_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t1319~0.offset=|v_ULTIMATE.start_main_~#t1319~0.offset_9|, ULTIMATE.start_main_~#t1319~0.base=|v_ULTIMATE.start_main_~#t1319~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1319~0.offset, ULTIMATE.start_main_~#t1319~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 15:20:53,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In386598775 256)))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|)) (and (= ~z~0_In386598775 |P1Thread1of1ForFork2_#t~ite9_Out386598775|) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out386598775|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In386598775, ~z$w_buff1_used~0=~z$w_buff1_used~0_In386598775, ~z$w_buff1~0=~z$w_buff1~0_In386598775, ~z~0=~z~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 15:20:53,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 15:20:53,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1320~0.base_13| 1) |v_#valid_36|) (= |v_ULTIMATE.start_main_~#t1320~0.offset_11| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1320~0.base_13| 4)) (not (= |v_ULTIMATE.start_main_~#t1320~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1320~0.base_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1320~0.base_13|) |v_ULTIMATE.start_main_~#t1320~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t1320~0.base=|v_ULTIMATE.start_main_~#t1320~0.base_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1320~0.offset=|v_ULTIMATE.start_main_~#t1320~0.offset_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1320~0.base, #length, ULTIMATE.start_main_~#t1320~0.offset] because there is no mapped edge [2019-12-07 15:20:53,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (not .cse1)) (and (= ~z$w_buff0_used~0_In-16581287 |P1Thread1of1ForFork2_#t~ite11_Out-16581287|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-16581287, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-16581287|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-16581287} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 15:20:53,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1592832274 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1592832274 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1592832274 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-1592832274 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| 0)) (and (= |P1Thread1of1ForFork2_#t~ite12_Out-1592832274| ~z$w_buff1_used~0_In-1592832274) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1592832274, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1592832274, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1592832274, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1592832274|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1592832274} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 15:20:53,174 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2005253206 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2005253206 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out2005253206| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In2005253206 |P1Thread1of1ForFork2_#t~ite13_Out2005253206|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2005253206, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out2005253206|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2005253206} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 15:20:53,175 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-647140950 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| ~z$w_buff0_used~0_In-647140950) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-647140950 256) 0))) (or (and .cse0 (= 0 (mod ~z$w_buff1_used~0_In-647140950 256))) (and .cse0 (= (mod ~z$r_buff1_thd3~0_In-647140950 256) 0)) (= (mod ~z$w_buff0_used~0_In-647140950 256) 0))) .cse1 (= |P2Thread1of1ForFork0_#t~ite26_Out-647140950| |P2Thread1of1ForFork0_#t~ite27_Out-647140950|)) (and (= |P2Thread1of1ForFork0_#t~ite27_Out-647140950| ~z$w_buff0_used~0_In-647140950) (= |P2Thread1of1ForFork0_#t~ite26_In-647140950| |P2Thread1of1ForFork0_#t~ite26_Out-647140950|) (not .cse1)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-647140950|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-647140950|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-647140950, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-647140950, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-647140950, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-647140950, ~weak$$choice2~0=~weak$$choice2~0_In-647140950} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 15:20:53,177 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:20:53,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1041155812 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1041155812 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork1_#t~ite5_Out1041155812|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out1041155812|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1041155812, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1041155812} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 15:20:53,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 15:20:53,178 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| |P2Thread1of1ForFork0_#t~ite39_Out-535386570|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-535386570 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-535386570 256) 0))) (or (and .cse0 (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z$w_buff1~0_In-535386570) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P2Thread1of1ForFork0_#t~ite38_Out-535386570| ~z~0_In-535386570)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-535386570|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-535386570|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-535386570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-535386570, ~z$w_buff1~0=~z$w_buff1~0_In-535386570, ~z~0=~z~0_In-535386570} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 15:20:53,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-988525752 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-988525752 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out-988525752| 0)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-988525752 |P2Thread1of1ForFork0_#t~ite40_Out-988525752|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-988525752, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-988525752|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-988525752} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 15:20:53,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-254870859 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-254870859 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-254870859 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-254870859 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-254870859 |P2Thread1of1ForFork0_#t~ite41_Out-254870859|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254870859, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-254870859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254870859, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-254870859, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-254870859|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 15:20:53,179 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1375098561 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1375098561 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| ~z$r_buff0_thd3~0_In1375098561) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out1375098561| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1375098561, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1375098561, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out1375098561|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1101784427 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1101784427 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1101784427 256))) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1101784427 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-1101784427 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-1101784427|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-1101784427|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1101784427, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1101784427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1101784427, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1101784427} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In760265765 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In760265765 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In760265765 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In760265765 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out760265765|)) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In760265765 |P0Thread1of1ForFork1_#t~ite6_Out760265765|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In760265765, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out760265765|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In760265765, ~z$w_buff1_used~0=~z$w_buff1_used~0_In760265765, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In760265765} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1903474534 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1903474534 ~z$r_buff0_thd1~0_In1903474534)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In1903474534 256) 0))) (or (and (not .cse0) (= 0 ~z$r_buff0_thd1~0_Out1903474534) (not .cse1)) (and .cse2 .cse1) (and .cse2 .cse0))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1903474534} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1903474534, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1903474534|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1903474534} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In260823075 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In260823075 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In260823075 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In260823075 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite8_Out260823075| ~z$r_buff1_thd1~0_In260823075)) (and (= 0 |P0Thread1of1ForFork1_#t~ite8_Out260823075|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out260823075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In260823075, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In260823075, ~z$w_buff1_used~0=~z$w_buff1_used~0_In260823075, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In260823075} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 15:20:53,180 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 15:20:53,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1825162012 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In1825162012 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1825162012 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| ~z$r_buff1_thd2~0_In1825162012)) (and (= |P1Thread1of1ForFork2_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1825162012, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1825162012, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1825162012, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out1825162012|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1825162012} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 15:20:53,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:20:53,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 15:20:53,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out439139011| |ULTIMATE.start_main_#t~ite47_Out439139011|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In439139011 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In439139011 256) 0))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z$w_buff1~0_In439139011) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~ite47_Out439139011| ~z~0_In439139011)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ~z~0=~z~0_In439139011} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In439139011, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out439139011|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In439139011, ~z$w_buff1~0=~z$w_buff1~0_In439139011, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out439139011|, ~z~0=~z~0_In439139011} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 15:20:53,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-24977062 256)))) (or (and (= ~z$w_buff0_used~0_In-24977062 |ULTIMATE.start_main_#t~ite49_Out-24977062|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out-24977062| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-24977062, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-24977062, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-24977062|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 15:20:53,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In10111743 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In10111743 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In10111743 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In10111743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out10111743|)) (and (= ~z$w_buff1_used~0_In10111743 |ULTIMATE.start_main_#t~ite50_Out10111743|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out10111743|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In10111743, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10111743, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In10111743, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10111743} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 15:20:53,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-380531429 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-380531429 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-380531429|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-380531429 |ULTIMATE.start_main_#t~ite51_Out-380531429|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-380531429, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-380531429|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-380531429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 15:20:53,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-1799265621 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1799265621 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1799265621 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1799265621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-1799265621|)) (and (or .cse3 .cse2) (= ~z$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite52_Out-1799265621|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-1799265621|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1799265621, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1799265621, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1799265621, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 15:20:53,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:20:53,249 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_3a6bb4b7-37bc-466a-a370-7785cb36bbdb/bin/utaipan/witness.graphml [2019-12-07 15:20:53,249 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:20:53,250 INFO L168 Benchmark]: Toolchain (without parser) took 172640.38 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 943.5 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,251 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:20:53,251 INFO L168 Benchmark]: CACSL2BoogieTranslator took 392.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -165.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,251 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.57 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,251 INFO L168 Benchmark]: Boogie Preprocessor took 26.07 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:20:53,252 INFO L168 Benchmark]: RCFGBuilder took 406.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,252 INFO L168 Benchmark]: TraceAbstraction took 171692.31 ms. Allocated memory was 1.2 GB in the beginning and 7.9 GB in the end (delta: 6.7 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,252 INFO L168 Benchmark]: Witness Printer took 81.48 ms. Allocated memory is still 7.9 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:20:53,254 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 392.22 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -165.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.57 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.07 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.82 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 171692.31 ms. Allocated memory was 1.2 GB in the beginning and 7.9 GB in the end (delta: 6.7 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 81.48 ms. Allocated memory is still 7.9 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 42.7 MB). Peak memory consumption was 42.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1318, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1319, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1320, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 171.5s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 63.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8114 SDtfs, 10414 SDslu, 40892 SDs, 0 SdLazy, 51582 SolverSat, 770 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 32.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 670 GetRequests, 51 SyntacticMatches, 24 SemanticMatches, 595 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4931 ImplicationChecksByTransitivity, 12.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 79.3s AutomataMinimizationTime, 31 MinimizatonAttempts, 323806 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 4.5s InterpolantComputationTime, 1517 NumberOfCodeBlocks, 1517 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1419 ConstructedInterpolants, 0 QuantifiedInterpolants, 598277 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...