./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix053_tso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix053_tso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3b2177d57090ed0cb996ff1637f1929a86099f24 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:21:42,877 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:21:42,879 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:21:42,886 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:21:42,886 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:21:42,887 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:21:42,888 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:21:42,889 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:21:42,890 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:21:42,891 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:21:42,892 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:21:42,892 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:21:42,893 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:21:42,893 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:21:42,894 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:21:42,895 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:21:42,895 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:21:42,896 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:21:42,897 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:21:42,899 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:21:42,900 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:21:42,900 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:21:42,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:21:42,901 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:21:42,903 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:21:42,903 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:21:42,903 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:21:42,904 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:21:42,904 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:21:42,905 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:21:42,905 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:21:42,905 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:21:42,906 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:21:42,906 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:21:42,907 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:21:42,907 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:21:42,907 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:21:42,907 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:21:42,908 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:21:42,908 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:21:42,909 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:21:42,909 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:21:42,919 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:21:42,919 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:21:42,920 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:21:42,920 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:21:42,920 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:21:42,920 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:21:42,920 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:21:42,920 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:21:42,921 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:21:42,921 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:21:42,922 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:21:42,922 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:21:42,923 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:21:42,923 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:21:42,924 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:21:42,924 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3b2177d57090ed0cb996ff1637f1929a86099f24 [2019-12-07 19:21:43,023 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:21:43,031 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:21:43,033 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:21:43,034 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:21:43,034 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:21:43,035 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix053_tso.oepc.i [2019-12-07 19:21:43,071 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/data/6b2570aae/17b9c6f8597c4a06b7aac578cb5d015f/FLAGe08beaa12 [2019-12-07 19:21:43,554 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:21:43,554 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/sv-benchmarks/c/pthread-wmm/mix053_tso.oepc.i [2019-12-07 19:21:43,564 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/data/6b2570aae/17b9c6f8597c4a06b7aac578cb5d015f/FLAGe08beaa12 [2019-12-07 19:21:44,057 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/data/6b2570aae/17b9c6f8597c4a06b7aac578cb5d015f [2019-12-07 19:21:44,060 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:21:44,061 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:21:44,061 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:21:44,062 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:21:44,064 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:21:44,065 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,067 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44, skipping insertion in model container [2019-12-07 19:21:44,067 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,073 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:21:44,103 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:21:44,344 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:21:44,352 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:21:44,395 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:21:44,441 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:21:44,441 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44 WrapperNode [2019-12-07 19:21:44,442 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:21:44,442 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:21:44,442 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:21:44,442 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:21:44,448 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,462 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,483 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:21:44,484 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:21:44,484 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:21:44,484 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:21:44,491 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,491 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,494 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,495 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,502 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,505 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,508 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... [2019-12-07 19:21:44,511 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:21:44,512 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:21:44,512 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:21:44,512 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:21:44,512 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:21:44,558 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:21:44,559 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:21:44,559 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:21:44,559 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:21:44,559 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:21:44,560 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 19:21:44,560 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 19:21:44,560 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:21:44,560 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:21:44,560 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:21:44,562 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:21:44,930 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:21:44,930 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:21:44,931 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:21:44 BoogieIcfgContainer [2019-12-07 19:21:44,931 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:21:44,932 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:21:44,932 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:21:44,934 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:21:44,934 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:21:44" (1/3) ... [2019-12-07 19:21:44,935 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2dfbc5a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:21:44, skipping insertion in model container [2019-12-07 19:21:44,935 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:21:44" (2/3) ... [2019-12-07 19:21:44,935 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2dfbc5a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:21:44, skipping insertion in model container [2019-12-07 19:21:44,935 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:21:44" (3/3) ... [2019-12-07 19:21:44,936 INFO L109 eAbstractionObserver]: Analyzing ICFG mix053_tso.oepc.i [2019-12-07 19:21:44,942 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:21:44,943 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:21:44,947 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:21:44,948 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,973 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,974 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,975 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,976 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,977 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,978 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,979 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,980 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,981 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,982 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,983 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,984 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,985 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,985 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,985 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:21:44,997 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 19:21:45,009 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:21:45,009 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:21:45,009 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:21:45,009 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:21:45,010 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:21:45,010 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:21:45,010 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:21:45,010 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:21:45,021 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 191 places, 225 transitions [2019-12-07 19:21:45,022 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 191 places, 225 transitions [2019-12-07 19:21:45,080 INFO L134 PetriNetUnfolder]: 47/221 cut-off events. [2019-12-07 19:21:45,080 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:21:45,091 INFO L76 FinitePrefix]: Finished finitePrefix Result has 234 conditions, 221 events. 47/221 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 578 event pairs. 12/184 useless extension candidates. Maximal degree in co-relation 190. Up to 2 conditions per place. [2019-12-07 19:21:45,106 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 191 places, 225 transitions [2019-12-07 19:21:45,138 INFO L134 PetriNetUnfolder]: 47/221 cut-off events. [2019-12-07 19:21:45,138 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:21:45,143 INFO L76 FinitePrefix]: Finished finitePrefix Result has 234 conditions, 221 events. 47/221 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 578 event pairs. 12/184 useless extension candidates. Maximal degree in co-relation 190. Up to 2 conditions per place. [2019-12-07 19:21:45,159 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 18432 [2019-12-07 19:21:45,159 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:21:48,115 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 19:21:48,222 INFO L206 etLargeBlockEncoding]: Checked pairs total: 90358 [2019-12-07 19:21:48,223 INFO L214 etLargeBlockEncoding]: Total number of compositions: 120 [2019-12-07 19:21:48,225 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 102 places, 111 transitions [2019-12-07 19:22:43,111 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 225010 states. [2019-12-07 19:22:43,113 INFO L276 IsEmpty]: Start isEmpty. Operand 225010 states. [2019-12-07 19:22:43,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 19:22:43,118 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:43,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:43,119 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:43,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:43,123 INFO L82 PathProgramCache]: Analyzing trace with hash -544334600, now seen corresponding path program 1 times [2019-12-07 19:22:43,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:43,130 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348585103] [2019-12-07 19:22:43,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:43,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:43,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:43,284 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348585103] [2019-12-07 19:22:43,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:43,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:22:43,285 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563669915] [2019-12-07 19:22:43,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:43,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:43,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:43,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:43,299 INFO L87 Difference]: Start difference. First operand 225010 states. Second operand 3 states. [2019-12-07 19:22:44,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:44,634 INFO L93 Difference]: Finished difference Result 224242 states and 1068870 transitions. [2019-12-07 19:22:44,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:44,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 19:22:44,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:48,269 INFO L225 Difference]: With dead ends: 224242 [2019-12-07 19:22:48,269 INFO L226 Difference]: Without dead ends: 219874 [2019-12-07 19:22:48,270 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:55,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219874 states. [2019-12-07 19:22:58,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219874 to 219874. [2019-12-07 19:22:58,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219874 states. [2019-12-07 19:23:00,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219874 states to 219874 states and 1048850 transitions. [2019-12-07 19:23:00,071 INFO L78 Accepts]: Start accepts. Automaton has 219874 states and 1048850 transitions. Word has length 7 [2019-12-07 19:23:00,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:00,073 INFO L462 AbstractCegarLoop]: Abstraction has 219874 states and 1048850 transitions. [2019-12-07 19:23:00,073 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:23:00,073 INFO L276 IsEmpty]: Start isEmpty. Operand 219874 states and 1048850 transitions. [2019-12-07 19:23:00,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 19:23:00,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:00,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:00,078 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:00,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:00,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1188084738, now seen corresponding path program 1 times [2019-12-07 19:23:00,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:00,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496909964] [2019-12-07 19:23:00,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:00,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:00,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:00,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496909964] [2019-12-07 19:23:00,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:00,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:00,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [903524089] [2019-12-07 19:23:00,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:00,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:00,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:00,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:00,156 INFO L87 Difference]: Start difference. First operand 219874 states and 1048850 transitions. Second operand 4 states. [2019-12-07 19:23:05,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:05,566 INFO L93 Difference]: Finished difference Result 353090 states and 1624232 transitions. [2019-12-07 19:23:05,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:05,567 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 19:23:05,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:06,547 INFO L225 Difference]: With dead ends: 353090 [2019-12-07 19:23:06,547 INFO L226 Difference]: Without dead ends: 352992 [2019-12-07 19:23:06,547 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:15,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352992 states. [2019-12-07 19:23:20,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352992 to 319358. [2019-12-07 19:23:20,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319358 states. [2019-12-07 19:23:22,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319358 states to 319358 states and 1483718 transitions. [2019-12-07 19:23:22,584 INFO L78 Accepts]: Start accepts. Automaton has 319358 states and 1483718 transitions. Word has length 13 [2019-12-07 19:23:22,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:22,585 INFO L462 AbstractCegarLoop]: Abstraction has 319358 states and 1483718 transitions. [2019-12-07 19:23:22,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:22,585 INFO L276 IsEmpty]: Start isEmpty. Operand 319358 states and 1483718 transitions. [2019-12-07 19:23:22,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 19:23:22,589 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:22,589 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:22,589 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:22,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:22,590 INFO L82 PathProgramCache]: Analyzing trace with hash 1434409872, now seen corresponding path program 1 times [2019-12-07 19:23:22,590 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:22,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005295395] [2019-12-07 19:23:22,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:22,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:22,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:22,649 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005295395] [2019-12-07 19:23:22,649 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:22,649 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:22,649 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [409827231] [2019-12-07 19:23:22,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:22,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:22,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:22,650 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:22,650 INFO L87 Difference]: Start difference. First operand 319358 states and 1483718 transitions. Second operand 4 states. [2019-12-07 19:23:29,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:29,067 INFO L93 Difference]: Finished difference Result 402462 states and 1845978 transitions. [2019-12-07 19:23:29,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:29,067 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 19:23:29,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:30,339 INFO L225 Difference]: With dead ends: 402462 [2019-12-07 19:23:30,339 INFO L226 Difference]: Without dead ends: 402462 [2019-12-07 19:23:30,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:23:40,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 402462 states. [2019-12-07 19:23:46,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 402462 to 357810. [2019-12-07 19:23:46,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357810 states. [2019-12-07 19:23:47,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357810 states to 357810 states and 1654236 transitions. [2019-12-07 19:23:47,353 INFO L78 Accepts]: Start accepts. Automaton has 357810 states and 1654236 transitions. Word has length 15 [2019-12-07 19:23:47,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:23:47,354 INFO L462 AbstractCegarLoop]: Abstraction has 357810 states and 1654236 transitions. [2019-12-07 19:23:47,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:23:47,354 INFO L276 IsEmpty]: Start isEmpty. Operand 357810 states and 1654236 transitions. [2019-12-07 19:23:47,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 19:23:47,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:23:47,358 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:23:47,358 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:23:47,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:23:47,358 INFO L82 PathProgramCache]: Analyzing trace with hash -784300791, now seen corresponding path program 1 times [2019-12-07 19:23:47,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:23:47,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875159193] [2019-12-07 19:23:47,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:23:47,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:23:47,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:23:47,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875159193] [2019-12-07 19:23:47,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:23:47,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:23:47,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200898899] [2019-12-07 19:23:47,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:23:47,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:23:47,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:23:47,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:23:47,417 INFO L87 Difference]: Start difference. First operand 357810 states and 1654236 transitions. Second operand 4 states. [2019-12-07 19:23:55,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:23:55,361 INFO L93 Difference]: Finished difference Result 493966 states and 2247286 transitions. [2019-12-07 19:23:55,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:23:55,362 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 19:23:55,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:23:56,812 INFO L225 Difference]: With dead ends: 493966 [2019-12-07 19:23:56,812 INFO L226 Difference]: Without dead ends: 493840 [2019-12-07 19:23:56,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:24:08,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 493840 states. [2019-12-07 19:24:15,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 493840 to 401172. [2019-12-07 19:24:15,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 401172 states. [2019-12-07 19:24:17,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401172 states to 401172 states and 1852715 transitions. [2019-12-07 19:24:17,426 INFO L78 Accepts]: Start accepts. Automaton has 401172 states and 1852715 transitions. Word has length 15 [2019-12-07 19:24:17,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:17,427 INFO L462 AbstractCegarLoop]: Abstraction has 401172 states and 1852715 transitions. [2019-12-07 19:24:17,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:24:17,427 INFO L276 IsEmpty]: Start isEmpty. Operand 401172 states and 1852715 transitions. [2019-12-07 19:24:17,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:24:17,463 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:17,464 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:17,464 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:17,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:17,464 INFO L82 PathProgramCache]: Analyzing trace with hash -163146082, now seen corresponding path program 1 times [2019-12-07 19:24:17,464 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:17,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1930233733] [2019-12-07 19:24:17,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:17,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:17,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:17,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1930233733] [2019-12-07 19:24:17,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:17,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:24:17,496 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849517247] [2019-12-07 19:24:17,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:24:17,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:17,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:24:17,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:24:17,496 INFO L87 Difference]: Start difference. First operand 401172 states and 1852715 transitions. Second operand 3 states. [2019-12-07 19:24:18,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:18,560 INFO L93 Difference]: Finished difference Result 239067 states and 988791 transitions. [2019-12-07 19:24:18,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:24:18,560 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21 [2019-12-07 19:24:18,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:19,185 INFO L225 Difference]: With dead ends: 239067 [2019-12-07 19:24:19,185 INFO L226 Difference]: Without dead ends: 239067 [2019-12-07 19:24:19,186 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:24:28,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239067 states. [2019-12-07 19:24:31,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239067 to 239067. [2019-12-07 19:24:31,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239067 states. [2019-12-07 19:24:32,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239067 states to 239067 states and 988791 transitions. [2019-12-07 19:24:32,522 INFO L78 Accepts]: Start accepts. Automaton has 239067 states and 988791 transitions. Word has length 21 [2019-12-07 19:24:32,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:32,522 INFO L462 AbstractCegarLoop]: Abstraction has 239067 states and 988791 transitions. [2019-12-07 19:24:32,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:24:32,523 INFO L276 IsEmpty]: Start isEmpty. Operand 239067 states and 988791 transitions. [2019-12-07 19:24:32,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:24:32,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:32,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:32,537 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:32,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:32,537 INFO L82 PathProgramCache]: Analyzing trace with hash -1235283117, now seen corresponding path program 1 times [2019-12-07 19:24:32,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:32,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142542067] [2019-12-07 19:24:32,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:32,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:32,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:32,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142542067] [2019-12-07 19:24:32,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:32,592 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:24:32,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [361229147] [2019-12-07 19:24:32,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:24:32,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:32,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:24:32,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:24:32,592 INFO L87 Difference]: Start difference. First operand 239067 states and 988791 transitions. Second operand 5 states. [2019-12-07 19:24:35,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:35,095 INFO L93 Difference]: Finished difference Result 344687 states and 1395043 transitions. [2019-12-07 19:24:35,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:24:35,096 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 19:24:35,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:35,934 INFO L225 Difference]: With dead ends: 344687 [2019-12-07 19:24:35,934 INFO L226 Difference]: Without dead ends: 344534 [2019-12-07 19:24:35,935 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:24:44,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344534 states. [2019-12-07 19:24:48,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344534 to 257808. [2019-12-07 19:24:48,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257808 states. [2019-12-07 19:24:50,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257808 states to 257808 states and 1061555 transitions. [2019-12-07 19:24:50,014 INFO L78 Accepts]: Start accepts. Automaton has 257808 states and 1061555 transitions. Word has length 21 [2019-12-07 19:24:50,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:24:50,014 INFO L462 AbstractCegarLoop]: Abstraction has 257808 states and 1061555 transitions. [2019-12-07 19:24:50,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:24:50,014 INFO L276 IsEmpty]: Start isEmpty. Operand 257808 states and 1061555 transitions. [2019-12-07 19:24:50,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:24:50,030 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:24:50,031 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:24:50,031 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:24:50,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:24:50,031 INFO L82 PathProgramCache]: Analyzing trace with hash -1211687890, now seen corresponding path program 1 times [2019-12-07 19:24:50,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:24:50,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585962930] [2019-12-07 19:24:50,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:24:50,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:24:50,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:24:50,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585962930] [2019-12-07 19:24:50,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:24:50,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:24:50,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1271036108] [2019-12-07 19:24:50,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:24:50,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:24:50,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:24:50,103 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:24:50,103 INFO L87 Difference]: Start difference. First operand 257808 states and 1061555 transitions. Second operand 5 states. [2019-12-07 19:24:52,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:24:52,545 INFO L93 Difference]: Finished difference Result 366979 states and 1481993 transitions. [2019-12-07 19:24:52,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:24:52,546 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:24:52,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:24:53,438 INFO L225 Difference]: With dead ends: 366979 [2019-12-07 19:24:53,439 INFO L226 Difference]: Without dead ends: 366916 [2019-12-07 19:24:53,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:24:59,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366916 states. [2019-12-07 19:25:07,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366916 to 265010. [2019-12-07 19:25:07,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265010 states. [2019-12-07 19:25:08,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265010 states to 265010 states and 1089715 transitions. [2019-12-07 19:25:08,288 INFO L78 Accepts]: Start accepts. Automaton has 265010 states and 1089715 transitions. Word has length 22 [2019-12-07 19:25:08,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:08,289 INFO L462 AbstractCegarLoop]: Abstraction has 265010 states and 1089715 transitions. [2019-12-07 19:25:08,289 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:25:08,289 INFO L276 IsEmpty]: Start isEmpty. Operand 265010 states and 1089715 transitions. [2019-12-07 19:25:08,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 19:25:08,306 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:08,306 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:08,306 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:08,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:08,307 INFO L82 PathProgramCache]: Analyzing trace with hash -1332793814, now seen corresponding path program 1 times [2019-12-07 19:25:08,307 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:08,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157420908] [2019-12-07 19:25:08,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:08,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:08,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:08,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157420908] [2019-12-07 19:25:08,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:08,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:08,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806782486] [2019-12-07 19:25:08,360 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:08,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:08,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:08,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:08,360 INFO L87 Difference]: Start difference. First operand 265010 states and 1089715 transitions. Second operand 5 states. [2019-12-07 19:25:10,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:10,789 INFO L93 Difference]: Finished difference Result 383540 states and 1549952 transitions. [2019-12-07 19:25:10,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:25:10,790 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 19:25:10,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:11,736 INFO L225 Difference]: With dead ends: 383540 [2019-12-07 19:25:11,736 INFO L226 Difference]: Without dead ends: 383477 [2019-12-07 19:25:11,736 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:25:18,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383477 states. [2019-12-07 19:25:23,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383477 to 285834. [2019-12-07 19:25:23,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285834 states. [2019-12-07 19:25:23,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285834 states to 285834 states and 1173508 transitions. [2019-12-07 19:25:23,955 INFO L78 Accepts]: Start accepts. Automaton has 285834 states and 1173508 transitions. Word has length 22 [2019-12-07 19:25:23,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:23,955 INFO L462 AbstractCegarLoop]: Abstraction has 285834 states and 1173508 transitions. [2019-12-07 19:25:23,956 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:25:23,956 INFO L276 IsEmpty]: Start isEmpty. Operand 285834 states and 1173508 transitions. [2019-12-07 19:25:24,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 19:25:24,027 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:24,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:24,028 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:24,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:24,028 INFO L82 PathProgramCache]: Analyzing trace with hash -1835074888, now seen corresponding path program 1 times [2019-12-07 19:25:24,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:24,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345998618] [2019-12-07 19:25:24,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:24,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:24,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:24,106 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [345998618] [2019-12-07 19:25:24,106 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:24,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:25:24,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998549127] [2019-12-07 19:25:24,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:25:24,107 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:24,107 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:25:24,107 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:25:24,107 INFO L87 Difference]: Start difference. First operand 285834 states and 1173508 transitions. Second operand 6 states. [2019-12-07 19:25:26,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:26,741 INFO L93 Difference]: Finished difference Result 345403 states and 1402477 transitions. [2019-12-07 19:25:26,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 19:25:26,741 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2019-12-07 19:25:26,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:31,554 INFO L225 Difference]: With dead ends: 345403 [2019-12-07 19:25:31,554 INFO L226 Difference]: Without dead ends: 345250 [2019-12-07 19:25:31,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2019-12-07 19:25:37,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345250 states. [2019-12-07 19:25:41,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345250 to 240504. [2019-12-07 19:25:41,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240504 states. [2019-12-07 19:25:41,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240504 states to 240504 states and 992647 transitions. [2019-12-07 19:25:41,852 INFO L78 Accepts]: Start accepts. Automaton has 240504 states and 992647 transitions. Word has length 28 [2019-12-07 19:25:41,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:41,852 INFO L462 AbstractCegarLoop]: Abstraction has 240504 states and 992647 transitions. [2019-12-07 19:25:41,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:25:41,852 INFO L276 IsEmpty]: Start isEmpty. Operand 240504 states and 992647 transitions. [2019-12-07 19:25:41,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 19:25:41,932 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:41,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:41,932 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:41,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:41,932 INFO L82 PathProgramCache]: Analyzing trace with hash -131600772, now seen corresponding path program 1 times [2019-12-07 19:25:41,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:41,933 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233154243] [2019-12-07 19:25:41,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:41,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:41,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:41,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233154243] [2019-12-07 19:25:41,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:41,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:41,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689711182] [2019-12-07 19:25:41,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:25:41,960 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:41,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:25:41,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:25:41,960 INFO L87 Difference]: Start difference. First operand 240504 states and 992647 transitions. Second operand 3 states. [2019-12-07 19:25:43,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:43,653 INFO L93 Difference]: Finished difference Result 291839 states and 1194093 transitions. [2019-12-07 19:25:43,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:25:43,654 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 19:25:43,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:44,415 INFO L225 Difference]: With dead ends: 291839 [2019-12-07 19:25:44,415 INFO L226 Difference]: Without dead ends: 291839 [2019-12-07 19:25:44,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:25:50,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291839 states. [2019-12-07 19:25:53,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291839 to 259445. [2019-12-07 19:25:53,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259445 states. [2019-12-07 19:25:54,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259445 states to 259445 states and 1069207 transitions. [2019-12-07 19:25:54,911 INFO L78 Accepts]: Start accepts. Automaton has 259445 states and 1069207 transitions. Word has length 30 [2019-12-07 19:25:54,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:54,911 INFO L462 AbstractCegarLoop]: Abstraction has 259445 states and 1069207 transitions. [2019-12-07 19:25:54,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:25:54,911 INFO L276 IsEmpty]: Start isEmpty. Operand 259445 states and 1069207 transitions. [2019-12-07 19:25:54,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 19:25:54,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:54,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:54,993 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:54,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:54,994 INFO L82 PathProgramCache]: Analyzing trace with hash -131863869, now seen corresponding path program 1 times [2019-12-07 19:25:54,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:54,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490902794] [2019-12-07 19:25:54,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:55,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:55,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:55,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [490902794] [2019-12-07 19:25:55,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:55,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:25:55,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057141878] [2019-12-07 19:25:55,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:25:55,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:55,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:25:55,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:25:55,027 INFO L87 Difference]: Start difference. First operand 259445 states and 1069207 transitions. Second operand 4 states. [2019-12-07 19:25:55,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:55,193 INFO L93 Difference]: Finished difference Result 52118 states and 170735 transitions. [2019-12-07 19:25:55,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:25:55,194 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 19:25:55,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:55,279 INFO L225 Difference]: With dead ends: 52118 [2019-12-07 19:25:55,279 INFO L226 Difference]: Without dead ends: 52118 [2019-12-07 19:25:55,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:25:55,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52118 states. [2019-12-07 19:25:56,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52118 to 52118. [2019-12-07 19:25:56,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52118 states. [2019-12-07 19:25:56,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52118 states to 52118 states and 170735 transitions. [2019-12-07 19:25:56,162 INFO L78 Accepts]: Start accepts. Automaton has 52118 states and 170735 transitions. Word has length 30 [2019-12-07 19:25:56,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:56,162 INFO L462 AbstractCegarLoop]: Abstraction has 52118 states and 170735 transitions. [2019-12-07 19:25:56,163 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:25:56,163 INFO L276 IsEmpty]: Start isEmpty. Operand 52118 states and 170735 transitions. [2019-12-07 19:25:56,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:25:56,192 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:56,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:56,192 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:56,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:56,193 INFO L82 PathProgramCache]: Analyzing trace with hash -594657416, now seen corresponding path program 1 times [2019-12-07 19:25:56,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:56,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1654813644] [2019-12-07 19:25:56,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:56,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:56,265 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:56,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1654813644] [2019-12-07 19:25:56,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:56,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:25:56,265 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965849728] [2019-12-07 19:25:56,266 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:25:56,266 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:56,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:25:56,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:25:56,266 INFO L87 Difference]: Start difference. First operand 52118 states and 170735 transitions. Second operand 6 states. [2019-12-07 19:25:57,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:57,897 INFO L93 Difference]: Finished difference Result 67808 states and 217869 transitions. [2019-12-07 19:25:57,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:25:57,898 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 19:25:57,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:58,003 INFO L225 Difference]: With dead ends: 67808 [2019-12-07 19:25:58,003 INFO L226 Difference]: Without dead ends: 67793 [2019-12-07 19:25:58,004 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:25:58,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67793 states. [2019-12-07 19:25:58,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67793 to 54149. [2019-12-07 19:25:58,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54149 states. [2019-12-07 19:25:59,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54149 states to 54149 states and 177059 transitions. [2019-12-07 19:25:59,019 INFO L78 Accepts]: Start accepts. Automaton has 54149 states and 177059 transitions. Word has length 42 [2019-12-07 19:25:59,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:59,019 INFO L462 AbstractCegarLoop]: Abstraction has 54149 states and 177059 transitions. [2019-12-07 19:25:59,019 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:25:59,019 INFO L276 IsEmpty]: Start isEmpty. Operand 54149 states and 177059 transitions. [2019-12-07 19:25:59,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 19:25:59,058 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:59,059 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:59,059 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:59,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:59,059 INFO L82 PathProgramCache]: Analyzing trace with hash 738774355, now seen corresponding path program 1 times [2019-12-07 19:25:59,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:59,059 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348326149] [2019-12-07 19:25:59,059 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:59,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:59,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:59,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348326149] [2019-12-07 19:25:59,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:59,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:25:59,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740633507] [2019-12-07 19:25:59,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:59,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:59,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:59,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:59,096 INFO L87 Difference]: Start difference. First operand 54149 states and 177059 transitions. Second operand 5 states. [2019-12-07 19:25:59,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:59,149 INFO L93 Difference]: Finished difference Result 13513 states and 42331 transitions. [2019-12-07 19:25:59,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:25:59,150 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 19:25:59,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:59,168 INFO L225 Difference]: With dead ends: 13513 [2019-12-07 19:25:59,168 INFO L226 Difference]: Without dead ends: 13513 [2019-12-07 19:25:59,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:59,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13513 states. [2019-12-07 19:25:59,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13513 to 13289. [2019-12-07 19:25:59,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13289 states. [2019-12-07 19:25:59,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13289 states to 13289 states and 41579 transitions. [2019-12-07 19:25:59,361 INFO L78 Accepts]: Start accepts. Automaton has 13289 states and 41579 transitions. Word has length 42 [2019-12-07 19:25:59,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:59,362 INFO L462 AbstractCegarLoop]: Abstraction has 13289 states and 41579 transitions. [2019-12-07 19:25:59,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:25:59,362 INFO L276 IsEmpty]: Start isEmpty. Operand 13289 states and 41579 transitions. [2019-12-07 19:25:59,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 19:25:59,375 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:59,375 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:59,375 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:59,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:59,376 INFO L82 PathProgramCache]: Analyzing trace with hash -468002537, now seen corresponding path program 1 times [2019-12-07 19:25:59,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:59,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433078683] [2019-12-07 19:25:59,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:59,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:59,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433078683] [2019-12-07 19:25:59,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:59,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:25:59,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128807277] [2019-12-07 19:25:59,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:25:59,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:59,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:25:59,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:25:59,424 INFO L87 Difference]: Start difference. First operand 13289 states and 41579 transitions. Second operand 6 states. [2019-12-07 19:25:59,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:59,474 INFO L93 Difference]: Finished difference Result 10398 states and 34991 transitions. [2019-12-07 19:25:59,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:25:59,474 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-12-07 19:25:59,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:59,487 INFO L225 Difference]: With dead ends: 10398 [2019-12-07 19:25:59,487 INFO L226 Difference]: Without dead ends: 10398 [2019-12-07 19:25:59,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:25:59,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10398 states. [2019-12-07 19:25:59,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10398 to 9306. [2019-12-07 19:25:59,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9306 states. [2019-12-07 19:25:59,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9306 states to 9306 states and 31465 transitions. [2019-12-07 19:25:59,630 INFO L78 Accepts]: Start accepts. Automaton has 9306 states and 31465 transitions. Word has length 54 [2019-12-07 19:25:59,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:25:59,630 INFO L462 AbstractCegarLoop]: Abstraction has 9306 states and 31465 transitions. [2019-12-07 19:25:59,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:25:59,630 INFO L276 IsEmpty]: Start isEmpty. Operand 9306 states and 31465 transitions. [2019-12-07 19:25:59,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 19:25:59,639 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:25:59,639 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:25:59,639 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:25:59,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:25:59,639 INFO L82 PathProgramCache]: Analyzing trace with hash 1420682600, now seen corresponding path program 1 times [2019-12-07 19:25:59,639 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:25:59,639 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181433543] [2019-12-07 19:25:59,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:25:59,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:25:59,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:25:59,692 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181433543] [2019-12-07 19:25:59,692 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:25:59,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:25:59,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134318857] [2019-12-07 19:25:59,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:25:59,693 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:25:59,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:25:59,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:25:59,693 INFO L87 Difference]: Start difference. First operand 9306 states and 31465 transitions. Second operand 5 states. [2019-12-07 19:25:59,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:25:59,900 INFO L93 Difference]: Finished difference Result 14113 states and 47370 transitions. [2019-12-07 19:25:59,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:25:59,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2019-12-07 19:25:59,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:25:59,919 INFO L225 Difference]: With dead ends: 14113 [2019-12-07 19:25:59,920 INFO L226 Difference]: Without dead ends: 14113 [2019-12-07 19:25:59,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:25:59,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14113 states. [2019-12-07 19:26:00,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14113 to 12489. [2019-12-07 19:26:00,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12489 states. [2019-12-07 19:26:00,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12489 states to 12489 states and 42076 transitions. [2019-12-07 19:26:00,167 INFO L78 Accepts]: Start accepts. Automaton has 12489 states and 42076 transitions. Word has length 68 [2019-12-07 19:26:00,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:00,167 INFO L462 AbstractCegarLoop]: Abstraction has 12489 states and 42076 transitions. [2019-12-07 19:26:00,167 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:26:00,167 INFO L276 IsEmpty]: Start isEmpty. Operand 12489 states and 42076 transitions. [2019-12-07 19:26:00,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 19:26:00,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:00,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:00,181 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:00,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:00,182 INFO L82 PathProgramCache]: Analyzing trace with hash -1734766032, now seen corresponding path program 2 times [2019-12-07 19:26:00,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:00,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738425967] [2019-12-07 19:26:00,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:00,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:00,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:00,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738425967] [2019-12-07 19:26:00,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:00,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:00,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1226350369] [2019-12-07 19:26:00,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:00,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:00,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:00,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,248 INFO L87 Difference]: Start difference. First operand 12489 states and 42076 transitions. Second operand 3 states. [2019-12-07 19:26:00,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:00,290 INFO L93 Difference]: Finished difference Result 12489 states and 41566 transitions. [2019-12-07 19:26:00,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:00,291 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2019-12-07 19:26:00,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:00,308 INFO L225 Difference]: With dead ends: 12489 [2019-12-07 19:26:00,308 INFO L226 Difference]: Without dead ends: 12489 [2019-12-07 19:26:00,308 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12489 states. [2019-12-07 19:26:00,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12489 to 12177. [2019-12-07 19:26:00,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12177 states. [2019-12-07 19:26:00,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12177 states to 12177 states and 40550 transitions. [2019-12-07 19:26:00,488 INFO L78 Accepts]: Start accepts. Automaton has 12177 states and 40550 transitions. Word has length 68 [2019-12-07 19:26:00,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:00,488 INFO L462 AbstractCegarLoop]: Abstraction has 12177 states and 40550 transitions. [2019-12-07 19:26:00,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:00,489 INFO L276 IsEmpty]: Start isEmpty. Operand 12177 states and 40550 transitions. [2019-12-07 19:26:00,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-07 19:26:00,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:00,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:00,502 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:00,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:00,502 INFO L82 PathProgramCache]: Analyzing trace with hash -361290589, now seen corresponding path program 1 times [2019-12-07 19:26:00,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:00,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088428835] [2019-12-07 19:26:00,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:00,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:00,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:00,560 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088428835] [2019-12-07 19:26:00,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:00,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:00,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956548920] [2019-12-07 19:26:00,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:00,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:00,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:00,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,561 INFO L87 Difference]: Start difference. First operand 12177 states and 40550 transitions. Second operand 3 states. [2019-12-07 19:26:00,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:00,599 INFO L93 Difference]: Finished difference Result 11575 states and 38093 transitions. [2019-12-07 19:26:00,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:00,599 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-12-07 19:26:00,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:00,613 INFO L225 Difference]: With dead ends: 11575 [2019-12-07 19:26:00,613 INFO L226 Difference]: Without dead ends: 11575 [2019-12-07 19:26:00,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11575 states. [2019-12-07 19:26:00,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11575 to 10903. [2019-12-07 19:26:00,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10903 states. [2019-12-07 19:26:00,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10903 states to 10903 states and 35901 transitions. [2019-12-07 19:26:00,774 INFO L78 Accepts]: Start accepts. Automaton has 10903 states and 35901 transitions. Word has length 69 [2019-12-07 19:26:00,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:00,774 INFO L462 AbstractCegarLoop]: Abstraction has 10903 states and 35901 transitions. [2019-12-07 19:26:00,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:00,774 INFO L276 IsEmpty]: Start isEmpty. Operand 10903 states and 35901 transitions. [2019-12-07 19:26:00,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 19:26:00,784 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:00,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:00,785 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:00,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:00,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1688370102, now seen corresponding path program 1 times [2019-12-07 19:26:00,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:00,785 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966861340] [2019-12-07 19:26:00,785 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:00,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:00,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:00,823 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966861340] [2019-12-07 19:26:00,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:00,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:26:00,824 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667425854] [2019-12-07 19:26:00,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:26:00,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:00,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:26:00,824 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,824 INFO L87 Difference]: Start difference. First operand 10903 states and 35901 transitions. Second operand 3 states. [2019-12-07 19:26:00,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:00,885 INFO L93 Difference]: Finished difference Result 10902 states and 35899 transitions. [2019-12-07 19:26:00,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:26:00,886 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 70 [2019-12-07 19:26:00,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:00,904 INFO L225 Difference]: With dead ends: 10902 [2019-12-07 19:26:00,904 INFO L226 Difference]: Without dead ends: 10902 [2019-12-07 19:26:00,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:26:00,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10902 states. [2019-12-07 19:26:01,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10902 to 8801. [2019-12-07 19:26:01,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8801 states. [2019-12-07 19:26:01,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8801 states to 8801 states and 29017 transitions. [2019-12-07 19:26:01,074 INFO L78 Accepts]: Start accepts. Automaton has 8801 states and 29017 transitions. Word has length 70 [2019-12-07 19:26:01,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:01,074 INFO L462 AbstractCegarLoop]: Abstraction has 8801 states and 29017 transitions. [2019-12-07 19:26:01,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:26:01,074 INFO L276 IsEmpty]: Start isEmpty. Operand 8801 states and 29017 transitions. [2019-12-07 19:26:01,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 19:26:01,082 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:01,083 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:01,083 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:01,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:01,083 INFO L82 PathProgramCache]: Analyzing trace with hash -784379321, now seen corresponding path program 1 times [2019-12-07 19:26:01,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:01,083 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1882928035] [2019-12-07 19:26:01,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:01,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:01,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:01,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1882928035] [2019-12-07 19:26:01,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:01,255 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 19:26:01,255 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2105005756] [2019-12-07 19:26:01,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 19:26:01,255 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:01,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 19:26:01,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2019-12-07 19:26:01,255 INFO L87 Difference]: Start difference. First operand 8801 states and 29017 transitions. Second operand 13 states. [2019-12-07 19:26:01,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:01,615 INFO L93 Difference]: Finished difference Result 19475 states and 61954 transitions. [2019-12-07 19:26:01,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 19:26:01,615 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 71 [2019-12-07 19:26:01,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:01,636 INFO L225 Difference]: With dead ends: 19475 [2019-12-07 19:26:01,636 INFO L226 Difference]: Without dead ends: 18081 [2019-12-07 19:26:01,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=147, Invalid=555, Unknown=0, NotChecked=0, Total=702 [2019-12-07 19:26:01,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18081 states. [2019-12-07 19:26:01,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18081 to 11455. [2019-12-07 19:26:01,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11455 states. [2019-12-07 19:26:01,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11455 states to 11455 states and 37587 transitions. [2019-12-07 19:26:01,847 INFO L78 Accepts]: Start accepts. Automaton has 11455 states and 37587 transitions. Word has length 71 [2019-12-07 19:26:01,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:01,847 INFO L462 AbstractCegarLoop]: Abstraction has 11455 states and 37587 transitions. [2019-12-07 19:26:01,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 19:26:01,847 INFO L276 IsEmpty]: Start isEmpty. Operand 11455 states and 37587 transitions. [2019-12-07 19:26:01,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 19:26:01,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:01,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:01,859 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:01,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:01,859 INFO L82 PathProgramCache]: Analyzing trace with hash -387936823, now seen corresponding path program 2 times [2019-12-07 19:26:01,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:01,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628075232] [2019-12-07 19:26:01,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:01,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:01,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:01,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628075232] [2019-12-07 19:26:01,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:01,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:26:01,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [549359383] [2019-12-07 19:26:01,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:26:01,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:01,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:26:01,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:26:01,922 INFO L87 Difference]: Start difference. First operand 11455 states and 37587 transitions. Second operand 6 states. [2019-12-07 19:26:01,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:01,991 INFO L93 Difference]: Finished difference Result 16324 states and 51033 transitions. [2019-12-07 19:26:01,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:26:01,991 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-12-07 19:26:01,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:02,003 INFO L225 Difference]: With dead ends: 16324 [2019-12-07 19:26:02,004 INFO L226 Difference]: Without dead ends: 10560 [2019-12-07 19:26:02,004 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:26:02,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10560 states. [2019-12-07 19:26:02,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10560 to 10560. [2019-12-07 19:26:02,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10560 states. [2019-12-07 19:26:02,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10560 states to 10560 states and 34144 transitions. [2019-12-07 19:26:02,147 INFO L78 Accepts]: Start accepts. Automaton has 10560 states and 34144 transitions. Word has length 71 [2019-12-07 19:26:02,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:02,147 INFO L462 AbstractCegarLoop]: Abstraction has 10560 states and 34144 transitions. [2019-12-07 19:26:02,147 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:26:02,147 INFO L276 IsEmpty]: Start isEmpty. Operand 10560 states and 34144 transitions. [2019-12-07 19:26:02,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 19:26:02,157 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:02,157 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:02,157 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:02,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:02,157 INFO L82 PathProgramCache]: Analyzing trace with hash 1178824359, now seen corresponding path program 3 times [2019-12-07 19:26:02,157 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:02,157 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576357400] [2019-12-07 19:26:02,157 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:02,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:26:02,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:26:02,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576357400] [2019-12-07 19:26:02,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:26:02,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:26:02,239 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [159312392] [2019-12-07 19:26:02,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 19:26:02,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:26:02,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 19:26:02,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:26:02,240 INFO L87 Difference]: Start difference. First operand 10560 states and 34144 transitions. Second operand 7 states. [2019-12-07 19:26:02,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:26:02,361 INFO L93 Difference]: Finished difference Result 21864 states and 69306 transitions. [2019-12-07 19:26:02,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 19:26:02,361 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 71 [2019-12-07 19:26:02,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:26:02,373 INFO L225 Difference]: With dead ends: 21864 [2019-12-07 19:26:02,373 INFO L226 Difference]: Without dead ends: 11678 [2019-12-07 19:26:02,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 19:26:02,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11678 states. [2019-12-07 19:26:02,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11678 to 8174. [2019-12-07 19:26:02,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8174 states. [2019-12-07 19:26:02,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8174 states to 8174 states and 26227 transitions. [2019-12-07 19:26:02,569 INFO L78 Accepts]: Start accepts. Automaton has 8174 states and 26227 transitions. Word has length 71 [2019-12-07 19:26:02,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:26:02,570 INFO L462 AbstractCegarLoop]: Abstraction has 8174 states and 26227 transitions. [2019-12-07 19:26:02,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 19:26:02,570 INFO L276 IsEmpty]: Start isEmpty. Operand 8174 states and 26227 transitions. [2019-12-07 19:26:02,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-07 19:26:02,578 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:26:02,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:26:02,578 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:26:02,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:26:02,578 INFO L82 PathProgramCache]: Analyzing trace with hash -710173609, now seen corresponding path program 4 times [2019-12-07 19:26:02,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:26:02,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [885642489] [2019-12-07 19:26:02,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:26:02,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:26:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:26:02,663 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:26:02,663 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:26:02,665 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_77| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~y$r_buff1_thd3~0_186) (< 0 |v_#StackHeapBarrier_23|) (= v_~y$w_buff1_used~0_459 0) (= 0 v_~__unbuffered_p2_EAX~0_128) (= 0 v_~y$w_buff0~0_224) (= v_~a~0_40 0) (= 0 v_~y$r_buff0_thd3~0_213) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1433~0.base_27|)) (= v_~main$tmp_guard0~0_34 0) (= v_~y$r_buff0_thd1~0_40 0) (= v_~y$w_buff1~0_177 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1433~0.base_27| 1) |v_#valid_75|) (= 0 v_~y$r_buff1_thd2~0_203) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~y$r_buff1_thd4~0_197) (= v_~y$read_delayed~0_6 0) (= v_~y$mem_tmp~0_18 0) (= |v_ULTIMATE.start_main_~#t1433~0.offset_21| 0) (= v_~y$r_buff1_thd0~0_278 0) (= v_~y$r_buff0_thd0~0_327 0) (= v_~y$r_buff1_thd1~0_121 0) (< |v_#StackHeapBarrier_23| |v_ULTIMATE.start_main_~#t1433~0.base_27|) (= v_~z~0_47 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p3_EAX~0_23) (= v_~y~0_186 0) (= v_~x~0_50 0) (= v_~weak$$choice2~0_123 0) (= |v_#NULL.offset_4| 0) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t1433~0.base_27| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t1433~0.base_27|) |v_ULTIMATE.start_main_~#t1433~0.offset_21| 0)) |v_#memory_int_29|) (= v_~y$w_buff0_used~0_726 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_13) (= v_~__unbuffered_cnt~0_227 0) (= |v_#length_33| (store |v_#length_34| |v_ULTIMATE.start_main_~#t1433~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_133) (= 0 v_~y$r_buff0_thd4~0_116) (= 0 v_~y$flush_delayed~0_34))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_23|, #valid=|v_#valid_77|, #memory_int=|v_#memory_int_30|, #length=|v_#length_34|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_22|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_126|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_18|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_67|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_186, ULTIMATE.start_main_~#t1433~0.offset=|v_ULTIMATE.start_main_~#t1433~0.offset_21|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_40, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, #length=|v_#length_33|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_128, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_41|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_36|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_22|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_60|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_23|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_45|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_197, ULTIMATE.start_main_~#t1436~0.base=|v_ULTIMATE.start_main_~#t1436~0.base_21|, ~y$w_buff1~0=v_~y$w_buff1~0_177, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t1436~0.offset=|v_ULTIMATE.start_main_~#t1436~0.offset_17|, ULTIMATE.start_main_~#t1435~0.offset=|v_ULTIMATE.start_main_~#t1435~0.offset_18|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_227, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_278, ~x~0=v_~x~0_50, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_22|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1434~0.offset=|v_ULTIMATE.start_main_~#t1434~0.offset_21|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_726, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_32|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_36|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_53|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_26|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_67|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_121, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~y$w_buff0~0=v_~y$w_buff0~0_224, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_213, ~y~0=v_~y~0_186, ULTIMATE.start_main_~#t1435~0.base=|v_ULTIMATE.start_main_~#t1435~0.base_23|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_10|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_35|, ULTIMATE.start_main_~#t1434~0.base=|v_ULTIMATE.start_main_~#t1434~0.base_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_35|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_34, ULTIMATE.start_main_~#t1433~0.base=|v_ULTIMATE.start_main_~#t1433~0.base_27|, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_33|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_104|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_203, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_116, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_327, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_29|, ~z~0=v_~z~0_47, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_459} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t1433~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$r_buff1_thd4~0, ULTIMATE.start_main_~#t1436~0.base, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1436~0.offset, ULTIMATE.start_main_~#t1435~0.offset, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1434~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1435~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1434~0.base, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1433~0.base, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:26:02,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L828-1-->L830: Formula: (and (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1434~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1434~0.base_13|) |v_ULTIMATE.start_main_~#t1434~0.offset_11| 1)) |v_#memory_int_19|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1434~0.base_13| 4) |v_#length_23|) (= |v_ULTIMATE.start_main_~#t1434~0.offset_11| 0) (= 0 (select |v_#valid_51| |v_ULTIMATE.start_main_~#t1434~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1434~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1434~0.base_13|)) (= |v_#valid_50| (store |v_#valid_51| |v_ULTIMATE.start_main_~#t1434~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, ULTIMATE.start_main_~#t1434~0.offset=|v_ULTIMATE.start_main_~#t1434~0.offset_11|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1434~0.base=|v_ULTIMATE.start_main_~#t1434~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t1434~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1434~0.base, #length] because there is no mapped edge [2019-12-07 19:26:02,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L830-1-->L832: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1435~0.base_12| 0)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1435~0.base_12|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1435~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1435~0.base_12|) |v_ULTIMATE.start_main_~#t1435~0.offset_11| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1435~0.base_12|) (= |v_ULTIMATE.start_main_~#t1435~0.offset_11| 0) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1435~0.base_12| 1)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1435~0.base_12| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t1435~0.offset=|v_ULTIMATE.start_main_~#t1435~0.offset_11|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1435~0.base=|v_ULTIMATE.start_main_~#t1435~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t1435~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1435~0.base] because there is no mapped edge [2019-12-07 19:26:02,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L832-1-->L834: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1436~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1436~0.base_12|) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1436~0.base_12| 1)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1436~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1436~0.base_12|) |v_ULTIMATE.start_main_~#t1436~0.offset_10| 3)) |v_#memory_int_17|) (= |v_ULTIMATE.start_main_~#t1436~0.offset_10| 0) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1436~0.base_12|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1436~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1436~0.base=|v_ULTIMATE.start_main_~#t1436~0.base_12|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ULTIMATE.start_main_~#t1436~0.offset=|v_ULTIMATE.start_main_~#t1436~0.offset_10|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1436~0.base, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t1436~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 19:26:02,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L4-->L785: Formula: (and (= v_~y$r_buff0_thd2~0_39 v_~y$r_buff1_thd2~0_26) (= v_~y$r_buff0_thd3~0_25 1) (= v_~y$r_buff1_thd1~0_5 v_~y$r_buff0_thd1~0_6) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16)) (= v_~__unbuffered_p2_EAX~0_6 v_~z~0_8) (= v_~y$r_buff0_thd0~0_74 v_~y$r_buff1_thd0~0_48) (= v_~y$r_buff0_thd4~0_30 v_~y$r_buff1_thd4~0_17) (= v_~y$r_buff0_thd3~0_26 v_~y$r_buff1_thd3~0_18)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_30, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_74, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_6, ~z~0=v_~z~0_8, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16} OutVars{P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_26, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_30, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_17, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_25, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_74, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_6, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_6, ~z~0=v_~z~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_48} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:26:02,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-722465922 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-722465922 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-722465922| 0)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-722465922 |P2Thread1of1ForFork0_#t~ite11_Out-722465922|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-722465922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-722465922} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-722465922, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-722465922|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-722465922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 19:26:02,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In600331007 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In600331007 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In600331007 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In600331007 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out600331007| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out600331007| ~y$w_buff1_used~0_In600331007) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In600331007, ~y$w_buff0_used~0=~y$w_buff0_used~0_In600331007, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In600331007, ~y$w_buff1_used~0=~y$w_buff1_used~0_In600331007} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In600331007, ~y$w_buff0_used~0=~y$w_buff0_used~0_In600331007, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out600331007|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In600331007, ~y$w_buff1_used~0=~y$w_buff1_used~0_In600331007} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 19:26:02,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L788-->L789: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In321885284 ~y$r_buff0_thd3~0_Out321885284)) (.cse0 (= (mod ~y$w_buff0_used~0_In321885284 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In321885284 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~y$r_buff0_thd3~0_Out321885284) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In321885284, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In321885284} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In321885284, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out321885284, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out321885284|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 19:26:02,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1040354118 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1040354118 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1040354118 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In1040354118 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1040354118| 0)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1040354118| ~y$r_buff1_thd3~0_In1040354118) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1040354118, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1040354118, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1040354118, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1040354118} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1040354118|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1040354118, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1040354118, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1040354118, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1040354118} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 19:26:02,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L805-2-->L805-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1167776247 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-1167776247 256)))) (or (and (= ~y~0_In-1167776247 |P3Thread1of1ForFork1_#t~ite15_Out-1167776247|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1167776247 |P3Thread1of1ForFork1_#t~ite15_Out-1167776247|) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1167776247, ~y$w_buff1~0=~y$w_buff1~0_In-1167776247, ~y~0=~y~0_In-1167776247, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1167776247} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1167776247, ~y$w_buff1~0=~y$w_buff1~0_In-1167776247, P3Thread1of1ForFork1_#t~ite15=|P3Thread1of1ForFork1_#t~ite15_Out-1167776247|, ~y~0=~y~0_In-1167776247, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1167776247} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite15] because there is no mapped edge [2019-12-07 19:26:02,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#res.offset_9| 0) (= |v_P0Thread1of1ForFork2_#in~arg.offset_15| v_P0Thread1of1ForFork2_~arg.offset_13) (= v_~x~0_24 1) (= v_P0Thread1of1ForFork2_~arg.base_13 |v_P0Thread1of1ForFork2_#in~arg.base_15|) (= 0 |v_P0Thread1of1ForFork2_#res.base_9|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= v_~a~0_18 1)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_15|} OutVars{~a~0=v_~a~0_18, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_15|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_13, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_15|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_9|, ~x~0=v_~x~0_24, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 19:26:02,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L789-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_59) (= (+ v_~__unbuffered_cnt~0_85 1) v_~__unbuffered_cnt~0_84) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_59, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:26:02,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L805-4-->L806: Formula: (= v_~y~0_21 |v_P3Thread1of1ForFork1_#t~ite15_6|) InVars {P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_6|} OutVars{P3Thread1of1ForFork1_#t~ite16=|v_P3Thread1of1ForFork1_#t~ite16_5|, P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_5|, ~y~0=v_~y~0_21} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite16, P3Thread1of1ForFork1_#t~ite15, ~y~0] because there is no mapped edge [2019-12-07 19:26:02,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In74390728 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In74390728 256)))) (or (and (= 0 |P3Thread1of1ForFork1_#t~ite17_Out74390728|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In74390728 |P3Thread1of1ForFork1_#t~ite17_Out74390728|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In74390728, ~y$w_buff0_used~0=~y$w_buff0_used~0_In74390728} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In74390728, ~y$w_buff0_used~0=~y$w_buff0_used~0_In74390728, P3Thread1of1ForFork1_#t~ite17=|P3Thread1of1ForFork1_#t~ite17_Out74390728|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 19:26:02,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L807-->L807-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In1716961425 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1716961425 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd4~0_In1716961425 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1716961425 256) 0))) (or (and (= ~y$w_buff1_used~0_In1716961425 |P3Thread1of1ForFork1_#t~ite18_Out1716961425|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork1_#t~ite18_Out1716961425|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1716961425, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716961425, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1716961425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716961425} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1716961425, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716961425, P3Thread1of1ForFork1_#t~ite18=|P3Thread1of1ForFork1_#t~ite18_Out1716961425|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1716961425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716961425} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite18] because there is no mapped edge [2019-12-07 19:26:02,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L755-2-->L755-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork3_#t~ite3_Out1945060669| |P1Thread1of1ForFork3_#t~ite4_Out1945060669|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1945060669 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1945060669 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork3_#t~ite3_Out1945060669| ~y~0_In1945060669) (or .cse1 .cse2)) (and .cse0 (not .cse1) (= ~y$w_buff1~0_In1945060669 |P1Thread1of1ForFork3_#t~ite3_Out1945060669|) (not .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1945060669, ~y$w_buff1~0=~y$w_buff1~0_In1945060669, ~y~0=~y~0_In1945060669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1945060669} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1945060669, ~y$w_buff1~0=~y$w_buff1~0_In1945060669, P1Thread1of1ForFork3_#t~ite4=|P1Thread1of1ForFork3_#t~ite4_Out1945060669|, P1Thread1of1ForFork3_#t~ite3=|P1Thread1of1ForFork3_#t~ite3_Out1945060669|, ~y~0=~y~0_In1945060669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1945060669} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite4, P1Thread1of1ForFork3_#t~ite3] because there is no mapped edge [2019-12-07 19:26:02,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L808-->L808-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-1086786202 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1086786202 256)))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork1_#t~ite19_Out-1086786202| 0)) (and (= ~y$r_buff0_thd4~0_In-1086786202 |P3Thread1of1ForFork1_#t~ite19_Out-1086786202|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1086786202, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1086786202} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1086786202, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1086786202, P3Thread1of1ForFork1_#t~ite19=|P3Thread1of1ForFork1_#t~ite19_Out-1086786202|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 19:26:02,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1591071116 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1591071116 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1591071116 |P1Thread1of1ForFork3_#t~ite5_Out1591071116|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork3_#t~ite5_Out1591071116|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1591071116, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1591071116} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1591071116, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1591071116, P1Thread1of1ForFork3_#t~ite5=|P1Thread1of1ForFork3_#t~ite5_Out1591071116|} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite5] because there is no mapped edge [2019-12-07 19:26:02,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L757-->L757-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In1396554283 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1396554283 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1396554283 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1396554283 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork3_#t~ite6_Out1396554283|)) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1396554283 |P1Thread1of1ForFork3_#t~ite6_Out1396554283|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1396554283, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1396554283, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1396554283, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1396554283} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1396554283, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1396554283, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1396554283, P1Thread1of1ForFork3_#t~ite6=|P1Thread1of1ForFork3_#t~ite6_Out1396554283|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1396554283} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite6] because there is no mapped edge [2019-12-07 19:26:02,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1128532607 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1128532607 256) 0))) (or (and (= 0 |P1Thread1of1ForFork3_#t~ite7_Out1128532607|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork3_#t~ite7_Out1128532607| ~y$r_buff0_thd2~0_In1128532607)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1128532607, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1128532607} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1128532607, P1Thread1of1ForFork3_#t~ite7=|P1Thread1of1ForFork3_#t~ite7_Out1128532607|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1128532607} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite7] because there is no mapped edge [2019-12-07 19:26:02,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-2058763245 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2058763245 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In-2058763245 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2058763245 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork1_#t~ite20_Out-2058763245|)) (and (= ~y$r_buff1_thd4~0_In-2058763245 |P3Thread1of1ForFork1_#t~ite20_Out-2058763245|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2058763245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2058763245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2058763245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2058763245} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2058763245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2058763245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2058763245, P3Thread1of1ForFork1_#t~ite20=|P3Thread1of1ForFork1_#t~ite20_Out-2058763245|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2058763245} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 19:26:02,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L809-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_144 (+ v_~__unbuffered_cnt~0_145 1)) (= |v_P3Thread1of1ForFork1_#t~ite20_56| v_~y$r_buff1_thd4~0_148) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_56|} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_148, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_144, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_55|} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 19:26:02,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L759-->L759-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In494324111 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In494324111 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In494324111 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In494324111 256) 0))) (or (and (= |P1Thread1of1ForFork3_#t~ite8_Out494324111| ~y$r_buff1_thd2~0_In494324111) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork3_#t~ite8_Out494324111| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In494324111, ~y$w_buff0_used~0=~y$w_buff0_used~0_In494324111, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In494324111, ~y$w_buff1_used~0=~y$w_buff1_used~0_In494324111} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In494324111, ~y$w_buff0_used~0=~y$w_buff0_used~0_In494324111, P1Thread1of1ForFork3_#t~ite8=|P1Thread1of1ForFork3_#t~ite8_Out494324111|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In494324111, ~y$w_buff1_used~0=~y$w_buff1_used~0_In494324111} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite8] because there is no mapped edge [2019-12-07 19:26:02,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L759-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_108 (+ v_~__unbuffered_cnt~0_109 1)) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|) (= |v_P1Thread1of1ForFork3_#t~ite8_48| v_~y$r_buff1_thd2~0_69)) InVars {P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_69, P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_47|, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, ~y$r_buff1_thd2~0, P1Thread1of1ForFork3_#t~ite8, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:26:02,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_26) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26} OutVars{ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet24, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:26:02,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L840-2-->L840-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2139205005 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-2139205005 256) 0))) (or (and (not .cse0) (= ~y$w_buff1~0_In-2139205005 |ULTIMATE.start_main_#t~ite25_Out-2139205005|) (not .cse1)) (and (= ~y~0_In-2139205005 |ULTIMATE.start_main_#t~ite25_Out-2139205005|) (or .cse0 .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-2139205005, ~y~0=~y~0_In-2139205005, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2139205005, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2139205005} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-2139205005, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-2139205005|, ~y~0=~y~0_In-2139205005, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2139205005, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2139205005} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 19:26:02,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L840-4-->L841: Formula: (= v_~y~0_56 |v_ULTIMATE.start_main_#t~ite25_9|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_9|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_8|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_12|, ~y~0=v_~y~0_56} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite26, ~y~0] because there is no mapped edge [2019-12-07 19:26:02,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In695244941 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In695244941 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite27_Out695244941| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite27_Out695244941| ~y$w_buff0_used~0_In695244941)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In695244941, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In695244941} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In695244941, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In695244941, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out695244941|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 19:26:02,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1704476623 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1704476623 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1704476623 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1704476623 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1704476623 |ULTIMATE.start_main_#t~ite28_Out-1704476623|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1704476623|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1704476623, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1704476623, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1704476623, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1704476623} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1704476623|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1704476623, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1704476623, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1704476623, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1704476623} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 19:26:02,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In51754287 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In51754287 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out51754287| ~y$r_buff0_thd0~0_In51754287)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite29_Out51754287| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In51754287, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In51754287} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In51754287, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out51754287|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In51754287} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:26:02,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L844-->L844-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-1485048795 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1485048795 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1485048795 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1485048795 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite30_Out-1485048795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-1485048795 |ULTIMATE.start_main_#t~ite30_Out-1485048795|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1485048795, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1485048795, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1485048795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1485048795} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1485048795|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1485048795, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1485048795, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1485048795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1485048795} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] because there is no mapped edge [2019-12-07 19:26:02,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L853-->L853-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-922246389 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-922246389| ~y$w_buff1~0_In-922246389) (= |ULTIMATE.start_main_#t~ite39_Out-922246389| |ULTIMATE.start_main_#t~ite40_Out-922246389|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-922246389 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-922246389 256)) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-922246389 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-922246389 256)))))) (and (= |ULTIMATE.start_main_#t~ite40_Out-922246389| ~y$w_buff1~0_In-922246389) (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-922246389| |ULTIMATE.start_main_#t~ite39_Out-922246389|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-922246389, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-922246389, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-922246389|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-922246389, ~weak$$choice2~0=~weak$$choice2~0_In-922246389, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-922246389, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-922246389} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-922246389|, ~y$w_buff1~0=~y$w_buff1~0_In-922246389, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-922246389, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-922246389|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-922246389, ~weak$$choice2~0=~weak$$choice2~0_In-922246389, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-922246389, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-922246389} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 19:26:02,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L856-->L857: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~y$r_buff0_thd0~0_45 v_~y$r_buff0_thd0~0_46)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_46, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_45, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:26:02,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L859-->L862-1: Formula: (and (= 0 v_~y$flush_delayed~0_19) (not (= 0 (mod v_~y$flush_delayed~0_20 256))) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_8 256)) (= v_~y~0_103 v_~y$mem_tmp~0_9)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~y~0=v_~y~0_103, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_17|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite53, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:26:02,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L862-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:26:02,742 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:26:02 BasicIcfg [2019-12-07 19:26:02,742 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:26:02,743 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:26:02,743 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:26:02,743 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:26:02,743 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:21:44" (3/4) ... [2019-12-07 19:26:02,745 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:26:02,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [864] [864] ULTIMATE.startENTRY-->L828: Formula: (let ((.cse0 (store |v_#valid_77| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~y$r_buff1_thd3~0_186) (< 0 |v_#StackHeapBarrier_23|) (= v_~y$w_buff1_used~0_459 0) (= 0 v_~__unbuffered_p2_EAX~0_128) (= 0 v_~y$w_buff0~0_224) (= v_~a~0_40 0) (= 0 v_~y$r_buff0_thd3~0_213) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1433~0.base_27|)) (= v_~main$tmp_guard0~0_34 0) (= v_~y$r_buff0_thd1~0_40 0) (= v_~y$w_buff1~0_177 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t1433~0.base_27| 1) |v_#valid_75|) (= 0 v_~y$r_buff1_thd2~0_203) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~y$r_buff1_thd4~0_197) (= v_~y$read_delayed~0_6 0) (= v_~y$mem_tmp~0_18 0) (= |v_ULTIMATE.start_main_~#t1433~0.offset_21| 0) (= v_~y$r_buff1_thd0~0_278 0) (= v_~y$r_buff0_thd0~0_327 0) (= v_~y$r_buff1_thd1~0_121 0) (< |v_#StackHeapBarrier_23| |v_ULTIMATE.start_main_~#t1433~0.base_27|) (= v_~z~0_47 0) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p3_EAX~0_23) (= v_~y~0_186 0) (= v_~x~0_50 0) (= v_~weak$$choice2~0_123 0) (= |v_#NULL.offset_4| 0) (= (store |v_#memory_int_30| |v_ULTIMATE.start_main_~#t1433~0.base_27| (store (select |v_#memory_int_30| |v_ULTIMATE.start_main_~#t1433~0.base_27|) |v_ULTIMATE.start_main_~#t1433~0.offset_21| 0)) |v_#memory_int_29|) (= v_~y$w_buff0_used~0_726 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~weak$$choice0~0_13) (= v_~__unbuffered_cnt~0_227 0) (= |v_#length_33| (store |v_#length_34| |v_ULTIMATE.start_main_~#t1433~0.base_27| 4)) (= 0 v_~y$r_buff0_thd2~0_133) (= 0 v_~y$r_buff0_thd4~0_116) (= 0 v_~y$flush_delayed~0_34))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_23|, #valid=|v_#valid_77|, #memory_int=|v_#memory_int_30|, #length=|v_#length_34|} OutVars{ULTIMATE.start_main_#t~nondet32=|v_ULTIMATE.start_main_#t~nondet32_22|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_126|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_18|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_36|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_67|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~a~0=v_~a~0_40, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~y$mem_tmp~0=v_~y$mem_tmp~0_18, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_186, ULTIMATE.start_main_~#t1433~0.offset=|v_ULTIMATE.start_main_~#t1433~0.offset_21|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_40, ~y$flush_delayed~0=v_~y$flush_delayed~0_34, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_23, #length=|v_#length_33|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_128, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_41|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_36|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_22|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_60|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_23|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_45|, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_197, ULTIMATE.start_main_~#t1436~0.base=|v_ULTIMATE.start_main_~#t1436~0.base_21|, ~y$w_buff1~0=v_~y$w_buff1~0_177, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ULTIMATE.start_main_~#t1436~0.offset=|v_ULTIMATE.start_main_~#t1436~0.offset_17|, ULTIMATE.start_main_~#t1435~0.offset=|v_ULTIMATE.start_main_~#t1435~0.offset_18|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_133, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_227, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_278, ~x~0=v_~x~0_50, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_22|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t1434~0.offset=|v_ULTIMATE.start_main_~#t1434~0.offset_21|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_726, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_32|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_36|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_53|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_26|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_67|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_121, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~y$w_buff0~0=v_~y$w_buff0~0_224, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_213, ~y~0=v_~y~0_186, ULTIMATE.start_main_~#t1435~0.base=|v_ULTIMATE.start_main_~#t1435~0.base_23|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_10|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_35|, ULTIMATE.start_main_~#t1434~0.base=|v_ULTIMATE.start_main_~#t1434~0.base_27|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_35|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_34, ULTIMATE.start_main_~#t1433~0.base=|v_ULTIMATE.start_main_~#t1433~0.base_27|, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_33|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_104|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_203, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_116, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_327, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_29|, ~z~0=v_~z~0_47, ~weak$$choice2~0=v_~weak$$choice2~0_123, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_459} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet32, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~a~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t1433~0.offset, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ~__unbuffered_p3_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$r_buff1_thd4~0, ULTIMATE.start_main_~#t1436~0.base, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_~#t1436~0.offset, ULTIMATE.start_main_~#t1435~0.offset, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1434~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1435~0.base, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t1434~0.base, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1433~0.base, ULTIMATE.start_main_#t~ite53, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ~y$r_buff0_thd4~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 19:26:02,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L828-1-->L830: Formula: (and (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1434~0.base_13| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1434~0.base_13|) |v_ULTIMATE.start_main_~#t1434~0.offset_11| 1)) |v_#memory_int_19|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1434~0.base_13| 4) |v_#length_23|) (= |v_ULTIMATE.start_main_~#t1434~0.offset_11| 0) (= 0 (select |v_#valid_51| |v_ULTIMATE.start_main_~#t1434~0.base_13|)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t1434~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t1434~0.base_13|)) (= |v_#valid_50| (store |v_#valid_51| |v_ULTIMATE.start_main_~#t1434~0.base_13| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_5|, ULTIMATE.start_main_~#t1434~0.offset=|v_ULTIMATE.start_main_~#t1434~0.offset_11|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1434~0.base=|v_ULTIMATE.start_main_~#t1434~0.base_13|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t1434~0.offset, #valid, #memory_int, ULTIMATE.start_main_~#t1434~0.base, #length] because there is no mapped edge [2019-12-07 19:26:02,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L830-1-->L832: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1435~0.base_12| 0)) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1435~0.base_12|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1435~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1435~0.base_12|) |v_ULTIMATE.start_main_~#t1435~0.offset_11| 2)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1435~0.base_12|) (= |v_ULTIMATE.start_main_~#t1435~0.offset_11| 0) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1435~0.base_12| 1)) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1435~0.base_12| 4) |v_#length_19|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t1435~0.offset=|v_ULTIMATE.start_main_~#t1435~0.offset_11|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1435~0.base=|v_ULTIMATE.start_main_~#t1435~0.base_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t1435~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1435~0.base] because there is no mapped edge [2019-12-07 19:26:02,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L832-1-->L834: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1436~0.base_12|)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1436~0.base_12|) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t1436~0.base_12| 1)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1436~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1436~0.base_12|) |v_ULTIMATE.start_main_~#t1436~0.offset_10| 3)) |v_#memory_int_17|) (= |v_ULTIMATE.start_main_~#t1436~0.offset_10| 0) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t1436~0.base_12|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1436~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1436~0.base=|v_ULTIMATE.start_main_~#t1436~0.base_12|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ULTIMATE.start_main_~#t1436~0.offset=|v_ULTIMATE.start_main_~#t1436~0.offset_10|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_17|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1436~0.base, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t1436~0.offset, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 19:26:02,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L4-->L785: Formula: (and (= v_~y$r_buff0_thd2~0_39 v_~y$r_buff1_thd2~0_26) (= v_~y$r_buff0_thd3~0_25 1) (= v_~y$r_buff1_thd1~0_5 v_~y$r_buff0_thd1~0_6) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16)) (= v_~__unbuffered_p2_EAX~0_6 v_~z~0_8) (= v_~y$r_buff0_thd0~0_74 v_~y$r_buff1_thd0~0_48) (= v_~y$r_buff0_thd4~0_30 v_~y$r_buff1_thd4~0_17) (= v_~y$r_buff0_thd3~0_26 v_~y$r_buff1_thd3~0_18)) InVars {~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_30, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_26, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_74, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_6, ~z~0=v_~z~0_8, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16} OutVars{P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_16, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_26, ~y$r_buff0_thd4~0=v_~y$r_buff0_thd4~0_30, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_5, ~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_17, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_18, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_25, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_74, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_39, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_6, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_6, ~z~0=v_~z~0_8, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_48} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, ~y$r_buff1_thd1~0, ~y$r_buff1_thd4~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd3~0, ~__unbuffered_p2_EAX~0, ~y$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 19:26:02,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-722465922 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-722465922 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite11_Out-722465922| 0)) (and (or .cse1 .cse0) (= ~y$w_buff0_used~0_In-722465922 |P2Thread1of1ForFork0_#t~ite11_Out-722465922|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-722465922, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-722465922} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-722465922, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-722465922|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-722465922} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 19:26:02,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In600331007 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In600331007 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In600331007 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In600331007 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite12_Out600331007| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite12_Out600331007| ~y$w_buff1_used~0_In600331007) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In600331007, ~y$w_buff0_used~0=~y$w_buff0_used~0_In600331007, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In600331007, ~y$w_buff1_used~0=~y$w_buff1_used~0_In600331007} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In600331007, ~y$w_buff0_used~0=~y$w_buff0_used~0_In600331007, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out600331007|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In600331007, ~y$w_buff1_used~0=~y$w_buff1_used~0_In600331007} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 19:26:02,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L788-->L789: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In321885284 ~y$r_buff0_thd3~0_Out321885284)) (.cse0 (= (mod ~y$w_buff0_used~0_In321885284 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In321885284 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= 0 ~y$r_buff0_thd3~0_Out321885284) (not .cse0) (not .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In321885284, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In321885284} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In321885284, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out321885284, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out321885284|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 19:26:02,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$r_buff0_thd3~0_In1040354118 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1040354118 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1040354118 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In1040354118 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite14_Out1040354118| 0)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1040354118| ~y$r_buff1_thd3~0_In1040354118) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1040354118, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1040354118, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1040354118, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1040354118} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1040354118|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1040354118, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1040354118, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1040354118, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1040354118} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 19:26:02,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L805-2-->L805-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1167776247 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd4~0_In-1167776247 256)))) (or (and (= ~y~0_In-1167776247 |P3Thread1of1ForFork1_#t~ite15_Out-1167776247|) (or .cse0 .cse1)) (and (= ~y$w_buff1~0_In-1167776247 |P3Thread1of1ForFork1_#t~ite15_Out-1167776247|) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1167776247, ~y$w_buff1~0=~y$w_buff1~0_In-1167776247, ~y~0=~y~0_In-1167776247, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1167776247} OutVars{~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-1167776247, ~y$w_buff1~0=~y$w_buff1~0_In-1167776247, P3Thread1of1ForFork1_#t~ite15=|P3Thread1of1ForFork1_#t~ite15_Out-1167776247|, ~y~0=~y~0_In-1167776247, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1167776247} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite15] because there is no mapped edge [2019-12-07 19:26:02,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] P0ENTRY-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#res.offset_9| 0) (= |v_P0Thread1of1ForFork2_#in~arg.offset_15| v_P0Thread1of1ForFork2_~arg.offset_13) (= v_~x~0_24 1) (= v_P0Thread1of1ForFork2_~arg.base_13 |v_P0Thread1of1ForFork2_#in~arg.base_15|) (= 0 |v_P0Thread1of1ForFork2_#res.base_9|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= v_~a~0_18 1)) InVars {P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_15|} OutVars{~a~0=v_~a~0_18, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_15|, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_13, P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_15|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_9|, ~x~0=v_~x~0_24, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_13} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork2_~arg.offset, P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, P0Thread1of1ForFork2_#res.base, ~x~0, P0Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 19:26:02,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L789-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_32| v_~y$r_buff1_thd3~0_59) (= (+ v_~__unbuffered_cnt~0_85 1) v_~__unbuffered_cnt~0_84) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_85} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_31|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_59, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_84, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 19:26:02,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L805-4-->L806: Formula: (= v_~y~0_21 |v_P3Thread1of1ForFork1_#t~ite15_6|) InVars {P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_6|} OutVars{P3Thread1of1ForFork1_#t~ite16=|v_P3Thread1of1ForFork1_#t~ite16_5|, P3Thread1of1ForFork1_#t~ite15=|v_P3Thread1of1ForFork1_#t~ite15_5|, ~y~0=v_~y~0_21} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite16, P3Thread1of1ForFork1_#t~ite15, ~y~0] because there is no mapped edge [2019-12-07 19:26:02,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L806-->L806-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In74390728 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In74390728 256)))) (or (and (= 0 |P3Thread1of1ForFork1_#t~ite17_Out74390728|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In74390728 |P3Thread1of1ForFork1_#t~ite17_Out74390728|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In74390728, ~y$w_buff0_used~0=~y$w_buff0_used~0_In74390728} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In74390728, ~y$w_buff0_used~0=~y$w_buff0_used~0_In74390728, P3Thread1of1ForFork1_#t~ite17=|P3Thread1of1ForFork1_#t~ite17_Out74390728|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite17] because there is no mapped edge [2019-12-07 19:26:02,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L807-->L807-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd4~0_In1716961425 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1716961425 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd4~0_In1716961425 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1716961425 256) 0))) (or (and (= ~y$w_buff1_used~0_In1716961425 |P3Thread1of1ForFork1_#t~ite18_Out1716961425|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P3Thread1of1ForFork1_#t~ite18_Out1716961425|)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1716961425, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716961425, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1716961425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716961425} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In1716961425, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In1716961425, P3Thread1of1ForFork1_#t~ite18=|P3Thread1of1ForFork1_#t~ite18_Out1716961425|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1716961425, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1716961425} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite18] because there is no mapped edge [2019-12-07 19:26:02,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [794] [794] L755-2-->L755-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork3_#t~ite3_Out1945060669| |P1Thread1of1ForFork3_#t~ite4_Out1945060669|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In1945060669 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1945060669 256) 0))) (or (and .cse0 (= |P1Thread1of1ForFork3_#t~ite3_Out1945060669| ~y~0_In1945060669) (or .cse1 .cse2)) (and .cse0 (not .cse1) (= ~y$w_buff1~0_In1945060669 |P1Thread1of1ForFork3_#t~ite3_Out1945060669|) (not .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1945060669, ~y$w_buff1~0=~y$w_buff1~0_In1945060669, ~y~0=~y~0_In1945060669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1945060669} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1945060669, ~y$w_buff1~0=~y$w_buff1~0_In1945060669, P1Thread1of1ForFork3_#t~ite4=|P1Thread1of1ForFork3_#t~ite4_Out1945060669|, P1Thread1of1ForFork3_#t~ite3=|P1Thread1of1ForFork3_#t~ite3_Out1945060669|, ~y~0=~y~0_In1945060669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1945060669} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite4, P1Thread1of1ForFork3_#t~ite3] because there is no mapped edge [2019-12-07 19:26:02,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L808-->L808-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd4~0_In-1086786202 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1086786202 256)))) (or (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork1_#t~ite19_Out-1086786202| 0)) (and (= ~y$r_buff0_thd4~0_In-1086786202 |P3Thread1of1ForFork1_#t~ite19_Out-1086786202|) (or .cse1 .cse0)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1086786202, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1086786202} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-1086786202, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1086786202, P3Thread1of1ForFork1_#t~ite19=|P3Thread1of1ForFork1_#t~ite19_Out-1086786202|} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 19:26:02,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1591071116 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1591071116 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1591071116 |P1Thread1of1ForFork3_#t~ite5_Out1591071116|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork3_#t~ite5_Out1591071116|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1591071116, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1591071116} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1591071116, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1591071116, P1Thread1of1ForFork3_#t~ite5=|P1Thread1of1ForFork3_#t~ite5_Out1591071116|} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite5] because there is no mapped edge [2019-12-07 19:26:02,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L757-->L757-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In1396554283 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1396554283 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1396554283 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1396554283 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork3_#t~ite6_Out1396554283|)) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In1396554283 |P1Thread1of1ForFork3_#t~ite6_Out1396554283|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1396554283, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1396554283, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1396554283, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1396554283} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1396554283, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1396554283, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1396554283, P1Thread1of1ForFork3_#t~ite6=|P1Thread1of1ForFork3_#t~ite6_Out1396554283|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1396554283} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite6] because there is no mapped edge [2019-12-07 19:26:02,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1128532607 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1128532607 256) 0))) (or (and (= 0 |P1Thread1of1ForFork3_#t~ite7_Out1128532607|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork3_#t~ite7_Out1128532607| ~y$r_buff0_thd2~0_In1128532607)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1128532607, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1128532607} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1128532607, P1Thread1of1ForFork3_#t~ite7=|P1Thread1of1ForFork3_#t~ite7_Out1128532607|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1128532607} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite7] because there is no mapped edge [2019-12-07 19:26:02,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L809-->L809-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd4~0_In-2058763245 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-2058763245 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd4~0_In-2058763245 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2058763245 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork1_#t~ite20_Out-2058763245|)) (and (= ~y$r_buff1_thd4~0_In-2058763245 |P3Thread1of1ForFork1_#t~ite20_Out-2058763245|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2058763245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2058763245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2058763245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2058763245} OutVars{~y$r_buff0_thd4~0=~y$r_buff0_thd4~0_In-2058763245, ~y$r_buff1_thd4~0=~y$r_buff1_thd4~0_In-2058763245, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2058763245, P3Thread1of1ForFork1_#t~ite20=|P3Thread1of1ForFork1_#t~ite20_Out-2058763245|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2058763245} AuxVars[] AssignedVars[P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 19:26:02,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L809-2-->P3EXIT: Formula: (and (= v_~__unbuffered_cnt~0_144 (+ v_~__unbuffered_cnt~0_145 1)) (= |v_P3Thread1of1ForFork1_#t~ite20_56| v_~y$r_buff1_thd4~0_148) (= |v_P3Thread1of1ForFork1_#res.offset_3| 0) (= |v_P3Thread1of1ForFork1_#res.base_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_145, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_56|} OutVars{~y$r_buff1_thd4~0=v_~y$r_buff1_thd4~0_148, P3Thread1of1ForFork1_#res.base=|v_P3Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_144, P3Thread1of1ForFork1_#res.offset=|v_P3Thread1of1ForFork1_#res.offset_3|, P3Thread1of1ForFork1_#t~ite20=|v_P3Thread1of1ForFork1_#t~ite20_55|} AuxVars[] AssignedVars[~y$r_buff1_thd4~0, P3Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork1_#res.offset, P3Thread1of1ForFork1_#t~ite20] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L759-->L759-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In494324111 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In494324111 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd2~0_In494324111 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In494324111 256) 0))) (or (and (= |P1Thread1of1ForFork3_#t~ite8_Out494324111| ~y$r_buff1_thd2~0_In494324111) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork3_#t~ite8_Out494324111| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In494324111, ~y$w_buff0_used~0=~y$w_buff0_used~0_In494324111, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In494324111, ~y$w_buff1_used~0=~y$w_buff1_used~0_In494324111} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In494324111, ~y$w_buff0_used~0=~y$w_buff0_used~0_In494324111, P1Thread1of1ForFork3_#t~ite8=|P1Thread1of1ForFork3_#t~ite8_Out494324111|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In494324111, ~y$w_buff1_used~0=~y$w_buff1_used~0_In494324111} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#t~ite8] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L759-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_108 (+ v_~__unbuffered_cnt~0_109 1)) (= 0 |v_P1Thread1of1ForFork3_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork3_#res.base_3|) (= |v_P1Thread1of1ForFork3_#t~ite8_48| v_~y$r_buff1_thd2~0_69)) InVars {P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109} OutVars{P1Thread1of1ForFork3_#res.base=|v_P1Thread1of1ForFork3_#res.base_3|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_69, P1Thread1of1ForFork3_#t~ite8=|v_P1Thread1of1ForFork3_#t~ite8_47|, P1Thread1of1ForFork3_#res.offset=|v_P1Thread1of1ForFork3_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_108} AuxVars[] AssignedVars[P1Thread1of1ForFork3_#res.base, ~y$r_buff1_thd2~0, P1Thread1of1ForFork3_#t~ite8, P1Thread1of1ForFork3_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [742] [742] L834-1-->L840: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= 0 (ite (= 4 v_~__unbuffered_cnt~0_26) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26} OutVars{ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet24, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L840-2-->L840-4: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2139205005 256))) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-2139205005 256) 0))) (or (and (not .cse0) (= ~y$w_buff1~0_In-2139205005 |ULTIMATE.start_main_#t~ite25_Out-2139205005|) (not .cse1)) (and (= ~y~0_In-2139205005 |ULTIMATE.start_main_#t~ite25_Out-2139205005|) (or .cse0 .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-2139205005, ~y~0=~y~0_In-2139205005, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2139205005, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2139205005} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-2139205005, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-2139205005|, ~y~0=~y~0_In-2139205005, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-2139205005, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2139205005} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L840-4-->L841: Formula: (= v_~y~0_56 |v_ULTIMATE.start_main_#t~ite25_9|) InVars {ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_9|} OutVars{ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_8|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_12|, ~y~0=v_~y~0_56} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite26, ~y~0] because there is no mapped edge [2019-12-07 19:26:02,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L841-->L841-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In695244941 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In695244941 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite27_Out695244941| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite27_Out695244941| ~y$w_buff0_used~0_In695244941)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In695244941, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In695244941} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In695244941, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In695244941, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out695244941|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 19:26:02,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L842-->L842-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1704476623 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1704476623 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1704476623 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1704476623 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1704476623 |ULTIMATE.start_main_#t~ite28_Out-1704476623|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite28_Out-1704476623|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1704476623, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1704476623, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1704476623, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1704476623} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1704476623|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1704476623, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1704476623, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1704476623, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1704476623} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 19:26:02,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In51754287 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In51754287 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out51754287| ~y$r_buff0_thd0~0_In51754287)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite29_Out51754287| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In51754287, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In51754287} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In51754287, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out51754287|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In51754287} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 19:26:02,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L844-->L844-2: Formula: (let ((.cse3 (= (mod ~y$w_buff1_used~0_In-1485048795 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In-1485048795 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1485048795 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1485048795 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite30_Out-1485048795|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-1485048795 |ULTIMATE.start_main_#t~ite30_Out-1485048795|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1485048795, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1485048795, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1485048795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1485048795} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out-1485048795|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1485048795, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1485048795, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1485048795, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1485048795} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30] because there is no mapped edge [2019-12-07 19:26:02,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L853-->L853-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-922246389 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-922246389| ~y$w_buff1~0_In-922246389) (= |ULTIMATE.start_main_#t~ite39_Out-922246389| |ULTIMATE.start_main_#t~ite40_Out-922246389|) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-922246389 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-922246389 256)) (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-922246389 256))) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-922246389 256)))))) (and (= |ULTIMATE.start_main_#t~ite40_Out-922246389| ~y$w_buff1~0_In-922246389) (not .cse0) (= |ULTIMATE.start_main_#t~ite39_In-922246389| |ULTIMATE.start_main_#t~ite39_Out-922246389|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-922246389, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-922246389, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In-922246389|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-922246389, ~weak$$choice2~0=~weak$$choice2~0_In-922246389, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-922246389, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-922246389} OutVars{ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out-922246389|, ~y$w_buff1~0=~y$w_buff1~0_In-922246389, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-922246389, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-922246389|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-922246389, ~weak$$choice2~0=~weak$$choice2~0_In-922246389, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-922246389, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-922246389} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 19:26:02,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L856-->L857: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_15 256))) (= v_~y$r_buff0_thd0~0_45 v_~y$r_buff0_thd0~0_46)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_46, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_45, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_8|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 19:26:02,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L859-->L862-1: Formula: (and (= 0 v_~y$flush_delayed~0_19) (not (= 0 (mod v_~y$flush_delayed~0_20 256))) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_8 256)) (= v_~y~0_103 v_~y$mem_tmp~0_9)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_20, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_19, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_8, ~y~0=v_~y~0_103, ULTIMATE.start_main_#t~ite53=|v_ULTIMATE.start_main_#t~ite53_17|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite53, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:26:02,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L862-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:26:02,821 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_660fcbc3-82de-4226-b596-c0e31fa5efa8/bin/utaipan/witness.graphml [2019-12-07 19:26:02,821 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:26:02,822 INFO L168 Benchmark]: Toolchain (without parser) took 258761.95 ms. Allocated memory was 1.0 GB in the beginning and 7.8 GB in the end (delta: 6.8 GB). Free memory was 930.8 MB in the beginning and 6.7 GB in the end (delta: -5.8 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,823 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 952.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:26:02,823 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.38 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.3 MB). Free memory was 930.8 MB in the beginning and 1.1 GB in the end (delta: -122.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,823 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:26:02,824 INFO L168 Benchmark]: Boogie Preprocessor took 27.63 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,824 INFO L168 Benchmark]: RCFGBuilder took 419.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.0 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,824 INFO L168 Benchmark]: TraceAbstraction took 257810.43 ms. Allocated memory was 1.1 GB in the beginning and 7.8 GB in the end (delta: 6.7 GB). Free memory was 994.0 MB in the beginning and 6.8 GB in the end (delta: -5.8 GB). Peak memory consumption was 948.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,824 INFO L168 Benchmark]: Witness Printer took 78.62 ms. Allocated memory is still 7.8 GB. Free memory was 6.8 GB in the beginning and 6.7 GB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 11.5 GB. [2019-12-07 19:26:02,826 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 952.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.38 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.3 MB). Free memory was 930.8 MB in the beginning and 1.1 GB in the end (delta: -122.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.65 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.63 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 419.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.0 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 257810.43 ms. Allocated memory was 1.1 GB in the beginning and 7.8 GB in the end (delta: 6.7 GB). Free memory was 994.0 MB in the beginning and 6.8 GB in the end (delta: -5.8 GB). Peak memory consumption was 948.4 MB. Max. memory is 11.5 GB. * Witness Printer took 78.62 ms. Allocated memory is still 7.8 GB. Free memory was 6.8 GB in the beginning and 6.7 GB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 191 ProgramPointsBefore, 102 ProgramPointsAfterwards, 225 TransitionsBefore, 111 TransitionsAfterwards, 18432 CoEnabledTransitionPairs, 8 FixpointIterations, 35 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 40 ConcurrentYvCompositions, 30 ChoiceCompositions, 7107 VarBasedMoverChecksPositive, 245 VarBasedMoverChecksNegative, 82 SemBasedMoverChecksPositive, 237 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 90358 CheckedPairsTotal, 120 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L828] FCALL, FORK 0 pthread_create(&t1433, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L830] FCALL, FORK 0 pthread_create(&t1434, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L832] FCALL, FORK 0 pthread_create(&t1435, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 3 y$w_buff1 = y$w_buff0 [L770] 3 y$w_buff0 = 2 [L771] 3 y$w_buff1_used = y$w_buff0_used [L772] 3 y$w_buff0_used = (_Bool)1 [L834] FCALL, FORK 0 pthread_create(&t1436, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L785] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L785] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L786] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L787] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L799] 4 z = 1 [L802] 4 __unbuffered_p3_EAX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L805] 4 y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L749] 2 x = 2 [L752] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y=2, z=1] [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y=2, z=1] [L806] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L755] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L807] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L756] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L757] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L808] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L758] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L840] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L841] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L842] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L843] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L844] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L847] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L848] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L849] 0 y$flush_delayed = weak$$choice2 [L850] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L851] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L851] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L852] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L852] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L853] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L854] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L854] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L855] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L855] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L857] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L857] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L858] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0 && __unbuffered_p3_EAX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 179 locations, 2 error locations. Result: UNSAFE, OverallTime: 257.6s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 53.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4012 SDtfs, 3748 SDslu, 7839 SDs, 0 SdLazy, 3504 SolverSat, 170 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 156 GetRequests, 27 SyntacticMatches, 17 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=401172occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 144.2s AutomataMinimizationTime, 21 MinimizatonAttempts, 624168 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 921 NumberOfCodeBlocks, 921 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 829 ConstructedInterpolants, 0 QuantifiedInterpolants, 181817 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...