./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash acda756c414978330332dd1b1ae7a90b288c5309 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 20:04:46,436 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 20:04:46,438 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 20:04:46,445 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 20:04:46,445 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 20:04:46,446 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 20:04:46,447 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 20:04:46,448 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 20:04:46,449 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 20:04:46,450 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 20:04:46,451 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 20:04:46,451 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 20:04:46,452 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 20:04:46,452 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 20:04:46,453 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 20:04:46,454 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 20:04:46,454 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 20:04:46,455 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 20:04:46,456 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 20:04:46,458 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 20:04:46,459 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 20:04:46,459 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 20:04:46,460 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 20:04:46,460 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 20:04:46,462 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 20:04:46,462 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 20:04:46,463 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 20:04:46,463 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 20:04:46,463 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 20:04:46,464 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 20:04:46,464 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 20:04:46,464 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 20:04:46,465 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 20:04:46,465 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 20:04:46,466 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 20:04:46,466 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 20:04:46,466 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 20:04:46,466 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 20:04:46,467 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 20:04:46,467 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 20:04:46,468 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 20:04:46,468 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 20:04:46,478 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 20:04:46,478 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 20:04:46,478 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 20:04:46,478 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 20:04:46,478 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 20:04:46,479 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 20:04:46,479 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 20:04:46,480 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 20:04:46,480 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 20:04:46,481 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 20:04:46,481 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:04:46,482 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 20:04:46,482 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 20:04:46,483 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 20:04:46,483 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 20:04:46,483 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> acda756c414978330332dd1b1ae7a90b288c5309 [2019-12-07 20:04:46,584 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 20:04:46,593 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 20:04:46,595 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 20:04:46,596 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 20:04:46,596 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 20:04:46,596 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i [2019-12-07 20:04:46,637 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/data/90f6f8d5e/e3b37fff4c5a40c0bdb9999992fcf765/FLAG744b9508b [2019-12-07 20:04:47,114 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 20:04:47,114 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/sv-benchmarks/c/pthread-wmm/mix056_power.oepc.i [2019-12-07 20:04:47,125 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/data/90f6f8d5e/e3b37fff4c5a40c0bdb9999992fcf765/FLAG744b9508b [2019-12-07 20:04:47,441 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/data/90f6f8d5e/e3b37fff4c5a40c0bdb9999992fcf765 [2019-12-07 20:04:47,448 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 20:04:47,451 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 20:04:47,453 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 20:04:47,453 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 20:04:47,459 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 20:04:47,460 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,464 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47, skipping insertion in model container [2019-12-07 20:04:47,464 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,472 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 20:04:47,501 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 20:04:47,756 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:04:47,764 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 20:04:47,806 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:04:47,853 INFO L208 MainTranslator]: Completed translation [2019-12-07 20:04:47,854 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47 WrapperNode [2019-12-07 20:04:47,854 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 20:04:47,854 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 20:04:47,854 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 20:04:47,854 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 20:04:47,860 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,872 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,891 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 20:04:47,891 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 20:04:47,891 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 20:04:47,891 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 20:04:47,897 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,897 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,900 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,901 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,908 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,910 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,913 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... [2019-12-07 20:04:47,916 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 20:04:47,916 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 20:04:47,916 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 20:04:47,916 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 20:04:47,917 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:04:47,956 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 20:04:47,956 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 20:04:47,956 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 20:04:47,957 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 20:04:47,957 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 20:04:47,957 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 20:04:47,957 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 20:04:47,957 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 20:04:47,958 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 20:04:48,326 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 20:04:48,326 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 20:04:48,327 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:04:48 BoogieIcfgContainer [2019-12-07 20:04:48,327 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 20:04:48,328 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 20:04:48,328 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 20:04:48,331 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 20:04:48,331 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 08:04:47" (1/3) ... [2019-12-07 20:04:48,332 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c442295 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:04:48, skipping insertion in model container [2019-12-07 20:04:48,332 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:04:47" (2/3) ... [2019-12-07 20:04:48,332 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c442295 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:04:48, skipping insertion in model container [2019-12-07 20:04:48,332 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:04:48" (3/3) ... [2019-12-07 20:04:48,334 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_power.oepc.i [2019-12-07 20:04:48,341 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 20:04:48,341 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 20:04:48,346 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 20:04:48,347 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 20:04:48,371 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,371 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,371 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,371 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,372 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,372 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,372 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,372 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,372 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,373 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,374 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,375 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,376 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,377 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,378 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,379 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,379 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,379 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,379 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,379 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,380 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,381 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,382 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,383 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,384 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,385 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,386 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,387 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,388 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,389 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,390 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,391 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,392 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,393 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,394 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,399 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,400 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,401 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,402 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:04:48,414 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 20:04:48,426 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 20:04:48,426 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 20:04:48,426 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 20:04:48,426 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 20:04:48,426 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 20:04:48,426 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 20:04:48,426 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 20:04:48,426 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 20:04:48,437 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 20:04:48,438 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 20:04:48,494 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 20:04:48,494 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:04:48,504 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:04:48,519 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 20:04:48,551 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 20:04:48,551 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:04:48,556 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:04:48,572 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 20:04:48,573 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 20:04:51,695 WARN L192 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 20:04:51,878 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 20:04:51,956 INFO L206 etLargeBlockEncoding]: Checked pairs total: 77200 [2019-12-07 20:04:51,957 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 20:04:51,959 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 20:05:03,368 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 20:05:03,370 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 20:05:03,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 20:05:03,374 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:03,375 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 20:05:03,375 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:03,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:03,380 INFO L82 PathProgramCache]: Analyzing trace with hash 909908, now seen corresponding path program 1 times [2019-12-07 20:05:03,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:03,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240450487] [2019-12-07 20:05:03,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:03,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:03,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:03,514 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240450487] [2019-12-07 20:05:03,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:03,515 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 20:05:03,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443434526] [2019-12-07 20:05:03,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:05:03,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:03,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:05:03,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:03,530 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 20:05:04,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:04,331 INFO L93 Difference]: Finished difference Result 101472 states and 432734 transitions. [2019-12-07 20:05:04,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:05:04,333 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 20:05:04,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:04,755 INFO L225 Difference]: With dead ends: 101472 [2019-12-07 20:05:04,756 INFO L226 Difference]: Without dead ends: 95232 [2019-12-07 20:05:04,756 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:08,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95232 states. [2019-12-07 20:05:09,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95232 to 95232. [2019-12-07 20:05:09,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95232 states. [2019-12-07 20:05:09,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95232 states to 95232 states and 405538 transitions. [2019-12-07 20:05:09,719 INFO L78 Accepts]: Start accepts. Automaton has 95232 states and 405538 transitions. Word has length 3 [2019-12-07 20:05:09,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:09,719 INFO L462 AbstractCegarLoop]: Abstraction has 95232 states and 405538 transitions. [2019-12-07 20:05:09,719 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:05:09,719 INFO L276 IsEmpty]: Start isEmpty. Operand 95232 states and 405538 transitions. [2019-12-07 20:05:09,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 20:05:09,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:09,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:09,723 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:09,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:09,724 INFO L82 PathProgramCache]: Analyzing trace with hash 1729820714, now seen corresponding path program 1 times [2019-12-07 20:05:09,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:09,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [353013090] [2019-12-07 20:05:09,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:09,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:09,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:09,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [353013090] [2019-12-07 20:05:09,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:09,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:05:09,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709529630] [2019-12-07 20:05:09,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:09,790 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:09,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:09,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:09,790 INFO L87 Difference]: Start difference. First operand 95232 states and 405538 transitions. Second operand 4 states. [2019-12-07 20:05:12,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:12,246 INFO L93 Difference]: Finished difference Result 151692 states and 619304 transitions. [2019-12-07 20:05:12,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:05:12,247 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 20:05:12,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:12,672 INFO L225 Difference]: With dead ends: 151692 [2019-12-07 20:05:12,673 INFO L226 Difference]: Without dead ends: 151643 [2019-12-07 20:05:12,674 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:05:16,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151643 states. [2019-12-07 20:05:18,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151643 to 138429. [2019-12-07 20:05:18,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138429 states. [2019-12-07 20:05:19,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138429 states to 138429 states and 572602 transitions. [2019-12-07 20:05:19,050 INFO L78 Accepts]: Start accepts. Automaton has 138429 states and 572602 transitions. Word has length 11 [2019-12-07 20:05:19,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:19,051 INFO L462 AbstractCegarLoop]: Abstraction has 138429 states and 572602 transitions. [2019-12-07 20:05:19,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:05:19,051 INFO L276 IsEmpty]: Start isEmpty. Operand 138429 states and 572602 transitions. [2019-12-07 20:05:19,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 20:05:19,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:19,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:19,055 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:19,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:19,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1791451612, now seen corresponding path program 1 times [2019-12-07 20:05:19,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:19,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577412359] [2019-12-07 20:05:19,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:19,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:19,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:19,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577412359] [2019-12-07 20:05:19,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:19,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:05:19,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074868185] [2019-12-07 20:05:19,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:19,103 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:19,103 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:19,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:19,104 INFO L87 Difference]: Start difference. First operand 138429 states and 572602 transitions. Second operand 4 states. [2019-12-07 20:05:20,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:20,111 INFO L93 Difference]: Finished difference Result 197916 states and 800228 transitions. [2019-12-07 20:05:20,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:05:20,112 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 20:05:20,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:20,623 INFO L225 Difference]: With dead ends: 197916 [2019-12-07 20:05:20,623 INFO L226 Difference]: Without dead ends: 197860 [2019-12-07 20:05:20,624 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:05:27,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197860 states. [2019-12-07 20:05:29,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197860 to 165384. [2019-12-07 20:05:29,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165384 states. [2019-12-07 20:05:29,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165384 states to 165384 states and 680683 transitions. [2019-12-07 20:05:29,812 INFO L78 Accepts]: Start accepts. Automaton has 165384 states and 680683 transitions. Word has length 13 [2019-12-07 20:05:29,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:29,813 INFO L462 AbstractCegarLoop]: Abstraction has 165384 states and 680683 transitions. [2019-12-07 20:05:29,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:05:29,813 INFO L276 IsEmpty]: Start isEmpty. Operand 165384 states and 680683 transitions. [2019-12-07 20:05:29,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 20:05:29,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:29,819 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:29,819 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:29,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:29,819 INFO L82 PathProgramCache]: Analyzing trace with hash -137996123, now seen corresponding path program 1 times [2019-12-07 20:05:29,819 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:29,819 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1976411087] [2019-12-07 20:05:29,819 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:29,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:29,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:29,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1976411087] [2019-12-07 20:05:29,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:29,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:05:29,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1454540080] [2019-12-07 20:05:29,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:05:29,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:29,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:05:29,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:29,849 INFO L87 Difference]: Start difference. First operand 165384 states and 680683 transitions. Second operand 3 states. [2019-12-07 20:05:31,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:31,293 INFO L93 Difference]: Finished difference Result 244100 states and 1002631 transitions. [2019-12-07 20:05:31,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:05:31,294 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 20:05:31,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:31,906 INFO L225 Difference]: With dead ends: 244100 [2019-12-07 20:05:31,906 INFO L226 Difference]: Without dead ends: 244100 [2019-12-07 20:05:31,906 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:37,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244100 states. [2019-12-07 20:05:42,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244100 to 183753. [2019-12-07 20:05:42,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183753 states. [2019-12-07 20:05:43,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183753 states to 183753 states and 759316 transitions. [2019-12-07 20:05:43,125 INFO L78 Accepts]: Start accepts. Automaton has 183753 states and 759316 transitions. Word has length 16 [2019-12-07 20:05:43,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:43,125 INFO L462 AbstractCegarLoop]: Abstraction has 183753 states and 759316 transitions. [2019-12-07 20:05:43,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:05:43,125 INFO L276 IsEmpty]: Start isEmpty. Operand 183753 states and 759316 transitions. [2019-12-07 20:05:43,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 20:05:43,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:43,132 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:43,132 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:43,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:43,132 INFO L82 PathProgramCache]: Analyzing trace with hash -137876649, now seen corresponding path program 1 times [2019-12-07 20:05:43,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:43,133 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [287252788] [2019-12-07 20:05:43,133 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:43,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:43,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:43,175 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [287252788] [2019-12-07 20:05:43,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:43,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:05:43,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021192961] [2019-12-07 20:05:43,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:43,176 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:43,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:43,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:43,176 INFO L87 Difference]: Start difference. First operand 183753 states and 759316 transitions. Second operand 4 states. [2019-12-07 20:05:44,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:44,280 INFO L93 Difference]: Finished difference Result 219863 states and 898035 transitions. [2019-12-07 20:05:44,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:05:44,280 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 20:05:44,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:44,847 INFO L225 Difference]: With dead ends: 219863 [2019-12-07 20:05:44,847 INFO L226 Difference]: Without dead ends: 219863 [2019-12-07 20:05:44,847 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:05:49,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219863 states. [2019-12-07 20:05:52,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219863 to 194030. [2019-12-07 20:05:52,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194030 states. [2019-12-07 20:05:53,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194030 states to 194030 states and 800411 transitions. [2019-12-07 20:05:53,367 INFO L78 Accepts]: Start accepts. Automaton has 194030 states and 800411 transitions. Word has length 16 [2019-12-07 20:05:53,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:53,367 INFO L462 AbstractCegarLoop]: Abstraction has 194030 states and 800411 transitions. [2019-12-07 20:05:53,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:05:53,367 INFO L276 IsEmpty]: Start isEmpty. Operand 194030 states and 800411 transitions. [2019-12-07 20:05:53,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 20:05:53,372 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:53,372 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:53,372 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:53,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:53,372 INFO L82 PathProgramCache]: Analyzing trace with hash -219444717, now seen corresponding path program 1 times [2019-12-07 20:05:53,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:53,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077111775] [2019-12-07 20:05:53,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:53,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:53,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:53,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077111775] [2019-12-07 20:05:53,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:53,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:05:53,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1364317253] [2019-12-07 20:05:53,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:53,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:53,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:53,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:53,415 INFO L87 Difference]: Start difference. First operand 194030 states and 800411 transitions. Second operand 4 states. [2019-12-07 20:05:54,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:54,581 INFO L93 Difference]: Finished difference Result 232254 states and 951651 transitions. [2019-12-07 20:05:54,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:05:54,582 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 20:05:54,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:57,845 INFO L225 Difference]: With dead ends: 232254 [2019-12-07 20:05:57,845 INFO L226 Difference]: Without dead ends: 232254 [2019-12-07 20:05:57,846 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:02,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232254 states. [2019-12-07 20:06:05,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232254 to 195815. [2019-12-07 20:06:05,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195815 states. [2019-12-07 20:06:06,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195815 states to 195815 states and 808686 transitions. [2019-12-07 20:06:06,404 INFO L78 Accepts]: Start accepts. Automaton has 195815 states and 808686 transitions. Word has length 16 [2019-12-07 20:06:06,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:06,404 INFO L462 AbstractCegarLoop]: Abstraction has 195815 states and 808686 transitions. [2019-12-07 20:06:06,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:06,404 INFO L276 IsEmpty]: Start isEmpty. Operand 195815 states and 808686 transitions. [2019-12-07 20:06:06,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 20:06:06,416 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:06,416 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:06,416 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:06,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:06,416 INFO L82 PathProgramCache]: Analyzing trace with hash -604356166, now seen corresponding path program 1 times [2019-12-07 20:06:06,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:06,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388564583] [2019-12-07 20:06:06,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:06,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:06,443 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:06,444 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388564583] [2019-12-07 20:06:06,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:06,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:06,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1821592723] [2019-12-07 20:06:06,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:06,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:06,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:06,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:06,445 INFO L87 Difference]: Start difference. First operand 195815 states and 808686 transitions. Second operand 3 states. [2019-12-07 20:06:06,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:06,563 INFO L93 Difference]: Finished difference Result 38445 states and 125143 transitions. [2019-12-07 20:06:06,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:06,563 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 20:06:06,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:06,620 INFO L225 Difference]: With dead ends: 38445 [2019-12-07 20:06:06,620 INFO L226 Difference]: Without dead ends: 38445 [2019-12-07 20:06:06,620 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:06,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38445 states. [2019-12-07 20:06:07,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38445 to 38365. [2019-12-07 20:06:07,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38365 states. [2019-12-07 20:06:07,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38365 states to 38365 states and 124903 transitions. [2019-12-07 20:06:07,254 INFO L78 Accepts]: Start accepts. Automaton has 38365 states and 124903 transitions. Word has length 18 [2019-12-07 20:06:07,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:07,254 INFO L462 AbstractCegarLoop]: Abstraction has 38365 states and 124903 transitions. [2019-12-07 20:06:07,254 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:07,254 INFO L276 IsEmpty]: Start isEmpty. Operand 38365 states and 124903 transitions. [2019-12-07 20:06:07,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 20:06:07,259 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:07,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:07,260 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:07,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:07,260 INFO L82 PathProgramCache]: Analyzing trace with hash -1066994180, now seen corresponding path program 1 times [2019-12-07 20:06:07,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:07,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191610516] [2019-12-07 20:06:07,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:07,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:07,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:07,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191610516] [2019-12-07 20:06:07,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:07,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:07,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289757650] [2019-12-07 20:06:07,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:07,307 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:07,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:07,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:07,307 INFO L87 Difference]: Start difference. First operand 38365 states and 124903 transitions. Second operand 5 states. [2019-12-07 20:06:07,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:07,742 INFO L93 Difference]: Finished difference Result 53898 states and 171065 transitions. [2019-12-07 20:06:07,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:06:07,742 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 20:06:07,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:07,823 INFO L225 Difference]: With dead ends: 53898 [2019-12-07 20:06:07,824 INFO L226 Difference]: Without dead ends: 53891 [2019-12-07 20:06:07,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:06:08,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53891 states. [2019-12-07 20:06:08,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53891 to 39721. [2019-12-07 20:06:08,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39721 states. [2019-12-07 20:06:08,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39721 states to 39721 states and 129036 transitions. [2019-12-07 20:06:08,591 INFO L78 Accepts]: Start accepts. Automaton has 39721 states and 129036 transitions. Word has length 22 [2019-12-07 20:06:08,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:08,591 INFO L462 AbstractCegarLoop]: Abstraction has 39721 states and 129036 transitions. [2019-12-07 20:06:08,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:08,592 INFO L276 IsEmpty]: Start isEmpty. Operand 39721 states and 129036 transitions. [2019-12-07 20:06:08,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 20:06:08,597 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:08,597 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:08,597 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:08,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:08,597 INFO L82 PathProgramCache]: Analyzing trace with hash -1734556852, now seen corresponding path program 1 times [2019-12-07 20:06:08,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:08,598 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455872076] [2019-12-07 20:06:08,598 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:08,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:08,636 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:08,636 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455872076] [2019-12-07 20:06:08,636 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:08,636 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:08,637 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [470543531] [2019-12-07 20:06:08,637 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:08,637 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:08,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:08,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:08,637 INFO L87 Difference]: Start difference. First operand 39721 states and 129036 transitions. Second operand 5 states. [2019-12-07 20:06:09,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:09,134 INFO L93 Difference]: Finished difference Result 56181 states and 177938 transitions. [2019-12-07 20:06:09,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:06:09,135 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 20:06:09,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:09,219 INFO L225 Difference]: With dead ends: 56181 [2019-12-07 20:06:09,219 INFO L226 Difference]: Without dead ends: 56174 [2019-12-07 20:06:09,219 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:06:09,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56174 states. [2019-12-07 20:06:09,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56174 to 38054. [2019-12-07 20:06:09,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38054 states. [2019-12-07 20:06:09,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38054 states to 38054 states and 123745 transitions. [2019-12-07 20:06:09,975 INFO L78 Accepts]: Start accepts. Automaton has 38054 states and 123745 transitions. Word has length 22 [2019-12-07 20:06:09,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:09,976 INFO L462 AbstractCegarLoop]: Abstraction has 38054 states and 123745 transitions. [2019-12-07 20:06:09,976 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:09,976 INFO L276 IsEmpty]: Start isEmpty. Operand 38054 states and 123745 transitions. [2019-12-07 20:06:09,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 20:06:09,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:09,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:09,986 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:09,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:09,986 INFO L82 PathProgramCache]: Analyzing trace with hash -779030427, now seen corresponding path program 1 times [2019-12-07 20:06:09,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:09,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509531693] [2019-12-07 20:06:09,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:10,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:10,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:10,034 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509531693] [2019-12-07 20:06:10,034 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:10,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:10,035 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970816279] [2019-12-07 20:06:10,035 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:10,035 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:10,035 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:10,035 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:10,035 INFO L87 Difference]: Start difference. First operand 38054 states and 123745 transitions. Second operand 5 states. [2019-12-07 20:06:10,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:10,461 INFO L93 Difference]: Finished difference Result 53064 states and 168438 transitions. [2019-12-07 20:06:10,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:10,461 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 20:06:10,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:10,542 INFO L225 Difference]: With dead ends: 53064 [2019-12-07 20:06:10,542 INFO L226 Difference]: Without dead ends: 53051 [2019-12-07 20:06:10,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:10,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53051 states. [2019-12-07 20:06:11,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53051 to 44527. [2019-12-07 20:06:11,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44527 states. [2019-12-07 20:06:11,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44527 states to 44527 states and 143877 transitions. [2019-12-07 20:06:11,340 INFO L78 Accepts]: Start accepts. Automaton has 44527 states and 143877 transitions. Word has length 25 [2019-12-07 20:06:11,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:11,340 INFO L462 AbstractCegarLoop]: Abstraction has 44527 states and 143877 transitions. [2019-12-07 20:06:11,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:11,340 INFO L276 IsEmpty]: Start isEmpty. Operand 44527 states and 143877 transitions. [2019-12-07 20:06:11,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 20:06:11,353 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:11,353 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:11,354 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:11,354 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:11,354 INFO L82 PathProgramCache]: Analyzing trace with hash -1740727520, now seen corresponding path program 1 times [2019-12-07 20:06:11,354 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:11,354 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361720497] [2019-12-07 20:06:11,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:11,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:11,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:11,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361720497] [2019-12-07 20:06:11,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:11,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:11,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142893424] [2019-12-07 20:06:11,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:11,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:11,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:11,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:11,396 INFO L87 Difference]: Start difference. First operand 44527 states and 143877 transitions. Second operand 5 states. [2019-12-07 20:06:11,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:11,809 INFO L93 Difference]: Finished difference Result 57149 states and 181718 transitions. [2019-12-07 20:06:11,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:11,809 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 20:06:11,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:11,889 INFO L225 Difference]: With dead ends: 57149 [2019-12-07 20:06:11,890 INFO L226 Difference]: Without dead ends: 57125 [2019-12-07 20:06:11,890 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:12,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57125 states. [2019-12-07 20:06:12,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57125 to 49925. [2019-12-07 20:06:12,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49925 states. [2019-12-07 20:06:12,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49925 states to 49925 states and 160598 transitions. [2019-12-07 20:06:12,771 INFO L78 Accepts]: Start accepts. Automaton has 49925 states and 160598 transitions. Word has length 27 [2019-12-07 20:06:12,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:12,771 INFO L462 AbstractCegarLoop]: Abstraction has 49925 states and 160598 transitions. [2019-12-07 20:06:12,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:12,771 INFO L276 IsEmpty]: Start isEmpty. Operand 49925 states and 160598 transitions. [2019-12-07 20:06:12,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 20:06:12,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:12,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:12,787 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:12,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:12,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1978987791, now seen corresponding path program 1 times [2019-12-07 20:06:12,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:12,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1638277428] [2019-12-07 20:06:12,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:12,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:12,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:12,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1638277428] [2019-12-07 20:06:12,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:12,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:12,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1821360390] [2019-12-07 20:06:12,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:12,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:12,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:12,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:12,826 INFO L87 Difference]: Start difference. First operand 49925 states and 160598 transitions. Second operand 5 states. [2019-12-07 20:06:13,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:13,165 INFO L93 Difference]: Finished difference Result 60112 states and 190425 transitions. [2019-12-07 20:06:13,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:13,166 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 20:06:13,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:13,255 INFO L225 Difference]: With dead ends: 60112 [2019-12-07 20:06:13,255 INFO L226 Difference]: Without dead ends: 60090 [2019-12-07 20:06:13,256 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:13,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60090 states. [2019-12-07 20:06:14,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60090 to 48583. [2019-12-07 20:06:14,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48583 states. [2019-12-07 20:06:14,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48583 states to 48583 states and 156497 transitions. [2019-12-07 20:06:14,132 INFO L78 Accepts]: Start accepts. Automaton has 48583 states and 156497 transitions. Word has length 28 [2019-12-07 20:06:14,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:14,132 INFO L462 AbstractCegarLoop]: Abstraction has 48583 states and 156497 transitions. [2019-12-07 20:06:14,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:14,133 INFO L276 IsEmpty]: Start isEmpty. Operand 48583 states and 156497 transitions. [2019-12-07 20:06:14,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 20:06:14,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:14,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:14,148 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:14,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:14,149 INFO L82 PathProgramCache]: Analyzing trace with hash -906370244, now seen corresponding path program 1 times [2019-12-07 20:06:14,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:14,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1080069568] [2019-12-07 20:06:14,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:14,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:14,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:14,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1080069568] [2019-12-07 20:06:14,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:14,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:14,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083899033] [2019-12-07 20:06:14,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:14,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:14,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:14,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:14,203 INFO L87 Difference]: Start difference. First operand 48583 states and 156497 transitions. Second operand 5 states. [2019-12-07 20:06:14,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:14,778 INFO L93 Difference]: Finished difference Result 67084 states and 213778 transitions. [2019-12-07 20:06:14,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 20:06:14,778 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 20:06:14,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:14,872 INFO L225 Difference]: With dead ends: 67084 [2019-12-07 20:06:14,872 INFO L226 Difference]: Without dead ends: 67084 [2019-12-07 20:06:14,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:15,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67084 states. [2019-12-07 20:06:15,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67084 to 58697. [2019-12-07 20:06:15,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58697 states. [2019-12-07 20:06:15,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58697 states to 58697 states and 188868 transitions. [2019-12-07 20:06:15,899 INFO L78 Accepts]: Start accepts. Automaton has 58697 states and 188868 transitions. Word has length 28 [2019-12-07 20:06:15,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:15,899 INFO L462 AbstractCegarLoop]: Abstraction has 58697 states and 188868 transitions. [2019-12-07 20:06:15,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:15,899 INFO L276 IsEmpty]: Start isEmpty. Operand 58697 states and 188868 transitions. [2019-12-07 20:06:15,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 20:06:15,924 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:15,924 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:15,924 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:15,924 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:15,924 INFO L82 PathProgramCache]: Analyzing trace with hash -915242211, now seen corresponding path program 1 times [2019-12-07 20:06:15,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:15,925 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552214905] [2019-12-07 20:06:15,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:15,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:15,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:15,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552214905] [2019-12-07 20:06:15,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:15,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:15,977 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1665087460] [2019-12-07 20:06:15,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:06:15,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:15,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:06:15,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:15,978 INFO L87 Difference]: Start difference. First operand 58697 states and 188868 transitions. Second operand 4 states. [2019-12-07 20:06:16,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:16,309 INFO L93 Difference]: Finished difference Result 108642 states and 348920 transitions. [2019-12-07 20:06:16,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:16,310 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 20:06:16,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:16,452 INFO L225 Difference]: With dead ends: 108642 [2019-12-07 20:06:16,452 INFO L226 Difference]: Without dead ends: 93794 [2019-12-07 20:06:16,452 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:16,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93794 states. [2019-12-07 20:06:17,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93794 to 91868. [2019-12-07 20:06:17,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91868 states. [2019-12-07 20:06:18,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91868 states to 91868 states and 294836 transitions. [2019-12-07 20:06:18,168 INFO L78 Accepts]: Start accepts. Automaton has 91868 states and 294836 transitions. Word has length 29 [2019-12-07 20:06:18,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:18,168 INFO L462 AbstractCegarLoop]: Abstraction has 91868 states and 294836 transitions. [2019-12-07 20:06:18,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:18,168 INFO L276 IsEmpty]: Start isEmpty. Operand 91868 states and 294836 transitions. [2019-12-07 20:06:18,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 20:06:18,208 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:18,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:18,208 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:18,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:18,208 INFO L82 PathProgramCache]: Analyzing trace with hash -119322298, now seen corresponding path program 1 times [2019-12-07 20:06:18,209 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:18,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958797144] [2019-12-07 20:06:18,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:18,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:18,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:18,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958797144] [2019-12-07 20:06:18,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:18,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:18,245 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [567554550] [2019-12-07 20:06:18,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:18,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:18,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:18,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:18,246 INFO L87 Difference]: Start difference. First operand 91868 states and 294836 transitions. Second operand 3 states. [2019-12-07 20:06:18,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:18,671 INFO L93 Difference]: Finished difference Result 146988 states and 476083 transitions. [2019-12-07 20:06:18,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:18,671 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 20:06:18,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:18,784 INFO L225 Difference]: With dead ends: 146988 [2019-12-07 20:06:18,784 INFO L226 Difference]: Without dead ends: 69085 [2019-12-07 20:06:18,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:19,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69085 states. [2019-12-07 20:06:19,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69085 to 67077. [2019-12-07 20:06:19,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67077 states. [2019-12-07 20:06:20,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67077 states to 67077 states and 214586 transitions. [2019-12-07 20:06:20,099 INFO L78 Accepts]: Start accepts. Automaton has 67077 states and 214586 transitions. Word has length 30 [2019-12-07 20:06:20,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:20,100 INFO L462 AbstractCegarLoop]: Abstraction has 67077 states and 214586 transitions. [2019-12-07 20:06:20,100 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:20,100 INFO L276 IsEmpty]: Start isEmpty. Operand 67077 states and 214586 transitions. [2019-12-07 20:06:20,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 20:06:20,137 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:20,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:20,137 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:20,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:20,138 INFO L82 PathProgramCache]: Analyzing trace with hash 2123509336, now seen corresponding path program 1 times [2019-12-07 20:06:20,138 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:20,138 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098779123] [2019-12-07 20:06:20,138 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:20,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:20,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:20,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098779123] [2019-12-07 20:06:20,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:20,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:20,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1099551242] [2019-12-07 20:06:20,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:20,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:20,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:20,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:20,186 INFO L87 Difference]: Start difference. First operand 67077 states and 214586 transitions. Second operand 5 states. [2019-12-07 20:06:20,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:20,810 INFO L93 Difference]: Finished difference Result 95569 states and 301825 transitions. [2019-12-07 20:06:20,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:20,811 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 20:06:20,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:20,950 INFO L225 Difference]: With dead ends: 95569 [2019-12-07 20:06:20,950 INFO L226 Difference]: Without dead ends: 95520 [2019-12-07 20:06:20,950 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:21,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95520 states. [2019-12-07 20:06:22,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95520 to 78922. [2019-12-07 20:06:22,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78922 states. [2019-12-07 20:06:22,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78922 states to 78922 states and 252350 transitions. [2019-12-07 20:06:22,357 INFO L78 Accepts]: Start accepts. Automaton has 78922 states and 252350 transitions. Word has length 30 [2019-12-07 20:06:22,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:22,357 INFO L462 AbstractCegarLoop]: Abstraction has 78922 states and 252350 transitions. [2019-12-07 20:06:22,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:22,357 INFO L276 IsEmpty]: Start isEmpty. Operand 78922 states and 252350 transitions. [2019-12-07 20:06:22,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 20:06:22,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:22,400 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:22,400 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:22,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:22,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1544975794, now seen corresponding path program 1 times [2019-12-07 20:06:22,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:22,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86403168] [2019-12-07 20:06:22,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:22,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:22,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:22,435 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [86403168] [2019-12-07 20:06:22,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:22,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:22,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556702198] [2019-12-07 20:06:22,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:06:22,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:22,436 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:06:22,436 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:22,436 INFO L87 Difference]: Start difference. First operand 78922 states and 252350 transitions. Second operand 4 states. [2019-12-07 20:06:22,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:22,545 INFO L93 Difference]: Finished difference Result 35292 states and 106892 transitions. [2019-12-07 20:06:22,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:22,545 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 20:06:22,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:22,590 INFO L225 Difference]: With dead ends: 35292 [2019-12-07 20:06:22,591 INFO L226 Difference]: Without dead ends: 35264 [2019-12-07 20:06:22,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:22,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35264 states. [2019-12-07 20:06:23,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35264 to 32353. [2019-12-07 20:06:23,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32353 states. [2019-12-07 20:06:23,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32353 states to 32353 states and 99402 transitions. [2019-12-07 20:06:23,173 INFO L78 Accepts]: Start accepts. Automaton has 32353 states and 99402 transitions. Word has length 31 [2019-12-07 20:06:23,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:23,173 INFO L462 AbstractCegarLoop]: Abstraction has 32353 states and 99402 transitions. [2019-12-07 20:06:23,173 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:23,174 INFO L276 IsEmpty]: Start isEmpty. Operand 32353 states and 99402 transitions. [2019-12-07 20:06:23,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 20:06:23,202 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:23,202 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:23,202 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:23,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:23,202 INFO L82 PathProgramCache]: Analyzing trace with hash 1850577991, now seen corresponding path program 1 times [2019-12-07 20:06:23,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:23,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444039285] [2019-12-07 20:06:23,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:23,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:23,248 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:23,249 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1444039285] [2019-12-07 20:06:23,249 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:23,249 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:23,249 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633731991] [2019-12-07 20:06:23,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:23,250 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:23,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:23,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:23,250 INFO L87 Difference]: Start difference. First operand 32353 states and 99402 transitions. Second operand 6 states. [2019-12-07 20:06:23,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:23,683 INFO L93 Difference]: Finished difference Result 40068 states and 120305 transitions. [2019-12-07 20:06:23,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 20:06:23,683 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 20:06:23,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:23,727 INFO L225 Difference]: With dead ends: 40068 [2019-12-07 20:06:23,727 INFO L226 Difference]: Without dead ends: 40068 [2019-12-07 20:06:23,727 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:06:23,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40068 states. [2019-12-07 20:06:24,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40068 to 33995. [2019-12-07 20:06:24,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33995 states. [2019-12-07 20:06:24,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33995 states to 33995 states and 104058 transitions. [2019-12-07 20:06:24,231 INFO L78 Accepts]: Start accepts. Automaton has 33995 states and 104058 transitions. Word has length 33 [2019-12-07 20:06:24,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:24,231 INFO L462 AbstractCegarLoop]: Abstraction has 33995 states and 104058 transitions. [2019-12-07 20:06:24,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:24,231 INFO L276 IsEmpty]: Start isEmpty. Operand 33995 states and 104058 transitions. [2019-12-07 20:06:24,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 20:06:24,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:24,260 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:24,260 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:24,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:24,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1933444630, now seen corresponding path program 1 times [2019-12-07 20:06:24,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:24,261 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121780688] [2019-12-07 20:06:24,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:24,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:24,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:24,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121780688] [2019-12-07 20:06:24,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:24,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:24,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1103676570] [2019-12-07 20:06:24,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:24,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:24,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:24,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:24,306 INFO L87 Difference]: Start difference. First operand 33995 states and 104058 transitions. Second operand 6 states. [2019-12-07 20:06:24,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:24,741 INFO L93 Difference]: Finished difference Result 40177 states and 120525 transitions. [2019-12-07 20:06:24,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 20:06:24,741 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 20:06:24,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:24,788 INFO L225 Difference]: With dead ends: 40177 [2019-12-07 20:06:24,788 INFO L226 Difference]: Without dead ends: 40177 [2019-12-07 20:06:24,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:06:24,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40177 states. [2019-12-07 20:06:25,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40177 to 32676. [2019-12-07 20:06:25,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32676 states. [2019-12-07 20:06:25,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32676 states to 32676 states and 100446 transitions. [2019-12-07 20:06:25,308 INFO L78 Accepts]: Start accepts. Automaton has 32676 states and 100446 transitions. Word has length 34 [2019-12-07 20:06:25,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:25,308 INFO L462 AbstractCegarLoop]: Abstraction has 32676 states and 100446 transitions. [2019-12-07 20:06:25,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:25,308 INFO L276 IsEmpty]: Start isEmpty. Operand 32676 states and 100446 transitions. [2019-12-07 20:06:25,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 20:06:25,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:25,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:25,340 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:25,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:25,340 INFO L82 PathProgramCache]: Analyzing trace with hash 838743556, now seen corresponding path program 1 times [2019-12-07 20:06:25,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:25,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [710695851] [2019-12-07 20:06:25,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:25,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:25,371 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:25,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [710695851] [2019-12-07 20:06:25,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:25,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:25,372 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455671900] [2019-12-07 20:06:25,372 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:25,372 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:25,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:25,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:25,373 INFO L87 Difference]: Start difference. First operand 32676 states and 100446 transitions. Second operand 3 states. [2019-12-07 20:06:25,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:25,465 INFO L93 Difference]: Finished difference Result 32676 states and 100342 transitions. [2019-12-07 20:06:25,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:25,465 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 20:06:25,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:25,506 INFO L225 Difference]: With dead ends: 32676 [2019-12-07 20:06:25,506 INFO L226 Difference]: Without dead ends: 32676 [2019-12-07 20:06:25,506 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:25,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32676 states. [2019-12-07 20:06:25,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32676 to 27985. [2019-12-07 20:06:25,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27985 states. [2019-12-07 20:06:26,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27985 states to 27985 states and 87227 transitions. [2019-12-07 20:06:26,039 INFO L78 Accepts]: Start accepts. Automaton has 27985 states and 87227 transitions. Word has length 40 [2019-12-07 20:06:26,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:26,039 INFO L462 AbstractCegarLoop]: Abstraction has 27985 states and 87227 transitions. [2019-12-07 20:06:26,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:26,039 INFO L276 IsEmpty]: Start isEmpty. Operand 27985 states and 87227 transitions. [2019-12-07 20:06:26,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 20:06:26,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:26,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:26,066 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:26,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:26,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1643678037, now seen corresponding path program 1 times [2019-12-07 20:06:26,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:26,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781161148] [2019-12-07 20:06:26,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:26,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:26,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:26,112 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781161148] [2019-12-07 20:06:26,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:26,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:26,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343779010] [2019-12-07 20:06:26,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:26,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:26,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:26,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:26,113 INFO L87 Difference]: Start difference. First operand 27985 states and 87227 transitions. Second operand 5 states. [2019-12-07 20:06:26,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:26,199 INFO L93 Difference]: Finished difference Result 26437 states and 83709 transitions. [2019-12-07 20:06:26,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:06:26,199 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 20:06:26,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:26,231 INFO L225 Difference]: With dead ends: 26437 [2019-12-07 20:06:26,231 INFO L226 Difference]: Without dead ends: 24502 [2019-12-07 20:06:26,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:26,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24502 states. [2019-12-07 20:06:26,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24502 to 15253. [2019-12-07 20:06:26,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15253 states. [2019-12-07 20:06:26,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15253 states to 15253 states and 48738 transitions. [2019-12-07 20:06:26,514 INFO L78 Accepts]: Start accepts. Automaton has 15253 states and 48738 transitions. Word has length 41 [2019-12-07 20:06:26,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:26,514 INFO L462 AbstractCegarLoop]: Abstraction has 15253 states and 48738 transitions. [2019-12-07 20:06:26,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:26,514 INFO L276 IsEmpty]: Start isEmpty. Operand 15253 states and 48738 transitions. [2019-12-07 20:06:26,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 20:06:26,529 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:26,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:26,529 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:26,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:26,529 INFO L82 PathProgramCache]: Analyzing trace with hash 271494471, now seen corresponding path program 1 times [2019-12-07 20:06:26,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:26,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801051835] [2019-12-07 20:06:26,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:26,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:26,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:26,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801051835] [2019-12-07 20:06:26,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:26,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:26,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136452264] [2019-12-07 20:06:26,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:26,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:26,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:26,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:26,563 INFO L87 Difference]: Start difference. First operand 15253 states and 48738 transitions. Second operand 3 states. [2019-12-07 20:06:26,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:26,626 INFO L93 Difference]: Finished difference Result 19175 states and 59110 transitions. [2019-12-07 20:06:26,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:26,626 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 20:06:26,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:26,647 INFO L225 Difference]: With dead ends: 19175 [2019-12-07 20:06:26,647 INFO L226 Difference]: Without dead ends: 19175 [2019-12-07 20:06:26,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:26,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19175 states. [2019-12-07 20:06:26,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19175 to 15386. [2019-12-07 20:06:26,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15386 states. [2019-12-07 20:06:26,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15386 states to 15386 states and 47500 transitions. [2019-12-07 20:06:26,885 INFO L78 Accepts]: Start accepts. Automaton has 15386 states and 47500 transitions. Word has length 65 [2019-12-07 20:06:26,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:26,886 INFO L462 AbstractCegarLoop]: Abstraction has 15386 states and 47500 transitions. [2019-12-07 20:06:26,886 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:26,886 INFO L276 IsEmpty]: Start isEmpty. Operand 15386 states and 47500 transitions. [2019-12-07 20:06:26,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 20:06:26,900 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:26,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:26,900 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:26,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:26,900 INFO L82 PathProgramCache]: Analyzing trace with hash 1140133167, now seen corresponding path program 1 times [2019-12-07 20:06:26,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:26,901 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946388273] [2019-12-07 20:06:26,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:26,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:26,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:26,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [946388273] [2019-12-07 20:06:26,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:26,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:26,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [701351607] [2019-12-07 20:06:26,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:26,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:26,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:26,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:26,938 INFO L87 Difference]: Start difference. First operand 15386 states and 47500 transitions. Second operand 3 states. [2019-12-07 20:06:27,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:27,017 INFO L93 Difference]: Finished difference Result 18463 states and 56984 transitions. [2019-12-07 20:06:27,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:27,017 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 20:06:27,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:27,040 INFO L225 Difference]: With dead ends: 18463 [2019-12-07 20:06:27,040 INFO L226 Difference]: Without dead ends: 18463 [2019-12-07 20:06:27,040 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:27,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18463 states. [2019-12-07 20:06:27,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18463 to 14513. [2019-12-07 20:06:27,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14513 states. [2019-12-07 20:06:27,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14513 states to 14513 states and 45201 transitions. [2019-12-07 20:06:27,280 INFO L78 Accepts]: Start accepts. Automaton has 14513 states and 45201 transitions. Word has length 65 [2019-12-07 20:06:27,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:27,281 INFO L462 AbstractCegarLoop]: Abstraction has 14513 states and 45201 transitions. [2019-12-07 20:06:27,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:27,281 INFO L276 IsEmpty]: Start isEmpty. Operand 14513 states and 45201 transitions. [2019-12-07 20:06:27,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:27,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:27,294 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:27,294 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:27,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:27,295 INFO L82 PathProgramCache]: Analyzing trace with hash 102846808, now seen corresponding path program 1 times [2019-12-07 20:06:27,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:27,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274337871] [2019-12-07 20:06:27,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:27,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:27,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:27,335 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1274337871] [2019-12-07 20:06:27,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:27,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:27,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743996877] [2019-12-07 20:06:27,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:06:27,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:27,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:06:27,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:27,336 INFO L87 Difference]: Start difference. First operand 14513 states and 45201 transitions. Second operand 4 states. [2019-12-07 20:06:27,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:27,417 INFO L93 Difference]: Finished difference Result 14513 states and 44991 transitions. [2019-12-07 20:06:27,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:27,417 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 20:06:27,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:27,434 INFO L225 Difference]: With dead ends: 14513 [2019-12-07 20:06:27,434 INFO L226 Difference]: Without dead ends: 14513 [2019-12-07 20:06:27,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:27,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14513 states. [2019-12-07 20:06:27,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14513 to 13033. [2019-12-07 20:06:27,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13033 states. [2019-12-07 20:06:27,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13033 states to 13033 states and 40339 transitions. [2019-12-07 20:06:27,636 INFO L78 Accepts]: Start accepts. Automaton has 13033 states and 40339 transitions. Word has length 66 [2019-12-07 20:06:27,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:27,636 INFO L462 AbstractCegarLoop]: Abstraction has 13033 states and 40339 transitions. [2019-12-07 20:06:27,636 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:27,636 INFO L276 IsEmpty]: Start isEmpty. Operand 13033 states and 40339 transitions. [2019-12-07 20:06:27,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:27,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:27,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:27,649 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:27,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:27,649 INFO L82 PathProgramCache]: Analyzing trace with hash -164509265, now seen corresponding path program 1 times [2019-12-07 20:06:27,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:27,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696897170] [2019-12-07 20:06:27,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:27,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:27,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:27,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696897170] [2019-12-07 20:06:27,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:27,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:27,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704784140] [2019-12-07 20:06:27,718 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:27,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:27,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:27,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:27,718 INFO L87 Difference]: Start difference. First operand 13033 states and 40339 transitions. Second operand 6 states. [2019-12-07 20:06:27,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:27,986 INFO L93 Difference]: Finished difference Result 50539 states and 154831 transitions. [2019-12-07 20:06:27,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 20:06:27,986 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 20:06:27,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:28,034 INFO L225 Difference]: With dead ends: 50539 [2019-12-07 20:06:28,034 INFO L226 Difference]: Without dead ends: 38056 [2019-12-07 20:06:28,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:06:28,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38056 states. [2019-12-07 20:06:28,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38056 to 15301. [2019-12-07 20:06:28,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15301 states. [2019-12-07 20:06:28,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15301 states to 15301 states and 47388 transitions. [2019-12-07 20:06:28,404 INFO L78 Accepts]: Start accepts. Automaton has 15301 states and 47388 transitions. Word has length 66 [2019-12-07 20:06:28,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:28,404 INFO L462 AbstractCegarLoop]: Abstraction has 15301 states and 47388 transitions. [2019-12-07 20:06:28,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:28,404 INFO L276 IsEmpty]: Start isEmpty. Operand 15301 states and 47388 transitions. [2019-12-07 20:06:28,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:28,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:28,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:28,419 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:28,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:28,419 INFO L82 PathProgramCache]: Analyzing trace with hash 1456487745, now seen corresponding path program 2 times [2019-12-07 20:06:28,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:28,419 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145467399] [2019-12-07 20:06:28,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:28,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:28,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:28,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145467399] [2019-12-07 20:06:28,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:28,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:28,478 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831127688] [2019-12-07 20:06:28,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:28,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:28,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:28,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:28,479 INFO L87 Difference]: Start difference. First operand 15301 states and 47388 transitions. Second operand 6 states. [2019-12-07 20:06:28,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:28,766 INFO L93 Difference]: Finished difference Result 55893 states and 169523 transitions. [2019-12-07 20:06:28,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 20:06:28,766 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 20:06:28,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:28,815 INFO L225 Difference]: With dead ends: 55893 [2019-12-07 20:06:28,815 INFO L226 Difference]: Without dead ends: 41787 [2019-12-07 20:06:28,815 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:06:28,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41787 states. [2019-12-07 20:06:29,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41787 to 17636. [2019-12-07 20:06:29,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17636 states. [2019-12-07 20:06:29,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17636 states to 17636 states and 54344 transitions. [2019-12-07 20:06:29,288 INFO L78 Accepts]: Start accepts. Automaton has 17636 states and 54344 transitions. Word has length 66 [2019-12-07 20:06:29,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:29,288 INFO L462 AbstractCegarLoop]: Abstraction has 17636 states and 54344 transitions. [2019-12-07 20:06:29,288 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:29,288 INFO L276 IsEmpty]: Start isEmpty. Operand 17636 states and 54344 transitions. [2019-12-07 20:06:29,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:29,304 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:29,304 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:29,304 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:29,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:29,305 INFO L82 PathProgramCache]: Analyzing trace with hash 141708821, now seen corresponding path program 3 times [2019-12-07 20:06:29,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:29,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1042915106] [2019-12-07 20:06:29,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:29,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:29,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:29,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1042915106] [2019-12-07 20:06:29,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:29,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:29,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188535641] [2019-12-07 20:06:29,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:06:29,357 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:29,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:06:29,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:29,357 INFO L87 Difference]: Start difference. First operand 17636 states and 54344 transitions. Second operand 4 states. [2019-12-07 20:06:29,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:29,434 INFO L93 Difference]: Finished difference Result 31415 states and 96710 transitions. [2019-12-07 20:06:29,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:29,434 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 20:06:29,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:29,450 INFO L225 Difference]: With dead ends: 31415 [2019-12-07 20:06:29,451 INFO L226 Difference]: Without dead ends: 14046 [2019-12-07 20:06:29,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:29,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14046 states. [2019-12-07 20:06:29,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14046 to 14046. [2019-12-07 20:06:29,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14046 states. [2019-12-07 20:06:29,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14046 states to 14046 states and 42979 transitions. [2019-12-07 20:06:29,652 INFO L78 Accepts]: Start accepts. Automaton has 14046 states and 42979 transitions. Word has length 66 [2019-12-07 20:06:29,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:29,653 INFO L462 AbstractCegarLoop]: Abstraction has 14046 states and 42979 transitions. [2019-12-07 20:06:29,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:29,653 INFO L276 IsEmpty]: Start isEmpty. Operand 14046 states and 42979 transitions. [2019-12-07 20:06:29,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:29,666 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:29,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:29,667 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:29,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:29,667 INFO L82 PathProgramCache]: Analyzing trace with hash 635155811, now seen corresponding path program 4 times [2019-12-07 20:06:29,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:29,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [263439161] [2019-12-07 20:06:29,667 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:29,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:29,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:29,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [263439161] [2019-12-07 20:06:29,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:29,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 20:06:29,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2006000007] [2019-12-07 20:06:29,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:29,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:29,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:29,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:29,723 INFO L87 Difference]: Start difference. First operand 14046 states and 42979 transitions. Second operand 6 states. [2019-12-07 20:06:30,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:30,123 INFO L93 Difference]: Finished difference Result 18418 states and 55106 transitions. [2019-12-07 20:06:30,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 20:06:30,123 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 20:06:30,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:30,142 INFO L225 Difference]: With dead ends: 18418 [2019-12-07 20:06:30,142 INFO L226 Difference]: Without dead ends: 18418 [2019-12-07 20:06:30,142 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 20:06:30,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18418 states. [2019-12-07 20:06:30,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18418 to 14058. [2019-12-07 20:06:30,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14058 states. [2019-12-07 20:06:30,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14058 states to 14058 states and 43013 transitions. [2019-12-07 20:06:30,375 INFO L78 Accepts]: Start accepts. Automaton has 14058 states and 43013 transitions. Word has length 66 [2019-12-07 20:06:30,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:30,375 INFO L462 AbstractCegarLoop]: Abstraction has 14058 states and 43013 transitions. [2019-12-07 20:06:30,375 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:30,375 INFO L276 IsEmpty]: Start isEmpty. Operand 14058 states and 43013 transitions. [2019-12-07 20:06:30,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:30,388 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:30,388 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:30,389 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:30,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:30,389 INFO L82 PathProgramCache]: Analyzing trace with hash -597516091, now seen corresponding path program 5 times [2019-12-07 20:06:30,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:30,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310043046] [2019-12-07 20:06:30,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:30,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:30,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:30,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310043046] [2019-12-07 20:06:30,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:30,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:06:30,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653943764] [2019-12-07 20:06:30,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:06:30,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:30,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:06:30,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:30,456 INFO L87 Difference]: Start difference. First operand 14058 states and 43013 transitions. Second operand 7 states. [2019-12-07 20:06:30,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:30,972 INFO L93 Difference]: Finished difference Result 18472 states and 55241 transitions. [2019-12-07 20:06:30,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 20:06:30,972 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 20:06:30,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:30,997 INFO L225 Difference]: With dead ends: 18472 [2019-12-07 20:06:30,997 INFO L226 Difference]: Without dead ends: 18472 [2019-12-07 20:06:30,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 20:06:31,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18472 states. [2019-12-07 20:06:31,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18472 to 14064. [2019-12-07 20:06:31,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14064 states. [2019-12-07 20:06:31,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14064 states to 14064 states and 43030 transitions. [2019-12-07 20:06:31,241 INFO L78 Accepts]: Start accepts. Automaton has 14064 states and 43030 transitions. Word has length 66 [2019-12-07 20:06:31,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:31,241 INFO L462 AbstractCegarLoop]: Abstraction has 14064 states and 43030 transitions. [2019-12-07 20:06:31,242 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:06:31,242 INFO L276 IsEmpty]: Start isEmpty. Operand 14064 states and 43030 transitions. [2019-12-07 20:06:31,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:31,255 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:31,255 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:31,255 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:31,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:31,255 INFO L82 PathProgramCache]: Analyzing trace with hash -1710344371, now seen corresponding path program 6 times [2019-12-07 20:06:31,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:31,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763396474] [2019-12-07 20:06:31,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:31,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:31,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:31,335 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763396474] [2019-12-07 20:06:31,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:31,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:06:31,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869786358] [2019-12-07 20:06:31,335 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 20:06:31,335 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:31,335 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 20:06:31,335 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 20:06:31,335 INFO L87 Difference]: Start difference. First operand 14064 states and 43030 transitions. Second operand 8 states. [2019-12-07 20:06:31,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:31,788 INFO L93 Difference]: Finished difference Result 23475 states and 70369 transitions. [2019-12-07 20:06:31,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 20:06:31,788 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 20:06:31,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:31,810 INFO L225 Difference]: With dead ends: 23475 [2019-12-07 20:06:31,810 INFO L226 Difference]: Without dead ends: 21103 [2019-12-07 20:06:31,810 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2019-12-07 20:06:31,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21103 states. [2019-12-07 20:06:32,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21103 to 14049. [2019-12-07 20:06:32,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14049 states. [2019-12-07 20:06:32,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14049 states to 14049 states and 42962 transitions. [2019-12-07 20:06:32,058 INFO L78 Accepts]: Start accepts. Automaton has 14049 states and 42962 transitions. Word has length 66 [2019-12-07 20:06:32,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:32,058 INFO L462 AbstractCegarLoop]: Abstraction has 14049 states and 42962 transitions. [2019-12-07 20:06:32,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 20:06:32,059 INFO L276 IsEmpty]: Start isEmpty. Operand 14049 states and 42962 transitions. [2019-12-07 20:06:32,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:32,071 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:32,071 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:32,072 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:32,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:32,072 INFO L82 PathProgramCache]: Analyzing trace with hash -89347361, now seen corresponding path program 7 times [2019-12-07 20:06:32,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:32,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757239303] [2019-12-07 20:06:32,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:32,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:32,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:32,225 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757239303] [2019-12-07 20:06:32,225 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:32,225 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 20:06:32,225 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1347578096] [2019-12-07 20:06:32,226 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 20:06:32,226 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:32,226 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 20:06:32,226 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:06:32,226 INFO L87 Difference]: Start difference. First operand 14049 states and 42962 transitions. Second operand 11 states. [2019-12-07 20:06:33,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:33,415 INFO L93 Difference]: Finished difference Result 23442 states and 69729 transitions. [2019-12-07 20:06:33,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 20:06:33,415 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 20:06:33,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:33,436 INFO L225 Difference]: With dead ends: 23442 [2019-12-07 20:06:33,436 INFO L226 Difference]: Without dead ends: 17599 [2019-12-07 20:06:33,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 282 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=245, Invalid=945, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 20:06:33,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17599 states. [2019-12-07 20:06:33,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17599 to 14152. [2019-12-07 20:06:33,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14152 states. [2019-12-07 20:06:33,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14152 states to 14152 states and 43266 transitions. [2019-12-07 20:06:33,657 INFO L78 Accepts]: Start accepts. Automaton has 14152 states and 43266 transitions. Word has length 66 [2019-12-07 20:06:33,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:33,657 INFO L462 AbstractCegarLoop]: Abstraction has 14152 states and 43266 transitions. [2019-12-07 20:06:33,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 20:06:33,658 INFO L276 IsEmpty]: Start isEmpty. Operand 14152 states and 43266 transitions. [2019-12-07 20:06:33,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:33,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:33,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:33,671 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:33,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:33,671 INFO L82 PathProgramCache]: Analyzing trace with hash -2068925791, now seen corresponding path program 8 times [2019-12-07 20:06:33,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:33,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494211246] [2019-12-07 20:06:33,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:33,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:33,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:33,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494211246] [2019-12-07 20:06:33,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:33,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 20:06:33,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1616072955] [2019-12-07 20:06:33,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:06:33,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:33,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:06:33,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:06:33,965 INFO L87 Difference]: Start difference. First operand 14152 states and 43266 transitions. Second operand 15 states. [2019-12-07 20:06:35,776 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 27 [2019-12-07 20:06:35,988 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 25 [2019-12-07 20:06:36,640 WARN L192 SmtUtils]: Spent 200.00 ms on a formula simplification. DAG size of input: 28 DAG size of output: 26 [2019-12-07 20:06:36,912 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 20:06:37,375 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 26 DAG size of output: 25 [2019-12-07 20:06:38,281 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 30 DAG size of output: 28 [2019-12-07 20:06:39,100 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 24 DAG size of output: 23 [2019-12-07 20:06:40,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:40,358 INFO L93 Difference]: Finished difference Result 32577 states and 94500 transitions. [2019-12-07 20:06:40,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 20:06:40,358 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 20:06:40,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:40,392 INFO L225 Difference]: With dead ends: 32577 [2019-12-07 20:06:40,392 INFO L226 Difference]: Without dead ends: 29227 [2019-12-07 20:06:40,394 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 19 SyntacticMatches, 1 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1328 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=590, Invalid=3570, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 20:06:40,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29227 states. [2019-12-07 20:06:40,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29227 to 14992. [2019-12-07 20:06:40,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14992 states. [2019-12-07 20:06:40,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14992 states to 14992 states and 45830 transitions. [2019-12-07 20:06:40,713 INFO L78 Accepts]: Start accepts. Automaton has 14992 states and 45830 transitions. Word has length 66 [2019-12-07 20:06:40,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:40,713 INFO L462 AbstractCegarLoop]: Abstraction has 14992 states and 45830 transitions. [2019-12-07 20:06:40,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:06:40,714 INFO L276 IsEmpty]: Start isEmpty. Operand 14992 states and 45830 transitions. [2019-12-07 20:06:40,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:40,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:40,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:40,728 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:40,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:40,728 INFO L82 PathProgramCache]: Analyzing trace with hash 1981652493, now seen corresponding path program 9 times [2019-12-07 20:06:40,728 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:40,728 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774459919] [2019-12-07 20:06:40,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:40,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:40,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:40,976 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774459919] [2019-12-07 20:06:40,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:40,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 20:06:40,976 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2038950674] [2019-12-07 20:06:40,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:06:40,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:40,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:06:40,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:06:40,977 INFO L87 Difference]: Start difference. First operand 14992 states and 45830 transitions. Second operand 15 states. [2019-12-07 20:06:45,623 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 29 DAG size of output: 23 [2019-12-07 20:06:47,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:47,962 INFO L93 Difference]: Finished difference Result 42093 states and 122322 transitions. [2019-12-07 20:06:47,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2019-12-07 20:06:47,962 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 66 [2019-12-07 20:06:47,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:48,009 INFO L225 Difference]: With dead ends: 42093 [2019-12-07 20:06:48,009 INFO L226 Difference]: Without dead ends: 38280 [2019-12-07 20:06:48,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1411 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=624, Invalid=3798, Unknown=0, NotChecked=0, Total=4422 [2019-12-07 20:06:48,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38280 states. [2019-12-07 20:06:48,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38280 to 14971. [2019-12-07 20:06:48,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14971 states. [2019-12-07 20:06:48,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14971 states to 14971 states and 45755 transitions. [2019-12-07 20:06:48,399 INFO L78 Accepts]: Start accepts. Automaton has 14971 states and 45755 transitions. Word has length 66 [2019-12-07 20:06:48,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:48,399 INFO L462 AbstractCegarLoop]: Abstraction has 14971 states and 45755 transitions. [2019-12-07 20:06:48,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:06:48,399 INFO L276 IsEmpty]: Start isEmpty. Operand 14971 states and 45755 transitions. [2019-12-07 20:06:48,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 20:06:48,413 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:48,413 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:48,414 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:48,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:48,414 INFO L82 PathProgramCache]: Analyzing trace with hash 1403464635, now seen corresponding path program 10 times [2019-12-07 20:06:48,414 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:48,414 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799678761] [2019-12-07 20:06:48,414 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:48,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:48,449 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:48,449 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799678761] [2019-12-07 20:06:48,449 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:48,449 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:48,449 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900075726] [2019-12-07 20:06:48,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:48,449 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:48,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:48,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:48,450 INFO L87 Difference]: Start difference. First operand 14971 states and 45755 transitions. Second operand 3 states. [2019-12-07 20:06:48,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:48,483 INFO L93 Difference]: Finished difference Result 10763 states and 32381 transitions. [2019-12-07 20:06:48,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:48,484 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 20:06:48,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:48,495 INFO L225 Difference]: With dead ends: 10763 [2019-12-07 20:06:48,495 INFO L226 Difference]: Without dead ends: 10763 [2019-12-07 20:06:48,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:48,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10763 states. [2019-12-07 20:06:48,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10763 to 10435. [2019-12-07 20:06:48,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10435 states. [2019-12-07 20:06:48,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10435 states to 10435 states and 31439 transitions. [2019-12-07 20:06:48,689 INFO L78 Accepts]: Start accepts. Automaton has 10435 states and 31439 transitions. Word has length 66 [2019-12-07 20:06:48,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:48,689 INFO L462 AbstractCegarLoop]: Abstraction has 10435 states and 31439 transitions. [2019-12-07 20:06:48,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:48,690 INFO L276 IsEmpty]: Start isEmpty. Operand 10435 states and 31439 transitions. [2019-12-07 20:06:48,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:06:48,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:48,698 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:48,698 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:48,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:48,699 INFO L82 PathProgramCache]: Analyzing trace with hash 28997027, now seen corresponding path program 1 times [2019-12-07 20:06:48,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:48,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247862180] [2019-12-07 20:06:48,699 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:48,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:49,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:49,046 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247862180] [2019-12-07 20:06:49,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:49,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 20:06:49,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [712901910] [2019-12-07 20:06:49,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 20:06:49,047 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:49,047 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 20:06:49,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2019-12-07 20:06:49,047 INFO L87 Difference]: Start difference. First operand 10435 states and 31439 transitions. Second operand 16 states. [2019-12-07 20:06:51,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:51,495 INFO L93 Difference]: Finished difference Result 21308 states and 62611 transitions. [2019-12-07 20:06:51,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2019-12-07 20:06:51,495 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 20:06:51,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:51,511 INFO L225 Difference]: With dead ends: 21308 [2019-12-07 20:06:51,511 INFO L226 Difference]: Without dead ends: 15496 [2019-12-07 20:06:51,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1875 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=884, Invalid=4518, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 20:06:51,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15496 states. [2019-12-07 20:06:51,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15496 to 11366. [2019-12-07 20:06:51,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11366 states. [2019-12-07 20:06:51,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11366 states to 11366 states and 33787 transitions. [2019-12-07 20:06:51,695 INFO L78 Accepts]: Start accepts. Automaton has 11366 states and 33787 transitions. Word has length 67 [2019-12-07 20:06:51,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:51,696 INFO L462 AbstractCegarLoop]: Abstraction has 11366 states and 33787 transitions. [2019-12-07 20:06:51,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 20:06:51,696 INFO L276 IsEmpty]: Start isEmpty. Operand 11366 states and 33787 transitions. [2019-12-07 20:06:51,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:06:51,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:51,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:51,706 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:51,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:51,706 INFO L82 PathProgramCache]: Analyzing trace with hash -1388361059, now seen corresponding path program 2 times [2019-12-07 20:06:51,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:51,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093712721] [2019-12-07 20:06:51,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:51,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:52,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:52,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093712721] [2019-12-07 20:06:52,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:52,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:06:52,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1025210253] [2019-12-07 20:06:52,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:06:52,057 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:52,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:06:52,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:06:52,058 INFO L87 Difference]: Start difference. First operand 11366 states and 33787 transitions. Second operand 17 states. [2019-12-07 20:06:57,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:57,029 INFO L93 Difference]: Finished difference Result 19750 states and 57413 transitions. [2019-12-07 20:06:57,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2019-12-07 20:06:57,030 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 20:06:57,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:57,057 INFO L225 Difference]: With dead ends: 19750 [2019-12-07 20:06:57,057 INFO L226 Difference]: Without dead ends: 16255 [2019-12-07 20:06:57,059 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2014 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=947, Invalid=4905, Unknown=0, NotChecked=0, Total=5852 [2019-12-07 20:06:57,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16255 states. [2019-12-07 20:06:57,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16255 to 11268. [2019-12-07 20:06:57,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11268 states. [2019-12-07 20:06:57,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11268 states to 11268 states and 33399 transitions. [2019-12-07 20:06:57,256 INFO L78 Accepts]: Start accepts. Automaton has 11268 states and 33399 transitions. Word has length 67 [2019-12-07 20:06:57,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:57,256 INFO L462 AbstractCegarLoop]: Abstraction has 11268 states and 33399 transitions. [2019-12-07 20:06:57,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:06:57,256 INFO L276 IsEmpty]: Start isEmpty. Operand 11268 states and 33399 transitions. [2019-12-07 20:06:57,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:06:57,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:57,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:57,266 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:57,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:57,267 INFO L82 PathProgramCache]: Analyzing trace with hash 242947123, now seen corresponding path program 3 times [2019-12-07 20:06:57,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:57,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1212847585] [2019-12-07 20:06:57,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:57,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:57,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:57,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1212847585] [2019-12-07 20:06:57,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:57,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 20:06:57,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [100140068] [2019-12-07 20:06:57,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:06:57,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:57,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:06:57,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:06:57,549 INFO L87 Difference]: Start difference. First operand 11268 states and 33399 transitions. Second operand 15 states. [2019-12-07 20:06:57,858 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 32 [2019-12-07 20:06:58,063 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 27 DAG size of output: 26 [2019-12-07 20:07:01,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:01,043 INFO L93 Difference]: Finished difference Result 17713 states and 51853 transitions. [2019-12-07 20:07:01,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2019-12-07 20:07:01,044 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 20:07:01,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:01,060 INFO L225 Difference]: With dead ends: 17713 [2019-12-07 20:07:01,060 INFO L226 Difference]: Without dead ends: 16670 [2019-12-07 20:07:01,062 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2113 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=947, Invalid=5215, Unknown=0, NotChecked=0, Total=6162 [2019-12-07 20:07:01,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16670 states. [2019-12-07 20:07:01,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16670 to 13280. [2019-12-07 20:07:01,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13280 states. [2019-12-07 20:07:01,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13280 states to 13280 states and 39272 transitions. [2019-12-07 20:07:01,268 INFO L78 Accepts]: Start accepts. Automaton has 13280 states and 39272 transitions. Word has length 67 [2019-12-07 20:07:01,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:01,269 INFO L462 AbstractCegarLoop]: Abstraction has 13280 states and 39272 transitions. [2019-12-07 20:07:01,269 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:07:01,269 INFO L276 IsEmpty]: Start isEmpty. Operand 13280 states and 39272 transitions. [2019-12-07 20:07:01,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:01,280 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:01,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:01,281 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:01,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:01,281 INFO L82 PathProgramCache]: Analyzing trace with hash 731890365, now seen corresponding path program 4 times [2019-12-07 20:07:01,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:01,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174674716] [2019-12-07 20:07:01,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:01,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:01,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:01,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174674716] [2019-12-07 20:07:01,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:01,547 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 20:07:01,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568807088] [2019-12-07 20:07:01,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 20:07:01,547 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:01,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 20:07:01,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 20:07:01,547 INFO L87 Difference]: Start difference. First operand 13280 states and 39272 transitions. Second operand 15 states. [2019-12-07 20:07:04,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:04,166 INFO L93 Difference]: Finished difference Result 17233 states and 49915 transitions. [2019-12-07 20:07:04,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2019-12-07 20:07:04,166 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 20:07:04,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:04,180 INFO L225 Difference]: With dead ends: 17233 [2019-12-07 20:07:04,180 INFO L226 Difference]: Without dead ends: 14265 [2019-12-07 20:07:04,182 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2058 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=963, Invalid=5043, Unknown=0, NotChecked=0, Total=6006 [2019-12-07 20:07:04,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14265 states. [2019-12-07 20:07:04,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14265 to 10992. [2019-12-07 20:07:04,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10992 states. [2019-12-07 20:07:04,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10992 states to 10992 states and 32691 transitions. [2019-12-07 20:07:04,356 INFO L78 Accepts]: Start accepts. Automaton has 10992 states and 32691 transitions. Word has length 67 [2019-12-07 20:07:04,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:04,356 INFO L462 AbstractCegarLoop]: Abstraction has 10992 states and 32691 transitions. [2019-12-07 20:07:04,356 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 20:07:04,357 INFO L276 IsEmpty]: Start isEmpty. Operand 10992 states and 32691 transitions. [2019-12-07 20:07:04,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:04,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:04,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:04,366 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:04,366 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:04,366 INFO L82 PathProgramCache]: Analyzing trace with hash 1335595289, now seen corresponding path program 5 times [2019-12-07 20:07:04,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:04,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104760162] [2019-12-07 20:07:04,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:04,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:04,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:04,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104760162] [2019-12-07 20:07:04,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:04,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 20:07:04,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546667263] [2019-12-07 20:07:04,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 20:07:04,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:04,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 20:07:04,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:07:04,540 INFO L87 Difference]: Start difference. First operand 10992 states and 32691 transitions. Second operand 13 states. [2019-12-07 20:07:05,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:05,801 INFO L93 Difference]: Finished difference Result 19286 states and 56217 transitions. [2019-12-07 20:07:05,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 20:07:05,801 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 20:07:05,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:05,815 INFO L225 Difference]: With dead ends: 19286 [2019-12-07 20:07:05,815 INFO L226 Difference]: Without dead ends: 13541 [2019-12-07 20:07:05,815 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 391 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=309, Invalid=1331, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 20:07:05,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13541 states. [2019-12-07 20:07:05,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13541 to 11079. [2019-12-07 20:07:05,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11079 states. [2019-12-07 20:07:05,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11079 states to 11079 states and 32920 transitions. [2019-12-07 20:07:05,984 INFO L78 Accepts]: Start accepts. Automaton has 11079 states and 32920 transitions. Word has length 67 [2019-12-07 20:07:05,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:05,985 INFO L462 AbstractCegarLoop]: Abstraction has 11079 states and 32920 transitions. [2019-12-07 20:07:05,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 20:07:05,985 INFO L276 IsEmpty]: Start isEmpty. Operand 11079 states and 32920 transitions. [2019-12-07 20:07:05,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:05,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:05,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:05,995 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:05,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:05,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1145475155, now seen corresponding path program 6 times [2019-12-07 20:07:05,995 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:05,995 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780891252] [2019-12-07 20:07:05,995 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:06,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:06,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:06,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780891252] [2019-12-07 20:07:06,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:06,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 20:07:06,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1038836059] [2019-12-07 20:07:06,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 20:07:06,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:06,336 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 20:07:06,336 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:07:06,336 INFO L87 Difference]: Start difference. First operand 11079 states and 32920 transitions. Second operand 17 states. [2019-12-07 20:07:08,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:08,388 INFO L93 Difference]: Finished difference Result 16803 states and 49045 transitions. [2019-12-07 20:07:08,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2019-12-07 20:07:08,389 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 20:07:08,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:08,403 INFO L225 Difference]: With dead ends: 16803 [2019-12-07 20:07:08,403 INFO L226 Difference]: Without dead ends: 14488 [2019-12-07 20:07:08,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1133 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=608, Invalid=3052, Unknown=0, NotChecked=0, Total=3660 [2019-12-07 20:07:08,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14488 states. [2019-12-07 20:07:08,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14488 to 11265. [2019-12-07 20:07:08,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11265 states. [2019-12-07 20:07:08,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11265 states to 11265 states and 33405 transitions. [2019-12-07 20:07:08,589 INFO L78 Accepts]: Start accepts. Automaton has 11265 states and 33405 transitions. Word has length 67 [2019-12-07 20:07:08,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:08,589 INFO L462 AbstractCegarLoop]: Abstraction has 11265 states and 33405 transitions. [2019-12-07 20:07:08,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 20:07:08,589 INFO L276 IsEmpty]: Start isEmpty. Operand 11265 states and 33405 transitions. [2019-12-07 20:07:08,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:08,599 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:08,599 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:08,599 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:08,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:08,600 INFO L82 PathProgramCache]: Analyzing trace with hash 1214430171, now seen corresponding path program 7 times [2019-12-07 20:07:08,600 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:08,600 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527302280] [2019-12-07 20:07:08,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:08,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:08,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:08,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527302280] [2019-12-07 20:07:08,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:08,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 20:07:08,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55219121] [2019-12-07 20:07:08,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 20:07:08,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:08,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 20:07:08,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 20:07:08,880 INFO L87 Difference]: Start difference. First operand 11265 states and 33405 transitions. Second operand 16 states. [2019-12-07 20:07:11,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:11,429 INFO L93 Difference]: Finished difference Result 19052 states and 55382 transitions. [2019-12-07 20:07:11,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2019-12-07 20:07:11,429 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 20:07:11,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:11,444 INFO L225 Difference]: With dead ends: 19052 [2019-12-07 20:07:11,444 INFO L226 Difference]: Without dead ends: 14506 [2019-12-07 20:07:11,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1756 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=882, Invalid=4520, Unknown=0, NotChecked=0, Total=5402 [2019-12-07 20:07:11,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14506 states. [2019-12-07 20:07:11,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14506 to 11265. [2019-12-07 20:07:11,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11265 states. [2019-12-07 20:07:11,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11265 states to 11265 states and 33403 transitions. [2019-12-07 20:07:11,620 INFO L78 Accepts]: Start accepts. Automaton has 11265 states and 33403 transitions. Word has length 67 [2019-12-07 20:07:11,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:11,620 INFO L462 AbstractCegarLoop]: Abstraction has 11265 states and 33403 transitions. [2019-12-07 20:07:11,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 20:07:11,620 INFO L276 IsEmpty]: Start isEmpty. Operand 11265 states and 33403 transitions. [2019-12-07 20:07:11,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:11,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:11,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:11,629 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:11,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:11,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1604834349, now seen corresponding path program 8 times [2019-12-07 20:07:11,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:11,630 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101243196] [2019-12-07 20:07:11,630 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:11,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:11,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:11,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101243196] [2019-12-07 20:07:11,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:11,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 20:07:11,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448994360] [2019-12-07 20:07:11,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 20:07:11,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:11,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 20:07:11,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:07:11,735 INFO L87 Difference]: Start difference. First operand 11265 states and 33403 transitions. Second operand 11 states. [2019-12-07 20:07:12,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:12,315 INFO L93 Difference]: Finished difference Result 17847 states and 52108 transitions. [2019-12-07 20:07:12,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 20:07:12,315 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 20:07:12,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:12,328 INFO L225 Difference]: With dead ends: 17847 [2019-12-07 20:07:12,328 INFO L226 Difference]: Without dead ends: 13568 [2019-12-07 20:07:12,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 20:07:12,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13568 states. [2019-12-07 20:07:12,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13568 to 11127. [2019-12-07 20:07:12,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11127 states. [2019-12-07 20:07:12,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11127 states to 11127 states and 32955 transitions. [2019-12-07 20:07:12,496 INFO L78 Accepts]: Start accepts. Automaton has 11127 states and 32955 transitions. Word has length 67 [2019-12-07 20:07:12,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:12,496 INFO L462 AbstractCegarLoop]: Abstraction has 11127 states and 32955 transitions. [2019-12-07 20:07:12,496 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 20:07:12,497 INFO L276 IsEmpty]: Start isEmpty. Operand 11127 states and 32955 transitions. [2019-12-07 20:07:12,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:12,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:12,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:12,506 INFO L410 AbstractCegarLoop]: === Iteration 43 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:12,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:12,506 INFO L82 PathProgramCache]: Analyzing trace with hash 1053365331, now seen corresponding path program 9 times [2019-12-07 20:07:12,506 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:12,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1076667695] [2019-12-07 20:07:12,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:12,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:12,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:12,692 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1076667695] [2019-12-07 20:07:12,692 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:12,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 20:07:12,693 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460862143] [2019-12-07 20:07:12,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 20:07:12,693 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:12,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 20:07:12,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:07:12,693 INFO L87 Difference]: Start difference. First operand 11127 states and 32955 transitions. Second operand 13 states. [2019-12-07 20:07:13,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:13,476 INFO L93 Difference]: Finished difference Result 14034 states and 41100 transitions. [2019-12-07 20:07:13,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 20:07:13,476 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 20:07:13,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:13,489 INFO L225 Difference]: With dead ends: 14034 [2019-12-07 20:07:13,489 INFO L226 Difference]: Without dead ends: 12387 [2019-12-07 20:07:13,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 249 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=217, Invalid=1043, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 20:07:13,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12387 states. [2019-12-07 20:07:13,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12387 to 11427. [2019-12-07 20:07:13,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11427 states. [2019-12-07 20:07:13,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11427 states to 11427 states and 33916 transitions. [2019-12-07 20:07:13,653 INFO L78 Accepts]: Start accepts. Automaton has 11427 states and 33916 transitions. Word has length 67 [2019-12-07 20:07:13,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:13,653 INFO L462 AbstractCegarLoop]: Abstraction has 11427 states and 33916 transitions. [2019-12-07 20:07:13,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 20:07:13,653 INFO L276 IsEmpty]: Start isEmpty. Operand 11427 states and 33916 transitions. [2019-12-07 20:07:13,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:13,663 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:13,663 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:13,663 INFO L410 AbstractCegarLoop]: === Iteration 44 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:13,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:13,664 INFO L82 PathProgramCache]: Analyzing trace with hash 799182379, now seen corresponding path program 10 times [2019-12-07 20:07:13,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:13,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016398510] [2019-12-07 20:07:13,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:13,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:07:13,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:07:13,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016398510] [2019-12-07 20:07:13,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:07:13,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 20:07:13,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590372401] [2019-12-07 20:07:13,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 20:07:13,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:07:13,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 20:07:13,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:07:13,758 INFO L87 Difference]: Start difference. First operand 11427 states and 33916 transitions. Second operand 11 states. [2019-12-07 20:07:14,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:07:14,225 INFO L93 Difference]: Finished difference Result 16403 states and 47883 transitions. [2019-12-07 20:07:14,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 20:07:14,225 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 20:07:14,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:07:14,236 INFO L225 Difference]: With dead ends: 16403 [2019-12-07 20:07:14,236 INFO L226 Difference]: Without dead ends: 12822 [2019-12-07 20:07:14,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=614, Unknown=0, NotChecked=0, Total=756 [2019-12-07 20:07:14,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12822 states. [2019-12-07 20:07:14,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12822 to 10663. [2019-12-07 20:07:14,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10663 states. [2019-12-07 20:07:14,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10663 states to 10663 states and 31684 transitions. [2019-12-07 20:07:14,392 INFO L78 Accepts]: Start accepts. Automaton has 10663 states and 31684 transitions. Word has length 67 [2019-12-07 20:07:14,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:07:14,392 INFO L462 AbstractCegarLoop]: Abstraction has 10663 states and 31684 transitions. [2019-12-07 20:07:14,392 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 20:07:14,392 INFO L276 IsEmpty]: Start isEmpty. Operand 10663 states and 31684 transitions. [2019-12-07 20:07:14,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 20:07:14,401 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:07:14,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:07:14,401 INFO L410 AbstractCegarLoop]: === Iteration 45 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:07:14,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:07:14,401 INFO L82 PathProgramCache]: Analyzing trace with hash -778064925, now seen corresponding path program 11 times [2019-12-07 20:07:14,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:07:14,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029527973] [2019-12-07 20:07:14,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:07:14,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:07:14,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:07:14,472 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 20:07:14,472 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 20:07:14,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44| 1)) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44|) |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0)) |v_#memory_int_19|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1489~0.base_44|) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1489~0.base_44| 4) |v_#length_21|) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_25|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_~#t1489~0.base=|v_ULTIMATE.start_main_~#t1489~0.base_44|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_18|, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1489~0.offset=|v_ULTIMATE.start_main_~#t1489~0.offset_28|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1491~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1489~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1491~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1489~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1490~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 20:07:14,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1490~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13|) |v_ULTIMATE.start_main_~#t1490~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1490~0.base_13| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t1490~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t1490~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1490~0.offset, #length] because there is no mapped edge [2019-12-07 20:07:14,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1491~0.base_13| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1491~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13|) |v_ULTIMATE.start_main_~#t1491~0.offset_11| 2)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1491~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1491~0.offset, #length, ULTIMATE.start_main_~#t1491~0.base] because there is no mapped edge [2019-12-07 20:07:14,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 20:07:14,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2138388614 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite21_Out-2138388614| |P2Thread1of1ForFork2_#t~ite20_Out-2138388614|) (= |P2Thread1of1ForFork2_#t~ite20_Out-2138388614| ~z$w_buff0~0_In-2138388614) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-2138388614 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In-2138388614 256)) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In-2138388614 256)) .cse1) (= (mod ~z$w_buff0_used~0_In-2138388614 256) 0)))) (and (= |P2Thread1of1ForFork2_#t~ite21_Out-2138388614| ~z$w_buff0~0_In-2138388614) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In-2138388614| |P2Thread1of1ForFork2_#t~ite20_Out-2138388614|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-2138388614, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2138388614, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In-2138388614|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2138388614, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2138388614, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2138388614, ~weak$$choice2~0=~weak$$choice2~0_In-2138388614} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-2138388614, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2138388614|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2138388614, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out-2138388614|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2138388614, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2138388614, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2138388614, ~weak$$choice2~0=~weak$$choice2~0_In-2138388614} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 20:07:14,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1653539709 256))) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1653539709| |P1Thread1of1ForFork1_#t~ite9_Out1653539709|)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In1653539709 256) 0))) (or (and .cse0 (= ~z~0_In1653539709 |P1Thread1of1ForFork1_#t~ite9_Out1653539709|) (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= ~z$w_buff1~0_In1653539709 |P1Thread1of1ForFork1_#t~ite9_Out1653539709|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1653539709, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1653539709, ~z$w_buff1~0=~z$w_buff1~0_In1653539709, ~z~0=~z~0_In1653539709} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1653539709|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1653539709, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1653539709, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1653539709|, ~z$w_buff1~0=~z$w_buff1~0_In1653539709, ~z~0=~z~0_In1653539709} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 20:07:14,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1001360762 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1001360762 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out1001360762|) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1001360762| ~z$w_buff0_used~0_In1001360762) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1001360762, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1001360762} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1001360762|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1001360762, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1001360762} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:07:14,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In769679876 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In769679876 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In769679876 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out769679876| ~z$w_buff1_used~0_In769679876)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out769679876| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In769679876, ~z$w_buff1_used~0=~z$w_buff1_used~0_In769679876, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In769679876} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out769679876|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In769679876, ~z$w_buff1_used~0=~z$w_buff1_used~0_In769679876, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In769679876} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:07:14,481 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-910583816 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-910583816 ~z$r_buff0_thd1~0_In-910583816)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-910583816 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out-910583816) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-910583816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-910583816|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-910583816} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 20:07:14,482 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In812290513 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In812290513 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out812290513| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out812290513| ~z$w_buff0_used~0_In812290513)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In812290513, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In812290513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In812290513, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out812290513|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In812290513} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:07:14,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1996696623 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1996696623 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-1996696623 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1996696623 |P1Thread1of1ForFork1_#t~ite12_Out-1996696623|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1996696623|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1996696623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1996696623, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1996696623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1996696623, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1996696623|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:07:14,483 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1331607331 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1331607331 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In1331607331 |P1Thread1of1ForFork1_#t~ite13_Out1331607331|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1331607331|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1331607331} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1331607331|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1331607331} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 20:07:14,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In341013114 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In341013114 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In341013114 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In341013114 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out341013114| ~z$r_buff1_thd2~0_In341013114) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out341013114|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In341013114, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In341013114, ~z$w_buff1_used~0=~z$w_buff1_used~0_In341013114, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In341013114} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In341013114, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In341013114, ~z$w_buff1_used~0=~z$w_buff1_used~0_In341013114, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out341013114|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In341013114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:07:14,484 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:07:14,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:07:14,485 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2044275252 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite35_In-2044275252| |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|) (not .cse0) (= ~z$r_buff1_thd3~0_In-2044275252 |P2Thread1of1ForFork2_#t~ite36_Out-2044275252|)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite36_Out-2044275252| |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2044275252 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2044275252 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2044275252 256))) (= 0 (mod ~z$w_buff0_used~0_In-2044275252 256)))) (= ~z$r_buff1_thd3~0_In-2044275252 |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-2044275252|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 20:07:14,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 20:07:14,486 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1059955501 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1059955501 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out1059955501| |P2Thread1of1ForFork2_#t~ite38_Out1059955501|))) (or (and (not .cse0) (= ~z$w_buff1~0_In1059955501 |P2Thread1of1ForFork2_#t~ite38_Out1059955501|) (not .cse1) .cse2) (and (= ~z~0_In1059955501 |P2Thread1of1ForFork2_#t~ite38_Out1059955501|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$w_buff1~0=~z$w_buff1~0_In1059955501, ~z~0=~z~0_In1059955501} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$w_buff1~0=~z$w_buff1~0_In1059955501, ~z~0=~z~0_In1059955501, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1059955501|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1059955501|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 20:07:14,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In2008346526 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2008346526 256)))) (or (and (= ~z$w_buff0_used~0_In2008346526 |P2Thread1of1ForFork2_#t~ite40_Out2008346526|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite40_Out2008346526|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008346526} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008346526, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out2008346526|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 20:07:14,487 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1390542359 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1390542359 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1390542359 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out-1390542359| ~z$w_buff1_used~0_In-1390542359) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite41_Out-1390542359|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1390542359} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1390542359|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1390542359} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 20:07:14,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1959059075 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out1959059075|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite42_Out1959059075| ~z$r_buff0_thd3~0_In1959059075)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1959059075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 20:07:14,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-512980096 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-512980096 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-512980096 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-512980096 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-512980096|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-512980096 |P2Thread1of1ForFork2_#t~ite43_Out-512980096|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-512980096} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-512980096, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-512980096|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-512980096} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 20:07:14,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:07:14,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-1934447185 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1934447185 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1934447185 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1934447185 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1934447185| ~z$r_buff1_thd1~0_In-1934447185)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1934447185| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1934447185, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1934447185, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1934447185, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1934447185} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1934447185, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1934447185|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1934447185, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1934447185, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1934447185} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:07:14,488 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 20:07:14,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:07:14,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1848184045| |ULTIMATE.start_main_#t~ite48_Out1848184045|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1848184045 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In1848184045 |ULTIMATE.start_main_#t~ite47_Out1848184045|)) (and .cse0 (or .cse2 .cse1) (= ~z~0_In1848184045 |ULTIMATE.start_main_#t~ite47_Out1848184045|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1848184045|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1848184045|, ~z~0=~z~0_In1848184045} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:07:14,489 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-897340555 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-897340555 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-897340555| ~z$w_buff0_used~0_In-897340555) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-897340555| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-897340555, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-897340555} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-897340555, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-897340555, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-897340555|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 20:07:14,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In516774371 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In516774371 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In516774371 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In516774371 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out516774371|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out516774371| ~z$w_buff1_used~0_In516774371) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In516774371, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out516774371|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In516774371, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 20:07:14,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-698131140 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-698131140 256)))) (or (and (= ~z$r_buff0_thd0~0_In-698131140 |ULTIMATE.start_main_#t~ite51_Out-698131140|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-698131140| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-698131140|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 20:07:14,490 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1691391600 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1691391600 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1691391600 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1691391600 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1691391600| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out1691391600| ~z$r_buff1_thd0~0_In1691391600) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1691391600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1691391600|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1691391600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 20:07:14,491 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:07:14,550 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 08:07:14 BasicIcfg [2019-12-07 20:07:14,550 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 20:07:14,550 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 20:07:14,550 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 20:07:14,551 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 20:07:14,551 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:04:48" (3/4) ... [2019-12-07 20:07:14,553 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 20:07:14,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44| 1)) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1489~0.base_44|) |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0)) |v_#memory_int_19|) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= |v_ULTIMATE.start_main_~#t1489~0.offset_28| 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1489~0.base_44|)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1489~0.base_44|) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1489~0.base_44| 4) |v_#length_21|) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_25|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_~#t1489~0.base=|v_ULTIMATE.start_main_~#t1489~0.base_44|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_18|, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1489~0.offset=|v_ULTIMATE.start_main_~#t1489~0.offset_28|, #NULL.base=|v_#NULL.base_7|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1491~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1489~0.base, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t1491~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1489~0.offset, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t1490~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 20:07:14,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1490~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1490~0.base_13|) |v_ULTIMATE.start_main_~#t1490~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1490~0.base_13| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t1490~0.base_13| 0)) (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13|)) (= (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1490~0.base_13| 1) |v_#valid_36|) (= 0 |v_ULTIMATE.start_main_~#t1490~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1490~0.base=|v_ULTIMATE.start_main_~#t1490~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1490~0.offset=|v_ULTIMATE.start_main_~#t1490~0.offset_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1490~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1490~0.offset, #length] because there is no mapped edge [2019-12-07 20:07:14,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (not (= 0 |v_ULTIMATE.start_main_~#t1491~0.base_13|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1491~0.base_13| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1491~0.base_13| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1491~0.base_13|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1491~0.base_13|) |v_ULTIMATE.start_main_~#t1491~0.offset_11| 2)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1491~0.offset_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1491~0.offset=|v_ULTIMATE.start_main_~#t1491~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1491~0.base=|v_ULTIMATE.start_main_~#t1491~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1491~0.offset, #length, ULTIMATE.start_main_~#t1491~0.base] because there is no mapped edge [2019-12-07 20:07:14,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 20:07:14,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-2138388614 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite21_Out-2138388614| |P2Thread1of1ForFork2_#t~ite20_Out-2138388614|) (= |P2Thread1of1ForFork2_#t~ite20_Out-2138388614| ~z$w_buff0~0_In-2138388614) .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-2138388614 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In-2138388614 256)) .cse1) (and (= 0 (mod ~z$r_buff1_thd3~0_In-2138388614 256)) .cse1) (= (mod ~z$w_buff0_used~0_In-2138388614 256) 0)))) (and (= |P2Thread1of1ForFork2_#t~ite21_Out-2138388614| ~z$w_buff0~0_In-2138388614) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite20_In-2138388614| |P2Thread1of1ForFork2_#t~ite20_Out-2138388614|)))) InVars {~z$w_buff0~0=~z$w_buff0~0_In-2138388614, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2138388614, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In-2138388614|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2138388614, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2138388614, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2138388614, ~weak$$choice2~0=~weak$$choice2~0_In-2138388614} OutVars{~z$w_buff0~0=~z$w_buff0~0_In-2138388614, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-2138388614|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2138388614, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out-2138388614|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2138388614, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2138388614, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2138388614, ~weak$$choice2~0=~weak$$choice2~0_In-2138388614} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 20:07:14,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1653539709 256))) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1653539709| |P1Thread1of1ForFork1_#t~ite9_Out1653539709|)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In1653539709 256) 0))) (or (and .cse0 (= ~z~0_In1653539709 |P1Thread1of1ForFork1_#t~ite9_Out1653539709|) (or .cse1 .cse2)) (and (not .cse1) .cse0 (not .cse2) (= ~z$w_buff1~0_In1653539709 |P1Thread1of1ForFork1_#t~ite9_Out1653539709|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1653539709, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1653539709, ~z$w_buff1~0=~z$w_buff1~0_In1653539709, ~z~0=~z~0_In1653539709} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1653539709|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1653539709, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1653539709, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1653539709|, ~z$w_buff1~0=~z$w_buff1~0_In1653539709, ~z~0=~z~0_In1653539709} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 20:07:14,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1001360762 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1001360762 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out1001360762|) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1001360762| ~z$w_buff0_used~0_In1001360762) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1001360762, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1001360762} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1001360762|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1001360762, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1001360762} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:07:14,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In769679876 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In769679876 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In769679876 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out769679876| ~z$w_buff1_used~0_In769679876)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out769679876| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In769679876, ~z$w_buff1_used~0=~z$w_buff1_used~0_In769679876, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In769679876} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out769679876|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In769679876, ~z$w_buff1_used~0=~z$w_buff1_used~0_In769679876, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In769679876} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:07:14,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-910583816 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-910583816 ~z$r_buff0_thd1~0_In-910583816)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-910583816 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out-910583816) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-910583816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-910583816, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-910583816|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-910583816} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 20:07:14,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In812290513 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In812290513 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out812290513| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out812290513| ~z$w_buff0_used~0_In812290513)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In812290513, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In812290513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In812290513, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out812290513|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In812290513} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:07:14,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1996696623 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1996696623 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-1996696623 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-1996696623 |P1Thread1of1ForFork1_#t~ite12_Out-1996696623|)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1996696623|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1996696623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1996696623, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1996696623, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1996696623, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1996696623|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:07:14,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1331607331 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1331607331 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In1331607331 |P1Thread1of1ForFork1_#t~ite13_Out1331607331|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1331607331|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1331607331} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1331607331|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1331607331} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 20:07:14,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In341013114 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In341013114 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In341013114 256))) (.cse3 (= (mod ~z$r_buff1_thd2~0_In341013114 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out341013114| ~z$r_buff1_thd2~0_In341013114) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out341013114|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In341013114, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In341013114, ~z$w_buff1_used~0=~z$w_buff1_used~0_In341013114, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In341013114} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In341013114, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In341013114, ~z$w_buff1_used~0=~z$w_buff1_used~0_In341013114, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out341013114|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In341013114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:07:14,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:07:14,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:07:14,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2044275252 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite35_In-2044275252| |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|) (not .cse0) (= ~z$r_buff1_thd3~0_In-2044275252 |P2Thread1of1ForFork2_#t~ite36_Out-2044275252|)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite36_Out-2044275252| |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2044275252 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2044275252 256))) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2044275252 256))) (= 0 (mod ~z$w_buff0_used~0_In-2044275252 256)))) (= ~z$r_buff1_thd3~0_In-2044275252 |P2Thread1of1ForFork2_#t~ite35_Out-2044275252|)))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out-2044275252|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 20:07:14,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 20:07:14,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1059955501 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1059955501 256))) (.cse2 (= |P2Thread1of1ForFork2_#t~ite39_Out1059955501| |P2Thread1of1ForFork2_#t~ite38_Out1059955501|))) (or (and (not .cse0) (= ~z$w_buff1~0_In1059955501 |P2Thread1of1ForFork2_#t~ite38_Out1059955501|) (not .cse1) .cse2) (and (= ~z~0_In1059955501 |P2Thread1of1ForFork2_#t~ite38_Out1059955501|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$w_buff1~0=~z$w_buff1~0_In1059955501, ~z~0=~z~0_In1059955501} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1059955501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1059955501, ~z$w_buff1~0=~z$w_buff1~0_In1059955501, ~z~0=~z~0_In1059955501, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1059955501|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1059955501|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 20:07:14,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In2008346526 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In2008346526 256)))) (or (and (= ~z$w_buff0_used~0_In2008346526 |P2Thread1of1ForFork2_#t~ite40_Out2008346526|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite40_Out2008346526|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008346526} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008346526, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out2008346526|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 20:07:14,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In-1390542359 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1390542359 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1390542359 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out-1390542359| ~z$w_buff1_used~0_In-1390542359) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite41_Out-1390542359|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1390542359} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1390542359|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1390542359} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1959059075 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out1959059075|)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite42_Out1959059075| ~z$r_buff0_thd3~0_In1959059075)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1959059075|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In-512980096 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-512980096 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-512980096 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-512980096 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-512980096|)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$r_buff1_thd3~0_In-512980096 |P2Thread1of1ForFork2_#t~ite43_Out-512980096|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-512980096} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-512980096, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-512980096|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-512980096} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In-1934447185 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1934447185 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1934447185 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1934447185 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1934447185| ~z$r_buff1_thd1~0_In-1934447185)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1934447185| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1934447185, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1934447185, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1934447185, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1934447185} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1934447185, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1934447185|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1934447185, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1934447185, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1934447185} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 20:07:14,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:07:14,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out1848184045| |ULTIMATE.start_main_#t~ite48_Out1848184045|)) (.cse2 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1848184045 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In1848184045 |ULTIMATE.start_main_#t~ite47_Out1848184045|)) (and .cse0 (or .cse2 .cse1) (= ~z~0_In1848184045 |ULTIMATE.start_main_#t~ite47_Out1848184045|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ~z~0=~z~0_In1848184045} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1848184045|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045, ~z$w_buff1~0=~z$w_buff1~0_In1848184045, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1848184045|, ~z~0=~z~0_In1848184045} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:07:14,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-897340555 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-897340555 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-897340555| ~z$w_buff0_used~0_In-897340555) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite49_Out-897340555| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-897340555, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-897340555} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-897340555, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-897340555, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-897340555|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 20:07:14,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In516774371 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In516774371 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In516774371 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In516774371 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out516774371|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite50_Out516774371| ~z$w_buff1_used~0_In516774371) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In516774371, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out516774371|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In516774371, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 20:07:14,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-698131140 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-698131140 256)))) (or (and (= ~z$r_buff0_thd0~0_In-698131140 |ULTIMATE.start_main_#t~ite51_Out-698131140|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out-698131140| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-698131140, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-698131140|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-698131140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 20:07:14,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1691391600 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1691391600 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1691391600 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1691391600 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out1691391600| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite52_Out1691391600| ~z$r_buff1_thd0~0_In1691391600) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1691391600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1691391600|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1691391600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 20:07:14,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:07:14,619 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c3d90dd1-2348-4e2c-8e27-45805bfd9ecf/bin/utaipan/witness.graphml [2019-12-07 20:07:14,619 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 20:07:14,620 INFO L168 Benchmark]: Toolchain (without parser) took 147171.52 ms. Allocated memory was 1.0 GB in the beginning and 7.2 GB in the end (delta: 6.2 GB). Free memory was 931.9 MB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,620 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 952.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:07:14,621 INFO L168 Benchmark]: CACSL2BoogieTranslator took 401.23 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 931.9 MB in the beginning and 1.1 GB in the end (delta: -134.9 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,621 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,621 INFO L168 Benchmark]: Boogie Preprocessor took 25.20 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:07:14,621 INFO L168 Benchmark]: RCFGBuilder took 411.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,621 INFO L168 Benchmark]: TraceAbstraction took 146221.80 ms. Allocated memory was 1.1 GB in the beginning and 7.2 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,622 INFO L168 Benchmark]: Witness Printer took 69.05 ms. Allocated memory is still 7.2 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. [2019-12-07 20:07:14,623 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 952.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 401.23 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.1 MB). Free memory was 931.9 MB in the beginning and 1.1 GB in the end (delta: -134.9 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.52 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.20 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 411.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 146221.80 ms. Allocated memory was 1.1 GB in the beginning and 7.2 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.3 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 69.05 ms. Allocated memory is still 7.2 GB. Free memory was 5.3 GB in the beginning and 5.3 GB in the end (delta: 60.0 MB). Peak memory consumption was 60.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 174 ProgramPointsBefore, 92 ProgramPointsAfterwards, 211 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 6843 VarBasedMoverChecksPositive, 273 VarBasedMoverChecksNegative, 91 SemBasedMoverChecksPositive, 240 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 77200 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1489, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L820] FCALL, FORK 0 pthread_create(&t1490, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1491, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 y = 2 [L779] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L780] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L781] 3 z$flush_delayed = weak$$choice2 [L782] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L784] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L785] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L786] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L787] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L790] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L796] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L797] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L798] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L828] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L829] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L830] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L831] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 146.0s, OverallIterations: 45, TraceHistogramMax: 1, AutomataDifference: 58.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9686 SDtfs, 17715 SDslu, 38861 SDs, 0 SdLazy, 35017 SolverSat, 1313 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 23.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1039 GetRequests, 139 SyntacticMatches, 41 SemanticMatches, 859 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14999 ImplicationChecksByTransitivity, 14.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195815occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 66.7s AutomataMinimizationTime, 44 MinimizatonAttempts, 430786 StatesRemovedByMinimization, 42 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.8s InterpolantComputationTime, 2106 NumberOfCodeBlocks, 2106 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 1995 ConstructedInterpolants, 0 QuantifiedInterpolants, 750261 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 44 InterpolantComputations, 44 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...