./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 61139f82df0df72db7fcd3fd3dc1d76e3572b602 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:22:00,934 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:22:00,935 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:22:00,942 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:22:00,943 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:22:00,943 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:22:00,944 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:22:00,946 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:22:00,947 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:22:00,947 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:22:00,948 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:22:00,949 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:22:00,949 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:22:00,950 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:22:00,950 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:22:00,951 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:22:00,951 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:22:00,952 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:22:00,954 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:22:00,955 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:22:00,956 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:22:00,957 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:22:00,957 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:22:00,958 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:22:00,960 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:22:00,960 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:22:00,960 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:22:00,960 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:22:00,961 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:22:00,961 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:22:00,961 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:22:00,962 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:22:00,962 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:22:00,963 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:22:00,963 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:22:00,963 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:22:00,964 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:22:00,964 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:22:00,964 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:22:00,964 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:22:00,965 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:22:00,965 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 14:22:00,976 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:22:00,976 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:22:00,976 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 14:22:00,976 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 14:22:00,977 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 14:22:00,977 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 14:22:00,978 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 14:22:00,978 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 14:22:00,978 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 14:22:00,978 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 14:22:00,978 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:22:00,978 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 14:22:00,979 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:22:00,980 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:22:00,980 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:22:00,980 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 14:22:00,981 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 61139f82df0df72db7fcd3fd3dc1d76e3572b602 [2019-12-07 14:22:01,080 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:22:01,090 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:22:01,093 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:22:01,094 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:22:01,094 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:22:01,095 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix056_power.opt.i [2019-12-07 14:22:01,138 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/data/0c3a5f0bd/46bf53781d9f4cbabea7a8ca652ea79a/FLAG8fae31b00 [2019-12-07 14:22:01,596 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:22:01,596 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/sv-benchmarks/c/pthread-wmm/mix056_power.opt.i [2019-12-07 14:22:01,607 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/data/0c3a5f0bd/46bf53781d9f4cbabea7a8ca652ea79a/FLAG8fae31b00 [2019-12-07 14:22:02,118 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/data/0c3a5f0bd/46bf53781d9f4cbabea7a8ca652ea79a [2019-12-07 14:22:02,120 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:22:02,121 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:22:02,122 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:22:02,122 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:22:02,124 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:22:02,125 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,127 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02, skipping insertion in model container [2019-12-07 14:22:02,127 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,132 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:22:02,162 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:22:02,405 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:22:02,413 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:22:02,456 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:22:02,503 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:22:02,503 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02 WrapperNode [2019-12-07 14:22:02,504 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:22:02,504 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:22:02,504 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:22:02,504 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:22:02,510 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,523 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,544 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:22:02,544 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:22:02,545 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:22:02,545 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:22:02,551 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,551 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,554 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,555 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,561 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,564 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,566 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... [2019-12-07 14:22:02,570 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:22:02,570 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:22:02,570 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:22:02,570 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:22:02,571 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:22:02,611 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:22:02,611 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:22:02,612 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:22:02,612 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:22:02,612 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:22:02,612 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:22:02,612 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:22:02,614 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:22:02,961 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:22:02,961 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:22:02,962 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:22:02 BoogieIcfgContainer [2019-12-07 14:22:02,962 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:22:02,963 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:22:02,963 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:22:02,965 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:22:02,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:22:02" (1/3) ... [2019-12-07 14:22:02,965 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cbc64f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:22:02, skipping insertion in model container [2019-12-07 14:22:02,965 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:22:02" (2/3) ... [2019-12-07 14:22:02,966 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3cbc64f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:22:02, skipping insertion in model container [2019-12-07 14:22:02,966 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:22:02" (3/3) ... [2019-12-07 14:22:02,967 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_power.opt.i [2019-12-07 14:22:02,973 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:22:02,973 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:22:02,978 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:22:02,978 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:22:02,999 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:02,999 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,000 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,000 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,000 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,000 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,000 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,001 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,002 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,003 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,004 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,004 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,004 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,004 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,004 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,005 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,006 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,007 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,008 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:22:03,019 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:22:03,032 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:22:03,032 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:22:03,032 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:22:03,032 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:22:03,032 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:22:03,032 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:22:03,032 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:22:03,032 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:22:03,043 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 162 places, 193 transitions [2019-12-07 14:22:03,044 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 14:22:03,093 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 14:22:03,093 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:22:03,101 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 465 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:22:03,113 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 14:22:03,136 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 14:22:03,136 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:22:03,140 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 465 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:22:03,149 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 14:22:03,150 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:22:05,759 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 14:22:05,855 INFO L206 etLargeBlockEncoding]: Checked pairs total: 48383 [2019-12-07 14:22:05,855 INFO L214 etLargeBlockEncoding]: Total number of compositions: 109 [2019-12-07 14:22:05,857 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 14:22:06,577 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 16526 states. [2019-12-07 14:22:06,579 INFO L276 IsEmpty]: Start isEmpty. Operand 16526 states. [2019-12-07 14:22:06,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 14:22:06,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:06,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:06,583 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:06,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:06,587 INFO L82 PathProgramCache]: Analyzing trace with hash 2128093424, now seen corresponding path program 1 times [2019-12-07 14:22:06,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:06,593 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506590960] [2019-12-07 14:22:06,593 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:06,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:06,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:06,742 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506590960] [2019-12-07 14:22:06,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:06,743 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:22:06,743 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302379467] [2019-12-07 14:22:06,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:22:06,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:06,755 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:22:06,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:06,757 INFO L87 Difference]: Start difference. First operand 16526 states. Second operand 3 states. [2019-12-07 14:22:06,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:06,990 INFO L93 Difference]: Finished difference Result 16398 states and 61580 transitions. [2019-12-07 14:22:06,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:22:06,991 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 14:22:06,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:07,111 INFO L225 Difference]: With dead ends: 16398 [2019-12-07 14:22:07,111 INFO L226 Difference]: Without dead ends: 16062 [2019-12-07 14:22:07,112 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:07,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16062 states. [2019-12-07 14:22:07,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16062 to 16062. [2019-12-07 14:22:07,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16062 states. [2019-12-07 14:22:07,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16062 states to 16062 states and 60376 transitions. [2019-12-07 14:22:07,691 INFO L78 Accepts]: Start accepts. Automaton has 16062 states and 60376 transitions. Word has length 7 [2019-12-07 14:22:07,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:07,692 INFO L462 AbstractCegarLoop]: Abstraction has 16062 states and 60376 transitions. [2019-12-07 14:22:07,692 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:22:07,692 INFO L276 IsEmpty]: Start isEmpty. Operand 16062 states and 60376 transitions. [2019-12-07 14:22:07,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:22:07,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:07,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:07,697 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:07,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:07,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1390331573, now seen corresponding path program 1 times [2019-12-07 14:22:07,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:07,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832812343] [2019-12-07 14:22:07,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:07,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:07,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:07,758 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832812343] [2019-12-07 14:22:07,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:07,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:22:07,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503827184] [2019-12-07 14:22:07,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:22:07,760 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:07,760 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:22:07,760 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:22:07,760 INFO L87 Difference]: Start difference. First operand 16062 states and 60376 transitions. Second operand 4 states. [2019-12-07 14:22:08,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:08,092 INFO L93 Difference]: Finished difference Result 24942 states and 90524 transitions. [2019-12-07 14:22:08,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:22:08,092 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:22:08,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:08,152 INFO L225 Difference]: With dead ends: 24942 [2019-12-07 14:22:08,152 INFO L226 Difference]: Without dead ends: 24928 [2019-12-07 14:22:08,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:08,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24928 states. [2019-12-07 14:22:08,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24928 to 22166. [2019-12-07 14:22:08,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22166 states. [2019-12-07 14:22:08,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22166 states to 22166 states and 81470 transitions. [2019-12-07 14:22:08,696 INFO L78 Accepts]: Start accepts. Automaton has 22166 states and 81470 transitions. Word has length 13 [2019-12-07 14:22:08,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:08,697 INFO L462 AbstractCegarLoop]: Abstraction has 22166 states and 81470 transitions. [2019-12-07 14:22:08,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:22:08,697 INFO L276 IsEmpty]: Start isEmpty. Operand 22166 states and 81470 transitions. [2019-12-07 14:22:08,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:22:08,699 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:08,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:08,699 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:08,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:08,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1371832765, now seen corresponding path program 1 times [2019-12-07 14:22:08,699 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:08,699 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370668013] [2019-12-07 14:22:08,700 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:08,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:08,749 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:08,749 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370668013] [2019-12-07 14:22:08,749 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:08,750 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:22:08,750 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807016533] [2019-12-07 14:22:08,750 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:22:08,750 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:08,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:22:08,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:22:08,750 INFO L87 Difference]: Start difference. First operand 22166 states and 81470 transitions. Second operand 4 states. [2019-12-07 14:22:08,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:08,931 INFO L93 Difference]: Finished difference Result 27782 states and 100994 transitions. [2019-12-07 14:22:08,932 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:22:08,932 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:22:08,932 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:08,979 INFO L225 Difference]: With dead ends: 27782 [2019-12-07 14:22:08,979 INFO L226 Difference]: Without dead ends: 27782 [2019-12-07 14:22:08,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:09,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27782 states. [2019-12-07 14:22:09,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27782 to 24630. [2019-12-07 14:22:09,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24630 states. [2019-12-07 14:22:09,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24630 states to 24630 states and 90262 transitions. [2019-12-07 14:22:09,497 INFO L78 Accepts]: Start accepts. Automaton has 24630 states and 90262 transitions. Word has length 13 [2019-12-07 14:22:09,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:09,498 INFO L462 AbstractCegarLoop]: Abstraction has 24630 states and 90262 transitions. [2019-12-07 14:22:09,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:22:09,498 INFO L276 IsEmpty]: Start isEmpty. Operand 24630 states and 90262 transitions. [2019-12-07 14:22:09,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:22:09,503 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:09,503 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:09,503 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:09,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:09,503 INFO L82 PathProgramCache]: Analyzing trace with hash -1003212910, now seen corresponding path program 1 times [2019-12-07 14:22:09,504 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:09,504 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645077823] [2019-12-07 14:22:09,504 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:09,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:09,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:09,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645077823] [2019-12-07 14:22:09,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:09,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:22:09,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1470678732] [2019-12-07 14:22:09,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:22:09,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:09,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:22:09,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:09,584 INFO L87 Difference]: Start difference. First operand 24630 states and 90262 transitions. Second operand 5 states. [2019-12-07 14:22:09,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:09,943 INFO L93 Difference]: Finished difference Result 33042 states and 118962 transitions. [2019-12-07 14:22:09,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:22:09,943 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:22:09,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:10,012 INFO L225 Difference]: With dead ends: 33042 [2019-12-07 14:22:10,012 INFO L226 Difference]: Without dead ends: 33028 [2019-12-07 14:22:10,012 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:22:10,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33028 states. [2019-12-07 14:22:10,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33028 to 24716. [2019-12-07 14:22:10,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24716 states. [2019-12-07 14:22:10,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24716 states to 24716 states and 90325 transitions. [2019-12-07 14:22:10,583 INFO L78 Accepts]: Start accepts. Automaton has 24716 states and 90325 transitions. Word has length 19 [2019-12-07 14:22:10,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:10,584 INFO L462 AbstractCegarLoop]: Abstraction has 24716 states and 90325 transitions. [2019-12-07 14:22:10,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:22:10,584 INFO L276 IsEmpty]: Start isEmpty. Operand 24716 states and 90325 transitions. [2019-12-07 14:22:10,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:22:10,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:10,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:10,602 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:10,602 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:10,602 INFO L82 PathProgramCache]: Analyzing trace with hash -1251036613, now seen corresponding path program 1 times [2019-12-07 14:22:10,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:10,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63814219] [2019-12-07 14:22:10,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:10,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:10,634 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:10,634 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63814219] [2019-12-07 14:22:10,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:10,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:22:10,635 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2009516204] [2019-12-07 14:22:10,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:22:10,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:10,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:22:10,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:10,635 INFO L87 Difference]: Start difference. First operand 24716 states and 90325 transitions. Second operand 3 states. [2019-12-07 14:22:10,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:10,755 INFO L93 Difference]: Finished difference Result 30008 states and 109703 transitions. [2019-12-07 14:22:10,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:22:10,756 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:22:10,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:10,806 INFO L225 Difference]: With dead ends: 30008 [2019-12-07 14:22:10,806 INFO L226 Difference]: Without dead ends: 30008 [2019-12-07 14:22:10,806 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:10,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30008 states. [2019-12-07 14:22:11,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30008 to 28190. [2019-12-07 14:22:11,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28190 states. [2019-12-07 14:22:11,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28190 states to 28190 states and 103378 transitions. [2019-12-07 14:22:11,342 INFO L78 Accepts]: Start accepts. Automaton has 28190 states and 103378 transitions. Word has length 27 [2019-12-07 14:22:11,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:11,342 INFO L462 AbstractCegarLoop]: Abstraction has 28190 states and 103378 transitions. [2019-12-07 14:22:11,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:22:11,342 INFO L276 IsEmpty]: Start isEmpty. Operand 28190 states and 103378 transitions. [2019-12-07 14:22:11,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:22:11,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:11,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:11,356 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:11,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:11,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1250824263, now seen corresponding path program 1 times [2019-12-07 14:22:11,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:11,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962906778] [2019-12-07 14:22:11,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:11,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:11,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:11,397 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962906778] [2019-12-07 14:22:11,397 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:11,397 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:22:11,397 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805871553] [2019-12-07 14:22:11,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:22:11,398 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:11,398 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:22:11,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:11,398 INFO L87 Difference]: Start difference. First operand 28190 states and 103378 transitions. Second operand 3 states. [2019-12-07 14:22:11,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:11,455 INFO L93 Difference]: Finished difference Result 16100 states and 51114 transitions. [2019-12-07 14:22:11,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:22:11,455 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 14:22:11,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:11,474 INFO L225 Difference]: With dead ends: 16100 [2019-12-07 14:22:11,475 INFO L226 Difference]: Without dead ends: 16100 [2019-12-07 14:22:11,475 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:11,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16100 states. [2019-12-07 14:22:11,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16100 to 16100. [2019-12-07 14:22:11,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16100 states. [2019-12-07 14:22:11,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16100 states to 16100 states and 51114 transitions. [2019-12-07 14:22:11,694 INFO L78 Accepts]: Start accepts. Automaton has 16100 states and 51114 transitions. Word has length 27 [2019-12-07 14:22:11,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:11,694 INFO L462 AbstractCegarLoop]: Abstraction has 16100 states and 51114 transitions. [2019-12-07 14:22:11,694 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:22:11,695 INFO L276 IsEmpty]: Start isEmpty. Operand 16100 states and 51114 transitions. [2019-12-07 14:22:11,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:22:11,701 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:11,701 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:11,701 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:11,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:11,701 INFO L82 PathProgramCache]: Analyzing trace with hash 411430761, now seen corresponding path program 1 times [2019-12-07 14:22:11,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:11,702 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [856914643] [2019-12-07 14:22:11,702 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:11,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:11,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:11,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [856914643] [2019-12-07 14:22:11,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:11,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:22:11,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087647408] [2019-12-07 14:22:11,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:22:11,731 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:11,731 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:22:11,731 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:22:11,731 INFO L87 Difference]: Start difference. First operand 16100 states and 51114 transitions. Second operand 4 states. [2019-12-07 14:22:11,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:11,745 INFO L93 Difference]: Finished difference Result 2377 states and 5510 transitions. [2019-12-07 14:22:11,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:22:11,745 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 14:22:11,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:11,747 INFO L225 Difference]: With dead ends: 2377 [2019-12-07 14:22:11,747 INFO L226 Difference]: Without dead ends: 2377 [2019-12-07 14:22:11,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:22:11,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2377 states. [2019-12-07 14:22:11,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2377 to 2377. [2019-12-07 14:22:11,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2377 states. [2019-12-07 14:22:11,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2377 states to 2377 states and 5510 transitions. [2019-12-07 14:22:11,766 INFO L78 Accepts]: Start accepts. Automaton has 2377 states and 5510 transitions. Word has length 28 [2019-12-07 14:22:11,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:11,766 INFO L462 AbstractCegarLoop]: Abstraction has 2377 states and 5510 transitions. [2019-12-07 14:22:11,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:22:11,766 INFO L276 IsEmpty]: Start isEmpty. Operand 2377 states and 5510 transitions. [2019-12-07 14:22:11,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:22:11,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:11,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:11,768 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:11,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:11,769 INFO L82 PathProgramCache]: Analyzing trace with hash -1388136454, now seen corresponding path program 1 times [2019-12-07 14:22:11,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:11,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2032552837] [2019-12-07 14:22:11,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:11,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:11,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:11,815 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2032552837] [2019-12-07 14:22:11,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:11,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:22:11,816 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679231974] [2019-12-07 14:22:11,816 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:22:11,816 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:11,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:22:11,817 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:11,817 INFO L87 Difference]: Start difference. First operand 2377 states and 5510 transitions. Second operand 5 states. [2019-12-07 14:22:11,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:11,835 INFO L93 Difference]: Finished difference Result 678 states and 1563 transitions. [2019-12-07 14:22:11,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:22:11,836 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 14:22:11,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:11,836 INFO L225 Difference]: With dead ends: 678 [2019-12-07 14:22:11,836 INFO L226 Difference]: Without dead ends: 678 [2019-12-07 14:22:11,837 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:11,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 678 states. [2019-12-07 14:22:11,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 678 to 622. [2019-12-07 14:22:11,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 622 states. [2019-12-07 14:22:11,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 1431 transitions. [2019-12-07 14:22:11,842 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 1431 transitions. Word has length 40 [2019-12-07 14:22:11,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:11,842 INFO L462 AbstractCegarLoop]: Abstraction has 622 states and 1431 transitions. [2019-12-07 14:22:11,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:22:11,842 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 1431 transitions. [2019-12-07 14:22:11,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:22:11,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:11,843 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:11,843 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:11,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:11,844 INFO L82 PathProgramCache]: Analyzing trace with hash -826083081, now seen corresponding path program 1 times [2019-12-07 14:22:11,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:11,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551226188] [2019-12-07 14:22:11,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:11,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:11,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:11,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551226188] [2019-12-07 14:22:11,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:11,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:22:11,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [666366653] [2019-12-07 14:22:11,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:22:11,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:11,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:22:11,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:22:11,915 INFO L87 Difference]: Start difference. First operand 622 states and 1431 transitions. Second operand 5 states. [2019-12-07 14:22:12,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:12,046 INFO L93 Difference]: Finished difference Result 911 states and 2103 transitions. [2019-12-07 14:22:12,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:22:12,046 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 14:22:12,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:12,047 INFO L225 Difference]: With dead ends: 911 [2019-12-07 14:22:12,047 INFO L226 Difference]: Without dead ends: 911 [2019-12-07 14:22:12,048 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:22:12,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 911 states. [2019-12-07 14:22:12,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 911 to 821. [2019-12-07 14:22:12,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 821 states. [2019-12-07 14:22:12,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 821 states to 821 states and 1898 transitions. [2019-12-07 14:22:12,058 INFO L78 Accepts]: Start accepts. Automaton has 821 states and 1898 transitions. Word has length 55 [2019-12-07 14:22:12,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:12,058 INFO L462 AbstractCegarLoop]: Abstraction has 821 states and 1898 transitions. [2019-12-07 14:22:12,058 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:22:12,058 INFO L276 IsEmpty]: Start isEmpty. Operand 821 states and 1898 transitions. [2019-12-07 14:22:12,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:22:12,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:12,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:12,060 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:12,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:12,060 INFO L82 PathProgramCache]: Analyzing trace with hash 297273929, now seen corresponding path program 2 times [2019-12-07 14:22:12,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:12,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701102239] [2019-12-07 14:22:12,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:12,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:12,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:12,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701102239] [2019-12-07 14:22:12,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:12,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:22:12,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1693638838] [2019-12-07 14:22:12,132 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:22:12,132 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:12,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:22:12,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:22:12,133 INFO L87 Difference]: Start difference. First operand 821 states and 1898 transitions. Second operand 6 states. [2019-12-07 14:22:12,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:12,329 INFO L93 Difference]: Finished difference Result 1208 states and 2794 transitions. [2019-12-07 14:22:12,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:22:12,329 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 14:22:12,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:12,330 INFO L225 Difference]: With dead ends: 1208 [2019-12-07 14:22:12,330 INFO L226 Difference]: Without dead ends: 1208 [2019-12-07 14:22:12,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:22:12,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1208 states. [2019-12-07 14:22:12,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1208 to 893. [2019-12-07 14:22:12,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 893 states. [2019-12-07 14:22:12,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 893 states to 893 states and 2076 transitions. [2019-12-07 14:22:12,338 INFO L78 Accepts]: Start accepts. Automaton has 893 states and 2076 transitions. Word has length 55 [2019-12-07 14:22:12,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:12,339 INFO L462 AbstractCegarLoop]: Abstraction has 893 states and 2076 transitions. [2019-12-07 14:22:12,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:22:12,339 INFO L276 IsEmpty]: Start isEmpty. Operand 893 states and 2076 transitions. [2019-12-07 14:22:12,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:22:12,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:12,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:12,340 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:12,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:12,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1649215159, now seen corresponding path program 3 times [2019-12-07 14:22:12,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:12,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430684694] [2019-12-07 14:22:12,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:12,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:12,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:12,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [430684694] [2019-12-07 14:22:12,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:12,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:22:12,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1449725400] [2019-12-07 14:22:12,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:22:12,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:12,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:22:12,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:22:12,416 INFO L87 Difference]: Start difference. First operand 893 states and 2076 transitions. Second operand 6 states. [2019-12-07 14:22:12,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:12,621 INFO L93 Difference]: Finished difference Result 1289 states and 2973 transitions. [2019-12-07 14:22:12,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 14:22:12,622 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 14:22:12,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:12,623 INFO L225 Difference]: With dead ends: 1289 [2019-12-07 14:22:12,623 INFO L226 Difference]: Without dead ends: 1289 [2019-12-07 14:22:12,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:22:12,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1289 states. [2019-12-07 14:22:12,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1289 to 959. [2019-12-07 14:22:12,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 959 states. [2019-12-07 14:22:12,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 959 states to 959 states and 2231 transitions. [2019-12-07 14:22:12,632 INFO L78 Accepts]: Start accepts. Automaton has 959 states and 2231 transitions. Word has length 55 [2019-12-07 14:22:12,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:12,633 INFO L462 AbstractCegarLoop]: Abstraction has 959 states and 2231 transitions. [2019-12-07 14:22:12,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:22:12,633 INFO L276 IsEmpty]: Start isEmpty. Operand 959 states and 2231 transitions. [2019-12-07 14:22:12,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:22:12,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:12,634 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:12,634 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:12,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:12,634 INFO L82 PathProgramCache]: Analyzing trace with hash 817618467, now seen corresponding path program 4 times [2019-12-07 14:22:12,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:12,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392919207] [2019-12-07 14:22:12,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:12,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:12,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:12,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392919207] [2019-12-07 14:22:12,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:12,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:22:12,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1821749350] [2019-12-07 14:22:12,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:22:12,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:12,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:22:12,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:22:12,725 INFO L87 Difference]: Start difference. First operand 959 states and 2231 transitions. Second operand 7 states. [2019-12-07 14:22:12,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:12,977 INFO L93 Difference]: Finished difference Result 1423 states and 3285 transitions. [2019-12-07 14:22:12,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:22:12,977 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 55 [2019-12-07 14:22:12,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:12,978 INFO L225 Difference]: With dead ends: 1423 [2019-12-07 14:22:12,978 INFO L226 Difference]: Without dead ends: 1423 [2019-12-07 14:22:12,979 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:22:12,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1423 states. [2019-12-07 14:22:12,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1423 to 931. [2019-12-07 14:22:12,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 931 states. [2019-12-07 14:22:12,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 931 states to 931 states and 2165 transitions. [2019-12-07 14:22:12,987 INFO L78 Accepts]: Start accepts. Automaton has 931 states and 2165 transitions. Word has length 55 [2019-12-07 14:22:12,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:12,987 INFO L462 AbstractCegarLoop]: Abstraction has 931 states and 2165 transitions. [2019-12-07 14:22:12,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:22:12,988 INFO L276 IsEmpty]: Start isEmpty. Operand 931 states and 2165 transitions. [2019-12-07 14:22:12,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:22:12,989 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:12,989 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:12,989 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:12,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:12,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1696047106, now seen corresponding path program 1 times [2019-12-07 14:22:12,989 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:12,989 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822484950] [2019-12-07 14:22:12,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:13,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:13,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822484950] [2019-12-07 14:22:13,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:13,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:22:13,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798418617] [2019-12-07 14:22:13,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:22:13,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:13,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:22:13,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:22:13,098 INFO L87 Difference]: Start difference. First operand 931 states and 2165 transitions. Second operand 6 states. [2019-12-07 14:22:13,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:13,141 INFO L93 Difference]: Finished difference Result 1363 states and 2949 transitions. [2019-12-07 14:22:13,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:22:13,141 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 14:22:13,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:13,142 INFO L225 Difference]: With dead ends: 1363 [2019-12-07 14:22:13,142 INFO L226 Difference]: Without dead ends: 866 [2019-12-07 14:22:13,142 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:22:13,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 866 states. [2019-12-07 14:22:13,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 866 to 866. [2019-12-07 14:22:13,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 866 states. [2019-12-07 14:22:13,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 866 states to 866 states and 1976 transitions. [2019-12-07 14:22:13,149 INFO L78 Accepts]: Start accepts. Automaton has 866 states and 1976 transitions. Word has length 56 [2019-12-07 14:22:13,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:13,150 INFO L462 AbstractCegarLoop]: Abstraction has 866 states and 1976 transitions. [2019-12-07 14:22:13,150 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:22:13,150 INFO L276 IsEmpty]: Start isEmpty. Operand 866 states and 1976 transitions. [2019-12-07 14:22:13,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:22:13,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:13,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:13,151 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:13,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:13,151 INFO L82 PathProgramCache]: Analyzing trace with hash -1631888206, now seen corresponding path program 2 times [2019-12-07 14:22:13,151 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:13,151 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401076443] [2019-12-07 14:22:13,151 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:13,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:13,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401076443] [2019-12-07 14:22:13,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:13,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:22:13,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807308426] [2019-12-07 14:22:13,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:22:13,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:13,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:22:13,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:22:13,231 INFO L87 Difference]: Start difference. First operand 866 states and 1976 transitions. Second operand 6 states. [2019-12-07 14:22:13,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:13,283 INFO L93 Difference]: Finished difference Result 1346 states and 2979 transitions. [2019-12-07 14:22:13,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:22:13,283 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 14:22:13,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:13,284 INFO L225 Difference]: With dead ends: 1346 [2019-12-07 14:22:13,284 INFO L226 Difference]: Without dead ends: 449 [2019-12-07 14:22:13,284 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:22:13,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 449 states. [2019-12-07 14:22:13,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 449 to 385. [2019-12-07 14:22:13,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2019-12-07 14:22:13,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 710 transitions. [2019-12-07 14:22:13,287 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 710 transitions. Word has length 56 [2019-12-07 14:22:13,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:13,287 INFO L462 AbstractCegarLoop]: Abstraction has 385 states and 710 transitions. [2019-12-07 14:22:13,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:22:13,287 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 710 transitions. [2019-12-07 14:22:13,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:22:13,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:13,288 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:13,288 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:13,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:13,288 INFO L82 PathProgramCache]: Analyzing trace with hash -318870370, now seen corresponding path program 3 times [2019-12-07 14:22:13,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:13,289 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886082797] [2019-12-07 14:22:13,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:13,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:13,315 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886082797] [2019-12-07 14:22:13,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:13,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:22:13,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238531449] [2019-12-07 14:22:13,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:22:13,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:13,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:22:13,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:13,316 INFO L87 Difference]: Start difference. First operand 385 states and 710 transitions. Second operand 3 states. [2019-12-07 14:22:13,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:13,324 INFO L93 Difference]: Finished difference Result 335 states and 597 transitions. [2019-12-07 14:22:13,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:22:13,324 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 14:22:13,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:13,324 INFO L225 Difference]: With dead ends: 335 [2019-12-07 14:22:13,324 INFO L226 Difference]: Without dead ends: 335 [2019-12-07 14:22:13,325 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:13,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2019-12-07 14:22:13,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 335. [2019-12-07 14:22:13,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335 states. [2019-12-07 14:22:13,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 335 states and 597 transitions. [2019-12-07 14:22:13,327 INFO L78 Accepts]: Start accepts. Automaton has 335 states and 597 transitions. Word has length 56 [2019-12-07 14:22:13,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:13,328 INFO L462 AbstractCegarLoop]: Abstraction has 335 states and 597 transitions. [2019-12-07 14:22:13,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:22:13,328 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 597 transitions. [2019-12-07 14:22:13,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:22:13,328 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:13,328 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:13,328 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:13,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:13,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1330379112, now seen corresponding path program 1 times [2019-12-07 14:22:13,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:13,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244688091] [2019-12-07 14:22:13,329 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:13,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:13,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244688091] [2019-12-07 14:22:13,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:13,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:22:13,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [552597210] [2019-12-07 14:22:13,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:22:13,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:13,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:22:13,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:13,363 INFO L87 Difference]: Start difference. First operand 335 states and 597 transitions. Second operand 3 states. [2019-12-07 14:22:13,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:13,390 INFO L93 Difference]: Finished difference Result 334 states and 595 transitions. [2019-12-07 14:22:13,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:22:13,390 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 14:22:13,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:13,390 INFO L225 Difference]: With dead ends: 334 [2019-12-07 14:22:13,391 INFO L226 Difference]: Without dead ends: 334 [2019-12-07 14:22:13,391 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:22:13,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334 states. [2019-12-07 14:22:13,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334 to 207. [2019-12-07 14:22:13,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-12-07 14:22:13,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 364 transitions. [2019-12-07 14:22:13,393 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 364 transitions. Word has length 56 [2019-12-07 14:22:13,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:13,393 INFO L462 AbstractCegarLoop]: Abstraction has 207 states and 364 transitions. [2019-12-07 14:22:13,393 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:22:13,393 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 364 transitions. [2019-12-07 14:22:13,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 14:22:13,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:13,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:13,394 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:13,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:13,394 INFO L82 PathProgramCache]: Analyzing trace with hash -1516556909, now seen corresponding path program 1 times [2019-12-07 14:22:13,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:13,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532321782] [2019-12-07 14:22:13,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:13,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:13,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532321782] [2019-12-07 14:22:13,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:13,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:22:13,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640129284] [2019-12-07 14:22:13,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:22:13,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:13,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:22:13,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:22:13,577 INFO L87 Difference]: Start difference. First operand 207 states and 364 transitions. Second operand 13 states. [2019-12-07 14:22:13,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:13,878 INFO L93 Difference]: Finished difference Result 363 states and 623 transitions. [2019-12-07 14:22:13,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:22:13,878 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2019-12-07 14:22:13,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:13,879 INFO L225 Difference]: With dead ends: 363 [2019-12-07 14:22:13,879 INFO L226 Difference]: Without dead ends: 333 [2019-12-07 14:22:13,879 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=382, Unknown=0, NotChecked=0, Total=462 [2019-12-07 14:22:13,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2019-12-07 14:22:13,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 303. [2019-12-07 14:22:13,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2019-12-07 14:22:13,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 528 transitions. [2019-12-07 14:22:13,882 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 528 transitions. Word has length 57 [2019-12-07 14:22:13,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:13,882 INFO L462 AbstractCegarLoop]: Abstraction has 303 states and 528 transitions. [2019-12-07 14:22:13,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:22:13,882 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 528 transitions. [2019-12-07 14:22:13,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 14:22:13,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:13,882 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:13,882 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:13,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:13,883 INFO L82 PathProgramCache]: Analyzing trace with hash 1886575453, now seen corresponding path program 2 times [2019-12-07 14:22:13,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:13,883 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602720567] [2019-12-07 14:22:13,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:13,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:22:14,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:22:14,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602720567] [2019-12-07 14:22:14,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:22:14,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:22:14,048 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [365017654] [2019-12-07 14:22:14,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:22:14,048 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:22:14,048 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:22:14,048 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:22:14,048 INFO L87 Difference]: Start difference. First operand 303 states and 528 transitions. Second operand 12 states. [2019-12-07 14:22:14,285 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:22:14,285 INFO L93 Difference]: Finished difference Result 403 states and 681 transitions. [2019-12-07 14:22:14,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 14:22:14,286 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 57 [2019-12-07 14:22:14,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:22:14,286 INFO L225 Difference]: With dead ends: 403 [2019-12-07 14:22:14,286 INFO L226 Difference]: Without dead ends: 373 [2019-12-07 14:22:14,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2019-12-07 14:22:14,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2019-12-07 14:22:14,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 315. [2019-12-07 14:22:14,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 14:22:14,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 549 transitions. [2019-12-07 14:22:14,290 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 549 transitions. Word has length 57 [2019-12-07 14:22:14,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:22:14,290 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 549 transitions. [2019-12-07 14:22:14,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:22:14,290 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 549 transitions. [2019-12-07 14:22:14,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 14:22:14,291 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:22:14,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:22:14,291 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:22:14,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:22:14,291 INFO L82 PathProgramCache]: Analyzing trace with hash 731376245, now seen corresponding path program 3 times [2019-12-07 14:22:14,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:22:14,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989153102] [2019-12-07 14:22:14,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:22:14,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:22:14,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:22:14,366 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 14:22:14,366 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:22:14,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~weak$$choice0~0_25) (= 0 v_~y$r_buff0_thd3~0_151) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1492~0.base_26| 4)) (= v_~y$w_buff1~0_200 0) (= v_~y$w_buff0_used~0_650 0) (= v_~__unbuffered_cnt~0_109 0) (< 0 |v_#StackHeapBarrier_16|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t1492~0.base_26|) (= 0 v_~y$w_buff0~0_308) (= 0 v_~y$r_buff1_thd3~0_122) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff1_thd1~0_76) (= 0 |v_ULTIMATE.start_main_~#t1492~0.offset_19|) (= v_~z~0_51 0) (= v_~y$r_buff0_thd1~0_29 0) (= v_~main$tmp_guard1~0_28 0) (= v_~y$r_buff0_thd0~0_312 0) (= 0 v_~__unbuffered_p2_EAX~0_90) (= 0 v_~y$flush_delayed~0_45) (= v_~y$w_buff1_used~0_407 0) (= v_~y$r_buff0_thd2~0_88 0) (= |v_#NULL.offset_5| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1492~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1492~0.base_26|) |v_ULTIMATE.start_main_~#t1492~0.offset_19| 0)) |v_#memory_int_23|) (= 0 v_~y$r_buff1_thd2~0_131) (= (store .cse0 |v_ULTIMATE.start_main_~#t1492~0.base_26| 1) |v_#valid_60|) (= v_~y$mem_tmp~0_31 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= v_~weak$$choice2~0_131 0) (= v_~y$r_buff1_thd0~0_254 0) (= v_~main$tmp_guard0~0_24 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1492~0.base_26|)) (= 0 |v_#NULL.base_5|) (= v_~x~0_80 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_26|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_104|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start_main_~#t1493~0.offset=|v_ULTIMATE.start_main_~#t1493~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_122, ULTIMATE.start_main_~#t1494~0.base=|v_ULTIMATE.start_main_~#t1494~0.base_21|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_90, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_34|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_142|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_98|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_27|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ULTIMATE.start_main_~#t1494~0.offset=|v_ULTIMATE.start_main_~#t1494~0.offset_14|, ~weak$$choice0~0=v_~weak$$choice0~0_25, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_88, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_254, ~x~0=v_~x~0_80, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_650, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_38|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_31|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_32|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_58|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_~#t1493~0.base=|v_ULTIMATE.start_main_~#t1493~0.base_26|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_76, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~y$w_buff0~0=v_~y$w_buff0~0_308, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_151, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t1492~0.offset=|v_ULTIMATE.start_main_~#t1492~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_44|, ULTIMATE.start_main_~#t1492~0.base=|v_ULTIMATE.start_main_~#t1492~0.base_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_96|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_31|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_31|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_131, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_312, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_51, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1493~0.offset, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t1494~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1494~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t1493~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1492~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_~#t1492~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:22:14,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L800-1-->L802: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1493~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1493~0.base_13| 0)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1493~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t1493~0.offset_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1493~0.base_13| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1493~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1493~0.base_13|) |v_ULTIMATE.start_main_~#t1493~0.offset_11| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1493~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1493~0.offset=|v_ULTIMATE.start_main_~#t1493~0.offset_11|, ULTIMATE.start_main_~#t1493~0.base=|v_ULTIMATE.start_main_~#t1493~0.base_13|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1493~0.offset, ULTIMATE.start_main_~#t1493~0.base] because there is no mapped edge [2019-12-07 14:22:14,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L802-1-->L804: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1494~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t1494~0.offset_10|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1494~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t1494~0.base_12|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1494~0.base_12|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1494~0.base_12| 1) |v_#valid_38|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1494~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1494~0.base_12|) |v_ULTIMATE.start_main_~#t1494~0.offset_10| 2)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1494~0.offset=|v_ULTIMATE.start_main_~#t1494~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1494~0.base=|v_ULTIMATE.start_main_~#t1494~0.base_12|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1494~0.offset, ULTIMATE.start_main_~#t1494~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 14:22:14,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] P2ENTRY-->L4-3: Formula: (and (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10)) (= 2 v_~y$w_buff0~0_40) (= v_~y$w_buff0_used~0_161 1) (= v_~y$w_buff0~0_41 v_~y$w_buff1~0_32) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_89 256) 0)) (not (= 0 (mod v_~y$w_buff0_used~0_161 256))))) 1 0)) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_89 v_~y$w_buff0_used~0_162)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_162, ~y$w_buff0~0=v_~y$w_buff0~0_41, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_161, ~y$w_buff1~0=v_~y$w_buff1~0_32, ~y$w_buff0~0=v_~y$w_buff0~0_40, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_89} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:22:14,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_35 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_9|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_9|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= v_~x~0_49 1) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_9|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_9|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~z~0=v_~z~0_35, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_49, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 14:22:14,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1402330330 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1402330330 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out-1402330330| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out-1402330330| ~y$w_buff0_used~0_In-1402330330) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1402330330, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1402330330} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1402330330, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1402330330|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1402330330} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 14:22:14,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L748-2-->L748-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1653539709 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In1653539709 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1653539709| ~y~0_In1653539709)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out1653539709| ~y$w_buff1~0_In1653539709)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1653539709, ~y$w_buff1~0=~y$w_buff1~0_In1653539709, ~y~0=~y~0_In1653539709, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1653539709} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1653539709, ~y$w_buff1~0=~y$w_buff1~0_In1653539709, ~y~0=~y~0_In1653539709, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1653539709|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1653539709} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 14:22:14,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L748-4-->L749: Formula: (= |v_P1Thread1of1ForFork2_#t~ite3_10| v_~y~0_21) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_10|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_11|, ~y~0=v_~y~0_21, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_9|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 14:22:14,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-622684530 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-622684530 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-622684530 |P1Thread1of1ForFork2_#t~ite5_Out-622684530|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-622684530|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-622684530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-622684530} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-622684530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-622684530, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-622684530|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 14:22:14,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1888655857 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1888655857 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1888655857 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1888655857 256)))) (or (and (= ~y$w_buff1_used~0_In1888655857 |P1Thread1of1ForFork2_#t~ite6_Out1888655857|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1888655857|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1888655857, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1888655857, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1888655857, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1888655857} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1888655857, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1888655857, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1888655857, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1888655857|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1888655857} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 14:22:14,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1792127570 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1792127570 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1792127570| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1792127570| ~y$r_buff0_thd2~0_In1792127570)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1792127570, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1792127570} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1792127570, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1792127570, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1792127570|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 14:22:14,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1691391600 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1691391600 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1691391600 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1691391600 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite12_Out1691391600| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite12_Out1691391600| ~y$w_buff1_used~0_In1691391600)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1691391600, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1691391600, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1691391600, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1691391600} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1691391600, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1691391600, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1691391600|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1691391600, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1691391600} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 14:22:14,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1155486668 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1155486668 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1155486668 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1155486668 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-1155486668 |P1Thread1of1ForFork2_#t~ite8_Out-1155486668|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-1155486668|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1155486668, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1155486668, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1155486668, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1155486668} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1155486668, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1155486668, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1155486668|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1155486668, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1155486668} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 14:22:14,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L752-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_26| v_~y$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_56, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:22:14,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L780-->L781: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1149028145 ~y$r_buff0_thd3~0_Out-1149028145)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1149028145 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1149028145 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~y$r_buff0_thd3~0_Out-1149028145 0) (not .cse2) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1149028145, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1149028145} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1149028145, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1149028145, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1149028145|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 14:22:14,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1838651554 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1838651554 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1838651554 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1838651554 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite14_Out-1838651554| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-1838651554 |P2Thread1of1ForFork0_#t~ite14_Out-1838651554|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1838651554, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1838651554, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1838651554, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1838651554} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1838651554|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1838651554, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1838651554, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1838651554, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1838651554} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L781-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_38| v_~y$r_buff1_thd3~0_68) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [617] [617] L804-1-->L810: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L810-2-->L810-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-94606689 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-94606689 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite18_Out-94606689| ~y$w_buff1~0_In-94606689) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite18_Out-94606689| ~y~0_In-94606689) (or .cse0 .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-94606689, ~y~0=~y~0_In-94606689, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-94606689, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-94606689} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-94606689, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-94606689|, ~y~0=~y~0_In-94606689, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-94606689, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-94606689} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L810-4-->L811: Formula: (= v_~y~0_40 |v_ULTIMATE.start_main_#t~ite18_13|) InVars {ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_13|} OutVars{ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_12|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_12|, ~y~0=v_~y~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19, ~y~0] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1331607331 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1331607331 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out1331607331|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out1331607331| ~y$w_buff0_used~0_In1331607331)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1331607331, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1331607331} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1331607331, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1331607331, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1331607331|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 14:22:14,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In786920184 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In786920184 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In786920184 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In786920184 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite21_Out786920184| ~y$w_buff1_used~0_In786920184)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite21_Out786920184| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In786920184, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In786920184, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In786920184, ~y$w_buff1_used~0=~y$w_buff1_used~0_In786920184} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In786920184, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In786920184, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out786920184|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In786920184, ~y$w_buff1_used~0=~y$w_buff1_used~0_In786920184} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 14:22:14,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2083456431 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2083456431 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-2083456431| 0) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-2083456431 |ULTIMATE.start_main_#t~ite22_Out-2083456431|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2083456431, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2083456431} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2083456431, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2083456431, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-2083456431|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 14:22:14,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1935515702 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1935515702 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1935515702 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1935515702 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out1935515702|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1935515702 |ULTIMATE.start_main_#t~ite23_Out1935515702|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1935515702, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1935515702, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1935515702, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1935515702} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1935515702, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1935515702, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1935515702, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1935515702|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1935515702} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 14:22:14,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1044338518 256) 0))) (or (and .cse0 (= ~y$w_buff0~0_In1044338518 |ULTIMATE.start_main_#t~ite29_Out1044338518|) (= |ULTIMATE.start_main_#t~ite30_Out1044338518| |ULTIMATE.start_main_#t~ite29_Out1044338518|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1044338518 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1044338518 256)) (and (= (mod ~y$r_buff1_thd0~0_In1044338518 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1044338518 256)))))) (and (= |ULTIMATE.start_main_#t~ite29_In1044338518| |ULTIMATE.start_main_#t~ite29_Out1044338518|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out1044338518| ~y$w_buff0~0_In1044338518)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1044338518, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In1044338518|, ~y$w_buff0~0=~y$w_buff0~0_In1044338518, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1044338518, ~weak$$choice2~0=~weak$$choice2~0_In1044338518, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1044338518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1044338518} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out1044338518|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1044338518, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1044338518|, ~y$w_buff0~0=~y$w_buff0~0_In1044338518, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1044338518, ~weak$$choice2~0=~weak$$choice2~0_In1044338518, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1044338518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1044338518} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:22:14,377 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [631] [631] L826-->L827: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~y$r_buff0_thd0~0_86 v_~y$r_buff0_thd0~0_85)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_86, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:22:14,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L829-->L832-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_12 256)) (= v_~y~0_109 v_~y$mem_tmp~0_21) (not (= 0 (mod v_~y$flush_delayed~0_33 256))) (= 0 v_~y$flush_delayed~0_32)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_109, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:22:14,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:22:14,441 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:22:14 BasicIcfg [2019-12-07 14:22:14,442 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:22:14,442 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:22:14,442 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:22:14,442 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:22:14,443 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:22:02" (3/4) ... [2019-12-07 14:22:14,444 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:22:14,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= 0 v_~weak$$choice0~0_25) (= 0 v_~y$r_buff0_thd3~0_151) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1492~0.base_26| 4)) (= v_~y$w_buff1~0_200 0) (= v_~y$w_buff0_used~0_650 0) (= v_~__unbuffered_cnt~0_109 0) (< 0 |v_#StackHeapBarrier_16|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t1492~0.base_26|) (= 0 v_~y$w_buff0~0_308) (= 0 v_~y$r_buff1_thd3~0_122) (= v_~y$read_delayed~0_6 0) (= 0 v_~y$r_buff1_thd1~0_76) (= 0 |v_ULTIMATE.start_main_~#t1492~0.offset_19|) (= v_~z~0_51 0) (= v_~y$r_buff0_thd1~0_29 0) (= v_~main$tmp_guard1~0_28 0) (= v_~y$r_buff0_thd0~0_312 0) (= 0 v_~__unbuffered_p2_EAX~0_90) (= 0 v_~y$flush_delayed~0_45) (= v_~y$w_buff1_used~0_407 0) (= v_~y$r_buff0_thd2~0_88 0) (= |v_#NULL.offset_5| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1492~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1492~0.base_26|) |v_ULTIMATE.start_main_~#t1492~0.offset_19| 0)) |v_#memory_int_23|) (= 0 v_~y$r_buff1_thd2~0_131) (= (store .cse0 |v_ULTIMATE.start_main_~#t1492~0.base_26| 1) |v_#valid_60|) (= v_~y$mem_tmp~0_31 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y~0_150 0) (= v_~weak$$choice2~0_131 0) (= v_~y$r_buff1_thd0~0_254 0) (= v_~main$tmp_guard0~0_24 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1492~0.base_26|)) (= 0 |v_#NULL.base_5|) (= v_~x~0_80 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_26|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_104|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_52|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_26|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_38|, ULTIMATE.start_main_~#t1493~0.offset=|v_ULTIMATE.start_main_~#t1493~0.offset_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_122, ULTIMATE.start_main_~#t1494~0.base=|v_ULTIMATE.start_main_~#t1494~0.base_21|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_29, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_90, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_34|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_142|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_31|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_98|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_27|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_26|, ULTIMATE.start_main_~#t1494~0.offset=|v_ULTIMATE.start_main_~#t1494~0.offset_14|, ~weak$$choice0~0=v_~weak$$choice0~0_25, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_28|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_88, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_22|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_109, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_254, ~x~0=v_~x~0_80, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_650, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_38|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_31|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_28, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_28|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_32|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_16|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_58|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_~#t1493~0.base=|v_ULTIMATE.start_main_~#t1493~0.base_26|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_76, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~y$w_buff0~0=v_~y$w_buff0~0_308, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_151, ~y~0=v_~y~0_150, ULTIMATE.start_main_~#t1492~0.offset=|v_ULTIMATE.start_main_~#t1492~0.offset_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_30|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_44|, ULTIMATE.start_main_~#t1492~0.base=|v_ULTIMATE.start_main_~#t1492~0.base_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_96|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_31|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_31|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_131, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_28|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_312, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_51, ~weak$$choice2~0=v_~weak$$choice2~0_131, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1493~0.offset, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t1494~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1494~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t1493~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_~#t1492~0.offset, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_~#t1492~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:22:14,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L800-1-->L802: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1493~0.base_13|) (not (= |v_ULTIMATE.start_main_~#t1493~0.base_13| 0)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1493~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t1493~0.offset_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1493~0.base_13| 4)) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1493~0.base_13| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1493~0.base_13|) |v_ULTIMATE.start_main_~#t1493~0.offset_11| 1)) |v_#memory_int_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1493~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1493~0.offset=|v_ULTIMATE.start_main_~#t1493~0.offset_11|, ULTIMATE.start_main_~#t1493~0.base=|v_ULTIMATE.start_main_~#t1493~0.base_13|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1493~0.offset, ULTIMATE.start_main_~#t1493~0.base] because there is no mapped edge [2019-12-07 14:22:14,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L802-1-->L804: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1494~0.base_12| 4)) (= 0 |v_ULTIMATE.start_main_~#t1494~0.offset_10|) (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1494~0.base_12|)) (not (= 0 |v_ULTIMATE.start_main_~#t1494~0.base_12|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1494~0.base_12|) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1494~0.base_12| 1) |v_#valid_38|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1494~0.base_12| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1494~0.base_12|) |v_ULTIMATE.start_main_~#t1494~0.offset_10| 2)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1494~0.offset=|v_ULTIMATE.start_main_~#t1494~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1494~0.base=|v_ULTIMATE.start_main_~#t1494~0.base_12|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1494~0.offset, ULTIMATE.start_main_~#t1494~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, #length] because there is no mapped edge [2019-12-07 14:22:14,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] P2ENTRY-->L4-3: Formula: (and (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10)) (= 2 v_~y$w_buff0~0_40) (= v_~y$w_buff0_used~0_161 1) (= v_~y$w_buff0~0_41 v_~y$w_buff1~0_32) (= v_P2Thread1of1ForFork0_~arg.base_6 |v_P2Thread1of1ForFork0_#in~arg.base_8|) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6| (ite (not (and (not (= (mod v_~y$w_buff1_used~0_89 256) 0)) (not (= 0 (mod v_~y$w_buff0_used~0_161 256))))) 1 0)) (= v_P2Thread1of1ForFork0_~arg.offset_6 |v_P2Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_89 v_~y$w_buff0_used~0_162)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_162, ~y$w_buff0~0=v_~y$w_buff0~0_41, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_6, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_8|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_161, ~y$w_buff1~0=v_~y$w_buff1~0_32, ~y$w_buff0~0=v_~y$w_buff0~0_40, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_6, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_8|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_10, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_89} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:22:14,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] P0ENTRY-->P0EXIT: Formula: (and (= v_~z~0_35 1) (= 0 |v_P0Thread1of1ForFork1_#res.base_9|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_9|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= v_~x~0_49 1) (= v_~__unbuffered_cnt~0_67 (+ v_~__unbuffered_cnt~0_68 1))) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|} OutVars{P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_9|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_9|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~z~0=v_~z~0_35, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_49, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, ~x~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 14:22:14,447 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [679] [679] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1402330330 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1402330330 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite11_Out-1402330330| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite11_Out-1402330330| ~y$w_buff0_used~0_In-1402330330) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1402330330, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1402330330} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1402330330, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-1402330330|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1402330330} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 14:22:14,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L748-2-->L748-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1653539709 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In1653539709 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite3_Out1653539709| ~y~0_In1653539709)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite3_Out1653539709| ~y$w_buff1~0_In1653539709)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1653539709, ~y$w_buff1~0=~y$w_buff1~0_In1653539709, ~y~0=~y~0_In1653539709, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1653539709} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1653539709, ~y$w_buff1~0=~y$w_buff1~0_In1653539709, ~y~0=~y~0_In1653539709, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out1653539709|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1653539709} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 14:22:14,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [618] [618] L748-4-->L749: Formula: (= |v_P1Thread1of1ForFork2_#t~ite3_10| v_~y~0_21) InVars {P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_10|} OutVars{P1Thread1of1ForFork2_#t~ite4=|v_P1Thread1of1ForFork2_#t~ite4_11|, ~y~0=v_~y~0_21, P1Thread1of1ForFork2_#t~ite3=|v_P1Thread1of1ForFork2_#t~ite3_9|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, ~y~0, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 14:22:14,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L749-->L749-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-622684530 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-622684530 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-622684530 |P1Thread1of1ForFork2_#t~ite5_Out-622684530|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out-622684530|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-622684530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-622684530} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-622684530, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-622684530, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out-622684530|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 14:22:14,448 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L750-->L750-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In1888655857 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1888655857 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1888655857 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1888655857 256)))) (or (and (= ~y$w_buff1_used~0_In1888655857 |P1Thread1of1ForFork2_#t~ite6_Out1888655857|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork2_#t~ite6_Out1888655857|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1888655857, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1888655857, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1888655857, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1888655857} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1888655857, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1888655857, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1888655857, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out1888655857|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1888655857} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 14:22:14,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1792127570 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1792127570 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1792127570| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite7_Out1792127570| ~y$r_buff0_thd2~0_In1792127570)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1792127570, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1792127570} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1792127570, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1792127570, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out1792127570|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 14:22:14,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1691391600 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In1691391600 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd3~0_In1691391600 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In1691391600 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite12_Out1691391600| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite12_Out1691391600| ~y$w_buff1_used~0_In1691391600)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1691391600, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1691391600, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1691391600, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1691391600} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1691391600, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1691391600, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out1691391600|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1691391600, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1691391600} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 14:22:14,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1155486668 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1155486668 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1155486668 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1155486668 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-1155486668 |P1Thread1of1ForFork2_#t~ite8_Out-1155486668|)) (and (= 0 |P1Thread1of1ForFork2_#t~ite8_Out-1155486668|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1155486668, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1155486668, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1155486668, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1155486668} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1155486668, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1155486668, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out-1155486668|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1155486668, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1155486668} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 14:22:14,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L752-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_26| v_~y$r_buff1_thd2~0_56) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74)) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_56, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_25|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:22:14,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L780-->L781: Formula: (let ((.cse1 (= ~y$r_buff0_thd3~0_In-1149028145 ~y$r_buff0_thd3~0_Out-1149028145)) (.cse2 (= (mod ~y$r_buff0_thd3~0_In-1149028145 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1149028145 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~y$r_buff0_thd3~0_Out-1149028145 0) (not .cse2) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1149028145, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1149028145} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1149028145, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-1149028145, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-1149028145|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L781-->L781-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1838651554 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1838651554 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1838651554 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1838651554 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite14_Out-1838651554| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~y$r_buff1_thd3~0_In-1838651554 |P2Thread1of1ForFork0_#t~ite14_Out-1838651554|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1838651554, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1838651554, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1838651554, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1838651554} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out-1838651554|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1838651554, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1838651554, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1838651554, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1838651554} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L781-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#t~ite14_38| v_~y$r_buff1_thd3~0_68) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_68, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [617] [617] L804-1-->L810: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L810-2-->L810-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-94606689 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-94606689 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite18_Out-94606689| ~y$w_buff1~0_In-94606689) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite18_Out-94606689| ~y~0_In-94606689) (or .cse0 .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-94606689, ~y~0=~y~0_In-94606689, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-94606689, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-94606689} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-94606689, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-94606689|, ~y~0=~y~0_In-94606689, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-94606689, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-94606689} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L810-4-->L811: Formula: (= v_~y~0_40 |v_ULTIMATE.start_main_#t~ite18_13|) InVars {ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_13|} OutVars{ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_12|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_12|, ~y~0=v_~y~0_40} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19, ~y~0] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In1331607331 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1331607331 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite20_Out1331607331|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite20_Out1331607331| ~y$w_buff0_used~0_In1331607331)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1331607331, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1331607331} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1331607331, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1331607331, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1331607331|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 14:22:14,450 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd0~0_In786920184 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In786920184 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In786920184 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In786920184 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite21_Out786920184| ~y$w_buff1_used~0_In786920184)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite21_Out786920184| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In786920184, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In786920184, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In786920184, ~y$w_buff1_used~0=~y$w_buff1_used~0_In786920184} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In786920184, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In786920184, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out786920184|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In786920184, ~y$w_buff1_used~0=~y$w_buff1_used~0_In786920184} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 14:22:14,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [682] [682] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-2083456431 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-2083456431 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out-2083456431| 0) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-2083456431 |ULTIMATE.start_main_#t~ite22_Out-2083456431|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2083456431, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2083456431} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2083456431, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2083456431, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-2083456431|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 14:22:14,451 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L814-->L814-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff0_thd0~0_In1935515702 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In1935515702 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In1935515702 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1935515702 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite23_Out1935515702|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In1935515702 |ULTIMATE.start_main_#t~ite23_Out1935515702|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1935515702, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1935515702, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1935515702, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1935515702} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1935515702, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1935515702, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1935515702, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out1935515702|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1935515702} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 14:22:14,452 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L822-->L822-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1044338518 256) 0))) (or (and .cse0 (= ~y$w_buff0~0_In1044338518 |ULTIMATE.start_main_#t~ite29_Out1044338518|) (= |ULTIMATE.start_main_#t~ite30_Out1044338518| |ULTIMATE.start_main_#t~ite29_Out1044338518|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1044338518 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1044338518 256)) (and (= (mod ~y$r_buff1_thd0~0_In1044338518 256) 0) .cse1) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In1044338518 256)))))) (and (= |ULTIMATE.start_main_#t~ite29_In1044338518| |ULTIMATE.start_main_#t~ite29_Out1044338518|) (not .cse0) (= |ULTIMATE.start_main_#t~ite30_Out1044338518| ~y$w_buff0~0_In1044338518)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1044338518, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_In1044338518|, ~y$w_buff0~0=~y$w_buff0~0_In1044338518, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1044338518, ~weak$$choice2~0=~weak$$choice2~0_In1044338518, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1044338518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1044338518} OutVars{ULTIMATE.start_main_#t~ite30=|ULTIMATE.start_main_#t~ite30_Out1044338518|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1044338518, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1044338518|, ~y$w_buff0~0=~y$w_buff0~0_In1044338518, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1044338518, ~weak$$choice2~0=~weak$$choice2~0_In1044338518, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1044338518, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1044338518} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:22:14,453 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [631] [631] L826-->L827: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~y$r_buff0_thd0~0_86 v_~y$r_buff0_thd0~0_85)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_86, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_6|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_10|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_85, ~weak$$choice2~0=v_~weak$$choice2~0_27, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:22:14,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L829-->L832-1: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5| (mod v_~main$tmp_guard1~0_12 256)) (= v_~y~0_109 v_~y$mem_tmp~0_21) (not (= 0 (mod v_~y$flush_delayed~0_33 256))) (= 0 v_~y$flush_delayed~0_32)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_32, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_109, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:22:14,454 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:22:14,517 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_43db4681-2ab0-4c83-a91d-3a29e35e453c/bin/utaipan/witness.graphml [2019-12-07 14:22:14,517 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:22:14,519 INFO L168 Benchmark]: Toolchain (without parser) took 12397.75 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 790.6 MB). Free memory was 938.1 MB in the beginning and 1.2 GB in the end (delta: -262.4 MB). Peak memory consumption was 528.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,519 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:22:14,519 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.10 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.8 MB). Free memory was 938.1 MB in the beginning and 1.0 GB in the end (delta: -110.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,520 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,520 INFO L168 Benchmark]: Boogie Preprocessor took 25.42 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:22:14,520 INFO L168 Benchmark]: RCFGBuilder took 392.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 988.9 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,521 INFO L168 Benchmark]: TraceAbstraction took 11478.94 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 708.8 MB). Free memory was 988.9 MB in the beginning and 1.2 GB in the end (delta: -233.0 MB). Peak memory consumption was 475.9 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,521 INFO L168 Benchmark]: Witness Printer took 75.38 ms. Allocated memory is still 1.8 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 21.4 MB). Peak memory consumption was 21.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:22:14,523 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.10 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 81.8 MB). Free memory was 938.1 MB in the beginning and 1.0 GB in the end (delta: -110.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.42 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 392.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 988.9 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 11478.94 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 708.8 MB). Free memory was 988.9 MB in the beginning and 1.2 GB in the end (delta: -233.0 MB). Peak memory consumption was 475.9 MB. Max. memory is 11.5 GB. * Witness Printer took 75.38 ms. Allocated memory is still 1.8 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 21.4 MB). Peak memory consumption was 21.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 162 ProgramPointsBefore, 83 ProgramPointsAfterwards, 193 TransitionsBefore, 92 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 26 ChoiceCompositions, 3955 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 45 SemBasedMoverChecksPositive, 196 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 48383 CheckedPairsTotal, 109 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t1492, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L802] FCALL, FORK 0 pthread_create(&t1493, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L804] FCALL, FORK 0 pthread_create(&t1494, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L767] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L768] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L769] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L770] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L771] 3 y$r_buff0_thd3 = (_Bool)1 [L774] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=0] [L777] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L742] 2 x = 2 [L745] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L777] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L748] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L749] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L750] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L751] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L810] 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 153 locations, 2 error locations. Result: UNSAFE, OverallTime: 11.3s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 3.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1970 SDtfs, 1707 SDslu, 4210 SDs, 0 SdLazy, 2398 SolverSat, 119 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 156 GetRequests, 36 SyntacticMatches, 17 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=28190occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 17606 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 789 NumberOfCodeBlocks, 789 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 714 ConstructedInterpolants, 0 QuantifiedInterpolants, 115054 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...