./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5b676ce6437ac80c313d6dd94676f0b49566a5c0 .......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:54:21,152 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:54:21,153 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:54:21,160 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:54:21,161 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:54:21,161 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:54:21,162 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:54:21,164 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:54:21,165 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:54:21,165 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:54:21,166 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:54:21,167 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:54:21,167 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:54:21,168 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:54:21,168 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:54:21,169 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:54:21,170 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:54:21,170 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:54:21,172 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:54:21,173 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:54:21,174 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:54:21,175 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:54:21,176 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:54:21,176 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:54:21,178 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:54:21,178 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:54:21,178 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:54:21,178 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:54:21,179 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:54:21,179 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:54:21,179 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:54:21,180 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:54:21,180 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:54:21,181 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:54:21,181 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:54:21,182 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:54:21,182 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:54:21,182 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:54:21,182 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:54:21,183 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:54:21,183 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:54:21,184 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 10:54:21,193 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:54:21,193 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:54:21,194 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 10:54:21,194 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 10:54:21,194 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 10:54:21,194 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 10:54:21,194 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 10:54:21,194 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 10:54:21,195 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 10:54:21,195 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 10:54:21,196 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:54:21,196 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:54:21,197 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:54:21,197 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:54:21,198 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:54:21,198 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:54:21,199 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:54:21,199 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 10:54:21,199 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5b676ce6437ac80c313d6dd94676f0b49566a5c0 [2019-12-07 10:54:21,296 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:54:21,306 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:54:21,308 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:54:21,309 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:54:21,309 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:54:21,310 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i [2019-12-07 10:54:21,348 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/data/08e97dbee/092d127f5f0749099ce3a24a28e77a36/FLAGc58c5b9c0 [2019-12-07 10:54:21,812 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:54:21,813 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/sv-benchmarks/c/pthread-wmm/mix056_pso.oepc.i [2019-12-07 10:54:21,826 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/data/08e97dbee/092d127f5f0749099ce3a24a28e77a36/FLAGc58c5b9c0 [2019-12-07 10:54:21,837 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/data/08e97dbee/092d127f5f0749099ce3a24a28e77a36 [2019-12-07 10:54:21,839 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:54:21,840 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:54:21,841 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:54:21,841 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:54:21,843 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:54:21,844 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:54:21" (1/1) ... [2019-12-07 10:54:21,845 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d8e373 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:21, skipping insertion in model container [2019-12-07 10:54:21,846 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:54:21" (1/1) ... [2019-12-07 10:54:21,851 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:54:21,888 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:54:22,140 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:54:22,147 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:54:22,191 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:54:22,239 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:54:22,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22 WrapperNode [2019-12-07 10:54:22,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:54:22,240 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:54:22,240 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:54:22,240 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:54:22,246 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,259 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,280 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:54:22,280 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:54:22,280 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:54:22,280 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:54:22,286 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,287 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,290 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,290 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,297 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,300 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,302 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... [2019-12-07 10:54:22,305 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:54:22,305 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:54:22,305 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:54:22,305 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:54:22,306 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:54:22,345 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:54:22,345 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:54:22,345 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:54:22,345 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:54:22,346 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:54:22,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:54:22,346 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:54:22,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:54:22,346 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:54:22,346 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:54:22,346 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:54:22,346 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:54:22,346 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:54:22,347 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:54:22,711 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:54:22,711 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:54:22,712 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:54:22 BoogieIcfgContainer [2019-12-07 10:54:22,712 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:54:22,712 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:54:22,713 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:54:22,714 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:54:22,714 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:54:21" (1/3) ... [2019-12-07 10:54:22,715 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5793e25a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:54:22, skipping insertion in model container [2019-12-07 10:54:22,715 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:54:22" (2/3) ... [2019-12-07 10:54:22,715 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5793e25a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:54:22, skipping insertion in model container [2019-12-07 10:54:22,715 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:54:22" (3/3) ... [2019-12-07 10:54:22,716 INFO L109 eAbstractionObserver]: Analyzing ICFG mix056_pso.oepc.i [2019-12-07 10:54:22,723 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:54:22,723 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:54:22,728 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:54:22,728 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,755 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,756 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,756 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,756 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,757 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,758 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,759 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,762 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,763 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,764 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,768 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,781 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,782 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,783 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,784 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,785 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:54:22,796 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:54:22,808 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:54:22,808 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:54:22,808 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:54:22,808 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:54:22,808 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:54:22,808 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:54:22,808 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:54:22,808 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:54:22,819 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 10:54:22,820 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 10:54:22,876 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 10:54:22,876 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:54:22,887 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:54:22,902 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 10:54:22,935 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 10:54:22,935 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:54:22,940 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 705 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:54:22,955 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:54:22,956 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:54:25,949 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 40 [2019-12-07 10:54:26,130 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 10:54:26,211 INFO L206 etLargeBlockEncoding]: Checked pairs total: 77200 [2019-12-07 10:54:26,212 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 10:54:26,214 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 10:54:37,503 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 102314 states. [2019-12-07 10:54:37,504 INFO L276 IsEmpty]: Start isEmpty. Operand 102314 states. [2019-12-07 10:54:37,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:54:37,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:37,508 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:54:37,509 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:37,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:37,512 INFO L82 PathProgramCache]: Analyzing trace with hash 909908, now seen corresponding path program 1 times [2019-12-07 10:54:37,518 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:54:37,518 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747587560] [2019-12-07 10:54:37,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:37,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:37,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:37,649 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747587560] [2019-12-07 10:54:37,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:37,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:54:37,650 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141484248] [2019-12-07 10:54:37,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:54:37,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:54:37,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:54:37,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:37,664 INFO L87 Difference]: Start difference. First operand 102314 states. Second operand 3 states. [2019-12-07 10:54:38,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:38,330 INFO L93 Difference]: Finished difference Result 101472 states and 432734 transitions. [2019-12-07 10:54:38,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:54:38,332 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:54:38,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:38,739 INFO L225 Difference]: With dead ends: 101472 [2019-12-07 10:54:38,739 INFO L226 Difference]: Without dead ends: 95232 [2019-12-07 10:54:38,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:54:42,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95232 states. [2019-12-07 10:54:43,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95232 to 95232. [2019-12-07 10:54:43,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95232 states. [2019-12-07 10:54:45,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95232 states to 95232 states and 405538 transitions. [2019-12-07 10:54:45,499 INFO L78 Accepts]: Start accepts. Automaton has 95232 states and 405538 transitions. Word has length 3 [2019-12-07 10:54:45,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:45,500 INFO L462 AbstractCegarLoop]: Abstraction has 95232 states and 405538 transitions. [2019-12-07 10:54:45,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:54:45,500 INFO L276 IsEmpty]: Start isEmpty. Operand 95232 states and 405538 transitions. [2019-12-07 10:54:45,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:54:45,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:45,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:45,504 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:45,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:45,505 INFO L82 PathProgramCache]: Analyzing trace with hash 1729820714, now seen corresponding path program 1 times [2019-12-07 10:54:45,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:54:45,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557007359] [2019-12-07 10:54:45,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:45,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:45,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:45,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557007359] [2019-12-07 10:54:45,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:45,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:54:45,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134556496] [2019-12-07 10:54:45,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:54:45,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:54:45,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:54:45,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:54:45,568 INFO L87 Difference]: Start difference. First operand 95232 states and 405538 transitions. Second operand 4 states. [2019-12-07 10:54:46,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:46,477 INFO L93 Difference]: Finished difference Result 151692 states and 619304 transitions. [2019-12-07 10:54:46,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:54:46,477 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:54:46,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:46,884 INFO L225 Difference]: With dead ends: 151692 [2019-12-07 10:54:46,884 INFO L226 Difference]: Without dead ends: 151643 [2019-12-07 10:54:46,885 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:54:51,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151643 states. [2019-12-07 10:54:53,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151643 to 138429. [2019-12-07 10:54:53,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138429 states. [2019-12-07 10:54:53,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138429 states to 138429 states and 572602 transitions. [2019-12-07 10:54:53,464 INFO L78 Accepts]: Start accepts. Automaton has 138429 states and 572602 transitions. Word has length 11 [2019-12-07 10:54:53,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:54:53,465 INFO L462 AbstractCegarLoop]: Abstraction has 138429 states and 572602 transitions. [2019-12-07 10:54:53,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:54:53,465 INFO L276 IsEmpty]: Start isEmpty. Operand 138429 states and 572602 transitions. [2019-12-07 10:54:53,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:54:53,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:54:53,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:54:53,469 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:54:53,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:54:53,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1791451612, now seen corresponding path program 1 times [2019-12-07 10:54:53,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:54:53,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520658640] [2019-12-07 10:54:53,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:54:53,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:54:53,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:54:53,517 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520658640] [2019-12-07 10:54:53,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:54:53,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:54:53,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380356864] [2019-12-07 10:54:53,518 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:54:53,518 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:54:53,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:54:53,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:54:53,519 INFO L87 Difference]: Start difference. First operand 138429 states and 572602 transitions. Second operand 4 states. [2019-12-07 10:54:54,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:54:54,813 INFO L93 Difference]: Finished difference Result 197916 states and 800228 transitions. [2019-12-07 10:54:54,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:54:54,813 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:54:54,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:54:55,341 INFO L225 Difference]: With dead ends: 197916 [2019-12-07 10:54:55,341 INFO L226 Difference]: Without dead ends: 197860 [2019-12-07 10:54:55,341 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:01,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197860 states. [2019-12-07 10:55:04,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197860 to 165384. [2019-12-07 10:55:04,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165384 states. [2019-12-07 10:55:04,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165384 states to 165384 states and 680683 transitions. [2019-12-07 10:55:04,575 INFO L78 Accepts]: Start accepts. Automaton has 165384 states and 680683 transitions. Word has length 13 [2019-12-07 10:55:04,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:04,576 INFO L462 AbstractCegarLoop]: Abstraction has 165384 states and 680683 transitions. [2019-12-07 10:55:04,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:55:04,576 INFO L276 IsEmpty]: Start isEmpty. Operand 165384 states and 680683 transitions. [2019-12-07 10:55:04,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:55:04,581 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:04,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:04,581 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:04,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:04,582 INFO L82 PathProgramCache]: Analyzing trace with hash -137996123, now seen corresponding path program 1 times [2019-12-07 10:55:04,582 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:04,582 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006698624] [2019-12-07 10:55:04,582 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:04,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:04,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:04,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006698624] [2019-12-07 10:55:04,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:04,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:04,611 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [226148618] [2019-12-07 10:55:04,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:55:04,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:04,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:55:04,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:04,612 INFO L87 Difference]: Start difference. First operand 165384 states and 680683 transitions. Second operand 3 states. [2019-12-07 10:55:05,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:05,684 INFO L93 Difference]: Finished difference Result 244100 states and 1002631 transitions. [2019-12-07 10:55:05,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:55:05,685 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 10:55:05,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:06,809 INFO L225 Difference]: With dead ends: 244100 [2019-12-07 10:55:06,809 INFO L226 Difference]: Without dead ends: 244100 [2019-12-07 10:55:06,809 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:11,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244100 states. [2019-12-07 10:55:16,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244100 to 183753. [2019-12-07 10:55:16,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183753 states. [2019-12-07 10:55:17,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183753 states to 183753 states and 759316 transitions. [2019-12-07 10:55:17,218 INFO L78 Accepts]: Start accepts. Automaton has 183753 states and 759316 transitions. Word has length 16 [2019-12-07 10:55:17,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:17,218 INFO L462 AbstractCegarLoop]: Abstraction has 183753 states and 759316 transitions. [2019-12-07 10:55:17,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:55:17,218 INFO L276 IsEmpty]: Start isEmpty. Operand 183753 states and 759316 transitions. [2019-12-07 10:55:17,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:55:17,225 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:17,225 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:17,225 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:17,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:17,225 INFO L82 PathProgramCache]: Analyzing trace with hash -137876649, now seen corresponding path program 1 times [2019-12-07 10:55:17,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:17,226 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634113893] [2019-12-07 10:55:17,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:17,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:17,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:17,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634113893] [2019-12-07 10:55:17,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:17,274 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:55:17,274 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1970567562] [2019-12-07 10:55:17,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:55:17,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:17,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:55:17,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:17,274 INFO L87 Difference]: Start difference. First operand 183753 states and 759316 transitions. Second operand 4 states. [2019-12-07 10:55:18,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:18,698 INFO L93 Difference]: Finished difference Result 219863 states and 898035 transitions. [2019-12-07 10:55:18,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:55:18,699 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:55:18,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:19,297 INFO L225 Difference]: With dead ends: 219863 [2019-12-07 10:55:19,298 INFO L226 Difference]: Without dead ends: 219863 [2019-12-07 10:55:19,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:24,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219863 states. [2019-12-07 10:55:27,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219863 to 194030. [2019-12-07 10:55:27,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194030 states. [2019-12-07 10:55:28,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194030 states to 194030 states and 800411 transitions. [2019-12-07 10:55:28,081 INFO L78 Accepts]: Start accepts. Automaton has 194030 states and 800411 transitions. Word has length 16 [2019-12-07 10:55:28,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:28,082 INFO L462 AbstractCegarLoop]: Abstraction has 194030 states and 800411 transitions. [2019-12-07 10:55:28,082 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:55:28,082 INFO L276 IsEmpty]: Start isEmpty. Operand 194030 states and 800411 transitions. [2019-12-07 10:55:28,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:55:28,086 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:28,086 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:28,086 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:28,087 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:28,087 INFO L82 PathProgramCache]: Analyzing trace with hash -219444717, now seen corresponding path program 1 times [2019-12-07 10:55:28,087 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:28,087 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985529522] [2019-12-07 10:55:28,087 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:28,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:28,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:28,124 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985529522] [2019-12-07 10:55:28,124 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:28,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:55:28,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [292492898] [2019-12-07 10:55:28,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:55:28,125 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:28,125 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:55:28,125 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:28,125 INFO L87 Difference]: Start difference. First operand 194030 states and 800411 transitions. Second operand 4 states. [2019-12-07 10:55:29,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:29,302 INFO L93 Difference]: Finished difference Result 232254 states and 951651 transitions. [2019-12-07 10:55:29,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:55:29,302 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:55:29,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:29,950 INFO L225 Difference]: With dead ends: 232254 [2019-12-07 10:55:29,950 INFO L226 Difference]: Without dead ends: 232254 [2019-12-07 10:55:29,951 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:37,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232254 states. [2019-12-07 10:55:40,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232254 to 195815. [2019-12-07 10:55:40,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195815 states. [2019-12-07 10:55:40,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195815 states to 195815 states and 808686 transitions. [2019-12-07 10:55:40,597 INFO L78 Accepts]: Start accepts. Automaton has 195815 states and 808686 transitions. Word has length 16 [2019-12-07 10:55:40,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:40,597 INFO L462 AbstractCegarLoop]: Abstraction has 195815 states and 808686 transitions. [2019-12-07 10:55:40,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:55:40,597 INFO L276 IsEmpty]: Start isEmpty. Operand 195815 states and 808686 transitions. [2019-12-07 10:55:40,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:55:40,610 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:40,610 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:40,610 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:40,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:40,611 INFO L82 PathProgramCache]: Analyzing trace with hash -604356166, now seen corresponding path program 1 times [2019-12-07 10:55:40,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:40,611 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454651056] [2019-12-07 10:55:40,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:40,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:40,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:40,644 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454651056] [2019-12-07 10:55:40,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:40,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:55:40,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1608670779] [2019-12-07 10:55:40,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:55:40,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:40,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:55:40,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:40,645 INFO L87 Difference]: Start difference. First operand 195815 states and 808686 transitions. Second operand 3 states. [2019-12-07 10:55:40,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:40,772 INFO L93 Difference]: Finished difference Result 38445 states and 125143 transitions. [2019-12-07 10:55:40,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:55:40,773 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:55:40,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:40,829 INFO L225 Difference]: With dead ends: 38445 [2019-12-07 10:55:40,829 INFO L226 Difference]: Without dead ends: 38445 [2019-12-07 10:55:40,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:41,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38445 states. [2019-12-07 10:55:41,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38445 to 38365. [2019-12-07 10:55:41,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38365 states. [2019-12-07 10:55:41,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38365 states to 38365 states and 124903 transitions. [2019-12-07 10:55:41,778 INFO L78 Accepts]: Start accepts. Automaton has 38365 states and 124903 transitions. Word has length 18 [2019-12-07 10:55:41,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:41,778 INFO L462 AbstractCegarLoop]: Abstraction has 38365 states and 124903 transitions. [2019-12-07 10:55:41,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:55:41,778 INFO L276 IsEmpty]: Start isEmpty. Operand 38365 states and 124903 transitions. [2019-12-07 10:55:41,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:55:41,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:41,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:41,783 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:41,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:41,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1066994180, now seen corresponding path program 1 times [2019-12-07 10:55:41,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:41,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961074836] [2019-12-07 10:55:41,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:41,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:41,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:41,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1961074836] [2019-12-07 10:55:41,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:41,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:41,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582789340] [2019-12-07 10:55:41,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:41,835 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:41,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:41,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:41,835 INFO L87 Difference]: Start difference. First operand 38365 states and 124903 transitions. Second operand 5 states. [2019-12-07 10:55:42,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:42,256 INFO L93 Difference]: Finished difference Result 53898 states and 171065 transitions. [2019-12-07 10:55:42,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:55:42,257 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:55:42,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:42,337 INFO L225 Difference]: With dead ends: 53898 [2019-12-07 10:55:42,338 INFO L226 Difference]: Without dead ends: 53891 [2019-12-07 10:55:42,338 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:55:42,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53891 states. [2019-12-07 10:55:43,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53891 to 39721. [2019-12-07 10:55:43,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39721 states. [2019-12-07 10:55:43,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39721 states to 39721 states and 129036 transitions. [2019-12-07 10:55:43,084 INFO L78 Accepts]: Start accepts. Automaton has 39721 states and 129036 transitions. Word has length 22 [2019-12-07 10:55:43,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:43,085 INFO L462 AbstractCegarLoop]: Abstraction has 39721 states and 129036 transitions. [2019-12-07 10:55:43,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:43,085 INFO L276 IsEmpty]: Start isEmpty. Operand 39721 states and 129036 transitions. [2019-12-07 10:55:43,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:55:43,090 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:43,090 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:43,090 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:43,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:43,090 INFO L82 PathProgramCache]: Analyzing trace with hash -1734556852, now seen corresponding path program 1 times [2019-12-07 10:55:43,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:43,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773855882] [2019-12-07 10:55:43,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:43,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:43,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:43,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1773855882] [2019-12-07 10:55:43,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:43,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:43,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274669429] [2019-12-07 10:55:43,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:43,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:43,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:43,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:43,127 INFO L87 Difference]: Start difference. First operand 39721 states and 129036 transitions. Second operand 5 states. [2019-12-07 10:55:43,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:43,535 INFO L93 Difference]: Finished difference Result 56181 states and 177938 transitions. [2019-12-07 10:55:43,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:55:43,536 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:55:43,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:43,620 INFO L225 Difference]: With dead ends: 56181 [2019-12-07 10:55:43,620 INFO L226 Difference]: Without dead ends: 56174 [2019-12-07 10:55:43,620 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:55:43,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56174 states. [2019-12-07 10:55:44,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56174 to 38054. [2019-12-07 10:55:44,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38054 states. [2019-12-07 10:55:44,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38054 states to 38054 states and 123745 transitions. [2019-12-07 10:55:44,655 INFO L78 Accepts]: Start accepts. Automaton has 38054 states and 123745 transitions. Word has length 22 [2019-12-07 10:55:44,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:44,655 INFO L462 AbstractCegarLoop]: Abstraction has 38054 states and 123745 transitions. [2019-12-07 10:55:44,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:44,655 INFO L276 IsEmpty]: Start isEmpty. Operand 38054 states and 123745 transitions. [2019-12-07 10:55:44,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:55:44,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:44,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:44,665 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:44,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:44,665 INFO L82 PathProgramCache]: Analyzing trace with hash -779030427, now seen corresponding path program 1 times [2019-12-07 10:55:44,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:44,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655679340] [2019-12-07 10:55:44,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:44,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:44,705 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:44,705 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655679340] [2019-12-07 10:55:44,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:44,706 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:44,706 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880862836] [2019-12-07 10:55:44,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:44,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:44,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:44,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:44,706 INFO L87 Difference]: Start difference. First operand 38054 states and 123745 transitions. Second operand 5 states. [2019-12-07 10:55:45,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:45,090 INFO L93 Difference]: Finished difference Result 53064 states and 168438 transitions. [2019-12-07 10:55:45,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:55:45,090 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 10:55:45,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:45,170 INFO L225 Difference]: With dead ends: 53064 [2019-12-07 10:55:45,170 INFO L226 Difference]: Without dead ends: 53051 [2019-12-07 10:55:45,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:45,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53051 states. [2019-12-07 10:55:45,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53051 to 44527. [2019-12-07 10:55:45,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44527 states. [2019-12-07 10:55:45,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44527 states to 44527 states and 143877 transitions. [2019-12-07 10:55:45,954 INFO L78 Accepts]: Start accepts. Automaton has 44527 states and 143877 transitions. Word has length 25 [2019-12-07 10:55:45,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:45,954 INFO L462 AbstractCegarLoop]: Abstraction has 44527 states and 143877 transitions. [2019-12-07 10:55:45,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:45,954 INFO L276 IsEmpty]: Start isEmpty. Operand 44527 states and 143877 transitions. [2019-12-07 10:55:45,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:55:45,967 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:45,967 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:45,967 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:45,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:45,967 INFO L82 PathProgramCache]: Analyzing trace with hash -1740727520, now seen corresponding path program 1 times [2019-12-07 10:55:45,967 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:45,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375230549] [2019-12-07 10:55:45,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:45,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:46,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:46,008 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375230549] [2019-12-07 10:55:46,008 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:46,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:46,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128345990] [2019-12-07 10:55:46,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:46,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:46,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:46,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:46,009 INFO L87 Difference]: Start difference. First operand 44527 states and 143877 transitions. Second operand 5 states. [2019-12-07 10:55:46,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:46,360 INFO L93 Difference]: Finished difference Result 57149 states and 181718 transitions. [2019-12-07 10:55:46,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:55:46,361 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 10:55:46,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:46,446 INFO L225 Difference]: With dead ends: 57149 [2019-12-07 10:55:46,446 INFO L226 Difference]: Without dead ends: 57125 [2019-12-07 10:55:46,447 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:46,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57125 states. [2019-12-07 10:55:47,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57125 to 49925. [2019-12-07 10:55:47,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49925 states. [2019-12-07 10:55:47,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49925 states to 49925 states and 160598 transitions. [2019-12-07 10:55:47,674 INFO L78 Accepts]: Start accepts. Automaton has 49925 states and 160598 transitions. Word has length 27 [2019-12-07 10:55:47,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:47,674 INFO L462 AbstractCegarLoop]: Abstraction has 49925 states and 160598 transitions. [2019-12-07 10:55:47,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:47,674 INFO L276 IsEmpty]: Start isEmpty. Operand 49925 states and 160598 transitions. [2019-12-07 10:55:47,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:55:47,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:47,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:47,690 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:47,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:47,690 INFO L82 PathProgramCache]: Analyzing trace with hash -1978987791, now seen corresponding path program 1 times [2019-12-07 10:55:47,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:47,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581747233] [2019-12-07 10:55:47,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:47,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:47,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:47,728 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581747233] [2019-12-07 10:55:47,728 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:47,728 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:47,728 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205776498] [2019-12-07 10:55:47,728 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:47,728 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:47,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:47,729 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:47,729 INFO L87 Difference]: Start difference. First operand 49925 states and 160598 transitions. Second operand 5 states. [2019-12-07 10:55:48,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:48,064 INFO L93 Difference]: Finished difference Result 60112 states and 190425 transitions. [2019-12-07 10:55:48,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:55:48,064 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:55:48,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:48,152 INFO L225 Difference]: With dead ends: 60112 [2019-12-07 10:55:48,153 INFO L226 Difference]: Without dead ends: 60090 [2019-12-07 10:55:48,153 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:48,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60090 states. [2019-12-07 10:55:48,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60090 to 48583. [2019-12-07 10:55:48,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48583 states. [2019-12-07 10:55:49,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48583 states to 48583 states and 156497 transitions. [2019-12-07 10:55:49,009 INFO L78 Accepts]: Start accepts. Automaton has 48583 states and 156497 transitions. Word has length 28 [2019-12-07 10:55:49,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:49,010 INFO L462 AbstractCegarLoop]: Abstraction has 48583 states and 156497 transitions. [2019-12-07 10:55:49,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:49,010 INFO L276 IsEmpty]: Start isEmpty. Operand 48583 states and 156497 transitions. [2019-12-07 10:55:49,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:55:49,025 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:49,025 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:49,025 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:49,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:49,025 INFO L82 PathProgramCache]: Analyzing trace with hash -906370244, now seen corresponding path program 1 times [2019-12-07 10:55:49,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:49,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1488254685] [2019-12-07 10:55:49,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:49,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:49,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:49,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1488254685] [2019-12-07 10:55:49,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:49,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:55:49,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441723558] [2019-12-07 10:55:49,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:49,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:49,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:49,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:49,072 INFO L87 Difference]: Start difference. First operand 48583 states and 156497 transitions. Second operand 5 states. [2019-12-07 10:55:49,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:49,580 INFO L93 Difference]: Finished difference Result 67084 states and 213778 transitions. [2019-12-07 10:55:49,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:55:49,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:55:49,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:49,679 INFO L225 Difference]: With dead ends: 67084 [2019-12-07 10:55:49,680 INFO L226 Difference]: Without dead ends: 67084 [2019-12-07 10:55:49,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:55:49,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67084 states. [2019-12-07 10:55:50,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67084 to 58697. [2019-12-07 10:55:50,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58697 states. [2019-12-07 10:55:50,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58697 states to 58697 states and 188868 transitions. [2019-12-07 10:55:50,732 INFO L78 Accepts]: Start accepts. Automaton has 58697 states and 188868 transitions. Word has length 28 [2019-12-07 10:55:50,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:50,732 INFO L462 AbstractCegarLoop]: Abstraction has 58697 states and 188868 transitions. [2019-12-07 10:55:50,732 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:50,732 INFO L276 IsEmpty]: Start isEmpty. Operand 58697 states and 188868 transitions. [2019-12-07 10:55:50,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:55:50,756 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:50,756 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:50,757 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:50,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:50,757 INFO L82 PathProgramCache]: Analyzing trace with hash -915242211, now seen corresponding path program 1 times [2019-12-07 10:55:50,757 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:50,757 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [942725977] [2019-12-07 10:55:50,757 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:50,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:50,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:50,806 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [942725977] [2019-12-07 10:55:50,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:50,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:55:50,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31880870] [2019-12-07 10:55:50,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:55:50,807 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:50,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:55:50,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:50,808 INFO L87 Difference]: Start difference. First operand 58697 states and 188868 transitions. Second operand 4 states. [2019-12-07 10:55:51,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:51,117 INFO L93 Difference]: Finished difference Result 108642 states and 348920 transitions. [2019-12-07 10:55:51,117 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:55:51,118 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 10:55:51,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:51,253 INFO L225 Difference]: With dead ends: 108642 [2019-12-07 10:55:51,253 INFO L226 Difference]: Without dead ends: 93794 [2019-12-07 10:55:51,253 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:51,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93794 states. [2019-12-07 10:55:52,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93794 to 91868. [2019-12-07 10:55:52,756 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91868 states. [2019-12-07 10:55:52,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91868 states to 91868 states and 294836 transitions. [2019-12-07 10:55:52,937 INFO L78 Accepts]: Start accepts. Automaton has 91868 states and 294836 transitions. Word has length 29 [2019-12-07 10:55:52,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:52,937 INFO L462 AbstractCegarLoop]: Abstraction has 91868 states and 294836 transitions. [2019-12-07 10:55:52,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:55:52,938 INFO L276 IsEmpty]: Start isEmpty. Operand 91868 states and 294836 transitions. [2019-12-07 10:55:52,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 10:55:52,976 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:52,976 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:52,977 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:52,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:52,977 INFO L82 PathProgramCache]: Analyzing trace with hash -119322298, now seen corresponding path program 1 times [2019-12-07 10:55:52,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:52,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392974156] [2019-12-07 10:55:52,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:52,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:53,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:53,020 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392974156] [2019-12-07 10:55:53,020 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:53,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:55:53,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1676564813] [2019-12-07 10:55:53,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:55:53,021 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:53,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:55:53,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:53,021 INFO L87 Difference]: Start difference. First operand 91868 states and 294836 transitions. Second operand 3 states. [2019-12-07 10:55:53,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:53,464 INFO L93 Difference]: Finished difference Result 146988 states and 476083 transitions. [2019-12-07 10:55:53,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:55:53,465 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 10:55:53,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:53,574 INFO L225 Difference]: With dead ends: 146988 [2019-12-07 10:55:53,574 INFO L226 Difference]: Without dead ends: 69085 [2019-12-07 10:55:53,575 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:55:53,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69085 states. [2019-12-07 10:55:54,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69085 to 67077. [2019-12-07 10:55:54,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67077 states. [2019-12-07 10:55:54,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67077 states to 67077 states and 214586 transitions. [2019-12-07 10:55:54,632 INFO L78 Accepts]: Start accepts. Automaton has 67077 states and 214586 transitions. Word has length 30 [2019-12-07 10:55:54,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:54,632 INFO L462 AbstractCegarLoop]: Abstraction has 67077 states and 214586 transitions. [2019-12-07 10:55:54,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:55:54,632 INFO L276 IsEmpty]: Start isEmpty. Operand 67077 states and 214586 transitions. [2019-12-07 10:55:54,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 10:55:54,819 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:54,819 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:54,819 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:54,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:54,820 INFO L82 PathProgramCache]: Analyzing trace with hash 2123509336, now seen corresponding path program 1 times [2019-12-07 10:55:54,820 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:54,820 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183390714] [2019-12-07 10:55:54,820 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:54,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:54,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:54,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183390714] [2019-12-07 10:55:54,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:54,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:55:54,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996448953] [2019-12-07 10:55:54,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:55:54,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:54,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:55:54,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:55:54,864 INFO L87 Difference]: Start difference. First operand 67077 states and 214586 transitions. Second operand 5 states. [2019-12-07 10:55:55,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:55,491 INFO L93 Difference]: Finished difference Result 95569 states and 301825 transitions. [2019-12-07 10:55:55,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:55:55,492 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 10:55:55,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:55,631 INFO L225 Difference]: With dead ends: 95569 [2019-12-07 10:55:55,631 INFO L226 Difference]: Without dead ends: 95520 [2019-12-07 10:55:55,632 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:55,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95520 states. [2019-12-07 10:55:56,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95520 to 78922. [2019-12-07 10:55:56,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78922 states. [2019-12-07 10:55:57,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78922 states to 78922 states and 252350 transitions. [2019-12-07 10:55:57,031 INFO L78 Accepts]: Start accepts. Automaton has 78922 states and 252350 transitions. Word has length 30 [2019-12-07 10:55:57,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:57,031 INFO L462 AbstractCegarLoop]: Abstraction has 78922 states and 252350 transitions. [2019-12-07 10:55:57,031 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:55:57,031 INFO L276 IsEmpty]: Start isEmpty. Operand 78922 states and 252350 transitions. [2019-12-07 10:55:57,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 10:55:57,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:57,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:57,072 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:57,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:57,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1544975794, now seen corresponding path program 1 times [2019-12-07 10:55:57,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:57,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081198187] [2019-12-07 10:55:57,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:57,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:57,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:57,110 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081198187] [2019-12-07 10:55:57,110 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:57,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:55:57,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1518147448] [2019-12-07 10:55:57,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:55:57,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:57,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:55:57,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:57,111 INFO L87 Difference]: Start difference. First operand 78922 states and 252350 transitions. Second operand 4 states. [2019-12-07 10:55:57,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:57,218 INFO L93 Difference]: Finished difference Result 35292 states and 106892 transitions. [2019-12-07 10:55:57,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:55:57,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 10:55:57,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:57,257 INFO L225 Difference]: With dead ends: 35292 [2019-12-07 10:55:57,257 INFO L226 Difference]: Without dead ends: 35264 [2019-12-07 10:55:57,258 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:55:57,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35264 states. [2019-12-07 10:55:57,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35264 to 32353. [2019-12-07 10:55:57,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32353 states. [2019-12-07 10:55:57,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32353 states to 32353 states and 99402 transitions. [2019-12-07 10:55:57,803 INFO L78 Accepts]: Start accepts. Automaton has 32353 states and 99402 transitions. Word has length 31 [2019-12-07 10:55:57,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:57,803 INFO L462 AbstractCegarLoop]: Abstraction has 32353 states and 99402 transitions. [2019-12-07 10:55:57,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:55:57,803 INFO L276 IsEmpty]: Start isEmpty. Operand 32353 states and 99402 transitions. [2019-12-07 10:55:57,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 10:55:57,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:57,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:57,828 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:57,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:57,828 INFO L82 PathProgramCache]: Analyzing trace with hash 1850577991, now seen corresponding path program 1 times [2019-12-07 10:55:57,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:57,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600844010] [2019-12-07 10:55:57,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:57,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:57,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:57,881 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600844010] [2019-12-07 10:55:57,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:57,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:55:57,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [571774429] [2019-12-07 10:55:57,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:55:57,882 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:57,882 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:55:57,882 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:55:57,882 INFO L87 Difference]: Start difference. First operand 32353 states and 99402 transitions. Second operand 7 states. [2019-12-07 10:55:58,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:58,425 INFO L93 Difference]: Finished difference Result 40756 states and 121938 transitions. [2019-12-07 10:55:58,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 10:55:58,425 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 10:55:58,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:58,471 INFO L225 Difference]: With dead ends: 40756 [2019-12-07 10:55:58,471 INFO L226 Difference]: Without dead ends: 40756 [2019-12-07 10:55:58,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:55:58,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40756 states. [2019-12-07 10:55:58,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40756 to 33553. [2019-12-07 10:55:58,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33553 states. [2019-12-07 10:55:58,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33553 states to 33553 states and 102873 transitions. [2019-12-07 10:55:58,986 INFO L78 Accepts]: Start accepts. Automaton has 33553 states and 102873 transitions. Word has length 33 [2019-12-07 10:55:58,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:55:58,986 INFO L462 AbstractCegarLoop]: Abstraction has 33553 states and 102873 transitions. [2019-12-07 10:55:58,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:55:58,987 INFO L276 IsEmpty]: Start isEmpty. Operand 33553 states and 102873 transitions. [2019-12-07 10:55:59,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 10:55:59,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:55:59,015 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:55:59,016 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:55:59,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:55:59,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1137221687, now seen corresponding path program 2 times [2019-12-07 10:55:59,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:55:59,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181878902] [2019-12-07 10:55:59,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:55:59,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:55:59,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:55:59,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181878902] [2019-12-07 10:55:59,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:55:59,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:55:59,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096994432] [2019-12-07 10:55:59,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:55:59,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:55:59,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:55:59,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:55:59,082 INFO L87 Difference]: Start difference. First operand 33553 states and 102873 transitions. Second operand 6 states. [2019-12-07 10:55:59,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:55:59,510 INFO L93 Difference]: Finished difference Result 38462 states and 115668 transitions. [2019-12-07 10:55:59,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:55:59,510 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 10:55:59,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:55:59,554 INFO L225 Difference]: With dead ends: 38462 [2019-12-07 10:55:59,554 INFO L226 Difference]: Without dead ends: 38462 [2019-12-07 10:55:59,554 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:55:59,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38462 states. [2019-12-07 10:56:00,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38462 to 33995. [2019-12-07 10:56:00,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33995 states. [2019-12-07 10:56:00,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33995 states to 33995 states and 104058 transitions. [2019-12-07 10:56:00,057 INFO L78 Accepts]: Start accepts. Automaton has 33995 states and 104058 transitions. Word has length 33 [2019-12-07 10:56:00,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:00,057 INFO L462 AbstractCegarLoop]: Abstraction has 33995 states and 104058 transitions. [2019-12-07 10:56:00,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:56:00,057 INFO L276 IsEmpty]: Start isEmpty. Operand 33995 states and 104058 transitions. [2019-12-07 10:56:00,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 10:56:00,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:00,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:00,085 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:00,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:00,085 INFO L82 PathProgramCache]: Analyzing trace with hash 1933444630, now seen corresponding path program 1 times [2019-12-07 10:56:00,086 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:00,086 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275565739] [2019-12-07 10:56:00,086 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:00,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:00,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:00,140 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275565739] [2019-12-07 10:56:00,140 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:00,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:56:00,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786992287] [2019-12-07 10:56:00,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:56:00,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:00,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:56:00,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:56:00,142 INFO L87 Difference]: Start difference. First operand 33995 states and 104058 transitions. Second operand 6 states. [2019-12-07 10:56:00,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:00,590 INFO L93 Difference]: Finished difference Result 40177 states and 120525 transitions. [2019-12-07 10:56:00,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:56:00,591 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 10:56:00,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:00,636 INFO L225 Difference]: With dead ends: 40177 [2019-12-07 10:56:00,637 INFO L226 Difference]: Without dead ends: 40177 [2019-12-07 10:56:00,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:56:00,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40177 states. [2019-12-07 10:56:01,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40177 to 32676. [2019-12-07 10:56:01,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32676 states. [2019-12-07 10:56:01,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32676 states to 32676 states and 100446 transitions. [2019-12-07 10:56:01,170 INFO L78 Accepts]: Start accepts. Automaton has 32676 states and 100446 transitions. Word has length 34 [2019-12-07 10:56:01,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:01,171 INFO L462 AbstractCegarLoop]: Abstraction has 32676 states and 100446 transitions. [2019-12-07 10:56:01,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:56:01,171 INFO L276 IsEmpty]: Start isEmpty. Operand 32676 states and 100446 transitions. [2019-12-07 10:56:01,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 10:56:01,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:01,201 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:01,201 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:01,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:01,202 INFO L82 PathProgramCache]: Analyzing trace with hash 838743556, now seen corresponding path program 1 times [2019-12-07 10:56:01,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:01,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889005069] [2019-12-07 10:56:01,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:01,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:01,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:01,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889005069] [2019-12-07 10:56:01,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:01,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:56:01,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445342497] [2019-12-07 10:56:01,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:56:01,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:01,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:56:01,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:56:01,260 INFO L87 Difference]: Start difference. First operand 32676 states and 100446 transitions. Second operand 6 states. [2019-12-07 10:56:01,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:01,852 INFO L93 Difference]: Finished difference Result 42572 states and 128082 transitions. [2019-12-07 10:56:01,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 10:56:01,853 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 10:56:01,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:01,900 INFO L225 Difference]: With dead ends: 42572 [2019-12-07 10:56:01,900 INFO L226 Difference]: Without dead ends: 42572 [2019-12-07 10:56:01,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:56:02,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42572 states. [2019-12-07 10:56:02,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42572 to 32570. [2019-12-07 10:56:02,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32570 states. [2019-12-07 10:56:02,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32570 states to 32570 states and 100169 transitions. [2019-12-07 10:56:02,443 INFO L78 Accepts]: Start accepts. Automaton has 32570 states and 100169 transitions. Word has length 40 [2019-12-07 10:56:02,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:02,443 INFO L462 AbstractCegarLoop]: Abstraction has 32570 states and 100169 transitions. [2019-12-07 10:56:02,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:56:02,443 INFO L276 IsEmpty]: Start isEmpty. Operand 32570 states and 100169 transitions. [2019-12-07 10:56:02,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 10:56:02,474 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:02,474 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:02,474 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:02,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:02,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1307677022, now seen corresponding path program 2 times [2019-12-07 10:56:02,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:02,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141738648] [2019-12-07 10:56:02,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:02,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:02,507 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:02,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141738648] [2019-12-07 10:56:02,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:02,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:56:02,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375297606] [2019-12-07 10:56:02,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:56:02,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:02,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:56:02,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:56:02,509 INFO L87 Difference]: Start difference. First operand 32570 states and 100169 transitions. Second operand 5 states. [2019-12-07 10:56:02,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:02,606 INFO L93 Difference]: Finished difference Result 30957 states and 96351 transitions. [2019-12-07 10:56:02,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:56:02,606 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 10:56:02,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:02,641 INFO L225 Difference]: With dead ends: 30957 [2019-12-07 10:56:02,641 INFO L226 Difference]: Without dead ends: 28748 [2019-12-07 10:56:02,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:56:02,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28748 states. [2019-12-07 10:56:02,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28748 to 18522. [2019-12-07 10:56:02,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18522 states. [2019-12-07 10:56:02,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18522 states to 18522 states and 58200 transitions. [2019-12-07 10:56:02,980 INFO L78 Accepts]: Start accepts. Automaton has 18522 states and 58200 transitions. Word has length 40 [2019-12-07 10:56:02,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:02,980 INFO L462 AbstractCegarLoop]: Abstraction has 18522 states and 58200 transitions. [2019-12-07 10:56:02,980 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:56:02,980 INFO L276 IsEmpty]: Start isEmpty. Operand 18522 states and 58200 transitions. [2019-12-07 10:56:02,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:56:02,997 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:02,997 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:02,997 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:02,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:02,997 INFO L82 PathProgramCache]: Analyzing trace with hash 794479570, now seen corresponding path program 1 times [2019-12-07 10:56:02,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:02,997 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084374434] [2019-12-07 10:56:02,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:03,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:03,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:03,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084374434] [2019-12-07 10:56:03,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:03,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:56:03,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [555234709] [2019-12-07 10:56:03,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:56:03,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:03,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:56:03,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:03,025 INFO L87 Difference]: Start difference. First operand 18522 states and 58200 transitions. Second operand 3 states. [2019-12-07 10:56:03,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:03,101 INFO L93 Difference]: Finished difference Result 24803 states and 75026 transitions. [2019-12-07 10:56:03,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:56:03,102 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 10:56:03,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:03,133 INFO L225 Difference]: With dead ends: 24803 [2019-12-07 10:56:03,134 INFO L226 Difference]: Without dead ends: 24803 [2019-12-07 10:56:03,134 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:03,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24803 states. [2019-12-07 10:56:03,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24803 to 18676. [2019-12-07 10:56:03,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18676 states. [2019-12-07 10:56:03,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18676 states to 18676 states and 56792 transitions. [2019-12-07 10:56:03,438 INFO L78 Accepts]: Start accepts. Automaton has 18676 states and 56792 transitions. Word has length 64 [2019-12-07 10:56:03,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:03,438 INFO L462 AbstractCegarLoop]: Abstraction has 18676 states and 56792 transitions. [2019-12-07 10:56:03,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:56:03,438 INFO L276 IsEmpty]: Start isEmpty. Operand 18676 states and 56792 transitions. [2019-12-07 10:56:03,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 10:56:03,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:03,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:03,455 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:03,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:03,456 INFO L82 PathProgramCache]: Analyzing trace with hash 1792331498, now seen corresponding path program 1 times [2019-12-07 10:56:03,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:03,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123608111] [2019-12-07 10:56:03,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:03,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:03,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:03,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123608111] [2019-12-07 10:56:03,490 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:03,490 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:56:03,490 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739461584] [2019-12-07 10:56:03,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:56:03,491 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:03,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:56:03,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:03,491 INFO L87 Difference]: Start difference. First operand 18676 states and 56792 transitions. Second operand 3 states. [2019-12-07 10:56:03,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:03,598 INFO L93 Difference]: Finished difference Result 23727 states and 71985 transitions. [2019-12-07 10:56:03,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:56:03,599 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 10:56:03,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:03,624 INFO L225 Difference]: With dead ends: 23727 [2019-12-07 10:56:03,625 INFO L226 Difference]: Without dead ends: 23727 [2019-12-07 10:56:03,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:03,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23727 states. [2019-12-07 10:56:03,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23727 to 19178. [2019-12-07 10:56:03,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19178 states. [2019-12-07 10:56:03,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19178 states to 19178 states and 58632 transitions. [2019-12-07 10:56:03,914 INFO L78 Accepts]: Start accepts. Automaton has 19178 states and 58632 transitions. Word has length 64 [2019-12-07 10:56:03,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:03,914 INFO L462 AbstractCegarLoop]: Abstraction has 19178 states and 58632 transitions. [2019-12-07 10:56:03,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:56:03,914 INFO L276 IsEmpty]: Start isEmpty. Operand 19178 states and 58632 transitions. [2019-12-07 10:56:03,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:03,930 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:03,930 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:03,930 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:03,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:03,930 INFO L82 PathProgramCache]: Analyzing trace with hash 1392044233, now seen corresponding path program 1 times [2019-12-07 10:56:03,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:03,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103672791] [2019-12-07 10:56:03,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:03,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:03,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:03,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103672791] [2019-12-07 10:56:03,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:03,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:56:03,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [865069147] [2019-12-07 10:56:03,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:56:03,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:03,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:56:03,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:56:03,987 INFO L87 Difference]: Start difference. First operand 19178 states and 58632 transitions. Second operand 4 states. [2019-12-07 10:56:04,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:04,069 INFO L93 Difference]: Finished difference Result 19178 states and 58416 transitions. [2019-12-07 10:56:04,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:56:04,070 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 65 [2019-12-07 10:56:04,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:04,089 INFO L225 Difference]: With dead ends: 19178 [2019-12-07 10:56:04,089 INFO L226 Difference]: Without dead ends: 19178 [2019-12-07 10:56:04,090 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:56:04,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19178 states. [2019-12-07 10:56:04,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19178 to 17719. [2019-12-07 10:56:04,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17719 states. [2019-12-07 10:56:04,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17719 states to 17719 states and 53804 transitions. [2019-12-07 10:56:04,342 INFO L78 Accepts]: Start accepts. Automaton has 17719 states and 53804 transitions. Word has length 65 [2019-12-07 10:56:04,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:04,342 INFO L462 AbstractCegarLoop]: Abstraction has 17719 states and 53804 transitions. [2019-12-07 10:56:04,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:56:04,342 INFO L276 IsEmpty]: Start isEmpty. Operand 17719 states and 53804 transitions. [2019-12-07 10:56:04,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:04,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:04,357 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:04,357 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:04,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:04,357 INFO L82 PathProgramCache]: Analyzing trace with hash 1473151594, now seen corresponding path program 1 times [2019-12-07 10:56:04,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:04,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682793137] [2019-12-07 10:56:04,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:04,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:04,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:04,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682793137] [2019-12-07 10:56:04,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:04,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:56:04,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879790991] [2019-12-07 10:56:04,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:56:04,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:04,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:56:04,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:56:04,408 INFO L87 Difference]: Start difference. First operand 17719 states and 53804 transitions. Second operand 6 states. [2019-12-07 10:56:04,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:04,797 INFO L93 Difference]: Finished difference Result 22670 states and 67640 transitions. [2019-12-07 10:56:04,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 10:56:04,798 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 10:56:04,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:04,819 INFO L225 Difference]: With dead ends: 22670 [2019-12-07 10:56:04,819 INFO L226 Difference]: Without dead ends: 22670 [2019-12-07 10:56:04,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:56:04,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22670 states. [2019-12-07 10:56:05,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22670 to 17751. [2019-12-07 10:56:05,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17751 states. [2019-12-07 10:56:05,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17751 states to 17751 states and 53878 transitions. [2019-12-07 10:56:05,091 INFO L78 Accepts]: Start accepts. Automaton has 17751 states and 53878 transitions. Word has length 65 [2019-12-07 10:56:05,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:05,091 INFO L462 AbstractCegarLoop]: Abstraction has 17751 states and 53878 transitions. [2019-12-07 10:56:05,091 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:56:05,091 INFO L276 IsEmpty]: Start isEmpty. Operand 17751 states and 53878 transitions. [2019-12-07 10:56:05,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:05,105 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:05,106 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:05,106 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:05,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:05,106 INFO L82 PathProgramCache]: Analyzing trace with hash -450817828, now seen corresponding path program 2 times [2019-12-07 10:56:05,106 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:05,106 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602595776] [2019-12-07 10:56:05,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:05,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:05,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:05,184 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602595776] [2019-12-07 10:56:05,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:05,185 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:56:05,185 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1958700875] [2019-12-07 10:56:05,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 10:56:05,185 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:05,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 10:56:05,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:56:05,186 INFO L87 Difference]: Start difference. First operand 17751 states and 53878 transitions. Second operand 8 states. [2019-12-07 10:56:05,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:05,917 INFO L93 Difference]: Finished difference Result 24923 states and 74099 transitions. [2019-12-07 10:56:05,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 10:56:05,917 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-07 10:56:05,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:05,944 INFO L225 Difference]: With dead ends: 24923 [2019-12-07 10:56:05,944 INFO L226 Difference]: Without dead ends: 24923 [2019-12-07 10:56:05,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=304, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:56:06,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24923 states. [2019-12-07 10:56:06,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24923 to 19526. [2019-12-07 10:56:06,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19526 states. [2019-12-07 10:56:06,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19526 states to 19526 states and 58988 transitions. [2019-12-07 10:56:06,251 INFO L78 Accepts]: Start accepts. Automaton has 19526 states and 58988 transitions. Word has length 65 [2019-12-07 10:56:06,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:06,251 INFO L462 AbstractCegarLoop]: Abstraction has 19526 states and 58988 transitions. [2019-12-07 10:56:06,251 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 10:56:06,252 INFO L276 IsEmpty]: Start isEmpty. Operand 19526 states and 58988 transitions. [2019-12-07 10:56:06,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:06,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:06,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:06,267 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:06,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:06,268 INFO L82 PathProgramCache]: Analyzing trace with hash 1506263260, now seen corresponding path program 3 times [2019-12-07 10:56:06,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:06,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603442408] [2019-12-07 10:56:06,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:06,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:06,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:06,397 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1603442408] [2019-12-07 10:56:06,397 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:06,397 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:56:06,397 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1509861547] [2019-12-07 10:56:06,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:56:06,397 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:06,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:56:06,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:56:06,397 INFO L87 Difference]: Start difference. First operand 19526 states and 58988 transitions. Second operand 11 states. [2019-12-07 10:56:09,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:09,696 INFO L93 Difference]: Finished difference Result 109418 states and 321609 transitions. [2019-12-07 10:56:09,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 10:56:09,696 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-07 10:56:09,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:09,784 INFO L225 Difference]: With dead ends: 109418 [2019-12-07 10:56:09,784 INFO L226 Difference]: Without dead ends: 77926 [2019-12-07 10:56:09,785 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=398, Invalid=1494, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 10:56:09,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77926 states. [2019-12-07 10:56:10,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77926 to 26978. [2019-12-07 10:56:10,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26978 states. [2019-12-07 10:56:10,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26978 states to 26978 states and 81646 transitions. [2019-12-07 10:56:10,559 INFO L78 Accepts]: Start accepts. Automaton has 26978 states and 81646 transitions. Word has length 65 [2019-12-07 10:56:10,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:10,560 INFO L462 AbstractCegarLoop]: Abstraction has 26978 states and 81646 transitions. [2019-12-07 10:56:10,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:56:10,560 INFO L276 IsEmpty]: Start isEmpty. Operand 26978 states and 81646 transitions. [2019-12-07 10:56:10,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:10,587 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:10,587 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:10,587 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:10,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:10,587 INFO L82 PathProgramCache]: Analyzing trace with hash -950991720, now seen corresponding path program 4 times [2019-12-07 10:56:10,588 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:10,588 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144027196] [2019-12-07 10:56:10,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:10,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:10,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:10,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144027196] [2019-12-07 10:56:10,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:10,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:56:10,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105639885] [2019-12-07 10:56:10,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:56:10,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:10,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:56:10,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:56:10,720 INFO L87 Difference]: Start difference. First operand 26978 states and 81646 transitions. Second operand 10 states. [2019-12-07 10:56:12,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:12,012 INFO L93 Difference]: Finished difference Result 95697 states and 279970 transitions. [2019-12-07 10:56:12,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 10:56:12,012 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2019-12-07 10:56:12,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:12,092 INFO L225 Difference]: With dead ends: 95697 [2019-12-07 10:56:12,092 INFO L226 Difference]: Without dead ends: 65408 [2019-12-07 10:56:12,093 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=225, Invalid=831, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 10:56:12,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65408 states. [2019-12-07 10:56:12,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65408 to 29341. [2019-12-07 10:56:12,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29341 states. [2019-12-07 10:56:12,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29341 states to 29341 states and 88166 transitions. [2019-12-07 10:56:12,764 INFO L78 Accepts]: Start accepts. Automaton has 29341 states and 88166 transitions. Word has length 65 [2019-12-07 10:56:12,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:12,765 INFO L462 AbstractCegarLoop]: Abstraction has 29341 states and 88166 transitions. [2019-12-07 10:56:12,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:56:12,765 INFO L276 IsEmpty]: Start isEmpty. Operand 29341 states and 88166 transitions. [2019-12-07 10:56:12,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:56:12,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:12,794 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:12,794 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:12,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:12,794 INFO L82 PathProgramCache]: Analyzing trace with hash 901591556, now seen corresponding path program 5 times [2019-12-07 10:56:12,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:12,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623067723] [2019-12-07 10:56:12,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:12,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:12,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:12,832 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623067723] [2019-12-07 10:56:12,832 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:12,832 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:56:12,832 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98852781] [2019-12-07 10:56:12,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:56:12,832 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:12,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:56:12,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:12,833 INFO L87 Difference]: Start difference. First operand 29341 states and 88166 transitions. Second operand 3 states. [2019-12-07 10:56:12,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:12,895 INFO L93 Difference]: Finished difference Result 22568 states and 67123 transitions. [2019-12-07 10:56:12,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:56:12,896 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:56:12,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:12,919 INFO L225 Difference]: With dead ends: 22568 [2019-12-07 10:56:12,919 INFO L226 Difference]: Without dead ends: 22568 [2019-12-07 10:56:12,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:12,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22568 states. [2019-12-07 10:56:13,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22568 to 21636. [2019-12-07 10:56:13,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21636 states. [2019-12-07 10:56:13,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21636 states to 21636 states and 64366 transitions. [2019-12-07 10:56:13,260 INFO L78 Accepts]: Start accepts. Automaton has 21636 states and 64366 transitions. Word has length 65 [2019-12-07 10:56:13,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:13,260 INFO L462 AbstractCegarLoop]: Abstraction has 21636 states and 64366 transitions. [2019-12-07 10:56:13,260 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:56:13,260 INFO L276 IsEmpty]: Start isEmpty. Operand 21636 states and 64366 transitions. [2019-12-07 10:56:13,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:13,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:13,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:13,279 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:13,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:13,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1952670654, now seen corresponding path program 1 times [2019-12-07 10:56:13,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:13,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443456143] [2019-12-07 10:56:13,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:13,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:13,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:13,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443456143] [2019-12-07 10:56:13,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:13,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:56:13,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002834939] [2019-12-07 10:56:13,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:56:13,324 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:13,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:56:13,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:56:13,324 INFO L87 Difference]: Start difference. First operand 21636 states and 64366 transitions. Second operand 4 states. [2019-12-07 10:56:13,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:13,408 INFO L93 Difference]: Finished difference Result 35678 states and 106090 transitions. [2019-12-07 10:56:13,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:56:13,408 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 10:56:13,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:13,422 INFO L225 Difference]: With dead ends: 35678 [2019-12-07 10:56:13,423 INFO L226 Difference]: Without dead ends: 14031 [2019-12-07 10:56:13,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:56:13,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14031 states. [2019-12-07 10:56:13,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14031 to 14031. [2019-12-07 10:56:13,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14031 states. [2019-12-07 10:56:13,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14031 states to 14031 states and 41476 transitions. [2019-12-07 10:56:13,612 INFO L78 Accepts]: Start accepts. Automaton has 14031 states and 41476 transitions. Word has length 66 [2019-12-07 10:56:13,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:13,612 INFO L462 AbstractCegarLoop]: Abstraction has 14031 states and 41476 transitions. [2019-12-07 10:56:13,612 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:56:13,612 INFO L276 IsEmpty]: Start isEmpty. Operand 14031 states and 41476 transitions. [2019-12-07 10:56:13,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:13,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:13,623 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:13,624 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:13,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:13,624 INFO L82 PathProgramCache]: Analyzing trace with hash -1153005578, now seen corresponding path program 2 times [2019-12-07 10:56:13,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:13,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541640330] [2019-12-07 10:56:13,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:13,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:13,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:13,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541640330] [2019-12-07 10:56:13,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:13,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:56:13,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996311519] [2019-12-07 10:56:13,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:56:13,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:13,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:56:13,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:56:13,745 INFO L87 Difference]: Start difference. First operand 14031 states and 41476 transitions. Second operand 11 states. [2019-12-07 10:56:14,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:14,313 INFO L93 Difference]: Finished difference Result 29779 states and 86415 transitions. [2019-12-07 10:56:14,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 10:56:14,313 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:56:14,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:14,331 INFO L225 Difference]: With dead ends: 29779 [2019-12-07 10:56:14,331 INFO L226 Difference]: Without dead ends: 18849 [2019-12-07 10:56:14,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 240 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=856, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 10:56:14,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18849 states. [2019-12-07 10:56:14,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18849 to 14819. [2019-12-07 10:56:14,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14819 states. [2019-12-07 10:56:14,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14819 states to 14819 states and 43191 transitions. [2019-12-07 10:56:14,558 INFO L78 Accepts]: Start accepts. Automaton has 14819 states and 43191 transitions. Word has length 66 [2019-12-07 10:56:14,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:14,558 INFO L462 AbstractCegarLoop]: Abstraction has 14819 states and 43191 transitions. [2019-12-07 10:56:14,558 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:56:14,558 INFO L276 IsEmpty]: Start isEmpty. Operand 14819 states and 43191 transitions. [2019-12-07 10:56:14,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:14,570 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:14,570 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:14,571 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:14,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:14,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1335912686, now seen corresponding path program 3 times [2019-12-07 10:56:14,571 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:14,571 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191387072] [2019-12-07 10:56:14,571 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:14,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:14,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:14,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191387072] [2019-12-07 10:56:14,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:14,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:56:14,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277428379] [2019-12-07 10:56:14,628 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:56:14,628 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:14,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:56:14,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:56:14,628 INFO L87 Difference]: Start difference. First operand 14819 states and 43191 transitions. Second operand 7 states. [2019-12-07 10:56:14,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:14,829 INFO L93 Difference]: Finished difference Result 18638 states and 53015 transitions. [2019-12-07 10:56:14,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 10:56:14,829 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 10:56:14,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:14,846 INFO L225 Difference]: With dead ends: 18638 [2019-12-07 10:56:14,846 INFO L226 Difference]: Without dead ends: 17251 [2019-12-07 10:56:14,847 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:56:14,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17251 states. [2019-12-07 10:56:15,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17251 to 15012. [2019-12-07 10:56:15,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15012 states. [2019-12-07 10:56:15,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15012 states to 15012 states and 43682 transitions. [2019-12-07 10:56:15,067 INFO L78 Accepts]: Start accepts. Automaton has 15012 states and 43682 transitions. Word has length 66 [2019-12-07 10:56:15,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:15,067 INFO L462 AbstractCegarLoop]: Abstraction has 15012 states and 43682 transitions. [2019-12-07 10:56:15,067 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:56:15,067 INFO L276 IsEmpty]: Start isEmpty. Operand 15012 states and 43682 transitions. [2019-12-07 10:56:15,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:15,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:15,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:15,080 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:15,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:15,080 INFO L82 PathProgramCache]: Analyzing trace with hash -406689830, now seen corresponding path program 4 times [2019-12-07 10:56:15,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:15,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128208597] [2019-12-07 10:56:15,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:15,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:15,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:15,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128208597] [2019-12-07 10:56:15,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:15,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:56:15,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1985068912] [2019-12-07 10:56:15,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:56:15,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:15,183 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:56:15,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:56:15,183 INFO L87 Difference]: Start difference. First operand 15012 states and 43682 transitions. Second operand 10 states. [2019-12-07 10:56:15,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:15,878 INFO L93 Difference]: Finished difference Result 17188 states and 49629 transitions. [2019-12-07 10:56:15,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 10:56:15,878 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 10:56:15,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:15,894 INFO L225 Difference]: With dead ends: 17188 [2019-12-07 10:56:15,894 INFO L226 Difference]: Without dead ends: 17188 [2019-12-07 10:56:15,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:56:15,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17188 states. [2019-12-07 10:56:16,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17188 to 13854. [2019-12-07 10:56:16,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13854 states. [2019-12-07 10:56:16,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13854 states to 13854 states and 40497 transitions. [2019-12-07 10:56:16,101 INFO L78 Accepts]: Start accepts. Automaton has 13854 states and 40497 transitions. Word has length 66 [2019-12-07 10:56:16,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:16,101 INFO L462 AbstractCegarLoop]: Abstraction has 13854 states and 40497 transitions. [2019-12-07 10:56:16,101 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:56:16,102 INFO L276 IsEmpty]: Start isEmpty. Operand 13854 states and 40497 transitions. [2019-12-07 10:56:16,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:16,112 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:16,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:16,112 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:16,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:16,113 INFO L82 PathProgramCache]: Analyzing trace with hash 262552426, now seen corresponding path program 5 times [2019-12-07 10:56:16,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:16,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332750545] [2019-12-07 10:56:16,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:16,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:16,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:16,494 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332750545] [2019-12-07 10:56:16,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:16,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:56:16,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289269648] [2019-12-07 10:56:16,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:56:16,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:16,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:56:16,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:56:16,495 INFO L87 Difference]: Start difference. First operand 13854 states and 40497 transitions. Second operand 16 states. [2019-12-07 10:56:17,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:17,901 INFO L93 Difference]: Finished difference Result 14152 states and 41139 transitions. [2019-12-07 10:56:17,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 10:56:17,901 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 10:56:17,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:17,915 INFO L225 Difference]: With dead ends: 14152 [2019-12-07 10:56:17,915 INFO L226 Difference]: Without dead ends: 14000 [2019-12-07 10:56:17,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=142, Invalid=788, Unknown=0, NotChecked=0, Total=930 [2019-12-07 10:56:17,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14000 states. [2019-12-07 10:56:18,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14000 to 13905. [2019-12-07 10:56:18,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13905 states. [2019-12-07 10:56:18,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13905 states to 13905 states and 40618 transitions. [2019-12-07 10:56:18,136 INFO L78 Accepts]: Start accepts. Automaton has 13905 states and 40618 transitions. Word has length 66 [2019-12-07 10:56:18,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:18,136 INFO L462 AbstractCegarLoop]: Abstraction has 13905 states and 40618 transitions. [2019-12-07 10:56:18,136 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:56:18,136 INFO L276 IsEmpty]: Start isEmpty. Operand 13905 states and 40618 transitions. [2019-12-07 10:56:18,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:18,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:18,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:18,147 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:18,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:18,147 INFO L82 PathProgramCache]: Analyzing trace with hash 226046, now seen corresponding path program 6 times [2019-12-07 10:56:18,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:18,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129043818] [2019-12-07 10:56:18,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:18,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:18,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:18,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129043818] [2019-12-07 10:56:18,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:18,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 10:56:18,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1480591758] [2019-12-07 10:56:18,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 10:56:18,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:18,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 10:56:18,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=204, Unknown=0, NotChecked=0, Total=240 [2019-12-07 10:56:18,514 INFO L87 Difference]: Start difference. First operand 13905 states and 40618 transitions. Second operand 16 states. [2019-12-07 10:56:20,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:20,255 INFO L93 Difference]: Finished difference Result 14215 states and 41295 transitions. [2019-12-07 10:56:20,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 10:56:20,255 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 66 [2019-12-07 10:56:20,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:20,269 INFO L225 Difference]: With dead ends: 14215 [2019-12-07 10:56:20,269 INFO L226 Difference]: Without dead ends: 14084 [2019-12-07 10:56:20,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=160, Invalid=832, Unknown=0, NotChecked=0, Total=992 [2019-12-07 10:56:20,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14084 states. [2019-12-07 10:56:20,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14084 to 13947. [2019-12-07 10:56:20,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13947 states. [2019-12-07 10:56:20,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13947 states to 13947 states and 40703 transitions. [2019-12-07 10:56:20,459 INFO L78 Accepts]: Start accepts. Automaton has 13947 states and 40703 transitions. Word has length 66 [2019-12-07 10:56:20,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:20,459 INFO L462 AbstractCegarLoop]: Abstraction has 13947 states and 40703 transitions. [2019-12-07 10:56:20,459 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 10:56:20,459 INFO L276 IsEmpty]: Start isEmpty. Operand 13947 states and 40703 transitions. [2019-12-07 10:56:20,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:20,471 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:20,471 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:20,471 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:20,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:20,472 INFO L82 PathProgramCache]: Analyzing trace with hash 1509721000, now seen corresponding path program 7 times [2019-12-07 10:56:20,472 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:20,472 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103422038] [2019-12-07 10:56:20,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:20,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:20,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:20,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [103422038] [2019-12-07 10:56:20,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:20,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:56:20,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1027487794] [2019-12-07 10:56:20,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:56:20,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:20,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:56:20,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:56:20,584 INFO L87 Difference]: Start difference. First operand 13947 states and 40703 transitions. Second operand 11 states. [2019-12-07 10:56:21,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:21,059 INFO L93 Difference]: Finished difference Result 15548 states and 44529 transitions. [2019-12-07 10:56:21,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 10:56:21,059 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:56:21,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:21,074 INFO L225 Difference]: With dead ends: 15548 [2019-12-07 10:56:21,074 INFO L226 Difference]: Without dead ends: 14542 [2019-12-07 10:56:21,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2019-12-07 10:56:21,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14542 states. [2019-12-07 10:56:21,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14542 to 13454. [2019-12-07 10:56:21,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13454 states. [2019-12-07 10:56:21,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13454 states to 13454 states and 39346 transitions. [2019-12-07 10:56:21,263 INFO L78 Accepts]: Start accepts. Automaton has 13454 states and 39346 transitions. Word has length 66 [2019-12-07 10:56:21,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:21,263 INFO L462 AbstractCegarLoop]: Abstraction has 13454 states and 39346 transitions. [2019-12-07 10:56:21,263 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:56:21,263 INFO L276 IsEmpty]: Start isEmpty. Operand 13454 states and 39346 transitions. [2019-12-07 10:56:21,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:21,274 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:21,274 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:21,274 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:21,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:21,275 INFO L82 PathProgramCache]: Analyzing trace with hash -624850506, now seen corresponding path program 8 times [2019-12-07 10:56:21,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:21,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677348878] [2019-12-07 10:56:21,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:21,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:21,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:21,394 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677348878] [2019-12-07 10:56:21,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:21,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:56:21,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293224418] [2019-12-07 10:56:21,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:56:21,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:21,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:56:21,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:56:21,395 INFO L87 Difference]: Start difference. First operand 13454 states and 39346 transitions. Second operand 11 states. [2019-12-07 10:56:22,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:22,484 INFO L93 Difference]: Finished difference Result 22189 states and 63155 transitions. [2019-12-07 10:56:22,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:56:22,484 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:56:22,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:22,505 INFO L225 Difference]: With dead ends: 22189 [2019-12-07 10:56:22,505 INFO L226 Difference]: Without dead ends: 22189 [2019-12-07 10:56:22,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=110, Invalid=490, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:56:22,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22189 states. [2019-12-07 10:56:22,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22189 to 12594. [2019-12-07 10:56:22,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12594 states. [2019-12-07 10:56:22,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12594 states to 12594 states and 36491 transitions. [2019-12-07 10:56:22,735 INFO L78 Accepts]: Start accepts. Automaton has 12594 states and 36491 transitions. Word has length 66 [2019-12-07 10:56:22,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:22,735 INFO L462 AbstractCegarLoop]: Abstraction has 12594 states and 36491 transitions. [2019-12-07 10:56:22,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:56:22,736 INFO L276 IsEmpty]: Start isEmpty. Operand 12594 states and 36491 transitions. [2019-12-07 10:56:22,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:56:22,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:22,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:22,747 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:22,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:22,747 INFO L82 PathProgramCache]: Analyzing trace with hash -399654704, now seen corresponding path program 9 times [2019-12-07 10:56:22,747 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:22,747 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616350629] [2019-12-07 10:56:22,747 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:22,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:22,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:22,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616350629] [2019-12-07 10:56:22,779 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:22,779 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:56:22,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [119158026] [2019-12-07 10:56:22,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:56:22,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:22,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:56:22,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:22,779 INFO L87 Difference]: Start difference. First operand 12594 states and 36491 transitions. Second operand 3 states. [2019-12-07 10:56:22,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:22,810 INFO L93 Difference]: Finished difference Result 12594 states and 36490 transitions. [2019-12-07 10:56:22,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:56:22,811 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 10:56:22,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:22,824 INFO L225 Difference]: With dead ends: 12594 [2019-12-07 10:56:22,824 INFO L226 Difference]: Without dead ends: 12594 [2019-12-07 10:56:22,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:56:22,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12594 states. [2019-12-07 10:56:22,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12594 to 9673. [2019-12-07 10:56:22,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9673 states. [2019-12-07 10:56:22,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9673 states to 9673 states and 28297 transitions. [2019-12-07 10:56:22,977 INFO L78 Accepts]: Start accepts. Automaton has 9673 states and 28297 transitions. Word has length 66 [2019-12-07 10:56:22,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:22,977 INFO L462 AbstractCegarLoop]: Abstraction has 9673 states and 28297 transitions. [2019-12-07 10:56:22,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:56:22,977 INFO L276 IsEmpty]: Start isEmpty. Operand 9673 states and 28297 transitions. [2019-12-07 10:56:22,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:56:22,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:22,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:22,985 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:22,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:22,985 INFO L82 PathProgramCache]: Analyzing trace with hash 1689948735, now seen corresponding path program 1 times [2019-12-07 10:56:22,985 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:22,985 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800139204] [2019-12-07 10:56:22,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:22,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:56:23,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:56:23,102 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800139204] [2019-12-07 10:56:23,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:56:23,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:56:23,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488640648] [2019-12-07 10:56:23,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:56:23,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:56:23,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:56:23,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:56:23,102 INFO L87 Difference]: Start difference. First operand 9673 states and 28297 transitions. Second operand 11 states. [2019-12-07 10:56:23,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:56:23,833 INFO L93 Difference]: Finished difference Result 12345 states and 35435 transitions. [2019-12-07 10:56:23,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:56:23,834 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:56:23,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:56:23,845 INFO L225 Difference]: With dead ends: 12345 [2019-12-07 10:56:23,845 INFO L226 Difference]: Without dead ends: 11912 [2019-12-07 10:56:23,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=95, Invalid=367, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:56:23,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11912 states. [2019-12-07 10:56:23,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11912 to 9411. [2019-12-07 10:56:23,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9411 states. [2019-12-07 10:56:23,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9411 states to 9411 states and 27627 transitions. [2019-12-07 10:56:23,988 INFO L78 Accepts]: Start accepts. Automaton has 9411 states and 27627 transitions. Word has length 67 [2019-12-07 10:56:23,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:56:23,988 INFO L462 AbstractCegarLoop]: Abstraction has 9411 states and 27627 transitions. [2019-12-07 10:56:23,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:56:23,988 INFO L276 IsEmpty]: Start isEmpty. Operand 9411 states and 27627 transitions. [2019-12-07 10:56:23,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:56:23,996 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:56:23,996 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:56:23,996 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:56:23,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:56:23,996 INFO L82 PathProgramCache]: Analyzing trace with hash -778064925, now seen corresponding path program 2 times [2019-12-07 10:56:23,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:56:23,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398075766] [2019-12-07 10:56:23,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:56:24,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:56:24,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:56:24,064 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 10:56:24,064 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:56:24,066 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44|) 0) (= 0 |v_ULTIMATE.start_main_~#t1495~0.offset_28|) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1495~0.base_44| 4)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44| 1)) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44|) |v_ULTIMATE.start_main_~#t1495~0.offset_28| 0))) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1495~0.base_44|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_18|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_28|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_25|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1495~0.offset=|v_ULTIMATE.start_main_~#t1495~0.offset_28|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1495~0.base=|v_ULTIMATE.start_main_~#t1495~0.base_44|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1497~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1496~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1497~0.base, #NULL.base, ULTIMATE.start_main_~#t1495~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_~#t1495~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 10:56:24,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1496~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1496~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13|) |v_ULTIMATE.start_main_~#t1496~0.offset_11| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1496~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1496~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1496~0.offset] because there is no mapped edge [2019-12-07 10:56:24,067 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13|) |v_ULTIMATE.start_main_~#t1497~0.offset_11| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1497~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1497~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1497~0.offset_11| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1497~0.offset, #length, ULTIMATE.start_main_~#t1497~0.base] because there is no mapped edge [2019-12-07 10:56:24,068 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 10:56:24,070 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1871597890 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_In1871597890| |P2Thread1of1ForFork2_#t~ite20_Out1871597890|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite21_Out1871597890| ~z$w_buff0~0_In1871597890)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out1871597890| ~z$w_buff0~0_In1871597890) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1871597890 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In1871597890 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1871597890 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1871597890 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite21_Out1871597890| |P2Thread1of1ForFork2_#t~ite20_Out1871597890|) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1871597890, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1871597890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In1871597890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871597890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871597890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1871597890, ~weak$$choice2~0=~weak$$choice2~0_In1871597890} OutVars{~z$w_buff0~0=~z$w_buff0~0_In1871597890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1871597890|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1871597890, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out1871597890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871597890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871597890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1871597890, ~weak$$choice2~0=~weak$$choice2~0_In1871597890} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 10:56:24,071 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork1_#t~ite9_Out548568824| |P1Thread1of1ForFork1_#t~ite10_Out548568824|)) (.cse2 (= (mod ~z$w_buff1_used~0_In548568824 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In548568824 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In548568824 |P1Thread1of1ForFork1_#t~ite9_Out548568824|)) (and .cse0 (not .cse2) (not .cse1) (= ~z$w_buff1~0_In548568824 |P1Thread1of1ForFork1_#t~ite9_Out548568824|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In548568824, ~z$w_buff1_used~0=~z$w_buff1_used~0_In548568824, ~z$w_buff1~0=~z$w_buff1~0_In548568824, ~z~0=~z~0_In548568824} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out548568824|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In548568824, ~z$w_buff1_used~0=~z$w_buff1_used~0_In548568824, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out548568824|, ~z$w_buff1~0=~z$w_buff1~0_In548568824, ~z~0=~z~0_In548568824} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 10:56:24,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-580675006 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-580675006 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-580675006 |P0Thread1of1ForFork0_#t~ite5_Out-580675006|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-580675006|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-580675006, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-580675006} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-580675006|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-580675006, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-580675006} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 10:56:24,072 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-747825423 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-747825423 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-747825423 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-747825423 256)))) (or (and (= ~z$w_buff1_used~0_In-747825423 |P0Thread1of1ForFork0_#t~ite6_Out-747825423|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-747825423| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-747825423, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-747825423, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-747825423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-747825423} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-747825423|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-747825423, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-747825423, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-747825423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-747825423} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 10:56:24,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-357208465 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_Out-357208465 ~z$r_buff0_thd1~0_In-357208465)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-357208465 256)))) (or (and .cse0 .cse1) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out-357208465 0) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-357208465, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-357208465} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-357208465, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-357208465|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-357208465} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:56:24,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2132097645 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2132097645 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2132097645|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out2132097645| ~z$w_buff0_used~0_In2132097645) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2132097645, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2132097645} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2132097645, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2132097645|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2132097645} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 10:56:24,073 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-546332454 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-546332454 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-546332454 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-546332454 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-546332454 |P1Thread1of1ForFork1_#t~ite12_Out-546332454|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-546332454|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-546332454, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-546332454, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-546332454, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-546332454} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-546332454, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-546332454, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-546332454, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-546332454|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-546332454} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 10:56:24,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In2109288063 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In2109288063 256)))) (or (and (= ~z$r_buff0_thd2~0_In2109288063 |P1Thread1of1ForFork1_#t~ite13_Out2109288063|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out2109288063|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2109288063, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2109288063} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2109288063, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2109288063|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2109288063} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 10:56:24,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-377093814 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-377093814 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-377093814 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-377093814 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In-377093814 |P1Thread1of1ForFork1_#t~ite14_Out-377093814|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-377093814|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-377093814, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-377093814, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-377093814, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-377093814} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-377093814, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-377093814, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-377093814, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-377093814|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-377093814} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 10:56:24,074 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:56:24,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 10:56:24,075 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2109004521 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In2109004521 |P2Thread1of1ForFork2_#t~ite36_Out2109004521|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite35_In2109004521| |P2Thread1of1ForFork2_#t~ite35_Out2109004521|)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out2109004521| ~z$r_buff1_thd3~0_In2109004521) .cse0 (= |P2Thread1of1ForFork2_#t~ite35_Out2109004521| |P2Thread1of1ForFork2_#t~ite36_Out2109004521|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In2109004521 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In2109004521 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In2109004521 256) 0)) (= (mod ~z$w_buff0_used~0_In2109004521 256) 0)))))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In2109004521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2109004521, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2109004521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2109004521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2109004521, ~weak$$choice2~0=~weak$$choice2~0_In2109004521} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out2109004521|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out2109004521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2109004521, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2109004521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2109004521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2109004521, ~weak$$choice2~0=~weak$$choice2~0_In2109004521} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 10:56:24,076 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:56:24,076 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out-435494679| |P2Thread1of1ForFork2_#t~ite39_Out-435494679|)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-435494679 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-435494679 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out-435494679| ~z$w_buff1~0_In-435494679)) (and (= ~z~0_In-435494679 |P2Thread1of1ForFork2_#t~ite38_Out-435494679|) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-435494679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-435494679, ~z$w_buff1~0=~z$w_buff1~0_In-435494679, ~z~0=~z~0_In-435494679} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-435494679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-435494679, ~z$w_buff1~0=~z$w_buff1~0_In-435494679, ~z~0=~z~0_In-435494679, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-435494679|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-435494679|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 10:56:24,076 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1364103434 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1364103434 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out-1364103434| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite40_Out-1364103434| ~z$w_buff0_used~0_In-1364103434) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1364103434, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1364103434} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1364103434, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1364103434, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-1364103434|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 10:56:24,077 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1144969531 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1144969531 256))) (.cse3 (= (mod ~z$r_buff1_thd3~0_In1144969531 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1144969531 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out1144969531| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite41_Out1144969531| ~z$w_buff1_used~0_In1144969531) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1144969531, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1144969531, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1144969531, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1144969531} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1144969531|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1144969531, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1144969531, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1144969531, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1144969531} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 10:56:24,077 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1949125241 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1949125241 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1949125241|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-1949125241| ~z$r_buff0_thd3~0_In-1949125241)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1949125241, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1949125241} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1949125241|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1949125241, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1949125241} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-740143156 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-740143156 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-740143156 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-740143156 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-740143156 |P2Thread1of1ForFork2_#t~ite43_Out-740143156|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-740143156|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-740143156, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-740143156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-740143156, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-740143156} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-740143156, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-740143156, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-740143156|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-740143156, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-740143156} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In265279576 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In265279576 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In265279576 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In265279576 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out265279576| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out265279576| ~z$r_buff1_thd1~0_In265279576)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In265279576, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In265279576, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265279576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In265279576} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In265279576, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out265279576|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In265279576, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265279576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In265279576} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:56:24,078 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In793487422 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In793487422 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out793487422| |ULTIMATE.start_main_#t~ite48_Out793487422|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out793487422| ~z$w_buff1~0_In793487422)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out793487422| ~z~0_In793487422) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In793487422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In793487422, ~z$w_buff1~0=~z$w_buff1~0_In793487422, ~z~0=~z~0_In793487422} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In793487422, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out793487422|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In793487422, ~z$w_buff1~0=~z$w_buff1~0_In793487422, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out793487422|, ~z~0=~z~0_In793487422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:56:24,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In623266023 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In623266023 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out623266023| 0)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In623266023 |ULTIMATE.start_main_#t~ite49_Out623266023|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In623266023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623266023} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In623266023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623266023, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out623266023|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:56:24,079 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-79217609 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-79217609 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-79217609 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-79217609 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-79217609|)) (and (= ~z$w_buff1_used~0_In-79217609 |ULTIMATE.start_main_#t~ite50_Out-79217609|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-79217609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-79217609, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-79217609, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-79217609} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-79217609|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-79217609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-79217609, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-79217609, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-79217609} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:56:24,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1421595384 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1421595384 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1421595384|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1421595384 |ULTIMATE.start_main_#t~ite51_Out-1421595384|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1421595384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1421595384} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1421595384, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1421595384|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1421595384} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:56:24,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-2112980393 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-2112980393 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-2112980393 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-2112980393 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In-2112980393 |ULTIMATE.start_main_#t~ite52_Out-2112980393|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-2112980393|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2112980393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2112980393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2112980393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2112980393} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2112980393|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2112980393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2112980393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2112980393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2112980393} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:56:24,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:56:24,144 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:56:24 BasicIcfg [2019-12-07 10:56:24,144 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:56:24,145 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:56:24,145 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:56:24,145 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:56:24,145 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:54:22" (3/4) ... [2019-12-07 10:56:24,147 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:56:24,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_82| 0 0))) (and (= v_~z$r_buff0_thd0~0_144 0) (= v_~z$r_buff0_thd1~0_230 0) (= v_~z$w_buff0_used~0_947 0) (= v_~z$r_buff1_thd1~0_185 0) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_#NULL.offset_7| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44|) 0) (= 0 |v_ULTIMATE.start_main_~#t1495~0.offset_28|) (= v_~z$w_buff1_used~0_563 0) (= v_~weak$$choice2~0_147 0) (= 0 v_~z$r_buff1_thd3~0_352) (= 0 v_~x~0_159) (< 0 |v_#StackHeapBarrier_17|) (= v_~z$read_delayed~0_6 0) (= v_~z$mem_tmp~0_24 0) (= v_~z$r_buff0_thd2~0_126 0) (= 0 v_~__unbuffered_p2_EAX~0_47) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1495~0.base_44| 4)) (= v_~z$read_delayed_var~0.base_6 0) (= v_~__unbuffered_cnt~0_155 0) (= v_~z$r_buff1_thd2~0_201 0) (= 0 v_~z$r_buff0_thd3~0_371) (= |v_#valid_80| (store .cse0 |v_ULTIMATE.start_main_~#t1495~0.base_44| 1)) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t1495~0.base_44|) |v_ULTIMATE.start_main_~#t1495~0.offset_28| 0))) (= v_~main$tmp_guard1~0_38 0) (= v_~z$r_buff1_thd0~0_199 0) (= 0 |v_#NULL.base_7|) (= 0 v_~weak$$choice0~0_19) (= v_~z$w_buff1~0_328 0) (= v_~z~0_152 0) (= v_~z$w_buff0~0_540 0) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$flush_delayed~0_35) (= v_~y~0_49 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1495~0.base_44|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_82|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_44|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_201, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_59|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_18|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_328, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_37|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_38, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_99|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_31|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_75|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_144, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_199, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_47, ~y~0=v_~y~0_49, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_126, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_28|, ~z$mem_tmp~0=v_~z$mem_tmp~0_24, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_19|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_947, ~z$w_buff0~0=v_~z$w_buff0~0_540, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_352, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_563, ~z$flush_delayed~0=v_~z$flush_delayed~0_35, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_25|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t1495~0.offset=|v_ULTIMATE.start_main_~#t1495~0.offset_28|, ~weak$$choice0~0=v_~weak$$choice0~0_19, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_26|, #valid=|v_#valid_80|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_185, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t1495~0.base=|v_ULTIMATE.start_main_~#t1495~0.base_44|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_371, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~z~0=v_~z~0_152, ~weak$$choice2~0=v_~weak$$choice2~0_147, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_230, ~x~0=v_~x~0_159} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1497~0.offset, ~z$read_delayed~0, ~z$w_buff1~0, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1496~0.offset, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1497~0.base, #NULL.base, ULTIMATE.start_main_~#t1495~0.offset, ~weak$$choice0~0, ULTIMATE.start_main_#res, #valid, ~z$r_buff1_thd1~0, #memory_int, ULTIMATE.start_main_~#t1495~0.base, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 10:56:24,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [857] [857] L818-1-->L820: Formula: (and (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1496~0.base_13|)) (= (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1496~0.base_13|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1496~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1496~0.base_13|) |v_ULTIMATE.start_main_~#t1496~0.offset_11| 1)) |v_#memory_int_13|) (= 0 |v_ULTIMATE.start_main_~#t1496~0.offset_11|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t1496~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t1496~0.base=|v_ULTIMATE.start_main_~#t1496~0.base_13|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1496~0.offset=|v_ULTIMATE.start_main_~#t1496~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1496~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1496~0.offset] because there is no mapped edge [2019-12-07 10:56:24,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L820-1-->L822: Formula: (and (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1497~0.base_13|) |v_ULTIMATE.start_main_~#t1497~0.offset_11| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t1497~0.base_13| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1497~0.base_13| 4)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1497~0.base_13| 1)) (= |v_ULTIMATE.start_main_~#t1497~0.offset_11| 0) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1497~0.base_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1497~0.offset=|v_ULTIMATE.start_main_~#t1497~0.offset_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1497~0.base=|v_ULTIMATE.start_main_~#t1497~0.base_13|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t1497~0.offset, #length, ULTIMATE.start_main_~#t1497~0.base] because there is no mapped edge [2019-12-07 10:56:24,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] P0ENTRY-->L4-3: Formula: (and (= v_P0Thread1of1ForFork0_~arg.offset_12 |v_P0Thread1of1ForFork0_#in~arg.offset_14|) (= v_~z$w_buff0_used~0_163 v_~z$w_buff1_used~0_112) (= (ite (not (and (not (= (mod v_~z$w_buff1_used~0_112 256) 0)) (not (= (mod v_~z$w_buff0_used~0_162 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (= v_~z$w_buff0~0_38 v_~z$w_buff1~0_37) (= v_~z$w_buff0_used~0_162 1) (= 1 v_~z$w_buff0~0_37) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14 0)) (= v_P0Thread1of1ForFork0_~arg.base_12 |v_P0Thread1of1ForFork0_#in~arg.base_14|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_163, ~z$w_buff0~0=v_~z$w_buff0~0_38, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_14|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_162, ~z$w_buff0~0=v_~z$w_buff0~0_37, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_14, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_112, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_14|, ~z$w_buff1~0=v_~z$w_buff1~0_37, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_12, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_12|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_12} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 10:56:24,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1871597890 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_In1871597890| |P2Thread1of1ForFork2_#t~ite20_Out1871597890|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite21_Out1871597890| ~z$w_buff0~0_In1871597890)) (and (= |P2Thread1of1ForFork2_#t~ite20_Out1871597890| ~z$w_buff0~0_In1871597890) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1871597890 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In1871597890 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In1871597890 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In1871597890 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite21_Out1871597890| |P2Thread1of1ForFork2_#t~ite20_Out1871597890|) .cse0))) InVars {~z$w_buff0~0=~z$w_buff0~0_In1871597890, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1871597890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_In1871597890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871597890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871597890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1871597890, ~weak$$choice2~0=~weak$$choice2~0_In1871597890} OutVars{~z$w_buff0~0=~z$w_buff0~0_In1871597890, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1871597890|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1871597890, P2Thread1of1ForFork2_#t~ite21=|P2Thread1of1ForFork2_#t~ite21_Out1871597890|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1871597890, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1871597890, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1871597890, ~weak$$choice2~0=~weak$$choice2~0_In1871597890} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 10:56:24,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L762-2-->L762-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork1_#t~ite9_Out548568824| |P1Thread1of1ForFork1_#t~ite10_Out548568824|)) (.cse2 (= (mod ~z$w_buff1_used~0_In548568824 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd2~0_In548568824 256) 0))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In548568824 |P1Thread1of1ForFork1_#t~ite9_Out548568824|)) (and .cse0 (not .cse2) (not .cse1) (= ~z$w_buff1~0_In548568824 |P1Thread1of1ForFork1_#t~ite9_Out548568824|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In548568824, ~z$w_buff1_used~0=~z$w_buff1_used~0_In548568824, ~z$w_buff1~0=~z$w_buff1~0_In548568824, ~z~0=~z~0_In548568824} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out548568824|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In548568824, ~z$w_buff1_used~0=~z$w_buff1_used~0_In548568824, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out548568824|, ~z$w_buff1~0=~z$w_buff1~0_In548568824, ~z~0=~z~0_In548568824} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 10:56:24,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-580675006 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-580675006 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-580675006 |P0Thread1of1ForFork0_#t~ite5_Out-580675006|)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-580675006|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-580675006, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-580675006} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-580675006|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-580675006, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-580675006} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 10:56:24,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-747825423 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-747825423 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-747825423 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-747825423 256)))) (or (and (= ~z$w_buff1_used~0_In-747825423 |P0Thread1of1ForFork0_#t~ite6_Out-747825423|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-747825423| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-747825423, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-747825423, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-747825423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-747825423} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-747825423|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-747825423, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-747825423, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-747825423, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-747825423} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 10:56:24,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-357208465 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_Out-357208465 ~z$r_buff0_thd1~0_In-357208465)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-357208465 256)))) (or (and .cse0 .cse1) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out-357208465 0) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-357208465, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-357208465} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-357208465, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-357208465|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-357208465} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:56:24,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2132097645 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2132097645 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out2132097645|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out2132097645| ~z$w_buff0_used~0_In2132097645) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2132097645, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2132097645} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2132097645, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2132097645|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2132097645} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 10:56:24,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In-546332454 256))) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-546332454 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-546332454 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-546332454 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-546332454 |P1Thread1of1ForFork1_#t~ite12_Out-546332454|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-546332454|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-546332454, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-546332454, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-546332454, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-546332454} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-546332454, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-546332454, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-546332454, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-546332454|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-546332454} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 10:56:24,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In2109288063 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In2109288063 256)))) (or (and (= ~z$r_buff0_thd2~0_In2109288063 |P1Thread1of1ForFork1_#t~ite13_Out2109288063|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out2109288063|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2109288063, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2109288063} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2109288063, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2109288063|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2109288063} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 10:56:24,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L766-->L766-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-377093814 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-377093814 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In-377093814 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-377093814 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In-377093814 |P1Thread1of1ForFork1_#t~ite14_Out-377093814|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-377093814|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-377093814, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-377093814, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-377093814, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-377093814} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-377093814, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-377093814, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-377093814, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-377093814|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-377093814} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 10:56:24,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [854] [854] L766-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_57 (+ v_~__unbuffered_cnt~0_58 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~z$r_buff1_thd2~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_58, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_92, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:56:24,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L788-->L789: Formula: (and (= v_~z$r_buff0_thd3~0_137 v_~z$r_buff0_thd3~0_136) (not (= (mod v_~weak$$choice2~0_34 256) 0))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_137, ~weak$$choice2~0=v_~weak$$choice2~0_34} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_10|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_136, ~weak$$choice2~0=v_~weak$$choice2~0_34} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 10:56:24,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2109004521 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In2109004521 |P2Thread1of1ForFork2_#t~ite36_Out2109004521|) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite35_In2109004521| |P2Thread1of1ForFork2_#t~ite35_Out2109004521|)) (and (= |P2Thread1of1ForFork2_#t~ite35_Out2109004521| ~z$r_buff1_thd3~0_In2109004521) .cse0 (= |P2Thread1of1ForFork2_#t~ite35_Out2109004521| |P2Thread1of1ForFork2_#t~ite36_Out2109004521|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In2109004521 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In2109004521 256))) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In2109004521 256) 0)) (= (mod ~z$w_buff0_used~0_In2109004521 256) 0)))))) InVars {P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_In2109004521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2109004521, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2109004521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2109004521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2109004521, ~weak$$choice2~0=~weak$$choice2~0_In2109004521} OutVars{P2Thread1of1ForFork2_#t~ite35=|P2Thread1of1ForFork2_#t~ite35_Out2109004521|, P2Thread1of1ForFork2_#t~ite36=|P2Thread1of1ForFork2_#t~ite36_Out2109004521|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2109004521, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2109004521, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2109004521, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2109004521, ~weak$$choice2~0=~weak$$choice2~0_In2109004521} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite35, P2Thread1of1ForFork2_#t~ite36] because there is no mapped edge [2019-12-07 10:56:24,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L791-->L795: Formula: (and (not (= 0 (mod v_~z$flush_delayed~0_10 256))) (= v_~z~0_62 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_9)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_9, ~z~0=v_~z~0_62} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:56:24,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-2-->L795-5: Formula: (let ((.cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out-435494679| |P2Thread1of1ForFork2_#t~ite39_Out-435494679|)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-435494679 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-435494679 256) 0))) (or (and (not .cse0) (not .cse1) .cse2 (= |P2Thread1of1ForFork2_#t~ite38_Out-435494679| ~z$w_buff1~0_In-435494679)) (and (= ~z~0_In-435494679 |P2Thread1of1ForFork2_#t~ite38_Out-435494679|) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-435494679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-435494679, ~z$w_buff1~0=~z$w_buff1~0_In-435494679, ~z~0=~z~0_In-435494679} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-435494679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-435494679, ~z$w_buff1~0=~z$w_buff1~0_In-435494679, ~z~0=~z~0_In-435494679, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-435494679|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-435494679|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 10:56:24,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L796-->L796-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1364103434 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-1364103434 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out-1364103434| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite40_Out-1364103434| ~z$w_buff0_used~0_In-1364103434) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1364103434, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1364103434} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1364103434, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1364103434, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out-1364103434|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 10:56:24,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L797-->L797-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1144969531 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1144969531 256))) (.cse3 (= (mod ~z$r_buff1_thd3~0_In1144969531 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1144969531 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite41_Out1144969531| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork2_#t~ite41_Out1144969531| ~z$w_buff1_used~0_In1144969531) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1144969531, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1144969531, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1144969531, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1144969531} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1144969531|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1144969531, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1144969531, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1144969531, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1144969531} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1949125241 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1949125241 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1949125241|) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out-1949125241| ~z$r_buff0_thd3~0_In-1949125241)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1949125241, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1949125241} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1949125241|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1949125241, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1949125241} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-740143156 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-740143156 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-740143156 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-740143156 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-740143156 |P2Thread1of1ForFork2_#t~ite43_Out-740143156|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-740143156|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-740143156, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-740143156, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-740143156, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-740143156} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-740143156, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-740143156, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-740143156|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-740143156, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-740143156} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~z$r_buff1_thd3~0_167 |v_P2Thread1of1ForFork2_#t~ite43_38|)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_38|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_167, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_37|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L746-->L746-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In265279576 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In265279576 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In265279576 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In265279576 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out265279576| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite8_Out265279576| ~z$r_buff1_thd1~0_In265279576)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In265279576, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In265279576, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265279576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In265279576} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In265279576, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out265279576|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In265279576, ~z$w_buff1_used~0=~z$w_buff1_used~0_In265279576, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In265279576} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L746-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_159 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_159, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:56:24,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L822-1-->L828: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:56:24,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L828-2-->L828-5: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In793487422 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In793487422 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out793487422| |ULTIMATE.start_main_#t~ite48_Out793487422|))) (or (and (not .cse0) (not .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite47_Out793487422| ~z$w_buff1~0_In793487422)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite47_Out793487422| ~z~0_In793487422) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In793487422, ~z$w_buff1_used~0=~z$w_buff1_used~0_In793487422, ~z$w_buff1~0=~z$w_buff1~0_In793487422, ~z~0=~z~0_In793487422} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In793487422, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out793487422|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In793487422, ~z$w_buff1~0=~z$w_buff1~0_In793487422, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out793487422|, ~z~0=~z~0_In793487422} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:56:24,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In623266023 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In623266023 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out623266023| 0)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In623266023 |ULTIMATE.start_main_#t~ite49_Out623266023|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In623266023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623266023} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In623266023, ~z$w_buff0_used~0=~z$w_buff0_used~0_In623266023, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out623266023|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:56:24,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-79217609 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-79217609 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-79217609 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-79217609 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite50_Out-79217609|)) (and (= ~z$w_buff1_used~0_In-79217609 |ULTIMATE.start_main_#t~ite50_Out-79217609|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-79217609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-79217609, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-79217609, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-79217609} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-79217609|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-79217609, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-79217609, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-79217609, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-79217609} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:56:24,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-1421595384 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1421595384 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite51_Out-1421595384|) (not .cse0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-1421595384 |ULTIMATE.start_main_#t~ite51_Out-1421595384|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1421595384, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1421595384} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1421595384, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1421595384|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1421595384} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:56:24,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-2112980393 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-2112980393 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-2112980393 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-2112980393 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd0~0_In-2112980393 |ULTIMATE.start_main_#t~ite52_Out-2112980393|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite52_Out-2112980393|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2112980393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2112980393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2112980393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2112980393} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-2112980393|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2112980393, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2112980393, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2112980393, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2112980393} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:56:24,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_17 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 0 v_~__unbuffered_p2_EAX~0_21) (= v_~y~0_23 2))) 1 0)) 0 1)) (= v_~z$r_buff1_thd0~0_167 |v_ULTIMATE.start_main_#t~ite52_35|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0)) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_167, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_21, ~y~0=v_~y~0_23, ~x~0=v_~x~0_130, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:56:24,209 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_bb7439d8-1b4f-4cae-8ef7-e59582c1bf29/bin/utaipan/witness.graphml [2019-12-07 10:56:24,210 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:56:24,211 INFO L168 Benchmark]: Toolchain (without parser) took 122370.63 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 939.8 MB in the beginning and 4.7 GB in the end (delta: -3.8 GB). Peak memory consumption was 2.5 GB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,211 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:56:24,211 INFO L168 Benchmark]: CACSL2BoogieTranslator took 398.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -127.0 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,211 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,212 INFO L168 Benchmark]: Boogie Preprocessor took 25.19 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:56:24,212 INFO L168 Benchmark]: RCFGBuilder took 406.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,212 INFO L168 Benchmark]: TraceAbstraction took 121431.92 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,212 INFO L168 Benchmark]: Witness Printer took 65.03 ms. Allocated memory is still 7.3 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:56:24,214 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 398.50 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.1 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -127.0 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.19 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 406.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 121431.92 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.7 GB in the end (delta: -3.7 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. * Witness Printer took 65.03 ms. Allocated memory is still 7.3 GB. Free memory was 4.7 GB in the beginning and 4.7 GB in the end (delta: 13.4 MB). Peak memory consumption was 13.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 174 ProgramPointsBefore, 92 ProgramPointsAfterwards, 211 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 6843 VarBasedMoverChecksPositive, 273 VarBasedMoverChecksNegative, 91 SemBasedMoverChecksPositive, 240 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 77200 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1495, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L820] FCALL, FORK 0 pthread_create(&t1496, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t1497, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 y = 2 [L779] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L780] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L781] 3 z$flush_delayed = weak$$choice2 [L782] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L783] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L784] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L785] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L786] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L786] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L787] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L789] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L790] 3 __unbuffered_p2_EAX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L795] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L796] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L797] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L798] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L828] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L829] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L830] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L831] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 121.2s, OverallIterations: 41, TraceHistogramMax: 1, AutomataDifference: 31.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 8345 SDtfs, 11148 SDslu, 24668 SDs, 0 SdLazy, 19531 SolverSat, 539 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 561 GetRequests, 135 SyntacticMatches, 42 SemanticMatches, 384 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1673 ImplicationChecksByTransitivity, 3.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195815occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 71.3s AutomataMinimizationTime, 40 MinimizatonAttempts, 435477 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1791 NumberOfCodeBlocks, 1791 NumberOfCodeBlocksAsserted, 41 NumberOfCheckSat, 1684 ConstructedInterpolants, 0 QuantifiedInterpolants, 445945 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 40 InterpolantComputations, 40 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...