./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix057_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix057_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ad686c605e14bdf1ca981a585fa7d70654556c90 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 19:22:14,471 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 19:22:14,472 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 19:22:14,481 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 19:22:14,481 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 19:22:14,482 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 19:22:14,484 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 19:22:14,485 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 19:22:14,487 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 19:22:14,488 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 19:22:14,489 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 19:22:14,489 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 19:22:14,490 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 19:22:14,490 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 19:22:14,491 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 19:22:14,492 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 19:22:14,492 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 19:22:14,493 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 19:22:14,494 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 19:22:14,496 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 19:22:14,497 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 19:22:14,498 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 19:22:14,499 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 19:22:14,499 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 19:22:14,501 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 19:22:14,501 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 19:22:14,502 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 19:22:14,502 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 19:22:14,502 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 19:22:14,503 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 19:22:14,503 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 19:22:14,504 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 19:22:14,504 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 19:22:14,505 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 19:22:14,506 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 19:22:14,506 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 19:22:14,507 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 19:22:14,507 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 19:22:14,507 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 19:22:14,508 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 19:22:14,508 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 19:22:14,509 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 19:22:14,523 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 19:22:14,523 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 19:22:14,523 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 19:22:14,524 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 19:22:14,524 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 19:22:14,524 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 19:22:14,524 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 19:22:14,524 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 19:22:14,525 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 19:22:14,525 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 19:22:14,525 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 19:22:14,525 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 19:22:14,525 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 19:22:14,526 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 19:22:14,526 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 19:22:14,526 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 19:22:14,527 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 19:22:14,528 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 19:22:14,529 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 19:22:14,529 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 19:22:14,529 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 19:22:14,529 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:14,529 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 19:22:14,529 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 19:22:14,530 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 19:22:14,531 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ad686c605e14bdf1ca981a585fa7d70654556c90 [2019-12-07 19:22:14,642 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 19:22:14,650 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 19:22:14,652 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 19:22:14,653 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 19:22:14,654 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 19:22:14,654 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix057_pso.opt.i [2019-12-07 19:22:14,701 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/data/22322775d/3cae26cf35554910ac3c980a857707c0/FLAGdec8b866a [2019-12-07 19:22:15,243 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 19:22:15,243 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/sv-benchmarks/c/pthread-wmm/mix057_pso.opt.i [2019-12-07 19:22:15,253 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/data/22322775d/3cae26cf35554910ac3c980a857707c0/FLAGdec8b866a [2019-12-07 19:22:15,690 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/data/22322775d/3cae26cf35554910ac3c980a857707c0 [2019-12-07 19:22:15,692 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 19:22:15,693 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 19:22:15,694 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:15,694 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 19:22:15,697 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 19:22:15,697 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:15" (1/1) ... [2019-12-07 19:22:15,699 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:15, skipping insertion in model container [2019-12-07 19:22:15,699 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 07:22:15" (1/1) ... [2019-12-07 19:22:15,704 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 19:22:15,734 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 19:22:15,973 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:15,981 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 19:22:16,025 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 19:22:16,072 INFO L208 MainTranslator]: Completed translation [2019-12-07 19:22:16,073 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16 WrapperNode [2019-12-07 19:22:16,073 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 19:22:16,073 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:16,073 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 19:22:16,073 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 19:22:16,079 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,092 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,116 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 19:22:16,116 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 19:22:16,116 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 19:22:16,116 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 19:22:16,123 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,123 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,126 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,127 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,133 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,136 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,139 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... [2019-12-07 19:22:16,142 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 19:22:16,143 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 19:22:16,143 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 19:22:16,143 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 19:22:16,144 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 19:22:16,192 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 19:22:16,192 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 19:22:16,192 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 19:22:16,193 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 19:22:16,193 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 19:22:16,193 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 19:22:16,193 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 19:22:16,193 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 19:22:16,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 19:22:16,193 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 19:22:16,194 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 19:22:16,556 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 19:22:16,557 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 19:22:16,557 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:16 BoogieIcfgContainer [2019-12-07 19:22:16,557 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 19:22:16,558 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 19:22:16,558 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 19:22:16,560 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 19:22:16,560 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 07:22:15" (1/3) ... [2019-12-07 19:22:16,561 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@313c885c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:16, skipping insertion in model container [2019-12-07 19:22:16,561 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 07:22:16" (2/3) ... [2019-12-07 19:22:16,561 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@313c885c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 07:22:16, skipping insertion in model container [2019-12-07 19:22:16,561 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:16" (3/3) ... [2019-12-07 19:22:16,562 INFO L109 eAbstractionObserver]: Analyzing ICFG mix057_pso.opt.i [2019-12-07 19:22:16,568 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 19:22:16,568 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 19:22:16,573 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 19:22:16,574 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 19:22:16,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,597 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,597 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,598 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,599 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,599 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,599 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,600 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,600 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,601 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,602 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,603 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,605 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,605 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,605 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,606 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,606 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,606 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,606 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,606 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,607 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,608 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,609 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,610 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,610 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,610 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,610 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,610 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,611 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 19:22:16,626 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-07 19:22:16,641 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 19:22:16,641 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 19:22:16,641 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 19:22:16,641 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 19:22:16,641 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 19:22:16,641 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 19:22:16,641 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 19:22:16,641 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 19:22:16,652 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 206 transitions [2019-12-07 19:22:16,653 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 206 transitions [2019-12-07 19:22:16,705 INFO L134 PetriNetUnfolder]: 41/202 cut-off events. [2019-12-07 19:22:16,705 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:16,714 INFO L76 FinitePrefix]: Finished finitePrefix Result has 215 conditions, 202 events. 41/202 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 483 event pairs. 12/171 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 19:22:16,725 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 206 transitions [2019-12-07 19:22:16,754 INFO L134 PetriNetUnfolder]: 41/202 cut-off events. [2019-12-07 19:22:16,754 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 19:22:16,758 INFO L76 FinitePrefix]: Finished finitePrefix Result has 215 conditions, 202 events. 41/202 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 483 event pairs. 12/171 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-07 19:22:16,769 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-07 19:22:16,770 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 19:22:19,789 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 91 [2019-12-07 19:22:19,886 INFO L206 etLargeBlockEncoding]: Checked pairs total: 56276 [2019-12-07 19:22:19,886 INFO L214 etLargeBlockEncoding]: Total number of compositions: 119 [2019-12-07 19:22:19,888 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 91 places, 100 transitions [2019-12-07 19:22:21,727 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 32878 states. [2019-12-07 19:22:21,729 INFO L276 IsEmpty]: Start isEmpty. Operand 32878 states. [2019-12-07 19:22:21,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-07 19:22:21,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:21,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:21,734 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:21,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:21,738 INFO L82 PathProgramCache]: Analyzing trace with hash -667351009, now seen corresponding path program 1 times [2019-12-07 19:22:21,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:21,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198842735] [2019-12-07 19:22:21,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:21,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:21,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:21,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198842735] [2019-12-07 19:22:21,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:21,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 19:22:21,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [37103649] [2019-12-07 19:22:21,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:21,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:21,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:21,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:21,912 INFO L87 Difference]: Start difference. First operand 32878 states. Second operand 3 states. [2019-12-07 19:22:22,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:22,233 INFO L93 Difference]: Finished difference Result 32686 states and 139960 transitions. [2019-12-07 19:22:22,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:22,235 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-07 19:22:22,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:22,411 INFO L225 Difference]: With dead ends: 32686 [2019-12-07 19:22:22,411 INFO L226 Difference]: Without dead ends: 32062 [2019-12-07 19:22:22,412 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:22,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32062 states. [2019-12-07 19:22:23,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32062 to 32062. [2019-12-07 19:22:23,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32062 states. [2019-12-07 19:22:23,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32062 states to 32062 states and 137412 transitions. [2019-12-07 19:22:23,385 INFO L78 Accepts]: Start accepts. Automaton has 32062 states and 137412 transitions. Word has length 9 [2019-12-07 19:22:23,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:23,386 INFO L462 AbstractCegarLoop]: Abstraction has 32062 states and 137412 transitions. [2019-12-07 19:22:23,386 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:22:23,387 INFO L276 IsEmpty]: Start isEmpty. Operand 32062 states and 137412 transitions. [2019-12-07 19:22:23,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 19:22:23,393 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:23,393 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:23,393 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:23,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:23,394 INFO L82 PathProgramCache]: Analyzing trace with hash -139405083, now seen corresponding path program 1 times [2019-12-07 19:22:23,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:23,394 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1832052020] [2019-12-07 19:22:23,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:23,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:23,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:23,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1832052020] [2019-12-07 19:22:23,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:23,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:22:23,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166690609] [2019-12-07 19:22:23,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:22:23,476 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:23,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:22:23,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:22:23,476 INFO L87 Difference]: Start difference. First operand 32062 states and 137412 transitions. Second operand 4 states. [2019-12-07 19:22:23,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:23,996 INFO L93 Difference]: Finished difference Result 51166 states and 211740 transitions. [2019-12-07 19:22:23,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:22:23,997 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 19:22:23,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:24,139 INFO L225 Difference]: With dead ends: 51166 [2019-12-07 19:22:24,139 INFO L226 Difference]: Without dead ends: 51138 [2019-12-07 19:22:24,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:24,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51138 states. [2019-12-07 19:22:25,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51138 to 46670. [2019-12-07 19:22:25,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46670 states. [2019-12-07 19:22:25,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46670 states to 46670 states and 195108 transitions. [2019-12-07 19:22:25,245 INFO L78 Accepts]: Start accepts. Automaton has 46670 states and 195108 transitions. Word has length 15 [2019-12-07 19:22:25,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:25,245 INFO L462 AbstractCegarLoop]: Abstraction has 46670 states and 195108 transitions. [2019-12-07 19:22:25,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:22:25,245 INFO L276 IsEmpty]: Start isEmpty. Operand 46670 states and 195108 transitions. [2019-12-07 19:22:25,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-07 19:22:25,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:25,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:25,248 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:25,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:25,248 INFO L82 PathProgramCache]: Analyzing trace with hash 2113277815, now seen corresponding path program 1 times [2019-12-07 19:22:25,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:25,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390935183] [2019-12-07 19:22:25,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:25,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:25,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:25,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390935183] [2019-12-07 19:22:25,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:25,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:22:25,293 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [973660770] [2019-12-07 19:22:25,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:22:25,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:25,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:22:25,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:22:25,294 INFO L87 Difference]: Start difference. First operand 46670 states and 195108 transitions. Second operand 4 states. [2019-12-07 19:22:25,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:25,609 INFO L93 Difference]: Finished difference Result 57898 states and 240332 transitions. [2019-12-07 19:22:25,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:22:25,610 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-07 19:22:25,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:25,918 INFO L225 Difference]: With dead ends: 57898 [2019-12-07 19:22:25,919 INFO L226 Difference]: Without dead ends: 57898 [2019-12-07 19:22:25,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:26,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57898 states. [2019-12-07 19:22:26,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57898 to 51310. [2019-12-07 19:22:26,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51310 states. [2019-12-07 19:22:27,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51310 states to 51310 states and 214288 transitions. [2019-12-07 19:22:27,158 INFO L78 Accepts]: Start accepts. Automaton has 51310 states and 214288 transitions. Word has length 15 [2019-12-07 19:22:27,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:27,158 INFO L462 AbstractCegarLoop]: Abstraction has 51310 states and 214288 transitions. [2019-12-07 19:22:27,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:22:27,159 INFO L276 IsEmpty]: Start isEmpty. Operand 51310 states and 214288 transitions. [2019-12-07 19:22:27,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 19:22:27,169 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:27,169 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:27,170 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:27,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:27,170 INFO L82 PathProgramCache]: Analyzing trace with hash -942234691, now seen corresponding path program 1 times [2019-12-07 19:22:27,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:27,170 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107132852] [2019-12-07 19:22:27,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:27,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:27,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:27,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107132852] [2019-12-07 19:22:27,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:27,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:22:27,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [630826194] [2019-12-07 19:22:27,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:22:27,230 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:27,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:22:27,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:27,230 INFO L87 Difference]: Start difference. First operand 51310 states and 214288 transitions. Second operand 5 states. [2019-12-07 19:22:27,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:27,724 INFO L93 Difference]: Finished difference Result 69354 states and 284756 transitions. [2019-12-07 19:22:27,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 19:22:27,724 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 19:22:27,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:27,875 INFO L225 Difference]: With dead ends: 69354 [2019-12-07 19:22:27,875 INFO L226 Difference]: Without dead ends: 69326 [2019-12-07 19:22:27,876 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:22:28,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69326 states. [2019-12-07 19:22:29,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69326 to 51342. [2019-12-07 19:22:29,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51342 states. [2019-12-07 19:22:29,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51342 states to 51342 states and 213896 transitions. [2019-12-07 19:22:29,154 INFO L78 Accepts]: Start accepts. Automaton has 51342 states and 213896 transitions. Word has length 21 [2019-12-07 19:22:29,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:29,154 INFO L462 AbstractCegarLoop]: Abstraction has 51342 states and 213896 transitions. [2019-12-07 19:22:29,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:22:29,154 INFO L276 IsEmpty]: Start isEmpty. Operand 51342 states and 213896 transitions. [2019-12-07 19:22:29,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 19:22:29,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:29,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:29,187 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:29,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:29,187 INFO L82 PathProgramCache]: Analyzing trace with hash 1902768364, now seen corresponding path program 1 times [2019-12-07 19:22:29,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:29,188 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434825617] [2019-12-07 19:22:29,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:29,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:29,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:29,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434825617] [2019-12-07 19:22:29,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:29,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:22:29,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1094458659] [2019-12-07 19:22:29,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:29,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:29,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:29,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:29,233 INFO L87 Difference]: Start difference. First operand 51342 states and 213896 transitions. Second operand 3 states. [2019-12-07 19:22:29,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:29,369 INFO L93 Difference]: Finished difference Result 40388 states and 155545 transitions. [2019-12-07 19:22:29,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:29,369 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-07 19:22:29,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:29,443 INFO L225 Difference]: With dead ends: 40388 [2019-12-07 19:22:29,444 INFO L226 Difference]: Without dead ends: 40388 [2019-12-07 19:22:29,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:29,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40388 states. [2019-12-07 19:22:30,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40388 to 40388. [2019-12-07 19:22:30,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40388 states. [2019-12-07 19:22:30,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40388 states to 40388 states and 155545 transitions. [2019-12-07 19:22:30,298 INFO L78 Accepts]: Start accepts. Automaton has 40388 states and 155545 transitions. Word has length 29 [2019-12-07 19:22:30,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:30,298 INFO L462 AbstractCegarLoop]: Abstraction has 40388 states and 155545 transitions. [2019-12-07 19:22:30,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:22:30,299 INFO L276 IsEmpty]: Start isEmpty. Operand 40388 states and 155545 transitions. [2019-12-07 19:22:30,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 19:22:30,319 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:30,319 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:30,320 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:30,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:30,320 INFO L82 PathProgramCache]: Analyzing trace with hash 847829435, now seen corresponding path program 1 times [2019-12-07 19:22:30,320 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:30,320 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969399977] [2019-12-07 19:22:30,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:30,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:30,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:30,361 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969399977] [2019-12-07 19:22:30,361 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:30,361 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:22:30,361 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1573125907] [2019-12-07 19:22:30,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 19:22:30,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:30,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 19:22:30,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:22:30,362 INFO L87 Difference]: Start difference. First operand 40388 states and 155545 transitions. Second operand 4 states. [2019-12-07 19:22:30,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:30,413 INFO L93 Difference]: Finished difference Result 16956 states and 54151 transitions. [2019-12-07 19:22:30,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 19:22:30,413 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 19:22:30,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:30,434 INFO L225 Difference]: With dead ends: 16956 [2019-12-07 19:22:30,434 INFO L226 Difference]: Without dead ends: 16956 [2019-12-07 19:22:30,434 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 19:22:30,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16956 states. [2019-12-07 19:22:30,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16956 to 16956. [2019-12-07 19:22:30,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16956 states. [2019-12-07 19:22:30,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16956 states to 16956 states and 54151 transitions. [2019-12-07 19:22:30,673 INFO L78 Accepts]: Start accepts. Automaton has 16956 states and 54151 transitions. Word has length 30 [2019-12-07 19:22:30,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:30,673 INFO L462 AbstractCegarLoop]: Abstraction has 16956 states and 54151 transitions. [2019-12-07 19:22:30,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 19:22:30,673 INFO L276 IsEmpty]: Start isEmpty. Operand 16956 states and 54151 transitions. [2019-12-07 19:22:30,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 19:22:30,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:30,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:30,681 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:30,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:30,682 INFO L82 PathProgramCache]: Analyzing trace with hash 613602003, now seen corresponding path program 1 times [2019-12-07 19:22:30,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:30,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423177618] [2019-12-07 19:22:30,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:30,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:30,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:30,717 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [423177618] [2019-12-07 19:22:30,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:30,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 19:22:30,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743550304] [2019-12-07 19:22:30,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:22:30,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:30,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:22:30,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:30,718 INFO L87 Difference]: Start difference. First operand 16956 states and 54151 transitions. Second operand 5 states. [2019-12-07 19:22:30,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:30,744 INFO L93 Difference]: Finished difference Result 2891 states and 7349 transitions. [2019-12-07 19:22:30,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 19:22:30,744 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 19:22:30,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:30,748 INFO L225 Difference]: With dead ends: 2891 [2019-12-07 19:22:30,748 INFO L226 Difference]: Without dead ends: 2891 [2019-12-07 19:22:30,748 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:30,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2891 states. [2019-12-07 19:22:30,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2891 to 2891. [2019-12-07 19:22:30,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2891 states. [2019-12-07 19:22:30,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2891 states to 2891 states and 7349 transitions. [2019-12-07 19:22:30,782 INFO L78 Accepts]: Start accepts. Automaton has 2891 states and 7349 transitions. Word has length 31 [2019-12-07 19:22:30,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:30,782 INFO L462 AbstractCegarLoop]: Abstraction has 2891 states and 7349 transitions. [2019-12-07 19:22:30,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:22:30,782 INFO L276 IsEmpty]: Start isEmpty. Operand 2891 states and 7349 transitions. [2019-12-07 19:22:30,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-07 19:22:30,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:30,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:30,785 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:30,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:30,785 INFO L82 PathProgramCache]: Analyzing trace with hash 2131566482, now seen corresponding path program 1 times [2019-12-07 19:22:30,785 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:30,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409910615] [2019-12-07 19:22:30,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:30,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:30,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409910615] [2019-12-07 19:22:30,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:30,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:22:30,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462678554] [2019-12-07 19:22:30,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:22:30,827 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:30,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:22:30,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:30,828 INFO L87 Difference]: Start difference. First operand 2891 states and 7349 transitions. Second operand 6 states. [2019-12-07 19:22:30,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:30,852 INFO L93 Difference]: Finished difference Result 1241 states and 3509 transitions. [2019-12-07 19:22:30,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:22:30,852 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-07 19:22:30,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:30,853 INFO L225 Difference]: With dead ends: 1241 [2019-12-07 19:22:30,854 INFO L226 Difference]: Without dead ends: 1241 [2019-12-07 19:22:30,854 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:30,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1241 states. [2019-12-07 19:22:30,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1241 to 1129. [2019-12-07 19:22:30,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1129 states. [2019-12-07 19:22:30,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1129 states to 1129 states and 3189 transitions. [2019-12-07 19:22:30,865 INFO L78 Accepts]: Start accepts. Automaton has 1129 states and 3189 transitions. Word has length 43 [2019-12-07 19:22:30,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:30,866 INFO L462 AbstractCegarLoop]: Abstraction has 1129 states and 3189 transitions. [2019-12-07 19:22:30,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:22:30,866 INFO L276 IsEmpty]: Start isEmpty. Operand 1129 states and 3189 transitions. [2019-12-07 19:22:30,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 19:22:30,868 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:30,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:30,868 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:30,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:30,868 INFO L82 PathProgramCache]: Analyzing trace with hash -275883304, now seen corresponding path program 1 times [2019-12-07 19:22:30,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:30,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502398528] [2019-12-07 19:22:30,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:30,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:30,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:30,906 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [502398528] [2019-12-07 19:22:30,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:30,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 19:22:30,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897929483] [2019-12-07 19:22:30,906 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:30,906 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:30,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:30,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:30,907 INFO L87 Difference]: Start difference. First operand 1129 states and 3189 transitions. Second operand 3 states. [2019-12-07 19:22:30,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:30,943 INFO L93 Difference]: Finished difference Result 1141 states and 3206 transitions. [2019-12-07 19:22:30,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:30,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 19:22:30,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:30,945 INFO L225 Difference]: With dead ends: 1141 [2019-12-07 19:22:30,945 INFO L226 Difference]: Without dead ends: 1141 [2019-12-07 19:22:30,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:30,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1141 states. [2019-12-07 19:22:30,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1141 to 1135. [2019-12-07 19:22:30,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1135 states. [2019-12-07 19:22:30,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 3199 transitions. [2019-12-07 19:22:30,961 INFO L78 Accepts]: Start accepts. Automaton has 1135 states and 3199 transitions. Word has length 58 [2019-12-07 19:22:30,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:30,962 INFO L462 AbstractCegarLoop]: Abstraction has 1135 states and 3199 transitions. [2019-12-07 19:22:30,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:22:30,962 INFO L276 IsEmpty]: Start isEmpty. Operand 1135 states and 3199 transitions. [2019-12-07 19:22:30,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 19:22:30,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:30,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:30,965 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:30,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:30,965 INFO L82 PathProgramCache]: Analyzing trace with hash -791070951, now seen corresponding path program 1 times [2019-12-07 19:22:30,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:30,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641890405] [2019-12-07 19:22:30,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:30,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:31,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:31,038 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641890405] [2019-12-07 19:22:31,038 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:31,038 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:22:31,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168163694] [2019-12-07 19:22:31,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 19:22:31,039 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:31,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 19:22:31,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 19:22:31,039 INFO L87 Difference]: Start difference. First operand 1135 states and 3199 transitions. Second operand 5 states. [2019-12-07 19:22:31,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:31,193 INFO L93 Difference]: Finished difference Result 1644 states and 4637 transitions. [2019-12-07 19:22:31,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:22:31,193 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 19:22:31,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:31,195 INFO L225 Difference]: With dead ends: 1644 [2019-12-07 19:22:31,195 INFO L226 Difference]: Without dead ends: 1644 [2019-12-07 19:22:31,195 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:22:31,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1644 states. [2019-12-07 19:22:31,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1644 to 1448. [2019-12-07 19:22:31,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1448 states. [2019-12-07 19:22:31,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1448 states to 1448 states and 4085 transitions. [2019-12-07 19:22:31,210 INFO L78 Accepts]: Start accepts. Automaton has 1448 states and 4085 transitions. Word has length 58 [2019-12-07 19:22:31,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:31,210 INFO L462 AbstractCegarLoop]: Abstraction has 1448 states and 4085 transitions. [2019-12-07 19:22:31,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 19:22:31,210 INFO L276 IsEmpty]: Start isEmpty. Operand 1448 states and 4085 transitions. [2019-12-07 19:22:31,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 19:22:31,212 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:31,212 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:31,212 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:31,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:31,212 INFO L82 PathProgramCache]: Analyzing trace with hash 867176459, now seen corresponding path program 2 times [2019-12-07 19:22:31,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:31,213 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031551918] [2019-12-07 19:22:31,213 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:31,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:31,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:31,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031551918] [2019-12-07 19:22:31,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:31,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:22:31,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170393796] [2019-12-07 19:22:31,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:22:31,276 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:31,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:22:31,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:31,277 INFO L87 Difference]: Start difference. First operand 1448 states and 4085 transitions. Second operand 6 states. [2019-12-07 19:22:31,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:31,469 INFO L93 Difference]: Finished difference Result 1722 states and 4730 transitions. [2019-12-07 19:22:31,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 19:22:31,469 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 19:22:31,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:31,471 INFO L225 Difference]: With dead ends: 1722 [2019-12-07 19:22:31,471 INFO L226 Difference]: Without dead ends: 1722 [2019-12-07 19:22:31,471 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 19:22:31,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1722 states. [2019-12-07 19:22:31,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1722 to 1500. [2019-12-07 19:22:31,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1500 states. [2019-12-07 19:22:31,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1500 states to 1500 states and 4161 transitions. [2019-12-07 19:22:31,485 INFO L78 Accepts]: Start accepts. Automaton has 1500 states and 4161 transitions. Word has length 58 [2019-12-07 19:22:31,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:31,485 INFO L462 AbstractCegarLoop]: Abstraction has 1500 states and 4161 transitions. [2019-12-07 19:22:31,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:22:31,485 INFO L276 IsEmpty]: Start isEmpty. Operand 1500 states and 4161 transitions. [2019-12-07 19:22:31,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 19:22:31,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:31,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:31,487 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:31,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:31,487 INFO L82 PathProgramCache]: Analyzing trace with hash -2105802411, now seen corresponding path program 3 times [2019-12-07 19:22:31,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:31,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490851115] [2019-12-07 19:22:31,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:31,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:31,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:31,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490851115] [2019-12-07 19:22:31,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:31,547 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 19:22:31,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831291402] [2019-12-07 19:22:31,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:22:31,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:31,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:22:31,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:31,548 INFO L87 Difference]: Start difference. First operand 1500 states and 4161 transitions. Second operand 6 states. [2019-12-07 19:22:31,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:31,710 INFO L93 Difference]: Finished difference Result 1982 states and 5473 transitions. [2019-12-07 19:22:31,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 19:22:31,710 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-07 19:22:31,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:31,712 INFO L225 Difference]: With dead ends: 1982 [2019-12-07 19:22:31,712 INFO L226 Difference]: Without dead ends: 1982 [2019-12-07 19:22:31,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 19:22:31,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1982 states. [2019-12-07 19:22:31,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1982 to 1528. [2019-12-07 19:22:31,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1528 states. [2019-12-07 19:22:31,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1528 states to 1528 states and 4241 transitions. [2019-12-07 19:22:31,727 INFO L78 Accepts]: Start accepts. Automaton has 1528 states and 4241 transitions. Word has length 58 [2019-12-07 19:22:31,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:31,728 INFO L462 AbstractCegarLoop]: Abstraction has 1528 states and 4241 transitions. [2019-12-07 19:22:31,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:22:31,728 INFO L276 IsEmpty]: Start isEmpty. Operand 1528 states and 4241 transitions. [2019-12-07 19:22:31,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 19:22:31,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:31,730 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:31,730 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:31,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:31,730 INFO L82 PathProgramCache]: Analyzing trace with hash -645544041, now seen corresponding path program 4 times [2019-12-07 19:22:31,730 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:31,730 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047205862] [2019-12-07 19:22:31,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:31,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:31,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:31,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047205862] [2019-12-07 19:22:31,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:31,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:22:31,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [418216940] [2019-12-07 19:22:31,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:31,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:31,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:31,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:31,779 INFO L87 Difference]: Start difference. First operand 1528 states and 4241 transitions. Second operand 3 states. [2019-12-07 19:22:31,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:31,790 INFO L93 Difference]: Finished difference Result 1444 states and 3973 transitions. [2019-12-07 19:22:31,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:31,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 19:22:31,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:31,792 INFO L225 Difference]: With dead ends: 1444 [2019-12-07 19:22:31,792 INFO L226 Difference]: Without dead ends: 1444 [2019-12-07 19:22:31,792 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:31,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2019-12-07 19:22:31,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1444. [2019-12-07 19:22:31,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1444 states. [2019-12-07 19:22:31,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 3973 transitions. [2019-12-07 19:22:31,806 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 3973 transitions. Word has length 58 [2019-12-07 19:22:31,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:31,806 INFO L462 AbstractCegarLoop]: Abstraction has 1444 states and 3973 transitions. [2019-12-07 19:22:31,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:22:31,807 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 3973 transitions. [2019-12-07 19:22:31,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 19:22:31,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:31,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:31,808 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:31,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:31,809 INFO L82 PathProgramCache]: Analyzing trace with hash -515953626, now seen corresponding path program 1 times [2019-12-07 19:22:31,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:31,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487333398] [2019-12-07 19:22:31,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:31,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:31,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:31,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487333398] [2019-12-07 19:22:31,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:31,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 19:22:31,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302761817] [2019-12-07 19:22:31,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 19:22:31,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:31,850 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 19:22:31,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:31,850 INFO L87 Difference]: Start difference. First operand 1444 states and 3973 transitions. Second operand 3 states. [2019-12-07 19:22:31,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:31,882 INFO L93 Difference]: Finished difference Result 1443 states and 3971 transitions. [2019-12-07 19:22:31,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 19:22:31,882 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 19:22:31,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:31,884 INFO L225 Difference]: With dead ends: 1443 [2019-12-07 19:22:31,884 INFO L226 Difference]: Without dead ends: 1443 [2019-12-07 19:22:31,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 19:22:31,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1443 states. [2019-12-07 19:22:31,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1443 to 1162. [2019-12-07 19:22:31,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1162 states. [2019-12-07 19:22:31,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1162 states to 1162 states and 3197 transitions. [2019-12-07 19:22:31,896 INFO L78 Accepts]: Start accepts. Automaton has 1162 states and 3197 transitions. Word has length 59 [2019-12-07 19:22:31,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:31,897 INFO L462 AbstractCegarLoop]: Abstraction has 1162 states and 3197 transitions. [2019-12-07 19:22:31,897 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 19:22:31,897 INFO L276 IsEmpty]: Start isEmpty. Operand 1162 states and 3197 transitions. [2019-12-07 19:22:31,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:22:31,898 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:31,898 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:31,898 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:31,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:31,899 INFO L82 PathProgramCache]: Analyzing trace with hash 1664209591, now seen corresponding path program 1 times [2019-12-07 19:22:31,899 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:31,899 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1971917252] [2019-12-07 19:22:31,899 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:31,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:32,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:32,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1971917252] [2019-12-07 19:22:32,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:32,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 19:22:32,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157127345] [2019-12-07 19:22:32,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 19:22:32,089 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:32,089 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 19:22:32,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-07 19:22:32,090 INFO L87 Difference]: Start difference. First operand 1162 states and 3197 transitions. Second operand 12 states. [2019-12-07 19:22:32,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:32,520 INFO L93 Difference]: Finished difference Result 2699 states and 6766 transitions. [2019-12-07 19:22:32,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 19:22:32,520 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2019-12-07 19:22:32,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:32,522 INFO L225 Difference]: With dead ends: 2699 [2019-12-07 19:22:32,522 INFO L226 Difference]: Without dead ends: 1670 [2019-12-07 19:22:32,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=427, Unknown=0, NotChecked=0, Total=600 [2019-12-07 19:22:32,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1670 states. [2019-12-07 19:22:32,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1670 to 1022. [2019-12-07 19:22:32,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1022 states. [2019-12-07 19:22:32,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 2726 transitions. [2019-12-07 19:22:32,534 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 2726 transitions. Word has length 60 [2019-12-07 19:22:32,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:32,535 INFO L462 AbstractCegarLoop]: Abstraction has 1022 states and 2726 transitions. [2019-12-07 19:22:32,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 19:22:32,535 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 2726 transitions. [2019-12-07 19:22:32,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:22:32,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:32,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:32,536 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:32,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:32,536 INFO L82 PathProgramCache]: Analyzing trace with hash -92263015, now seen corresponding path program 2 times [2019-12-07 19:22:32,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:32,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1157281203] [2019-12-07 19:22:32,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:32,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:32,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:32,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1157281203] [2019-12-07 19:22:32,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:32,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:22:32,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339615943] [2019-12-07 19:22:32,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:22:32,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:32,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:22:32,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:32,610 INFO L87 Difference]: Start difference. First operand 1022 states and 2726 transitions. Second operand 6 states. [2019-12-07 19:22:32,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:32,664 INFO L93 Difference]: Finished difference Result 1761 states and 4311 transitions. [2019-12-07 19:22:32,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:22:32,665 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 19:22:32,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:32,666 INFO L225 Difference]: With dead ends: 1761 [2019-12-07 19:22:32,666 INFO L226 Difference]: Without dead ends: 965 [2019-12-07 19:22:32,666 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:22:32,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 965 states. [2019-12-07 19:22:32,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 965 to 750. [2019-12-07 19:22:32,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 750 states. [2019-12-07 19:22:32,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 750 states and 1748 transitions. [2019-12-07 19:22:32,673 INFO L78 Accepts]: Start accepts. Automaton has 750 states and 1748 transitions. Word has length 60 [2019-12-07 19:22:32,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:32,674 INFO L462 AbstractCegarLoop]: Abstraction has 750 states and 1748 transitions. [2019-12-07 19:22:32,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:22:32,674 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 1748 transitions. [2019-12-07 19:22:32,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:22:32,675 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:32,675 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:32,675 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:32,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:32,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1752143333, now seen corresponding path program 3 times [2019-12-07 19:22:32,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:32,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482282917] [2019-12-07 19:22:32,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:32,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 19:22:32,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 19:22:32,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482282917] [2019-12-07 19:22:32,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 19:22:32,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 19:22:32,746 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [615197762] [2019-12-07 19:22:32,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 19:22:32,746 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 19:22:32,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 19:22:32,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 19:22:32,747 INFO L87 Difference]: Start difference. First operand 750 states and 1748 transitions. Second operand 6 states. [2019-12-07 19:22:32,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 19:22:32,801 INFO L93 Difference]: Finished difference Result 1155 states and 2686 transitions. [2019-12-07 19:22:32,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 19:22:32,802 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 19:22:32,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 19:22:32,802 INFO L225 Difference]: With dead ends: 1155 [2019-12-07 19:22:32,802 INFO L226 Difference]: Without dead ends: 245 [2019-12-07 19:22:32,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 19:22:32,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2019-12-07 19:22:32,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 213. [2019-12-07 19:22:32,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2019-12-07 19:22:32,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 368 transitions. [2019-12-07 19:22:32,804 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 368 transitions. Word has length 60 [2019-12-07 19:22:32,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 19:22:32,805 INFO L462 AbstractCegarLoop]: Abstraction has 213 states and 368 transitions. [2019-12-07 19:22:32,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 19:22:32,805 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 368 transitions. [2019-12-07 19:22:32,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 19:22:32,805 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 19:22:32,805 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 19:22:32,806 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 19:22:32,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 19:22:32,806 INFO L82 PathProgramCache]: Analyzing trace with hash -524819563, now seen corresponding path program 4 times [2019-12-07 19:22:32,806 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 19:22:32,806 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [657727009] [2019-12-07 19:22:32,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 19:22:32,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:22:32,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 19:22:32,879 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 19:22:32,879 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 19:22:32,881 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~weak$$choice2~0_146 0) (= v_~z$w_buff0_used~0_885 0) (= v_~z$mem_tmp~0_22 0) (= v_~z$r_buff1_thd0~0_298 0) (= 0 v_~z$r_buff1_thd2~0_83) (= 0 v_~z$r_buff1_thd4~0_140) (= 0 v_~z$r_buff1_thd1~0_83) (= 0 v_~z$flush_delayed~0_36) (= v_~z$r_buff0_thd3~0_92 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1525~0.base_24| 1)) (= v_~z$read_delayed_var~0.offset_7 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1525~0.base_24|) 0) (= 0 |v_ULTIMATE.start_main_~#t1525~0.offset_18|) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p3_EAX~0_100 0) (= v_~z$w_buff0~0_503 0) (= v_~z$w_buff1_used~0_515 0) (= v_~a~0_48 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1525~0.base_24|) (= v_~x~0_57 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z~0_155 0) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~__unbuffered_cnt~0_141 0) (= 0 v_~z$r_buff1_thd3~0_146) (= v_~z$w_buff1~0_306 0) (= v_~z$r_buff0_thd0~0_394 0) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff0_thd2~0_32 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1525~0.base_24| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1525~0.base_24|) |v_ULTIMATE.start_main_~#t1525~0.offset_18| 0)) |v_#memory_int_25|) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd4~0_161) (= v_~y~0_76 0) (= v_~z$r_buff0_thd1~0_32 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1525~0.base_24| 4)) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_59|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_83, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_41|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_32|, ULTIMATE.start_main_~#t1527~0.offset=|v_ULTIMATE.start_main_~#t1527~0.offset_16|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_35|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ~a~0=v_~a~0_48, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_394, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_161, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_100, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_22, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_48|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_114|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_515, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_191|, ~z$flush_delayed~0=v_~z$flush_delayed~0_36, ULTIMATE.start_main_~#t1525~0.offset=|v_ULTIMATE.start_main_~#t1525~0.offset_18|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_35|, ULTIMATE.start_main_~#t1526~0.base=|v_ULTIMATE.start_main_~#t1526~0.base_22|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_44|, ULTIMATE.start_main_~#t1525~0.base=|v_ULTIMATE.start_main_~#t1525~0.base_24|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_38|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_92, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141, ~x~0=v_~x~0_57, ULTIMATE.start_main_~#t1526~0.offset=|v_ULTIMATE.start_main_~#t1526~0.offset_17|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_140, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_40|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~z$w_buff1~0=v_~z$w_buff1~0_306, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_298, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_25|, ULTIMATE.start_main_~#t1527~0.base=|v_ULTIMATE.start_main_~#t1527~0.base_20|, ULTIMATE.start_main_~#t1528~0.offset=|v_ULTIMATE.start_main_~#t1528~0.offset_17|, ~y~0=v_~y~0_76, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_32, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_885, ~z$w_buff0~0=v_~z$w_buff0~0_503, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_39|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_25|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_146, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_122|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_44|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_36|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ULTIMATE.start_main_~#t1528~0.base=|v_ULTIMATE.start_main_~#t1528~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_23|, ~z~0=v_~z~0_155, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1527~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1525~0.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1526~0.base, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1525~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1526~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ULTIMATE.start_main_~#t1527~0.base, ULTIMATE.start_main_~#t1528~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1528~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:22:32,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L821-1-->L823: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1526~0.offset_9|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1526~0.base_10| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1526~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1526~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1526~0.base_10|) |v_ULTIMATE.start_main_~#t1526~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1526~0.base_10| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1526~0.base_10|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1526~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1526~0.base=|v_ULTIMATE.start_main_~#t1526~0.base_10|, ULTIMATE.start_main_~#t1526~0.offset=|v_ULTIMATE.start_main_~#t1526~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1526~0.base, ULTIMATE.start_main_~#t1526~0.offset] because there is no mapped edge [2019-12-07 19:22:32,882 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L823-1-->L825: Formula: (and (= |v_#valid_45| (store |v_#valid_46| |v_ULTIMATE.start_main_~#t1527~0.base_12| 1)) (= (select |v_#valid_46| |v_ULTIMATE.start_main_~#t1527~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t1527~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1527~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1527~0.offset_10|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1527~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1527~0.base_12|) |v_ULTIMATE.start_main_~#t1527~0.offset_10| 2)) |v_#memory_int_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1527~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1527~0.offset=|v_ULTIMATE.start_main_~#t1527~0.offset_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ULTIMATE.start_main_~#t1527~0.base=|v_ULTIMATE.start_main_~#t1527~0.base_12|, #length=|v_#length_21|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1527~0.offset, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1527~0.base, #length] because there is no mapped edge [2019-12-07 19:22:32,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L825-1-->L827: Formula: (and (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1528~0.base_11| 4) |v_#length_19|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1528~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1528~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1528~0.offset_10|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1528~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1528~0.base_11|) |v_ULTIMATE.start_main_~#t1528~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1528~0.base_11|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1528~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t1528~0.base=|v_ULTIMATE.start_main_~#t1528~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ULTIMATE.start_main_~#t1528~0.offset=|v_ULTIMATE.start_main_~#t1528~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1528~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1528~0.offset] because there is no mapped edge [2019-12-07 19:22:32,883 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P3ENTRY-->L4-3: Formula: (and (not (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 0)) (= v_P3Thread1of1ForFork2_~arg.base_9 |v_P3Thread1of1ForFork2_#in~arg.base_11|) (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= (ite (not (and (not (= (mod v_~z$w_buff0_used~0_218 256) 0)) (not (= (mod v_~z$w_buff1_used~0_99 256) 0)))) 1 0) |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= |v_P3Thread1of1ForFork2_#in~arg.offset_11| v_P3Thread1of1ForFork2_~arg.offset_9) (= v_~z$w_buff0_used~0_218 1) (= v_~z$w_buff0~0_48 v_~z$w_buff1~0_32) (= 2 v_~z$w_buff0~0_47) (= v_~z$w_buff0_used~0_219 v_~z$w_buff1_used~0_99)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_219, ~z$w_buff0~0=v_~z$w_buff0~0_48, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} OutVars{P3Thread1of1ForFork2___VERIFIER_assert_~expression=v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11, P3Thread1of1ForFork2_~arg.offset=v_P3Thread1of1ForFork2_~arg.offset_9, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_218, ~z$w_buff0~0=v_~z$w_buff0~0_47, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_99, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, ~z$w_buff1~0=v_~z$w_buff1~0_32, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|, P3Thread1of1ForFork2_~arg.base=v_P3Thread1of1ForFork2_~arg.base_9, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} AuxVars[] AssignedVars[P3Thread1of1ForFork2___VERIFIER_assert_~expression, P3Thread1of1ForFork2_~arg.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression, P3Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 19:22:32,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_44 1) (= v_~__unbuffered_cnt~0_102 (+ v_~__unbuffered_cnt~0_103 1)) (= v_P0Thread1of1ForFork3_~arg.base_17 |v_P0Thread1of1ForFork3_#in~arg.base_19|) (= v_~a~0_40 1) (= |v_P0Thread1of1ForFork3_#res.offset_9| 0) (= |v_P0Thread1of1ForFork3_#in~arg.offset_19| v_P0Thread1of1ForFork3_~arg.offset_17) (= 0 |v_P0Thread1of1ForFork3_#res.base_9|)) InVars {P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_103, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|} OutVars{~a~0=v_~a~0_40, P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, P0Thread1of1ForFork3_~arg.base=v_P0Thread1of1ForFork3_~arg.base_17, P0Thread1of1ForFork3_#res.base=|v_P0Thread1of1ForFork3_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork3_#res.offset=|v_P0Thread1of1ForFork3_#res.offset_9|, P0Thread1of1ForFork3_~arg.offset=v_P0Thread1of1ForFork3_~arg.offset_17, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|, ~x~0=v_~x~0_44} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork3_~arg.base, P0Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork3_#res.offset, P0Thread1of1ForFork3_~arg.offset, ~x~0] because there is no mapped edge [2019-12-07 19:22:32,884 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x~0_39 2) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_~y~0_50 1) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= |v_P1Thread1of1ForFork0_#in~arg.base_10| v_P1Thread1of1ForFork0_~arg.base_8) (= |v_P1Thread1of1ForFork0_#in~arg.offset_10| v_P1Thread1of1ForFork0_~arg.offset_8)) InVars {P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_8, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_8, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~y~0=v_~y~0_50, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, ~y~0, P1Thread1of1ForFork0_#res.base, ~x~0] because there is no mapped edge [2019-12-07 19:22:32,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In2056219015 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In2056219015 256))) (.cse2 (= |P2Thread1of1ForFork1_#t~ite3_Out2056219015| |P2Thread1of1ForFork1_#t~ite4_Out2056219015|))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In2056219015 |P2Thread1of1ForFork1_#t~ite3_Out2056219015|) .cse2) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite3_Out2056219015| ~z~0_In2056219015) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2056219015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2056219015, ~z$w_buff1~0=~z$w_buff1~0_In2056219015, ~z~0=~z~0_In2056219015} OutVars{P2Thread1of1ForFork1_#t~ite4=|P2Thread1of1ForFork1_#t~ite4_Out2056219015|, P2Thread1of1ForFork1_#t~ite3=|P2Thread1of1ForFork1_#t~ite3_Out2056219015|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2056219015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2056219015, ~z$w_buff1~0=~z$w_buff1~0_In2056219015, ~z~0=~z~0_In2056219015} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite4, P2Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-12-07 19:22:32,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1412388756 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1412388756 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite5_Out-1412388756| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1412388756 |P2Thread1of1ForFork1_#t~ite5_Out-1412388756|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} OutVars{P2Thread1of1ForFork1_#t~ite5=|P2Thread1of1ForFork1_#t~ite5_Out-1412388756|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:22:32,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1680523031 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1680523031 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1680523031 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1680523031 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1680523031 |P2Thread1of1ForFork1_#t~ite6_Out1680523031|)) (and (= 0 |P2Thread1of1ForFork1_#t~ite6_Out1680523031|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1680523031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1680523031, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1680523031} OutVars{P2Thread1of1ForFork1_#t~ite6=|P2Thread1of1ForFork1_#t~ite6_Out1680523031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1680523031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1680523031, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1680523031} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:22:32,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-795441055 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-795441055 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite7_Out-795441055|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite7_Out-795441055| ~z$r_buff0_thd3~0_In-795441055)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-795441055, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-795441055} OutVars{P2Thread1of1ForFork1_#t~ite7=|P2Thread1of1ForFork1_#t~ite7_Out-795441055|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-795441055, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-795441055} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 19:22:32,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In907207410 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In907207410 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In907207410 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In907207410 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite8_Out907207410| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite8_Out907207410| ~z$r_buff1_thd3~0_In907207410)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In907207410, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In907207410, ~z$w_buff1_used~0=~z$w_buff1_used~0_In907207410, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In907207410} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In907207410, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In907207410, ~z$w_buff1_used~0=~z$w_buff1_used~0_In907207410, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In907207410, P2Thread1of1ForFork1_#t~ite8=|P2Thread1of1ForFork1_#t~ite8_Out907207410|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:22:32,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L772-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork1_#t~ite8_44|) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_44|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_43|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset, P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:22:32,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1092312999 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1092312999 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork2_#t~ite11_Out1092312999|)) (and (= |P3Thread1of1ForFork2_#t~ite11_Out1092312999| ~z$w_buff0_used~0_In1092312999) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1092312999, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1092312999} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1092312999, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1092312999, P3Thread1of1ForFork2_#t~ite11=|P3Thread1of1ForFork2_#t~ite11_Out1092312999|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:22:32,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L800-->L800-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd4~0_In-211152810 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-211152810 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-211152810 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-211152810 256)))) (or (and (= 0 |P3Thread1of1ForFork2_#t~ite12_Out-211152810|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-211152810 |P3Thread1of1ForFork2_#t~ite12_Out-211152810|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-211152810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-211152810, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-211152810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211152810} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-211152810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-211152810, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-211152810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211152810, P3Thread1of1ForFork2_#t~ite12=|P3Thread1of1ForFork2_#t~ite12_Out-211152810|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:22:32,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L801-->L802: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In2133496666 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2133496666 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out2133496666 ~z$r_buff0_thd4~0_In2133496666))) (or (and (= ~z$r_buff0_thd4~0_Out2133496666 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2133496666, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2133496666} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2133496666, P3Thread1of1ForFork2_#t~ite13=|P3Thread1of1ForFork2_#t~ite13_Out2133496666|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2133496666} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite13, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 19:22:32,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1803269182 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1803269182 256))) (.cse3 (= (mod ~z$r_buff1_thd4~0_In1803269182 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1803269182 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork2_#t~ite14_Out1803269182|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd4~0_In1803269182 |P3Thread1of1ForFork2_#t~ite14_Out1803269182|) (or .cse3 .cse2)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1803269182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1803269182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1803269182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1803269182} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1803269182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1803269182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1803269182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1803269182, P3Thread1of1ForFork2_#t~ite14=|P3Thread1of1ForFork2_#t~ite14_Out1803269182|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:22:32,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L802-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork2_#t~ite14_54| v_~z$r_buff1_thd4~0_130) (= 0 |v_P3Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P3Thread1of1ForFork2_#res.offset_3|)) InVars {P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{P3Thread1of1ForFork2_#res.base=|v_P3Thread1of1ForFork2_#res.base_3|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_130, P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_53|, P3Thread1of1ForFork2_#res.offset=|v_P3Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#res.base, ~z$r_buff1_thd4~0, P3Thread1of1ForFork2_#t~ite14, P3Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:22:32,889 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_21) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 19:22:32,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L833-2-->L833-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1982289347 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1982289347 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out-1982289347| ~z$w_buff1~0_In-1982289347) (not .cse0) (not .cse1)) (and (= ~z~0_In-1982289347 |ULTIMATE.start_main_#t~ite19_Out-1982289347|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$w_buff1~0=~z$w_buff1~0_In-1982289347, ~z~0=~z~0_In-1982289347} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1982289347|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$w_buff1~0=~z$w_buff1~0_In-1982289347, ~z~0=~z~0_In-1982289347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 19:22:32,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L833-4-->L834: Formula: (= v_~z~0_31 |v_ULTIMATE.start_main_#t~ite19_8|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_7|, ~z~0=v_~z~0_31, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:22:32,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In460404582 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In460404582 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out460404582|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out460404582| ~z$w_buff0_used~0_In460404582)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In460404582, ~z$w_buff0_used~0=~z$w_buff0_used~0_In460404582} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In460404582, ~z$w_buff0_used~0=~z$w_buff0_used~0_In460404582, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out460404582|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:22:32,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L835-->L835-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1794859058 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1794859058 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1794859058 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1794859058 256) 0))) (or (and (= ~z$w_buff1_used~0_In1794859058 |ULTIMATE.start_main_#t~ite22_Out1794859058|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out1794859058|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1794859058, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1794859058, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1794859058|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:22:32,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2145842240 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2145842240 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out2145842240|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In2145842240 |ULTIMATE.start_main_#t~ite23_Out2145842240|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2145842240, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2145842240} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2145842240, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2145842240, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2145842240|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:22:32,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L837-->L837-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1088363902 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1088363902 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1088363902 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-1088363902 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-1088363902| ~z$r_buff1_thd0~0_In-1088363902) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite24_Out-1088363902| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1088363902, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1088363902, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1088363902, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1088363902} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1088363902, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1088363902, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1088363902, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1088363902|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1088363902} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 19:22:32,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L849-->L850: Formula: (and (= v_~z$r_buff0_thd0~0_119 v_~z$r_buff0_thd0~0_120) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_119, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:22:32,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In847495186 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In847495186 |ULTIMATE.start_main_#t~ite46_Out847495186|) (= |ULTIMATE.start_main_#t~ite45_In847495186| |ULTIMATE.start_main_#t~ite45_Out847495186|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out847495186| |ULTIMATE.start_main_#t~ite45_Out847495186|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In847495186 256) 0))) (or (= (mod ~z$w_buff0_used~0_In847495186 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In847495186 256)) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In847495186 256) 0) .cse1))) (= ~z$r_buff1_thd0~0_In847495186 |ULTIMATE.start_main_#t~ite45_Out847495186|) .cse0))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In847495186, ~z$w_buff0_used~0=~z$w_buff0_used~0_In847495186, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In847495186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In847495186, ~weak$$choice2~0=~weak$$choice2~0_In847495186, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In847495186|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In847495186, ~z$w_buff0_used~0=~z$w_buff0_used~0_In847495186, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In847495186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In847495186, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out847495186|, ~weak$$choice2~0=~weak$$choice2~0_In847495186, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out847495186|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:22:32,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L852-->L855-1: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_120) (= 0 v_~z$flush_delayed~0_24) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= 0 (mod v_~z$flush_delayed~0_25 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_25} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:22:32,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L855-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:22:32,953 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 07:22:32 BasicIcfg [2019-12-07 19:22:32,953 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 19:22:32,953 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 19:22:32,953 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 19:22:32,953 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 19:22:32,954 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 07:22:16" (3/4) ... [2019-12-07 19:22:32,955 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 19:22:32,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] ULTIMATE.startENTRY-->L821: Formula: (let ((.cse0 (store |v_#valid_75| 0 0))) (and (= v_~weak$$choice2~0_146 0) (= v_~z$w_buff0_used~0_885 0) (= v_~z$mem_tmp~0_22 0) (= v_~z$r_buff1_thd0~0_298 0) (= 0 v_~z$r_buff1_thd2~0_83) (= 0 v_~z$r_buff1_thd4~0_140) (= 0 v_~z$r_buff1_thd1~0_83) (= 0 v_~z$flush_delayed~0_36) (= v_~z$r_buff0_thd3~0_92 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t1525~0.base_24| 1)) (= v_~z$read_delayed_var~0.offset_7 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1525~0.base_24|) 0) (= 0 |v_ULTIMATE.start_main_~#t1525~0.offset_18|) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p3_EAX~0_100 0) (= v_~z$w_buff0~0_503 0) (= v_~z$w_buff1_used~0_515 0) (= v_~a~0_48 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t1525~0.base_24|) (= v_~x~0_57 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= v_~z~0_155 0) (= v_~main$tmp_guard1~0_32 0) (= 0 v_~weak$$choice0~0_16) (= v_~__unbuffered_cnt~0_141 0) (= 0 v_~z$r_buff1_thd3~0_146) (= v_~z$w_buff1~0_306 0) (= v_~z$r_buff0_thd0~0_394 0) (= |v_#NULL.offset_5| 0) (= v_~z$r_buff0_thd2~0_32 0) (= (store |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1525~0.base_24| (store (select |v_#memory_int_26| |v_ULTIMATE.start_main_~#t1525~0.base_24|) |v_ULTIMATE.start_main_~#t1525~0.offset_18| 0)) |v_#memory_int_25|) (= v_~main$tmp_guard0~0_22 0) (= 0 v_~z$r_buff0_thd4~0_161) (= v_~y~0_76 0) (= v_~z$r_buff0_thd1~0_32 0) (= |v_#length_29| (store |v_#length_30| |v_ULTIMATE.start_main_~#t1525~0.base_24| 4)) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_26|, #length=|v_#length_30|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_59|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_83, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_41|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_32|, ULTIMATE.start_main_~#t1527~0.offset=|v_ULTIMATE.start_main_~#t1527~0.offset_16|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_35|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_45|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_60|, ~a~0=v_~a~0_48, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_394, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_161, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_100, #length=|v_#length_29|, ~z$mem_tmp~0=v_~z$mem_tmp~0_22, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_48|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_114|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_515, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_191|, ~z$flush_delayed~0=v_~z$flush_delayed~0_36, ULTIMATE.start_main_~#t1525~0.offset=|v_ULTIMATE.start_main_~#t1525~0.offset_18|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_35|, ULTIMATE.start_main_~#t1526~0.base=|v_ULTIMATE.start_main_~#t1526~0.base_22|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_44|, ULTIMATE.start_main_~#t1525~0.base=|v_ULTIMATE.start_main_~#t1525~0.base_24|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_38|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_83, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_92, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_141, ~x~0=v_~x~0_57, ULTIMATE.start_main_~#t1526~0.offset=|v_ULTIMATE.start_main_~#t1526~0.offset_17|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_140, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_40|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~z$w_buff1~0=v_~z$w_buff1~0_306, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_31|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_29|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_44|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_298, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_25|, ULTIMATE.start_main_~#t1527~0.base=|v_ULTIMATE.start_main_~#t1527~0.base_20|, ULTIMATE.start_main_~#t1528~0.offset=|v_ULTIMATE.start_main_~#t1528~0.offset_17|, ~y~0=v_~y~0_76, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_32, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_885, ~z$w_buff0~0=v_~z$w_buff0~0_503, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_39|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_25|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_146, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_122|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_44|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_22, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_36|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_35|, ULTIMATE.start_main_~#t1528~0.base=|v_ULTIMATE.start_main_~#t1528~0.base_21|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_31|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_25|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_9|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_23|, ~z~0=v_~z~0_155, ~weak$$choice2~0=v_~weak$$choice2~0_146, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_32} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1527~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_~#t1525~0.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1526~0.base, ULTIMATE.start_main_#t~ite33, ULTIMATE.start_main_~#t1525~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t1526~0.offset, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ULTIMATE.start_main_~#t1527~0.base, ULTIMATE.start_main_~#t1528~0.offset, ~y~0, ~z$r_buff0_thd2~0, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_~#t1528~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 19:22:32,956 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L821-1-->L823: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t1526~0.offset_9|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1526~0.base_10| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1526~0.base_10|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1526~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1526~0.base_10|) |v_ULTIMATE.start_main_~#t1526~0.offset_9| 1)) |v_#memory_int_13|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1526~0.base_10| 1)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t1526~0.base_10|) (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1526~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1526~0.base=|v_ULTIMATE.start_main_~#t1526~0.base_10|, ULTIMATE.start_main_~#t1526~0.offset=|v_ULTIMATE.start_main_~#t1526~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t1526~0.base, ULTIMATE.start_main_~#t1526~0.offset] because there is no mapped edge [2019-12-07 19:22:32,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L823-1-->L825: Formula: (and (= |v_#valid_45| (store |v_#valid_46| |v_ULTIMATE.start_main_~#t1527~0.base_12| 1)) (= (select |v_#valid_46| |v_ULTIMATE.start_main_~#t1527~0.base_12|) 0) (not (= |v_ULTIMATE.start_main_~#t1527~0.base_12| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1527~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t1527~0.offset_10|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1527~0.base_12| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1527~0.base_12|) |v_ULTIMATE.start_main_~#t1527~0.offset_10| 2)) |v_#memory_int_17|) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1527~0.base_12| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_~#t1527~0.offset=|v_ULTIMATE.start_main_~#t1527~0.offset_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_5|, ULTIMATE.start_main_~#t1527~0.base=|v_ULTIMATE.start_main_~#t1527~0.base_12|, #length=|v_#length_21|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t1527~0.offset, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1527~0.base, #length] because there is no mapped edge [2019-12-07 19:22:32,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L825-1-->L827: Formula: (and (= (store |v_#length_20| |v_ULTIMATE.start_main_~#t1528~0.base_11| 4) |v_#length_19|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t1528~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1528~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1528~0.offset_10|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1528~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1528~0.base_11|) |v_ULTIMATE.start_main_~#t1528~0.offset_10| 3)) |v_#memory_int_15|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t1528~0.base_11|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1528~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_~#t1528~0.base=|v_ULTIMATE.start_main_~#t1528~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_19|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ULTIMATE.start_main_~#t1528~0.offset=|v_ULTIMATE.start_main_~#t1528~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1528~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1528~0.offset] because there is no mapped edge [2019-12-07 19:22:32,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P3ENTRY-->L4-3: Formula: (and (not (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 0)) (= v_P3Thread1of1ForFork2_~arg.base_9 |v_P3Thread1of1ForFork2_#in~arg.base_11|) (= v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11 |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= (ite (not (and (not (= (mod v_~z$w_buff0_used~0_218 256) 0)) (not (= (mod v_~z$w_buff1_used~0_99 256) 0)))) 1 0) |v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|) (= |v_P3Thread1of1ForFork2_#in~arg.offset_11| v_P3Thread1of1ForFork2_~arg.offset_9) (= v_~z$w_buff0_used~0_218 1) (= v_~z$w_buff0~0_48 v_~z$w_buff1~0_32) (= 2 v_~z$w_buff0~0_47) (= v_~z$w_buff0_used~0_219 v_~z$w_buff1_used~0_99)) InVars {~z$w_buff0_used~0=v_~z$w_buff0_used~0_219, ~z$w_buff0~0=v_~z$w_buff0~0_48, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} OutVars{P3Thread1of1ForFork2___VERIFIER_assert_~expression=v_P3Thread1of1ForFork2___VERIFIER_assert_~expression_11, P3Thread1of1ForFork2_~arg.offset=v_P3Thread1of1ForFork2_~arg.offset_9, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_218, ~z$w_buff0~0=v_~z$w_buff0~0_47, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_99, P3Thread1of1ForFork2_#in~arg.offset=|v_P3Thread1of1ForFork2_#in~arg.offset_11|, ~z$w_buff1~0=v_~z$w_buff1~0_32, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P3Thread1of1ForFork2___VERIFIER_assert_#in~expression_9|, P3Thread1of1ForFork2_~arg.base=v_P3Thread1of1ForFork2_~arg.base_9, P3Thread1of1ForFork2_#in~arg.base=|v_P3Thread1of1ForFork2_#in~arg.base_11|} AuxVars[] AssignedVars[P3Thread1of1ForFork2___VERIFIER_assert_~expression, P3Thread1of1ForFork2_~arg.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, ~z$w_buff1~0, P3Thread1of1ForFork2___VERIFIER_assert_#in~expression, P3Thread1of1ForFork2_~arg.base] because there is no mapped edge [2019-12-07 19:22:32,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_44 1) (= v_~__unbuffered_cnt~0_102 (+ v_~__unbuffered_cnt~0_103 1)) (= v_P0Thread1of1ForFork3_~arg.base_17 |v_P0Thread1of1ForFork3_#in~arg.base_19|) (= v_~a~0_40 1) (= |v_P0Thread1of1ForFork3_#res.offset_9| 0) (= |v_P0Thread1of1ForFork3_#in~arg.offset_19| v_P0Thread1of1ForFork3_~arg.offset_17) (= 0 |v_P0Thread1of1ForFork3_#res.base_9|)) InVars {P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_103, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|} OutVars{~a~0=v_~a~0_40, P0Thread1of1ForFork3_#in~arg.offset=|v_P0Thread1of1ForFork3_#in~arg.offset_19|, P0Thread1of1ForFork3_~arg.base=v_P0Thread1of1ForFork3_~arg.base_17, P0Thread1of1ForFork3_#res.base=|v_P0Thread1of1ForFork3_#res.base_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, P0Thread1of1ForFork3_#res.offset=|v_P0Thread1of1ForFork3_#res.offset_9|, P0Thread1of1ForFork3_~arg.offset=v_P0Thread1of1ForFork3_~arg.offset_17, P0Thread1of1ForFork3_#in~arg.base=|v_P0Thread1of1ForFork3_#in~arg.base_19|, ~x~0=v_~x~0_44} AuxVars[] AssignedVars[~a~0, P0Thread1of1ForFork3_~arg.base, P0Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork3_#res.offset, P0Thread1of1ForFork3_~arg.offset, ~x~0] because there is no mapped edge [2019-12-07 19:22:32,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x~0_39 2) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= v_~y~0_50 1) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= |v_P1Thread1of1ForFork0_#in~arg.base_10| v_P1Thread1of1ForFork0_~arg.base_8) (= |v_P1Thread1of1ForFork0_#in~arg.offset_10| v_P1Thread1of1ForFork0_~arg.offset_8)) InVars {P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_8, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_8, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_10|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, ~y~0=v_~y~0_50, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, ~y~0, P1Thread1of1ForFork0_#res.base, ~x~0] because there is no mapped edge [2019-12-07 19:22:32,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L768-2-->L768-5: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In2056219015 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In2056219015 256))) (.cse2 (= |P2Thread1of1ForFork1_#t~ite3_Out2056219015| |P2Thread1of1ForFork1_#t~ite4_Out2056219015|))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In2056219015 |P2Thread1of1ForFork1_#t~ite3_Out2056219015|) .cse2) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite3_Out2056219015| ~z~0_In2056219015) .cse2))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2056219015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2056219015, ~z$w_buff1~0=~z$w_buff1~0_In2056219015, ~z~0=~z~0_In2056219015} OutVars{P2Thread1of1ForFork1_#t~ite4=|P2Thread1of1ForFork1_#t~ite4_Out2056219015|, P2Thread1of1ForFork1_#t~ite3=|P2Thread1of1ForFork1_#t~ite3_Out2056219015|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In2056219015, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2056219015, ~z$w_buff1~0=~z$w_buff1~0_In2056219015, ~z~0=~z~0_In2056219015} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite4, P2Thread1of1ForFork1_#t~ite3] because there is no mapped edge [2019-12-07 19:22:32,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L769-->L769-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1412388756 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1412388756 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite5_Out-1412388756| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~z$w_buff0_used~0_In-1412388756 |P2Thread1of1ForFork1_#t~ite5_Out-1412388756|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} OutVars{P2Thread1of1ForFork1_#t~ite5=|P2Thread1of1ForFork1_#t~ite5_Out-1412388756|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 19:22:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L770-->L770-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1680523031 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1680523031 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1680523031 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1680523031 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1680523031 |P2Thread1of1ForFork1_#t~ite6_Out1680523031|)) (and (= 0 |P2Thread1of1ForFork1_#t~ite6_Out1680523031|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1680523031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1680523031, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1680523031} OutVars{P2Thread1of1ForFork1_#t~ite6=|P2Thread1of1ForFork1_#t~ite6_Out1680523031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1680523031, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1680523031, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1680523031} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 19:22:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L771-->L771-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-795441055 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-795441055 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite7_Out-795441055|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite7_Out-795441055| ~z$r_buff0_thd3~0_In-795441055)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-795441055, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-795441055} OutVars{P2Thread1of1ForFork1_#t~ite7=|P2Thread1of1ForFork1_#t~ite7_Out-795441055|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-795441055, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-795441055} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite7] because there is no mapped edge [2019-12-07 19:22:32,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L772-->L772-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In907207410 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd3~0_In907207410 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In907207410 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In907207410 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite8_Out907207410| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite8_Out907207410| ~z$r_buff1_thd3~0_In907207410)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In907207410, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In907207410, ~z$w_buff1_used~0=~z$w_buff1_used~0_In907207410, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In907207410} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In907207410, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In907207410, ~z$w_buff1_used~0=~z$w_buff1_used~0_In907207410, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In907207410, P2Thread1of1ForFork1_#t~ite8=|P2Thread1of1ForFork1_#t~ite8_Out907207410|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:22:32,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L772-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~z$r_buff1_thd3~0_127 |v_P2Thread1of1ForFork1_#t~ite8_44|) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_44|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_127, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|, P2Thread1of1ForFork1_#t~ite8=|v_P2Thread1of1ForFork1_#t~ite8_43|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset, P2Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 19:22:32,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1092312999 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1092312999 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P3Thread1of1ForFork2_#t~ite11_Out1092312999|)) (and (= |P3Thread1of1ForFork2_#t~ite11_Out1092312999| ~z$w_buff0_used~0_In1092312999) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1092312999, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1092312999} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1092312999, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1092312999, P3Thread1of1ForFork2_#t~ite11=|P3Thread1of1ForFork2_#t~ite11_Out1092312999|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 19:22:32,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L800-->L800-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd4~0_In-211152810 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-211152810 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd4~0_In-211152810 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-211152810 256)))) (or (and (= 0 |P3Thread1of1ForFork2_#t~ite12_Out-211152810|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-211152810 |P3Thread1of1ForFork2_#t~ite12_Out-211152810|)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-211152810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-211152810, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-211152810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211152810} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-211152810, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-211152810, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-211152810, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-211152810, P3Thread1of1ForFork2_#t~ite12=|P3Thread1of1ForFork2_#t~ite12_Out-211152810|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L801-->L802: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In2133496666 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2133496666 256))) (.cse2 (= ~z$r_buff0_thd4~0_Out2133496666 ~z$r_buff0_thd4~0_In2133496666))) (or (and (= ~z$r_buff0_thd4~0_Out2133496666 0) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2133496666, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In2133496666} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2133496666, P3Thread1of1ForFork2_#t~ite13=|P3Thread1of1ForFork2_#t~ite13_Out2133496666|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out2133496666} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite13, ~z$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L802-->L802-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd4~0_In1803269182 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1803269182 256))) (.cse3 (= (mod ~z$r_buff1_thd4~0_In1803269182 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1803269182 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork2_#t~ite14_Out1803269182|)) (and (or .cse1 .cse0) (= ~z$r_buff1_thd4~0_In1803269182 |P3Thread1of1ForFork2_#t~ite14_Out1803269182|) (or .cse3 .cse2)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1803269182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1803269182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1803269182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1803269182} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1803269182, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1803269182, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1803269182, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1803269182, P3Thread1of1ForFork2_#t~ite14=|P3Thread1of1ForFork2_#t~ite14_Out1803269182|} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L802-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork2_#t~ite14_54| v_~z$r_buff1_thd4~0_130) (= 0 |v_P3Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_126 (+ v_~__unbuffered_cnt~0_127 1)) (= 0 |v_P3Thread1of1ForFork2_#res.offset_3|)) InVars {P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_127} OutVars{P3Thread1of1ForFork2_#res.base=|v_P3Thread1of1ForFork2_#res.base_3|, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_130, P3Thread1of1ForFork2_#t~ite14=|v_P3Thread1of1ForFork2_#t~ite14_53|, P3Thread1of1ForFork2_#res.offset=|v_P3Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_126} AuxVars[] AssignedVars[P3Thread1of1ForFork2_#res.base, ~z$r_buff1_thd4~0, P3Thread1of1ForFork2_#t~ite14, P3Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [673] [673] L827-1-->L833: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 4 v_~__unbuffered_cnt~0_21) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_21, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_6|} AuxVars[] AssignedVars[~main$tmp_guard0~0, ULTIMATE.start_main_#t~nondet18] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L833-2-->L833-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1982289347 256))) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1982289347 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out-1982289347| ~z$w_buff1~0_In-1982289347) (not .cse0) (not .cse1)) (and (= ~z~0_In-1982289347 |ULTIMATE.start_main_#t~ite19_Out-1982289347|) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$w_buff1~0=~z$w_buff1~0_In-1982289347, ~z~0=~z~0_In-1982289347} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1982289347|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$w_buff1~0=~z$w_buff1~0_In-1982289347, ~z~0=~z~0_In-1982289347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 19:22:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [658] [658] L833-4-->L834: Formula: (= v_~z~0_31 |v_ULTIMATE.start_main_#t~ite19_8|) InVars {ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_8|} OutVars{ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_7|, ~z~0=v_~z~0_31, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ~z~0, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 19:22:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [715] [715] L834-->L834-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In460404582 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In460404582 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out460404582|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out460404582| ~z$w_buff0_used~0_In460404582)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In460404582, ~z$w_buff0_used~0=~z$w_buff0_used~0_In460404582} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In460404582, ~z$w_buff0_used~0=~z$w_buff0_used~0_In460404582, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out460404582|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 19:22:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L835-->L835-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1794859058 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1794859058 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1794859058 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1794859058 256) 0))) (or (and (= ~z$w_buff1_used~0_In1794859058 |ULTIMATE.start_main_#t~ite22_Out1794859058|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out1794859058|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1794859058, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1794859058, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1794859058|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 19:22:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [718] [718] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2145842240 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In2145842240 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite23_Out2145842240|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In2145842240 |ULTIMATE.start_main_#t~ite23_Out2145842240|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2145842240, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2145842240} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2145842240, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2145842240, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out2145842240|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 19:22:32,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L837-->L837-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1088363902 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1088363902 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1088363902 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-1088363902 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-1088363902| ~z$r_buff1_thd0~0_In-1088363902) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite24_Out-1088363902| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1088363902, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1088363902, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1088363902, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1088363902} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1088363902, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1088363902, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1088363902, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1088363902|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1088363902} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-07 19:22:32,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L849-->L850: Formula: (and (= v_~z$r_buff0_thd0~0_119 v_~z$r_buff0_thd0~0_120) (not (= 0 (mod v_~weak$$choice2~0_29 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_120, ~weak$$choice2~0=v_~weak$$choice2~0_29} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_8|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_119, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_9|, ~weak$$choice2~0=v_~weak$$choice2~0_29, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 19:22:32,969 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L850-->L850-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In847495186 256) 0))) (or (and (= ~z$r_buff1_thd0~0_In847495186 |ULTIMATE.start_main_#t~ite46_Out847495186|) (= |ULTIMATE.start_main_#t~ite45_In847495186| |ULTIMATE.start_main_#t~ite45_Out847495186|) (not .cse0)) (and (= |ULTIMATE.start_main_#t~ite46_Out847495186| |ULTIMATE.start_main_#t~ite45_Out847495186|) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In847495186 256) 0))) (or (= (mod ~z$w_buff0_used~0_In847495186 256) 0) (and (= 0 (mod ~z$w_buff1_used~0_In847495186 256)) .cse1) (and (= (mod ~z$r_buff1_thd0~0_In847495186 256) 0) .cse1))) (= ~z$r_buff1_thd0~0_In847495186 |ULTIMATE.start_main_#t~ite45_Out847495186|) .cse0))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In847495186, ~z$w_buff0_used~0=~z$w_buff0_used~0_In847495186, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In847495186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In847495186, ~weak$$choice2~0=~weak$$choice2~0_In847495186, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_In847495186|} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In847495186, ~z$w_buff0_used~0=~z$w_buff0_used~0_In847495186, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In847495186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In847495186, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out847495186|, ~weak$$choice2~0=~weak$$choice2~0_In847495186, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out847495186|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 19:22:32,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L852-->L855-1: Formula: (and (= v_~z$mem_tmp~0_13 v_~z~0_120) (= 0 v_~z$flush_delayed~0_24) (= (mod v_~main$tmp_guard1~0_23 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (not (= 0 (mod v_~z$flush_delayed~0_25 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_13, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_25} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_13, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~z$flush_delayed~0=v_~z$flush_delayed~0_24, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 19:22:32,970 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L855-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 19:22:33,034 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b1f7604d-e706-401d-b2a8-f34b38956788/bin/utaipan/witness.graphml [2019-12-07 19:22:33,034 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 19:22:33,035 INFO L168 Benchmark]: Toolchain (without parser) took 17342.10 ms. Allocated memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: 1.6 GB). Free memory was 936.0 MB in the beginning and 313.1 MB in the end (delta: 622.9 MB). Peak memory consumption was 2.2 GB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,035 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:22:33,036 INFO L168 Benchmark]: CACSL2BoogieTranslator took 379.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 936.0 MB in the beginning and 1.1 GB in the end (delta: -172.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,036 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.54 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 19:22:33,036 INFO L168 Benchmark]: Boogie Preprocessor took 26.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,036 INFO L168 Benchmark]: RCFGBuilder took 414.92 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,037 INFO L168 Benchmark]: TraceAbstraction took 16394.65 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 348.0 MB in the end (delta: 700.8 MB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,037 INFO L168 Benchmark]: Witness Printer took 80.79 ms. Allocated memory is still 2.6 GB. Free memory was 348.0 MB in the beginning and 313.1 MB in the end (delta: 34.9 MB). Peak memory consumption was 34.9 MB. Max. memory is 11.5 GB. [2019-12-07 19:22:33,039 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 379.36 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 936.0 MB in the beginning and 1.1 GB in the end (delta: -172.2 MB). Peak memory consumption was 18.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.54 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.40 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 414.92 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 16394.65 ms. Allocated memory was 1.2 GB in the beginning and 2.6 GB in the end (delta: 1.4 GB). Free memory was 1.0 GB in the beginning and 348.0 MB in the end (delta: 700.8 MB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. * Witness Printer took 80.79 ms. Allocated memory is still 2.6 GB. Free memory was 348.0 MB in the beginning and 313.1 MB in the end (delta: 34.9 MB). Peak memory consumption was 34.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 178 ProgramPointsBefore, 91 ProgramPointsAfterwards, 206 TransitionsBefore, 100 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 34 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 24 ChoiceCompositions, 4617 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 231 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 56276 CheckedPairsTotal, 119 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L821] FCALL, FORK 0 pthread_create(&t1525, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t1526, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t1527, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t1528, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L788] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L789] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L790] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L791] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L792] 4 z$r_buff0_thd4 = (_Bool)1 [L795] 4 __unbuffered_p3_EAX = a VAL [__unbuffered_cnt=0, __unbuffered_p3_EAX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L762] 3 y = 2 [L765] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L768] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L769] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L770] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L771] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L798] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L798] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L799] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L800] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L841] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L842] 0 z$flush_delayed = weak$$choice2 [L843] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L844] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L844] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L845] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L845] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L846] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L846] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L847] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L848] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L848] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L850] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L851] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2 && __unbuffered_p3_EAX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p3_EAX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 16.2s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 3.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2037 SDtfs, 1837 SDslu, 4127 SDs, 0 SdLazy, 1902 SolverSat, 141 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 117 GetRequests, 28 SyntacticMatches, 10 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=51342occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.8s AutomataMinimizationTime, 17 MinimizatonAttempts, 31206 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 782 NumberOfCodeBlocks, 782 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 705 ConstructedInterpolants, 0 QuantifiedInterpolants, 110477 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...