./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d512510f2eabc5c82b8eb84e1b56885b21642e76 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 21:19:24,650 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 21:19:24,651 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 21:19:24,658 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 21:19:24,658 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 21:19:24,659 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 21:19:24,660 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 21:19:24,661 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 21:19:24,662 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 21:19:24,663 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 21:19:24,663 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 21:19:24,664 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 21:19:24,664 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 21:19:24,665 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 21:19:24,666 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 21:19:24,667 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 21:19:24,667 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 21:19:24,668 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 21:19:24,669 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 21:19:24,670 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 21:19:24,671 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 21:19:24,672 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 21:19:24,673 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 21:19:24,673 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 21:19:24,675 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 21:19:24,675 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 21:19:24,675 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 21:19:24,676 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 21:19:24,676 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 21:19:24,676 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 21:19:24,677 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 21:19:24,677 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 21:19:24,677 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 21:19:24,678 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 21:19:24,678 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 21:19:24,679 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 21:19:24,679 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 21:19:24,679 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 21:19:24,679 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 21:19:24,680 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 21:19:24,680 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 21:19:24,681 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 21:19:24,691 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 21:19:24,691 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 21:19:24,692 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 21:19:24,692 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 21:19:24,692 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 21:19:24,693 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 21:19:24,693 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 21:19:24,693 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 21:19:24,693 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 21:19:24,693 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 21:19:24,694 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 21:19:24,694 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 21:19:24,695 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 21:19:24,695 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:19:24,695 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 21:19:24,696 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d512510f2eabc5c82b8eb84e1b56885b21642e76 [2019-12-07 21:19:24,793 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 21:19:24,801 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 21:19:24,803 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 21:19:24,804 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 21:19:24,804 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 21:19:24,805 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/podwr001_rmo.oepc.i [2019-12-07 21:19:24,842 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/data/9d0b838a5/de453692fe87477294e0eca69e94310f/FLAG864cf4d19 [2019-12-07 21:19:25,377 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 21:19:25,378 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/sv-benchmarks/c/pthread-wmm/podwr001_rmo.oepc.i [2019-12-07 21:19:25,389 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/data/9d0b838a5/de453692fe87477294e0eca69e94310f/FLAG864cf4d19 [2019-12-07 21:19:25,834 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/data/9d0b838a5/de453692fe87477294e0eca69e94310f [2019-12-07 21:19:25,837 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 21:19:25,838 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 21:19:25,839 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 21:19:25,839 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 21:19:25,842 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 21:19:25,843 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:19:25" (1/1) ... [2019-12-07 21:19:25,845 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5cef4d7e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:25, skipping insertion in model container [2019-12-07 21:19:25,845 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 09:19:25" (1/1) ... [2019-12-07 21:19:25,852 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 21:19:25,884 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 21:19:26,127 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:19:26,135 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 21:19:26,181 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 21:19:26,229 INFO L208 MainTranslator]: Completed translation [2019-12-07 21:19:26,230 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26 WrapperNode [2019-12-07 21:19:26,230 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 21:19:26,230 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 21:19:26,231 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 21:19:26,231 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 21:19:26,237 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,253 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,275 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 21:19:26,275 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 21:19:26,275 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 21:19:26,275 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 21:19:26,283 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,283 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,287 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,287 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,295 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,299 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,302 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... [2019-12-07 21:19:26,305 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 21:19:26,306 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 21:19:26,306 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 21:19:26,306 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 21:19:26,307 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 21:19:26,350 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 21:19:26,350 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 21:19:26,350 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 21:19:26,351 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 21:19:26,351 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 21:19:26,351 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 21:19:26,351 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 21:19:26,351 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 21:19:26,352 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 21:19:26,717 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 21:19:26,717 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 21:19:26,718 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:26 BoogieIcfgContainer [2019-12-07 21:19:26,718 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 21:19:26,719 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 21:19:26,719 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 21:19:26,720 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 21:19:26,721 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 09:19:25" (1/3) ... [2019-12-07 21:19:26,721 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@116212b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:19:26, skipping insertion in model container [2019-12-07 21:19:26,721 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 09:19:26" (2/3) ... [2019-12-07 21:19:26,721 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@116212b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 09:19:26, skipping insertion in model container [2019-12-07 21:19:26,721 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:26" (3/3) ... [2019-12-07 21:19:26,722 INFO L109 eAbstractionObserver]: Analyzing ICFG podwr001_rmo.oepc.i [2019-12-07 21:19:26,729 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 21:19:26,729 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 21:19:26,734 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 21:19:26,735 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 21:19:26,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,760 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,760 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,760 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,761 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,762 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,763 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,764 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,765 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,766 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,767 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,768 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,769 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,770 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,771 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,772 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,773 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,774 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,775 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,776 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,777 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,778 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,779 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,780 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 21:19:26,791 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 21:19:26,804 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 21:19:26,804 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 21:19:26,804 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 21:19:26,804 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 21:19:26,804 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 21:19:26,804 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 21:19:26,804 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 21:19:26,804 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 21:19:26,815 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 176 places, 213 transitions [2019-12-07 21:19:26,817 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 21:19:26,872 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 21:19:26,872 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:19:26,883 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 21:19:26,898 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 176 places, 213 transitions [2019-12-07 21:19:26,929 INFO L134 PetriNetUnfolder]: 47/210 cut-off events. [2019-12-07 21:19:26,929 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 21:19:26,934 INFO L76 FinitePrefix]: Finished finitePrefix Result has 220 conditions, 210 events. 47/210 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/170 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 21:19:26,950 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 21:19:26,951 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 21:19:29,897 WARN L192 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 91 DAG size of output: 89 [2019-12-07 21:19:30,220 INFO L206 etLargeBlockEncoding]: Checked pairs total: 130045 [2019-12-07 21:19:30,220 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 21:19:30,224 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 21:19:50,668 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 21:19:50,670 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 21:19:50,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 21:19:50,675 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:50,676 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 21:19:50,676 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:50,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:50,681 INFO L82 PathProgramCache]: Analyzing trace with hash 913925, now seen corresponding path program 1 times [2019-12-07 21:19:50,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:50,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146587856] [2019-12-07 21:19:50,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:50,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:50,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:50,829 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1146587856] [2019-12-07 21:19:50,829 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:50,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 21:19:50,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [531178788] [2019-12-07 21:19:50,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:19:50,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:50,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:19:50,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:50,847 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 21:19:51,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:19:51,708 INFO L93 Difference]: Finished difference Result 125570 states and 538788 transitions. [2019-12-07 21:19:51,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:19:51,709 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 21:19:51,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:19:52,214 INFO L225 Difference]: With dead ends: 125570 [2019-12-07 21:19:52,214 INFO L226 Difference]: Without dead ends: 111010 [2019-12-07 21:19:52,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:19:56,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111010 states. [2019-12-07 21:19:59,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111010 to 111010. [2019-12-07 21:19:59,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111010 states. [2019-12-07 21:19:59,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111010 states to 111010 states and 475060 transitions. [2019-12-07 21:19:59,743 INFO L78 Accepts]: Start accepts. Automaton has 111010 states and 475060 transitions. Word has length 3 [2019-12-07 21:19:59,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:19:59,743 INFO L462 AbstractCegarLoop]: Abstraction has 111010 states and 475060 transitions. [2019-12-07 21:19:59,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:19:59,744 INFO L276 IsEmpty]: Start isEmpty. Operand 111010 states and 475060 transitions. [2019-12-07 21:19:59,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 21:19:59,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:19:59,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:19:59,747 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:19:59,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:19:59,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1753094800, now seen corresponding path program 1 times [2019-12-07 21:19:59,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:19:59,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355545011] [2019-12-07 21:19:59,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:19:59,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:19:59,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:19:59,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [355545011] [2019-12-07 21:19:59,811 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:19:59,811 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:19:59,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952478959] [2019-12-07 21:19:59,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:19:59,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:19:59,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:19:59,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:19:59,813 INFO L87 Difference]: Start difference. First operand 111010 states and 475060 transitions. Second operand 4 states. [2019-12-07 21:20:00,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:20:00,867 INFO L93 Difference]: Finished difference Result 172646 states and 710109 transitions. [2019-12-07 21:20:00,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:20:00,868 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 21:20:00,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:20:01,742 INFO L225 Difference]: With dead ends: 172646 [2019-12-07 21:20:01,742 INFO L226 Difference]: Without dead ends: 172548 [2019-12-07 21:20:01,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:20:08,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172548 states. [2019-12-07 21:20:10,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172548 to 158936. [2019-12-07 21:20:10,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158936 states. [2019-12-07 21:20:11,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158936 states to 158936 states and 661803 transitions. [2019-12-07 21:20:11,640 INFO L78 Accepts]: Start accepts. Automaton has 158936 states and 661803 transitions. Word has length 11 [2019-12-07 21:20:11,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:20:11,640 INFO L462 AbstractCegarLoop]: Abstraction has 158936 states and 661803 transitions. [2019-12-07 21:20:11,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:20:11,640 INFO L276 IsEmpty]: Start isEmpty. Operand 158936 states and 661803 transitions. [2019-12-07 21:20:11,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 21:20:11,645 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:20:11,645 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:20:11,645 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:20:11,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:20:11,646 INFO L82 PathProgramCache]: Analyzing trace with hash 216434073, now seen corresponding path program 1 times [2019-12-07 21:20:11,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:20:11,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304592622] [2019-12-07 21:20:11,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:20:11,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:20:11,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:20:11,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304592622] [2019-12-07 21:20:11,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:20:11,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:20:11,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002237989] [2019-12-07 21:20:11,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:20:11,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:20:11,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:20:11,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:20:11,713 INFO L87 Difference]: Start difference. First operand 158936 states and 661803 transitions. Second operand 4 states. [2019-12-07 21:20:12,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:20:12,976 INFO L93 Difference]: Finished difference Result 228902 states and 931210 transitions. [2019-12-07 21:20:12,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:20:12,977 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 21:20:12,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:20:13,591 INFO L225 Difference]: With dead ends: 228902 [2019-12-07 21:20:13,591 INFO L226 Difference]: Without dead ends: 228790 [2019-12-07 21:20:13,592 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:20:19,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228790 states. [2019-12-07 21:20:24,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228790 to 192327. [2019-12-07 21:20:24,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192327 states. [2019-12-07 21:20:25,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192327 states to 192327 states and 796272 transitions. [2019-12-07 21:20:25,388 INFO L78 Accepts]: Start accepts. Automaton has 192327 states and 796272 transitions. Word has length 13 [2019-12-07 21:20:25,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:20:25,389 INFO L462 AbstractCegarLoop]: Abstraction has 192327 states and 796272 transitions. [2019-12-07 21:20:25,389 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:20:25,389 INFO L276 IsEmpty]: Start isEmpty. Operand 192327 states and 796272 transitions. [2019-12-07 21:20:25,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 21:20:25,397 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:20:25,397 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:20:25,397 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:20:25,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:20:25,398 INFO L82 PathProgramCache]: Analyzing trace with hash -1948590504, now seen corresponding path program 1 times [2019-12-07 21:20:25,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:20:25,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027140218] [2019-12-07 21:20:25,398 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:20:25,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:20:25,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:20:25,433 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027140218] [2019-12-07 21:20:25,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:20:25,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:20:25,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453887807] [2019-12-07 21:20:25,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:20:25,433 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:20:25,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:20:25,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:20:25,434 INFO L87 Difference]: Start difference. First operand 192327 states and 796272 transitions. Second operand 3 states. [2019-12-07 21:20:27,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:20:27,204 INFO L93 Difference]: Finished difference Result 280788 states and 1158875 transitions. [2019-12-07 21:20:27,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:20:27,205 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 21:20:27,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:20:27,925 INFO L225 Difference]: With dead ends: 280788 [2019-12-07 21:20:27,925 INFO L226 Difference]: Without dead ends: 280788 [2019-12-07 21:20:27,926 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:20:34,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280788 states. [2019-12-07 21:20:37,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280788 to 222888. [2019-12-07 21:20:37,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222888 states. [2019-12-07 21:20:38,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222888 states to 222888 states and 926633 transitions. [2019-12-07 21:20:38,872 INFO L78 Accepts]: Start accepts. Automaton has 222888 states and 926633 transitions. Word has length 16 [2019-12-07 21:20:38,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:20:38,872 INFO L462 AbstractCegarLoop]: Abstraction has 222888 states and 926633 transitions. [2019-12-07 21:20:38,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:20:38,872 INFO L276 IsEmpty]: Start isEmpty. Operand 222888 states and 926633 transitions. [2019-12-07 21:20:38,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 21:20:38,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:20:38,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:20:38,880 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:20:38,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:20:38,880 INFO L82 PathProgramCache]: Analyzing trace with hash -1821591471, now seen corresponding path program 1 times [2019-12-07 21:20:38,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:20:38,880 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783043001] [2019-12-07 21:20:38,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:20:38,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:20:38,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:20:38,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783043001] [2019-12-07 21:20:38,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:20:38,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:20:38,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203390617] [2019-12-07 21:20:38,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:20:38,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:20:38,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:20:38,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:20:38,925 INFO L87 Difference]: Start difference. First operand 222888 states and 926633 transitions. Second operand 5 states. [2019-12-07 21:20:40,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:20:40,581 INFO L93 Difference]: Finished difference Result 298473 states and 1226263 transitions. [2019-12-07 21:20:40,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 21:20:40,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 21:20:40,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:20:41,378 INFO L225 Difference]: With dead ends: 298473 [2019-12-07 21:20:41,378 INFO L226 Difference]: Without dead ends: 298473 [2019-12-07 21:20:41,378 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:20:50,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298473 states. [2019-12-07 21:20:54,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298473 to 237826. [2019-12-07 21:20:54,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237826 states. [2019-12-07 21:20:55,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237826 states to 237826 states and 988542 transitions. [2019-12-07 21:20:55,634 INFO L78 Accepts]: Start accepts. Automaton has 237826 states and 988542 transitions. Word has length 16 [2019-12-07 21:20:55,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:20:55,635 INFO L462 AbstractCegarLoop]: Abstraction has 237826 states and 988542 transitions. [2019-12-07 21:20:55,635 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:20:55,635 INFO L276 IsEmpty]: Start isEmpty. Operand 237826 states and 988542 transitions. [2019-12-07 21:20:55,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 21:20:55,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:20:55,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:20:55,648 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:20:55,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:20:55,648 INFO L82 PathProgramCache]: Analyzing trace with hash -504931817, now seen corresponding path program 1 times [2019-12-07 21:20:55,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:20:55,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062922600] [2019-12-07 21:20:55,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:20:55,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:20:55,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:20:55,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062922600] [2019-12-07 21:20:55,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:20:55,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:20:55,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426755488] [2019-12-07 21:20:55,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:20:55,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:20:55,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:20:55,705 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:20:55,705 INFO L87 Difference]: Start difference. First operand 237826 states and 988542 transitions. Second operand 3 states. [2019-12-07 21:20:57,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:20:57,274 INFO L93 Difference]: Finished difference Result 237826 states and 978678 transitions. [2019-12-07 21:20:57,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:20:57,275 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 21:20:57,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:20:57,893 INFO L225 Difference]: With dead ends: 237826 [2019-12-07 21:20:57,894 INFO L226 Difference]: Without dead ends: 237826 [2019-12-07 21:20:57,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:03,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237826 states. [2019-12-07 21:21:07,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237826 to 234480. [2019-12-07 21:21:07,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234480 states. [2019-12-07 21:21:07,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234480 states to 234480 states and 966258 transitions. [2019-12-07 21:21:07,906 INFO L78 Accepts]: Start accepts. Automaton has 234480 states and 966258 transitions. Word has length 18 [2019-12-07 21:21:07,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:07,907 INFO L462 AbstractCegarLoop]: Abstraction has 234480 states and 966258 transitions. [2019-12-07 21:21:07,907 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:21:07,907 INFO L276 IsEmpty]: Start isEmpty. Operand 234480 states and 966258 transitions. [2019-12-07 21:21:07,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 21:21:07,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:07,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:07,919 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:07,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:07,919 INFO L82 PathProgramCache]: Analyzing trace with hash 138207619, now seen corresponding path program 1 times [2019-12-07 21:21:07,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:07,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644558030] [2019-12-07 21:21:07,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:07,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:07,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:07,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644558030] [2019-12-07 21:21:07,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:07,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:21:07,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445267734] [2019-12-07 21:21:07,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:21:07,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:07,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:21:07,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:07,958 INFO L87 Difference]: Start difference. First operand 234480 states and 966258 transitions. Second operand 3 states. [2019-12-07 21:21:08,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:08,092 INFO L93 Difference]: Finished difference Result 42613 states and 138837 transitions. [2019-12-07 21:21:08,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:21:08,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 21:21:08,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:08,156 INFO L225 Difference]: With dead ends: 42613 [2019-12-07 21:21:08,157 INFO L226 Difference]: Without dead ends: 42613 [2019-12-07 21:21:08,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:08,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42613 states. [2019-12-07 21:21:10,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42613 to 42613. [2019-12-07 21:21:10,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42613 states. [2019-12-07 21:21:10,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42613 states to 42613 states and 138837 transitions. [2019-12-07 21:21:10,909 INFO L78 Accepts]: Start accepts. Automaton has 42613 states and 138837 transitions. Word has length 18 [2019-12-07 21:21:10,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:10,910 INFO L462 AbstractCegarLoop]: Abstraction has 42613 states and 138837 transitions. [2019-12-07 21:21:10,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:21:10,910 INFO L276 IsEmpty]: Start isEmpty. Operand 42613 states and 138837 transitions. [2019-12-07 21:21:10,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 21:21:10,916 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:10,916 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:10,917 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:10,917 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:10,917 INFO L82 PathProgramCache]: Analyzing trace with hash -187432510, now seen corresponding path program 1 times [2019-12-07 21:21:10,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:10,917 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644335219] [2019-12-07 21:21:10,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:10,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:10,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:10,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644335219] [2019-12-07 21:21:10,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:10,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:21:10,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330078767] [2019-12-07 21:21:10,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:21:10,974 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:10,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:21:10,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:21:10,975 INFO L87 Difference]: Start difference. First operand 42613 states and 138837 transitions. Second operand 6 states. [2019-12-07 21:21:11,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:11,567 INFO L93 Difference]: Finished difference Result 65056 states and 205947 transitions. [2019-12-07 21:21:11,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 21:21:11,568 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 21:21:11,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:11,670 INFO L225 Difference]: With dead ends: 65056 [2019-12-07 21:21:11,670 INFO L226 Difference]: Without dead ends: 65042 [2019-12-07 21:21:11,670 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 21:21:11,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65042 states. [2019-12-07 21:21:12,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65042 to 42278. [2019-12-07 21:21:12,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42278 states. [2019-12-07 21:21:12,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42278 states to 42278 states and 137592 transitions. [2019-12-07 21:21:12,564 INFO L78 Accepts]: Start accepts. Automaton has 42278 states and 137592 transitions. Word has length 22 [2019-12-07 21:21:12,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:12,565 INFO L462 AbstractCegarLoop]: Abstraction has 42278 states and 137592 transitions. [2019-12-07 21:21:12,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:21:12,565 INFO L276 IsEmpty]: Start isEmpty. Operand 42278 states and 137592 transitions. [2019-12-07 21:21:12,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 21:21:12,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:12,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:12,576 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:12,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:12,576 INFO L82 PathProgramCache]: Analyzing trace with hash -200714255, now seen corresponding path program 1 times [2019-12-07 21:21:12,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:12,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106001176] [2019-12-07 21:21:12,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:12,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:12,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:12,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106001176] [2019-12-07 21:21:12,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:12,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:21:12,667 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959538877] [2019-12-07 21:21:12,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:21:12,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:12,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:21:12,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:21:12,667 INFO L87 Difference]: Start difference. First operand 42278 states and 137592 transitions. Second operand 7 states. [2019-12-07 21:21:13,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:13,156 INFO L93 Difference]: Finished difference Result 59726 states and 189950 transitions. [2019-12-07 21:21:13,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 21:21:13,156 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 21:21:13,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:13,386 INFO L225 Difference]: With dead ends: 59726 [2019-12-07 21:21:13,386 INFO L226 Difference]: Without dead ends: 59700 [2019-12-07 21:21:13,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 21:21:13,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59700 states. [2019-12-07 21:21:14,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59700 to 50129. [2019-12-07 21:21:14,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50129 states. [2019-12-07 21:21:14,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50129 states to 50129 states and 162181 transitions. [2019-12-07 21:21:14,274 INFO L78 Accepts]: Start accepts. Automaton has 50129 states and 162181 transitions. Word has length 25 [2019-12-07 21:21:14,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:14,274 INFO L462 AbstractCegarLoop]: Abstraction has 50129 states and 162181 transitions. [2019-12-07 21:21:14,274 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:21:14,274 INFO L276 IsEmpty]: Start isEmpty. Operand 50129 states and 162181 transitions. [2019-12-07 21:21:14,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 21:21:14,290 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:14,290 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:14,290 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:14,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:14,291 INFO L82 PathProgramCache]: Analyzing trace with hash 611460705, now seen corresponding path program 1 times [2019-12-07 21:21:14,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:14,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465872681] [2019-12-07 21:21:14,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:14,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:14,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:14,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1465872681] [2019-12-07 21:21:14,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:14,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:21:14,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846293616] [2019-12-07 21:21:14,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:21:14,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:14,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:21:14,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:21:14,337 INFO L87 Difference]: Start difference. First operand 50129 states and 162181 transitions. Second operand 6 states. [2019-12-07 21:21:14,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:14,832 INFO L93 Difference]: Finished difference Result 71592 states and 224983 transitions. [2019-12-07 21:21:14,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 21:21:14,832 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 21:21:14,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:14,939 INFO L225 Difference]: With dead ends: 71592 [2019-12-07 21:21:14,939 INFO L226 Difference]: Without dead ends: 71508 [2019-12-07 21:21:14,940 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:21:15,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71508 states. [2019-12-07 21:21:16,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71508 to 53724. [2019-12-07 21:21:16,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53724 states. [2019-12-07 21:21:16,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53724 states to 53724 states and 172706 transitions. [2019-12-07 21:21:16,133 INFO L78 Accepts]: Start accepts. Automaton has 53724 states and 172706 transitions. Word has length 27 [2019-12-07 21:21:16,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:16,133 INFO L462 AbstractCegarLoop]: Abstraction has 53724 states and 172706 transitions. [2019-12-07 21:21:16,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:21:16,133 INFO L276 IsEmpty]: Start isEmpty. Operand 53724 states and 172706 transitions. [2019-12-07 21:21:16,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 21:21:16,155 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:16,155 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:16,155 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:16,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:16,156 INFO L82 PathProgramCache]: Analyzing trace with hash -969078927, now seen corresponding path program 1 times [2019-12-07 21:21:16,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:16,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260972207] [2019-12-07 21:21:16,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:16,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:16,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:16,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260972207] [2019-12-07 21:21:16,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:16,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:21:16,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906901762] [2019-12-07 21:21:16,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:21:16,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:16,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:21:16,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:21:16,190 INFO L87 Difference]: Start difference. First operand 53724 states and 172706 transitions. Second operand 4 states. [2019-12-07 21:21:16,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:16,268 INFO L93 Difference]: Finished difference Result 20754 states and 64022 transitions. [2019-12-07 21:21:16,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:21:16,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 21:21:16,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:16,295 INFO L225 Difference]: With dead ends: 20754 [2019-12-07 21:21:16,295 INFO L226 Difference]: Without dead ends: 20754 [2019-12-07 21:21:16,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:21:16,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20754 states. [2019-12-07 21:21:16,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20754 to 19543. [2019-12-07 21:21:16,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19543 states. [2019-12-07 21:21:16,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19543 states to 19543 states and 60338 transitions. [2019-12-07 21:21:16,591 INFO L78 Accepts]: Start accepts. Automaton has 19543 states and 60338 transitions. Word has length 29 [2019-12-07 21:21:16,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:16,592 INFO L462 AbstractCegarLoop]: Abstraction has 19543 states and 60338 transitions. [2019-12-07 21:21:16,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:21:16,592 INFO L276 IsEmpty]: Start isEmpty. Operand 19543 states and 60338 transitions. [2019-12-07 21:21:16,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 21:21:16,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:16,613 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:16,613 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:16,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:16,613 INFO L82 PathProgramCache]: Analyzing trace with hash -1170391984, now seen corresponding path program 1 times [2019-12-07 21:21:16,613 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:16,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434502222] [2019-12-07 21:21:16,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:16,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:16,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:16,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434502222] [2019-12-07 21:21:16,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:16,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:21:16,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821626899] [2019-12-07 21:21:16,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 21:21:16,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:16,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 21:21:16,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 21:21:16,676 INFO L87 Difference]: Start difference. First operand 19543 states and 60338 transitions. Second operand 7 states. [2019-12-07 21:21:17,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:17,412 INFO L93 Difference]: Finished difference Result 27225 states and 81337 transitions. [2019-12-07 21:21:17,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 21:21:17,412 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 21:21:17,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:17,445 INFO L225 Difference]: With dead ends: 27225 [2019-12-07 21:21:17,445 INFO L226 Difference]: Without dead ends: 27225 [2019-12-07 21:21:17,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 21:21:17,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27225 states. [2019-12-07 21:21:17,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27225 to 19532. [2019-12-07 21:21:17,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19532 states. [2019-12-07 21:21:17,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19532 states to 19532 states and 60108 transitions. [2019-12-07 21:21:17,792 INFO L78 Accepts]: Start accepts. Automaton has 19532 states and 60108 transitions. Word has length 33 [2019-12-07 21:21:17,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:17,792 INFO L462 AbstractCegarLoop]: Abstraction has 19532 states and 60108 transitions. [2019-12-07 21:21:17,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 21:21:17,792 INFO L276 IsEmpty]: Start isEmpty. Operand 19532 states and 60108 transitions. [2019-12-07 21:21:17,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 21:21:17,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:17,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:17,810 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:17,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:17,810 INFO L82 PathProgramCache]: Analyzing trace with hash 1293540528, now seen corresponding path program 1 times [2019-12-07 21:21:17,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:17,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1057867104] [2019-12-07 21:21:17,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:17,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:17,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:17,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1057867104] [2019-12-07 21:21:17,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:17,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:21:17,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479067472] [2019-12-07 21:21:17,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:21:17,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:17,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:21:17,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:17,856 INFO L87 Difference]: Start difference. First operand 19532 states and 60108 transitions. Second operand 3 states. [2019-12-07 21:21:17,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:17,907 INFO L93 Difference]: Finished difference Result 18664 states and 56622 transitions. [2019-12-07 21:21:17,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:21:17,908 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 21:21:17,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:17,930 INFO L225 Difference]: With dead ends: 18664 [2019-12-07 21:21:17,930 INFO L226 Difference]: Without dead ends: 18664 [2019-12-07 21:21:17,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:18,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18664 states. [2019-12-07 21:21:18,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18664 to 18390. [2019-12-07 21:21:18,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18390 states. [2019-12-07 21:21:18,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18390 states to 18390 states and 55854 transitions. [2019-12-07 21:21:18,196 INFO L78 Accepts]: Start accepts. Automaton has 18390 states and 55854 transitions. Word has length 40 [2019-12-07 21:21:18,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:18,196 INFO L462 AbstractCegarLoop]: Abstraction has 18390 states and 55854 transitions. [2019-12-07 21:21:18,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:21:18,196 INFO L276 IsEmpty]: Start isEmpty. Operand 18390 states and 55854 transitions. [2019-12-07 21:21:18,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 21:21:18,212 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:18,212 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:18,213 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:18,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:18,213 INFO L82 PathProgramCache]: Analyzing trace with hash -448595313, now seen corresponding path program 1 times [2019-12-07 21:21:18,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:18,213 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745736911] [2019-12-07 21:21:18,213 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:18,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:18,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:18,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745736911] [2019-12-07 21:21:18,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:18,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 21:21:18,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667231322] [2019-12-07 21:21:18,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 21:21:18,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:18,254 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 21:21:18,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:21:18,254 INFO L87 Difference]: Start difference. First operand 18390 states and 55854 transitions. Second operand 5 states. [2019-12-07 21:21:18,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:18,310 INFO L93 Difference]: Finished difference Result 16867 states and 52454 transitions. [2019-12-07 21:21:18,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 21:21:18,311 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 21:21:18,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:18,330 INFO L225 Difference]: With dead ends: 16867 [2019-12-07 21:21:18,330 INFO L226 Difference]: Without dead ends: 16867 [2019-12-07 21:21:18,331 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:21:18,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16867 states. [2019-12-07 21:21:18,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16867 to 15238. [2019-12-07 21:21:18,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15238 states. [2019-12-07 21:21:18,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15238 states to 15238 states and 47616 transitions. [2019-12-07 21:21:18,561 INFO L78 Accepts]: Start accepts. Automaton has 15238 states and 47616 transitions. Word has length 41 [2019-12-07 21:21:18,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:18,562 INFO L462 AbstractCegarLoop]: Abstraction has 15238 states and 47616 transitions. [2019-12-07 21:21:18,562 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 21:21:18,562 INFO L276 IsEmpty]: Start isEmpty. Operand 15238 states and 47616 transitions. [2019-12-07 21:21:18,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 21:21:18,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:18,619 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:18,619 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:18,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:18,620 INFO L82 PathProgramCache]: Analyzing trace with hash 1623524162, now seen corresponding path program 1 times [2019-12-07 21:21:18,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:18,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491480756] [2019-12-07 21:21:18,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:18,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:18,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:18,662 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491480756] [2019-12-07 21:21:18,662 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:18,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 21:21:18,663 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [784257922] [2019-12-07 21:21:18,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 21:21:18,663 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:18,663 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 21:21:18,663 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:18,663 INFO L87 Difference]: Start difference. First operand 15238 states and 47616 transitions. Second operand 3 states. [2019-12-07 21:21:18,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:18,746 INFO L93 Difference]: Finished difference Result 18380 states and 57153 transitions. [2019-12-07 21:21:18,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 21:21:18,747 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 21:21:18,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:18,768 INFO L225 Difference]: With dead ends: 18380 [2019-12-07 21:21:18,768 INFO L226 Difference]: Without dead ends: 18380 [2019-12-07 21:21:18,768 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 21:21:18,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18380 states. [2019-12-07 21:21:18,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18380 to 15494. [2019-12-07 21:21:18,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15494 states. [2019-12-07 21:21:19,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15494 states to 15494 states and 48492 transitions. [2019-12-07 21:21:19,023 INFO L78 Accepts]: Start accepts. Automaton has 15494 states and 48492 transitions. Word has length 66 [2019-12-07 21:21:19,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:19,024 INFO L462 AbstractCegarLoop]: Abstraction has 15494 states and 48492 transitions. [2019-12-07 21:21:19,024 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 21:21:19,024 INFO L276 IsEmpty]: Start isEmpty. Operand 15494 states and 48492 transitions. [2019-12-07 21:21:19,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:19,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:19,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:19,041 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:19,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:19,041 INFO L82 PathProgramCache]: Analyzing trace with hash 600429612, now seen corresponding path program 1 times [2019-12-07 21:21:19,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:19,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666947996] [2019-12-07 21:21:19,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:19,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:19,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:19,091 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1666947996] [2019-12-07 21:21:19,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:19,092 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 21:21:19,092 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1499622965] [2019-12-07 21:21:19,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 21:21:19,092 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:19,092 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 21:21:19,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 21:21:19,093 INFO L87 Difference]: Start difference. First operand 15494 states and 48492 transitions. Second operand 4 states. [2019-12-07 21:21:19,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:19,200 INFO L93 Difference]: Finished difference Result 18353 states and 57063 transitions. [2019-12-07 21:21:19,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 21:21:19,201 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 21:21:19,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:19,223 INFO L225 Difference]: With dead ends: 18353 [2019-12-07 21:21:19,224 INFO L226 Difference]: Without dead ends: 18353 [2019-12-07 21:21:19,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 21:21:19,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18353 states. [2019-12-07 21:21:19,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18353 to 15150. [2019-12-07 21:21:19,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15150 states. [2019-12-07 21:21:19,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15150 states to 15150 states and 47431 transitions. [2019-12-07 21:21:19,482 INFO L78 Accepts]: Start accepts. Automaton has 15150 states and 47431 transitions. Word has length 67 [2019-12-07 21:21:19,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:19,482 INFO L462 AbstractCegarLoop]: Abstraction has 15150 states and 47431 transitions. [2019-12-07 21:21:19,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 21:21:19,483 INFO L276 IsEmpty]: Start isEmpty. Operand 15150 states and 47431 transitions. [2019-12-07 21:21:19,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:19,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:19,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:19,497 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:19,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:19,497 INFO L82 PathProgramCache]: Analyzing trace with hash 384042528, now seen corresponding path program 1 times [2019-12-07 21:21:19,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:19,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675044471] [2019-12-07 21:21:19,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:19,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:19,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:19,648 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675044471] [2019-12-07 21:21:19,648 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:19,649 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 21:21:19,649 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122835898] [2019-12-07 21:21:19,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 21:21:19,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:19,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 21:21:19,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:21:19,649 INFO L87 Difference]: Start difference. First operand 15150 states and 47431 transitions. Second operand 11 states. [2019-12-07 21:21:20,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:20,584 INFO L93 Difference]: Finished difference Result 28542 states and 87989 transitions. [2019-12-07 21:21:20,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 21:21:20,585 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 21:21:20,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:20,606 INFO L225 Difference]: With dead ends: 28542 [2019-12-07 21:21:20,606 INFO L226 Difference]: Without dead ends: 19530 [2019-12-07 21:21:20,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=483, Unknown=0, NotChecked=0, Total=600 [2019-12-07 21:21:20,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19530 states. [2019-12-07 21:21:20,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19530 to 17175. [2019-12-07 21:21:20,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17175 states. [2019-12-07 21:21:20,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17175 states to 17175 states and 53444 transitions. [2019-12-07 21:21:20,881 INFO L78 Accepts]: Start accepts. Automaton has 17175 states and 53444 transitions. Word has length 67 [2019-12-07 21:21:20,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:20,882 INFO L462 AbstractCegarLoop]: Abstraction has 17175 states and 53444 transitions. [2019-12-07 21:21:20,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 21:21:20,882 INFO L276 IsEmpty]: Start isEmpty. Operand 17175 states and 53444 transitions. [2019-12-07 21:21:20,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:20,897 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:20,897 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:20,897 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:20,898 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:20,898 INFO L82 PathProgramCache]: Analyzing trace with hash 1908292690, now seen corresponding path program 2 times [2019-12-07 21:21:20,898 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:20,898 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673476302] [2019-12-07 21:21:20,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:20,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:21,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:21,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673476302] [2019-12-07 21:21:21,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:21,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 21:21:21,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830928022] [2019-12-07 21:21:21,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 21:21:21,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:21,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 21:21:21,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 21:21:21,012 INFO L87 Difference]: Start difference. First operand 17175 states and 53444 transitions. Second operand 10 states. [2019-12-07 21:21:22,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:22,240 INFO L93 Difference]: Finished difference Result 38221 states and 118896 transitions. [2019-12-07 21:21:22,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 21:21:22,241 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 21:21:22,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:22,278 INFO L225 Difference]: With dead ends: 38221 [2019-12-07 21:21:22,278 INFO L226 Difference]: Without dead ends: 27337 [2019-12-07 21:21:22,279 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=143, Invalid=507, Unknown=0, NotChecked=0, Total=650 [2019-12-07 21:21:22,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27337 states. [2019-12-07 21:21:22,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27337 to 18730. [2019-12-07 21:21:22,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18730 states. [2019-12-07 21:21:22,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18730 states to 18730 states and 58277 transitions. [2019-12-07 21:21:22,645 INFO L78 Accepts]: Start accepts. Automaton has 18730 states and 58277 transitions. Word has length 67 [2019-12-07 21:21:22,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:22,645 INFO L462 AbstractCegarLoop]: Abstraction has 18730 states and 58277 transitions. [2019-12-07 21:21:22,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 21:21:22,645 INFO L276 IsEmpty]: Start isEmpty. Operand 18730 states and 58277 transitions. [2019-12-07 21:21:22,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:22,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:22,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:22,662 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:22,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:22,662 INFO L82 PathProgramCache]: Analyzing trace with hash 993635084, now seen corresponding path program 3 times [2019-12-07 21:21:22,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:22,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361787040] [2019-12-07 21:21:22,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:22,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:23,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:23,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361787040] [2019-12-07 21:21:23,483 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:23,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 21:21:23,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702498047] [2019-12-07 21:21:23,484 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 21:21:23,484 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:23,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 21:21:23,485 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=286, Unknown=0, NotChecked=0, Total=342 [2019-12-07 21:21:23,485 INFO L87 Difference]: Start difference. First operand 18730 states and 58277 transitions. Second operand 19 states. [2019-12-07 21:21:32,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:32,764 INFO L93 Difference]: Finished difference Result 33715 states and 102351 transitions. [2019-12-07 21:21:32,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 21:21:32,764 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 21:21:32,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:32,801 INFO L225 Difference]: With dead ends: 33715 [2019-12-07 21:21:32,802 INFO L226 Difference]: Without dead ends: 31240 [2019-12-07 21:21:32,802 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=279, Invalid=1527, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 21:21:32,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31240 states. [2019-12-07 21:21:33,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31240 to 21253. [2019-12-07 21:21:33,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21253 states. [2019-12-07 21:21:33,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21253 states to 21253 states and 65657 transitions. [2019-12-07 21:21:33,205 INFO L78 Accepts]: Start accepts. Automaton has 21253 states and 65657 transitions. Word has length 67 [2019-12-07 21:21:33,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:33,205 INFO L462 AbstractCegarLoop]: Abstraction has 21253 states and 65657 transitions. [2019-12-07 21:21:33,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 21:21:33,205 INFO L276 IsEmpty]: Start isEmpty. Operand 21253 states and 65657 transitions. [2019-12-07 21:21:33,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:33,224 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:33,224 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:33,224 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:33,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:33,224 INFO L82 PathProgramCache]: Analyzing trace with hash -392189308, now seen corresponding path program 4 times [2019-12-07 21:21:33,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:33,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540945609] [2019-12-07 21:21:33,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:33,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:33,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:33,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540945609] [2019-12-07 21:21:33,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:33,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 21:21:33,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [43935684] [2019-12-07 21:21:33,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 21:21:33,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:33,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 21:21:33,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2019-12-07 21:21:33,609 INFO L87 Difference]: Start difference. First operand 21253 states and 65657 transitions. Second operand 18 states. [2019-12-07 21:21:35,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:35,999 INFO L93 Difference]: Finished difference Result 32087 states and 97528 transitions. [2019-12-07 21:21:35,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 21:21:35,999 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 21:21:35,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:36,037 INFO L225 Difference]: With dead ends: 32087 [2019-12-07 21:21:36,037 INFO L226 Difference]: Without dead ends: 31512 [2019-12-07 21:21:36,038 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=186, Invalid=936, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 21:21:36,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31512 states. [2019-12-07 21:21:36,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31512 to 21711. [2019-12-07 21:21:36,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21711 states. [2019-12-07 21:21:36,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21711 states to 21711 states and 66973 transitions. [2019-12-07 21:21:36,427 INFO L78 Accepts]: Start accepts. Automaton has 21711 states and 66973 transitions. Word has length 67 [2019-12-07 21:21:36,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:36,427 INFO L462 AbstractCegarLoop]: Abstraction has 21711 states and 66973 transitions. [2019-12-07 21:21:36,427 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 21:21:36,427 INFO L276 IsEmpty]: Start isEmpty. Operand 21711 states and 66973 transitions. [2019-12-07 21:21:36,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:36,447 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:36,447 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:36,447 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:36,447 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:36,447 INFO L82 PathProgramCache]: Analyzing trace with hash 753277438, now seen corresponding path program 5 times [2019-12-07 21:21:36,447 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:36,447 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991607981] [2019-12-07 21:21:36,447 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:36,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:36,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:36,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991607981] [2019-12-07 21:21:36,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:36,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 21:21:36,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685899329] [2019-12-07 21:21:36,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 21:21:36,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:36,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 21:21:36,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:21:36,563 INFO L87 Difference]: Start difference. First operand 21711 states and 66973 transitions. Second operand 11 states. [2019-12-07 21:21:39,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:39,005 INFO L93 Difference]: Finished difference Result 34768 states and 106700 transitions. [2019-12-07 21:21:39,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 21:21:39,007 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 21:21:39,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:39,053 INFO L225 Difference]: With dead ends: 34768 [2019-12-07 21:21:39,054 INFO L226 Difference]: Without dead ends: 28630 [2019-12-07 21:21:39,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=489, Unknown=0, NotChecked=0, Total=600 [2019-12-07 21:21:39,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28630 states. [2019-12-07 21:21:39,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28630 to 20843. [2019-12-07 21:21:39,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20843 states. [2019-12-07 21:21:39,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20843 states to 20843 states and 64519 transitions. [2019-12-07 21:21:39,441 INFO L78 Accepts]: Start accepts. Automaton has 20843 states and 64519 transitions. Word has length 67 [2019-12-07 21:21:39,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:39,442 INFO L462 AbstractCegarLoop]: Abstraction has 20843 states and 64519 transitions. [2019-12-07 21:21:39,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 21:21:39,442 INFO L276 IsEmpty]: Start isEmpty. Operand 20843 states and 64519 transitions. [2019-12-07 21:21:39,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:39,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:39,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:39,462 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:39,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:39,462 INFO L82 PathProgramCache]: Analyzing trace with hash 397917466, now seen corresponding path program 6 times [2019-12-07 21:21:39,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:39,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820016320] [2019-12-07 21:21:39,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:39,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:39,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:39,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820016320] [2019-12-07 21:21:39,569 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:39,569 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 21:21:39,569 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210241340] [2019-12-07 21:21:39,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 21:21:39,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:39,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 21:21:39,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:21:39,570 INFO L87 Difference]: Start difference. First operand 20843 states and 64519 transitions. Second operand 11 states. [2019-12-07 21:21:40,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:40,890 INFO L93 Difference]: Finished difference Result 31717 states and 97789 transitions. [2019-12-07 21:21:40,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 21:21:40,890 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 21:21:40,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:40,926 INFO L225 Difference]: With dead ends: 31717 [2019-12-07 21:21:40,927 INFO L226 Difference]: Without dead ends: 28604 [2019-12-07 21:21:40,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2019-12-07 21:21:41,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28604 states. [2019-12-07 21:21:41,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28604 to 21097. [2019-12-07 21:21:41,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21097 states. [2019-12-07 21:21:41,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21097 states to 21097 states and 65184 transitions. [2019-12-07 21:21:41,325 INFO L78 Accepts]: Start accepts. Automaton has 21097 states and 65184 transitions. Word has length 67 [2019-12-07 21:21:41,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:41,326 INFO L462 AbstractCegarLoop]: Abstraction has 21097 states and 65184 transitions. [2019-12-07 21:21:41,326 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 21:21:41,326 INFO L276 IsEmpty]: Start isEmpty. Operand 21097 states and 65184 transitions. [2019-12-07 21:21:41,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:41,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:41,346 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:41,346 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:41,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:41,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1803113718, now seen corresponding path program 7 times [2019-12-07 21:21:41,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:41,347 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035474226] [2019-12-07 21:21:41,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:41,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:41,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:41,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035474226] [2019-12-07 21:21:41,471 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:41,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 21:21:41,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282932416] [2019-12-07 21:21:41,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 21:21:41,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:41,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 21:21:41,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 21:21:41,473 INFO L87 Difference]: Start difference. First operand 21097 states and 65184 transitions. Second operand 12 states. [2019-12-07 21:21:42,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:42,739 INFO L93 Difference]: Finished difference Result 30183 states and 92935 transitions. [2019-12-07 21:21:42,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 21:21:42,740 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 21:21:42,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:42,776 INFO L225 Difference]: With dead ends: 30183 [2019-12-07 21:21:42,776 INFO L226 Difference]: Without dead ends: 28976 [2019-12-07 21:21:42,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 21:21:42,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28976 states. [2019-12-07 21:21:43,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28976 to 20963. [2019-12-07 21:21:43,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20963 states. [2019-12-07 21:21:43,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20963 states to 20963 states and 64832 transitions. [2019-12-07 21:21:43,150 INFO L78 Accepts]: Start accepts. Automaton has 20963 states and 64832 transitions. Word has length 67 [2019-12-07 21:21:43,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:43,151 INFO L462 AbstractCegarLoop]: Abstraction has 20963 states and 64832 transitions. [2019-12-07 21:21:43,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 21:21:43,151 INFO L276 IsEmpty]: Start isEmpty. Operand 20963 states and 64832 transitions. [2019-12-07 21:21:43,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:43,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:43,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:43,171 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:43,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:43,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1857250972, now seen corresponding path program 8 times [2019-12-07 21:21:43,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:43,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560289059] [2019-12-07 21:21:43,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:43,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:43,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:43,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560289059] [2019-12-07 21:21:43,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:43,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 21:21:43,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310837187] [2019-12-07 21:21:43,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 21:21:43,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:43,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 21:21:43,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 21:21:43,292 INFO L87 Difference]: Start difference. First operand 20963 states and 64832 transitions. Second operand 12 states. [2019-12-07 21:21:46,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:46,581 INFO L93 Difference]: Finished difference Result 36135 states and 110473 transitions. [2019-12-07 21:21:46,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 21:21:46,582 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 21:21:46,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:46,621 INFO L225 Difference]: With dead ends: 36135 [2019-12-07 21:21:46,621 INFO L226 Difference]: Without dead ends: 31174 [2019-12-07 21:21:46,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=196, Invalid=926, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 21:21:46,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31174 states. [2019-12-07 21:21:46,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31174 to 20691. [2019-12-07 21:21:46,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20691 states. [2019-12-07 21:21:47,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20691 states to 20691 states and 63796 transitions. [2019-12-07 21:21:47,008 INFO L78 Accepts]: Start accepts. Automaton has 20691 states and 63796 transitions. Word has length 67 [2019-12-07 21:21:47,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:47,009 INFO L462 AbstractCegarLoop]: Abstraction has 20691 states and 63796 transitions. [2019-12-07 21:21:47,009 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 21:21:47,009 INFO L276 IsEmpty]: Start isEmpty. Operand 20691 states and 63796 transitions. [2019-12-07 21:21:47,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:47,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:47,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:47,028 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:47,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:47,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1823504856, now seen corresponding path program 9 times [2019-12-07 21:21:47,028 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:47,028 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [338487044] [2019-12-07 21:21:47,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:47,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:47,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:47,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [338487044] [2019-12-07 21:21:47,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:47,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 21:21:47,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1482399713] [2019-12-07 21:21:47,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 21:21:47,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:47,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 21:21:47,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=323, Unknown=0, NotChecked=0, Total=380 [2019-12-07 21:21:47,675 INFO L87 Difference]: Start difference. First operand 20691 states and 63796 transitions. Second operand 20 states. [2019-12-07 21:21:55,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:21:55,909 INFO L93 Difference]: Finished difference Result 33851 states and 102184 transitions. [2019-12-07 21:21:55,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 21:21:55,911 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 67 [2019-12-07 21:21:55,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:21:55,968 INFO L225 Difference]: With dead ends: 33851 [2019-12-07 21:21:55,968 INFO L226 Difference]: Without dead ends: 32924 [2019-12-07 21:21:55,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 389 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=346, Invalid=1634, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 21:21:56,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32924 states. [2019-12-07 21:21:56,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32924 to 20687. [2019-12-07 21:21:56,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20687 states. [2019-12-07 21:21:56,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20687 states to 20687 states and 63785 transitions. [2019-12-07 21:21:56,380 INFO L78 Accepts]: Start accepts. Automaton has 20687 states and 63785 transitions. Word has length 67 [2019-12-07 21:21:56,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:21:56,380 INFO L462 AbstractCegarLoop]: Abstraction has 20687 states and 63785 transitions. [2019-12-07 21:21:56,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 21:21:56,380 INFO L276 IsEmpty]: Start isEmpty. Operand 20687 states and 63785 transitions. [2019-12-07 21:21:56,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:21:56,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:21:56,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:21:56,399 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:21:56,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:21:56,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1325995694, now seen corresponding path program 10 times [2019-12-07 21:21:56,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:21:56,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919072512] [2019-12-07 21:21:56,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:21:56,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:21:56,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:21:56,847 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919072512] [2019-12-07 21:21:56,847 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:21:56,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 21:21:56,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130689479] [2019-12-07 21:21:56,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 21:21:56,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:21:56,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 21:21:56,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2019-12-07 21:21:56,848 INFO L87 Difference]: Start difference. First operand 20687 states and 63785 transitions. Second operand 18 states. [2019-12-07 21:22:06,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:22:06,408 INFO L93 Difference]: Finished difference Result 34844 states and 104836 transitions. [2019-12-07 21:22:06,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 21:22:06,408 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 67 [2019-12-07 21:22:06,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:22:06,447 INFO L225 Difference]: With dead ends: 34844 [2019-12-07 21:22:06,447 INFO L226 Difference]: Without dead ends: 33777 [2019-12-07 21:22:06,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 387 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=317, Invalid=1405, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 21:22:06,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33777 states. [2019-12-07 21:22:06,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33777 to 20269. [2019-12-07 21:22:06,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20269 states. [2019-12-07 21:22:06,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20269 states to 20269 states and 62526 transitions. [2019-12-07 21:22:06,849 INFO L78 Accepts]: Start accepts. Automaton has 20269 states and 62526 transitions. Word has length 67 [2019-12-07 21:22:06,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:22:06,849 INFO L462 AbstractCegarLoop]: Abstraction has 20269 states and 62526 transitions. [2019-12-07 21:22:06,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 21:22:06,849 INFO L276 IsEmpty]: Start isEmpty. Operand 20269 states and 62526 transitions. [2019-12-07 21:22:06,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:22:06,867 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:22:06,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:22:06,868 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:22:06,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:22:06,868 INFO L82 PathProgramCache]: Analyzing trace with hash -1867129146, now seen corresponding path program 11 times [2019-12-07 21:22:06,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:22:06,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544053584] [2019-12-07 21:22:06,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:22:06,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 21:22:06,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 21:22:06,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544053584] [2019-12-07 21:22:06,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 21:22:06,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 21:22:06,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235744764] [2019-12-07 21:22:06,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 21:22:06,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 21:22:06,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 21:22:06,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 21:22:06,940 INFO L87 Difference]: Start difference. First operand 20269 states and 62526 transitions. Second operand 6 states. [2019-12-07 21:22:07,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 21:22:07,203 INFO L93 Difference]: Finished difference Result 48566 states and 148918 transitions. [2019-12-07 21:22:07,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 21:22:07,204 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 21:22:07,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 21:22:07,251 INFO L225 Difference]: With dead ends: 48566 [2019-12-07 21:22:07,251 INFO L226 Difference]: Without dead ends: 39126 [2019-12-07 21:22:07,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-07 21:22:07,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39126 states. [2019-12-07 21:22:07,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39126 to 21339. [2019-12-07 21:22:07,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21339 states. [2019-12-07 21:22:07,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21339 states to 21339 states and 65979 transitions. [2019-12-07 21:22:07,705 INFO L78 Accepts]: Start accepts. Automaton has 21339 states and 65979 transitions. Word has length 67 [2019-12-07 21:22:07,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 21:22:07,706 INFO L462 AbstractCegarLoop]: Abstraction has 21339 states and 65979 transitions. [2019-12-07 21:22:07,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 21:22:07,706 INFO L276 IsEmpty]: Start isEmpty. Operand 21339 states and 65979 transitions. [2019-12-07 21:22:07,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 21:22:07,726 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 21:22:07,726 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 21:22:07,726 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 21:22:07,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 21:22:07,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1154306208, now seen corresponding path program 12 times [2019-12-07 21:22:07,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 21:22:07,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [855750580] [2019-12-07 21:22:07,727 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 21:22:07,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:22:07,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 21:22:07,804 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 21:22:07,805 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 21:22:07,808 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1573~0.base_23|) (= 0 v_~__unbuffered_p1_EAX~0_44) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1573~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1573~0.base_23|) |v_ULTIMATE.start_main_~#t1573~0.offset_17| 0)) |v_#memory_int_17|) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= |v_ULTIMATE.start_main_~#t1573~0.offset_17| 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1573~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1573~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1573~0.base_23| 1)) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1574~0.offset=|v_ULTIMATE.start_main_~#t1574~0.offset_12|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1574~0.base=|v_ULTIMATE.start_main_~#t1574~0.base_19|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t1575~0.offset=|v_ULTIMATE.start_main_~#t1575~0.offset_14|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, ULTIMATE.start_main_~#t1573~0.base=|v_ULTIMATE.start_main_~#t1573~0.base_23|, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1573~0.offset=|v_ULTIMATE.start_main_~#t1573~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ULTIMATE.start_main_~#t1575~0.base=|v_ULTIMATE.start_main_~#t1575~0.base_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1574~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1574~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1575~0.offset, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t1573~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1573~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t1575~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,809 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1574~0.base_11| 1)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1574~0.base_11| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t1574~0.offset_9| 0) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1574~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1574~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1574~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1574~0.base_11|) |v_ULTIMATE.start_main_~#t1574~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1574~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1574~0.base=|v_ULTIMATE.start_main_~#t1574~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1574~0.offset=|v_ULTIMATE.start_main_~#t1574~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1574~0.base, #length, ULTIMATE.start_main_~#t1574~0.offset] because there is no mapped edge [2019-12-07 21:22:07,809 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-11001791 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-11001791 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-11001791| ~z~0_In-11001791) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-11001791| ~z$w_buff1~0_In-11001791) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-11001791, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-11001791, ~z$w_buff1~0=~z$w_buff1~0_In-11001791, ~z~0=~z~0_In-11001791} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-11001791|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-11001791, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-11001791, ~z$w_buff1~0=~z$w_buff1~0_In-11001791, ~z~0=~z~0_In-11001791} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 21:22:07,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 21:22:07,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1575~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1575~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1575~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1575~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1575~0.base_13|) (= |v_ULTIMATE.start_main_~#t1575~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1575~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1575~0.base_13|) |v_ULTIMATE.start_main_~#t1575~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1575~0.offset=|v_ULTIMATE.start_main_~#t1575~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1575~0.base=|v_ULTIMATE.start_main_~#t1575~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1575~0.offset, ULTIMATE.start_main_~#t1575~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 21:22:07,811 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1735266248 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1735266248 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1735266248 |P1Thread1of1ForFork2_#t~ite11_Out-1735266248|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1735266248|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1735266248, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1735266248} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1735266248, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1735266248|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1735266248} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 21:22:07,812 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1419423991 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1419423991 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1419423991 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1419423991 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1419423991|)) (and (= ~z$w_buff1_used~0_In1419423991 |P1Thread1of1ForFork2_#t~ite12_Out1419423991|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1419423991, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1419423991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1419423991, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1419423991} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1419423991, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1419423991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1419423991, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1419423991|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1419423991} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 21:22:07,815 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In538776119 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In538776119 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out538776119| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In538776119 |P1Thread1of1ForFork2_#t~ite13_Out538776119|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In538776119, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In538776119} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In538776119, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out538776119|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In538776119} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 21:22:07,817 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In468624171 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In468624171 256) 0))) (or (= (mod ~z$w_buff0_used~0_In468624171 256) 0) (and (= (mod ~z$w_buff1_used~0_In468624171 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In468624171 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite26_Out468624171| |P2Thread1of1ForFork0_#t~ite27_Out468624171|) (= |P2Thread1of1ForFork0_#t~ite26_Out468624171| ~z$w_buff0_used~0_In468624171)) (and (= ~z$w_buff0_used~0_In468624171 |P2Thread1of1ForFork0_#t~ite27_Out468624171|) (= |P2Thread1of1ForFork0_#t~ite26_In468624171| |P2Thread1of1ForFork0_#t~ite26_Out468624171|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In468624171|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In468624171, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In468624171, ~weak$$choice2~0=~weak$$choice2~0_In468624171} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out468624171|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out468624171|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In468624171, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In468624171, ~weak$$choice2~0=~weak$$choice2~0_In468624171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 21:22:07,818 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 21:22:07,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-206158471 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-206158471 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-206158471 |P0Thread1of1ForFork1_#t~ite5_Out-206158471|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-206158471| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-206158471, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-206158471} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-206158471|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-206158471, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-206158471} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 21:22:07,820 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 21:22:07,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1213945310| |P2Thread1of1ForFork0_#t~ite38_Out-1213945310|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1213945310 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1213945310 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1213945310| ~z$w_buff1~0_In-1213945310) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1213945310| ~z~0_In-1213945310)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1213945310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1213945310, ~z$w_buff1~0=~z$w_buff1~0_In-1213945310, ~z~0=~z~0_In-1213945310} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1213945310|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1213945310|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1213945310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1213945310, ~z$w_buff1~0=~z$w_buff1~0_In-1213945310, ~z~0=~z~0_In-1213945310} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 21:22:07,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1165473169 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1165473169 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out1165473169| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1165473169| ~z$w_buff0_used~0_In1165473169)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1165473169, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1165473169} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1165473169, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1165473169|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1165473169} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 21:22:07,821 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In240879023 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In240879023 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In240879023 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In240879023 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out240879023|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out240879023| ~z$w_buff1_used~0_In240879023) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In240879023, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In240879023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In240879023, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In240879023} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In240879023, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In240879023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In240879023, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In240879023, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out240879023|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 21:22:07,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1757503185 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1757503185 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1757503185| ~z$r_buff0_thd3~0_In-1757503185) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1757503185|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1757503185, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1757503185} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1757503185, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1757503185, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1757503185|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 21:22:07,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-544893256 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-544893256 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-544893256 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-544893256 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-544893256|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-544893256 |P2Thread1of1ForFork0_#t~ite43_Out-544893256|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-544893256, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-544893256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-544893256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544893256} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-544893256|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-544893256, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-544893256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-544893256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544893256} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 21:22:07,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:22:07,822 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1777675095 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1777675095 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1777675095 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1777675095 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1777675095| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1777675095| ~z$w_buff1_used~0_In-1777675095) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1777675095, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1777675095, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1777675095, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1777675095} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1777675095, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1777675095|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1777675095, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1777675095, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1777675095} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1633935144 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-1633935144 ~z$r_buff0_thd1~0_In-1633935144)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1633935144 256) 0))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out-1633935144 0) (not .cse1) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1633935144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1633935144} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1633935144, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1633935144|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1633935144} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1452458113 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1452458113 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1452458113 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1452458113 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1452458113|)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1452458113| ~z$r_buff1_thd1~0_In1452458113) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1452458113, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1452458113, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1452458113, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1452458113} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1452458113|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1452458113, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1452458113, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1452458113, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1452458113} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-2137579882 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-2137579882 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-2137579882 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2137579882 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2137579882| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-2137579882| ~z$r_buff1_thd2~0_In-2137579882)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2137579882, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2137579882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2137579882, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2137579882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2137579882, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2137579882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2137579882, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2137579882|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2137579882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:22:07,823 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:22:07,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1326920347| |ULTIMATE.start_main_#t~ite47_Out-1326920347|)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1326920347 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1326920347 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1326920347| ~z$w_buff1~0_In-1326920347) (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= ~z~0_In-1326920347 |ULTIMATE.start_main_#t~ite47_Out-1326920347|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1326920347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1326920347, ~z$w_buff1~0=~z$w_buff1~0_In-1326920347, ~z~0=~z~0_In-1326920347} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1326920347, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1326920347|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1326920347, ~z$w_buff1~0=~z$w_buff1~0_In-1326920347, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1326920347|, ~z~0=~z~0_In-1326920347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 21:22:07,824 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-943328630 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-943328630 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-943328630|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-943328630 |ULTIMATE.start_main_#t~ite49_Out-943328630|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-943328630, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-943328630} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-943328630, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-943328630, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-943328630|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 21:22:07,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In1596298600 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1596298600 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1596298600 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1596298600 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1596298600 |ULTIMATE.start_main_#t~ite50_Out1596298600|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1596298600|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1596298600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1596298600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1596298600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1596298600} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1596298600|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1596298600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1596298600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1596298600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1596298600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 21:22:07,825 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1384682134 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1384682134 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In1384682134 |ULTIMATE.start_main_#t~ite51_Out1384682134|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1384682134| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1384682134, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1384682134} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1384682134, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1384682134|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1384682134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 21:22:07,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-137761490 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-137761490 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-137761490 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-137761490 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-137761490| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-137761490| ~z$r_buff1_thd0~0_In-137761490) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-137761490, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137761490, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-137761490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137761490} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-137761490|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-137761490, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137761490, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-137761490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137761490} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 21:22:07,826 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:22:07,881 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 09:22:07 BasicIcfg [2019-12-07 21:22:07,881 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 21:22:07,882 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 21:22:07,882 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 21:22:07,882 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 21:22:07,882 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 09:19:26" (3/4) ... [2019-12-07 21:22:07,884 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 21:22:07,885 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] ULTIMATE.startENTRY-->L822: Formula: (let ((.cse0 (store |v_#valid_62| 0 0))) (and (= 0 v_~z$flush_delayed~0_27) (= 0 v_~x~0_129) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1573~0.base_23|) (= 0 v_~__unbuffered_p1_EAX~0_44) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1573~0.base_23| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1573~0.base_23|) |v_ULTIMATE.start_main_~#t1573~0.offset_17| 0)) |v_#memory_int_17|) (= v_~weak$$choice2~0_125 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$r_buff0_thd1~0_274 0) (= |v_#NULL.offset_7| 0) (= v_~z$mem_tmp~0_16 0) (= v_~z$r_buff1_thd0~0_203 0) (= |v_ULTIMATE.start_main_~#t1573~0.offset_17| 0) (= v_~main$tmp_guard1~0_48 0) (= 0 v_~z$r_buff0_thd3~0_416) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t1573~0.base_23| 4) |v_#length_21|) (= v_~z$w_buff1_used~0_618 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~__unbuffered_p2_EAX~0_39) (= v_~z$r_buff0_thd0~0_208 0) (= v_~z$read_delayed_var~0.base_6 0) (= v_~z$w_buff1~0_350 0) (= v_~z$w_buff0_used~0_900 0) (= 0 v_~__unbuffered_p0_EAX~0_137) (= v_~z$read_delayed~0_7 0) (= v_~z$r_buff1_thd2~0_170 0) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff1_thd3~0_300) (= (select .cse0 |v_ULTIMATE.start_main_~#t1573~0.base_23|) 0) (= v_~z$r_buff1_thd1~0_166 0) (= v_~z$w_buff0~0_454 0) (= 0 v_~weak$$choice0~0_13) (= v_~z~0_160 0) (= |v_#valid_60| (store .cse0 |v_ULTIMATE.start_main_~#t1573~0.base_23| 1)) (= v_~main$tmp_guard0~0_24 0) (= 0 v_~__unbuffered_cnt~0_97) (= v_~z$r_buff0_thd2~0_191 0) (= v_~y~0_31 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_18|, #length=|v_#length_22|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_170, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_69|, ULTIMATE.start_main_~#t1574~0.offset=|v_ULTIMATE.start_main_~#t1574~0.offset_12|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_175|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_81|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_208, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_137, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_44, ULTIMATE.start_main_~#t1574~0.base=|v_ULTIMATE.start_main_~#t1574~0.base_19|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_39, ~z$mem_tmp~0=v_~z$mem_tmp~0_16, ULTIMATE.start_main_~#t1575~0.offset=|v_ULTIMATE.start_main_~#t1575~0.offset_14|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_7|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_618, ~z$flush_delayed~0=v_~z$flush_delayed~0_27, ~weak$$choice0~0=v_~weak$$choice0~0_13, ULTIMATE.start_main_~#t1573~0.base=|v_ULTIMATE.start_main_~#t1573~0.base_23|, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_166, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_416, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ~x~0=v_~x~0_129, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_350, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_37|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_52|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_203, ULTIMATE.start_main_~#t1573~0.offset=|v_ULTIMATE.start_main_~#t1573~0.offset_17|, ~y~0=v_~y~0_31, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_191, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_21|, ULTIMATE.start_main_~#t1575~0.base=|v_ULTIMATE.start_main_~#t1575~0.base_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_900, ~z$w_buff0~0=v_~z$w_buff0~0_454, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_300, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_60|, #memory_int=|v_#memory_int_17|, ~z~0=v_~z~0_160, ~weak$$choice2~0=v_~weak$$choice2~0_125, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_274} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t1574~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t1574~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_~#t1575~0.offset, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t1573~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t1573~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t1575~0.base, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L822-1-->L824: Formula: (and (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1574~0.base_11| 1)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t1574~0.base_11| 4) |v_#length_17|) (= |v_ULTIMATE.start_main_~#t1574~0.offset_9| 0) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1574~0.base_11|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t1574~0.base_11|)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1574~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1574~0.base_11|) |v_ULTIMATE.start_main_~#t1574~0.offset_9| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1574~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_6|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1574~0.base=|v_ULTIMATE.start_main_~#t1574~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1574~0.offset=|v_ULTIMATE.start_main_~#t1574~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t1574~0.base, #length, ULTIMATE.start_main_~#t1574~0.offset] because there is no mapped edge [2019-12-07 21:22:07,886 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L4-->L746: Formula: (and (= v_~z$r_buff0_thd2~0_29 v_~z$r_buff1_thd2~0_21) (= v_~__unbuffered_p0_EAX~0_8 v_~x~0_8) (= v_~z$r_buff0_thd0~0_28 v_~z$r_buff1_thd0~0_16) (= v_~z$r_buff0_thd1~0_26 1) (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18 0)) (= v_~z$r_buff0_thd1~0_27 v_~z$r_buff1_thd1~0_15) (= v_~z$r_buff0_thd3~0_67 v_~z$r_buff1_thd3~0_43)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_27, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_8, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_28, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_43, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_16, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_21, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_15, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_18, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_26, ~x~0=v_~x~0_8, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_29} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L766-2-->L766-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-11001791 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In-11001791 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out-11001791| ~z~0_In-11001791) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out-11001791| ~z$w_buff1~0_In-11001791) (not .cse0) (not .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-11001791, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-11001791, ~z$w_buff1~0=~z$w_buff1~0_In-11001791, ~z~0=~z~0_In-11001791} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-11001791|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-11001791, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-11001791, ~z$w_buff1~0=~z$w_buff1~0_In-11001791, ~z~0=~z~0_In-11001791} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 21:22:07,887 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L766-4-->L767: Formula: (= v_~z~0_16 |v_P1Thread1of1ForFork2_#t~ite9_6|) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_6|} OutVars{P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_5|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_5|, ~z~0=v_~z~0_16} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 21:22:07,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L824-1-->L826: Formula: (and (= 0 (select |v_#valid_37| |v_ULTIMATE.start_main_~#t1575~0.base_13|)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1575~0.base_13| 4)) (= |v_#valid_36| (store |v_#valid_37| |v_ULTIMATE.start_main_~#t1575~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t1575~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1575~0.base_13|) (= |v_ULTIMATE.start_main_~#t1575~0.offset_11| 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1575~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t1575~0.base_13|) |v_ULTIMATE.start_main_~#t1575~0.offset_11| 2)) |v_#memory_int_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1575~0.offset=|v_ULTIMATE.start_main_~#t1575~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1575~0.base=|v_ULTIMATE.start_main_~#t1575~0.base_13|, #valid=|v_#valid_36|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1575~0.offset, ULTIMATE.start_main_~#t1575~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 21:22:07,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1735266248 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1735266248 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1735266248 |P1Thread1of1ForFork2_#t~ite11_Out-1735266248|)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1735266248|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1735266248, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1735266248} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1735266248, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1735266248|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1735266248} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 21:22:07,888 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L768-->L768-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In1419423991 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1419423991 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1419423991 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In1419423991 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out1419423991|)) (and (= ~z$w_buff1_used~0_In1419423991 |P1Thread1of1ForFork2_#t~ite12_Out1419423991|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1419423991, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1419423991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1419423991, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1419423991} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1419423991, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1419423991, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1419423991, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out1419423991|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1419423991} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 21:22:07,890 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L769-->L769-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In538776119 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In538776119 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite13_Out538776119| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In538776119 |P1Thread1of1ForFork2_#t~ite13_Out538776119|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In538776119, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In538776119} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In538776119, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out538776119|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In538776119} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 21:22:07,891 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L790-->L790-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In468624171 256)))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In468624171 256) 0))) (or (= (mod ~z$w_buff0_used~0_In468624171 256) 0) (and (= (mod ~z$w_buff1_used~0_In468624171 256) 0) .cse1) (and (= (mod ~z$r_buff1_thd3~0_In468624171 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite26_Out468624171| |P2Thread1of1ForFork0_#t~ite27_Out468624171|) (= |P2Thread1of1ForFork0_#t~ite26_Out468624171| ~z$w_buff0_used~0_In468624171)) (and (= ~z$w_buff0_used~0_In468624171 |P2Thread1of1ForFork0_#t~ite27_Out468624171|) (= |P2Thread1of1ForFork0_#t~ite26_In468624171| |P2Thread1of1ForFork0_#t~ite26_Out468624171|) (not .cse0)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In468624171|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In468624171, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In468624171, ~weak$$choice2~0=~weak$$choice2~0_In468624171} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out468624171|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out468624171|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In468624171, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In468624171, ~z$w_buff1_used~0=~z$w_buff1_used~0_In468624171, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In468624171, ~weak$$choice2~0=~weak$$choice2~0_In468624171} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 21:22:07,892 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L792-->L793: Formula: (and (= v_~z$r_buff0_thd3~0_99 v_~z$r_buff0_thd3~0_100) (not (= 0 (mod v_~weak$$choice2~0_30 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_100, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_9|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_99, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 21:22:07,894 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L747-->L747-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-206158471 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-206158471 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-206158471 |P0Thread1of1ForFork1_#t~ite5_Out-206158471|)) (and (= |P0Thread1of1ForFork1_#t~ite5_Out-206158471| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-206158471, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-206158471} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-206158471|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-206158471, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-206158471} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 21:22:07,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [814] [814] L795-->L799: Formula: (and (not (= (mod v_~z$flush_delayed~0_8 256) 0)) (= 0 v_~z$flush_delayed~0_7) (= v_~z~0_50 v_~z$mem_tmp~0_5)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_8} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7, ~z~0=v_~z~0_50} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 21:22:07,895 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L799-2-->L799-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-1213945310| |P2Thread1of1ForFork0_#t~ite38_Out-1213945310|)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1213945310 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd3~0_In-1213945310 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1213945310| ~z$w_buff1~0_In-1213945310) .cse0 (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-1213945310| ~z~0_In-1213945310)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1213945310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1213945310, ~z$w_buff1~0=~z$w_buff1~0_In-1213945310, ~z~0=~z~0_In-1213945310} OutVars{P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-1213945310|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1213945310|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1213945310, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1213945310, ~z$w_buff1~0=~z$w_buff1~0_In-1213945310, ~z~0=~z~0_In-1213945310} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 21:22:07,896 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [843] [843] L800-->L800-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1165473169 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1165473169 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out1165473169| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out1165473169| ~z$w_buff0_used~0_In1165473169)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1165473169, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1165473169} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1165473169, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1165473169|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1165473169} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 21:22:07,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L801-->L801-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In240879023 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd3~0_In240879023 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In240879023 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In240879023 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out240879023|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite41_Out240879023| ~z$w_buff1_used~0_In240879023) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In240879023, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In240879023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In240879023, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In240879023} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In240879023, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In240879023, ~z$w_buff1_used~0=~z$w_buff1_used~0_In240879023, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In240879023, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out240879023|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 21:22:07,897 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [824] [824] L802-->L802-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1757503185 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In-1757503185 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1757503185| ~z$r_buff0_thd3~0_In-1757503185) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork0_#t~ite42_Out-1757503185|) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1757503185, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1757503185} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1757503185, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1757503185, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1757503185|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 21:22:07,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L803-->L803-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-544893256 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In-544893256 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-544893256 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-544893256 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out-544893256|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd3~0_In-544893256 |P2Thread1of1ForFork0_#t~ite43_Out-544893256|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-544893256, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-544893256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-544893256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544893256} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out-544893256|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-544893256, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-544893256, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-544893256, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-544893256} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 21:22:07,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L803-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~z$r_buff1_thd3~0_143 |v_P2Thread1of1ForFork0_#t~ite43_28|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_27|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_143, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 21:22:07,898 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L748-->L748-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1777675095 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd1~0_In-1777675095 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1777675095 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-1777675095 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1777675095| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-1777675095| ~z$w_buff1_used~0_In-1777675095) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1777675095, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1777675095, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1777675095, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1777675095} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1777675095, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-1777675095|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1777675095, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1777675095, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1777675095} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 21:22:07,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L749-->L750: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1633935144 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out-1633935144 ~z$r_buff0_thd1~0_In-1633935144)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1633935144 256) 0))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out-1633935144 0) (not .cse1) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1633935144, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1633935144} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1633935144, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-1633935144|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1633935144} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 21:22:07,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L750-->L750-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In1452458113 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In1452458113 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1452458113 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1452458113 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork1_#t~ite8_Out1452458113|)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out1452458113| ~z$r_buff1_thd1~0_In1452458113) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1452458113, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1452458113, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1452458113, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1452458113} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1452458113|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1452458113, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1452458113, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1452458113, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1452458113} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 21:22:07,899 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L750-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_100 |v_P0Thread1of1ForFork1_#t~ite8_42|) (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_41|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_100, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 21:22:07,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L770-->L770-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-2137579882 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-2137579882 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-2137579882 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2137579882 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite14_Out-2137579882| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-2137579882| ~z$r_buff1_thd2~0_In-2137579882)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2137579882, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2137579882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2137579882, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2137579882} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-2137579882, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-2137579882, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2137579882, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-2137579882|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-2137579882} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 21:22:07,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L770-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~z$r_buff1_thd2~0_120 |v_P1Thread1of1ForFork2_#t~ite14_32|) (= v_~__unbuffered_cnt~0_76 (+ v_~__unbuffered_cnt~0_77 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_32|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_120, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_31|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 21:22:07,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L826-1-->L832: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 21:22:07,900 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-2-->L832-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite48_Out-1326920347| |ULTIMATE.start_main_#t~ite47_Out-1326920347|)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In-1326920347 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1326920347 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite47_Out-1326920347| ~z$w_buff1~0_In-1326920347) (not .cse1) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= ~z~0_In-1326920347 |ULTIMATE.start_main_#t~ite47_Out-1326920347|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1326920347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1326920347, ~z$w_buff1~0=~z$w_buff1~0_In-1326920347, ~z~0=~z~0_In-1326920347} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1326920347, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1326920347|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1326920347, ~z$w_buff1~0=~z$w_buff1~0_In-1326920347, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1326920347|, ~z~0=~z~0_In-1326920347} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 21:22:07,901 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L833-->L833-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-943328630 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-943328630 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite49_Out-943328630|) (not .cse0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-943328630 |ULTIMATE.start_main_#t~ite49_Out-943328630|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-943328630, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-943328630} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-943328630, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-943328630, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-943328630|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 21:22:07,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L834-->L834-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In1596298600 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In1596298600 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1596298600 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In1596298600 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1596298600 |ULTIMATE.start_main_#t~ite50_Out1596298600|)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1596298600|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1596298600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1596298600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1596298600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1596298600} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1596298600|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1596298600, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1596298600, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1596298600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1596298600} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 21:22:07,902 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L835-->L835-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1384682134 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1384682134 256) 0))) (or (and (= ~z$r_buff0_thd0~0_In1384682134 |ULTIMATE.start_main_#t~ite51_Out1384682134|) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite51_Out1384682134| 0) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1384682134, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1384682134} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1384682134, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1384682134|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1384682134} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 21:22:07,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L836-->L836-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-137761490 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-137761490 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-137761490 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-137761490 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out-137761490| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite52_Out-137761490| ~z$r_buff1_thd0~0_In-137761490) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-137761490, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137761490, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-137761490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137761490} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-137761490|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-137761490, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-137761490, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-137761490, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-137761490} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 21:22:07,903 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [879] [879] L836-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_20 (ite (= 0 (ite (not (and (= 0 v_~__unbuffered_p1_EAX~0_25) (= 0 v_~__unbuffered_p0_EAX~0_99) (= 0 v_~__unbuffered_p2_EAX~0_26))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|) (= v_~z$r_buff1_thd0~0_143 |v_ULTIMATE.start_main_#t~ite52_43|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_13| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_19 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_43|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_99, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_42|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_25, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_143, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_26, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 21:22:07,960 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6a41dfe0-05d9-4b04-bb86-14f5262bcba6/bin/utaipan/witness.graphml [2019-12-07 21:22:07,961 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 21:22:07,962 INFO L168 Benchmark]: Toolchain (without parser) took 162123.90 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.3 GB). Free memory was 936.2 MB in the beginning and 4.6 GB in the end (delta: -3.7 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,962 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 957.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:22:07,962 INFO L168 Benchmark]: CACSL2BoogieTranslator took 391.16 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 936.2 MB in the beginning and 1.1 GB in the end (delta: -135.7 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,962 INFO L168 Benchmark]: Boogie Procedure Inliner took 44.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,963 INFO L168 Benchmark]: Boogie Preprocessor took 30.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 21:22:07,963 INFO L168 Benchmark]: RCFGBuilder took 412.19 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,963 INFO L168 Benchmark]: TraceAbstraction took 161162.99 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,963 INFO L168 Benchmark]: Witness Printer took 78.78 ms. Allocated memory is still 7.3 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. [2019-12-07 21:22:07,965 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 957.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 391.16 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.8 MB). Free memory was 936.2 MB in the beginning and 1.1 GB in the end (delta: -135.7 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 44.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 30.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 412.19 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 161162.99 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 78.78 ms. Allocated memory is still 7.3 GB. Free memory was 4.6 GB in the beginning and 4.6 GB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.4s, 176 ProgramPointsBefore, 95 ProgramPointsAfterwards, 213 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 33 TrivialSequentialCompositions, 55 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 29 ChoiceCompositions, 7276 VarBasedMoverChecksPositive, 432 VarBasedMoverChecksNegative, 272 SemBasedMoverChecksPositive, 254 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 130045 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L822] FCALL, FORK 0 pthread_create(&t1573, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L731] 1 z$w_buff1 = z$w_buff0 [L732] 1 z$w_buff0 = 1 [L733] 1 z$w_buff1_used = z$w_buff0_used [L734] 1 z$w_buff0_used = (_Bool)1 [L746] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t1574, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 x = 1 [L763] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L767] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L826] FCALL, FORK 0 pthread_create(&t1575, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L780] 3 y = 1 [L783] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L784] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L785] 3 z$flush_delayed = weak$$choice2 [L786] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L788] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L768] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L788] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L789] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L789] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L790] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L791] EXPR 3 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L793] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L793] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L794] 3 __unbuffered_p2_EAX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=7, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L746] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L747] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L799] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L800] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L801] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L802] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L748] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L769] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L832] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=7, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L833] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L834] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L835] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 167 locations, 2 error locations. Result: UNSAFE, OverallTime: 161.0s, OverallIterations: 28, TraceHistogramMax: 1, AutomataDifference: 56.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7085 SDtfs, 9443 SDslu, 30967 SDs, 0 SdLazy, 36361 SolverSat, 561 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 30.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 433 GetRequests, 32 SyntacticMatches, 25 SemanticMatches, 376 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2029 ImplicationChecksByTransitivity, 6.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=237826occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 76.0s AutomataMinimizationTime, 27 MinimizatonAttempts, 347055 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.3s InterpolantComputationTime, 1249 NumberOfCodeBlocks, 1249 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 1155 ConstructedInterpolants, 0 QuantifiedInterpolants, 447541 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...