./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe001_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe001_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c49be60bd9a91389863f36bfa2611725e3a4208 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 20:13:33,005 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 20:13:33,006 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 20:13:33,014 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 20:13:33,014 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 20:13:33,015 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 20:13:33,016 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 20:13:33,018 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 20:13:33,020 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 20:13:33,020 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 20:13:33,021 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 20:13:33,022 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 20:13:33,023 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 20:13:33,024 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 20:13:33,024 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 20:13:33,025 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 20:13:33,026 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 20:13:33,027 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 20:13:33,028 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 20:13:33,030 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 20:13:33,031 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 20:13:33,031 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 20:13:33,032 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 20:13:33,032 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 20:13:33,034 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 20:13:33,034 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 20:13:33,034 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 20:13:33,035 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 20:13:33,035 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 20:13:33,036 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 20:13:33,036 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 20:13:33,037 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 20:13:33,037 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 20:13:33,038 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 20:13:33,039 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 20:13:33,039 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 20:13:33,039 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 20:13:33,040 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 20:13:33,040 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 20:13:33,040 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 20:13:33,041 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 20:13:33,042 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 20:13:33,055 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 20:13:33,056 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 20:13:33,056 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 20:13:33,057 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 20:13:33,057 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 20:13:33,057 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 20:13:33,057 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 20:13:33,057 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 20:13:33,057 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 20:13:33,058 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 20:13:33,058 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 20:13:33,058 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 20:13:33,058 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 20:13:33,058 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 20:13:33,059 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 20:13:33,059 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 20:13:33,059 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 20:13:33,060 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 20:13:33,060 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 20:13:33,060 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 20:13:33,060 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 20:13:33,060 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 20:13:33,061 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 20:13:33,062 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 20:13:33,062 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 20:13:33,062 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 20:13:33,062 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:13:33,062 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 20:13:33,062 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 20:13:33,063 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c49be60bd9a91389863f36bfa2611725e3a4208 [2019-12-07 20:13:33,162 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 20:13:33,172 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 20:13:33,174 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 20:13:33,176 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 20:13:33,176 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 20:13:33,177 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe001_pso.opt.i [2019-12-07 20:13:33,223 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/data/c175cccf5/e1c1805cefd048ee9b24562b1a0d38e1/FLAG2b9fdc5ef [2019-12-07 20:13:33,682 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 20:13:33,683 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/sv-benchmarks/c/pthread-wmm/safe001_pso.opt.i [2019-12-07 20:13:33,694 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/data/c175cccf5/e1c1805cefd048ee9b24562b1a0d38e1/FLAG2b9fdc5ef [2019-12-07 20:13:33,704 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/data/c175cccf5/e1c1805cefd048ee9b24562b1a0d38e1 [2019-12-07 20:13:33,705 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 20:13:33,706 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 20:13:33,707 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 20:13:33,707 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 20:13:33,709 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 20:13:33,710 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:13:33" (1/1) ... [2019-12-07 20:13:33,711 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:33, skipping insertion in model container [2019-12-07 20:13:33,712 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:13:33" (1/1) ... [2019-12-07 20:13:33,716 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 20:13:33,745 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 20:13:33,988 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:13:33,996 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 20:13:34,040 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:13:34,087 INFO L208 MainTranslator]: Completed translation [2019-12-07 20:13:34,088 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34 WrapperNode [2019-12-07 20:13:34,088 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 20:13:34,088 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 20:13:34,088 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 20:13:34,088 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 20:13:34,094 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,107 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,129 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 20:13:34,129 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 20:13:34,129 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 20:13:34,129 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 20:13:34,136 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,136 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,139 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,140 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,147 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,149 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,152 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... [2019-12-07 20:13:34,155 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 20:13:34,156 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 20:13:34,156 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 20:13:34,156 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 20:13:34,156 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:13:34,195 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 20:13:34,195 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 20:13:34,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 20:13:34,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 20:13:34,196 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 20:13:34,196 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 20:13:34,196 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 20:13:34,197 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 20:13:34,564 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 20:13:34,564 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 20:13:34,565 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:13:34 BoogieIcfgContainer [2019-12-07 20:13:34,565 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 20:13:34,565 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 20:13:34,565 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 20:13:34,567 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 20:13:34,567 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 08:13:33" (1/3) ... [2019-12-07 20:13:34,568 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68cb33b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:13:34, skipping insertion in model container [2019-12-07 20:13:34,568 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:13:34" (2/3) ... [2019-12-07 20:13:34,568 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@68cb33b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:13:34, skipping insertion in model container [2019-12-07 20:13:34,568 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:13:34" (3/3) ... [2019-12-07 20:13:34,569 INFO L109 eAbstractionObserver]: Analyzing ICFG safe001_pso.opt.i [2019-12-07 20:13:34,576 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 20:13:34,576 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 20:13:34,581 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 20:13:34,581 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,605 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,606 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,607 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,608 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,609 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:13:34,627 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 20:13:34,640 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 20:13:34,640 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 20:13:34,640 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 20:13:34,640 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 20:13:34,640 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 20:13:34,640 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 20:13:34,640 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 20:13:34,640 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 20:13:34,651 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 20:13:34,652 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 20:13:34,706 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 20:13:34,706 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:13:34,715 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:13:34,729 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 20:13:34,758 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 20:13:34,758 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:13:34,764 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 20:13:34,779 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 20:13:34,780 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 20:13:37,621 WARN L192 SmtUtils]: Spent 155.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 20:13:37,708 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78277 [2019-12-07 20:13:37,708 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 20:13:37,710 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 106 transitions [2019-12-07 20:13:50,385 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 107408 states. [2019-12-07 20:13:50,386 INFO L276 IsEmpty]: Start isEmpty. Operand 107408 states. [2019-12-07 20:13:50,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 20:13:50,391 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:13:50,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 20:13:50,392 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:13:50,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:13:50,396 INFO L82 PathProgramCache]: Analyzing trace with hash 809703812, now seen corresponding path program 1 times [2019-12-07 20:13:50,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:13:50,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443121471] [2019-12-07 20:13:50,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:13:50,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:13:50,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:13:50,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443121471] [2019-12-07 20:13:50,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:13:50,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 20:13:50,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168491856] [2019-12-07 20:13:50,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:13:50,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:13:50,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:13:50,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:13:50,585 INFO L87 Difference]: Start difference. First operand 107408 states. Second operand 3 states. [2019-12-07 20:13:51,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:13:51,382 INFO L93 Difference]: Finished difference Result 107108 states and 460900 transitions. [2019-12-07 20:13:51,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:13:51,383 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 20:13:51,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:13:51,987 INFO L225 Difference]: With dead ends: 107108 [2019-12-07 20:13:51,988 INFO L226 Difference]: Without dead ends: 104924 [2019-12-07 20:13:51,988 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:13:55,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104924 states. [2019-12-07 20:13:56,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104924 to 104924. [2019-12-07 20:13:56,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104924 states. [2019-12-07 20:13:57,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104924 states to 104924 states and 451982 transitions. [2019-12-07 20:13:57,086 INFO L78 Accepts]: Start accepts. Automaton has 104924 states and 451982 transitions. Word has length 5 [2019-12-07 20:13:57,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:13:57,086 INFO L462 AbstractCegarLoop]: Abstraction has 104924 states and 451982 transitions. [2019-12-07 20:13:57,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:13:57,087 INFO L276 IsEmpty]: Start isEmpty. Operand 104924 states and 451982 transitions. [2019-12-07 20:13:57,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 20:13:57,089 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:13:57,089 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:13:57,089 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:13:57,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:13:57,089 INFO L82 PathProgramCache]: Analyzing trace with hash 2105056515, now seen corresponding path program 1 times [2019-12-07 20:13:57,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:13:57,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897592772] [2019-12-07 20:13:57,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:13:57,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:13:57,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:13:57,163 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897592772] [2019-12-07 20:13:57,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:13:57,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:13:57,164 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082443218] [2019-12-07 20:13:57,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:13:57,165 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:13:57,165 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:13:57,165 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:13:57,165 INFO L87 Difference]: Start difference. First operand 104924 states and 451982 transitions. Second operand 4 states. [2019-12-07 20:13:58,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:13:58,020 INFO L93 Difference]: Finished difference Result 168606 states and 697152 transitions. [2019-12-07 20:13:58,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:13:58,021 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 20:13:58,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:13:58,512 INFO L225 Difference]: With dead ends: 168606 [2019-12-07 20:13:58,512 INFO L226 Difference]: Without dead ends: 168557 [2019-12-07 20:13:58,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:04,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168557 states. [2019-12-07 20:14:06,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168557 to 152629. [2019-12-07 20:14:06,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152629 states. [2019-12-07 20:14:07,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152629 states to 152629 states and 638547 transitions. [2019-12-07 20:14:07,088 INFO L78 Accepts]: Start accepts. Automaton has 152629 states and 638547 transitions. Word has length 11 [2019-12-07 20:14:07,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:07,088 INFO L462 AbstractCegarLoop]: Abstraction has 152629 states and 638547 transitions. [2019-12-07 20:14:07,088 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:14:07,089 INFO L276 IsEmpty]: Start isEmpty. Operand 152629 states and 638547 transitions. [2019-12-07 20:14:07,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 20:14:07,093 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:07,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:07,093 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:07,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:07,093 INFO L82 PathProgramCache]: Analyzing trace with hash 2027270657, now seen corresponding path program 1 times [2019-12-07 20:14:07,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:07,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614814796] [2019-12-07 20:14:07,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:07,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:07,150 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:07,150 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614814796] [2019-12-07 20:14:07,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:07,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:14:07,150 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1440922716] [2019-12-07 20:14:07,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:14:07,151 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:07,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:14:07,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:14:07,151 INFO L87 Difference]: Start difference. First operand 152629 states and 638547 transitions. Second operand 4 states. [2019-12-07 20:14:08,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:08,166 INFO L93 Difference]: Finished difference Result 217678 states and 889823 transitions. [2019-12-07 20:14:08,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:14:08,167 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 20:14:08,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:08,706 INFO L225 Difference]: With dead ends: 217678 [2019-12-07 20:14:08,706 INFO L226 Difference]: Without dead ends: 217615 [2019-12-07 20:14:08,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:13,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217615 states. [2019-12-07 20:14:17,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217615 to 183279. [2019-12-07 20:14:17,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183279 states. [2019-12-07 20:14:18,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183279 states to 183279 states and 761454 transitions. [2019-12-07 20:14:18,489 INFO L78 Accepts]: Start accepts. Automaton has 183279 states and 761454 transitions. Word has length 13 [2019-12-07 20:14:18,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:18,489 INFO L462 AbstractCegarLoop]: Abstraction has 183279 states and 761454 transitions. [2019-12-07 20:14:18,489 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:14:18,490 INFO L276 IsEmpty]: Start isEmpty. Operand 183279 states and 761454 transitions. [2019-12-07 20:14:18,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 20:14:18,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:18,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:18,492 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:18,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:18,492 INFO L82 PathProgramCache]: Analyzing trace with hash 1789207667, now seen corresponding path program 1 times [2019-12-07 20:14:18,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:18,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441875988] [2019-12-07 20:14:18,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:18,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:18,525 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:18,525 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441875988] [2019-12-07 20:14:18,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:18,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:14:18,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [832026553] [2019-12-07 20:14:18,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:18,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:18,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:18,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:18,526 INFO L87 Difference]: Start difference. First operand 183279 states and 761454 transitions. Second operand 3 states. [2019-12-07 20:14:18,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:18,626 INFO L93 Difference]: Finished difference Result 36985 states and 120640 transitions. [2019-12-07 20:14:18,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:18,626 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 20:14:18,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:18,677 INFO L225 Difference]: With dead ends: 36985 [2019-12-07 20:14:18,677 INFO L226 Difference]: Without dead ends: 36985 [2019-12-07 20:14:18,677 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:18,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36985 states. [2019-12-07 20:14:19,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36985 to 36985. [2019-12-07 20:14:19,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36985 states. [2019-12-07 20:14:19,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36985 states to 36985 states and 120640 transitions. [2019-12-07 20:14:19,248 INFO L78 Accepts]: Start accepts. Automaton has 36985 states and 120640 transitions. Word has length 13 [2019-12-07 20:14:19,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:19,249 INFO L462 AbstractCegarLoop]: Abstraction has 36985 states and 120640 transitions. [2019-12-07 20:14:19,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:19,249 INFO L276 IsEmpty]: Start isEmpty. Operand 36985 states and 120640 transitions. [2019-12-07 20:14:19,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 20:14:19,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:19,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:19,251 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:19,251 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:19,252 INFO L82 PathProgramCache]: Analyzing trace with hash 1405830784, now seen corresponding path program 1 times [2019-12-07 20:14:19,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:19,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173016576] [2019-12-07 20:14:19,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:19,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:19,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:19,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173016576] [2019-12-07 20:14:19,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:19,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:14:19,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730484894] [2019-12-07 20:14:19,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:14:19,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:19,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:14:19,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:19,310 INFO L87 Difference]: Start difference. First operand 36985 states and 120640 transitions. Second operand 5 states. [2019-12-07 20:14:19,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:19,787 INFO L93 Difference]: Finished difference Result 50257 states and 160609 transitions. [2019-12-07 20:14:19,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:14:19,787 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 20:14:19,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:19,861 INFO L225 Difference]: With dead ends: 50257 [2019-12-07 20:14:19,861 INFO L226 Difference]: Without dead ends: 50244 [2019-12-07 20:14:19,862 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:14:20,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50244 states. [2019-12-07 20:14:20,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50244 to 37328. [2019-12-07 20:14:20,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37328 states. [2019-12-07 20:14:20,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37328 states to 37328 states and 121606 transitions. [2019-12-07 20:14:20,914 INFO L78 Accepts]: Start accepts. Automaton has 37328 states and 121606 transitions. Word has length 19 [2019-12-07 20:14:20,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:20,914 INFO L462 AbstractCegarLoop]: Abstraction has 37328 states and 121606 transitions. [2019-12-07 20:14:20,915 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:14:20,915 INFO L276 IsEmpty]: Start isEmpty. Operand 37328 states and 121606 transitions. [2019-12-07 20:14:20,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 20:14:20,921 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:20,921 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:20,921 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:20,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:20,921 INFO L82 PathProgramCache]: Analyzing trace with hash -1721998258, now seen corresponding path program 1 times [2019-12-07 20:14:20,922 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:20,922 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322980312] [2019-12-07 20:14:20,922 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:20,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:20,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:20,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322980312] [2019-12-07 20:14:20,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:20,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:14:20,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1951458753] [2019-12-07 20:14:20,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:14:20,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:20,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:14:20,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:14:20,965 INFO L87 Difference]: Start difference. First operand 37328 states and 121606 transitions. Second operand 4 states. [2019-12-07 20:14:20,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:20,991 INFO L93 Difference]: Finished difference Result 7104 states and 19431 transitions. [2019-12-07 20:14:20,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:14:20,992 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 20:14:20,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:20,998 INFO L225 Difference]: With dead ends: 7104 [2019-12-07 20:14:20,998 INFO L226 Difference]: Without dead ends: 7104 [2019-12-07 20:14:20,998 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:14:21,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7104 states. [2019-12-07 20:14:21,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7104 to 6992. [2019-12-07 20:14:21,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6992 states. [2019-12-07 20:14:21,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6992 states to 6992 states and 19111 transitions. [2019-12-07 20:14:21,076 INFO L78 Accepts]: Start accepts. Automaton has 6992 states and 19111 transitions. Word has length 25 [2019-12-07 20:14:21,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:21,077 INFO L462 AbstractCegarLoop]: Abstraction has 6992 states and 19111 transitions. [2019-12-07 20:14:21,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:14:21,077 INFO L276 IsEmpty]: Start isEmpty. Operand 6992 states and 19111 transitions. [2019-12-07 20:14:21,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 20:14:21,084 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:21,084 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:21,084 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:21,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:21,084 INFO L82 PathProgramCache]: Analyzing trace with hash 2138974623, now seen corresponding path program 1 times [2019-12-07 20:14:21,084 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:21,084 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781920062] [2019-12-07 20:14:21,084 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:21,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:21,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:21,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781920062] [2019-12-07 20:14:21,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:21,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:14:21,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [32392005] [2019-12-07 20:14:21,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:14:21,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:21,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:14:21,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:14:21,170 INFO L87 Difference]: Start difference. First operand 6992 states and 19111 transitions. Second operand 6 states. [2019-12-07 20:14:21,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:21,600 INFO L93 Difference]: Finished difference Result 8140 states and 21627 transitions. [2019-12-07 20:14:21,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 20:14:21,600 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 37 [2019-12-07 20:14:21,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:21,606 INFO L225 Difference]: With dead ends: 8140 [2019-12-07 20:14:21,607 INFO L226 Difference]: Without dead ends: 8140 [2019-12-07 20:14:21,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 20:14:21,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8140 states. [2019-12-07 20:14:21,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8140 to 7489. [2019-12-07 20:14:21,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7489 states. [2019-12-07 20:14:21,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7489 states to 7489 states and 20169 transitions. [2019-12-07 20:14:21,688 INFO L78 Accepts]: Start accepts. Automaton has 7489 states and 20169 transitions. Word has length 37 [2019-12-07 20:14:21,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:21,689 INFO L462 AbstractCegarLoop]: Abstraction has 7489 states and 20169 transitions. [2019-12-07 20:14:21,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:14:21,689 INFO L276 IsEmpty]: Start isEmpty. Operand 7489 states and 20169 transitions. [2019-12-07 20:14:21,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 20:14:21,697 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:21,697 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:21,697 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:21,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:21,697 INFO L82 PathProgramCache]: Analyzing trace with hash -1127095474, now seen corresponding path program 1 times [2019-12-07 20:14:21,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:21,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174815244] [2019-12-07 20:14:21,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:21,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:21,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:21,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174815244] [2019-12-07 20:14:21,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:21,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:14:21,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282326043] [2019-12-07 20:14:21,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:21,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:21,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:21,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:21,730 INFO L87 Difference]: Start difference. First operand 7489 states and 20169 transitions. Second operand 3 states. [2019-12-07 20:14:21,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:21,771 INFO L93 Difference]: Finished difference Result 7952 states and 21268 transitions. [2019-12-07 20:14:21,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:21,771 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 20:14:21,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:21,778 INFO L225 Difference]: With dead ends: 7952 [2019-12-07 20:14:21,778 INFO L226 Difference]: Without dead ends: 7952 [2019-12-07 20:14:21,778 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:21,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7952 states. [2019-12-07 20:14:21,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7952 to 7794. [2019-12-07 20:14:21,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7794 states. [2019-12-07 20:14:21,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7794 states to 7794 states and 20945 transitions. [2019-12-07 20:14:21,864 INFO L78 Accepts]: Start accepts. Automaton has 7794 states and 20945 transitions. Word has length 51 [2019-12-07 20:14:21,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:21,864 INFO L462 AbstractCegarLoop]: Abstraction has 7794 states and 20945 transitions. [2019-12-07 20:14:21,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:21,864 INFO L276 IsEmpty]: Start isEmpty. Operand 7794 states and 20945 transitions. [2019-12-07 20:14:21,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 20:14:21,872 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:21,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:21,873 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:21,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:21,873 INFO L82 PathProgramCache]: Analyzing trace with hash -994376569, now seen corresponding path program 1 times [2019-12-07 20:14:21,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:21,873 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966807793] [2019-12-07 20:14:21,873 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:21,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:22,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:22,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966807793] [2019-12-07 20:14:22,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:22,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 20:14:22,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [294265743] [2019-12-07 20:14:22,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 20:14:22,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:22,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 20:14:22,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:14:22,094 INFO L87 Difference]: Start difference. First operand 7794 states and 20945 transitions. Second operand 9 states. [2019-12-07 20:14:22,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:22,919 INFO L93 Difference]: Finished difference Result 8507 states and 22460 transitions. [2019-12-07 20:14:22,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 20:14:22,920 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 51 [2019-12-07 20:14:22,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:22,932 INFO L225 Difference]: With dead ends: 8507 [2019-12-07 20:14:22,932 INFO L226 Difference]: Without dead ends: 8506 [2019-12-07 20:14:22,933 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=92, Invalid=328, Unknown=0, NotChecked=0, Total=420 [2019-12-07 20:14:22,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8506 states. [2019-12-07 20:14:23,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8506 to 7963. [2019-12-07 20:14:23,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7963 states. [2019-12-07 20:14:23,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7963 states to 7963 states and 21280 transitions. [2019-12-07 20:14:23,028 INFO L78 Accepts]: Start accepts. Automaton has 7963 states and 21280 transitions. Word has length 51 [2019-12-07 20:14:23,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:23,029 INFO L462 AbstractCegarLoop]: Abstraction has 7963 states and 21280 transitions. [2019-12-07 20:14:23,029 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 20:14:23,029 INFO L276 IsEmpty]: Start isEmpty. Operand 7963 states and 21280 transitions. [2019-12-07 20:14:23,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 20:14:23,036 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:23,036 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:23,036 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:23,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:23,037 INFO L82 PathProgramCache]: Analyzing trace with hash -608495080, now seen corresponding path program 1 times [2019-12-07 20:14:23,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:23,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845410986] [2019-12-07 20:14:23,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:23,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:23,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:23,130 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845410986] [2019-12-07 20:14:23,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:23,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:14:23,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137096195] [2019-12-07 20:14:23,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:14:23,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:23,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:14:23,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:14:23,131 INFO L87 Difference]: Start difference. First operand 7963 states and 21280 transitions. Second operand 7 states. [2019-12-07 20:14:23,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:23,702 INFO L93 Difference]: Finished difference Result 8823 states and 23186 transitions. [2019-12-07 20:14:23,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 20:14:23,703 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-07 20:14:23,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:23,710 INFO L225 Difference]: With dead ends: 8823 [2019-12-07 20:14:23,710 INFO L226 Difference]: Without dead ends: 8822 [2019-12-07 20:14:23,710 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2019-12-07 20:14:23,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8822 states. [2019-12-07 20:14:23,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8822 to 8052. [2019-12-07 20:14:23,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8052 states. [2019-12-07 20:14:23,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8052 states to 8052 states and 21508 transitions. [2019-12-07 20:14:23,800 INFO L78 Accepts]: Start accepts. Automaton has 8052 states and 21508 transitions. Word has length 51 [2019-12-07 20:14:23,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:23,800 INFO L462 AbstractCegarLoop]: Abstraction has 8052 states and 21508 transitions. [2019-12-07 20:14:23,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:14:23,800 INFO L276 IsEmpty]: Start isEmpty. Operand 8052 states and 21508 transitions. [2019-12-07 20:14:23,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 20:14:23,809 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:23,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:23,809 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:23,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:23,809 INFO L82 PathProgramCache]: Analyzing trace with hash 2008954830, now seen corresponding path program 1 times [2019-12-07 20:14:23,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:23,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1231632592] [2019-12-07 20:14:23,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:23,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:23,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:23,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1231632592] [2019-12-07 20:14:23,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:23,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:14:23,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [426163583] [2019-12-07 20:14:23,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:23,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:23,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:23,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:23,838 INFO L87 Difference]: Start difference. First operand 8052 states and 21508 transitions. Second operand 3 states. [2019-12-07 20:14:23,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:23,878 INFO L93 Difference]: Finished difference Result 8228 states and 21352 transitions. [2019-12-07 20:14:23,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:23,879 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 20:14:23,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:23,885 INFO L225 Difference]: With dead ends: 8228 [2019-12-07 20:14:23,885 INFO L226 Difference]: Without dead ends: 8228 [2019-12-07 20:14:23,885 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:23,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8228 states. [2019-12-07 20:14:23,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8228 to 7772. [2019-12-07 20:14:23,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7772 states. [2019-12-07 20:14:23,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7772 states to 7772 states and 20440 transitions. [2019-12-07 20:14:23,965 INFO L78 Accepts]: Start accepts. Automaton has 7772 states and 20440 transitions. Word has length 54 [2019-12-07 20:14:23,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:23,966 INFO L462 AbstractCegarLoop]: Abstraction has 7772 states and 20440 transitions. [2019-12-07 20:14:23,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:23,966 INFO L276 IsEmpty]: Start isEmpty. Operand 7772 states and 20440 transitions. [2019-12-07 20:14:23,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 20:14:23,974 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:23,974 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:23,974 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:23,974 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:23,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1999242964, now seen corresponding path program 1 times [2019-12-07 20:14:23,974 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:23,974 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1951206039] [2019-12-07 20:14:23,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:23,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:24,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:24,015 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1951206039] [2019-12-07 20:14:24,015 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:24,015 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:14:24,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780280806] [2019-12-07 20:14:24,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:24,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:24,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:24,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,016 INFO L87 Difference]: Start difference. First operand 7772 states and 20440 transitions. Second operand 3 states. [2019-12-07 20:14:24,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:24,036 INFO L93 Difference]: Finished difference Result 7772 states and 20191 transitions. [2019-12-07 20:14:24,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:24,036 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 20:14:24,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:24,042 INFO L225 Difference]: With dead ends: 7772 [2019-12-07 20:14:24,042 INFO L226 Difference]: Without dead ends: 7772 [2019-12-07 20:14:24,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7772 states. [2019-12-07 20:14:24,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7772 to 7738. [2019-12-07 20:14:24,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7738 states. [2019-12-07 20:14:24,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7738 states to 7738 states and 20123 transitions. [2019-12-07 20:14:24,119 INFO L78 Accepts]: Start accepts. Automaton has 7738 states and 20123 transitions. Word has length 54 [2019-12-07 20:14:24,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:24,119 INFO L462 AbstractCegarLoop]: Abstraction has 7738 states and 20123 transitions. [2019-12-07 20:14:24,119 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:24,119 INFO L276 IsEmpty]: Start isEmpty. Operand 7738 states and 20123 transitions. [2019-12-07 20:14:24,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 20:14:24,127 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:24,127 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:24,127 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:24,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:24,127 INFO L82 PathProgramCache]: Analyzing trace with hash -2113922982, now seen corresponding path program 1 times [2019-12-07 20:14:24,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:24,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [988814575] [2019-12-07 20:14:24,127 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:24,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:24,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:24,178 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [988814575] [2019-12-07 20:14:24,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:24,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:14:24,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333534822] [2019-12-07 20:14:24,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:14:24,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:24,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:14:24,179 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:24,179 INFO L87 Difference]: Start difference. First operand 7738 states and 20123 transitions. Second operand 5 states. [2019-12-07 20:14:24,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:24,535 INFO L93 Difference]: Finished difference Result 11307 states and 29226 transitions. [2019-12-07 20:14:24,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:14:24,536 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 20:14:24,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:24,544 INFO L225 Difference]: With dead ends: 11307 [2019-12-07 20:14:24,544 INFO L226 Difference]: Without dead ends: 11307 [2019-12-07 20:14:24,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:14:24,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11307 states. [2019-12-07 20:14:24,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11307 to 9453. [2019-12-07 20:14:24,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9453 states. [2019-12-07 20:14:24,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9453 states to 9453 states and 24695 transitions. [2019-12-07 20:14:24,648 INFO L78 Accepts]: Start accepts. Automaton has 9453 states and 24695 transitions. Word has length 54 [2019-12-07 20:14:24,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:24,649 INFO L462 AbstractCegarLoop]: Abstraction has 9453 states and 24695 transitions. [2019-12-07 20:14:24,649 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:14:24,649 INFO L276 IsEmpty]: Start isEmpty. Operand 9453 states and 24695 transitions. [2019-12-07 20:14:24,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 20:14:24,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:24,659 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:24,659 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:24,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:24,659 INFO L82 PathProgramCache]: Analyzing trace with hash 578087568, now seen corresponding path program 2 times [2019-12-07 20:14:24,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:24,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [431753451] [2019-12-07 20:14:24,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:24,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:24,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:24,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [431753451] [2019-12-07 20:14:24,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:24,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:14:24,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [226235746] [2019-12-07 20:14:24,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:24,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:24,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:24,696 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,696 INFO L87 Difference]: Start difference. First operand 9453 states and 24695 transitions. Second operand 3 states. [2019-12-07 20:14:24,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:24,716 INFO L93 Difference]: Finished difference Result 7419 states and 19040 transitions. [2019-12-07 20:14:24,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:24,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 20:14:24,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:24,723 INFO L225 Difference]: With dead ends: 7419 [2019-12-07 20:14:24,723 INFO L226 Difference]: Without dead ends: 7419 [2019-12-07 20:14:24,723 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7419 states. [2019-12-07 20:14:24,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7419 to 7385. [2019-12-07 20:14:24,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7385 states. [2019-12-07 20:14:24,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7385 states to 7385 states and 18972 transitions. [2019-12-07 20:14:24,803 INFO L78 Accepts]: Start accepts. Automaton has 7385 states and 18972 transitions. Word has length 54 [2019-12-07 20:14:24,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:24,803 INFO L462 AbstractCegarLoop]: Abstraction has 7385 states and 18972 transitions. [2019-12-07 20:14:24,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:24,803 INFO L276 IsEmpty]: Start isEmpty. Operand 7385 states and 18972 transitions. [2019-12-07 20:14:24,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 20:14:24,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:24,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:24,809 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:24,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:24,809 INFO L82 PathProgramCache]: Analyzing trace with hash -1558653724, now seen corresponding path program 1 times [2019-12-07 20:14:24,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:24,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [556834962] [2019-12-07 20:14:24,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:24,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:24,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:24,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [556834962] [2019-12-07 20:14:24,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:24,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:14:24,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1999219466] [2019-12-07 20:14:24,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:14:24,846 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:24,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:14:24,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,846 INFO L87 Difference]: Start difference. First operand 7385 states and 18972 transitions. Second operand 3 states. [2019-12-07 20:14:24,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:24,887 INFO L93 Difference]: Finished difference Result 7385 states and 18934 transitions. [2019-12-07 20:14:24,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:14:24,887 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 20:14:24,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:24,892 INFO L225 Difference]: With dead ends: 7385 [2019-12-07 20:14:24,892 INFO L226 Difference]: Without dead ends: 7385 [2019-12-07 20:14:24,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:14:24,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7385 states. [2019-12-07 20:14:24,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7385 to 7385. [2019-12-07 20:14:24,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7385 states. [2019-12-07 20:14:24,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7385 states to 7385 states and 18934 transitions. [2019-12-07 20:14:24,966 INFO L78 Accepts]: Start accepts. Automaton has 7385 states and 18934 transitions. Word has length 55 [2019-12-07 20:14:24,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:24,966 INFO L462 AbstractCegarLoop]: Abstraction has 7385 states and 18934 transitions. [2019-12-07 20:14:24,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:14:24,966 INFO L276 IsEmpty]: Start isEmpty. Operand 7385 states and 18934 transitions. [2019-12-07 20:14:24,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 20:14:24,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:24,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:24,971 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:24,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:24,971 INFO L82 PathProgramCache]: Analyzing trace with hash -816764805, now seen corresponding path program 1 times [2019-12-07 20:14:24,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:24,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750761376] [2019-12-07 20:14:24,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:24,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:25,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:25,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1750761376] [2019-12-07 20:14:25,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:25,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:14:25,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186726596] [2019-12-07 20:14:25,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:14:25,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:25,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:14:25,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:14:25,050 INFO L87 Difference]: Start difference. First operand 7385 states and 18934 transitions. Second operand 6 states. [2019-12-07 20:14:25,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:25,158 INFO L93 Difference]: Finished difference Result 9292 states and 24158 transitions. [2019-12-07 20:14:25,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:14:25,158 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 20:14:25,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:25,165 INFO L225 Difference]: With dead ends: 9292 [2019-12-07 20:14:25,165 INFO L226 Difference]: Without dead ends: 9187 [2019-12-07 20:14:25,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-07 20:14:25,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9187 states. [2019-12-07 20:14:25,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9187 to 7610. [2019-12-07 20:14:25,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7610 states. [2019-12-07 20:14:25,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7610 states to 7610 states and 19437 transitions. [2019-12-07 20:14:25,253 INFO L78 Accepts]: Start accepts. Automaton has 7610 states and 19437 transitions. Word has length 56 [2019-12-07 20:14:25,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:25,253 INFO L462 AbstractCegarLoop]: Abstraction has 7610 states and 19437 transitions. [2019-12-07 20:14:25,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:14:25,253 INFO L276 IsEmpty]: Start isEmpty. Operand 7610 states and 19437 transitions. [2019-12-07 20:14:25,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 20:14:25,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:25,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:25,259 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:25,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:25,259 INFO L82 PathProgramCache]: Analyzing trace with hash 492964039, now seen corresponding path program 1 times [2019-12-07 20:14:25,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:25,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150574325] [2019-12-07 20:14:25,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:25,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:25,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:25,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150574325] [2019-12-07 20:14:25,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:25,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:14:25,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1794522380] [2019-12-07 20:14:25,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:14:25,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:25,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:14:25,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:14:25,325 INFO L87 Difference]: Start difference. First operand 7610 states and 19437 transitions. Second operand 6 states. [2019-12-07 20:14:25,553 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification that was a NOOP. DAG size: 22 [2019-12-07 20:14:25,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:25,608 INFO L93 Difference]: Finished difference Result 9330 states and 24329 transitions. [2019-12-07 20:14:25,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 20:14:25,608 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 56 [2019-12-07 20:14:25,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:25,614 INFO L225 Difference]: With dead ends: 9330 [2019-12-07 20:14:25,614 INFO L226 Difference]: Without dead ends: 9288 [2019-12-07 20:14:25,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:14:25,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9288 states. [2019-12-07 20:14:25,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9288 to 7606. [2019-12-07 20:14:25,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7606 states. [2019-12-07 20:14:25,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7606 states to 7606 states and 19427 transitions. [2019-12-07 20:14:25,702 INFO L78 Accepts]: Start accepts. Automaton has 7606 states and 19427 transitions. Word has length 56 [2019-12-07 20:14:25,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:25,702 INFO L462 AbstractCegarLoop]: Abstraction has 7606 states and 19427 transitions. [2019-12-07 20:14:25,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:14:25,702 INFO L276 IsEmpty]: Start isEmpty. Operand 7606 states and 19427 transitions. [2019-12-07 20:14:25,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 20:14:25,707 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:25,707 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:25,707 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:25,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:25,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1175401758, now seen corresponding path program 1 times [2019-12-07 20:14:25,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:25,708 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112244529] [2019-12-07 20:14:25,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:25,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:25,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:25,781 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112244529] [2019-12-07 20:14:25,781 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:25,781 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:14:25,781 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422175101] [2019-12-07 20:14:25,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:14:25,782 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:25,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:14:25,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:14:25,782 INFO L87 Difference]: Start difference. First operand 7606 states and 19427 transitions. Second operand 7 states. [2019-12-07 20:14:25,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:25,873 INFO L93 Difference]: Finished difference Result 15814 states and 40756 transitions. [2019-12-07 20:14:25,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:14:25,873 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2019-12-07 20:14:25,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:25,879 INFO L225 Difference]: With dead ends: 15814 [2019-12-07 20:14:25,880 INFO L226 Difference]: Without dead ends: 8711 [2019-12-07 20:14:25,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 20:14:25,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8711 states. [2019-12-07 20:14:25,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8711 to 7200. [2019-12-07 20:14:25,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7200 states. [2019-12-07 20:14:25,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7200 states to 7200 states and 18310 transitions. [2019-12-07 20:14:25,958 INFO L78 Accepts]: Start accepts. Automaton has 7200 states and 18310 transitions. Word has length 57 [2019-12-07 20:14:25,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:25,958 INFO L462 AbstractCegarLoop]: Abstraction has 7200 states and 18310 transitions. [2019-12-07 20:14:25,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:14:25,958 INFO L276 IsEmpty]: Start isEmpty. Operand 7200 states and 18310 transitions. [2019-12-07 20:14:25,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 20:14:25,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:25,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:25,963 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:25,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:25,963 INFO L82 PathProgramCache]: Analyzing trace with hash -1161471228, now seen corresponding path program 2 times [2019-12-07 20:14:25,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:25,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1097626467] [2019-12-07 20:14:25,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:25,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:26,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:26,037 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1097626467] [2019-12-07 20:14:26,037 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:26,037 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:14:26,037 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [239652532] [2019-12-07 20:14:26,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:14:26,037 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:26,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:14:26,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:14:26,038 INFO L87 Difference]: Start difference. First operand 7200 states and 18310 transitions. Second operand 7 states. [2019-12-07 20:14:26,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:26,113 INFO L93 Difference]: Finished difference Result 10924 states and 27850 transitions. [2019-12-07 20:14:26,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:14:26,114 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 57 [2019-12-07 20:14:26,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:26,117 INFO L225 Difference]: With dead ends: 10924 [2019-12-07 20:14:26,117 INFO L226 Difference]: Without dead ends: 4241 [2019-12-07 20:14:26,117 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 20:14:26,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4241 states. [2019-12-07 20:14:26,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4241 to 3803. [2019-12-07 20:14:26,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3803 states. [2019-12-07 20:14:26,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3803 states to 3803 states and 9725 transitions. [2019-12-07 20:14:26,161 INFO L78 Accepts]: Start accepts. Automaton has 3803 states and 9725 transitions. Word has length 57 [2019-12-07 20:14:26,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:26,161 INFO L462 AbstractCegarLoop]: Abstraction has 3803 states and 9725 transitions. [2019-12-07 20:14:26,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:14:26,162 INFO L276 IsEmpty]: Start isEmpty. Operand 3803 states and 9725 transitions. [2019-12-07 20:14:26,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 20:14:26,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:26,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:26,164 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:26,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:26,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1863064823, now seen corresponding path program 1 times [2019-12-07 20:14:26,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:26,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89497515] [2019-12-07 20:14:26,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:26,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:14:26,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:14:26,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89497515] [2019-12-07 20:14:26,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:14:26,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:14:26,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1559666648] [2019-12-07 20:14:26,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:14:26,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:14:26,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:14:26,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:26,198 INFO L87 Difference]: Start difference. First operand 3803 states and 9725 transitions. Second operand 5 states. [2019-12-07 20:14:26,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:14:26,219 INFO L93 Difference]: Finished difference Result 2200 states and 6194 transitions. [2019-12-07 20:14:26,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:14:26,219 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 57 [2019-12-07 20:14:26,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:14:26,221 INFO L225 Difference]: With dead ends: 2200 [2019-12-07 20:14:26,222 INFO L226 Difference]: Without dead ends: 2200 [2019-12-07 20:14:26,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:14:26,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2200 states. [2019-12-07 20:14:26,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2200 to 2200. [2019-12-07 20:14:26,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2200 states. [2019-12-07 20:14:26,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2200 states to 2200 states and 6194 transitions. [2019-12-07 20:14:26,261 INFO L78 Accepts]: Start accepts. Automaton has 2200 states and 6194 transitions. Word has length 57 [2019-12-07 20:14:26,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:14:26,262 INFO L462 AbstractCegarLoop]: Abstraction has 2200 states and 6194 transitions. [2019-12-07 20:14:26,262 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:14:26,262 INFO L276 IsEmpty]: Start isEmpty. Operand 2200 states and 6194 transitions. [2019-12-07 20:14:26,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 20:14:26,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:14:26,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:14:26,264 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:14:26,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:14:26,265 INFO L82 PathProgramCache]: Analyzing trace with hash -1259160564, now seen corresponding path program 1 times [2019-12-07 20:14:26,265 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:14:26,265 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95736825] [2019-12-07 20:14:26,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:14:26,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:14:26,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:14:26,342 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 20:14:26,342 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 20:14:26,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1810~0.base_20| 1)) (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1810~0.base_20| 4)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1810~0.base_20|) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= |v_ULTIMATE.start_main_~#t1810~0.offset_17| 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1810~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1810~0.base_20|) |v_ULTIMATE.start_main_~#t1810~0.offset_17| 0)) |v_#memory_int_21|) (= v_~x$r_buff0_thd0~0_372 0) (= v_~y~0_143 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p0_EAX~0_24) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t1810~0.base_20|) 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t1810~0.offset=|v_ULTIMATE.start_main_~#t1810~0.offset_17|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_~#t1811~0.base=|v_ULTIMATE.start_main_~#t1811~0.base_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1810~0.base=|v_ULTIMATE.start_main_~#t1810~0.base_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ULTIMATE.start_main_~#t1812~0.base=|v_ULTIMATE.start_main_~#t1812~0.base_20|, ~y~0=v_~y~0_143, ULTIMATE.start_main_~#t1811~0.offset=|v_ULTIMATE.start_main_~#t1811~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t1812~0.offset=|v_ULTIMATE.start_main_~#t1812~0.offset_16|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1810~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t1811~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1810~0.base, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1812~0.base, ~y~0, ULTIMATE.start_main_~#t1811~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1812~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 20:14:26,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1811~0.base_11| 0)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1811~0.base_11| 1) |v_#valid_31|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1811~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1811~0.base_11|)) (= |v_ULTIMATE.start_main_~#t1811~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1811~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1811~0.base_11|) |v_ULTIMATE.start_main_~#t1811~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1811~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1811~0.base=|v_ULTIMATE.start_main_~#t1811~0.base_11|, ULTIMATE.start_main_~#t1811~0.offset=|v_ULTIMATE.start_main_~#t1811~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1811~0.base, ULTIMATE.start_main_~#t1811~0.offset] because there is no mapped edge [2019-12-07 20:14:26,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1812~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1812~0.base_9|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1812~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1812~0.base_9|) |v_ULTIMATE.start_main_~#t1812~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1812~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1812~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1812~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1812~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1812~0.base=|v_ULTIMATE.start_main_~#t1812~0.base_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1812~0.offset=|v_ULTIMATE.start_main_~#t1812~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t1812~0.base, #length, ULTIMATE.start_main_~#t1812~0.offset] because there is no mapped edge [2019-12-07 20:14:26,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 20:14:26,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-241338113 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-241338113 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x$w_buff1~0_In-241338113)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x~0_In-241338113) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-241338113|, ~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 20:14:26,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 20:14:26,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-534143727 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-534143727 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-534143727 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-534143727|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 20:14:26,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In1847898933 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1847898933 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1847898933 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1847898933 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|)) (and (= ~x$w_buff1_used~0_In1847898933 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1847898933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 20:14:26,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out427373014| |P0Thread1of1ForFork0_#t~ite3_Out427373014|)) (.cse1 (= (mod ~x$w_buff1_used~0_In427373014 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In427373014 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out427373014| ~x~0_In427373014)) (and .cse2 (= ~x$w_buff1~0_In427373014 |P0Thread1of1ForFork0_#t~ite3_Out427373014|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out427373014|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out427373014|, ~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 20:14:26,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2137251104 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2137251104 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2137251104 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2137251104|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:14:26,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1173307813 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1173307813 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1173307813 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1173307813 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| ~x$w_buff1_used~0_In-1173307813) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1173307813|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:14:26,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1247743138 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1247743138 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1247743138 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1247743138|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 20:14:26,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In135754150 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In135754150 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In135754150 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In135754150 256)))) (or (and (= ~x$r_buff1_thd3~0_In135754150 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out135754150|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 20:14:26,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:14:26,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1749269369 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1749269369 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-1749269369 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1749269369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 20:14:26,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In2125511565 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In2125511565 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In2125511565 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2125511565 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In2125511565 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2125511565|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:14:26,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 20:14:26,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In588482150 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In588482150 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In588482150 |P1Thread1of1ForFork1_#t~ite11_Out588482150|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out588482150| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out588482150|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:14:26,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-646713955 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-646713955 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-646713955 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-646713955 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|)) (and (= ~x$w_buff1_used~0_In-646713955 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-646713955|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out853370930 ~x$r_buff0_thd2~0_In853370930)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In853370930 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In853370930 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out853370930 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out853370930|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-63178737 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-63178737 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-63178737 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-63178737 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-63178737| ~x$r_buff1_thd2~0_In-63178737)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-63178737|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-63178737|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1019323862 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In1019323862 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1019323862| |ULTIMATE.start_main_#t~ite25_Out1019323862|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x~0_In1019323862) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x$w_buff1~0_In1019323862) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1019323862, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1019323862, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1019323862|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1019323862|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 20:14:26,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-82892564 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-82892564 256)))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-82892564| ~x$w_buff0_used~0_In-82892564) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-82892564| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-82892564|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 20:14:26,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In846908113 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In846908113 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In846908113 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In846908113 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out846908113| ~x$w_buff1_used~0_In846908113)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out846908113|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out846908113|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 20:14:26,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1839753588 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1839753588 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In1839753588 |ULTIMATE.start_main_#t~ite28_Out1839753588|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1839753588|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1839753588|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 20:14:26,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2123247048 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2123247048 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In2123247048 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In2123247048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| ~x$r_buff1_thd0~0_In2123247048) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2123247048|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 20:14:26,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:14:26,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:14:26,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 20:14:26,414 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 08:14:26 BasicIcfg [2019-12-07 20:14:26,414 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 20:14:26,414 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 20:14:26,414 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 20:14:26,415 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 20:14:26,415 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:13:34" (3/4) ... [2019-12-07 20:14:26,417 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 20:14:26,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1810~0.base_20| 1)) (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$w_buff0~0_268) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1810~0.base_20| 4)) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1810~0.base_20|) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= |v_ULTIMATE.start_main_~#t1810~0.offset_17| 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1810~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1810~0.base_20|) |v_ULTIMATE.start_main_~#t1810~0.offset_17| 0)) |v_#memory_int_21|) (= v_~x$r_buff0_thd0~0_372 0) (= v_~y~0_143 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~__unbuffered_p0_EAX~0_24) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t1810~0.base_20|) 0) (= v_~x$r_buff0_thd1~0_120 0) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= 0 v_~x$w_buff0_used~0_807) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t1810~0.offset=|v_ULTIMATE.start_main_~#t1810~0.offset_17|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_24, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_~#t1811~0.base=|v_ULTIMATE.start_main_~#t1811~0.base_21|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1810~0.base=|v_ULTIMATE.start_main_~#t1810~0.base_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ULTIMATE.start_main_~#t1812~0.base=|v_ULTIMATE.start_main_~#t1812~0.base_20|, ~y~0=v_~y~0_143, ULTIMATE.start_main_~#t1811~0.offset=|v_ULTIMATE.start_main_~#t1811~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, ULTIMATE.start_main_~#t1812~0.offset=|v_ULTIMATE.start_main_~#t1812~0.offset_16|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1810~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t1811~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t1810~0.base, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ULTIMATE.start_main_~#t1812~0.base, ~y~0, ULTIMATE.start_main_~#t1811~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t1812~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 20:14:26,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1811~0.base_11| 0)) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1811~0.base_11| 1) |v_#valid_31|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1811~0.base_11| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1811~0.base_11|)) (= |v_ULTIMATE.start_main_~#t1811~0.offset_10| 0) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1811~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1811~0.base_11|) |v_ULTIMATE.start_main_~#t1811~0.offset_10| 1)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1811~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1811~0.base=|v_ULTIMATE.start_main_~#t1811~0.base_11|, ULTIMATE.start_main_~#t1811~0.offset=|v_ULTIMATE.start_main_~#t1811~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1811~0.base, ULTIMATE.start_main_~#t1811~0.offset] because there is no mapped edge [2019-12-07 20:14:26,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1812~0.base_9|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1812~0.base_9|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1812~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1812~0.base_9|) |v_ULTIMATE.start_main_~#t1812~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1812~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1812~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t1812~0.offset_8| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1812~0.base_9| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t1812~0.base=|v_ULTIMATE.start_main_~#t1812~0.base_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1812~0.offset=|v_ULTIMATE.start_main_~#t1812~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t1812~0.base, #length, ULTIMATE.start_main_~#t1812~0.offset] because there is no mapped edge [2019-12-07 20:14:26,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 20:14:26,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-241338113 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-241338113 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x$w_buff1~0_In-241338113)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-241338113| ~x~0_In-241338113) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-241338113|, ~x$w_buff1~0=~x$w_buff1~0_In-241338113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-241338113, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-241338113, ~x~0=~x~0_In-241338113} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 20:14:26,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 20:14:26,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-534143727 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-534143727 256) 0))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-534143727 |P2Thread1of1ForFork2_#t~ite17_Out-534143727|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-534143727, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-534143727|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-534143727} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 20:14:26,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In1847898933 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In1847898933 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1847898933 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1847898933 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|)) (and (= ~x$w_buff1_used~0_In1847898933 |P2Thread1of1ForFork2_#t~ite18_Out1847898933|) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1847898933, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1847898933, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1847898933, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1847898933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1847898933} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 20:14:26,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse2 (= |P0Thread1of1ForFork0_#t~ite4_Out427373014| |P0Thread1of1ForFork0_#t~ite3_Out427373014|)) (.cse1 (= (mod ~x$w_buff1_used~0_In427373014 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In427373014 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out427373014| ~x~0_In427373014)) (and .cse2 (= ~x$w_buff1~0_In427373014 |P0Thread1of1ForFork0_#t~ite3_Out427373014|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out427373014|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out427373014|, ~x$w_buff1~0=~x$w_buff1~0_In427373014, ~x$w_buff1_used~0=~x$w_buff1_used~0_In427373014, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In427373014, ~x~0=~x~0_In427373014} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 20:14:26,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2137251104 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2137251104 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In2137251104 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out2137251104|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out2137251104|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2137251104, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2137251104} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 20:14:26,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1173307813 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-1173307813 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1173307813 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-1173307813 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1173307813| ~x$w_buff1_used~0_In-1173307813) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1173307813|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1173307813, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1173307813, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1173307813, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1173307813} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 20:14:26,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1247743138 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1247743138 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1247743138 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1247743138|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1247743138, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1247743138|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1247743138} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 20:14:26,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In135754150 256))) (.cse1 (= (mod ~x$r_buff1_thd3~0_In135754150 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In135754150 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In135754150 256)))) (or (and (= ~x$r_buff1_thd3~0_In135754150 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out135754150|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out135754150|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In135754150, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In135754150, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In135754150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In135754150} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 20:14:26,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 20:14:26,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1749269369 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1749269369 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd1~0_In-1749269369 |P0Thread1of1ForFork0_#t~ite7_Out-1749269369|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1749269369, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1749269369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1749269369} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 20:14:26,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In2125511565 256))) (.cse2 (= (mod ~x$r_buff0_thd1~0_In2125511565 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In2125511565 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2125511565 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~x$r_buff1_thd1~0_In2125511565 |P0Thread1of1ForFork0_#t~ite8_Out2125511565|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2125511565, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out2125511565|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2125511565, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2125511565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2125511565} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 20:14:26,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In588482150 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In588482150 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In588482150 |P1Thread1of1ForFork1_#t~ite11_Out588482150|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out588482150| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out588482150|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In588482150, ~x$w_buff0_used~0=~x$w_buff0_used~0_In588482150} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-646713955 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-646713955 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-646713955 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-646713955 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|)) (and (= ~x$w_buff1_used~0_In-646713955 |P1Thread1of1ForFork1_#t~ite12_Out-646713955|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-646713955, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-646713955, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-646713955|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-646713955, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-646713955} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out853370930 ~x$r_buff0_thd2~0_In853370930)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In853370930 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In853370930 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out853370930 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out853370930|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out853370930, ~x$w_buff0_used~0=~x$w_buff0_used~0_In853370930} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-63178737 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-63178737 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-63178737 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-63178737 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-63178737| ~x$r_buff1_thd2~0_In-63178737)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-63178737|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-63178737, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-63178737, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-63178737, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-63178737|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-63178737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 20:14:26,422 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 20:14:26,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In1019323862 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In1019323862 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out1019323862| |ULTIMATE.start_main_#t~ite25_Out1019323862|))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x~0_In1019323862) .cse2) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out1019323862| ~x$w_buff1~0_In1019323862) (not .cse0) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1019323862, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1019323862, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1019323862|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1019323862|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1019323862, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1019323862, ~x~0=~x~0_In1019323862} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 20:14:26,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-82892564 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-82892564 256)))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-82892564| ~x$w_buff0_used~0_In-82892564) (or .cse0 .cse1)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite26_Out-82892564| 0) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-82892564, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-82892564|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-82892564} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 20:14:26,423 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In846908113 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In846908113 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In846908113 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In846908113 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out846908113| ~x$w_buff1_used~0_In846908113)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out846908113|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In846908113, ~x$w_buff1_used~0=~x$w_buff1_used~0_In846908113, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out846908113|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In846908113, ~x$w_buff0_used~0=~x$w_buff0_used~0_In846908113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 20:14:26,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1839753588 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1839753588 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In1839753588 |ULTIMATE.start_main_#t~ite28_Out1839753588|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1839753588|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1839753588, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1839753588|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1839753588} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 20:14:26,424 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2123247048 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In2123247048 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In2123247048 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In2123247048 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite29_Out2123247048| ~x$r_buff1_thd0~0_In2123247048) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2123247048, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2123247048|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2123247048, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2123247048, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2123247048} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 20:14:26,426 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 20:14:26,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:14:26,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 20:14:26,489 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4a3e6e90-7ff6-44a7-8647-d25a14923026/bin/utaipan/witness.graphml [2019-12-07 20:14:26,489 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 20:14:26,490 INFO L168 Benchmark]: Toolchain (without parser) took 52784.11 ms. Allocated memory was 1.0 GB in the beginning and 6.6 GB in the end (delta: 5.6 GB). Free memory was 940.8 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,491 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:14:26,491 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -168.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,491 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,491 INFO L168 Benchmark]: Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:14:26,492 INFO L168 Benchmark]: RCFGBuilder took 409.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,492 INFO L168 Benchmark]: TraceAbstraction took 51848.80 ms. Allocated memory was 1.2 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.8 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,492 INFO L168 Benchmark]: Witness Printer took 74.99 ms. Allocated memory is still 6.6 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 60.9 MB). Peak memory consumption was 60.9 MB. Max. memory is 11.5 GB. [2019-12-07 20:14:26,494 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.98 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 141.6 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -168.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.93 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.06 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.33 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 51848.80 ms. Allocated memory was 1.2 GB in the beginning and 6.6 GB in the end (delta: 5.5 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.8 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 74.99 ms. Allocated memory is still 6.6 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 60.9 MB). Peak memory consumption was 60.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 174 ProgramPointsBefore, 94 ProgramPointsAfterwards, 211 TransitionsBefore, 106 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 6159 VarBasedMoverChecksPositive, 253 VarBasedMoverChecksNegative, 78 SemBasedMoverChecksPositive, 250 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78277 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t1810, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L807] FCALL, FORK 0 pthread_create(&t1811, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L809] FCALL, FORK 0 pthread_create(&t1812, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L753] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L754] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L755] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L756] 2 x$r_buff0_thd2 = (_Bool)1 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 y = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L727] 1 __unbuffered_p0_EAX = y [L730] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L782] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L733] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L734] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L784] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L785] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L762] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L735] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L736] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L762] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L763] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L764] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L815] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L815] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L816] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L817] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L818] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L819] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 x$flush_delayed = weak$$choice2 [L825] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L827] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L827] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L828] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L828] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L829] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L830] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L832] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 51.7s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 8.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3811 SDtfs, 3443 SDslu, 8517 SDs, 0 SdLazy, 4016 SolverSat, 151 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 144 GetRequests, 19 SyntacticMatches, 17 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 145 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=183279occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 26.2s AutomataMinimizationTime, 20 MinimizatonAttempts, 73000 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 898 NumberOfCodeBlocks, 898 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 810 ConstructedInterpolants, 0 QuantifiedInterpolants, 162667 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...