./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe004_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe004_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 73704224f15e258f32f07c3947d9d6e93159608f ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:41:40,571 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:41:40,573 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:41:40,583 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:41:40,584 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:41:40,585 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:41:40,586 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:41:40,588 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:41:40,589 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:41:40,590 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:41:40,591 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:41:40,592 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:41:40,592 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:41:40,593 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:41:40,594 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:41:40,595 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:41:40,596 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:41:40,597 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:41:40,598 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:41:40,600 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:41:40,601 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:41:40,601 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:41:40,602 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:41:40,603 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:41:40,605 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:41:40,605 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:41:40,605 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:41:40,605 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:41:40,606 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:41:40,606 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:41:40,607 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:41:40,607 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:41:40,608 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:41:40,609 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:41:40,610 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:41:40,610 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:41:40,610 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:41:40,611 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:41:40,611 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:41:40,612 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:41:40,612 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:41:40,613 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:41:40,626 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:41:40,626 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:41:40,627 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:41:40,627 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:41:40,627 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:41:40,627 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:41:40,628 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:41:40,629 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:41:40,629 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:41:40,629 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:41:40,630 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:41:40,630 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:41:40,630 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:41:40,630 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:41:40,630 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:41:40,631 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:41:40,632 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:41:40,632 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:41:40,632 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:41:40,632 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:41:40,633 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:41:40,633 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:41:40,633 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:41:40,633 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:41:40,633 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:41:40,634 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:41:40,634 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:41:40,634 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:41:40,634 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:41:40,634 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:41:40,635 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 73704224f15e258f32f07c3947d9d6e93159608f [2019-12-07 11:41:40,751 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:41:40,761 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:41:40,764 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:41:40,765 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:41:40,766 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:41:40,766 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe004_rmo.opt.i [2019-12-07 11:41:40,811 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/data/33fa0743a/64056855613540f99005b6786317fdba/FLAG50ed29c82 [2019-12-07 11:41:41,263 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:41:41,264 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/sv-benchmarks/c/pthread-wmm/safe004_rmo.opt.i [2019-12-07 11:41:41,273 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/data/33fa0743a/64056855613540f99005b6786317fdba/FLAG50ed29c82 [2019-12-07 11:41:41,282 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/data/33fa0743a/64056855613540f99005b6786317fdba [2019-12-07 11:41:41,284 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:41:41,285 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:41:41,286 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:41:41,286 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:41:41,288 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:41:41,288 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,290 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@54c26a0f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41, skipping insertion in model container [2019-12-07 11:41:41,290 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,295 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:41:41,322 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:41:41,566 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:41:41,574 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:41:41,617 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:41:41,661 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:41:41,662 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41 WrapperNode [2019-12-07 11:41:41,662 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:41:41,662 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:41:41,662 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:41:41,662 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:41:41,668 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,681 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,702 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:41:41,703 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:41:41,703 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:41:41,703 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:41:41,709 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,710 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,713 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,713 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,721 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,724 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,726 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... [2019-12-07 11:41:41,730 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:41:41,730 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:41:41,730 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:41:41,730 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:41:41,731 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:41:41,773 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:41:41,773 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:41:41,773 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:41:41,773 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:41:41,773 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:41:41,774 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:41:41,774 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:41:41,774 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:41:41,774 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:41:41,774 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:41:41,774 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:41:41,774 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:41:41,774 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:41:41,775 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:41:42,151 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:41:42,151 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:41:42,152 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:41:42 BoogieIcfgContainer [2019-12-07 11:41:42,152 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:41:42,153 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:41:42,153 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:41:42,155 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:41:42,155 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:41:41" (1/3) ... [2019-12-07 11:41:42,155 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1276be81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:41:42, skipping insertion in model container [2019-12-07 11:41:42,155 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:41:41" (2/3) ... [2019-12-07 11:41:42,156 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1276be81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:41:42, skipping insertion in model container [2019-12-07 11:41:42,156 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:41:42" (3/3) ... [2019-12-07 11:41:42,157 INFO L109 eAbstractionObserver]: Analyzing ICFG safe004_rmo.opt.i [2019-12-07 11:41:42,163 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:41:42,163 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:41:42,168 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:41:42,169 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:41:42,192 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,192 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,193 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,194 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,195 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,196 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,196 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,196 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,196 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,196 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,197 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,198 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,199 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,200 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,201 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,202 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,203 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,204 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,204 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,204 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:41:42,215 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:41:42,227 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:41:42,228 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:41:42,228 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:41:42,228 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:41:42,228 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:41:42,228 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:41:42,228 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:41:42,228 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:41:42,239 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 11:41:42,240 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 11:41:42,293 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 11:41:42,293 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:41:42,304 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:41:42,319 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 11:41:42,348 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 11:41:42,348 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:41:42,353 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:41:42,367 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 11:41:42,367 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:41:45,253 WARN L192 SmtUtils]: Spent 153.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 11:41:45,337 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78277 [2019-12-07 11:41:45,337 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 11:41:45,339 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 106 transitions [2019-12-07 11:41:58,795 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 107408 states. [2019-12-07 11:41:58,796 INFO L276 IsEmpty]: Start isEmpty. Operand 107408 states. [2019-12-07 11:41:58,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 11:41:58,800 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:58,801 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 11:41:58,801 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:58,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:58,805 INFO L82 PathProgramCache]: Analyzing trace with hash 809703812, now seen corresponding path program 1 times [2019-12-07 11:41:58,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:41:58,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826422440] [2019-12-07 11:41:58,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:58,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:58,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:58,948 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [826422440] [2019-12-07 11:41:58,949 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:58,949 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:41:58,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274494477] [2019-12-07 11:41:58,952 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:41:58,953 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:41:58,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:41:58,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:41:58,963 INFO L87 Difference]: Start difference. First operand 107408 states. Second operand 3 states. [2019-12-07 11:41:59,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:59,750 INFO L93 Difference]: Finished difference Result 107108 states and 460900 transitions. [2019-12-07 11:41:59,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:41:59,752 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 11:41:59,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:00,352 INFO L225 Difference]: With dead ends: 107108 [2019-12-07 11:42:00,352 INFO L226 Difference]: Without dead ends: 104924 [2019-12-07 11:42:00,353 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:42:03,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104924 states. [2019-12-07 11:42:05,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104924 to 104924. [2019-12-07 11:42:05,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104924 states. [2019-12-07 11:42:05,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104924 states to 104924 states and 451982 transitions. [2019-12-07 11:42:05,483 INFO L78 Accepts]: Start accepts. Automaton has 104924 states and 451982 transitions. Word has length 5 [2019-12-07 11:42:05,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:42:05,484 INFO L462 AbstractCegarLoop]: Abstraction has 104924 states and 451982 transitions. [2019-12-07 11:42:05,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:42:05,484 INFO L276 IsEmpty]: Start isEmpty. Operand 104924 states and 451982 transitions. [2019-12-07 11:42:05,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:42:05,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:42:05,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:42:05,487 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:42:05,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:42:05,487 INFO L82 PathProgramCache]: Analyzing trace with hash 2105056515, now seen corresponding path program 1 times [2019-12-07 11:42:05,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:42:05,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717331869] [2019-12-07 11:42:05,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:42:05,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:42:05,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:42:05,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717331869] [2019-12-07 11:42:05,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:42:05,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:42:05,550 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020643340] [2019-12-07 11:42:05,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:42:05,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:42:05,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:42:05,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:42:05,551 INFO L87 Difference]: Start difference. First operand 104924 states and 451982 transitions. Second operand 4 states. [2019-12-07 11:42:08,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:42:08,350 INFO L93 Difference]: Finished difference Result 168606 states and 697152 transitions. [2019-12-07 11:42:08,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:42:08,351 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:42:08,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:08,773 INFO L225 Difference]: With dead ends: 168606 [2019-12-07 11:42:08,773 INFO L226 Difference]: Without dead ends: 168557 [2019-12-07 11:42:08,773 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:42:12,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168557 states. [2019-12-07 11:42:14,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168557 to 152629. [2019-12-07 11:42:14,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152629 states. [2019-12-07 11:42:15,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152629 states to 152629 states and 638547 transitions. [2019-12-07 11:42:15,378 INFO L78 Accepts]: Start accepts. Automaton has 152629 states and 638547 transitions. Word has length 11 [2019-12-07 11:42:15,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:42:15,379 INFO L462 AbstractCegarLoop]: Abstraction has 152629 states and 638547 transitions. [2019-12-07 11:42:15,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:42:15,379 INFO L276 IsEmpty]: Start isEmpty. Operand 152629 states and 638547 transitions. [2019-12-07 11:42:15,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:42:15,386 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:42:15,386 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:42:15,386 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:42:15,386 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:42:15,387 INFO L82 PathProgramCache]: Analyzing trace with hash 2027270657, now seen corresponding path program 1 times [2019-12-07 11:42:15,387 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:42:15,387 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880699710] [2019-12-07 11:42:15,387 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:42:15,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:42:15,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:42:15,444 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880699710] [2019-12-07 11:42:15,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:42:15,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:42:15,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752530742] [2019-12-07 11:42:15,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:42:15,445 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:42:15,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:42:15,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:42:15,445 INFO L87 Difference]: Start difference. First operand 152629 states and 638547 transitions. Second operand 4 states. [2019-12-07 11:42:16,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:42:16,560 INFO L93 Difference]: Finished difference Result 217678 states and 889823 transitions. [2019-12-07 11:42:16,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:42:16,561 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:42:16,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:17,161 INFO L225 Difference]: With dead ends: 217678 [2019-12-07 11:42:17,161 INFO L226 Difference]: Without dead ends: 217615 [2019-12-07 11:42:17,161 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:42:23,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217615 states. [2019-12-07 11:42:26,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217615 to 183279. [2019-12-07 11:42:26,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183279 states. [2019-12-07 11:42:26,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183279 states to 183279 states and 761454 transitions. [2019-12-07 11:42:26,911 INFO L78 Accepts]: Start accepts. Automaton has 183279 states and 761454 transitions. Word has length 13 [2019-12-07 11:42:26,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:42:26,911 INFO L462 AbstractCegarLoop]: Abstraction has 183279 states and 761454 transitions. [2019-12-07 11:42:26,912 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:42:26,912 INFO L276 IsEmpty]: Start isEmpty. Operand 183279 states and 761454 transitions. [2019-12-07 11:42:26,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:42:26,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:42:26,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:42:26,914 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:42:26,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:42:26,914 INFO L82 PathProgramCache]: Analyzing trace with hash 1789207667, now seen corresponding path program 1 times [2019-12-07 11:42:26,914 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:42:26,914 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088035488] [2019-12-07 11:42:26,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:42:26,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:42:26,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:42:26,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088035488] [2019-12-07 11:42:26,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:42:26,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:42:26,957 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1865187841] [2019-12-07 11:42:26,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:42:26,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:42:26,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:42:26,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:42:26,958 INFO L87 Difference]: Start difference. First operand 183279 states and 761454 transitions. Second operand 4 states. [2019-12-07 11:42:28,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:42:28,149 INFO L93 Difference]: Finished difference Result 228772 states and 941089 transitions. [2019-12-07 11:42:28,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:42:28,149 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:42:28,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:28,734 INFO L225 Difference]: With dead ends: 228772 [2019-12-07 11:42:28,734 INFO L226 Difference]: Without dead ends: 228772 [2019-12-07 11:42:28,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:42:33,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228772 states. [2019-12-07 11:42:38,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228772 to 193424. [2019-12-07 11:42:38,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193424 states. [2019-12-07 11:42:39,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193424 states to 193424 states and 803706 transitions. [2019-12-07 11:42:39,806 INFO L78 Accepts]: Start accepts. Automaton has 193424 states and 803706 transitions. Word has length 13 [2019-12-07 11:42:39,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:42:39,806 INFO L462 AbstractCegarLoop]: Abstraction has 193424 states and 803706 transitions. [2019-12-07 11:42:39,806 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:42:39,807 INFO L276 IsEmpty]: Start isEmpty. Operand 193424 states and 803706 transitions. [2019-12-07 11:42:39,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:42:39,820 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:42:39,820 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:42:39,820 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:42:39,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:42:39,821 INFO L82 PathProgramCache]: Analyzing trace with hash 1405830784, now seen corresponding path program 1 times [2019-12-07 11:42:39,821 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:42:39,821 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66435970] [2019-12-07 11:42:39,821 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:42:39,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:42:39,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:42:39,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66435970] [2019-12-07 11:42:39,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:42:39,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:42:39,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [462253730] [2019-12-07 11:42:39,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:42:39,890 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:42:39,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:42:39,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:42:39,890 INFO L87 Difference]: Start difference. First operand 193424 states and 803706 transitions. Second operand 6 states. [2019-12-07 11:42:41,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:42:41,780 INFO L93 Difference]: Finished difference Result 306795 states and 1235310 transitions. [2019-12-07 11:42:41,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 11:42:41,781 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2019-12-07 11:42:41,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:42,540 INFO L225 Difference]: With dead ends: 306795 [2019-12-07 11:42:42,541 INFO L226 Difference]: Without dead ends: 306697 [2019-12-07 11:42:42,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:42:48,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306697 states. [2019-12-07 11:42:54,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306697 to 204176. [2019-12-07 11:42:54,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204176 states. [2019-12-07 11:42:55,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204176 states to 204176 states and 845949 transitions. [2019-12-07 11:42:55,014 INFO L78 Accepts]: Start accepts. Automaton has 204176 states and 845949 transitions. Word has length 19 [2019-12-07 11:42:55,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:42:55,014 INFO L462 AbstractCegarLoop]: Abstraction has 204176 states and 845949 transitions. [2019-12-07 11:42:55,014 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:42:55,014 INFO L276 IsEmpty]: Start isEmpty. Operand 204176 states and 845949 transitions. [2019-12-07 11:42:55,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:42:55,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:42:55,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:42:55,028 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:42:55,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:42:55,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1167767794, now seen corresponding path program 1 times [2019-12-07 11:42:55,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:42:55,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004778488] [2019-12-07 11:42:55,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:42:55,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:42:55,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:42:55,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2004778488] [2019-12-07 11:42:55,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:42:55,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:42:55,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052274332] [2019-12-07 11:42:55,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:42:55,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:42:55,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:42:55,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:42:55,082 INFO L87 Difference]: Start difference. First operand 204176 states and 845949 transitions. Second operand 5 states. [2019-12-07 11:42:57,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:42:57,133 INFO L93 Difference]: Finished difference Result 299515 states and 1215179 transitions. [2019-12-07 11:42:57,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:42:57,134 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:42:57,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:42:57,898 INFO L225 Difference]: With dead ends: 299515 [2019-12-07 11:42:57,898 INFO L226 Difference]: Without dead ends: 299452 [2019-12-07 11:42:57,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:43:03,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299452 states. [2019-12-07 11:43:06,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299452 to 222544. [2019-12-07 11:43:06,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222544 states. [2019-12-07 11:43:07,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222544 states to 222544 states and 918353 transitions. [2019-12-07 11:43:07,665 INFO L78 Accepts]: Start accepts. Automaton has 222544 states and 918353 transitions. Word has length 19 [2019-12-07 11:43:07,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:07,665 INFO L462 AbstractCegarLoop]: Abstraction has 222544 states and 918353 transitions. [2019-12-07 11:43:07,665 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:07,665 INFO L276 IsEmpty]: Start isEmpty. Operand 222544 states and 918353 transitions. [2019-12-07 11:43:07,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:43:07,677 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:07,677 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:07,677 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:07,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:07,677 INFO L82 PathProgramCache]: Analyzing trace with hash -159037504, now seen corresponding path program 2 times [2019-12-07 11:43:07,678 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:07,678 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729736933] [2019-12-07 11:43:07,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:07,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:07,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:07,721 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729736933] [2019-12-07 11:43:07,721 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:07,721 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:43:07,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [777954543] [2019-12-07 11:43:07,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:43:07,722 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:07,722 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:43:07,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:07,723 INFO L87 Difference]: Start difference. First operand 222544 states and 918353 transitions. Second operand 5 states. [2019-12-07 11:43:09,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:09,934 INFO L93 Difference]: Finished difference Result 306165 states and 1239611 transitions. [2019-12-07 11:43:09,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:43:09,935 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:43:09,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:10,697 INFO L225 Difference]: With dead ends: 306165 [2019-12-07 11:43:10,697 INFO L226 Difference]: Without dead ends: 306074 [2019-12-07 11:43:10,698 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:43:19,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306074 states. [2019-12-07 11:43:22,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306074 to 216265. [2019-12-07 11:43:22,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216265 states. [2019-12-07 11:43:23,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216265 states to 216265 states and 893275 transitions. [2019-12-07 11:43:23,442 INFO L78 Accepts]: Start accepts. Automaton has 216265 states and 893275 transitions. Word has length 19 [2019-12-07 11:43:23,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:23,443 INFO L462 AbstractCegarLoop]: Abstraction has 216265 states and 893275 transitions. [2019-12-07 11:43:23,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:23,443 INFO L276 IsEmpty]: Start isEmpty. Operand 216265 states and 893275 transitions. [2019-12-07 11:43:23,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:43:23,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:23,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:23,455 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:23,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:23,456 INFO L82 PathProgramCache]: Analyzing trace with hash 1572236508, now seen corresponding path program 1 times [2019-12-07 11:43:23,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:23,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753970944] [2019-12-07 11:43:23,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:23,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:23,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:23,482 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753970944] [2019-12-07 11:43:23,482 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:23,482 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:43:23,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910341946] [2019-12-07 11:43:23,482 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:23,483 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:23,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:23,483 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:23,483 INFO L87 Difference]: Start difference. First operand 216265 states and 893275 transitions. Second operand 3 states. [2019-12-07 11:43:23,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:23,636 INFO L93 Difference]: Finished difference Result 41234 states and 133454 transitions. [2019-12-07 11:43:23,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:23,636 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:43:23,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:23,694 INFO L225 Difference]: With dead ends: 41234 [2019-12-07 11:43:23,695 INFO L226 Difference]: Without dead ends: 41234 [2019-12-07 11:43:23,695 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:23,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41234 states. [2019-12-07 11:43:24,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41234 to 41234. [2019-12-07 11:43:24,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41234 states. [2019-12-07 11:43:24,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41234 states to 41234 states and 133454 transitions. [2019-12-07 11:43:24,343 INFO L78 Accepts]: Start accepts. Automaton has 41234 states and 133454 transitions. Word has length 19 [2019-12-07 11:43:24,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:24,343 INFO L462 AbstractCegarLoop]: Abstraction has 41234 states and 133454 transitions. [2019-12-07 11:43:24,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:24,344 INFO L276 IsEmpty]: Start isEmpty. Operand 41234 states and 133454 transitions. [2019-12-07 11:43:24,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:43:24,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:24,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:24,350 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:24,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:24,350 INFO L82 PathProgramCache]: Analyzing trace with hash 398024066, now seen corresponding path program 1 times [2019-12-07 11:43:24,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:24,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934069951] [2019-12-07 11:43:24,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:24,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:24,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:24,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934069951] [2019-12-07 11:43:24,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:24,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:43:24,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [10291606] [2019-12-07 11:43:24,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:43:24,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:24,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:43:24,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:24,390 INFO L87 Difference]: Start difference. First operand 41234 states and 133454 transitions. Second operand 5 states. [2019-12-07 11:43:24,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:24,754 INFO L93 Difference]: Finished difference Result 55154 states and 175550 transitions. [2019-12-07 11:43:24,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:43:24,755 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 11:43:24,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:24,835 INFO L225 Difference]: With dead ends: 55154 [2019-12-07 11:43:24,835 INFO L226 Difference]: Without dead ends: 55154 [2019-12-07 11:43:24,835 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:43:25,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55154 states. [2019-12-07 11:43:25,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55154 to 43275. [2019-12-07 11:43:25,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43275 states. [2019-12-07 11:43:25,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43275 states to 43275 states and 139859 transitions. [2019-12-07 11:43:25,922 INFO L78 Accepts]: Start accepts. Automaton has 43275 states and 139859 transitions. Word has length 25 [2019-12-07 11:43:25,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:25,923 INFO L462 AbstractCegarLoop]: Abstraction has 43275 states and 139859 transitions. [2019-12-07 11:43:25,923 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:25,923 INFO L276 IsEmpty]: Start isEmpty. Operand 43275 states and 139859 transitions. [2019-12-07 11:43:25,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:43:25,936 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:25,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:25,936 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:25,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:25,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1074030587, now seen corresponding path program 1 times [2019-12-07 11:43:25,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:25,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [469754308] [2019-12-07 11:43:25,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:25,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:26,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:26,035 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [469754308] [2019-12-07 11:43:26,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:26,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:43:26,035 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1055715316] [2019-12-07 11:43:26,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:43:26,036 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:26,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:43:26,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:43:26,036 INFO L87 Difference]: Start difference. First operand 43275 states and 139859 transitions. Second operand 6 states. [2019-12-07 11:43:26,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:26,664 INFO L93 Difference]: Finished difference Result 54041 states and 172398 transitions. [2019-12-07 11:43:26,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 11:43:26,664 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 11:43:26,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:26,746 INFO L225 Difference]: With dead ends: 54041 [2019-12-07 11:43:26,746 INFO L226 Difference]: Without dead ends: 54028 [2019-12-07 11:43:26,747 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 6 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:43:26,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54028 states. [2019-12-07 11:43:27,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54028 to 39992. [2019-12-07 11:43:27,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39992 states. [2019-12-07 11:43:27,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39992 states to 39992 states and 129830 transitions. [2019-12-07 11:43:27,479 INFO L78 Accepts]: Start accepts. Automaton has 39992 states and 129830 transitions. Word has length 31 [2019-12-07 11:43:27,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:27,480 INFO L462 AbstractCegarLoop]: Abstraction has 39992 states and 129830 transitions. [2019-12-07 11:43:27,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:43:27,480 INFO L276 IsEmpty]: Start isEmpty. Operand 39992 states and 129830 transitions. [2019-12-07 11:43:27,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 11:43:27,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:27,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:27,504 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:27,504 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:27,504 INFO L82 PathProgramCache]: Analyzing trace with hash 1564491709, now seen corresponding path program 1 times [2019-12-07 11:43:27,504 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:27,504 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322027214] [2019-12-07 11:43:27,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:27,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:27,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:27,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322027214] [2019-12-07 11:43:27,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:27,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:43:27,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1733726867] [2019-12-07 11:43:27,540 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:27,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:27,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:27,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:27,540 INFO L87 Difference]: Start difference. First operand 39992 states and 129830 transitions. Second operand 3 states. [2019-12-07 11:43:27,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:27,689 INFO L93 Difference]: Finished difference Result 46835 states and 152675 transitions. [2019-12-07 11:43:27,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:27,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 11:43:27,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:27,753 INFO L225 Difference]: With dead ends: 46835 [2019-12-07 11:43:27,753 INFO L226 Difference]: Without dead ends: 46835 [2019-12-07 11:43:27,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:27,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46835 states. [2019-12-07 11:43:28,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46835 to 44393. [2019-12-07 11:43:28,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44393 states. [2019-12-07 11:43:28,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44393 states to 44393 states and 145223 transitions. [2019-12-07 11:43:28,599 INFO L78 Accepts]: Start accepts. Automaton has 44393 states and 145223 transitions. Word has length 39 [2019-12-07 11:43:28,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:28,599 INFO L462 AbstractCegarLoop]: Abstraction has 44393 states and 145223 transitions. [2019-12-07 11:43:28,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:28,599 INFO L276 IsEmpty]: Start isEmpty. Operand 44393 states and 145223 transitions. [2019-12-07 11:43:28,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 11:43:28,620 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:28,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:28,620 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:28,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:28,621 INFO L82 PathProgramCache]: Analyzing trace with hash 1697210614, now seen corresponding path program 1 times [2019-12-07 11:43:28,621 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:28,621 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015397915] [2019-12-07 11:43:28,621 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:28,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:28,658 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:28,658 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015397915] [2019-12-07 11:43:28,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:28,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:43:28,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [614805447] [2019-12-07 11:43:28,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:43:28,659 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:28,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:43:28,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:43:28,660 INFO L87 Difference]: Start difference. First operand 44393 states and 145223 transitions. Second operand 4 states. [2019-12-07 11:43:28,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:28,694 INFO L93 Difference]: Finished difference Result 7906 states and 21265 transitions. [2019-12-07 11:43:28,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:43:28,695 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 11:43:28,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:28,704 INFO L225 Difference]: With dead ends: 7906 [2019-12-07 11:43:28,704 INFO L226 Difference]: Without dead ends: 7906 [2019-12-07 11:43:28,704 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:43:28,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7906 states. [2019-12-07 11:43:28,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7906 to 7794. [2019-12-07 11:43:28,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7794 states. [2019-12-07 11:43:28,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7794 states to 7794 states and 20945 transitions. [2019-12-07 11:43:28,796 INFO L78 Accepts]: Start accepts. Automaton has 7794 states and 20945 transitions. Word has length 39 [2019-12-07 11:43:28,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:28,796 INFO L462 AbstractCegarLoop]: Abstraction has 7794 states and 20945 transitions. [2019-12-07 11:43:28,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:43:28,796 INFO L276 IsEmpty]: Start isEmpty. Operand 7794 states and 20945 transitions. [2019-12-07 11:43:28,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 11:43:28,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:28,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:28,802 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:28,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:28,802 INFO L82 PathProgramCache]: Analyzing trace with hash -994376569, now seen corresponding path program 1 times [2019-12-07 11:43:28,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:28,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590930458] [2019-12-07 11:43:28,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:28,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:28,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:28,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590930458] [2019-12-07 11:43:28,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:28,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:43:28,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479330232] [2019-12-07 11:43:28,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:43:28,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:28,860 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:43:28,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:28,860 INFO L87 Difference]: Start difference. First operand 7794 states and 20945 transitions. Second operand 5 states. [2019-12-07 11:43:28,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:28,888 INFO L93 Difference]: Finished difference Result 5050 states and 14454 transitions. [2019-12-07 11:43:28,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:43:28,888 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 11:43:28,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:28,892 INFO L225 Difference]: With dead ends: 5050 [2019-12-07 11:43:28,892 INFO L226 Difference]: Without dead ends: 5050 [2019-12-07 11:43:28,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:28,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5050 states. [2019-12-07 11:43:28,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5050 to 4686. [2019-12-07 11:43:28,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4686 states. [2019-12-07 11:43:28,948 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4686 states to 4686 states and 13470 transitions. [2019-12-07 11:43:28,948 INFO L78 Accepts]: Start accepts. Automaton has 4686 states and 13470 transitions. Word has length 51 [2019-12-07 11:43:28,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:28,948 INFO L462 AbstractCegarLoop]: Abstraction has 4686 states and 13470 transitions. [2019-12-07 11:43:28,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:28,948 INFO L276 IsEmpty]: Start isEmpty. Operand 4686 states and 13470 transitions. [2019-12-07 11:43:28,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:43:28,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:28,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:28,952 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:28,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:28,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1902070617, now seen corresponding path program 1 times [2019-12-07 11:43:28,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:28,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658027178] [2019-12-07 11:43:28,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:28,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:28,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:28,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658027178] [2019-12-07 11:43:28,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:28,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:43:28,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423655056] [2019-12-07 11:43:28,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:28,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:28,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:28,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:28,998 INFO L87 Difference]: Start difference. First operand 4686 states and 13470 transitions. Second operand 3 states. [2019-12-07 11:43:29,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:29,037 INFO L93 Difference]: Finished difference Result 4690 states and 13463 transitions. [2019-12-07 11:43:29,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:29,038 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:43:29,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:29,043 INFO L225 Difference]: With dead ends: 4690 [2019-12-07 11:43:29,043 INFO L226 Difference]: Without dead ends: 4690 [2019-12-07 11:43:29,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4690 states. [2019-12-07 11:43:29,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4690 to 4682. [2019-12-07 11:43:29,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4682 states. [2019-12-07 11:43:29,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4682 states to 4682 states and 13455 transitions. [2019-12-07 11:43:29,104 INFO L78 Accepts]: Start accepts. Automaton has 4682 states and 13455 transitions. Word has length 65 [2019-12-07 11:43:29,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:29,104 INFO L462 AbstractCegarLoop]: Abstraction has 4682 states and 13455 transitions. [2019-12-07 11:43:29,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:29,104 INFO L276 IsEmpty]: Start isEmpty. Operand 4682 states and 13455 transitions. [2019-12-07 11:43:29,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:43:29,108 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:29,108 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:29,108 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:29,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:29,108 INFO L82 PathProgramCache]: Analyzing trace with hash 1892358751, now seen corresponding path program 1 times [2019-12-07 11:43:29,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:29,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293004978] [2019-12-07 11:43:29,108 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:29,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:29,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:29,147 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293004978] [2019-12-07 11:43:29,147 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:29,147 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:43:29,148 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995013273] [2019-12-07 11:43:29,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:29,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:29,148 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:29,148 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,148 INFO L87 Difference]: Start difference. First operand 4682 states and 13455 transitions. Second operand 3 states. [2019-12-07 11:43:29,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:29,169 INFO L93 Difference]: Finished difference Result 4682 states and 13251 transitions. [2019-12-07 11:43:29,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:29,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:43:29,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:29,175 INFO L225 Difference]: With dead ends: 4682 [2019-12-07 11:43:29,175 INFO L226 Difference]: Without dead ends: 4682 [2019-12-07 11:43:29,175 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4682 states. [2019-12-07 11:43:29,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4682 to 4682. [2019-12-07 11:43:29,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4682 states. [2019-12-07 11:43:29,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4682 states to 4682 states and 13251 transitions. [2019-12-07 11:43:29,237 INFO L78 Accepts]: Start accepts. Automaton has 4682 states and 13251 transitions. Word has length 65 [2019-12-07 11:43:29,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:29,237 INFO L462 AbstractCegarLoop]: Abstraction has 4682 states and 13251 transitions. [2019-12-07 11:43:29,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:29,237 INFO L276 IsEmpty]: Start isEmpty. Operand 4682 states and 13251 transitions. [2019-12-07 11:43:29,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:43:29,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:29,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:29,241 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:29,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:29,241 INFO L82 PathProgramCache]: Analyzing trace with hash 1887448171, now seen corresponding path program 1 times [2019-12-07 11:43:29,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:29,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939646655] [2019-12-07 11:43:29,242 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:29,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:29,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:29,292 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939646655] [2019-12-07 11:43:29,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:29,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:43:29,293 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717602922] [2019-12-07 11:43:29,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:43:29,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:29,294 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:43:29,294 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:29,294 INFO L87 Difference]: Start difference. First operand 4682 states and 13251 transitions. Second operand 5 states. [2019-12-07 11:43:29,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:29,501 INFO L93 Difference]: Finished difference Result 7016 states and 19631 transitions. [2019-12-07 11:43:29,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:43:29,501 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 11:43:29,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:29,507 INFO L225 Difference]: With dead ends: 7016 [2019-12-07 11:43:29,507 INFO L226 Difference]: Without dead ends: 7016 [2019-12-07 11:43:29,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:43:29,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7016 states. [2019-12-07 11:43:29,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7016 to 5523. [2019-12-07 11:43:29,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5523 states. [2019-12-07 11:43:29,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5523 states to 5523 states and 15585 transitions. [2019-12-07 11:43:29,588 INFO L78 Accepts]: Start accepts. Automaton has 5523 states and 15585 transitions. Word has length 66 [2019-12-07 11:43:29,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:29,588 INFO L462 AbstractCegarLoop]: Abstraction has 5523 states and 15585 transitions. [2019-12-07 11:43:29,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:29,588 INFO L276 IsEmpty]: Start isEmpty. Operand 5523 states and 15585 transitions. [2019-12-07 11:43:29,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:43:29,592 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:29,592 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:29,592 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:29,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:29,592 INFO L82 PathProgramCache]: Analyzing trace with hash 284491425, now seen corresponding path program 2 times [2019-12-07 11:43:29,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:29,593 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269410558] [2019-12-07 11:43:29,593 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:29,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:29,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:29,629 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269410558] [2019-12-07 11:43:29,629 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:29,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:43:29,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710347741] [2019-12-07 11:43:29,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:29,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:29,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:29,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,630 INFO L87 Difference]: Start difference. First operand 5523 states and 15585 transitions. Second operand 3 states. [2019-12-07 11:43:29,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:29,664 INFO L93 Difference]: Finished difference Result 5523 states and 15584 transitions. [2019-12-07 11:43:29,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:29,664 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 11:43:29,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:29,668 INFO L225 Difference]: With dead ends: 5523 [2019-12-07 11:43:29,669 INFO L226 Difference]: Without dead ends: 5523 [2019-12-07 11:43:29,669 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5523 states. [2019-12-07 11:43:29,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5523 to 4836. [2019-12-07 11:43:29,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4836 states. [2019-12-07 11:43:29,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4836 states to 4836 states and 13729 transitions. [2019-12-07 11:43:29,725 INFO L78 Accepts]: Start accepts. Automaton has 4836 states and 13729 transitions. Word has length 66 [2019-12-07 11:43:29,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:29,725 INFO L462 AbstractCegarLoop]: Abstraction has 4836 states and 13729 transitions. [2019-12-07 11:43:29,726 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:29,726 INFO L276 IsEmpty]: Start isEmpty. Operand 4836 states and 13729 transitions. [2019-12-07 11:43:29,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:43:29,729 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:29,729 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:29,729 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:29,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:29,729 INFO L82 PathProgramCache]: Analyzing trace with hash 486159966, now seen corresponding path program 1 times [2019-12-07 11:43:29,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:29,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942583993] [2019-12-07 11:43:29,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:29,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:29,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:29,768 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942583993] [2019-12-07 11:43:29,768 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:29,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:43:29,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1113199785] [2019-12-07 11:43:29,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:43:29,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:29,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:43:29,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,769 INFO L87 Difference]: Start difference. First operand 4836 states and 13729 transitions. Second operand 3 states. [2019-12-07 11:43:29,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:29,790 INFO L93 Difference]: Finished difference Result 4430 states and 12357 transitions. [2019-12-07 11:43:29,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:43:29,791 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 11:43:29,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:29,794 INFO L225 Difference]: With dead ends: 4430 [2019-12-07 11:43:29,794 INFO L226 Difference]: Without dead ends: 4430 [2019-12-07 11:43:29,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:43:29,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4430 states. [2019-12-07 11:43:29,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4430 to 4430. [2019-12-07 11:43:29,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4430 states. [2019-12-07 11:43:29,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4430 states to 4430 states and 12357 transitions. [2019-12-07 11:43:29,845 INFO L78 Accepts]: Start accepts. Automaton has 4430 states and 12357 transitions. Word has length 67 [2019-12-07 11:43:29,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:29,845 INFO L462 AbstractCegarLoop]: Abstraction has 4430 states and 12357 transitions. [2019-12-07 11:43:29,846 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:43:29,846 INFO L276 IsEmpty]: Start isEmpty. Operand 4430 states and 12357 transitions. [2019-12-07 11:43:29,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 11:43:29,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:29,849 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:29,849 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:29,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:29,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1652885238, now seen corresponding path program 1 times [2019-12-07 11:43:29,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:29,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083863571] [2019-12-07 11:43:29,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:29,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:29,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:29,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083863571] [2019-12-07 11:43:29,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:29,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:43:29,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015904538] [2019-12-07 11:43:29,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:43:29,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:29,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:43:29,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:43:29,932 INFO L87 Difference]: Start difference. First operand 4430 states and 12357 transitions. Second operand 7 states. [2019-12-07 11:43:30,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:30,080 INFO L93 Difference]: Finished difference Result 14223 states and 39815 transitions. [2019-12-07 11:43:30,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 11:43:30,080 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-07 11:43:30,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:30,088 INFO L225 Difference]: With dead ends: 14223 [2019-12-07 11:43:30,088 INFO L226 Difference]: Without dead ends: 8773 [2019-12-07 11:43:30,088 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:43:30,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8773 states. [2019-12-07 11:43:30,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8773 to 4430. [2019-12-07 11:43:30,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4430 states. [2019-12-07 11:43:30,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4430 states to 4430 states and 12292 transitions. [2019-12-07 11:43:30,160 INFO L78 Accepts]: Start accepts. Automaton has 4430 states and 12292 transitions. Word has length 68 [2019-12-07 11:43:30,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:30,160 INFO L462 AbstractCegarLoop]: Abstraction has 4430 states and 12292 transitions. [2019-12-07 11:43:30,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:43:30,160 INFO L276 IsEmpty]: Start isEmpty. Operand 4430 states and 12292 transitions. [2019-12-07 11:43:30,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 11:43:30,163 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:30,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:30,164 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:30,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:30,164 INFO L82 PathProgramCache]: Analyzing trace with hash 942277324, now seen corresponding path program 2 times [2019-12-07 11:43:30,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:30,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809207181] [2019-12-07 11:43:30,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:30,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:30,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:30,217 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809207181] [2019-12-07 11:43:30,217 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:30,217 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:43:30,217 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [24522500] [2019-12-07 11:43:30,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:43:30,217 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:30,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:43:30,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:43:30,218 INFO L87 Difference]: Start difference. First operand 4430 states and 12292 transitions. Second operand 5 states. [2019-12-07 11:43:30,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:30,261 INFO L93 Difference]: Finished difference Result 6943 states and 19204 transitions. [2019-12-07 11:43:30,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:43:30,261 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 68 [2019-12-07 11:43:30,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:30,264 INFO L225 Difference]: With dead ends: 6943 [2019-12-07 11:43:30,264 INFO L226 Difference]: Without dead ends: 2809 [2019-12-07 11:43:30,264 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:43:30,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2809 states. [2019-12-07 11:43:30,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2809 to 2809. [2019-12-07 11:43:30,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2809 states. [2019-12-07 11:43:30,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2809 states to 2809 states and 7687 transitions. [2019-12-07 11:43:30,300 INFO L78 Accepts]: Start accepts. Automaton has 2809 states and 7687 transitions. Word has length 68 [2019-12-07 11:43:30,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:30,300 INFO L462 AbstractCegarLoop]: Abstraction has 2809 states and 7687 transitions. [2019-12-07 11:43:30,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:43:30,301 INFO L276 IsEmpty]: Start isEmpty. Operand 2809 states and 7687 transitions. [2019-12-07 11:43:30,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 11:43:30,303 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:30,303 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:30,303 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:30,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:30,303 INFO L82 PathProgramCache]: Analyzing trace with hash -213601006, now seen corresponding path program 3 times [2019-12-07 11:43:30,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:30,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052797065] [2019-12-07 11:43:30,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:30,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:43:30,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:43:30,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052797065] [2019-12-07 11:43:30,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:43:30,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:43:30,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [417854366] [2019-12-07 11:43:30,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:43:30,362 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:43:30,362 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:43:30,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:43:30,363 INFO L87 Difference]: Start difference. First operand 2809 states and 7687 transitions. Second operand 6 states. [2019-12-07 11:43:30,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:43:30,410 INFO L93 Difference]: Finished difference Result 4569 states and 12612 transitions. [2019-12-07 11:43:30,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:43:30,410 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-07 11:43:30,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:43:30,412 INFO L225 Difference]: With dead ends: 4569 [2019-12-07 11:43:30,412 INFO L226 Difference]: Without dead ends: 1804 [2019-12-07 11:43:30,412 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:43:30,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1804 states. [2019-12-07 11:43:30,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1804 to 1804. [2019-12-07 11:43:30,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1804 states. [2019-12-07 11:43:30,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1804 states to 1804 states and 5006 transitions. [2019-12-07 11:43:30,435 INFO L78 Accepts]: Start accepts. Automaton has 1804 states and 5006 transitions. Word has length 68 [2019-12-07 11:43:30,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:43:30,435 INFO L462 AbstractCegarLoop]: Abstraction has 1804 states and 5006 transitions. [2019-12-07 11:43:30,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:43:30,435 INFO L276 IsEmpty]: Start isEmpty. Operand 1804 states and 5006 transitions. [2019-12-07 11:43:30,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 11:43:30,436 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:43:30,436 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:43:30,436 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:43:30,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:43:30,437 INFO L82 PathProgramCache]: Analyzing trace with hash -1259160564, now seen corresponding path program 4 times [2019-12-07 11:43:30,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:43:30,437 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009745895] [2019-12-07 11:43:30,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:43:30,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:43:30,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:43:30,525 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:43:30,525 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:43:30,528 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1888~0.base_20|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1888~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1888~0.base_20|) |v_ULTIMATE.start_main_~#t1888~0.offset_17| 0))) (= 0 v_~x$w_buff0~0_268) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1888~0.base_20| 4)) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 |v_ULTIMATE.start_main_~#t1888~0.offset_17|) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1888~0.base_20| 1)) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= (select .cse0 |v_ULTIMATE.start_main_~#t1888~0.base_20|) 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t1890~0.offset=|v_ULTIMATE.start_main_~#t1890~0.offset_16|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_~#t1888~0.base=|v_ULTIMATE.start_main_~#t1888~0.base_20|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1888~0.offset=|v_ULTIMATE.start_main_~#t1888~0.offset_17|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1890~0.base=|v_ULTIMATE.start_main_~#t1890~0.base_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1889~0.offset=|v_ULTIMATE.start_main_~#t1889~0.offset_17|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ULTIMATE.start_main_~#t1889~0.base=|v_ULTIMATE.start_main_~#t1889~0.base_21|, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1890~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1888~0.base, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1888~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1890~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1889~0.offset, ~weak$$choice2~0, ULTIMATE.start_main_~#t1889~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:43:30,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1889~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1889~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1889~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1889~0.base_11|) |v_ULTIMATE.start_main_~#t1889~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1889~0.base_11| 4)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1889~0.base_11| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1889~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1889~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1889~0.offset=|v_ULTIMATE.start_main_~#t1889~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1889~0.base=|v_ULTIMATE.start_main_~#t1889~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t1889~0.offset, #length, ULTIMATE.start_main_~#t1889~0.base] because there is no mapped edge [2019-12-07 11:43:30,529 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1890~0.base_9|) 0) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1890~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1890~0.base_9|) |v_ULTIMATE.start_main_~#t1890~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1890~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1890~0.base_9| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1890~0.base_9| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1890~0.base_9|) (= 0 |v_ULTIMATE.start_main_~#t1890~0.offset_8|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t1890~0.base=|v_ULTIMATE.start_main_~#t1890~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1890~0.offset=|v_ULTIMATE.start_main_~#t1890~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t1890~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1890~0.offset] because there is no mapped edge [2019-12-07 11:43:30,530 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:43:30,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-624585183 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-624585183 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-624585183| ~x$w_buff1~0_In-624585183)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-624585183| ~x~0_In-624585183)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-624585183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-624585183, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-624585183, ~x~0=~x~0_In-624585183} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-624585183|, ~x$w_buff1~0=~x$w_buff1~0_In-624585183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-624585183, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-624585183, ~x~0=~x~0_In-624585183} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 11:43:30,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 11:43:30,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In103154931 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In103154931 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out103154931|) (not .cse1)) (and (= ~x$w_buff0_used~0_In103154931 |P2Thread1of1ForFork2_#t~ite17_Out103154931|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In103154931, ~x$w_buff0_used~0=~x$w_buff0_used~0_In103154931} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In103154931, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out103154931|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In103154931} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:43:30,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-420886999 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-420886999 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In-420886999 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-420886999 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out-420886999| ~x$w_buff1_used~0_In-420886999)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-420886999| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-420886999, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-420886999, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-420886999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-420886999} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-420886999, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-420886999, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-420886999, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-420886999|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-420886999} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 11:43:30,532 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-2115826337| |P0Thread1of1ForFork0_#t~ite3_Out-2115826337|)) (.cse1 (= (mod ~x$w_buff1_used~0_In-2115826337 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In-2115826337 256) 0))) (or (and .cse0 (= ~x$w_buff1~0_In-2115826337 |P0Thread1of1ForFork0_#t~ite3_Out-2115826337|) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out-2115826337| ~x~0_In-2115826337)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2115826337, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2115826337, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2115826337, ~x~0=~x~0_In-2115826337} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-2115826337|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-2115826337|, ~x$w_buff1~0=~x$w_buff1~0_In-2115826337, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2115826337, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2115826337, ~x~0=~x~0_In-2115826337} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:43:30,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-2065471226 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-2065471226 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-2065471226 |P0Thread1of1ForFork0_#t~ite5_Out-2065471226|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-2065471226|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2065471226, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2065471226} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-2065471226|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2065471226, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2065471226} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:43:30,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In797389550 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In797389550 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In797389550 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In797389550 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In797389550 |P0Thread1of1ForFork0_#t~ite6_Out797389550|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out797389550|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In797389550, ~x$w_buff1_used~0=~x$w_buff1_used~0_In797389550, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In797389550, ~x$w_buff0_used~0=~x$w_buff0_used~0_In797389550} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out797389550|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In797389550, ~x$w_buff1_used~0=~x$w_buff1_used~0_In797389550, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In797389550, ~x$w_buff0_used~0=~x$w_buff0_used~0_In797389550} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:43:30,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-1171234034 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1171234034 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1171234034 |P2Thread1of1ForFork2_#t~ite19_Out-1171234034|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1171234034|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1171234034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1171234034} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1171234034, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1171234034|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1171234034} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 11:43:30,533 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In1463469527 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1463469527 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1463469527 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In1463469527 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd3~0_In1463469527 |P2Thread1of1ForFork2_#t~ite20_Out1463469527|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1463469527|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1463469527, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1463469527, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1463469527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1463469527} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1463469527|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1463469527, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1463469527, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1463469527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1463469527} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 11:43:30,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:43:30,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1508606691 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1508606691 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1508606691 |P0Thread1of1ForFork0_#t~ite7_Out-1508606691|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1508606691|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1508606691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1508606691} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1508606691, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1508606691|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1508606691} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:43:30,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In1061045647 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1061045647 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1061045647 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1061045647 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1061045647| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite8_Out1061045647| ~x$r_buff1_thd1~0_In1061045647)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1061045647, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1061045647, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1061045647, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1061045647} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1061045647, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1061045647|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1061045647, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1061045647, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1061045647} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:43:30,534 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 11:43:30,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In635449495 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In635449495 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In635449495 |P1Thread1of1ForFork1_#t~ite11_Out635449495|)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out635449495| 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In635449495, ~x$w_buff0_used~0=~x$w_buff0_used~0_In635449495} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out635449495|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In635449495, ~x$w_buff0_used~0=~x$w_buff0_used~0_In635449495} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:43:30,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In-519777358 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-519777358 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-519777358 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-519777358 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-519777358| ~x$w_buff1_used~0_In-519777358) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-519777358| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-519777358, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-519777358, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-519777358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519777358} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-519777358, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-519777358, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-519777358|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-519777358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519777358} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:43:30,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-407306411 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-407306411 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In-407306411 ~x$r_buff0_thd2~0_Out-407306411))) (or (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out-407306411) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-407306411, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-407306411} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-407306411|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-407306411, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-407306411} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:43:30,535 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In585464578 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In585464578 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In585464578 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In585464578 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out585464578| ~x$r_buff1_thd2~0_In585464578) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out585464578| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In585464578, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In585464578, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In585464578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In585464578} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In585464578, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In585464578, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In585464578, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out585464578|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In585464578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:43:30,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:43:30,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:43:30,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out1909934144| |ULTIMATE.start_main_#t~ite24_Out1909934144|)) (.cse2 (= (mod ~x$w_buff1_used~0_In1909934144 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In1909934144 256) 0))) (or (and .cse0 (= ~x~0_In1909934144 |ULTIMATE.start_main_#t~ite24_Out1909934144|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~x$w_buff1~0_In1909934144 |ULTIMATE.start_main_#t~ite24_Out1909934144|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1909934144, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1909934144, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1909934144, ~x~0=~x~0_In1909934144} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1909934144, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1909934144|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1909934144|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1909934144, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1909934144, ~x~0=~x~0_In1909934144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 11:43:30,536 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-819846602 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-819846602 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-819846602|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-819846602 |ULTIMATE.start_main_#t~ite26_Out-819846602|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-819846602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-819846602} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-819846602, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-819846602|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-819846602} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 11:43:30,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd0~0_In-2006488851 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-2006488851 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-2006488851 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-2006488851 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-2006488851| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out-2006488851| ~x$w_buff1_used~0_In-2006488851) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2006488851, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006488851, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2006488851, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006488851} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2006488851, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006488851, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-2006488851|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2006488851, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006488851} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 11:43:30,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In207471314 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In207471314 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In207471314 |ULTIMATE.start_main_#t~ite28_Out207471314|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out207471314|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In207471314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207471314} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In207471314, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out207471314|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207471314} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 11:43:30,537 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-621971206 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-621971206 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-621971206 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-621971206 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-621971206| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite29_Out-621971206| ~x$r_buff1_thd0~0_In-621971206) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-621971206, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-621971206, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-621971206, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-621971206} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-621971206, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-621971206|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-621971206, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-621971206, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-621971206} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 11:43:30,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:43:30,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:43:30,540 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:43:30,609 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:43:30 BasicIcfg [2019-12-07 11:43:30,609 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:43:30,610 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:43:30,610 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:43:30,610 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:43:30,610 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:41:42" (3/4) ... [2019-12-07 11:43:30,612 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:43:30,612 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= 0 v_~x~0_194) (= 0 v_~x$r_buff0_thd2~0_213) (= 0 v_~weak$$choice0~0_14) (= v_~x$mem_tmp~0_19 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1888~0.base_20|) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1888~0.base_20| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1888~0.base_20|) |v_ULTIMATE.start_main_~#t1888~0.offset_17| 0))) (= 0 v_~x$w_buff0~0_268) (= 0 v_~x$r_buff1_thd2~0_212) (= v_~x$r_buff1_thd0~0_297 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$read_delayed_var~0.base_7) (= v_~x$r_buff1_thd1~0_187 0) (= v_~__unbuffered_p2_EBX~0_22 0) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x$read_delayed~0_6) (= v_~__unbuffered_cnt~0_155 0) (= 0 v_~x$w_buff1~0_230) (= 0 |v_#NULL.base_4|) (= 0 v_~x$r_buff1_thd3~0_195) (= 0 v_~x$r_buff0_thd3~0_123) (= |v_#NULL.offset_4| 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t1888~0.base_20| 4)) (= 0 v_~x$w_buff1_used~0_504) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~x$r_buff0_thd1~0_120 0) (= 0 |v_ULTIMATE.start_main_~#t1888~0.offset_17|) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t1888~0.base_20| 1)) (= 0 v_~__unbuffered_p2_EAX~0_22) (= v_~x$flush_delayed~0_34 0) (= v_~main$tmp_guard0~0_24 0) (= v_~weak$$choice2~0_110 0) (= v_~y~0_136 0) (= 0 v_~x$w_buff0_used~0_807) (= (select .cse0 |v_ULTIMATE.start_main_~#t1888~0.base_20|) 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ~x$w_buff0~0=v_~x$w_buff0~0_268, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_34, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_45|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_187, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_123, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_50|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t1890~0.offset=|v_ULTIMATE.start_main_~#t1890~0.offset_16|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_37|, ~x$w_buff1~0=v_~x$w_buff1~0_230, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_504, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_212, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_48|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_155, ~x~0=v_~x~0_194, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_120, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ULTIMATE.start_main_~#t1888~0.base=|v_ULTIMATE.start_main_~#t1888~0.base_20|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_195, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_125|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y~0=v_~y~0_136, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_48|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ULTIMATE.start_main_~#t1888~0.offset=|v_ULTIMATE.start_main_~#t1888~0.offset_17|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_297, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_213, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_807, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t1890~0.base=|v_ULTIMATE.start_main_~#t1890~0.base_20|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1889~0.offset=|v_ULTIMATE.start_main_~#t1889~0.offset_17|, ~weak$$choice2~0=v_~weak$$choice2~0_110, ULTIMATE.start_main_~#t1889~0.base=|v_ULTIMATE.start_main_~#t1889~0.base_21|, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t1890~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t1888~0.base, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t1888~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1890~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t1889~0.offset, ~weak$$choice2~0, ULTIMATE.start_main_~#t1889~0.base, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:43:30,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L805-1-->L807: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1889~0.base_11| 0)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1889~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1889~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1889~0.base_11|) |v_ULTIMATE.start_main_~#t1889~0.offset_10| 1)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1889~0.base_11| 4)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1889~0.base_11| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1889~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t1889~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1889~0.offset=|v_ULTIMATE.start_main_~#t1889~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1889~0.base=|v_ULTIMATE.start_main_~#t1889~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t1889~0.offset, #length, ULTIMATE.start_main_~#t1889~0.base] because there is no mapped edge [2019-12-07 11:43:30,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1890~0.base_9|) 0) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1890~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t1890~0.base_9|) |v_ULTIMATE.start_main_~#t1890~0.offset_8| 2)) |v_#memory_int_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1890~0.base_9|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1890~0.base_9| 1)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t1890~0.base_9| 4) |v_#length_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1890~0.base_9|) (= 0 |v_ULTIMATE.start_main_~#t1890~0.offset_8|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t1890~0.base=|v_ULTIMATE.start_main_~#t1890~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1890~0.offset=|v_ULTIMATE.start_main_~#t1890~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t1890~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t1890~0.offset] because there is no mapped edge [2019-12-07 11:43:30,613 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [687] [687] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= 2 v_~x$w_buff0~0_31) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_32 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_32, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:43:30,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-624585183 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-624585183 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-624585183| ~x$w_buff1~0_In-624585183)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-624585183| ~x~0_In-624585183)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-624585183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-624585183, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-624585183, ~x~0=~x~0_In-624585183} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-624585183|, ~x$w_buff1~0=~x$w_buff1~0_In-624585183, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-624585183, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-624585183, ~x~0=~x~0_In-624585183} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 11:43:30,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L782-4-->L783: Formula: (= v_~x~0_20 |v_P2Thread1of1ForFork2_#t~ite15_10|) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_10|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_9|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_20} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 11:43:30,614 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L783-->L783-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In103154931 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In103154931 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out103154931|) (not .cse1)) (and (= ~x$w_buff0_used~0_In103154931 |P2Thread1of1ForFork2_#t~ite17_Out103154931|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In103154931, ~x$w_buff0_used~0=~x$w_buff0_used~0_In103154931} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In103154931, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out103154931|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In103154931} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:43:30,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-420886999 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-420886999 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In-420886999 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-420886999 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite18_Out-420886999| ~x$w_buff1_used~0_In-420886999)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-420886999| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-420886999, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-420886999, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-420886999, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-420886999} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-420886999, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-420886999, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-420886999, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-420886999|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-420886999} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 11:43:30,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L733-2-->L733-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out-2115826337| |P0Thread1of1ForFork0_#t~ite3_Out-2115826337|)) (.cse1 (= (mod ~x$w_buff1_used~0_In-2115826337 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd1~0_In-2115826337 256) 0))) (or (and .cse0 (= ~x$w_buff1~0_In-2115826337 |P0Thread1of1ForFork0_#t~ite3_Out-2115826337|) (not .cse1) (not .cse2)) (and .cse0 (or .cse1 .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out-2115826337| ~x~0_In-2115826337)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2115826337, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2115826337, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2115826337, ~x~0=~x~0_In-2115826337} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-2115826337|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-2115826337|, ~x$w_buff1~0=~x$w_buff1~0_In-2115826337, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2115826337, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2115826337, ~x~0=~x~0_In-2115826337} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 11:43:30,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-2065471226 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-2065471226 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-2065471226 |P0Thread1of1ForFork0_#t~ite5_Out-2065471226|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-2065471226|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2065471226, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2065471226} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-2065471226|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2065471226, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2065471226} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:43:30,615 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In797389550 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In797389550 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In797389550 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In797389550 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In797389550 |P0Thread1of1ForFork0_#t~ite6_Out797389550|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out797389550|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In797389550, ~x$w_buff1_used~0=~x$w_buff1_used~0_In797389550, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In797389550, ~x$w_buff0_used~0=~x$w_buff0_used~0_In797389550} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out797389550|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In797389550, ~x$w_buff1_used~0=~x$w_buff1_used~0_In797389550, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In797389550, ~x$w_buff0_used~0=~x$w_buff0_used~0_In797389550} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:43:30,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L785-->L785-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-1171234034 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1171234034 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1171234034 |P2Thread1of1ForFork2_#t~ite19_Out-1171234034|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1171234034|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1171234034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1171234034} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1171234034, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1171234034|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1171234034} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 11:43:30,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In1463469527 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1463469527 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1463469527 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In1463469527 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd3~0_In1463469527 |P2Thread1of1ForFork2_#t~ite20_Out1463469527|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1463469527|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1463469527, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1463469527, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1463469527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1463469527} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1463469527|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1463469527, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1463469527, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1463469527, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1463469527} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 11:43:30,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_52| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_52|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_51|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:43:30,616 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1508606691 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1508606691 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In-1508606691 |P0Thread1of1ForFork0_#t~ite7_Out-1508606691|)) (and (not .cse0) (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite7_Out-1508606691|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1508606691, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1508606691} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1508606691, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1508606691|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1508606691} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 11:43:30,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In1061045647 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1061045647 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1061045647 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1061045647 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out1061045647| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite8_Out1061045647| ~x$r_buff1_thd1~0_In1061045647)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1061045647, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1061045647, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1061045647, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1061045647} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1061045647, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1061045647|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1061045647, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1061045647, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1061045647} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:43:30,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_61 |v_P0Thread1of1ForFork0_#t~ite8_24|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_23|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_61} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 11:43:30,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In635449495 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In635449495 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In635449495 |P1Thread1of1ForFork1_#t~ite11_Out635449495|)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out635449495| 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In635449495, ~x$w_buff0_used~0=~x$w_buff0_used~0_In635449495} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out635449495|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In635449495, ~x$w_buff0_used~0=~x$w_buff0_used~0_In635449495} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:43:30,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L764-->L764-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In-519777358 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-519777358 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-519777358 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-519777358 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-519777358| ~x$w_buff1_used~0_In-519777358) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-519777358| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-519777358, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-519777358, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-519777358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519777358} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-519777358, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-519777358, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-519777358|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-519777358, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519777358} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:43:30,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L765-->L766: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-407306411 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-407306411 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_In-407306411 ~x$r_buff0_thd2~0_Out-407306411))) (or (and (not .cse0) (= 0 ~x$r_buff0_thd2~0_Out-407306411) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-407306411, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-407306411} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-407306411|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-407306411, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-407306411} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:43:30,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In585464578 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In585464578 256))) (.cse1 (= (mod ~x$r_buff0_thd2~0_In585464578 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In585464578 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out585464578| ~x$r_buff1_thd2~0_In585464578) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out585464578| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In585464578, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In585464578, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In585464578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In585464578} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In585464578, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In585464578, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In585464578, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out585464578|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In585464578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:43:30,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [806] [806] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= v_~x$r_buff1_thd2~0_162 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_162, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:43:30,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:43:30,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-2-->L815-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out1909934144| |ULTIMATE.start_main_#t~ite24_Out1909934144|)) (.cse2 (= (mod ~x$w_buff1_used~0_In1909934144 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In1909934144 256) 0))) (or (and .cse0 (= ~x~0_In1909934144 |ULTIMATE.start_main_#t~ite24_Out1909934144|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~x$w_buff1~0_In1909934144 |ULTIMATE.start_main_#t~ite24_Out1909934144|) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1909934144, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1909934144, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1909934144, ~x~0=~x~0_In1909934144} OutVars{~x$w_buff1~0=~x$w_buff1~0_In1909934144, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1909934144|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1909934144|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1909934144, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1909934144, ~x~0=~x~0_In1909934144} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 11:43:30,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-819846602 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-819846602 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-819846602|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-819846602 |ULTIMATE.start_main_#t~ite26_Out-819846602|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-819846602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-819846602} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-819846602, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-819846602|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-819846602} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 11:43:30,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd0~0_In-2006488851 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-2006488851 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-2006488851 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-2006488851 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-2006488851| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out-2006488851| ~x$w_buff1_used~0_In-2006488851) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2006488851, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006488851, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2006488851, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006488851} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2006488851, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2006488851, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-2006488851|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2006488851, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2006488851} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 11:43:30,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In207471314 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In207471314 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In207471314 |ULTIMATE.start_main_#t~ite28_Out207471314|)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite28_Out207471314|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In207471314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207471314} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In207471314, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out207471314|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In207471314} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 11:43:30,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-621971206 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-621971206 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-621971206 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-621971206 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out-621971206| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite29_Out-621971206| ~x$r_buff1_thd0~0_In-621971206) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-621971206, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-621971206, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-621971206, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-621971206} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-621971206, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-621971206|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-621971206, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-621971206, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-621971206} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 11:43:30,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [719] [719] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_112 v_~x$r_buff0_thd0~0_111) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_112, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:43:30,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$mem_tmp~0_13 v_~x~0_153) (= v_~x$flush_delayed~0_22 0)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~x$mem_tmp~0=v_~x$mem_tmp~0_13, ~x~0=v_~x~0_153, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:43:30,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:43:30,690 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_aa2e5ca4-b458-4fc5-a7a9-b19096230528/bin/utaipan/witness.graphml [2019-12-07 11:43:30,690 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:43:30,691 INFO L168 Benchmark]: Toolchain (without parser) took 109406.18 ms. Allocated memory was 1.0 GB in the beginning and 7.8 GB in the end (delta: 6.7 GB). Free memory was 934.0 MB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,692 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:43:30,692 INFO L168 Benchmark]: CACSL2BoogieTranslator took 376.33 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.0 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -158.5 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,692 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,693 INFO L168 Benchmark]: Boogie Preprocessor took 27.35 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:43:30,693 INFO L168 Benchmark]: RCFGBuilder took 422.03 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,693 INFO L168 Benchmark]: TraceAbstraction took 108456.74 ms. Allocated memory was 1.2 GB in the beginning and 7.8 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,694 INFO L168 Benchmark]: Witness Printer took 80.33 ms. Allocated memory is still 7.8 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 37.9 MB). Peak memory consumption was 37.9 MB. Max. memory is 11.5 GB. [2019-12-07 11:43:30,695 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 376.33 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 130.0 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -158.5 MB). Peak memory consumption was 18.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.19 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.35 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 422.03 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 108456.74 ms. Allocated memory was 1.2 GB in the beginning and 7.8 GB in the end (delta: 6.6 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 80.33 ms. Allocated memory is still 7.8 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 37.9 MB). Peak memory consumption was 37.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 174 ProgramPointsBefore, 94 ProgramPointsAfterwards, 211 TransitionsBefore, 106 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 29 ChoiceCompositions, 6159 VarBasedMoverChecksPositive, 253 VarBasedMoverChecksNegative, 78 SemBasedMoverChecksPositive, 250 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 78277 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t1888, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L807] FCALL, FORK 0 pthread_create(&t1889, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L809] FCALL, FORK 0 pthread_create(&t1890, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L752] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L753] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L754] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L755] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L756] 2 x$r_buff0_thd2 = (_Bool)1 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L727] 1 y = 2 [L730] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L782] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L783] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L733] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L734] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L784] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L785] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L762] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L735] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L736] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L762] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L763] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L764] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L815] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L815] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L816] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L817] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L818] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L819] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 x$flush_delayed = weak$$choice2 [L825] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L826] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L827] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L827] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L828] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L828] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L829] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L830] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L832] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 108.2s, OverallIterations: 22, TraceHistogramMax: 1, AutomataDifference: 18.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3795 SDtfs, 2840 SDslu, 6625 SDs, 0 SdLazy, 3378 SolverSat, 149 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 129 GetRequests, 26 SyntacticMatches, 13 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=222544occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 71.4s AutomataMinimizationTime, 21 MinimizatonAttempts, 390214 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 904 NumberOfCodeBlocks, 904 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 815 ConstructedInterpolants, 0 QuantifiedInterpolants, 106366 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 21 InterpolantComputations, 21 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...