./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6418551c7b2ff4079f46747cc16d35fa879d6bb4 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 20:05:38,385 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 20:05:38,386 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 20:05:38,393 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 20:05:38,393 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 20:05:38,394 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 20:05:38,395 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 20:05:38,396 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 20:05:38,397 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 20:05:38,398 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 20:05:38,399 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 20:05:38,399 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 20:05:38,400 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 20:05:38,400 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 20:05:38,401 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 20:05:38,402 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 20:05:38,402 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 20:05:38,403 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 20:05:38,404 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 20:05:38,406 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 20:05:38,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 20:05:38,408 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 20:05:38,409 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 20:05:38,409 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 20:05:38,411 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 20:05:38,411 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 20:05:38,411 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 20:05:38,412 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 20:05:38,412 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 20:05:38,413 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 20:05:38,413 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 20:05:38,413 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 20:05:38,414 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 20:05:38,414 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 20:05:38,415 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 20:05:38,415 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 20:05:38,415 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 20:05:38,415 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 20:05:38,415 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 20:05:38,416 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 20:05:38,416 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 20:05:38,417 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 20:05:38,427 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 20:05:38,427 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 20:05:38,427 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 20:05:38,428 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 20:05:38,428 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 20:05:38,429 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 20:05:38,429 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 20:05:38,429 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 20:05:38,429 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 20:05:38,429 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 20:05:38,430 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 20:05:38,431 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:05:38,431 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 20:05:38,431 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 20:05:38,432 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6418551c7b2ff4079f46747cc16d35fa879d6bb4 [2019-12-07 20:05:38,532 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 20:05:38,539 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 20:05:38,541 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 20:05:38,542 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 20:05:38,542 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 20:05:38,543 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i [2019-12-07 20:05:38,578 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/data/3f47f75f5/1ef5d818561b44de9a2e2c27607e8069/FLAG2fb5db970 [2019-12-07 20:05:38,939 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 20:05:38,939 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i [2019-12-07 20:05:38,949 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/data/3f47f75f5/1ef5d818561b44de9a2e2c27607e8069/FLAG2fb5db970 [2019-12-07 20:05:38,958 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/data/3f47f75f5/1ef5d818561b44de9a2e2c27607e8069 [2019-12-07 20:05:38,959 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 20:05:38,960 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 20:05:38,961 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 20:05:38,961 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 20:05:38,963 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 20:05:38,964 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:05:38" (1/1) ... [2019-12-07 20:05:38,966 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:38, skipping insertion in model container [2019-12-07 20:05:38,966 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 08:05:38" (1/1) ... [2019-12-07 20:05:38,971 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 20:05:39,000 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 20:05:39,257 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:05:39,265 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 20:05:39,308 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 20:05:39,356 INFO L208 MainTranslator]: Completed translation [2019-12-07 20:05:39,356 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39 WrapperNode [2019-12-07 20:05:39,357 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 20:05:39,357 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 20:05:39,357 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 20:05:39,357 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 20:05:39,364 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,377 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,395 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 20:05:39,395 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 20:05:39,396 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 20:05:39,396 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 20:05:39,402 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,402 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,406 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,406 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,414 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,417 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,420 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... [2019-12-07 20:05:39,423 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 20:05:39,423 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 20:05:39,423 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 20:05:39,423 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 20:05:39,424 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 20:05:39,473 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 20:05:39,473 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 20:05:39,474 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 20:05:39,474 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 20:05:39,474 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 20:05:39,475 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 20:05:39,475 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 20:05:39,475 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 20:05:39,475 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 20:05:39,475 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 20:05:39,477 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 20:05:39,870 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 20:05:39,870 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 20:05:39,871 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:05:39 BoogieIcfgContainer [2019-12-07 20:05:39,871 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 20:05:39,872 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 20:05:39,872 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 20:05:39,874 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 20:05:39,874 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 08:05:38" (1/3) ... [2019-12-07 20:05:39,874 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d1f8ae2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:05:39, skipping insertion in model container [2019-12-07 20:05:39,874 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 08:05:39" (2/3) ... [2019-12-07 20:05:39,875 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@d1f8ae2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 08:05:39, skipping insertion in model container [2019-12-07 20:05:39,875 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:05:39" (3/3) ... [2019-12-07 20:05:39,876 INFO L109 eAbstractionObserver]: Analyzing ICFG safe009_rmo.opt.i [2019-12-07 20:05:39,882 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 20:05:39,882 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 20:05:39,887 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 20:05:39,888 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 20:05:39,913 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,914 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,915 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,916 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,917 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,918 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,918 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,918 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,919 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,920 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,922 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,923 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,924 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,925 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,926 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,927 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,928 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,929 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,929 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,929 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,929 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,929 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,930 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,931 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 20:05:39,950 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-07 20:05:39,962 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 20:05:39,962 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 20:05:39,962 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 20:05:39,962 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 20:05:39,962 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 20:05:39,962 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 20:05:39,962 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 20:05:39,962 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 20:05:39,973 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 192 places, 230 transitions [2019-12-07 20:05:39,975 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 230 transitions [2019-12-07 20:05:40,036 INFO L134 PetriNetUnfolder]: 48/227 cut-off events. [2019-12-07 20:05:40,036 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:05:40,046 INFO L76 FinitePrefix]: Finished finitePrefix Result has 237 conditions, 227 events. 48/227 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 744 event pairs. 9/187 useless extension candidates. Maximal degree in co-relation 180. Up to 2 conditions per place. [2019-12-07 20:05:40,062 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 230 transitions [2019-12-07 20:05:40,092 INFO L134 PetriNetUnfolder]: 48/227 cut-off events. [2019-12-07 20:05:40,092 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 20:05:40,098 INFO L76 FinitePrefix]: Finished finitePrefix Result has 237 conditions, 227 events. 48/227 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 744 event pairs. 9/187 useless extension candidates. Maximal degree in co-relation 180. Up to 2 conditions per place. [2019-12-07 20:05:40,117 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19530 [2019-12-07 20:05:40,118 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 20:05:43,487 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification that was a NOOP. DAG size: 126 [2019-12-07 20:05:43,609 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 122 [2019-12-07 20:05:43,907 WARN L192 SmtUtils]: Spent 290.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 130 [2019-12-07 20:05:44,048 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2019-12-07 20:05:44,064 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80972 [2019-12-07 20:05:44,064 INFO L214 etLargeBlockEncoding]: Total number of compositions: 145 [2019-12-07 20:05:44,066 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 86 places, 95 transitions [2019-12-07 20:05:53,516 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 88334 states. [2019-12-07 20:05:53,518 INFO L276 IsEmpty]: Start isEmpty. Operand 88334 states. [2019-12-07 20:05:53,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 20:05:53,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:53,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:53,550 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:53,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:53,555 INFO L82 PathProgramCache]: Analyzing trace with hash -986847660, now seen corresponding path program 1 times [2019-12-07 20:05:53,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:53,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278314420] [2019-12-07 20:05:53,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:53,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:53,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:53,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278314420] [2019-12-07 20:05:53,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:53,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:05:53,748 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189491582] [2019-12-07 20:05:53,752 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:05:53,752 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:53,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:05:53,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:53,763 INFO L87 Difference]: Start difference. First operand 88334 states. Second operand 3 states. [2019-12-07 20:05:54,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:54,496 INFO L93 Difference]: Finished difference Result 86714 states and 375258 transitions. [2019-12-07 20:05:54,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:05:54,498 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 20:05:54,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:54,970 INFO L225 Difference]: With dead ends: 86714 [2019-12-07 20:05:54,970 INFO L226 Difference]: Without dead ends: 81566 [2019-12-07 20:05:54,971 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:05:56,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81566 states. [2019-12-07 20:05:58,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81566 to 81566. [2019-12-07 20:05:58,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81566 states. [2019-12-07 20:05:58,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81566 states to 81566 states and 353106 transitions. [2019-12-07 20:05:58,308 INFO L78 Accepts]: Start accepts. Automaton has 81566 states and 353106 transitions. Word has length 17 [2019-12-07 20:05:58,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:58,309 INFO L462 AbstractCegarLoop]: Abstraction has 81566 states and 353106 transitions. [2019-12-07 20:05:58,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:05:58,309 INFO L276 IsEmpty]: Start isEmpty. Operand 81566 states and 353106 transitions. [2019-12-07 20:05:58,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 20:05:58,325 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:58,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:58,326 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:58,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:58,326 INFO L82 PathProgramCache]: Analyzing trace with hash -1233893207, now seen corresponding path program 1 times [2019-12-07 20:05:58,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:58,326 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2041050086] [2019-12-07 20:05:58,326 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:58,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:58,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:58,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2041050086] [2019-12-07 20:05:58,419 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:58,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:05:58,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [305032711] [2019-12-07 20:05:58,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:58,421 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:58,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:58,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:58,422 INFO L87 Difference]: Start difference. First operand 81566 states and 353106 transitions. Second operand 4 states. [2019-12-07 20:05:58,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:58,571 INFO L93 Difference]: Finished difference Result 24578 states and 86748 transitions. [2019-12-07 20:05:58,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:05:58,572 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 20:05:58,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:58,620 INFO L225 Difference]: With dead ends: 24578 [2019-12-07 20:05:58,620 INFO L226 Difference]: Without dead ends: 19610 [2019-12-07 20:05:58,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:05:58,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19610 states. [2019-12-07 20:05:58,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19610 to 19610. [2019-12-07 20:05:58,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19610 states. [2019-12-07 20:05:58,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19610 states to 19610 states and 66534 transitions. [2019-12-07 20:05:58,929 INFO L78 Accepts]: Start accepts. Automaton has 19610 states and 66534 transitions. Word has length 18 [2019-12-07 20:05:58,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:58,929 INFO L462 AbstractCegarLoop]: Abstraction has 19610 states and 66534 transitions. [2019-12-07 20:05:58,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:05:58,929 INFO L276 IsEmpty]: Start isEmpty. Operand 19610 states and 66534 transitions. [2019-12-07 20:05:58,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 20:05:58,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:58,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:58,940 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:58,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:58,940 INFO L82 PathProgramCache]: Analyzing trace with hash -878963340, now seen corresponding path program 1 times [2019-12-07 20:05:58,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:58,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601036562] [2019-12-07 20:05:58,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:58,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:59,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:59,004 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601036562] [2019-12-07 20:05:59,004 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:59,004 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:05:59,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [105346877] [2019-12-07 20:05:59,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:59,005 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:59,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:59,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:59,005 INFO L87 Difference]: Start difference. First operand 19610 states and 66534 transitions. Second operand 4 states. [2019-12-07 20:05:59,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:05:59,311 INFO L93 Difference]: Finished difference Result 28094 states and 91940 transitions. [2019-12-07 20:05:59,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:05:59,311 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 20:05:59,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:05:59,377 INFO L225 Difference]: With dead ends: 28094 [2019-12-07 20:05:59,377 INFO L226 Difference]: Without dead ends: 28094 [2019-12-07 20:05:59,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:05:59,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28094 states. [2019-12-07 20:05:59,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28094 to 25566. [2019-12-07 20:05:59,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25566 states. [2019-12-07 20:05:59,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25566 states to 25566 states and 84762 transitions. [2019-12-07 20:05:59,825 INFO L78 Accepts]: Start accepts. Automaton has 25566 states and 84762 transitions. Word has length 28 [2019-12-07 20:05:59,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:05:59,826 INFO L462 AbstractCegarLoop]: Abstraction has 25566 states and 84762 transitions. [2019-12-07 20:05:59,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:05:59,826 INFO L276 IsEmpty]: Start isEmpty. Operand 25566 states and 84762 transitions. [2019-12-07 20:05:59,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 20:05:59,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:05:59,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:05:59,837 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:05:59,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:05:59,837 INFO L82 PathProgramCache]: Analyzing trace with hash 457198623, now seen corresponding path program 1 times [2019-12-07 20:05:59,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:05:59,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867683390] [2019-12-07 20:05:59,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:05:59,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:05:59,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:05:59,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867683390] [2019-12-07 20:05:59,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:05:59,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:05:59,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [873052652] [2019-12-07 20:05:59,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:05:59,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:05:59,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:05:59,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:05:59,891 INFO L87 Difference]: Start difference. First operand 25566 states and 84762 transitions. Second operand 4 states. [2019-12-07 20:06:00,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:00,151 INFO L93 Difference]: Finished difference Result 33274 states and 107925 transitions. [2019-12-07 20:06:00,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:06:00,152 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 20:06:00,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:00,205 INFO L225 Difference]: With dead ends: 33274 [2019-12-07 20:06:00,205 INFO L226 Difference]: Without dead ends: 33274 [2019-12-07 20:06:00,205 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:00,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33274 states. [2019-12-07 20:06:00,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33274 to 28465. [2019-12-07 20:06:00,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28465 states. [2019-12-07 20:06:00,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28465 states to 28465 states and 93739 transitions. [2019-12-07 20:06:00,693 INFO L78 Accepts]: Start accepts. Automaton has 28465 states and 93739 transitions. Word has length 28 [2019-12-07 20:06:00,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:00,693 INFO L462 AbstractCegarLoop]: Abstraction has 28465 states and 93739 transitions. [2019-12-07 20:06:00,693 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:00,693 INFO L276 IsEmpty]: Start isEmpty. Operand 28465 states and 93739 transitions. [2019-12-07 20:06:00,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 20:06:00,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:00,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:00,706 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:00,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:00,706 INFO L82 PathProgramCache]: Analyzing trace with hash 2110520713, now seen corresponding path program 1 times [2019-12-07 20:06:00,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:00,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733129878] [2019-12-07 20:06:00,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:00,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:00,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:00,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733129878] [2019-12-07 20:06:00,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:00,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:00,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282538514] [2019-12-07 20:06:00,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:00,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:00,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:00,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:00,843 INFO L87 Difference]: Start difference. First operand 28465 states and 93739 transitions. Second operand 5 states. [2019-12-07 20:06:00,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:00,903 INFO L93 Difference]: Finished difference Result 12038 states and 36499 transitions. [2019-12-07 20:06:00,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 20:06:00,904 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 20:06:00,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:00,915 INFO L225 Difference]: With dead ends: 12038 [2019-12-07 20:06:00,915 INFO L226 Difference]: Without dead ends: 10333 [2019-12-07 20:06:00,915 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:00,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10333 states. [2019-12-07 20:06:01,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10333 to 10069. [2019-12-07 20:06:01,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10069 states. [2019-12-07 20:06:01,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10069 states to 10069 states and 30458 transitions. [2019-12-07 20:06:01,053 INFO L78 Accepts]: Start accepts. Automaton has 10069 states and 30458 transitions. Word has length 29 [2019-12-07 20:06:01,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:01,053 INFO L462 AbstractCegarLoop]: Abstraction has 10069 states and 30458 transitions. [2019-12-07 20:06:01,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:01,053 INFO L276 IsEmpty]: Start isEmpty. Operand 10069 states and 30458 transitions. [2019-12-07 20:06:01,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 20:06:01,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:01,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:01,066 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:01,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:01,066 INFO L82 PathProgramCache]: Analyzing trace with hash -1416589173, now seen corresponding path program 1 times [2019-12-07 20:06:01,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:01,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439863154] [2019-12-07 20:06:01,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:01,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:01,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:01,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439863154] [2019-12-07 20:06:01,155 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:01,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 20:06:01,155 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1275760382] [2019-12-07 20:06:01,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 20:06:01,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:01,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 20:06:01,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:01,156 INFO L87 Difference]: Start difference. First operand 10069 states and 30458 transitions. Second operand 7 states. [2019-12-07 20:06:01,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:01,589 INFO L93 Difference]: Finished difference Result 11799 states and 35040 transitions. [2019-12-07 20:06:01,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 20:06:01,589 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 20:06:01,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:01,600 INFO L225 Difference]: With dead ends: 11799 [2019-12-07 20:06:01,600 INFO L226 Difference]: Without dead ends: 11799 [2019-12-07 20:06:01,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2019-12-07 20:06:01,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11799 states. [2019-12-07 20:06:01,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11799 to 9629. [2019-12-07 20:06:01,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9629 states. [2019-12-07 20:06:01,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9629 states to 9629 states and 29082 transitions. [2019-12-07 20:06:01,735 INFO L78 Accepts]: Start accepts. Automaton has 9629 states and 29082 transitions. Word has length 39 [2019-12-07 20:06:01,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:01,735 INFO L462 AbstractCegarLoop]: Abstraction has 9629 states and 29082 transitions. [2019-12-07 20:06:01,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 20:06:01,735 INFO L276 IsEmpty]: Start isEmpty. Operand 9629 states and 29082 transitions. [2019-12-07 20:06:01,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 20:06:01,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:01,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:01,748 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:01,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:01,748 INFO L82 PathProgramCache]: Analyzing trace with hash -1670978222, now seen corresponding path program 1 times [2019-12-07 20:06:01,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:01,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019650278] [2019-12-07 20:06:01,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:01,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:01,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:01,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019650278] [2019-12-07 20:06:01,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:01,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:01,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007517334] [2019-12-07 20:06:01,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:01,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:01,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:01,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:01,842 INFO L87 Difference]: Start difference. First operand 9629 states and 29082 transitions. Second operand 6 states. [2019-12-07 20:06:01,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:01,907 INFO L93 Difference]: Finished difference Result 8825 states and 27149 transitions. [2019-12-07 20:06:01,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 20:06:01,908 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 20:06:01,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:01,917 INFO L225 Difference]: With dead ends: 8825 [2019-12-07 20:06:01,917 INFO L226 Difference]: Without dead ends: 8724 [2019-12-07 20:06:01,917 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 20:06:01,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8724 states. [2019-12-07 20:06:02,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8724 to 8436. [2019-12-07 20:06:02,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-12-07 20:06:02,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 26170 transitions. [2019-12-07 20:06:02,027 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 26170 transitions. Word has length 40 [2019-12-07 20:06:02,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:02,027 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 26170 transitions. [2019-12-07 20:06:02,028 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:02,028 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 26170 transitions. [2019-12-07 20:06:02,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 20:06:02,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:02,039 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:02,039 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:02,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:02,039 INFO L82 PathProgramCache]: Analyzing trace with hash 227924408, now seen corresponding path program 1 times [2019-12-07 20:06:02,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:02,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545404283] [2019-12-07 20:06:02,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:02,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:02,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:02,076 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545404283] [2019-12-07 20:06:02,076 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:02,076 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:02,077 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636228790] [2019-12-07 20:06:02,077 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:02,077 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:02,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:02,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:02,078 INFO L87 Difference]: Start difference. First operand 8436 states and 26170 transitions. Second operand 3 states. [2019-12-07 20:06:02,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:02,139 INFO L93 Difference]: Finished difference Result 13940 states and 42457 transitions. [2019-12-07 20:06:02,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:02,139 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2019-12-07 20:06:02,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:02,154 INFO L225 Difference]: With dead ends: 13940 [2019-12-07 20:06:02,154 INFO L226 Difference]: Without dead ends: 13940 [2019-12-07 20:06:02,155 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:02,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13940 states. [2019-12-07 20:06:02,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13940 to 9810. [2019-12-07 20:06:02,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9810 states. [2019-12-07 20:06:02,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9810 states to 9810 states and 30153 transitions. [2019-12-07 20:06:02,309 INFO L78 Accepts]: Start accepts. Automaton has 9810 states and 30153 transitions. Word has length 58 [2019-12-07 20:06:02,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:02,309 INFO L462 AbstractCegarLoop]: Abstraction has 9810 states and 30153 transitions. [2019-12-07 20:06:02,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:02,310 INFO L276 IsEmpty]: Start isEmpty. Operand 9810 states and 30153 transitions. [2019-12-07 20:06:02,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-07 20:06:02,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:02,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:02,324 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:02,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:02,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1697581937, now seen corresponding path program 1 times [2019-12-07 20:06:02,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:02,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253706147] [2019-12-07 20:06:02,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:02,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:02,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:02,385 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253706147] [2019-12-07 20:06:02,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:02,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:02,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756196293] [2019-12-07 20:06:02,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:02,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:02,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:02,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:02,386 INFO L87 Difference]: Start difference. First operand 9810 states and 30153 transitions. Second operand 5 states. [2019-12-07 20:06:02,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:02,580 INFO L93 Difference]: Finished difference Result 13023 states and 39182 transitions. [2019-12-07 20:06:02,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:02,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 58 [2019-12-07 20:06:02,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:02,594 INFO L225 Difference]: With dead ends: 13023 [2019-12-07 20:06:02,594 INFO L226 Difference]: Without dead ends: 13023 [2019-12-07 20:06:02,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:02,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13023 states. [2019-12-07 20:06:02,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13023 to 10554. [2019-12-07 20:06:02,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10554 states. [2019-12-07 20:06:02,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10554 states to 10554 states and 31876 transitions. [2019-12-07 20:06:02,745 INFO L78 Accepts]: Start accepts. Automaton has 10554 states and 31876 transitions. Word has length 58 [2019-12-07 20:06:02,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:02,745 INFO L462 AbstractCegarLoop]: Abstraction has 10554 states and 31876 transitions. [2019-12-07 20:06:02,745 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:02,745 INFO L276 IsEmpty]: Start isEmpty. Operand 10554 states and 31876 transitions. [2019-12-07 20:06:02,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 20:06:02,755 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:02,755 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:02,756 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:02,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:02,756 INFO L82 PathProgramCache]: Analyzing trace with hash 60629961, now seen corresponding path program 1 times [2019-12-07 20:06:02,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:02,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814691264] [2019-12-07 20:06:02,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:02,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:02,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:02,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [814691264] [2019-12-07 20:06:02,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:02,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:02,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427799523] [2019-12-07 20:06:02,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:02,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:02,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:02,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:02,819 INFO L87 Difference]: Start difference. First operand 10554 states and 31876 transitions. Second operand 5 states. [2019-12-07 20:06:03,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:03,094 INFO L93 Difference]: Finished difference Result 14106 states and 41943 transitions. [2019-12-07 20:06:03,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 20:06:03,095 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 59 [2019-12-07 20:06:03,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:03,111 INFO L225 Difference]: With dead ends: 14106 [2019-12-07 20:06:03,111 INFO L226 Difference]: Without dead ends: 14106 [2019-12-07 20:06:03,111 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 20:06:03,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14106 states. [2019-12-07 20:06:03,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14106 to 11034. [2019-12-07 20:06:03,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11034 states. [2019-12-07 20:06:03,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11034 states to 11034 states and 33302 transitions. [2019-12-07 20:06:03,305 INFO L78 Accepts]: Start accepts. Automaton has 11034 states and 33302 transitions. Word has length 59 [2019-12-07 20:06:03,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:03,306 INFO L462 AbstractCegarLoop]: Abstraction has 11034 states and 33302 transitions. [2019-12-07 20:06:03,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:03,306 INFO L276 IsEmpty]: Start isEmpty. Operand 11034 states and 33302 transitions. [2019-12-07 20:06:03,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 20:06:03,317 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:03,317 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:03,318 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:03,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:03,318 INFO L82 PathProgramCache]: Analyzing trace with hash -2115982021, now seen corresponding path program 2 times [2019-12-07 20:06:03,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:03,318 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635768555] [2019-12-07 20:06:03,318 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:03,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:03,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635768555] [2019-12-07 20:06:03,377 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:03,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:03,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543431748] [2019-12-07 20:06:03,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 20:06:03,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:03,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 20:06:03,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:03,378 INFO L87 Difference]: Start difference. First operand 11034 states and 33302 transitions. Second operand 5 states. [2019-12-07 20:06:03,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:03,468 INFO L93 Difference]: Finished difference Result 15781 states and 46934 transitions. [2019-12-07 20:06:03,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:03,469 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 59 [2019-12-07 20:06:03,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:03,486 INFO L225 Difference]: With dead ends: 15781 [2019-12-07 20:06:03,486 INFO L226 Difference]: Without dead ends: 15781 [2019-12-07 20:06:03,486 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:03,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15781 states. [2019-12-07 20:06:03,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15781 to 10050. [2019-12-07 20:06:03,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10050 states. [2019-12-07 20:06:03,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10050 states to 10050 states and 30316 transitions. [2019-12-07 20:06:03,680 INFO L78 Accepts]: Start accepts. Automaton has 10050 states and 30316 transitions. Word has length 59 [2019-12-07 20:06:03,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:03,680 INFO L462 AbstractCegarLoop]: Abstraction has 10050 states and 30316 transitions. [2019-12-07 20:06:03,680 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 20:06:03,681 INFO L276 IsEmpty]: Start isEmpty. Operand 10050 states and 30316 transitions. [2019-12-07 20:06:03,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-07 20:06:03,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:03,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:03,690 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:03,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:03,690 INFO L82 PathProgramCache]: Analyzing trace with hash -1574340111, now seen corresponding path program 1 times [2019-12-07 20:06:03,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:03,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [83016740] [2019-12-07 20:06:03,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:03,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:03,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:03,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [83016740] [2019-12-07 20:06:03,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:03,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:03,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [757162308] [2019-12-07 20:06:03,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:03,733 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:03,733 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:03,733 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:03,733 INFO L87 Difference]: Start difference. First operand 10050 states and 30316 transitions. Second operand 3 states. [2019-12-07 20:06:03,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:03,760 INFO L93 Difference]: Finished difference Result 10049 states and 30314 transitions. [2019-12-07 20:06:03,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:03,761 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 59 [2019-12-07 20:06:03,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:03,773 INFO L225 Difference]: With dead ends: 10049 [2019-12-07 20:06:03,774 INFO L226 Difference]: Without dead ends: 10049 [2019-12-07 20:06:03,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:03,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10049 states. [2019-12-07 20:06:03,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10049 to 8044. [2019-12-07 20:06:03,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8044 states. [2019-12-07 20:06:03,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8044 states to 8044 states and 24667 transitions. [2019-12-07 20:06:03,887 INFO L78 Accepts]: Start accepts. Automaton has 8044 states and 24667 transitions. Word has length 59 [2019-12-07 20:06:03,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:03,887 INFO L462 AbstractCegarLoop]: Abstraction has 8044 states and 24667 transitions. [2019-12-07 20:06:03,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:03,887 INFO L276 IsEmpty]: Start isEmpty. Operand 8044 states and 24667 transitions. [2019-12-07 20:06:03,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 20:06:03,894 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:03,894 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:03,894 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:03,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:03,895 INFO L82 PathProgramCache]: Analyzing trace with hash 2028677292, now seen corresponding path program 1 times [2019-12-07 20:06:03,895 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:03,895 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854422513] [2019-12-07 20:06:03,895 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:03,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:03,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:03,961 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854422513] [2019-12-07 20:06:03,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:03,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 20:06:03,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [31282069] [2019-12-07 20:06:03,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:03,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:03,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:03,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:03,963 INFO L87 Difference]: Start difference. First operand 8044 states and 24667 transitions. Second operand 6 states. [2019-12-07 20:06:04,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:04,253 INFO L93 Difference]: Finished difference Result 12914 states and 38356 transitions. [2019-12-07 20:06:04,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 20:06:04,253 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 20:06:04,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:04,267 INFO L225 Difference]: With dead ends: 12914 [2019-12-07 20:06:04,267 INFO L226 Difference]: Without dead ends: 12914 [2019-12-07 20:06:04,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 20:06:04,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12914 states. [2019-12-07 20:06:04,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12914 to 8428. [2019-12-07 20:06:04,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8428 states. [2019-12-07 20:06:04,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8428 states to 8428 states and 25689 transitions. [2019-12-07 20:06:04,409 INFO L78 Accepts]: Start accepts. Automaton has 8428 states and 25689 transitions. Word has length 60 [2019-12-07 20:06:04,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:04,409 INFO L462 AbstractCegarLoop]: Abstraction has 8428 states and 25689 transitions. [2019-12-07 20:06:04,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:04,410 INFO L276 IsEmpty]: Start isEmpty. Operand 8428 states and 25689 transitions. [2019-12-07 20:06:04,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 20:06:04,418 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:04,418 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:04,418 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:04,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:04,418 INFO L82 PathProgramCache]: Analyzing trace with hash 1048541426, now seen corresponding path program 1 times [2019-12-07 20:06:04,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:04,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706090129] [2019-12-07 20:06:04,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:04,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:04,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:04,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706090129] [2019-12-07 20:06:04,454 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:04,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:04,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [169437102] [2019-12-07 20:06:04,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:04,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:04,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:04,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,454 INFO L87 Difference]: Start difference. First operand 8428 states and 25689 transitions. Second operand 3 states. [2019-12-07 20:06:04,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:04,477 INFO L93 Difference]: Finished difference Result 8427 states and 25687 transitions. [2019-12-07 20:06:04,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:04,478 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 20:06:04,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:04,489 INFO L225 Difference]: With dead ends: 8427 [2019-12-07 20:06:04,489 INFO L226 Difference]: Without dead ends: 8427 [2019-12-07 20:06:04,489 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8427 states. [2019-12-07 20:06:04,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8427 to 8427. [2019-12-07 20:06:04,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8427 states. [2019-12-07 20:06:04,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8427 states to 8427 states and 25687 transitions. [2019-12-07 20:06:04,597 INFO L78 Accepts]: Start accepts. Automaton has 8427 states and 25687 transitions. Word has length 61 [2019-12-07 20:06:04,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:04,597 INFO L462 AbstractCegarLoop]: Abstraction has 8427 states and 25687 transitions. [2019-12-07 20:06:04,597 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:04,597 INFO L276 IsEmpty]: Start isEmpty. Operand 8427 states and 25687 transitions. [2019-12-07 20:06:04,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 20:06:04,605 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:04,605 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:04,605 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:04,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:04,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1856578317, now seen corresponding path program 1 times [2019-12-07 20:06:04,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:04,605 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803923196] [2019-12-07 20:06:04,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:04,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:04,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:04,668 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803923196] [2019-12-07 20:06:04,668 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:04,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:04,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1272845425] [2019-12-07 20:06:04,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:04,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:04,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:04,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,669 INFO L87 Difference]: Start difference. First operand 8427 states and 25687 transitions. Second operand 3 states. [2019-12-07 20:06:04,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:04,696 INFO L93 Difference]: Finished difference Result 8367 states and 25319 transitions. [2019-12-07 20:06:04,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:04,696 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 20:06:04,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:04,706 INFO L225 Difference]: With dead ends: 8367 [2019-12-07 20:06:04,706 INFO L226 Difference]: Without dead ends: 8367 [2019-12-07 20:06:04,706 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8367 states. [2019-12-07 20:06:04,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8367 to 7947. [2019-12-07 20:06:04,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7947 states. [2019-12-07 20:06:04,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7947 states to 7947 states and 24111 transitions. [2019-12-07 20:06:04,809 INFO L78 Accepts]: Start accepts. Automaton has 7947 states and 24111 transitions. Word has length 62 [2019-12-07 20:06:04,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:04,809 INFO L462 AbstractCegarLoop]: Abstraction has 7947 states and 24111 transitions. [2019-12-07 20:06:04,809 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:04,809 INFO L276 IsEmpty]: Start isEmpty. Operand 7947 states and 24111 transitions. [2019-12-07 20:06:04,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 20:06:04,816 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:04,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:04,816 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:04,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:04,816 INFO L82 PathProgramCache]: Analyzing trace with hash 687699090, now seen corresponding path program 1 times [2019-12-07 20:06:04,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:04,817 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660105478] [2019-12-07 20:06:04,817 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:04,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:04,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:04,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1660105478] [2019-12-07 20:06:04,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:04,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 20:06:04,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279563253] [2019-12-07 20:06:04,871 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 20:06:04,871 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:04,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 20:06:04,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,871 INFO L87 Difference]: Start difference. First operand 7947 states and 24111 transitions. Second operand 3 states. [2019-12-07 20:06:04,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:04,900 INFO L93 Difference]: Finished difference Result 7803 states and 23529 transitions. [2019-12-07 20:06:04,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 20:06:04,901 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 20:06:04,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:04,910 INFO L225 Difference]: With dead ends: 7803 [2019-12-07 20:06:04,910 INFO L226 Difference]: Without dead ends: 7803 [2019-12-07 20:06:04,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 20:06:04,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7803 states. [2019-12-07 20:06:04,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7803 to 6963. [2019-12-07 20:06:04,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6963 states. [2019-12-07 20:06:05,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6963 states to 6963 states and 21113 transitions. [2019-12-07 20:06:05,003 INFO L78 Accepts]: Start accepts. Automaton has 6963 states and 21113 transitions. Word has length 62 [2019-12-07 20:06:05,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:05,003 INFO L462 AbstractCegarLoop]: Abstraction has 6963 states and 21113 transitions. [2019-12-07 20:06:05,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 20:06:05,003 INFO L276 IsEmpty]: Start isEmpty. Operand 6963 states and 21113 transitions. [2019-12-07 20:06:05,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 20:06:05,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:05,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:05,009 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:05,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:05,009 INFO L82 PathProgramCache]: Analyzing trace with hash 249256444, now seen corresponding path program 1 times [2019-12-07 20:06:05,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:05,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637135031] [2019-12-07 20:06:05,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:05,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:05,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:05,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637135031] [2019-12-07 20:06:05,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:05,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 20:06:05,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619607897] [2019-12-07 20:06:05,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 20:06:05,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:05,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 20:06:05,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 20:06:05,067 INFO L87 Difference]: Start difference. First operand 6963 states and 21113 transitions. Second operand 4 states. [2019-12-07 20:06:05,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:05,107 INFO L93 Difference]: Finished difference Result 8427 states and 25096 transitions. [2019-12-07 20:06:05,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 20:06:05,107 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2019-12-07 20:06:05,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:05,110 INFO L225 Difference]: With dead ends: 8427 [2019-12-07 20:06:05,110 INFO L226 Difference]: Without dead ends: 2907 [2019-12-07 20:06:05,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 20:06:05,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2907 states. [2019-12-07 20:06:05,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2907 to 2835. [2019-12-07 20:06:05,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2835 states. [2019-12-07 20:06:05,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2835 states to 2835 states and 7850 transitions. [2019-12-07 20:06:05,140 INFO L78 Accepts]: Start accepts. Automaton has 2835 states and 7850 transitions. Word has length 63 [2019-12-07 20:06:05,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:05,140 INFO L462 AbstractCegarLoop]: Abstraction has 2835 states and 7850 transitions. [2019-12-07 20:06:05,140 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 20:06:05,140 INFO L276 IsEmpty]: Start isEmpty. Operand 2835 states and 7850 transitions. [2019-12-07 20:06:05,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 20:06:05,142 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:05,142 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:05,142 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:05,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:05,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1682076282, now seen corresponding path program 2 times [2019-12-07 20:06:05,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:05,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879087332] [2019-12-07 20:06:05,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:05,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 20:06:05,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 20:06:05,212 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [879087332] [2019-12-07 20:06:05,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 20:06:05,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 20:06:05,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1817573096] [2019-12-07 20:06:05,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 20:06:05,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 20:06:05,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 20:06:05,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 20:06:05,213 INFO L87 Difference]: Start difference. First operand 2835 states and 7850 transitions. Second operand 6 states. [2019-12-07 20:06:05,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 20:06:05,256 INFO L93 Difference]: Finished difference Result 4541 states and 12515 transitions. [2019-12-07 20:06:05,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 20:06:05,257 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2019-12-07 20:06:05,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 20:06:05,259 INFO L225 Difference]: With dead ends: 4541 [2019-12-07 20:06:05,259 INFO L226 Difference]: Without dead ends: 1934 [2019-12-07 20:06:05,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 20:06:05,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1934 states. [2019-12-07 20:06:05,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1934 to 1934. [2019-12-07 20:06:05,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1934 states. [2019-12-07 20:06:05,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1934 states to 1934 states and 5237 transitions. [2019-12-07 20:06:05,291 INFO L78 Accepts]: Start accepts. Automaton has 1934 states and 5237 transitions. Word has length 63 [2019-12-07 20:06:05,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 20:06:05,291 INFO L462 AbstractCegarLoop]: Abstraction has 1934 states and 5237 transitions. [2019-12-07 20:06:05,291 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 20:06:05,291 INFO L276 IsEmpty]: Start isEmpty. Operand 1934 states and 5237 transitions. [2019-12-07 20:06:05,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 20:06:05,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 20:06:05,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 20:06:05,293 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 20:06:05,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 20:06:05,294 INFO L82 PathProgramCache]: Analyzing trace with hash -1116199452, now seen corresponding path program 3 times [2019-12-07 20:06:05,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 20:06:05,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [290092165] [2019-12-07 20:06:05,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 20:06:05,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:06:05,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 20:06:05,386 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 20:06:05,386 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 20:06:05,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse1 (store |v_#valid_75| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_140| 1))) (and (= (select (select |v_#memory_int_277| |v_~#x~0.base_140|) |v_~#x~0.offset_140|) 0) (= 0 v_~x$r_buff0_thd1~0_68) (= v_~x$r_buff1_thd3~0_58 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8 0) (= v_~x$r_buff1_thd1~0_56 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_58) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= 0 v_~x$read_delayed~0_7) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24| 1)) (= 0 v_~weak$$choice2~0_98) (= 0 v_~x$r_buff0_thd0~0_92) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$r_buff0_thd3~0_78) (= 0 v_~x$w_buff0~0_96) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_cnt~0_77) (= v_~main$tmp_guard0~0_54 0) (= 0 v_~x$r_buff0_thd2~0_264) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= 0 v_~weak$$choice1~0_32) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= 0 (select .cse1 |v_~#x~0.base_140|)) (= v_~x$mem_tmp~0_39 0) (< 0 |v_#StackHeapBarrier_22|) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t2000~0.base_24|) (= 0 v_~x$w_buff1~0_81) (= 0 v_~__unbuffered_p1_EAX~0_61) (= v_~x$flush_delayed~0_68 0) (= 0 v_~x$r_buff1_thd2~0_177) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24|) 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~weak$$choice0~0_17) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8 0) (= 0 v_~x$w_buff0_used~0_579) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35 0) (= v_~y~0_85 0) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t2000~0.offset_18|) (= 0 |v_~#x~0.offset_140|) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 0) (= v_~main$tmp_guard1~0_32 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35 0) (= 0 v_~x$w_buff1_used~0_346) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_140| 4) |v_ULTIMATE.start_main_~#t2000~0.base_24| 4)) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8) (= (store |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24| (store (select |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24|) |v_ULTIMATE.start_main_~#t2000~0.offset_18| 0)) |v_#memory_int_276|) (< |v_#StackHeapBarrier_22| |v_~#x~0.base_140|) (= v_~x$r_buff1_thd0~0_55 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_277|, #length=|v_#length_37|} OutVars{ULTIMATE.start_main_#t~nondet53=|v_ULTIMATE.start_main_#t~nondet53_26|, ~x$w_buff0~0=v_~x$w_buff0~0_96, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_10|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_68, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_78, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|, ~weak$$choice1~0=v_~weak$$choice1~0_32, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_58, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_61, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35, #length=|v_#length_36|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_92, ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_26|, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_140|, ~x$w_buff1~0=v_~x$w_buff1~0_81, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_169|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_346, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_177, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_46|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_48|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_68, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_9|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_43|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_58, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ~x$mem_tmp~0=v_~x$mem_tmp~0_39, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_17|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t2000~0.base=|v_ULTIMATE.start_main_~#t2000~0.base_24|, ~y~0=v_~y~0_85, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_149|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_20|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_54, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_25|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_55, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_264, ULTIMATE.start_main_#t~nondet61=|v_ULTIMATE.start_main_#t~nondet61_31|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_579, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_21|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_276|, ~#x~0.base=|v_~#x~0.base_140|, ~weak$$choice2~0=v_~weak$$choice2~0_98, ULTIMATE.start_main_~#t2000~0.offset=|v_ULTIMATE.start_main_~#t2000~0.offset_18|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet53, ~x$w_buff0~0, ULTIMATE.start_main_#t~nondet51, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite64, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem54, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite58, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite56, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ~__unbuffered_p1_EAX$w_buff1_used~0, ~__unbuffered_p1_EAX$w_buff1~0, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet52, ~__unbuffered_p1_EAX$read_delayed~0, ULTIMATE.start_main_#t~mem62, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_~#t2002~0.offset, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2000~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite57, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2001~0.offset, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2001~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet61, #NULL.base, ULTIMATE.start_main_#t~ite55, ~x$w_buff0_used~0, ~__unbuffered_p1_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~ite60, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ~weak$$choice2~0, ULTIMATE.start_main_~#t2000~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 20:06:05,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [912] [912] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t2001~0.offset_10| 0) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11|) 0) (= (store |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11| (store (select |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11|) |v_ULTIMATE.start_main_~#t2001~0.offset_10| 1)) |v_#memory_int_138|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2001~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2001~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2001~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_139|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_138|, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_10|, #length=|v_#length_19|, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet51, #valid, #memory_int, ULTIMATE.start_main_~#t2001~0.offset, #length, ULTIMATE.start_main_~#t2001~0.base] because there is no mapped edge [2019-12-07 20:06:05,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [928] [928] L827-1-->L829: Formula: (and (= |v_ULTIMATE.start_main_~#t2002~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2002~0.base_13| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2002~0.base_13|) (= (store |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13| (store (select |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13|) |v_ULTIMATE.start_main_~#t2002~0.offset_11| 2)) |v_#memory_int_202|) (= (select |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13|) 0) (= |v_#valid_43| (store |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2002~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_203|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_5|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_202|, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~nondet52, #valid, #memory_int, ULTIMATE.start_main_~#t2002~0.offset, #length] because there is no mapped edge [2019-12-07 20:06:05,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [953] [953] L769-->L770: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-2003943576 256))) (.cse0 (= ~x$w_buff0~0_In-2003943576 ~x$w_buff0~0_Out-2003943576))) (or (and .cse0 (not .cse1)) (let ((.cse2 (not (= (mod ~x$r_buff0_thd2~0_In-2003943576 256) 0)))) (and .cse1 (or .cse2 (not (= 0 (mod ~x$r_buff1_thd2~0_In-2003943576 256)))) .cse0 (not (= (mod ~x$w_buff0_used~0_In-2003943576 256) 0)) (or .cse2 (not (= 0 (mod ~x$w_buff1_used~0_In-2003943576 256)))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2003943576, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003943576, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2003943576, ~weak$$choice2~0=~weak$$choice2~0_In-2003943576, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2003943576, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003943576} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out-2003943576, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003943576, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2003943576, P1Thread1of1ForFork0_#t~ite16=|P1Thread1of1ForFork0_#t~ite16_Out-2003943576|, ~weak$$choice2~0=~weak$$choice2~0_In-2003943576, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2003943576, P1Thread1of1ForFork0_#t~ite18=|P1Thread1of1ForFork0_#t~ite18_Out-2003943576|, P1Thread1of1ForFork0_#t~ite17=|P1Thread1of1ForFork0_#t~ite17_Out-2003943576|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003943576} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 20:06:05,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L770-->L771: Formula: (and (= v_~x$w_buff1~0_31 v_~x$w_buff1~0_30) (not (= 0 (mod v_~weak$$choice2~0_25 256)))) InVars {~x$w_buff1~0=v_~x$w_buff1~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_10|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_9|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_7|, ~x$w_buff1~0=v_~x$w_buff1~0_30, ~weak$$choice2~0=v_~weak$$choice2~0_25} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite21, ~x$w_buff1~0] because there is no mapped edge [2019-12-07 20:06:05,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [932] [932] L771-->L771-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In232291314 256)))) (or (and (= ~x$w_buff0_used~0_In232291314 |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (= |P1Thread1of1ForFork0_#t~ite24_Out232291314| |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In232291314 256)))) (or (and .cse0 (= 0 (mod ~x$r_buff1_thd2~0_In232291314 256))) (= 0 (mod ~x$w_buff0_used~0_In232291314 256)) (and (= (mod ~x$w_buff1_used~0_In232291314 256) 0) .cse0))) .cse1) (and (= |P1Thread1of1ForFork0_#t~ite23_In232291314| |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (= ~x$w_buff0_used~0_In232291314 |P1Thread1of1ForFork0_#t~ite24_Out232291314|) (not .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In232291314, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In232291314, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_In232291314|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In232291314, ~weak$$choice2~0=~weak$$choice2~0_In232291314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In232291314} OutVars{P1Thread1of1ForFork0_#t~ite24=|P1Thread1of1ForFork0_#t~ite24_Out232291314|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In232291314, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In232291314, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_Out232291314|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In232291314, ~weak$$choice2~0=~weak$$choice2~0_In232291314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In232291314} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 20:06:05,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [931] [931] L773-->L774: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_In2073597236 ~x$r_buff0_thd2~0_Out2073597236)) (.cse0 (= 0 (mod ~weak$$choice2~0_In2073597236 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In2073597236 256)))) (or (and (not .cse0) .cse1) (and .cse1 (= 0 (mod ~x$w_buff0_used~0_In2073597236 256)) .cse0) (and .cse1 (= 0 (mod ~x$r_buff1_thd2~0_In2073597236 256)) .cse0 .cse2) (and (= (mod ~x$w_buff1_used~0_In2073597236 256) 0) .cse1 .cse0 .cse2))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out2073597236|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2073597236, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2073597236|, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out2073597236|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 20:06:05,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L774-->L778: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12 |v_~#x~0.base_41|) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12 |v_~#x~0.offset_41|) (= (select (select |v_#memory_int_75| |v_~#x~0.base_41|) |v_~#x~0.offset_41|) v_~__unbuffered_p1_EAX~0_17) (= v_~x$r_buff1_thd2~0_56 v_~x$r_buff1_thd2~0_55) (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~__unbuffered_p1_EAX$read_delayed~0_13 1)) InVars {~#x~0.offset=|v_~#x~0.offset_41|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~#x~0.offset=|v_~#x~0.offset_41|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_13, P1Thread1of1ForFork0_#t~mem34=|v_P1Thread1of1ForFork0_#t~mem34_6|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_10|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_13|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite31, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~mem34, ~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~x$r_buff1_thd2~0, P1Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 20:06:05,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L778-->L785: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= (store |v_#memory_int_46| |v_~#x~0.base_27| (store (select |v_#memory_int_46| |v_~#x~0.base_27|) |v_~#x~0.offset_27| v_~x$mem_tmp~0_4)) |v_#memory_int_45|) (not (= 0 (mod v_~x$flush_delayed~0_7 256))) (= v_~y~0_10 1)) InVars {~#x~0.offset=|v_~#x~0.offset_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_46|, ~#x~0.base=|v_~#x~0.base_27|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_27|, P1Thread1of1ForFork0_#t~mem35=|v_P1Thread1of1ForFork0_#t~mem35_3|, #memory_int=|v_#memory_int_45|, ~#x~0.base=|v_~#x~0.base_27|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_5|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[~x$flush_delayed~0, P1Thread1of1ForFork0_#t~mem35, #memory_int, P1Thread1of1ForFork0_#t~ite36, ~y~0] because there is no mapped edge [2019-12-07 20:06:05,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L785-2-->L785-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1428107490 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In1428107490 256))) (.cse1 (= |P1Thread1of1ForFork0_#t~ite38_Out1428107490| |P1Thread1of1ForFork0_#t~ite39_Out1428107490|))) (or (and (= |P1Thread1of1ForFork0_#t~mem37_In1428107490| |P1Thread1of1ForFork0_#t~mem37_Out1428107490|) (not .cse0) .cse1 (= |P1Thread1of1ForFork0_#t~ite38_Out1428107490| ~x$w_buff1~0_In1428107490) (not .cse2)) (and (or .cse0 .cse2) (= |P1Thread1of1ForFork0_#t~mem37_Out1428107490| |P1Thread1of1ForFork0_#t~ite38_Out1428107490|) .cse1 (= |P1Thread1of1ForFork0_#t~mem37_Out1428107490| (select (select |#memory_int_In1428107490| |~#x~0.base_In1428107490|) |~#x~0.offset_In1428107490|))))) InVars {P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_In1428107490|, ~#x~0.offset=|~#x~0.offset_In1428107490|, ~x$w_buff1~0=~x$w_buff1~0_In1428107490, ~#x~0.base=|~#x~0.base_In1428107490|, #memory_int=|#memory_int_In1428107490|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1428107490, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1428107490} OutVars{P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_Out1428107490|, ~#x~0.offset=|~#x~0.offset_In1428107490|, ~x$w_buff1~0=~x$w_buff1~0_In1428107490, ~#x~0.base=|~#x~0.base_In1428107490|, #memory_int=|#memory_int_In1428107490|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1428107490, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1428107490, P1Thread1of1ForFork0_#t~ite39=|P1Thread1of1ForFork0_#t~ite39_Out1428107490|, P1Thread1of1ForFork0_#t~ite38=|P1Thread1of1ForFork0_#t~ite38_Out1428107490|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem37, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 20:06:05,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] L802-2-->L802-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In731637025 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In731637025 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~mem44_Out731637025| (select (select |#memory_int_In731637025| |~#x~0.base_In731637025|) |~#x~0.offset_In731637025|)) (= |P2Thread1of1ForFork1_#t~ite45_Out731637025| |P2Thread1of1ForFork1_#t~mem44_Out731637025|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~mem44_In731637025| |P2Thread1of1ForFork1_#t~mem44_Out731637025|) (not .cse1) (not .cse0) (= ~x$w_buff1~0_In731637025 |P2Thread1of1ForFork1_#t~ite45_Out731637025|)))) InVars {~#x~0.offset=|~#x~0.offset_In731637025|, ~x$w_buff1~0=~x$w_buff1~0_In731637025, ~#x~0.base=|~#x~0.base_In731637025|, #memory_int=|#memory_int_In731637025|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In731637025, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In731637025, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_In731637025|} OutVars{~#x~0.offset=|~#x~0.offset_In731637025|, P2Thread1of1ForFork1_#t~ite45=|P2Thread1of1ForFork1_#t~ite45_Out731637025|, ~x$w_buff1~0=~x$w_buff1~0_In731637025, ~#x~0.base=|~#x~0.base_In731637025|, #memory_int=|#memory_int_In731637025|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In731637025, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In731637025, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_Out731637025|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite45, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 20:06:05,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1497378651 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1497378651 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite40_Out-1497378651|) (not .cse1)) (and (= ~x$w_buff0_used~0_In-1497378651 |P1Thread1of1ForFork0_#t~ite40_Out-1497378651|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1497378651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1497378651} OutVars{P1Thread1of1ForFork0_#t~ite40=|P1Thread1of1ForFork0_#t~ite40_Out-1497378651|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1497378651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1497378651} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 20:06:05,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1083272070 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1083272070 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-1083272070 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1083272070 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite41_Out-1083272070| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite41_Out-1083272070| ~x$w_buff1_used~0_In-1083272070) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1083272070, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1083272070, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} OutVars{P1Thread1of1ForFork0_#t~ite41=|P1Thread1of1ForFork0_#t~ite41_Out-1083272070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1083272070, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1083272070, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 20:06:05,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L788-->L789: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In2104548372 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_In2104548372 ~x$r_buff0_thd2~0_Out2104548372)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In2104548372 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~x$r_buff0_thd2~0_Out2104548372 0)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} OutVars{P1Thread1of1ForFork0_#t~ite42=|P1Thread1of1ForFork0_#t~ite42_Out2104548372|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite42, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 20:06:05,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-221431766 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-221431766 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-221431766 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-221431766 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite43_Out-221431766| 0)) (and (= ~x$r_buff1_thd2~0_In-221431766 |P1Thread1of1ForFork0_#t~ite43_Out-221431766|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-221431766, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-221431766, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} OutVars{P1Thread1of1ForFork0_#t~ite43=|P1Thread1of1ForFork0_#t~ite43_Out-221431766|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-221431766, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-221431766, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 20:06:05,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] L789-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd2~0_106 |v_P1Thread1of1ForFork0_#t~ite43_30|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_29|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_106, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 20:06:05,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->L750-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1345775623 256))) (.cse2 (= |P0Thread1of1ForFork2_#t~ite5_Out-1345775623| |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-1345775623 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~mem3_Out-1345775623| |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|) .cse2 (= |P0Thread1of1ForFork2_#t~mem3_Out-1345775623| (select (select |#memory_int_In-1345775623| |~#x~0.base_In-1345775623|) |~#x~0.offset_In-1345775623|))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~mem3_In-1345775623| |P0Thread1of1ForFork2_#t~mem3_Out-1345775623|) .cse2 (not .cse1) (= ~x$w_buff1~0_In-1345775623 |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|)))) InVars {P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_In-1345775623|, ~#x~0.offset=|~#x~0.offset_In-1345775623|, ~x$w_buff1~0=~x$w_buff1~0_In-1345775623, ~#x~0.base=|~#x~0.base_In-1345775623|, #memory_int=|#memory_int_In-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1345775623} OutVars{P0Thread1of1ForFork2_#t~ite4=|P0Thread1of1ForFork2_#t~ite4_Out-1345775623|, P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_Out-1345775623|, ~#x~0.offset=|~#x~0.offset_In-1345775623|, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out-1345775623|, ~x$w_buff1~0=~x$w_buff1~0_In-1345775623, ~#x~0.base=|~#x~0.base_In-1345775623|, #memory_int=|#memory_int_In-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1345775623} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite4, P0Thread1of1ForFork2_#t~mem3, P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 20:06:05,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-671787214 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-671787214 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite6_Out-671787214| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-671787214| ~x$w_buff0_used~0_In-671787214) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671787214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671787214, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-671787214|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 20:06:05,398 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In2126147209 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In2126147209 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In2126147209 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2126147209 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite7_Out2126147209| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2126147209 |P0Thread1of1ForFork2_#t~ite7_Out2126147209|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2126147209, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2126147209, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2126147209, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out2126147209|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2126147209, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 20:06:05,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L753-->L754: Formula: (let ((.cse1 (= ~x$r_buff0_thd1~0_Out-5072653 ~x$r_buff0_thd1~0_In-5072653)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-5072653 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-5072653 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= 0 ~x$r_buff0_thd1~0_Out-5072653)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-5072653, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-5072653|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 20:06:05,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [892] [892] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-986504956 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-986504956 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-986504956 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-986504956 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out-986504956| ~x$r_buff1_thd1~0_In-986504956) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork2_#t~ite9_Out-986504956| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-986504956, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986504956, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-986504956, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-986504956} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-986504956, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986504956, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-986504956, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-986504956|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-986504956} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 20:06:05,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [910] [910] L754-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= |v_P0Thread1of1ForFork2_#t~ite9_22| v_~x$r_buff1_thd1~0_34) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_22|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_34, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_21|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 20:06:05,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L802-4-->L803: Formula: (= (store |v_#memory_int_71| |v_~#x~0.base_39| (store (select |v_#memory_int_71| |v_~#x~0.base_39|) |v_~#x~0.offset_39| |v_P2Thread1of1ForFork1_#t~ite45_8|)) |v_#memory_int_70|) InVars {~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_8|, #memory_int=|v_#memory_int_71|, ~#x~0.base=|v_~#x~0.base_39|} OutVars{P2Thread1of1ForFork1_#t~ite46=|v_P2Thread1of1ForFork1_#t~ite46_11|, ~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_7|, #memory_int=|v_#memory_int_70|, ~#x~0.base=|v_~#x~0.base_39|, P2Thread1of1ForFork1_#t~mem44=|v_P2Thread1of1ForFork1_#t~mem44_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite46, P2Thread1of1ForFork1_#t~ite45, #memory_int, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 20:06:05,399 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1447252809 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1447252809 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1447252809 |P2Thread1of1ForFork1_#t~ite47_Out-1447252809|)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite47_Out-1447252809| 0) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} OutVars{P2Thread1of1ForFork1_#t~ite47=|P2Thread1of1ForFork1_#t~ite47_Out-1447252809|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite47] because there is no mapped edge [2019-12-07 20:06:05,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [888] [888] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-443620961 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-443620961 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-443620961 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-443620961 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-443620961 |P2Thread1of1ForFork1_#t~ite48_Out-443620961|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite48_Out-443620961|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-443620961, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-443620961} OutVars{P2Thread1of1ForFork1_#t~ite48=|P2Thread1of1ForFork1_#t~ite48_Out-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-443620961, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-443620961} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite48] because there is no mapped edge [2019-12-07 20:06:05,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L805-->L806: Formula: (let ((.cse0 (= ~x$r_buff0_thd3~0_Out-2123560167 ~x$r_buff0_thd3~0_In-2123560167)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-2123560167 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-2123560167 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse2) (= ~x$r_buff0_thd3~0_Out-2123560167 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} OutVars{P2Thread1of1ForFork1_#t~ite49=|P2Thread1of1ForFork1_#t~ite49_Out-2123560167|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite49, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:06:05,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L806-->L806-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-680076473 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-680076473 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-680076473 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-680076473 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite50_Out-680076473|)) (and (= ~x$r_buff1_thd3~0_In-680076473 |P2Thread1of1ForFork1_#t~ite50_Out-680076473|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-680076473, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-680076473, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680076473} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-680076473, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-680076473, P2Thread1of1ForFork1_#t~ite50=|P2Thread1of1ForFork1_#t~ite50_Out-680076473|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680076473} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite50] because there is no mapped edge [2019-12-07 20:06:05,400 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd3~0_49 |v_P2Thread1of1ForFork1_#t~ite50_40|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_40|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_49, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_39|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite50, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 20:06:05,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L833-->L835-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_22 256)) (= 0 (mod v_~x$w_buff0_used~0_133 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 20:06:05,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-909317594 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-909317594 256)))) (or (and (= (select (select |#memory_int_In-909317594| |~#x~0.base_In-909317594|) |~#x~0.offset_In-909317594|) |ULTIMATE.start_main_#t~mem54_Out-909317594|) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite55_Out-909317594| |ULTIMATE.start_main_#t~mem54_Out-909317594|)) (and (= |ULTIMATE.start_main_#t~mem54_In-909317594| |ULTIMATE.start_main_#t~mem54_Out-909317594|) (not .cse1) (= |ULTIMATE.start_main_#t~ite55_Out-909317594| ~x$w_buff1~0_In-909317594) (not .cse0)))) InVars {ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_In-909317594|, ~#x~0.offset=|~#x~0.offset_In-909317594|, ~x$w_buff1~0=~x$w_buff1~0_In-909317594, ~#x~0.base=|~#x~0.base_In-909317594|, #memory_int=|#memory_int_In-909317594|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-909317594, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-909317594} OutVars{ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_Out-909317594|, ~#x~0.offset=|~#x~0.offset_In-909317594|, ~x$w_buff1~0=~x$w_buff1~0_In-909317594, ~#x~0.base=|~#x~0.base_In-909317594|, #memory_int=|#memory_int_In-909317594|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-909317594, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-909317594, ULTIMATE.start_main_#t~ite55=|ULTIMATE.start_main_#t~ite55_Out-909317594|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 20:06:05,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L835-4-->L836: Formula: (= (store |v_#memory_int_79| |v_~#x~0.base_42| (store (select |v_#memory_int_79| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_ULTIMATE.start_main_#t~ite55_8|)) |v_#memory_int_78|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_79|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_8|} OutVars{ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_5|, ~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_78|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_8|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, #memory_int, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 20:06:05,401 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1880966589 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1880966589 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite57_Out-1880966589|)) (and (= |ULTIMATE.start_main_#t~ite57_Out-1880966589| ~x$w_buff0_used~0_In-1880966589) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1880966589, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1880966589} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1880966589, ULTIMATE.start_main_#t~ite57=|ULTIMATE.start_main_#t~ite57_Out-1880966589|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1880966589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite57] because there is no mapped edge [2019-12-07 20:06:05,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L837-->L837-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In2114761290 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In2114761290 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In2114761290 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In2114761290 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2114761290 |ULTIMATE.start_main_#t~ite58_Out2114761290|)) (and (= 0 |ULTIMATE.start_main_#t~ite58_Out2114761290|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2114761290, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2114761290, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2114761290} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2114761290, ULTIMATE.start_main_#t~ite58=|ULTIMATE.start_main_#t~ite58_Out2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2114761290, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2114761290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite58] because there is no mapped edge [2019-12-07 20:06:05,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L838-->L839: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2088449369 256))) (.cse2 (= ~x$r_buff0_thd0~0_Out2088449369 ~x$r_buff0_thd0~0_In2088449369)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In2088449369 256)))) (or (and (not .cse0) (= ~x$r_buff0_thd0~0_Out2088449369 0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2088449369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out2088449369, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out2088449369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 20:06:05,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L839-->L843: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-671914974 256) 0)) (.cse2 (= 0 ~x$r_buff1_thd0~0_Out-671914974)) (.cse6 (= (mod ~x$r_buff0_thd0~0_In-671914974 256) 0)) (.cse0 (= ~weak$$choice1~0_Out-671914974 |ULTIMATE.start_main_#t~nondet61_In-671914974|)) (.cse4 (= ~x$r_buff1_thd0~0_Out-671914974 ~x$r_buff1_thd0~0_In-671914974)) (.cse5 (= (mod ~x$w_buff0_used~0_In-671914974 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-671914974 256)))) (or (and .cse0 (not .cse1) .cse2 (not .cse3)) (and .cse0 .cse4 .cse5 .cse3) (and .cse6 .cse0 .cse4 .cse3) (and .cse6 .cse0 .cse4 .cse1) (and .cse0 .cse2 (not .cse6) (not .cse5)) (and .cse0 .cse4 .cse5 .cse1))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671914974, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-671914974, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-671914974, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_In-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671914974, ~weak$$choice1~0=~weak$$choice1~0_Out-671914974, ULTIMATE.start_main_#t~ite60=|ULTIMATE.start_main_#t~ite60_Out-671914974|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-671914974, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-671914974, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_Out-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite60, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet61] because there is no mapped edge [2019-12-07 20:06:05,402 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L843-->L843-3: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice1~0_In193267429 256))) (.cse1 (not (= (mod ~__unbuffered_p1_EAX$read_delayed~0_In193267429 256) 0)))) (or (and (= (select (select |#memory_int_In193267429| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429) |ULTIMATE.start_main_#t~mem62_Out193267429|) (= |ULTIMATE.start_main_#t~mem62_Out193267429| |ULTIMATE.start_main_#t~ite63_Out193267429|) (not .cse0) .cse1) (and .cse0 (= ~__unbuffered_p1_EAX~0_In193267429 |ULTIMATE.start_main_#t~ite63_Out193267429|) (= |ULTIMATE.start_main_#t~mem62_In193267429| |ULTIMATE.start_main_#t~mem62_Out193267429|) .cse1))) InVars {~weak$$choice1~0=~weak$$choice1~0_In193267429, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In193267429, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In193267429, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429, #memory_int=|#memory_int_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out193267429|, ~weak$$choice1~0=~weak$$choice1~0_In193267429, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In193267429, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In193267429, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_Out193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429, #memory_int=|#memory_int_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~mem62] because there is no mapped edge [2019-12-07 20:06:05,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L843-3-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (let ((.cse1 (= v_~y~0_36 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse3 (= 2 v_~__unbuffered_p0_EAX~0_31)) (.cse0 (= v_~main$tmp_guard1~0_17 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite63_28| v_~__unbuffered_p1_EAX~0_27))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_17 0) .cse3 .cse4 .cse2 .cse1) (and .cse0 (not .cse4) .cse2) (and (not .cse3) .cse0 .cse2)))) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ~y~0=v_~y~0_36} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_27|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_36, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_29|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem62, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:06:05,403 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [927] [927] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 20:06:05,453 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 08:06:05 BasicIcfg [2019-12-07 20:06:05,453 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 20:06:05,453 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 20:06:05,453 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 20:06:05,453 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 20:06:05,454 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 08:05:39" (3/4) ... [2019-12-07 20:06:05,455 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 20:06:05,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse1 (store |v_#valid_75| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_140| 1))) (and (= (select (select |v_#memory_int_277| |v_~#x~0.base_140|) |v_~#x~0.offset_140|) 0) (= 0 v_~x$r_buff0_thd1~0_68) (= v_~x$r_buff1_thd3~0_58 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8 0) (= v_~x$r_buff1_thd1~0_56 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_58) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= 0 v_~x$read_delayed~0_7) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24| 1)) (= 0 v_~weak$$choice2~0_98) (= 0 v_~x$r_buff0_thd0~0_92) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$r_buff0_thd3~0_78) (= 0 v_~x$w_buff0~0_96) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_cnt~0_77) (= v_~main$tmp_guard0~0_54 0) (= 0 v_~x$r_buff0_thd2~0_264) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= 0 v_~weak$$choice1~0_32) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= 0 (select .cse1 |v_~#x~0.base_140|)) (= v_~x$mem_tmp~0_39 0) (< 0 |v_#StackHeapBarrier_22|) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t2000~0.base_24|) (= 0 v_~x$w_buff1~0_81) (= 0 v_~__unbuffered_p1_EAX~0_61) (= v_~x$flush_delayed~0_68 0) (= 0 v_~x$r_buff1_thd2~0_177) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24|) 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~weak$$choice0~0_17) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8 0) (= 0 v_~x$w_buff0_used~0_579) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35 0) (= v_~y~0_85 0) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t2000~0.offset_18|) (= 0 |v_~#x~0.offset_140|) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 0) (= v_~main$tmp_guard1~0_32 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35 0) (= 0 v_~x$w_buff1_used~0_346) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_140| 4) |v_ULTIMATE.start_main_~#t2000~0.base_24| 4)) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8) (= (store |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24| (store (select |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24|) |v_ULTIMATE.start_main_~#t2000~0.offset_18| 0)) |v_#memory_int_276|) (< |v_#StackHeapBarrier_22| |v_~#x~0.base_140|) (= v_~x$r_buff1_thd0~0_55 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_277|, #length=|v_#length_37|} OutVars{ULTIMATE.start_main_#t~nondet53=|v_ULTIMATE.start_main_#t~nondet53_26|, ~x$w_buff0~0=v_~x$w_buff0~0_96, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_10|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_68, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_78, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|, ~weak$$choice1~0=v_~weak$$choice1~0_32, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_58, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_61, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35, #length=|v_#length_36|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_92, ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_26|, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_140|, ~x$w_buff1~0=v_~x$w_buff1~0_81, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_169|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_346, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_177, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_46|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_48|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_68, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_9|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_43|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_58, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ~x$mem_tmp~0=v_~x$mem_tmp~0_39, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_17|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t2000~0.base=|v_ULTIMATE.start_main_~#t2000~0.base_24|, ~y~0=v_~y~0_85, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_149|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_20|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_54, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_25|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_55, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_264, ULTIMATE.start_main_#t~nondet61=|v_ULTIMATE.start_main_#t~nondet61_31|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_579, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_21|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_276|, ~#x~0.base=|v_~#x~0.base_140|, ~weak$$choice2~0=v_~weak$$choice2~0_98, ULTIMATE.start_main_~#t2000~0.offset=|v_ULTIMATE.start_main_~#t2000~0.offset_18|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet53, ~x$w_buff0~0, ULTIMATE.start_main_#t~nondet51, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite64, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem54, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite58, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite56, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ~__unbuffered_p1_EAX$w_buff1_used~0, ~__unbuffered_p1_EAX$w_buff1~0, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet52, ~__unbuffered_p1_EAX$read_delayed~0, ULTIMATE.start_main_#t~mem62, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_~#t2002~0.offset, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2000~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite57, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2001~0.offset, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2001~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet61, #NULL.base, ULTIMATE.start_main_#t~ite55, ~x$w_buff0_used~0, ~__unbuffered_p1_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~ite60, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ~weak$$choice2~0, ULTIMATE.start_main_~#t2000~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 20:06:05,456 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [912] [912] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t2001~0.offset_10| 0) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11|) 0) (= (store |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11| (store (select |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11|) |v_ULTIMATE.start_main_~#t2001~0.offset_10| 1)) |v_#memory_int_138|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2001~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2001~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2001~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_139|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_138|, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_10|, #length=|v_#length_19|, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet51, #valid, #memory_int, ULTIMATE.start_main_~#t2001~0.offset, #length, ULTIMATE.start_main_~#t2001~0.base] because there is no mapped edge [2019-12-07 20:06:05,457 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [928] [928] L827-1-->L829: Formula: (and (= |v_ULTIMATE.start_main_~#t2002~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2002~0.base_13| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2002~0.base_13|) (= (store |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13| (store (select |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13|) |v_ULTIMATE.start_main_~#t2002~0.offset_11| 2)) |v_#memory_int_202|) (= (select |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13|) 0) (= |v_#valid_43| (store |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2002~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_203|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_5|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_202|, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~nondet52, #valid, #memory_int, ULTIMATE.start_main_~#t2002~0.offset, #length] because there is no mapped edge [2019-12-07 20:06:05,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [953] [953] L769-->L770: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In-2003943576 256))) (.cse0 (= ~x$w_buff0~0_In-2003943576 ~x$w_buff0~0_Out-2003943576))) (or (and .cse0 (not .cse1)) (let ((.cse2 (not (= (mod ~x$r_buff0_thd2~0_In-2003943576 256) 0)))) (and .cse1 (or .cse2 (not (= 0 (mod ~x$r_buff1_thd2~0_In-2003943576 256)))) .cse0 (not (= (mod ~x$w_buff0_used~0_In-2003943576 256) 0)) (or .cse2 (not (= 0 (mod ~x$w_buff1_used~0_In-2003943576 256)))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2003943576, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003943576, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2003943576, ~weak$$choice2~0=~weak$$choice2~0_In-2003943576, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2003943576, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003943576} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out-2003943576, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2003943576, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2003943576, P1Thread1of1ForFork0_#t~ite16=|P1Thread1of1ForFork0_#t~ite16_Out-2003943576|, ~weak$$choice2~0=~weak$$choice2~0_In-2003943576, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2003943576, P1Thread1of1ForFork0_#t~ite18=|P1Thread1of1ForFork0_#t~ite18_Out-2003943576|, P1Thread1of1ForFork0_#t~ite17=|P1Thread1of1ForFork0_#t~ite17_Out-2003943576|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2003943576} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 20:06:05,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L770-->L771: Formula: (and (= v_~x$w_buff1~0_31 v_~x$w_buff1~0_30) (not (= 0 (mod v_~weak$$choice2~0_25 256)))) InVars {~x$w_buff1~0=v_~x$w_buff1~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_10|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_9|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_7|, ~x$w_buff1~0=v_~x$w_buff1~0_30, ~weak$$choice2~0=v_~weak$$choice2~0_25} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite21, ~x$w_buff1~0] because there is no mapped edge [2019-12-07 20:06:05,458 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [932] [932] L771-->L771-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In232291314 256)))) (or (and (= ~x$w_buff0_used~0_In232291314 |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (= |P1Thread1of1ForFork0_#t~ite24_Out232291314| |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In232291314 256)))) (or (and .cse0 (= 0 (mod ~x$r_buff1_thd2~0_In232291314 256))) (= 0 (mod ~x$w_buff0_used~0_In232291314 256)) (and (= (mod ~x$w_buff1_used~0_In232291314 256) 0) .cse0))) .cse1) (and (= |P1Thread1of1ForFork0_#t~ite23_In232291314| |P1Thread1of1ForFork0_#t~ite23_Out232291314|) (= ~x$w_buff0_used~0_In232291314 |P1Thread1of1ForFork0_#t~ite24_Out232291314|) (not .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In232291314, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In232291314, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_In232291314|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In232291314, ~weak$$choice2~0=~weak$$choice2~0_In232291314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In232291314} OutVars{P1Thread1of1ForFork0_#t~ite24=|P1Thread1of1ForFork0_#t~ite24_Out232291314|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In232291314, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In232291314, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_Out232291314|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In232291314, ~weak$$choice2~0=~weak$$choice2~0_In232291314, ~x$w_buff0_used~0=~x$w_buff0_used~0_In232291314} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 20:06:05,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [931] [931] L773-->L774: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_In2073597236 ~x$r_buff0_thd2~0_Out2073597236)) (.cse0 (= 0 (mod ~weak$$choice2~0_In2073597236 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In2073597236 256)))) (or (and (not .cse0) .cse1) (and .cse1 (= 0 (mod ~x$w_buff0_used~0_In2073597236 256)) .cse0) (and .cse1 (= 0 (mod ~x$r_buff1_thd2~0_In2073597236 256)) .cse0 .cse2) (and (= (mod ~x$w_buff1_used~0_In2073597236 256) 0) .cse1 .cse0 .cse2))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out2073597236|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2073597236, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2073597236|, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out2073597236|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 20:06:05,459 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L774-->L778: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12 |v_~#x~0.base_41|) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12 |v_~#x~0.offset_41|) (= (select (select |v_#memory_int_75| |v_~#x~0.base_41|) |v_~#x~0.offset_41|) v_~__unbuffered_p1_EAX~0_17) (= v_~x$r_buff1_thd2~0_56 v_~x$r_buff1_thd2~0_55) (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~__unbuffered_p1_EAX$read_delayed~0_13 1)) InVars {~#x~0.offset=|v_~#x~0.offset_41|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~#x~0.offset=|v_~#x~0.offset_41|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_13, P1Thread1of1ForFork0_#t~mem34=|v_P1Thread1of1ForFork0_#t~mem34_6|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_10|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_13|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite31, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~mem34, ~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~x$r_buff1_thd2~0, P1Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 20:06:05,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L778-->L785: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= (store |v_#memory_int_46| |v_~#x~0.base_27| (store (select |v_#memory_int_46| |v_~#x~0.base_27|) |v_~#x~0.offset_27| v_~x$mem_tmp~0_4)) |v_#memory_int_45|) (not (= 0 (mod v_~x$flush_delayed~0_7 256))) (= v_~y~0_10 1)) InVars {~#x~0.offset=|v_~#x~0.offset_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_46|, ~#x~0.base=|v_~#x~0.base_27|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_27|, P1Thread1of1ForFork0_#t~mem35=|v_P1Thread1of1ForFork0_#t~mem35_3|, #memory_int=|v_#memory_int_45|, ~#x~0.base=|v_~#x~0.base_27|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_5|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[~x$flush_delayed~0, P1Thread1of1ForFork0_#t~mem35, #memory_int, P1Thread1of1ForFork0_#t~ite36, ~y~0] because there is no mapped edge [2019-12-07 20:06:05,460 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L785-2-->L785-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In1428107490 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In1428107490 256))) (.cse1 (= |P1Thread1of1ForFork0_#t~ite38_Out1428107490| |P1Thread1of1ForFork0_#t~ite39_Out1428107490|))) (or (and (= |P1Thread1of1ForFork0_#t~mem37_In1428107490| |P1Thread1of1ForFork0_#t~mem37_Out1428107490|) (not .cse0) .cse1 (= |P1Thread1of1ForFork0_#t~ite38_Out1428107490| ~x$w_buff1~0_In1428107490) (not .cse2)) (and (or .cse0 .cse2) (= |P1Thread1of1ForFork0_#t~mem37_Out1428107490| |P1Thread1of1ForFork0_#t~ite38_Out1428107490|) .cse1 (= |P1Thread1of1ForFork0_#t~mem37_Out1428107490| (select (select |#memory_int_In1428107490| |~#x~0.base_In1428107490|) |~#x~0.offset_In1428107490|))))) InVars {P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_In1428107490|, ~#x~0.offset=|~#x~0.offset_In1428107490|, ~x$w_buff1~0=~x$w_buff1~0_In1428107490, ~#x~0.base=|~#x~0.base_In1428107490|, #memory_int=|#memory_int_In1428107490|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1428107490, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1428107490} OutVars{P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_Out1428107490|, ~#x~0.offset=|~#x~0.offset_In1428107490|, ~x$w_buff1~0=~x$w_buff1~0_In1428107490, ~#x~0.base=|~#x~0.base_In1428107490|, #memory_int=|#memory_int_In1428107490|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1428107490, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1428107490, P1Thread1of1ForFork0_#t~ite39=|P1Thread1of1ForFork0_#t~ite39_Out1428107490|, P1Thread1of1ForFork0_#t~ite38=|P1Thread1of1ForFork0_#t~ite38_Out1428107490|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem37, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 20:06:05,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] L802-2-->L802-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In731637025 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In731637025 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~mem44_Out731637025| (select (select |#memory_int_In731637025| |~#x~0.base_In731637025|) |~#x~0.offset_In731637025|)) (= |P2Thread1of1ForFork1_#t~ite45_Out731637025| |P2Thread1of1ForFork1_#t~mem44_Out731637025|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~mem44_In731637025| |P2Thread1of1ForFork1_#t~mem44_Out731637025|) (not .cse1) (not .cse0) (= ~x$w_buff1~0_In731637025 |P2Thread1of1ForFork1_#t~ite45_Out731637025|)))) InVars {~#x~0.offset=|~#x~0.offset_In731637025|, ~x$w_buff1~0=~x$w_buff1~0_In731637025, ~#x~0.base=|~#x~0.base_In731637025|, #memory_int=|#memory_int_In731637025|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In731637025, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In731637025, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_In731637025|} OutVars{~#x~0.offset=|~#x~0.offset_In731637025|, P2Thread1of1ForFork1_#t~ite45=|P2Thread1of1ForFork1_#t~ite45_Out731637025|, ~x$w_buff1~0=~x$w_buff1~0_In731637025, ~#x~0.base=|~#x~0.base_In731637025|, #memory_int=|#memory_int_In731637025|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In731637025, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In731637025, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_Out731637025|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite45, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 20:06:05,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1497378651 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1497378651 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite40_Out-1497378651|) (not .cse1)) (and (= ~x$w_buff0_used~0_In-1497378651 |P1Thread1of1ForFork0_#t~ite40_Out-1497378651|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1497378651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1497378651} OutVars{P1Thread1of1ForFork0_#t~ite40=|P1Thread1of1ForFork0_#t~ite40_Out-1497378651|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1497378651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1497378651} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 20:06:05,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1083272070 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1083272070 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In-1083272070 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-1083272070 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite41_Out-1083272070| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite41_Out-1083272070| ~x$w_buff1_used~0_In-1083272070) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1083272070, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1083272070, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} OutVars{P1Thread1of1ForFork0_#t~ite41=|P1Thread1of1ForFork0_#t~ite41_Out-1083272070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1083272070, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1083272070, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 20:06:05,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L788-->L789: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In2104548372 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_In2104548372 ~x$r_buff0_thd2~0_Out2104548372)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In2104548372 256)))) (or (and .cse0 .cse1) (and (not .cse1) (not .cse2) (= ~x$r_buff0_thd2~0_Out2104548372 0)) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} OutVars{P1Thread1of1ForFork0_#t~ite42=|P1Thread1of1ForFork0_#t~ite42_Out2104548372|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite42, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 20:06:05,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-221431766 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-221431766 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-221431766 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-221431766 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite43_Out-221431766| 0)) (and (= ~x$r_buff1_thd2~0_In-221431766 |P1Thread1of1ForFork0_#t~ite43_Out-221431766|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-221431766, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-221431766, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} OutVars{P1Thread1of1ForFork0_#t~ite43=|P1Thread1of1ForFork0_#t~ite43_Out-221431766|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-221431766, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-221431766, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 20:06:05,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] L789-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd2~0_106 |v_P1Thread1of1ForFork0_#t~ite43_30|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_29|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_106, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 20:06:05,463 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->L750-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1345775623 256))) (.cse2 (= |P0Thread1of1ForFork2_#t~ite5_Out-1345775623| |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-1345775623 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork2_#t~mem3_Out-1345775623| |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|) .cse2 (= |P0Thread1of1ForFork2_#t~mem3_Out-1345775623| (select (select |#memory_int_In-1345775623| |~#x~0.base_In-1345775623|) |~#x~0.offset_In-1345775623|))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~mem3_In-1345775623| |P0Thread1of1ForFork2_#t~mem3_Out-1345775623|) .cse2 (not .cse1) (= ~x$w_buff1~0_In-1345775623 |P0Thread1of1ForFork2_#t~ite4_Out-1345775623|)))) InVars {P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_In-1345775623|, ~#x~0.offset=|~#x~0.offset_In-1345775623|, ~x$w_buff1~0=~x$w_buff1~0_In-1345775623, ~#x~0.base=|~#x~0.base_In-1345775623|, #memory_int=|#memory_int_In-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1345775623} OutVars{P0Thread1of1ForFork2_#t~ite4=|P0Thread1of1ForFork2_#t~ite4_Out-1345775623|, P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_Out-1345775623|, ~#x~0.offset=|~#x~0.offset_In-1345775623|, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out-1345775623|, ~x$w_buff1~0=~x$w_buff1~0_In-1345775623, ~#x~0.base=|~#x~0.base_In-1345775623|, #memory_int=|#memory_int_In-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1345775623} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite4, P0Thread1of1ForFork2_#t~mem3, P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 20:06:05,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-671787214 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-671787214 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite6_Out-671787214| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-671787214| ~x$w_buff0_used~0_In-671787214) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671787214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671787214, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-671787214|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 20:06:05,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L752-->L752-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In2126147209 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In2126147209 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd1~0_In2126147209 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In2126147209 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite7_Out2126147209| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2126147209 |P0Thread1of1ForFork2_#t~ite7_Out2126147209|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2126147209, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2126147209, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2126147209, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out2126147209|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2126147209, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 20:06:05,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L753-->L754: Formula: (let ((.cse1 (= ~x$r_buff0_thd1~0_Out-5072653 ~x$r_buff0_thd1~0_In-5072653)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-5072653 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-5072653 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= 0 ~x$r_buff0_thd1~0_Out-5072653)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-5072653, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-5072653|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 20:06:05,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [892] [892] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-986504956 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-986504956 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-986504956 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-986504956 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out-986504956| ~x$r_buff1_thd1~0_In-986504956) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P0Thread1of1ForFork2_#t~ite9_Out-986504956| 0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-986504956, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986504956, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-986504956, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-986504956} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-986504956, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-986504956, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-986504956, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-986504956|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-986504956} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 20:06:05,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [910] [910] L754-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= |v_P0Thread1of1ForFork2_#t~ite9_22| v_~x$r_buff1_thd1~0_34) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_22|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_34, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_21|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 20:06:05,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L802-4-->L803: Formula: (= (store |v_#memory_int_71| |v_~#x~0.base_39| (store (select |v_#memory_int_71| |v_~#x~0.base_39|) |v_~#x~0.offset_39| |v_P2Thread1of1ForFork1_#t~ite45_8|)) |v_#memory_int_70|) InVars {~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_8|, #memory_int=|v_#memory_int_71|, ~#x~0.base=|v_~#x~0.base_39|} OutVars{P2Thread1of1ForFork1_#t~ite46=|v_P2Thread1of1ForFork1_#t~ite46_11|, ~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_7|, #memory_int=|v_#memory_int_70|, ~#x~0.base=|v_~#x~0.base_39|, P2Thread1of1ForFork1_#t~mem44=|v_P2Thread1of1ForFork1_#t~mem44_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite46, P2Thread1of1ForFork1_#t~ite45, #memory_int, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 20:06:05,465 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L803-->L803-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1447252809 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1447252809 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1447252809 |P2Thread1of1ForFork1_#t~ite47_Out-1447252809|)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite47_Out-1447252809| 0) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} OutVars{P2Thread1of1ForFork1_#t~ite47=|P2Thread1of1ForFork1_#t~ite47_Out-1447252809|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite47] because there is no mapped edge [2019-12-07 20:06:05,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [888] [888] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-443620961 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-443620961 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-443620961 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-443620961 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-443620961 |P2Thread1of1ForFork1_#t~ite48_Out-443620961|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite48_Out-443620961|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-443620961, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-443620961} OutVars{P2Thread1of1ForFork1_#t~ite48=|P2Thread1of1ForFork1_#t~ite48_Out-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-443620961, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-443620961} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite48] because there is no mapped edge [2019-12-07 20:06:05,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L805-->L806: Formula: (let ((.cse0 (= ~x$r_buff0_thd3~0_Out-2123560167 ~x$r_buff0_thd3~0_In-2123560167)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-2123560167 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-2123560167 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse2) (= ~x$r_buff0_thd3~0_Out-2123560167 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} OutVars{P2Thread1of1ForFork1_#t~ite49=|P2Thread1of1ForFork1_#t~ite49_Out-2123560167|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite49, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 20:06:05,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L806-->L806-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-680076473 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-680076473 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-680076473 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-680076473 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite50_Out-680076473|)) (and (= ~x$r_buff1_thd3~0_In-680076473 |P2Thread1of1ForFork1_#t~ite50_Out-680076473|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-680076473, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-680076473, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680076473} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-680076473, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-680076473, P2Thread1of1ForFork1_#t~ite50=|P2Thread1of1ForFork1_#t~ite50_Out-680076473|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-680076473} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite50] because there is no mapped edge [2019-12-07 20:06:05,466 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd3~0_49 |v_P2Thread1of1ForFork1_#t~ite50_40|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_40|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_49, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_39|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite50, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 20:06:05,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L833-->L835-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_22 256)) (= 0 (mod v_~x$w_buff0_used~0_133 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 20:06:05,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-909317594 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-909317594 256)))) (or (and (= (select (select |#memory_int_In-909317594| |~#x~0.base_In-909317594|) |~#x~0.offset_In-909317594|) |ULTIMATE.start_main_#t~mem54_Out-909317594|) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite55_Out-909317594| |ULTIMATE.start_main_#t~mem54_Out-909317594|)) (and (= |ULTIMATE.start_main_#t~mem54_In-909317594| |ULTIMATE.start_main_#t~mem54_Out-909317594|) (not .cse1) (= |ULTIMATE.start_main_#t~ite55_Out-909317594| ~x$w_buff1~0_In-909317594) (not .cse0)))) InVars {ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_In-909317594|, ~#x~0.offset=|~#x~0.offset_In-909317594|, ~x$w_buff1~0=~x$w_buff1~0_In-909317594, ~#x~0.base=|~#x~0.base_In-909317594|, #memory_int=|#memory_int_In-909317594|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-909317594, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-909317594} OutVars{ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_Out-909317594|, ~#x~0.offset=|~#x~0.offset_In-909317594|, ~x$w_buff1~0=~x$w_buff1~0_In-909317594, ~#x~0.base=|~#x~0.base_In-909317594|, #memory_int=|#memory_int_In-909317594|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-909317594, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-909317594, ULTIMATE.start_main_#t~ite55=|ULTIMATE.start_main_#t~ite55_Out-909317594|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 20:06:05,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L835-4-->L836: Formula: (= (store |v_#memory_int_79| |v_~#x~0.base_42| (store (select |v_#memory_int_79| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_ULTIMATE.start_main_#t~ite55_8|)) |v_#memory_int_78|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_79|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_8|} OutVars{ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_5|, ~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_78|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_8|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, #memory_int, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 20:06:05,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L836-->L836-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1880966589 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1880966589 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite57_Out-1880966589|)) (and (= |ULTIMATE.start_main_#t~ite57_Out-1880966589| ~x$w_buff0_used~0_In-1880966589) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1880966589, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1880966589} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1880966589, ULTIMATE.start_main_#t~ite57=|ULTIMATE.start_main_#t~ite57_Out-1880966589|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1880966589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite57] because there is no mapped edge [2019-12-07 20:06:05,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L837-->L837-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In2114761290 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In2114761290 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In2114761290 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In2114761290 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2114761290 |ULTIMATE.start_main_#t~ite58_Out2114761290|)) (and (= 0 |ULTIMATE.start_main_#t~ite58_Out2114761290|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2114761290, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2114761290, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2114761290} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2114761290, ULTIMATE.start_main_#t~ite58=|ULTIMATE.start_main_#t~ite58_Out2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2114761290, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2114761290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite58] because there is no mapped edge [2019-12-07 20:06:05,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L838-->L839: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2088449369 256))) (.cse2 (= ~x$r_buff0_thd0~0_Out2088449369 ~x$r_buff0_thd0~0_In2088449369)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In2088449369 256)))) (or (and (not .cse0) (= ~x$r_buff0_thd0~0_Out2088449369 0) (not .cse1)) (and .cse1 .cse2) (and .cse2 .cse0))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2088449369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out2088449369, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out2088449369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 20:06:05,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L839-->L843: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-671914974 256) 0)) (.cse2 (= 0 ~x$r_buff1_thd0~0_Out-671914974)) (.cse6 (= (mod ~x$r_buff0_thd0~0_In-671914974 256) 0)) (.cse0 (= ~weak$$choice1~0_Out-671914974 |ULTIMATE.start_main_#t~nondet61_In-671914974|)) (.cse4 (= ~x$r_buff1_thd0~0_Out-671914974 ~x$r_buff1_thd0~0_In-671914974)) (.cse5 (= (mod ~x$w_buff0_used~0_In-671914974 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-671914974 256)))) (or (and .cse0 (not .cse1) .cse2 (not .cse3)) (and .cse0 .cse4 .cse5 .cse3) (and .cse6 .cse0 .cse4 .cse3) (and .cse6 .cse0 .cse4 .cse1) (and .cse0 .cse2 (not .cse6) (not .cse5)) (and .cse0 .cse4 .cse5 .cse1))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671914974, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-671914974, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-671914974, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_In-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671914974, ~weak$$choice1~0=~weak$$choice1~0_Out-671914974, ULTIMATE.start_main_#t~ite60=|ULTIMATE.start_main_#t~ite60_Out-671914974|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-671914974, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out-671914974, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_Out-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite60, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet61] because there is no mapped edge [2019-12-07 20:06:05,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L843-->L843-3: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice1~0_In193267429 256))) (.cse1 (not (= (mod ~__unbuffered_p1_EAX$read_delayed~0_In193267429 256) 0)))) (or (and (= (select (select |#memory_int_In193267429| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429) |ULTIMATE.start_main_#t~mem62_Out193267429|) (= |ULTIMATE.start_main_#t~mem62_Out193267429| |ULTIMATE.start_main_#t~ite63_Out193267429|) (not .cse0) .cse1) (and .cse0 (= ~__unbuffered_p1_EAX~0_In193267429 |ULTIMATE.start_main_#t~ite63_Out193267429|) (= |ULTIMATE.start_main_#t~mem62_In193267429| |ULTIMATE.start_main_#t~mem62_Out193267429|) .cse1))) InVars {~weak$$choice1~0=~weak$$choice1~0_In193267429, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In193267429, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In193267429, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429, #memory_int=|#memory_int_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out193267429|, ~weak$$choice1~0=~weak$$choice1~0_In193267429, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In193267429, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In193267429, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_Out193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In193267429, #memory_int=|#memory_int_In193267429|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In193267429} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~mem62] because there is no mapped edge [2019-12-07 20:06:05,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L843-3-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (let ((.cse1 (= v_~y~0_36 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse3 (= 2 v_~__unbuffered_p0_EAX~0_31)) (.cse0 (= v_~main$tmp_guard1~0_17 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite63_28| v_~__unbuffered_p1_EAX~0_27))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_17 0) .cse3 .cse4 .cse2 .cse1) (and .cse0 (not .cse4) .cse2) (and (not .cse3) .cse0 .cse2)))) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ~y~0=v_~y~0_36} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_27|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_36, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_29|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem62, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 20:06:05,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [927] [927] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 20:06:05,517 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ff3cb4b0-7144-43b1-9701-2f4e5d527270/bin/utaipan/witness.graphml [2019-12-07 20:06:05,517 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 20:06:05,518 INFO L168 Benchmark]: Toolchain (without parser) took 26557.95 ms. Allocated memory was 1.0 GB in the beginning and 2.4 GB in the end (delta: 1.3 GB). Free memory was 939.3 MB in the beginning and 680.0 MB in the end (delta: 259.3 MB). Peak memory consumption was 1.6 GB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,518 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:06:05,518 INFO L168 Benchmark]: CACSL2BoogieTranslator took 395.92 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,519 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,519 INFO L168 Benchmark]: Boogie Preprocessor took 27.48 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 20:06:05,519 INFO L168 Benchmark]: RCFGBuilder took 447.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 61.3 MB). Peak memory consumption was 61.3 MB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,519 INFO L168 Benchmark]: TraceAbstraction took 25581.22 ms. Allocated memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 1.0 GB in the beginning and 714.3 MB in the end (delta: 291.7 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,519 INFO L168 Benchmark]: Witness Printer took 64.06 ms. Allocated memory is still 2.4 GB. Free memory was 714.3 MB in the beginning and 680.0 MB in the end (delta: 34.3 MB). Peak memory consumption was 34.3 MB. Max. memory is 11.5 GB. [2019-12-07 20:06:05,521 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 395.92 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 106.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -133.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.48 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 447.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 61.3 MB). Peak memory consumption was 61.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 25581.22 ms. Allocated memory was 1.1 GB in the beginning and 2.4 GB in the end (delta: 1.2 GB). Free memory was 1.0 GB in the beginning and 714.3 MB in the end (delta: 291.7 MB). Peak memory consumption was 1.5 GB. Max. memory is 11.5 GB. * Witness Printer took 64.06 ms. Allocated memory is still 2.4 GB. Free memory was 714.3 MB in the beginning and 680.0 MB in the end (delta: 34.3 MB). Peak memory consumption was 34.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.0s, 192 ProgramPointsBefore, 86 ProgramPointsAfterwards, 230 TransitionsBefore, 95 TransitionsAfterwards, 19530 CoEnabledTransitionPairs, 8 FixpointIterations, 49 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 48 ConcurrentYvCompositions, 33 ChoiceCompositions, 7748 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 24 SemBasedMoverChecksPositive, 222 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 80972 CheckedPairsTotal, 145 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t2000, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L827] FCALL, FORK 0 pthread_create(&t2001, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L829] FCALL, FORK 0 pthread_create(&t2002, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L764] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L765] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L766] 2 x$flush_delayed = weak$$choice2 [L767] EXPR 2 \read(x) [L767] 2 x$mem_tmp = x [L768] EXPR 2 !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) [L768] EXPR 2 \read(x) [L768] EXPR 2 !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1)=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L768] 2 x = !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) [L771] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used)) [L772] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L772] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L785] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 3 y = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L802] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L744] 1 __unbuffered_p0_EAX = y [L747] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L787] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L750] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\read(x)=1, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=1, y=2] [L750] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L751] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L752] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L803] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L804] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L831] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L836] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L837] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 183 locations, 1 error locations. Result: UNSAFE, OverallTime: 25.4s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 3.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2076 SDtfs, 2765 SDslu, 3129 SDs, 0 SdLazy, 1899 SolverSat, 126 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 109 GetRequests, 29 SyntacticMatches, 14 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=88334occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 6.2s AutomataMinimizationTime, 18 MinimizatonAttempts, 33284 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 926 NumberOfCodeBlocks, 926 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 845 ConstructedInterpolants, 0 QuantifiedInterpolants, 106381 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...