./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a006136170cf9498b8ab21bde8c3aefce8094f73 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:38:55,426 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:38:55,428 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:38:55,435 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:38:55,435 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:38:55,436 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:38:55,437 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:38:55,438 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:38:55,439 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:38:55,440 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:38:55,441 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:38:55,442 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:38:55,442 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:38:55,442 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:38:55,443 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:38:55,444 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:38:55,444 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:38:55,445 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:38:55,446 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:38:55,448 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:38:55,449 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:38:55,449 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:38:55,450 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:38:55,451 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:38:55,452 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:38:55,452 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:38:55,453 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:38:55,453 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:38:55,453 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:38:55,454 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:38:55,454 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:38:55,454 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:38:55,455 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:38:55,455 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:38:55,456 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:38:55,456 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:38:55,457 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:38:55,457 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:38:55,457 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:38:55,457 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:38:55,458 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:38:55,458 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:38:55,468 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:38:55,469 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:38:55,469 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:38:55,469 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:38:55,469 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:38:55,470 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:38:55,471 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:38:55,471 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:38:55,471 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:38:55,471 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:38:55,471 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:38:55,472 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:38:55,473 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:38:55,473 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:38:55,474 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:38:55,474 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:38:55,475 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:38:55,475 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a006136170cf9498b8ab21bde8c3aefce8094f73 [2019-12-07 11:38:55,572 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:38:55,580 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:38:55,582 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:38:55,583 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:38:55,583 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:38:55,584 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-12-07 11:38:55,620 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/data/098b2f6e9/9a2a4c81ccd14e57b48434d3544ad581/FLAG8e5df017d [2019-12-07 11:38:56,097 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:38:56,098 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/sv-benchmarks/c/pthread-wmm/safe010_rmo.opt.i [2019-12-07 11:38:56,107 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/data/098b2f6e9/9a2a4c81ccd14e57b48434d3544ad581/FLAG8e5df017d [2019-12-07 11:38:56,605 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/data/098b2f6e9/9a2a4c81ccd14e57b48434d3544ad581 [2019-12-07 11:38:56,607 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:38:56,608 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:38:56,609 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:38:56,609 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:38:56,612 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:38:56,612 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:56,615 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56, skipping insertion in model container [2019-12-07 11:38:56,615 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:56,620 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:38:56,649 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:38:56,898 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:38:56,906 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:38:56,948 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:38:56,993 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:38:56,993 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56 WrapperNode [2019-12-07 11:38:56,993 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:38:56,994 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:38:56,994 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:38:56,994 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:38:56,999 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,012 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,034 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:38:57,035 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:38:57,035 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:38:57,035 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:38:57,041 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,042 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,045 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,045 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,051 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,054 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,056 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... [2019-12-07 11:38:57,059 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:38:57,060 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:38:57,060 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:38:57,060 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:38:57,060 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:38:57,100 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:38:57,100 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:38:57,100 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:38:57,101 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:38:57,101 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:38:57,101 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:38:57,101 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:38:57,101 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:38:57,101 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:38:57,101 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:38:57,101 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:38:57,102 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:38:57,431 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:38:57,431 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:38:57,432 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:57 BoogieIcfgContainer [2019-12-07 11:38:57,432 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:38:57,433 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:38:57,434 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:38:57,436 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:38:57,436 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:38:56" (1/3) ... [2019-12-07 11:38:57,437 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a98d182 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:38:57, skipping insertion in model container [2019-12-07 11:38:57,437 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:56" (2/3) ... [2019-12-07 11:38:57,437 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a98d182 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:38:57, skipping insertion in model container [2019-12-07 11:38:57,437 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:57" (3/3) ... [2019-12-07 11:38:57,439 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_rmo.opt.i [2019-12-07 11:38:57,447 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:38:57,447 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:38:57,451 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:38:57,452 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,477 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,478 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,478 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,478 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,478 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,478 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,479 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,479 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,479 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,479 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,479 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,480 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,480 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,480 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,480 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,480 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,481 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,481 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,481 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,481 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,481 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:57,500 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 11:38:57,513 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:38:57,513 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:38:57,513 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:38:57,514 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:38:57,514 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:38:57,514 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:38:57,514 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:38:57,514 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:38:57,524 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-12-07 11:38:57,525 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:38:57,571 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:38:57,572 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:38:57,580 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:38:57,590 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:38:57,614 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:38:57,614 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:38:57,617 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:38:57,625 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-12-07 11:38:57,626 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:39:00,384 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-12-07 11:39:00,459 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-12-07 11:39:00,459 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-12-07 11:39:00,461 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-12-07 11:39:00,810 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-12-07 11:39:00,811 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-12-07 11:39:00,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:39:00,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:00,816 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:39:00,816 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:00,819 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:00,820 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-12-07 11:39:00,826 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:00,826 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019047034] [2019-12-07 11:39:00,826 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:00,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:00,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:00,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019047034] [2019-12-07 11:39:00,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:00,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:39:00,954 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834646334] [2019-12-07 11:39:00,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:00,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:00,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:00,967 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:00,968 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-12-07 11:39:01,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:01,128 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-12-07 11:39:01,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:01,129 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:39:01,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:01,190 INFO L225 Difference]: With dead ends: 8604 [2019-12-07 11:39:01,190 INFO L226 Difference]: Without dead ends: 8436 [2019-12-07 11:39:01,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:01,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-12-07 11:39:01,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-12-07 11:39:01,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-12-07 11:39:01,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-12-07 11:39:01,468 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-12-07 11:39:01,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:01,468 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-12-07 11:39:01,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:01,468 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-12-07 11:39:01,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:39:01,470 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:01,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:01,470 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:01,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:01,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-12-07 11:39:01,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:01,471 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286776537] [2019-12-07 11:39:01,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:01,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:01,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:01,532 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286776537] [2019-12-07 11:39:01,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:01,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:01,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1409063451] [2019-12-07 11:39:01,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:01,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:01,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:01,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:01,534 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-12-07 11:39:01,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:01,828 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-12-07 11:39:01,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:01,828 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:39:01,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:01,880 INFO L225 Difference]: With dead ends: 13130 [2019-12-07 11:39:01,880 INFO L226 Difference]: Without dead ends: 13123 [2019-12-07 11:39:01,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:01,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-12-07 11:39:02,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-12-07 11:39:02,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-12-07 11:39:02,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-12-07 11:39:02,181 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-12-07 11:39:02,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:02,182 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-12-07 11:39:02,182 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:02,182 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-12-07 11:39:02,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:39:02,184 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:02,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:02,184 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:02,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:02,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-12-07 11:39:02,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:02,185 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306834553] [2019-12-07 11:39:02,185 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:02,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:02,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:02,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306834553] [2019-12-07 11:39:02,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:02,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:02,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590095060] [2019-12-07 11:39:02,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:02,232 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:02,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:02,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:02,232 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-12-07 11:39:02,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:02,381 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-12-07 11:39:02,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:02,382 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:39:02,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:02,429 INFO L225 Difference]: With dead ends: 14736 [2019-12-07 11:39:02,429 INFO L226 Difference]: Without dead ends: 14736 [2019-12-07 11:39:02,429 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:02,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-12-07 11:39:02,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-12-07 11:39:02,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-12-07 11:39:02,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-12-07 11:39:02,684 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-12-07 11:39:02,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:02,685 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-12-07 11:39:02,685 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:02,685 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-12-07 11:39:02,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 11:39:02,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:02,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:02,690 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:02,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:02,690 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-12-07 11:39:02,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:02,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074138023] [2019-12-07 11:39:02,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:02,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:02,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:02,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074138023] [2019-12-07 11:39:02,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:02,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:02,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035349820] [2019-12-07 11:39:02,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:02,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:02,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:02,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:02,740 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-12-07 11:39:03,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:03,054 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-12-07 11:39:03,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:39:03,055 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 11:39:03,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:03,080 INFO L225 Difference]: With dead ends: 17572 [2019-12-07 11:39:03,080 INFO L226 Difference]: Without dead ends: 17565 [2019-12-07 11:39:03,080 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:39:03,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-12-07 11:39:03,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-12-07 11:39:03,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-12-07 11:39:03,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-12-07 11:39:03,306 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-12-07 11:39:03,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:03,306 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-12-07 11:39:03,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:03,306 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-12-07 11:39:03,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:39:03,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:03,314 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:03,314 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:03,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:03,314 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-12-07 11:39:03,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:03,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [639659486] [2019-12-07 11:39:03,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:03,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:03,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:03,348 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [639659486] [2019-12-07 11:39:03,348 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:03,348 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:03,348 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449083045] [2019-12-07 11:39:03,348 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:03,348 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:03,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:03,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:03,349 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-12-07 11:39:03,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:03,417 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-12-07 11:39:03,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:03,417 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 11:39:03,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:03,436 INFO L225 Difference]: With dead ends: 16057 [2019-12-07 11:39:03,436 INFO L226 Difference]: Without dead ends: 16057 [2019-12-07 11:39:03,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:03,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-12-07 11:39:03,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-12-07 11:39:03,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-12-07 11:39:03,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-12-07 11:39:03,726 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-12-07 11:39:03,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:03,727 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-12-07 11:39:03,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:03,727 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-12-07 11:39:03,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:39:03,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:03,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:03,733 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:03,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:03,734 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-12-07 11:39:03,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:03,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999593859] [2019-12-07 11:39:03,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:03,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:03,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:03,781 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999593859] [2019-12-07 11:39:03,782 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:03,782 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:03,782 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [680015743] [2019-12-07 11:39:03,782 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:03,782 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:03,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:03,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:03,782 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-12-07 11:39:03,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:03,802 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-12-07 11:39:03,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:39:03,803 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 11:39:03,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:03,804 INFO L225 Difference]: With dead ends: 2296 [2019-12-07 11:39:03,804 INFO L226 Difference]: Without dead ends: 2019 [2019-12-07 11:39:03,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:03,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-12-07 11:39:03,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-12-07 11:39:03,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-12-07 11:39:03,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-12-07 11:39:03,823 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-12-07 11:39:03,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:03,823 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-12-07 11:39:03,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:03,824 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-12-07 11:39:03,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 11:39:03,825 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:03,825 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:03,825 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:03,826 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:03,826 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-12-07 11:39:03,826 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:03,826 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146466635] [2019-12-07 11:39:03,826 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:03,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:03,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:03,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146466635] [2019-12-07 11:39:03,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:03,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:39:03,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726029607] [2019-12-07 11:39:03,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:03,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:03,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:03,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:03,889 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-12-07 11:39:03,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:03,924 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-12-07 11:39:03,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:03,924 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 11:39:03,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:03,925 INFO L225 Difference]: With dead ends: 416 [2019-12-07 11:39:03,925 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 11:39:03,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:39:03,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 11:39:03,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-12-07 11:39:03,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-12-07 11:39:03,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-12-07 11:39:03,930 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-12-07 11:39:03,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:03,930 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-12-07 11:39:03,930 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:03,930 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-12-07 11:39:03,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:39:03,931 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:03,932 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:03,932 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:03,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:03,932 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-12-07 11:39:03,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:03,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [19756650] [2019-12-07 11:39:03,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:03,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:04,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:04,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [19756650] [2019-12-07 11:39:04,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:04,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:39:04,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802426171] [2019-12-07 11:39:04,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:39:04,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:04,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:39:04,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:39:04,025 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 7 states. [2019-12-07 11:39:04,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:04,271 INFO L93 Difference]: Finished difference Result 539 states and 970 transitions. [2019-12-07 11:39:04,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:39:04,271 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 11:39:04,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:04,272 INFO L225 Difference]: With dead ends: 539 [2019-12-07 11:39:04,272 INFO L226 Difference]: Without dead ends: 539 [2019-12-07 11:39:04,272 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:39:04,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-12-07 11:39:04,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 444. [2019-12-07 11:39:04,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2019-12-07 11:39:04,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 802 transitions. [2019-12-07 11:39:04,276 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 802 transitions. Word has length 52 [2019-12-07 11:39:04,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:04,276 INFO L462 AbstractCegarLoop]: Abstraction has 444 states and 802 transitions. [2019-12-07 11:39:04,277 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:39:04,277 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 802 transitions. [2019-12-07 11:39:04,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:39:04,277 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:04,277 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:04,278 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:04,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:04,278 INFO L82 PathProgramCache]: Analyzing trace with hash 22285210, now seen corresponding path program 2 times [2019-12-07 11:39:04,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:04,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574097935] [2019-12-07 11:39:04,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:04,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:04,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:04,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574097935] [2019-12-07 11:39:04,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:04,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:39:04,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [496269110] [2019-12-07 11:39:04,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:04,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:04,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:04,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:04,352 INFO L87 Difference]: Start difference. First operand 444 states and 802 transitions. Second operand 5 states. [2019-12-07 11:39:04,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:04,473 INFO L93 Difference]: Finished difference Result 621 states and 1127 transitions. [2019-12-07 11:39:04,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:39:04,473 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 11:39:04,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:04,474 INFO L225 Difference]: With dead ends: 621 [2019-12-07 11:39:04,474 INFO L226 Difference]: Without dead ends: 621 [2019-12-07 11:39:04,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:04,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2019-12-07 11:39:04,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 504. [2019-12-07 11:39:04,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2019-12-07 11:39:04,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 921 transitions. [2019-12-07 11:39:04,478 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 921 transitions. Word has length 52 [2019-12-07 11:39:04,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:04,479 INFO L462 AbstractCegarLoop]: Abstraction has 504 states and 921 transitions. [2019-12-07 11:39:04,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:04,479 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 921 transitions. [2019-12-07 11:39:04,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:39:04,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:04,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:04,480 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:04,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:04,480 INFO L82 PathProgramCache]: Analyzing trace with hash 260455414, now seen corresponding path program 3 times [2019-12-07 11:39:04,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:04,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427954614] [2019-12-07 11:39:04,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:04,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:04,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:04,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427954614] [2019-12-07 11:39:04,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:04,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:39:04,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147647704] [2019-12-07 11:39:04,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:39:04,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:04,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:39:04,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:04,550 INFO L87 Difference]: Start difference. First operand 504 states and 921 transitions. Second operand 6 states. [2019-12-07 11:39:04,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:04,773 INFO L93 Difference]: Finished difference Result 719 states and 1302 transitions. [2019-12-07 11:39:04,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 11:39:04,773 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 11:39:04,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:04,774 INFO L225 Difference]: With dead ends: 719 [2019-12-07 11:39:04,774 INFO L226 Difference]: Without dead ends: 719 [2019-12-07 11:39:04,774 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:39:04,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2019-12-07 11:39:04,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 516. [2019-12-07 11:39:04,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 516 states. [2019-12-07 11:39:04,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 516 states and 943 transitions. [2019-12-07 11:39:04,780 INFO L78 Accepts]: Start accepts. Automaton has 516 states and 943 transitions. Word has length 52 [2019-12-07 11:39:04,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:04,780 INFO L462 AbstractCegarLoop]: Abstraction has 516 states and 943 transitions. [2019-12-07 11:39:04,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:39:04,780 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 943 transitions. [2019-12-07 11:39:04,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:39:04,781 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:04,781 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:04,781 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:04,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:04,781 INFO L82 PathProgramCache]: Analyzing trace with hash -681731879, now seen corresponding path program 1 times [2019-12-07 11:39:04,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:04,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927087957] [2019-12-07 11:39:04,782 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:04,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:04,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:04,938 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927087957] [2019-12-07 11:39:04,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:04,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:39:04,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [668245341] [2019-12-07 11:39:04,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:39:04,939 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:04,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:39:04,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:39:04,939 INFO L87 Difference]: Start difference. First operand 516 states and 943 transitions. Second operand 10 states. [2019-12-07 11:39:05,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:05,252 INFO L93 Difference]: Finished difference Result 618 states and 1070 transitions. [2019-12-07 11:39:05,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:39:05,252 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 53 [2019-12-07 11:39:05,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:05,253 INFO L225 Difference]: With dead ends: 618 [2019-12-07 11:39:05,253 INFO L226 Difference]: Without dead ends: 618 [2019-12-07 11:39:05,253 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=229, Unknown=0, NotChecked=0, Total=306 [2019-12-07 11:39:05,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 618 states. [2019-12-07 11:39:05,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 618 to 413. [2019-12-07 11:39:05,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 413 states. [2019-12-07 11:39:05,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 718 transitions. [2019-12-07 11:39:05,257 INFO L78 Accepts]: Start accepts. Automaton has 413 states and 718 transitions. Word has length 53 [2019-12-07 11:39:05,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:05,257 INFO L462 AbstractCegarLoop]: Abstraction has 413 states and 718 transitions. [2019-12-07 11:39:05,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:39:05,257 INFO L276 IsEmpty]: Start isEmpty. Operand 413 states and 718 transitions. [2019-12-07 11:39:05,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:39:05,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:05,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:05,258 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:05,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:05,258 INFO L82 PathProgramCache]: Analyzing trace with hash 31866971, now seen corresponding path program 2 times [2019-12-07 11:39:05,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:05,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729494988] [2019-12-07 11:39:05,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:05,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:05,296 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:05,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729494988] [2019-12-07 11:39:05,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:05,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:05,297 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1058375739] [2019-12-07 11:39:05,297 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:05,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:05,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:05,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:05,297 INFO L87 Difference]: Start difference. First operand 413 states and 718 transitions. Second operand 3 states. [2019-12-07 11:39:05,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:05,320 INFO L93 Difference]: Finished difference Result 413 states and 717 transitions. [2019-12-07 11:39:05,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:05,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 11:39:05,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:05,321 INFO L225 Difference]: With dead ends: 413 [2019-12-07 11:39:05,321 INFO L226 Difference]: Without dead ends: 413 [2019-12-07 11:39:05,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:05,322 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2019-12-07 11:39:05,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 334. [2019-12-07 11:39:05,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334 states. [2019-12-07 11:39:05,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334 states to 334 states and 577 transitions. [2019-12-07 11:39:05,324 INFO L78 Accepts]: Start accepts. Automaton has 334 states and 577 transitions. Word has length 53 [2019-12-07 11:39:05,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:05,324 INFO L462 AbstractCegarLoop]: Abstraction has 334 states and 577 transitions. [2019-12-07 11:39:05,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:05,325 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 577 transitions. [2019-12-07 11:39:05,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:05,325 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:05,325 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:05,325 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:05,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:05,325 INFO L82 PathProgramCache]: Analyzing trace with hash -731863498, now seen corresponding path program 1 times [2019-12-07 11:39:05,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:05,326 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223505871] [2019-12-07 11:39:05,326 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:05,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:05,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:05,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [223505871] [2019-12-07 11:39:05,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:05,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:39:05,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763501738] [2019-12-07 11:39:05,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:39:05,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:05,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:39:05,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:39:05,400 INFO L87 Difference]: Start difference. First operand 334 states and 577 transitions. Second operand 7 states. [2019-12-07 11:39:05,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:05,458 INFO L93 Difference]: Finished difference Result 525 states and 899 transitions. [2019-12-07 11:39:05,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:39:05,458 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2019-12-07 11:39:05,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:05,459 INFO L225 Difference]: With dead ends: 525 [2019-12-07 11:39:05,459 INFO L226 Difference]: Without dead ends: 230 [2019-12-07 11:39:05,459 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:39:05,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2019-12-07 11:39:05,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 206. [2019-12-07 11:39:05,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2019-12-07 11:39:05,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 347 transitions. [2019-12-07 11:39:05,461 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 347 transitions. Word has length 54 [2019-12-07 11:39:05,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:05,461 INFO L462 AbstractCegarLoop]: Abstraction has 206 states and 347 transitions. [2019-12-07 11:39:05,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:39:05,461 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 347 transitions. [2019-12-07 11:39:05,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:05,462 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:05,462 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:05,462 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:05,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:05,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 2 times [2019-12-07 11:39:05,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:05,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119118018] [2019-12-07 11:39:05,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:05,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:05,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:05,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119118018] [2019-12-07 11:39:05,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:05,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 11:39:05,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899082193] [2019-12-07 11:39:05,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 11:39:05,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:05,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 11:39:05,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2019-12-07 11:39:05,838 INFO L87 Difference]: Start difference. First operand 206 states and 347 transitions. Second operand 18 states. [2019-12-07 11:39:06,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:06,629 INFO L93 Difference]: Finished difference Result 467 states and 790 transitions. [2019-12-07 11:39:06,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 11:39:06,629 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 54 [2019-12-07 11:39:06,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:06,629 INFO L225 Difference]: With dead ends: 467 [2019-12-07 11:39:06,629 INFO L226 Difference]: Without dead ends: 434 [2019-12-07 11:39:06,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 179 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=177, Invalid=879, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 11:39:06,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2019-12-07 11:39:06,632 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 285. [2019-12-07 11:39:06,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2019-12-07 11:39:06,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 479 transitions. [2019-12-07 11:39:06,633 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 479 transitions. Word has length 54 [2019-12-07 11:39:06,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:06,633 INFO L462 AbstractCegarLoop]: Abstraction has 285 states and 479 transitions. [2019-12-07 11:39:06,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 11:39:06,633 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 479 transitions. [2019-12-07 11:39:06,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:06,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:06,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:06,633 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:06,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:06,634 INFO L82 PathProgramCache]: Analyzing trace with hash -387634572, now seen corresponding path program 3 times [2019-12-07 11:39:06,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:06,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386286336] [2019-12-07 11:39:06,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:06,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:06,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:06,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386286336] [2019-12-07 11:39:06,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:06,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:39:06,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951290263] [2019-12-07 11:39:06,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:39:06,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:06,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:39:06,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:39:06,788 INFO L87 Difference]: Start difference. First operand 285 states and 479 transitions. Second operand 13 states. [2019-12-07 11:39:07,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:07,041 INFO L93 Difference]: Finished difference Result 431 states and 714 transitions. [2019-12-07 11:39:07,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 11:39:07,041 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 11:39:07,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:07,042 INFO L225 Difference]: With dead ends: 431 [2019-12-07 11:39:07,042 INFO L226 Difference]: Without dead ends: 398 [2019-12-07 11:39:07,042 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 11:39:07,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2019-12-07 11:39:07,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 302. [2019-12-07 11:39:07,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2019-12-07 11:39:07,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 511 transitions. [2019-12-07 11:39:07,045 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 511 transitions. Word has length 54 [2019-12-07 11:39:07,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:07,045 INFO L462 AbstractCegarLoop]: Abstraction has 302 states and 511 transitions. [2019-12-07 11:39:07,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:39:07,045 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 511 transitions. [2019-12-07 11:39:07,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:07,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:07,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:07,046 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:07,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:07,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1623394108, now seen corresponding path program 4 times [2019-12-07 11:39:07,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:07,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131641204] [2019-12-07 11:39:07,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:07,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:07,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:07,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131641204] [2019-12-07 11:39:07,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:07,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 11:39:07,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309959999] [2019-12-07 11:39:07,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:39:07,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:07,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:39:07,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:39:07,216 INFO L87 Difference]: Start difference. First operand 302 states and 511 transitions. Second operand 14 states. [2019-12-07 11:39:07,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:07,517 INFO L93 Difference]: Finished difference Result 423 states and 696 transitions. [2019-12-07 11:39:07,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:39:07,517 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 11:39:07,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:07,518 INFO L225 Difference]: With dead ends: 423 [2019-12-07 11:39:07,518 INFO L226 Difference]: Without dead ends: 388 [2019-12-07 11:39:07,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=503, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:39:07,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2019-12-07 11:39:07,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 306. [2019-12-07 11:39:07,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 306 states. [2019-12-07 11:39:07,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 518 transitions. [2019-12-07 11:39:07,521 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 518 transitions. Word has length 54 [2019-12-07 11:39:07,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:07,521 INFO L462 AbstractCegarLoop]: Abstraction has 306 states and 518 transitions. [2019-12-07 11:39:07,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:39:07,521 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 518 transitions. [2019-12-07 11:39:07,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:07,522 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:07,522 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:07,522 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:07,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:07,522 INFO L82 PathProgramCache]: Analyzing trace with hash 1326135034, now seen corresponding path program 5 times [2019-12-07 11:39:07,522 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:07,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404979187] [2019-12-07 11:39:07,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:07,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:07,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:07,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404979187] [2019-12-07 11:39:07,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:07,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 11:39:07,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228782363] [2019-12-07 11:39:07,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 11:39:07,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:07,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 11:39:07,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=279, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:39:07,845 INFO L87 Difference]: Start difference. First operand 306 states and 518 transitions. Second operand 19 states. [2019-12-07 11:39:08,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:08,695 INFO L93 Difference]: Finished difference Result 562 states and 935 transitions. [2019-12-07 11:39:08,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 11:39:08,696 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2019-12-07 11:39:08,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:08,697 INFO L225 Difference]: With dead ends: 562 [2019-12-07 11:39:08,697 INFO L226 Difference]: Without dead ends: 527 [2019-12-07 11:39:08,698 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 245 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=241, Invalid=1091, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 11:39:08,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 527 states. [2019-12-07 11:39:08,702 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 527 to 320. [2019-12-07 11:39:08,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 320 states. [2019-12-07 11:39:08,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 544 transitions. [2019-12-07 11:39:08,703 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 544 transitions. Word has length 54 [2019-12-07 11:39:08,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:08,704 INFO L462 AbstractCegarLoop]: Abstraction has 320 states and 544 transitions. [2019-12-07 11:39:08,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 11:39:08,704 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 544 transitions. [2019-12-07 11:39:08,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:08,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:08,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:08,705 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:08,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:08,706 INFO L82 PathProgramCache]: Analyzing trace with hash -778167690, now seen corresponding path program 6 times [2019-12-07 11:39:08,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:08,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833261873] [2019-12-07 11:39:08,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:08,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:09,120 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:09,120 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833261873] [2019-12-07 11:39:09,120 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:09,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 11:39:09,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1973223390] [2019-12-07 11:39:09,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 11:39:09,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:09,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 11:39:09,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=309, Unknown=0, NotChecked=0, Total=380 [2019-12-07 11:39:09,122 INFO L87 Difference]: Start difference. First operand 320 states and 544 transitions. Second operand 20 states. [2019-12-07 11:39:09,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:09,775 INFO L93 Difference]: Finished difference Result 631 states and 1046 transitions. [2019-12-07 11:39:09,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 11:39:09,775 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 54 [2019-12-07 11:39:09,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:09,776 INFO L225 Difference]: With dead ends: 631 [2019-12-07 11:39:09,776 INFO L226 Difference]: Without dead ends: 598 [2019-12-07 11:39:09,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 318 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=1229, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 11:39:09,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 598 states. [2019-12-07 11:39:09,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 598 to 319. [2019-12-07 11:39:09,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319 states. [2019-12-07 11:39:09,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 542 transitions. [2019-12-07 11:39:09,780 INFO L78 Accepts]: Start accepts. Automaton has 319 states and 542 transitions. Word has length 54 [2019-12-07 11:39:09,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:09,780 INFO L462 AbstractCegarLoop]: Abstraction has 319 states and 542 transitions. [2019-12-07 11:39:09,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 11:39:09,780 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 542 transitions. [2019-12-07 11:39:09,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:09,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:09,781 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:09,781 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:09,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:09,781 INFO L82 PathProgramCache]: Analyzing trace with hash 404487136, now seen corresponding path program 7 times [2019-12-07 11:39:09,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:09,781 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136269013] [2019-12-07 11:39:09,781 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:09,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:09,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:09,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136269013] [2019-12-07 11:39:09,922 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:09,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:39:09,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2126532375] [2019-12-07 11:39:09,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:39:09,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:39:09,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:39:09,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:39:09,923 INFO L87 Difference]: Start difference. First operand 319 states and 542 transitions. Second operand 13 states. [2019-12-07 11:39:10,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:10,139 INFO L93 Difference]: Finished difference Result 422 states and 696 transitions. [2019-12-07 11:39:10,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:39:10,139 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 11:39:10,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:10,140 INFO L225 Difference]: With dead ends: 422 [2019-12-07 11:39:10,140 INFO L226 Difference]: Without dead ends: 389 [2019-12-07 11:39:10,140 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=416, Unknown=0, NotChecked=0, Total=506 [2019-12-07 11:39:10,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2019-12-07 11:39:10,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 314. [2019-12-07 11:39:10,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2019-12-07 11:39:10,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 532 transitions. [2019-12-07 11:39:10,143 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 532 transitions. Word has length 54 [2019-12-07 11:39:10,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:10,143 INFO L462 AbstractCegarLoop]: Abstraction has 314 states and 532 transitions. [2019-12-07 11:39:10,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:39:10,143 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 532 transitions. [2019-12-07 11:39:10,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:39:10,143 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:10,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:10,144 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:10,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:10,144 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 8 times [2019-12-07 11:39:10,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:39:10,144 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927197129] [2019-12-07 11:39:10,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:10,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:39:10,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:39:10,203 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:39:10,204 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:39:10,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24|) |v_ULTIMATE.start_main_~#t2019~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2019~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2019~0.base_24| 4) |v_#length_13|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24|) 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= 0 |v_ULTIMATE.start_main_~#t2019~0.offset_19|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24| 1) |v_#valid_45|) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2019~0.offset=|v_ULTIMATE.start_main_~#t2019~0.offset_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_~#t2019~0.base=|v_ULTIMATE.start_main_~#t2019~0.base_24|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2019~0.offset, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2020~0.base, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2019~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t2020~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:39:10,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) (= |v_ULTIMATE.start_main_~#t2020~0.offset_10| 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) |v_ULTIMATE.start_main_~#t2020~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2020~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t2020~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_10|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2020~0.offset, #length, ULTIMATE.start_main_~#t2020~0.base] because there is no mapped edge [2019-12-07 11:39:10,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:39:10,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-77900890 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-77900890 256) 0))) (or (and (= ~y$w_buff1~0_In-77900890 |P1Thread1of1ForFork1_#t~ite9_Out-77900890|) (not .cse0) (not .cse1)) (and (= ~y~0_In-77900890 |P1Thread1of1ForFork1_#t~ite9_Out-77900890|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-77900890, ~y$w_buff1~0=~y$w_buff1~0_In-77900890, ~y~0=~y~0_In-77900890, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77900890} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-77900890, ~y$w_buff1~0=~y$w_buff1~0_In-77900890, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-77900890|, ~y~0=~y~0_In-77900890, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77900890} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 11:39:10,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 11:39:10,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In1931844491 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1931844491 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1931844491| 0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1931844491 |P1Thread1of1ForFork1_#t~ite11_Out1931844491|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1931844491, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1931844491} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1931844491, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1931844491, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1931844491|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:39:10,209 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-419535407 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-419535407 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-419535407 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-419535407 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-419535407 |P1Thread1of1ForFork1_#t~ite12_Out-419535407|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-419535407|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-419535407, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-419535407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-419535407, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-419535407} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-419535407, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-419535407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-419535407, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-419535407|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-419535407} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:39:10,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In642634852 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In642634852 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out642634852|) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd2~0_In642634852 |P1Thread1of1ForFork1_#t~ite13_Out642634852|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In642634852, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In642634852} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In642634852, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In642634852, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out642634852|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:39:10,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In-1411863803 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1411863803 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1411863803 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1411863803 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1411863803|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1411863803 |P1Thread1of1ForFork1_#t~ite14_Out-1411863803|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1411863803, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1411863803, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1411863803, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1411863803} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1411863803, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1411863803, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1411863803, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1411863803|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1411863803} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:39:10,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:39:10,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1841090625 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1841090625 256)))) (or (and (= ~y$w_buff0_used~0_In-1841090625 |P0Thread1of1ForFork0_#t~ite5_Out-1841090625|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1841090625|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1841090625, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1841090625} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1841090625|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1841090625, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1841090625} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:39:10,210 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1496839681 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1496839681 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1496839681 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-1496839681 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1496839681| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite6_Out-1496839681| ~y$w_buff1_used~0_In-1496839681)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1496839681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1496839681, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1496839681, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1496839681} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1496839681|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1496839681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1496839681, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1496839681, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1496839681} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:39:10,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-737869703 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-737869703 256))) (.cse0 (= ~y$r_buff0_thd1~0_Out-737869703 ~y$r_buff0_thd1~0_In-737869703))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out-737869703) (not .cse1)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-737869703, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-737869703} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-737869703, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-737869703|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-737869703} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:39:10,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In922949385 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In922949385 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In922949385 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In922949385 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out922949385|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In922949385 |P0Thread1of1ForFork0_#t~ite8_Out922949385|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In922949385, ~y$w_buff0_used~0=~y$w_buff0_used~0_In922949385, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In922949385, ~y$w_buff1_used~0=~y$w_buff1_used~0_In922949385} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In922949385, ~y$w_buff0_used~0=~y$w_buff0_used~0_In922949385, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out922949385|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In922949385, ~y$w_buff1_used~0=~y$w_buff1_used~0_In922949385} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:39:10,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:39:10,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:39:10,211 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In262501188 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In262501188 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out262501188| |ULTIMATE.start_main_#t~ite17_Out262501188|))) (or (and (= ~y~0_In262501188 |ULTIMATE.start_main_#t~ite17_Out262501188|) (or .cse0 .cse1) .cse2) (and (= |ULTIMATE.start_main_#t~ite17_Out262501188| ~y$w_buff1~0_In262501188) (not .cse1) (not .cse0) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In262501188, ~y~0=~y~0_In262501188, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In262501188, ~y$w_buff1_used~0=~y$w_buff1_used~0_In262501188} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out262501188|, ~y$w_buff1~0=~y$w_buff1~0_In262501188, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out262501188|, ~y~0=~y~0_In262501188, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In262501188, ~y$w_buff1_used~0=~y$w_buff1_used~0_In262501188} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:39:10,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1380279285 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1380279285 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1380279285 |ULTIMATE.start_main_#t~ite19_Out1380279285|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1380279285|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1380279285, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1380279285} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1380279285, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1380279285|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1380279285} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:39:10,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1135533140 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1135533140 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1135533140 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1135533140 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out1135533140| 0)) (and (= |ULTIMATE.start_main_#t~ite20_Out1135533140| ~y$w_buff1_used~0_In1135533140) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135533140, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135533140, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135533140, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135533140} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135533140, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135533140, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1135533140|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135533140, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135533140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:39:10,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-716756107 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-716756107 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-716756107|) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-716756107 |ULTIMATE.start_main_#t~ite21_Out-716756107|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-716756107, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-716756107} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-716756107, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-716756107, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-716756107|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:39:10,212 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In1521275523 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1521275523 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1521275523 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1521275523 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In1521275523 |ULTIMATE.start_main_#t~ite22_Out1521275523|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out1521275523|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1521275523, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1521275523, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1521275523, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1521275523} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1521275523, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1521275523, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1521275523, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1521275523|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1521275523} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:39:10,213 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1121392408 256) 0))) (or (and (= ~y$w_buff1~0_In-1121392408 |ULTIMATE.start_main_#t~ite31_Out-1121392408|) (= |ULTIMATE.start_main_#t~ite32_Out-1121392408| |ULTIMATE.start_main_#t~ite31_Out-1121392408|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1121392408 256)))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-1121392408 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In-1121392408 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-1121392408 256) 0))) .cse1) (and (not .cse1) (= ~y$w_buff1~0_In-1121392408 |ULTIMATE.start_main_#t~ite32_Out-1121392408|) (= |ULTIMATE.start_main_#t~ite31_In-1121392408| |ULTIMATE.start_main_#t~ite31_Out-1121392408|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1121392408, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1121392408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1121392408, ~weak$$choice2~0=~weak$$choice2~0_In-1121392408, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1121392408|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1121392408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1121392408} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1121392408, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1121392408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1121392408, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1121392408|, ~weak$$choice2~0=~weak$$choice2~0_In-1121392408, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1121392408|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1121392408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1121392408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:39:10,214 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 11:39:10,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:39:10,215 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:39:10,262 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:39:10 BasicIcfg [2019-12-07 11:39:10,262 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:39:10,262 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:39:10,262 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:39:10,263 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:39:10,263 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:57" (3/4) ... [2019-12-07 11:39:10,264 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:39:10,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2019~0.base_24|) |v_ULTIMATE.start_main_~#t2019~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2019~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2019~0.base_24| 4) |v_#length_13|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24|) 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= 0 |v_ULTIMATE.start_main_~#t2019~0.offset_19|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2019~0.base_24| 1) |v_#valid_45|) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2019~0.offset=|v_ULTIMATE.start_main_~#t2019~0.offset_19|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_19|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_~#t2019~0.base=|v_ULTIMATE.start_main_~#t2019~0.base_24|, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_16|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2019~0.offset, ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2020~0.base, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_~#t2019~0.base, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_~#t2020~0.offset, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:39:10,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) (= |v_ULTIMATE.start_main_~#t2020~0.offset_10| 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2020~0.base_11|) |v_ULTIMATE.start_main_~#t2020~0.offset_10| 1)) |v_#memory_int_7|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2020~0.base_11| 4) |v_#length_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2020~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t2020~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2020~0.offset=|v_ULTIMATE.start_main_~#t2020~0.offset_10|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2020~0.base=|v_ULTIMATE.start_main_~#t2020~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2020~0.offset, #length, ULTIMATE.start_main_~#t2020~0.base] because there is no mapped edge [2019-12-07 11:39:10,265 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:39:10,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-77900890 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-77900890 256) 0))) (or (and (= ~y$w_buff1~0_In-77900890 |P1Thread1of1ForFork1_#t~ite9_Out-77900890|) (not .cse0) (not .cse1)) (and (= ~y~0_In-77900890 |P1Thread1of1ForFork1_#t~ite9_Out-77900890|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-77900890, ~y$w_buff1~0=~y$w_buff1~0_In-77900890, ~y~0=~y~0_In-77900890, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77900890} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-77900890, ~y$w_buff1~0=~y$w_buff1~0_In-77900890, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-77900890|, ~y~0=~y~0_In-77900890, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-77900890} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 11:39:10,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 11:39:10,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In1931844491 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1931844491 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1931844491| 0) (not .cse1)) (and (= ~y$w_buff0_used~0_In1931844491 |P1Thread1of1ForFork1_#t~ite11_Out1931844491|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1931844491, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1931844491} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1931844491, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1931844491, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1931844491|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:39:10,266 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-419535407 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In-419535407 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-419535407 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd2~0_In-419535407 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-419535407 |P1Thread1of1ForFork1_#t~ite12_Out-419535407|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-419535407|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-419535407, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-419535407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-419535407, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-419535407} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-419535407, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-419535407, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-419535407, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-419535407|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-419535407} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:39:10,267 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In642634852 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In642634852 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out642634852|) (not .cse1)) (and (or .cse1 .cse0) (= ~y$r_buff0_thd2~0_In642634852 |P1Thread1of1ForFork1_#t~ite13_Out642634852|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In642634852, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In642634852} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In642634852, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In642634852, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out642634852|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:39:10,267 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd2~0_In-1411863803 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1411863803 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1411863803 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-1411863803 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1411863803|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1411863803 |P1Thread1of1ForFork1_#t~ite14_Out-1411863803|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1411863803, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1411863803, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1411863803, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1411863803} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1411863803, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1411863803, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1411863803, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1411863803|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1411863803} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:39:10,267 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:39:10,267 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1841090625 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1841090625 256)))) (or (and (= ~y$w_buff0_used~0_In-1841090625 |P0Thread1of1ForFork0_#t~ite5_Out-1841090625|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1841090625|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1841090625, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1841090625} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1841090625|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1841090625, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1841090625} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:39:10,267 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1496839681 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In-1496839681 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1496839681 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-1496839681 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1496839681| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P0Thread1of1ForFork0_#t~ite6_Out-1496839681| ~y$w_buff1_used~0_In-1496839681)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1496839681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1496839681, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1496839681, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1496839681} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1496839681|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1496839681, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1496839681, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1496839681, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1496839681} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:39:10,268 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-737869703 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-737869703 256))) (.cse0 (= ~y$r_buff0_thd1~0_Out-737869703 ~y$r_buff0_thd1~0_In-737869703))) (or (and .cse0 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out-737869703) (not .cse1)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-737869703, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-737869703} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-737869703, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-737869703|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-737869703} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:39:10,268 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In922949385 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In922949385 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In922949385 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In922949385 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out922949385|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In922949385 |P0Thread1of1ForFork0_#t~ite8_Out922949385|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In922949385, ~y$w_buff0_used~0=~y$w_buff0_used~0_In922949385, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In922949385, ~y$w_buff1_used~0=~y$w_buff1_used~0_In922949385} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In922949385, ~y$w_buff0_used~0=~y$w_buff0_used~0_In922949385, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out922949385|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In922949385, ~y$w_buff1_used~0=~y$w_buff1_used~0_In922949385} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:39:10,268 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:39:10,268 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:39:10,268 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In262501188 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In262501188 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite18_Out262501188| |ULTIMATE.start_main_#t~ite17_Out262501188|))) (or (and (= ~y~0_In262501188 |ULTIMATE.start_main_#t~ite17_Out262501188|) (or .cse0 .cse1) .cse2) (and (= |ULTIMATE.start_main_#t~ite17_Out262501188| ~y$w_buff1~0_In262501188) (not .cse1) (not .cse0) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In262501188, ~y~0=~y~0_In262501188, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In262501188, ~y$w_buff1_used~0=~y$w_buff1_used~0_In262501188} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out262501188|, ~y$w_buff1~0=~y$w_buff1~0_In262501188, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out262501188|, ~y~0=~y~0_In262501188, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In262501188, ~y$w_buff1_used~0=~y$w_buff1_used~0_In262501188} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:39:10,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1380279285 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1380279285 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In1380279285 |ULTIMATE.start_main_#t~ite19_Out1380279285|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1380279285|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1380279285, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1380279285} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1380279285, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1380279285|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1380279285} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:39:10,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In1135533140 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In1135533140 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1135533140 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In1135533140 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out1135533140| 0)) (and (= |ULTIMATE.start_main_#t~ite20_Out1135533140| ~y$w_buff1_used~0_In1135533140) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135533140, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135533140, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135533140, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135533140} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135533140, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135533140, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1135533140|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135533140, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135533140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:39:10,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-716756107 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-716756107 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out-716756107|) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd0~0_In-716756107 |ULTIMATE.start_main_#t~ite21_Out-716756107|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-716756107, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-716756107} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-716756107, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-716756107, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-716756107|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:39:10,269 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd0~0_In1521275523 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In1521275523 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1521275523 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1521275523 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In1521275523 |ULTIMATE.start_main_#t~ite22_Out1521275523|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite22_Out1521275523|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1521275523, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1521275523, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1521275523, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1521275523} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1521275523, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1521275523, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1521275523, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1521275523|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1521275523} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:39:10,270 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1121392408 256) 0))) (or (and (= ~y$w_buff1~0_In-1121392408 |ULTIMATE.start_main_#t~ite31_Out-1121392408|) (= |ULTIMATE.start_main_#t~ite32_Out-1121392408| |ULTIMATE.start_main_#t~ite31_Out-1121392408|) (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1121392408 256)))) (or (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-1121392408 256) 0)) (and (= 0 (mod ~y$w_buff1_used~0_In-1121392408 256)) .cse0) (= (mod ~y$w_buff0_used~0_In-1121392408 256) 0))) .cse1) (and (not .cse1) (= ~y$w_buff1~0_In-1121392408 |ULTIMATE.start_main_#t~ite32_Out-1121392408|) (= |ULTIMATE.start_main_#t~ite31_In-1121392408| |ULTIMATE.start_main_#t~ite31_Out-1121392408|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1121392408, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1121392408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1121392408, ~weak$$choice2~0=~weak$$choice2~0_In-1121392408, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-1121392408|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1121392408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1121392408} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1121392408, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1121392408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1121392408, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-1121392408|, ~weak$$choice2~0=~weak$$choice2~0_In-1121392408, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-1121392408|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1121392408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1121392408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:39:10,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 11:39:10,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:39:10,271 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:39:10,331 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_24661408-a16c-4872-8b8c-72a5a4010394/bin/utaipan/witness.graphml [2019-12-07 11:39:10,331 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:39:10,332 INFO L168 Benchmark]: Toolchain (without parser) took 13724.41 ms. Allocated memory was 1.0 GB in the beginning and 1.6 GB in the end (delta: 591.4 MB). Free memory was 937.8 MB in the beginning and 998.6 MB in the end (delta: -60.8 MB). Peak memory consumption was 530.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,333 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:39:10,333 INFO L168 Benchmark]: CACSL2BoogieTranslator took 384.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 937.8 MB in the beginning and 1.1 GB in the end (delta: -124.8 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,334 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,334 INFO L168 Benchmark]: Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:39:10,334 INFO L168 Benchmark]: RCFGBuilder took 372.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.9 MB). Peak memory consumption was 48.9 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,335 INFO L168 Benchmark]: TraceAbstraction took 12828.72 ms. Allocated memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: 498.1 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -9.3 MB). Peak memory consumption was 488.8 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,335 INFO L168 Benchmark]: Witness Printer took 68.93 ms. Allocated memory is still 1.6 GB. Free memory was 1.0 GB in the beginning and 998.6 MB in the end (delta: 19.0 MB). Peak memory consumption was 19.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:10,336 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 960.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 384.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 937.8 MB in the beginning and 1.1 GB in the end (delta: -124.8 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.72 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 372.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.9 MB). Peak memory consumption was 48.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 12828.72 ms. Allocated memory was 1.1 GB in the beginning and 1.6 GB in the end (delta: 498.1 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -9.3 MB). Peak memory consumption was 488.8 MB. Max. memory is 11.5 GB. * Witness Printer took 68.93 ms. Allocated memory is still 1.6 GB. Free memory was 1.0 GB in the beginning and 998.6 MB in the end (delta: 19.0 MB). Peak memory consumption was 19.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2019, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2020, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 12.6s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 5.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1993 SDtfs, 2372 SDslu, 6584 SDs, 0 SdLazy, 5434 SolverSat, 281 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 285 GetRequests, 25 SyntacticMatches, 25 SemanticMatches, 235 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1035 ImplicationChecksByTransitivity, 2.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.4s AutomataMinimizationTime, 19 MinimizatonAttempts, 10681 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 823 NumberOfCodeBlocks, 823 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 750 ConstructedInterpolants, 0 QuantifiedInterpolants, 207450 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...