./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe011_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe011_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 990cdd7f471d7a1b05089f8d842917591a50d2f2 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:02:27,630 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:02:27,631 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:02:27,639 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:02:27,639 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:02:27,640 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:02:27,640 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:02:27,642 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:02:27,643 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:02:27,644 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:02:27,644 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:02:27,645 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:02:27,645 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:02:27,646 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:02:27,647 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:02:27,648 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:02:27,648 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:02:27,649 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:02:27,650 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:02:27,652 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:02:27,653 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:02:27,654 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:02:27,654 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:02:27,655 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:02:27,657 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:02:27,657 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:02:27,657 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:02:27,657 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:02:27,658 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:02:27,658 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:02:27,658 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:02:27,659 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:02:27,659 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:02:27,659 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:02:27,660 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:02:27,660 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:02:27,661 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:02:27,661 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:02:27,661 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:02:27,661 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:02:27,662 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:02:27,662 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 17:02:27,672 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:02:27,672 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:02:27,672 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 17:02:27,672 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 17:02:27,673 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 17:02:27,673 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 17:02:27,673 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 17:02:27,674 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:02:27,674 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:02:27,675 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:02:27,676 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:02:27,676 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:02:27,676 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 17:02:27,677 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:02:27,677 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:02:27,677 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:02:27,677 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 17:02:27,677 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 990cdd7f471d7a1b05089f8d842917591a50d2f2 [2019-12-07 17:02:27,779 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:02:27,786 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:02:27,788 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:02:27,789 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:02:27,790 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:02:27,790 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe011_power.oepc.i [2019-12-07 17:02:27,825 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/data/3f58aa780/ad29d145cb6240778d0d7119a3621206/FLAG2f8468433 [2019-12-07 17:02:28,271 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:02:28,271 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/sv-benchmarks/c/pthread-wmm/safe011_power.oepc.i [2019-12-07 17:02:28,282 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/data/3f58aa780/ad29d145cb6240778d0d7119a3621206/FLAG2f8468433 [2019-12-07 17:02:28,290 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/data/3f58aa780/ad29d145cb6240778d0d7119a3621206 [2019-12-07 17:02:28,292 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:02:28,293 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:02:28,294 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:02:28,294 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:02:28,296 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:02:28,297 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,299 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28, skipping insertion in model container [2019-12-07 17:02:28,299 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,304 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:02:28,340 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:02:28,590 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:02:28,598 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:02:28,639 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:02:28,683 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:02:28,683 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28 WrapperNode [2019-12-07 17:02:28,683 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:02:28,684 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:02:28,684 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:02:28,684 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:02:28,689 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,703 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,724 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:02:28,724 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:02:28,724 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:02:28,724 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:02:28,731 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,731 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,734 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,734 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,741 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,743 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,746 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... [2019-12-07 17:02:28,749 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:02:28,749 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:02:28,749 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:02:28,749 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:02:28,750 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:02:28,789 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:02:28,789 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:02:28,790 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:02:28,790 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:02:28,790 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:02:28,790 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:02:28,790 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:02:28,791 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:02:29,153 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:02:29,153 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:02:29,155 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:02:29 BoogieIcfgContainer [2019-12-07 17:02:29,155 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:02:29,156 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:02:29,156 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:02:29,158 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:02:29,158 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:02:28" (1/3) ... [2019-12-07 17:02:29,159 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@bb46c0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:02:29, skipping insertion in model container [2019-12-07 17:02:29,159 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:02:28" (2/3) ... [2019-12-07 17:02:29,160 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@bb46c0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:02:29, skipping insertion in model container [2019-12-07 17:02:29,160 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:02:29" (3/3) ... [2019-12-07 17:02:29,161 INFO L109 eAbstractionObserver]: Analyzing ICFG safe011_power.oepc.i [2019-12-07 17:02:29,170 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:02:29,170 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:02:29,176 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:02:29,177 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,209 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,210 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,211 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,213 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,214 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,215 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,216 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:02:29,230 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:02:29,244 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:02:29,244 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:02:29,244 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:02:29,244 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:02:29,244 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:02:29,244 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:02:29,245 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:02:29,245 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:02:29,257 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 17:02:29,258 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:02:29,321 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:02:29,321 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:02:29,332 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 573 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:02:29,346 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:02:29,381 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:02:29,381 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:02:29,386 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 573 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:02:29,400 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 17:02:29,400 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:02:32,265 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 17:02:32,363 INFO L206 etLargeBlockEncoding]: Checked pairs total: 86146 [2019-12-07 17:02:32,363 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 17:02:32,365 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 104 transitions [2019-12-07 17:02:44,405 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 104862 states. [2019-12-07 17:02:44,406 INFO L276 IsEmpty]: Start isEmpty. Operand 104862 states. [2019-12-07 17:02:44,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:02:44,411 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:02:44,411 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:02:44,412 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:02:44,415 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:02:44,415 INFO L82 PathProgramCache]: Analyzing trace with hash 844471, now seen corresponding path program 1 times [2019-12-07 17:02:44,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:02:44,421 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183758705] [2019-12-07 17:02:44,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:02:44,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:02:44,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:02:44,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183758705] [2019-12-07 17:02:44,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:02:44,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:02:44,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843593481] [2019-12-07 17:02:44,569 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:02:44,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:02:44,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:02:44,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:02:44,580 INFO L87 Difference]: Start difference. First operand 104862 states. Second operand 3 states. [2019-12-07 17:02:45,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:02:45,260 INFO L93 Difference]: Finished difference Result 104560 states and 448162 transitions. [2019-12-07 17:02:45,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:02:45,261 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:02:45,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:02:45,840 INFO L225 Difference]: With dead ends: 104560 [2019-12-07 17:02:45,840 INFO L226 Difference]: Without dead ends: 102376 [2019-12-07 17:02:45,841 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:02:49,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102376 states. [2019-12-07 17:02:52,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102376 to 102376. [2019-12-07 17:02:52,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102376 states. [2019-12-07 17:02:52,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102376 states to 102376 states and 439244 transitions. [2019-12-07 17:02:52,599 INFO L78 Accepts]: Start accepts. Automaton has 102376 states and 439244 transitions. Word has length 3 [2019-12-07 17:02:52,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:02:52,599 INFO L462 AbstractCegarLoop]: Abstraction has 102376 states and 439244 transitions. [2019-12-07 17:02:52,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:02:52,599 INFO L276 IsEmpty]: Start isEmpty. Operand 102376 states and 439244 transitions. [2019-12-07 17:02:52,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:02:52,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:02:52,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:02:52,603 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:02:52,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:02:52,604 INFO L82 PathProgramCache]: Analyzing trace with hash 205437058, now seen corresponding path program 1 times [2019-12-07 17:02:52,604 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:02:52,604 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478371015] [2019-12-07 17:02:52,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:02:52,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:02:52,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:02:52,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478371015] [2019-12-07 17:02:52,680 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:02:52,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:02:52,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1085434516] [2019-12-07 17:02:52,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:02:52,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:02:52,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:02:52,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:02:52,681 INFO L87 Difference]: Start difference. First operand 102376 states and 439244 transitions. Second operand 4 states. [2019-12-07 17:02:53,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:02:53,515 INFO L93 Difference]: Finished difference Result 164490 states and 678436 transitions. [2019-12-07 17:02:53,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:02:53,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:02:53,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:02:54,261 INFO L225 Difference]: With dead ends: 164490 [2019-12-07 17:02:54,261 INFO L226 Difference]: Without dead ends: 164441 [2019-12-07 17:02:54,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:02:58,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164441 states. [2019-12-07 17:03:00,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164441 to 148513. [2019-12-07 17:03:00,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148513 states. [2019-12-07 17:03:01,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148513 states to 148513 states and 619831 transitions. [2019-12-07 17:03:01,045 INFO L78 Accepts]: Start accepts. Automaton has 148513 states and 619831 transitions. Word has length 11 [2019-12-07 17:03:01,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:01,045 INFO L462 AbstractCegarLoop]: Abstraction has 148513 states and 619831 transitions. [2019-12-07 17:03:01,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:03:01,045 INFO L276 IsEmpty]: Start isEmpty. Operand 148513 states and 619831 transitions. [2019-12-07 17:03:01,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:03:01,051 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:01,051 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:01,051 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:01,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:01,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1045519438, now seen corresponding path program 1 times [2019-12-07 17:03:01,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:01,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028651354] [2019-12-07 17:03:01,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:01,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:01,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:01,119 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028651354] [2019-12-07 17:03:01,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:01,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:01,120 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527221039] [2019-12-07 17:03:01,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:03:01,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:01,120 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:03:01,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:03:01,120 INFO L87 Difference]: Start difference. First operand 148513 states and 619831 transitions. Second operand 4 states. [2019-12-07 17:03:02,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:02,136 INFO L93 Difference]: Finished difference Result 211896 states and 864765 transitions. [2019-12-07 17:03:02,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:03:02,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:03:02,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:02,672 INFO L225 Difference]: With dead ends: 211896 [2019-12-07 17:03:02,673 INFO L226 Difference]: Without dead ends: 211833 [2019-12-07 17:03:02,673 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:09,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211833 states. [2019-12-07 17:03:11,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211833 to 178183. [2019-12-07 17:03:11,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178183 states. [2019-12-07 17:03:12,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178183 states to 178183 states and 738846 transitions. [2019-12-07 17:03:12,471 INFO L78 Accepts]: Start accepts. Automaton has 178183 states and 738846 transitions. Word has length 13 [2019-12-07 17:03:12,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:12,471 INFO L462 AbstractCegarLoop]: Abstraction has 178183 states and 738846 transitions. [2019-12-07 17:03:12,472 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:03:12,472 INFO L276 IsEmpty]: Start isEmpty. Operand 178183 states and 738846 transitions. [2019-12-07 17:03:12,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:03:12,474 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:12,474 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:12,474 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:12,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:12,474 INFO L82 PathProgramCache]: Analyzing trace with hash 31849685, now seen corresponding path program 1 times [2019-12-07 17:03:12,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:12,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405596659] [2019-12-07 17:03:12,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:12,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:12,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:12,529 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405596659] [2019-12-07 17:03:12,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:12,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:12,529 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1670496061] [2019-12-07 17:03:12,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:03:12,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:12,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:03:12,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:03:12,530 INFO L87 Difference]: Start difference. First operand 178183 states and 738846 transitions. Second operand 4 states. [2019-12-07 17:03:13,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:13,939 INFO L93 Difference]: Finished difference Result 223676 states and 918481 transitions. [2019-12-07 17:03:13,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:03:13,940 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:03:13,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:14,516 INFO L225 Difference]: With dead ends: 223676 [2019-12-07 17:03:14,516 INFO L226 Difference]: Without dead ends: 223676 [2019-12-07 17:03:14,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:19,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223676 states. [2019-12-07 17:03:22,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223676 to 188328. [2019-12-07 17:03:22,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188328 states. [2019-12-07 17:03:25,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188328 states to 188328 states and 781098 transitions. [2019-12-07 17:03:25,983 INFO L78 Accepts]: Start accepts. Automaton has 188328 states and 781098 transitions. Word has length 13 [2019-12-07 17:03:25,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:25,983 INFO L462 AbstractCegarLoop]: Abstraction has 188328 states and 781098 transitions. [2019-12-07 17:03:25,983 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:03:25,983 INFO L276 IsEmpty]: Start isEmpty. Operand 188328 states and 781098 transitions. [2019-12-07 17:03:25,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:03:25,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:25,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:25,998 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:25,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:25,999 INFO L82 PathProgramCache]: Analyzing trace with hash 227208446, now seen corresponding path program 1 times [2019-12-07 17:03:25,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:25,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388568032] [2019-12-07 17:03:25,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:26,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:26,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:26,028 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388568032] [2019-12-07 17:03:26,028 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:26,028 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:26,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [190971596] [2019-12-07 17:03:26,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:26,029 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:26,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:26,029 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:26,029 INFO L87 Difference]: Start difference. First operand 188328 states and 781098 transitions. Second operand 3 states. [2019-12-07 17:03:26,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:26,130 INFO L93 Difference]: Finished difference Result 36088 states and 117391 transitions. [2019-12-07 17:03:26,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:26,131 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:03:26,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:26,186 INFO L225 Difference]: With dead ends: 36088 [2019-12-07 17:03:26,186 INFO L226 Difference]: Without dead ends: 36088 [2019-12-07 17:03:26,186 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:26,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36088 states. [2019-12-07 17:03:26,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36088 to 36088. [2019-12-07 17:03:26,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36088 states. [2019-12-07 17:03:26,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36088 states to 36088 states and 117391 transitions. [2019-12-07 17:03:26,765 INFO L78 Accepts]: Start accepts. Automaton has 36088 states and 117391 transitions. Word has length 19 [2019-12-07 17:03:26,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:26,765 INFO L462 AbstractCegarLoop]: Abstraction has 36088 states and 117391 transitions. [2019-12-07 17:03:26,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:26,765 INFO L276 IsEmpty]: Start isEmpty. Operand 36088 states and 117391 transitions. [2019-12-07 17:03:26,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:03:26,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:26,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:26,768 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:26,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:26,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1539749953, now seen corresponding path program 1 times [2019-12-07 17:03:26,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:26,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [475282981] [2019-12-07 17:03:26,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:26,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:26,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:26,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [475282981] [2019-12-07 17:03:26,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:26,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:03:26,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888792326] [2019-12-07 17:03:26,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:03:26,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:26,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:03:26,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:26,819 INFO L87 Difference]: Start difference. First operand 36088 states and 117391 transitions. Second operand 5 states. [2019-12-07 17:03:27,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:27,307 INFO L93 Difference]: Finished difference Result 49088 states and 156546 transitions. [2019-12-07 17:03:27,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:03:27,307 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:03:27,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:27,373 INFO L225 Difference]: With dead ends: 49088 [2019-12-07 17:03:27,373 INFO L226 Difference]: Without dead ends: 49075 [2019-12-07 17:03:27,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:03:27,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49075 states. [2019-12-07 17:03:27,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49075 to 36431. [2019-12-07 17:03:27,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36431 states. [2019-12-07 17:03:28,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36431 states to 36431 states and 118357 transitions. [2019-12-07 17:03:28,049 INFO L78 Accepts]: Start accepts. Automaton has 36431 states and 118357 transitions. Word has length 19 [2019-12-07 17:03:28,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:28,049 INFO L462 AbstractCegarLoop]: Abstraction has 36431 states and 118357 transitions. [2019-12-07 17:03:28,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:03:28,049 INFO L276 IsEmpty]: Start isEmpty. Operand 36431 states and 118357 transitions. [2019-12-07 17:03:28,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:03:28,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:28,057 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:28,057 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:28,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:28,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1129453691, now seen corresponding path program 1 times [2019-12-07 17:03:28,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:28,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402535943] [2019-12-07 17:03:28,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:28,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:28,125 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:28,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402535943] [2019-12-07 17:03:28,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:28,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:03:28,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [803941993] [2019-12-07 17:03:28,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:03:28,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:28,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:03:28,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:28,127 INFO L87 Difference]: Start difference. First operand 36431 states and 118357 transitions. Second operand 5 states. [2019-12-07 17:03:28,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:28,472 INFO L93 Difference]: Finished difference Result 49997 states and 159227 transitions. [2019-12-07 17:03:28,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:03:28,472 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:03:28,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:28,545 INFO L225 Difference]: With dead ends: 49997 [2019-12-07 17:03:28,545 INFO L226 Difference]: Without dead ends: 49997 [2019-12-07 17:03:28,546 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:03:28,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49997 states. [2019-12-07 17:03:29,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49997 to 40086. [2019-12-07 17:03:29,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40086 states. [2019-12-07 17:03:29,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40086 states to 40086 states and 129428 transitions. [2019-12-07 17:03:29,431 INFO L78 Accepts]: Start accepts. Automaton has 40086 states and 129428 transitions. Word has length 25 [2019-12-07 17:03:29,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:29,431 INFO L462 AbstractCegarLoop]: Abstraction has 40086 states and 129428 transitions. [2019-12-07 17:03:29,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:03:29,431 INFO L276 IsEmpty]: Start isEmpty. Operand 40086 states and 129428 transitions. [2019-12-07 17:03:29,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:03:29,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:29,437 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:29,438 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:29,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:29,438 INFO L82 PathProgramCache]: Analyzing trace with hash -2008358183, now seen corresponding path program 1 times [2019-12-07 17:03:29,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:29,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100957264] [2019-12-07 17:03:29,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:29,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:29,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:29,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100957264] [2019-12-07 17:03:29,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:29,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:03:29,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18625822] [2019-12-07 17:03:29,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:03:29,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:29,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:03:29,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:03:29,470 INFO L87 Difference]: Start difference. First operand 40086 states and 129428 transitions. Second operand 4 states. [2019-12-07 17:03:29,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:29,498 INFO L93 Difference]: Finished difference Result 8297 states and 22407 transitions. [2019-12-07 17:03:29,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:03:29,499 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 17:03:29,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:29,506 INFO L225 Difference]: With dead ends: 8297 [2019-12-07 17:03:29,506 INFO L226 Difference]: Without dead ends: 8297 [2019-12-07 17:03:29,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:03:29,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8297 states. [2019-12-07 17:03:29,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8297 to 8157. [2019-12-07 17:03:29,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8157 states. [2019-12-07 17:03:29,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8157 states to 8157 states and 22007 transitions. [2019-12-07 17:03:29,604 INFO L78 Accepts]: Start accepts. Automaton has 8157 states and 22007 transitions. Word has length 25 [2019-12-07 17:03:29,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:29,604 INFO L462 AbstractCegarLoop]: Abstraction has 8157 states and 22007 transitions. [2019-12-07 17:03:29,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:03:29,604 INFO L276 IsEmpty]: Start isEmpty. Operand 8157 states and 22007 transitions. [2019-12-07 17:03:29,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 17:03:29,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:29,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:29,612 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:29,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:29,612 INFO L82 PathProgramCache]: Analyzing trace with hash -1811341367, now seen corresponding path program 1 times [2019-12-07 17:03:29,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:29,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085193044] [2019-12-07 17:03:29,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:29,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:29,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:29,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085193044] [2019-12-07 17:03:29,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:29,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:03:29,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759771240] [2019-12-07 17:03:29,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:03:29,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:29,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:03:29,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:29,653 INFO L87 Difference]: Start difference. First operand 8157 states and 22007 transitions. Second operand 5 states. [2019-12-07 17:03:29,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:29,679 INFO L93 Difference]: Finished difference Result 5827 states and 16538 transitions. [2019-12-07 17:03:29,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:03:29,680 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 17:03:29,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:29,685 INFO L225 Difference]: With dead ends: 5827 [2019-12-07 17:03:29,685 INFO L226 Difference]: Without dead ends: 5827 [2019-12-07 17:03:29,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:29,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5827 states. [2019-12-07 17:03:29,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5827 to 5078. [2019-12-07 17:03:29,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5078 states. [2019-12-07 17:03:29,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5078 states to 5078 states and 14510 transitions. [2019-12-07 17:03:29,761 INFO L78 Accepts]: Start accepts. Automaton has 5078 states and 14510 transitions. Word has length 37 [2019-12-07 17:03:29,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:29,761 INFO L462 AbstractCegarLoop]: Abstraction has 5078 states and 14510 transitions. [2019-12-07 17:03:29,761 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:03:29,761 INFO L276 IsEmpty]: Start isEmpty. Operand 5078 states and 14510 transitions. [2019-12-07 17:03:29,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:29,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:29,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:29,768 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:29,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:29,768 INFO L82 PathProgramCache]: Analyzing trace with hash 1876753934, now seen corresponding path program 1 times [2019-12-07 17:03:29,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:29,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435749780] [2019-12-07 17:03:29,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:29,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:29,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:29,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435749780] [2019-12-07 17:03:29,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:29,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:03:29,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [105393327] [2019-12-07 17:03:29,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:29,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:29,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:29,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:29,805 INFO L87 Difference]: Start difference. First operand 5078 states and 14510 transitions. Second operand 3 states. [2019-12-07 17:03:29,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:29,840 INFO L93 Difference]: Finished difference Result 5089 states and 14524 transitions. [2019-12-07 17:03:29,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:29,840 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:03:29,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:29,845 INFO L225 Difference]: With dead ends: 5089 [2019-12-07 17:03:29,845 INFO L226 Difference]: Without dead ends: 5089 [2019-12-07 17:03:29,845 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:29,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5089 states. [2019-12-07 17:03:29,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5089 to 5085. [2019-12-07 17:03:29,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5085 states. [2019-12-07 17:03:29,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5085 states to 5085 states and 14520 transitions. [2019-12-07 17:03:29,912 INFO L78 Accepts]: Start accepts. Automaton has 5085 states and 14520 transitions. Word has length 65 [2019-12-07 17:03:29,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:29,913 INFO L462 AbstractCegarLoop]: Abstraction has 5085 states and 14520 transitions. [2019-12-07 17:03:29,913 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:29,913 INFO L276 IsEmpty]: Start isEmpty. Operand 5085 states and 14520 transitions. [2019-12-07 17:03:29,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:29,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:29,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:29,919 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:29,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:29,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1173172274, now seen corresponding path program 1 times [2019-12-07 17:03:29,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:29,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299722959] [2019-12-07 17:03:29,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:29,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:29,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:29,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299722959] [2019-12-07 17:03:29,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:29,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:03:29,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722487216] [2019-12-07 17:03:29,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:29,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:29,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:29,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:29,960 INFO L87 Difference]: Start difference. First operand 5085 states and 14520 transitions. Second operand 3 states. [2019-12-07 17:03:29,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:29,998 INFO L93 Difference]: Finished difference Result 5089 states and 14514 transitions. [2019-12-07 17:03:29,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:29,998 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:03:29,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:30,003 INFO L225 Difference]: With dead ends: 5089 [2019-12-07 17:03:30,003 INFO L226 Difference]: Without dead ends: 5089 [2019-12-07 17:03:30,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:30,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5089 states. [2019-12-07 17:03:30,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5089 to 5081. [2019-12-07 17:03:30,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5081 states. [2019-12-07 17:03:30,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5081 states to 5081 states and 14506 transitions. [2019-12-07 17:03:30,070 INFO L78 Accepts]: Start accepts. Automaton has 5081 states and 14506 transitions. Word has length 65 [2019-12-07 17:03:30,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:30,071 INFO L462 AbstractCegarLoop]: Abstraction has 5081 states and 14506 transitions. [2019-12-07 17:03:30,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:30,071 INFO L276 IsEmpty]: Start isEmpty. Operand 5081 states and 14506 transitions. [2019-12-07 17:03:30,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:30,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:30,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:30,079 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:30,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:30,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1163492121, now seen corresponding path program 1 times [2019-12-07 17:03:30,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:30,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843466306] [2019-12-07 17:03:30,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:30,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:30,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:30,146 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843466306] [2019-12-07 17:03:30,146 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:30,146 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:03:30,146 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880115610] [2019-12-07 17:03:30,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:03:30,147 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:30,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:03:30,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:30,147 INFO L87 Difference]: Start difference. First operand 5081 states and 14506 transitions. Second operand 5 states. [2019-12-07 17:03:30,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:30,330 INFO L93 Difference]: Finished difference Result 7575 states and 21488 transitions. [2019-12-07 17:03:30,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:03:30,330 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 17:03:30,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:30,339 INFO L225 Difference]: With dead ends: 7575 [2019-12-07 17:03:30,339 INFO L226 Difference]: Without dead ends: 7575 [2019-12-07 17:03:30,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:03:30,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7575 states. [2019-12-07 17:03:30,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7575 to 6417. [2019-12-07 17:03:30,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6417 states. [2019-12-07 17:03:30,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6417 states to 6417 states and 18360 transitions. [2019-12-07 17:03:30,428 INFO L78 Accepts]: Start accepts. Automaton has 6417 states and 18360 transitions. Word has length 65 [2019-12-07 17:03:30,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:30,428 INFO L462 AbstractCegarLoop]: Abstraction has 6417 states and 18360 transitions. [2019-12-07 17:03:30,428 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:03:30,428 INFO L276 IsEmpty]: Start isEmpty. Operand 6417 states and 18360 transitions. [2019-12-07 17:03:30,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:30,435 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:30,435 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:30,435 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:30,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:30,436 INFO L82 PathProgramCache]: Analyzing trace with hash -2061317327, now seen corresponding path program 2 times [2019-12-07 17:03:30,436 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:30,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420345585] [2019-12-07 17:03:30,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:30,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:30,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:30,492 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420345585] [2019-12-07 17:03:30,492 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:30,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:03:30,493 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942425296] [2019-12-07 17:03:30,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:03:30,493 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:30,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:03:30,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:03:30,494 INFO L87 Difference]: Start difference. First operand 6417 states and 18360 transitions. Second operand 5 states. [2019-12-07 17:03:30,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:30,698 INFO L93 Difference]: Finished difference Result 9582 states and 27178 transitions. [2019-12-07 17:03:30,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:03:30,698 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 17:03:30,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:30,706 INFO L225 Difference]: With dead ends: 9582 [2019-12-07 17:03:30,706 INFO L226 Difference]: Without dead ends: 9582 [2019-12-07 17:03:30,707 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:03:30,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9582 states. [2019-12-07 17:03:30,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9582 to 7169. [2019-12-07 17:03:30,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7169 states. [2019-12-07 17:03:30,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7169 states to 7169 states and 20627 transitions. [2019-12-07 17:03:30,804 INFO L78 Accepts]: Start accepts. Automaton has 7169 states and 20627 transitions. Word has length 65 [2019-12-07 17:03:30,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:30,804 INFO L462 AbstractCegarLoop]: Abstraction has 7169 states and 20627 transitions. [2019-12-07 17:03:30,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:03:30,804 INFO L276 IsEmpty]: Start isEmpty. Operand 7169 states and 20627 transitions. [2019-12-07 17:03:30,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:30,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:30,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:30,813 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:30,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:30,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1650424373, now seen corresponding path program 3 times [2019-12-07 17:03:30,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:30,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626428969] [2019-12-07 17:03:30,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:30,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:30,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:30,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626428969] [2019-12-07 17:03:30,864 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:30,864 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:03:30,864 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [472900792] [2019-12-07 17:03:30,865 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:03:30,865 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:30,865 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:03:30,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:03:30,865 INFO L87 Difference]: Start difference. First operand 7169 states and 20627 transitions. Second operand 6 states. [2019-12-07 17:03:31,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:31,144 INFO L93 Difference]: Finished difference Result 10900 states and 31305 transitions. [2019-12-07 17:03:31,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:03:31,144 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 17:03:31,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:31,153 INFO L225 Difference]: With dead ends: 10900 [2019-12-07 17:03:31,153 INFO L226 Difference]: Without dead ends: 10900 [2019-12-07 17:03:31,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:03:31,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10900 states. [2019-12-07 17:03:31,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10900 to 7722. [2019-12-07 17:03:31,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7722 states. [2019-12-07 17:03:31,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7722 states to 7722 states and 22296 transitions. [2019-12-07 17:03:31,267 INFO L78 Accepts]: Start accepts. Automaton has 7722 states and 22296 transitions. Word has length 65 [2019-12-07 17:03:31,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:31,267 INFO L462 AbstractCegarLoop]: Abstraction has 7722 states and 22296 transitions. [2019-12-07 17:03:31,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:03:31,267 INFO L276 IsEmpty]: Start isEmpty. Operand 7722 states and 22296 transitions. [2019-12-07 17:03:31,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:31,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:31,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:31,276 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:31,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:31,277 INFO L82 PathProgramCache]: Analyzing trace with hash 2063456247, now seen corresponding path program 4 times [2019-12-07 17:03:31,277 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:31,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955012577] [2019-12-07 17:03:31,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:31,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:31,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:31,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955012577] [2019-12-07 17:03:31,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:31,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:03:31,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1855865528] [2019-12-07 17:03:31,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:03:31,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:31,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:03:31,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:03:31,363 INFO L87 Difference]: Start difference. First operand 7722 states and 22296 transitions. Second operand 8 states. [2019-12-07 17:03:31,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:31,913 INFO L93 Difference]: Finished difference Result 11708 states and 33507 transitions. [2019-12-07 17:03:31,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:03:31,913 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-07 17:03:31,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:31,923 INFO L225 Difference]: With dead ends: 11708 [2019-12-07 17:03:31,923 INFO L226 Difference]: Without dead ends: 11708 [2019-12-07 17:03:31,923 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:03:31,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11708 states. [2019-12-07 17:03:32,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11708 to 7582. [2019-12-07 17:03:32,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7582 states. [2019-12-07 17:03:32,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7582 states to 7582 states and 21896 transitions. [2019-12-07 17:03:32,040 INFO L78 Accepts]: Start accepts. Automaton has 7582 states and 21896 transitions. Word has length 65 [2019-12-07 17:03:32,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:32,040 INFO L462 AbstractCegarLoop]: Abstraction has 7582 states and 21896 transitions. [2019-12-07 17:03:32,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:03:32,040 INFO L276 IsEmpty]: Start isEmpty. Operand 7582 states and 21896 transitions. [2019-12-07 17:03:32,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:32,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:32,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:32,047 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:32,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:32,047 INFO L82 PathProgramCache]: Analyzing trace with hash 695487673, now seen corresponding path program 5 times [2019-12-07 17:03:32,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:32,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [607605981] [2019-12-07 17:03:32,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:32,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:32,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:32,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [607605981] [2019-12-07 17:03:32,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:32,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:03:32,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206911352] [2019-12-07 17:03:32,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:03:32,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:32,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:03:32,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:03:32,106 INFO L87 Difference]: Start difference. First operand 7582 states and 21896 transitions. Second operand 6 states. [2019-12-07 17:03:32,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:32,429 INFO L93 Difference]: Finished difference Result 10709 states and 30400 transitions. [2019-12-07 17:03:32,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:03:32,429 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 17:03:32,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:32,438 INFO L225 Difference]: With dead ends: 10709 [2019-12-07 17:03:32,438 INFO L226 Difference]: Without dead ends: 10709 [2019-12-07 17:03:32,438 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 17:03:32,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10709 states. [2019-12-07 17:03:32,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10709 to 7855. [2019-12-07 17:03:32,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7855 states. [2019-12-07 17:03:32,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7855 states to 7855 states and 22681 transitions. [2019-12-07 17:03:32,551 INFO L78 Accepts]: Start accepts. Automaton has 7855 states and 22681 transitions. Word has length 65 [2019-12-07 17:03:32,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:32,551 INFO L462 AbstractCegarLoop]: Abstraction has 7855 states and 22681 transitions. [2019-12-07 17:03:32,551 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:03:32,551 INFO L276 IsEmpty]: Start isEmpty. Operand 7855 states and 22681 transitions. [2019-12-07 17:03:32,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:03:32,557 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:32,557 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:32,557 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:32,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:32,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1544002871, now seen corresponding path program 6 times [2019-12-07 17:03:32,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:32,558 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038598888] [2019-12-07 17:03:32,558 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:32,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:32,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:32,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038598888] [2019-12-07 17:03:32,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:32,598 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:32,598 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303256038] [2019-12-07 17:03:32,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:32,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:32,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:32,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:32,598 INFO L87 Difference]: Start difference. First operand 7855 states and 22681 transitions. Second operand 3 states. [2019-12-07 17:03:32,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:32,639 INFO L93 Difference]: Finished difference Result 7855 states and 22680 transitions. [2019-12-07 17:03:32,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:32,639 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:03:32,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:32,646 INFO L225 Difference]: With dead ends: 7855 [2019-12-07 17:03:32,646 INFO L226 Difference]: Without dead ends: 7855 [2019-12-07 17:03:32,647 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:32,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7855 states. [2019-12-07 17:03:32,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7855 to 5188. [2019-12-07 17:03:32,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5188 states. [2019-12-07 17:03:32,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5188 states to 5188 states and 15224 transitions. [2019-12-07 17:03:32,730 INFO L78 Accepts]: Start accepts. Automaton has 5188 states and 15224 transitions. Word has length 65 [2019-12-07 17:03:32,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:32,730 INFO L462 AbstractCegarLoop]: Abstraction has 5188 states and 15224 transitions. [2019-12-07 17:03:32,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:32,730 INFO L276 IsEmpty]: Start isEmpty. Operand 5188 states and 15224 transitions. [2019-12-07 17:03:32,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:03:32,734 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:32,734 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:32,734 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:32,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:32,734 INFO L82 PathProgramCache]: Analyzing trace with hash -68576263, now seen corresponding path program 1 times [2019-12-07 17:03:32,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:32,735 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199644217] [2019-12-07 17:03:32,735 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:32,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:32,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:32,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199644217] [2019-12-07 17:03:32,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:32,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:03:32,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122695242] [2019-12-07 17:03:32,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:03:32,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:32,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:03:32,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:03:32,794 INFO L87 Difference]: Start difference. First operand 5188 states and 15224 transitions. Second operand 7 states. [2019-12-07 17:03:33,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:33,185 INFO L93 Difference]: Finished difference Result 7839 states and 22495 transitions. [2019-12-07 17:03:33,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 17:03:33,186 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 17:03:33,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:33,192 INFO L225 Difference]: With dead ends: 7839 [2019-12-07 17:03:33,192 INFO L226 Difference]: Without dead ends: 7839 [2019-12-07 17:03:33,193 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=114, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:03:33,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7839 states. [2019-12-07 17:03:33,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7839 to 5258. [2019-12-07 17:03:33,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5258 states. [2019-12-07 17:03:33,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5258 states to 5258 states and 15424 transitions. [2019-12-07 17:03:33,269 INFO L78 Accepts]: Start accepts. Automaton has 5258 states and 15424 transitions. Word has length 66 [2019-12-07 17:03:33,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:33,269 INFO L462 AbstractCegarLoop]: Abstraction has 5258 states and 15424 transitions. [2019-12-07 17:03:33,269 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:03:33,269 INFO L276 IsEmpty]: Start isEmpty. Operand 5258 states and 15424 transitions. [2019-12-07 17:03:33,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:03:33,273 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:33,273 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:33,273 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:33,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:33,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1049614349, now seen corresponding path program 2 times [2019-12-07 17:03:33,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:33,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252909169] [2019-12-07 17:03:33,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:33,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:33,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:33,465 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1252909169] [2019-12-07 17:03:33,465 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:33,465 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:03:33,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [106378466] [2019-12-07 17:03:33,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:03:33,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:33,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:03:33,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=141, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:03:33,466 INFO L87 Difference]: Start difference. First operand 5258 states and 15424 transitions. Second operand 14 states. [2019-12-07 17:03:33,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:33,949 INFO L93 Difference]: Finished difference Result 11290 states and 33395 transitions. [2019-12-07 17:03:33,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 17:03:33,949 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 66 [2019-12-07 17:03:33,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:33,956 INFO L225 Difference]: With dead ends: 11290 [2019-12-07 17:03:33,956 INFO L226 Difference]: Without dead ends: 6287 [2019-12-07 17:03:33,956 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=149, Invalid=501, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:03:33,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6287 states. [2019-12-07 17:03:34,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6287 to 4826. [2019-12-07 17:03:34,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4826 states. [2019-12-07 17:03:34,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4826 states to 4826 states and 14141 transitions. [2019-12-07 17:03:34,026 INFO L78 Accepts]: Start accepts. Automaton has 4826 states and 14141 transitions. Word has length 66 [2019-12-07 17:03:34,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:34,026 INFO L462 AbstractCegarLoop]: Abstraction has 4826 states and 14141 transitions. [2019-12-07 17:03:34,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:03:34,026 INFO L276 IsEmpty]: Start isEmpty. Operand 4826 states and 14141 transitions. [2019-12-07 17:03:34,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:03:34,029 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:34,029 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:34,030 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:34,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:34,030 INFO L82 PathProgramCache]: Analyzing trace with hash 662541241, now seen corresponding path program 3 times [2019-12-07 17:03:34,030 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:34,030 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313693170] [2019-12-07 17:03:34,030 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:34,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:34,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:34,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [313693170] [2019-12-07 17:03:34,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:34,055 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:34,055 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1062730641] [2019-12-07 17:03:34,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:34,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:34,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:34,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:34,056 INFO L87 Difference]: Start difference. First operand 4826 states and 14141 transitions. Second operand 3 states. [2019-12-07 17:03:34,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:34,076 INFO L93 Difference]: Finished difference Result 4508 states and 12898 transitions. [2019-12-07 17:03:34,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:34,077 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:03:34,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:34,082 INFO L225 Difference]: With dead ends: 4508 [2019-12-07 17:03:34,082 INFO L226 Difference]: Without dead ends: 4508 [2019-12-07 17:03:34,082 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:34,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4508 states. [2019-12-07 17:03:34,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4508 to 3688. [2019-12-07 17:03:34,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3688 states. [2019-12-07 17:03:34,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3688 states to 3688 states and 10566 transitions. [2019-12-07 17:03:34,133 INFO L78 Accepts]: Start accepts. Automaton has 3688 states and 10566 transitions. Word has length 66 [2019-12-07 17:03:34,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:34,133 INFO L462 AbstractCegarLoop]: Abstraction has 3688 states and 10566 transitions. [2019-12-07 17:03:34,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:34,133 INFO L276 IsEmpty]: Start isEmpty. Operand 3688 states and 10566 transitions. [2019-12-07 17:03:34,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:03:34,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:34,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:34,135 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:34,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:34,136 INFO L82 PathProgramCache]: Analyzing trace with hash 728190721, now seen corresponding path program 1 times [2019-12-07 17:03:34,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:34,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954515010] [2019-12-07 17:03:34,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:34,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:34,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:34,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954515010] [2019-12-07 17:03:34,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:34,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:03:34,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638287325] [2019-12-07 17:03:34,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:03:34,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:34,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:03:34,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:34,170 INFO L87 Difference]: Start difference. First operand 3688 states and 10566 transitions. Second operand 3 states. [2019-12-07 17:03:34,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:34,185 INFO L93 Difference]: Finished difference Result 3512 states and 9777 transitions. [2019-12-07 17:03:34,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:03:34,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:03:34,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:34,188 INFO L225 Difference]: With dead ends: 3512 [2019-12-07 17:03:34,188 INFO L226 Difference]: Without dead ends: 3512 [2019-12-07 17:03:34,189 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:03:34,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3512 states. [2019-12-07 17:03:34,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3512 to 3282. [2019-12-07 17:03:34,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3282 states. [2019-12-07 17:03:34,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3282 states to 3282 states and 9150 transitions. [2019-12-07 17:03:34,233 INFO L78 Accepts]: Start accepts. Automaton has 3282 states and 9150 transitions. Word has length 67 [2019-12-07 17:03:34,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:34,233 INFO L462 AbstractCegarLoop]: Abstraction has 3282 states and 9150 transitions. [2019-12-07 17:03:34,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:03:34,234 INFO L276 IsEmpty]: Start isEmpty. Operand 3282 states and 9150 transitions. [2019-12-07 17:03:34,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:03:34,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:34,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:34,236 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:34,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:34,236 INFO L82 PathProgramCache]: Analyzing trace with hash -829052917, now seen corresponding path program 1 times [2019-12-07 17:03:34,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:34,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893701748] [2019-12-07 17:03:34,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:34,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:34,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:34,419 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893701748] [2019-12-07 17:03:34,420 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:34,420 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:03:34,420 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443851687] [2019-12-07 17:03:34,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:03:34,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:34,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:03:34,421 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:03:34,421 INFO L87 Difference]: Start difference. First operand 3282 states and 9150 transitions. Second operand 15 states. [2019-12-07 17:03:35,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:35,177 INFO L93 Difference]: Finished difference Result 8775 states and 24477 transitions. [2019-12-07 17:03:35,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 17:03:35,177 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2019-12-07 17:03:35,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:35,184 INFO L225 Difference]: With dead ends: 8775 [2019-12-07 17:03:35,185 INFO L226 Difference]: Without dead ends: 8391 [2019-12-07 17:03:35,185 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 418 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=354, Invalid=1452, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 17:03:35,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8391 states. [2019-12-07 17:03:35,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8391 to 4791. [2019-12-07 17:03:35,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4791 states. [2019-12-07 17:03:35,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4791 states to 4791 states and 13295 transitions. [2019-12-07 17:03:35,260 INFO L78 Accepts]: Start accepts. Automaton has 4791 states and 13295 transitions. Word has length 68 [2019-12-07 17:03:35,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:35,261 INFO L462 AbstractCegarLoop]: Abstraction has 4791 states and 13295 transitions. [2019-12-07 17:03:35,261 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:03:35,261 INFO L276 IsEmpty]: Start isEmpty. Operand 4791 states and 13295 transitions. [2019-12-07 17:03:35,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:03:35,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:35,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:35,264 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:35,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:35,264 INFO L82 PathProgramCache]: Analyzing trace with hash -2103102647, now seen corresponding path program 2 times [2019-12-07 17:03:35,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:35,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823094189] [2019-12-07 17:03:35,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:35,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:03:35,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:03:35,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823094189] [2019-12-07 17:03:35,441 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:03:35,441 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:03:35,441 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1414275997] [2019-12-07 17:03:35,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:03:35,441 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 17:03:35,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:03:35,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:03:35,442 INFO L87 Difference]: Start difference. First operand 4791 states and 13295 transitions. Second operand 15 states. [2019-12-07 17:03:36,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:03:36,027 INFO L93 Difference]: Finished difference Result 6448 states and 17746 transitions. [2019-12-07 17:03:36,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 17:03:36,027 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2019-12-07 17:03:36,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:03:36,032 INFO L225 Difference]: With dead ends: 6448 [2019-12-07 17:03:36,032 INFO L226 Difference]: Without dead ends: 6418 [2019-12-07 17:03:36,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=289, Invalid=1043, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 17:03:36,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6418 states. [2019-12-07 17:03:36,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6418 to 4572. [2019-12-07 17:03:36,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4572 states. [2019-12-07 17:03:36,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4572 states to 4572 states and 12632 transitions. [2019-12-07 17:03:36,093 INFO L78 Accepts]: Start accepts. Automaton has 4572 states and 12632 transitions. Word has length 68 [2019-12-07 17:03:36,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:03:36,093 INFO L462 AbstractCegarLoop]: Abstraction has 4572 states and 12632 transitions. [2019-12-07 17:03:36,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:03:36,093 INFO L276 IsEmpty]: Start isEmpty. Operand 4572 states and 12632 transitions. [2019-12-07 17:03:36,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:03:36,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:03:36,096 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:03:36,096 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:03:36,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:03:36,096 INFO L82 PathProgramCache]: Analyzing trace with hash 1851838847, now seen corresponding path program 3 times [2019-12-07 17:03:36,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 17:03:36,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153022960] [2019-12-07 17:03:36,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:03:36,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:03:36,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:03:36,163 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 17:03:36,163 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:03:36,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2025~0.base_21| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2025~0.base_21|) |v_ULTIMATE.start_main_~#t2025~0.offset_17| 0)) |v_#memory_int_21|) (= v_~__unbuffered_cnt~0_140 0) (= 0 v_~z$flush_delayed~0_34) (= v_~z$r_buff1_thd0~0_308 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2025~0.base_21|) (= v_~z$w_buff1_used~0_516 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2025~0.base_21| 1)) (= v_~z$r_buff1_thd1~0_190 0) (= 0 |v_ULTIMATE.start_main_~#t2025~0.offset_17|) (= v_~z$read_delayed~0_8 0) (= v_~z$w_buff0~0_342 0) (= v_~main$tmp_guard1~0_21 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2025~0.base_21| 4) |v_#length_25|) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_206 0) (= v_~y~0_34 0) (= 0 |v_#NULL.base_4|) (= 0 v_~z$r_buff0_thd3~0_140) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff0_thd1~0_226 0) (= v_~main$tmp_guard0~0_21 0) (= v_~weak$$choice2~0_109 0) (= v_~z$mem_tmp~0_19 0) (= v_~z$r_buff0_thd0~0_374 0) (= |v_#NULL.offset_4| 0) (= 0 v_~z$r_buff1_thd3~0_196) (= v_~z$r_buff0_thd2~0_140 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2025~0.base_21|) 0) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~z$w_buff0_used~0_875 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$w_buff1~0_249 0) (= 0 v_~x~0_138) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ULTIMATE.start_main_~#t2026~0.base=|v_ULTIMATE.start_main_~#t2026~0.base_20|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_206, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t2026~0.offset=|v_ULTIMATE.start_main_~#t2026~0.offset_17|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_49|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~z$mem_tmp~0=v_~z$mem_tmp~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_516, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_52|, ULTIMATE.start_main_~#t2027~0.base=|v_ULTIMATE.start_main_~#t2027~0.base_20|, ~z$flush_delayed~0=v_~z$flush_delayed~0_34, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_190, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_140, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~x~0=v_~x~0_138, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~z$w_buff1~0=v_~z$w_buff1~0_249, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_121|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_308, ULTIMATE.start_main_~#t2025~0.offset=|v_ULTIMATE.start_main_~#t2025~0.offset_17|, ~y~0=v_~y~0_34, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_140, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_875, ~z$w_buff0~0=v_~z$w_buff0~0_342, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_196, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t2025~0.base=|v_ULTIMATE.start_main_~#t2025~0.base_21|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_109, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_226, ULTIMATE.start_main_~#t2027~0.offset=|v_ULTIMATE.start_main_~#t2027~0.offset_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2026~0.base, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2026~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2027~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t2025~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t2025~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t2027~0.offset] because there is no mapped edge [2019-12-07 17:03:36,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L805-1-->L807: Formula: (and (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2026~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2026~0.base_12|) |v_ULTIMATE.start_main_~#t2026~0.offset_11| 1))) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2026~0.base_12| 4)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2026~0.base_12|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t2026~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t2026~0.offset_11|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2026~0.base_12| 1) |v_#valid_34|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2026~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2026~0.base=|v_ULTIMATE.start_main_~#t2026~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2026~0.offset=|v_ULTIMATE.start_main_~#t2026~0.offset_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2026~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2026~0.offset, #length] because there is no mapped edge [2019-12-07 17:03:36,166 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P0ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_226 v_~z$w_buff1_used~0_114) (= v_P0Thread1of1ForFork0_~arg.base_20 |v_P0Thread1of1ForFork0_#in~arg.base_22|) (= 2 v_~z$w_buff0~0_55) (= v_~z$w_buff0~0_56 v_~z$w_buff1~0_53) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (= (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_225 256))) (not (= 0 (mod v_~z$w_buff1_used~0_114 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 0)) (= v_P0Thread1of1ForFork0_~arg.offset_20 |v_P0Thread1of1ForFork0_#in~arg.offset_22|) (= v_~z$w_buff0_used~0_225 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_226, ~z$w_buff0~0=v_~z$w_buff0~0_56, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_225, ~z$w_buff0~0=v_~z$w_buff0~0_55, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_114, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|, ~z$w_buff1~0=v_~z$w_buff1~0_53, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_20, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_20} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:03:36,167 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2027~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2027~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2027~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2027~0.base_9|) |v_ULTIMATE.start_main_~#t2027~0.offset_8| 2))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2027~0.base_9| 4) |v_#length_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2027~0.base_9|)) (= 0 |v_ULTIMATE.start_main_~#t2027~0.offset_8|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2027~0.base_9| 1) |v_#valid_27|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2027~0.base=|v_ULTIMATE.start_main_~#t2027~0.base_9|, ULTIMATE.start_main_~#t2027~0.offset=|v_ULTIMATE.start_main_~#t2027~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2027~0.base, ULTIMATE.start_main_~#t2027~0.offset] because there is no mapped edge [2019-12-07 17:03:36,167 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L743-->L743-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1200208163 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1200208163 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1200208163| 0)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1200208163 |P0Thread1of1ForFork0_#t~ite5_Out-1200208163|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1200208163, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1200208163} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1200208163|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1200208163, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1200208163} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:03:36,168 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L744-->L744-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In1328825479 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1328825479 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1328825479 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1328825479 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1328825479| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1328825479 |P0Thread1of1ForFork0_#t~ite6_Out1328825479|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1328825479, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1328825479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1328825479, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1328825479} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1328825479|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328825479, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1328825479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1328825479, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1328825479} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:03:36,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-41014310 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-41014310 ~z$r_buff0_thd1~0_Out-41014310)) (.cse2 (= (mod ~z$w_buff0_used~0_In-41014310 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out-41014310 0) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-41014310, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-41014310} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-41014310, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-41014310|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-41014310} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:03:36,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L746-->L746-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1305240713 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1305240713 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1305240713 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1305240713 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1305240713| ~z$r_buff1_thd1~0_In-1305240713)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-1305240713|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1305240713, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1305240713, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1305240713, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1305240713} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1305240713, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1305240713|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1305240713, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1305240713, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1305240713} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:03:36,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L746-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:03:36,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L762-2-->L762-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1996586475| |P1Thread1of1ForFork1_#t~ite9_Out1996586475|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1996586475 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1996586475 256)))) (or (and (= ~z~0_In1996586475 |P1Thread1of1ForFork1_#t~ite9_Out1996586475|) .cse0 (or .cse1 .cse2)) (and .cse0 (= ~z$w_buff1~0_In1996586475 |P1Thread1of1ForFork1_#t~ite9_Out1996586475|) (not .cse1) (not .cse2)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1996586475, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1996586475, ~z$w_buff1~0=~z$w_buff1~0_In1996586475, ~z~0=~z~0_In1996586475} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1996586475|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1996586475, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1996586475, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1996586475|, ~z$w_buff1~0=~z$w_buff1~0_In1996586475, ~z~0=~z~0_In1996586475} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:03:36,169 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1669820522 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1669820522 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1669820522| ~z$w_buff1~0_In-1669820522)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1669820522| ~z~0_In-1669820522) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1669820522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1669820522, ~z$w_buff1~0=~z$w_buff1~0_In-1669820522, ~z~0=~z~0_In-1669820522} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1669820522|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1669820522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1669820522, ~z$w_buff1~0=~z$w_buff1~0_In-1669820522, ~z~0=~z~0_In-1669820522} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:03:36,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_20) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_20, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:03:36,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1797287797 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1797287797 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite17_Out1797287797| ~z$w_buff0_used~0_In1797287797) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1797287797|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1797287797, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1797287797} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1797287797, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1797287797, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1797287797|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:03:36,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-994691513 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-994691513 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-994691513 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-994691513 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite18_Out-994691513| ~z$w_buff1_used~0_In-994691513) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-994691513| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-994691513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-994691513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-994691513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-994691513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-994691513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-994691513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-994691513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-994691513, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-994691513|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:03:36,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L785-->L785-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1696183501 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1696183501 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-1696183501 |P2Thread1of1ForFork2_#t~ite19_Out-1696183501|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1696183501|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1696183501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1696183501} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1696183501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1696183501, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1696183501|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:03:36,170 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1077227679 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1077227679 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1077227679 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1077227679 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1077227679| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out-1077227679| ~z$r_buff1_thd3~0_In-1077227679) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1077227679, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1077227679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1077227679, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1077227679} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1077227679, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1077227679|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1077227679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1077227679, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1077227679} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:03:36,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork2_#t~ite20_30| v_~z$r_buff1_thd3~0_67)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_29|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_67, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:03:36,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2143732912 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2143732912 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2143732912| ~z$w_buff0_used~0_In2143732912)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2143732912| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2143732912, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2143732912} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2143732912, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2143732912|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2143732912} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:03:36,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L764-->L764-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1976259077 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1976259077 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1976259077 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1976259077 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1976259077| ~z$w_buff1_used~0_In-1976259077)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1976259077| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976259077, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1976259077, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1976259077, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1976259077} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976259077, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1976259077, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1976259077, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1976259077|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1976259077} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:03:36,171 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In2037784181 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In2037784181 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out2037784181|) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In2037784181 |P1Thread1of1ForFork1_#t~ite13_Out2037784181|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2037784181, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2037784181} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2037784181, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2037784181|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2037784181} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:03:36,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L766-->L766-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-980421816 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-980421816 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-980421816 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-980421816 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-980421816| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-980421816| ~z$r_buff1_thd2~0_In-980421816) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-980421816, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-980421816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-980421816, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-980421816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-980421816, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-980421816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-980421816, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-980421816|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-980421816} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:03:36,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork1_#t~ite14_30| v_~z$r_buff1_thd2~0_84) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_84, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:03:36,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L809-1-->L815: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:03:36,172 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L815-2-->L815-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite24_Out587091137| |ULTIMATE.start_main_#t~ite25_Out587091137|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In587091137 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In587091137 256)))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out587091137| ~z$w_buff1~0_In587091137) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out587091137| ~z~0_In587091137)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In587091137, ~z$w_buff1_used~0=~z$w_buff1_used~0_In587091137, ~z$w_buff1~0=~z$w_buff1~0_In587091137, ~z~0=~z~0_In587091137} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In587091137, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out587091137|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In587091137, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out587091137|, ~z$w_buff1~0=~z$w_buff1~0_In587091137, ~z~0=~z~0_In587091137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:03:36,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1750260021 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1750260021 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-1750260021| 0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1750260021 |ULTIMATE.start_main_#t~ite26_Out-1750260021|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1750260021, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750260021} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1750260021, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750260021, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1750260021|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:03:36,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L817-->L817-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In929674980 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In929674980 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In929674980 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In929674980 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out929674980|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In929674980 |ULTIMATE.start_main_#t~ite27_Out929674980|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In929674980, ~z$w_buff0_used~0=~z$w_buff0_used~0_In929674980, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In929674980, ~z$w_buff1_used~0=~z$w_buff1_used~0_In929674980} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In929674980, ~z$w_buff0_used~0=~z$w_buff0_used~0_In929674980, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In929674980, ~z$w_buff1_used~0=~z$w_buff1_used~0_In929674980, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out929674980|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:03:36,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In869228053 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In869228053 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out869228053|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In869228053 |ULTIMATE.start_main_#t~ite28_Out869228053|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869228053, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869228053} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869228053, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out869228053|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869228053} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:03:36,173 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-2081649921 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-2081649921 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2081649921 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2081649921 256)))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-2081649921| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out-2081649921| ~z$r_buff1_thd0~0_In-2081649921)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2081649921, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2081649921, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2081649921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2081649921} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2081649921, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-2081649921|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2081649921, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2081649921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2081649921} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:03:36,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L831-->L832: Formula: (and (= v_~z$r_buff0_thd0~0_103 v_~z$r_buff0_thd0~0_102) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_103, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_102, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:03:36,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L834-->L837-1: Formula: (and (= v_~z$mem_tmp~0_11 v_~z~0_133) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= 0 (mod v_~z$flush_delayed~0_21 256))) (= 0 v_~z$flush_delayed~0_20)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_11, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_21} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_20, ~z~0=v_~z~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:03:36,176 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:03:36,227 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:03:36 BasicIcfg [2019-12-07 17:03:36,227 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:03:36,227 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:03:36,227 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:03:36,228 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:03:36,228 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:02:29" (3/4) ... [2019-12-07 17:03:36,230 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:03:36,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2025~0.base_21| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2025~0.base_21|) |v_ULTIMATE.start_main_~#t2025~0.offset_17| 0)) |v_#memory_int_21|) (= v_~__unbuffered_cnt~0_140 0) (= 0 v_~z$flush_delayed~0_34) (= v_~z$r_buff1_thd0~0_308 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2025~0.base_21|) (= v_~z$w_buff1_used~0_516 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2025~0.base_21| 1)) (= v_~z$r_buff1_thd1~0_190 0) (= 0 |v_ULTIMATE.start_main_~#t2025~0.offset_17|) (= v_~z$read_delayed~0_8 0) (= v_~z$w_buff0~0_342 0) (= v_~main$tmp_guard1~0_21 0) (= v_~z$read_delayed_var~0.offset_7 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2025~0.base_21| 4) |v_#length_25|) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_206 0) (= v_~y~0_34 0) (= 0 |v_#NULL.base_4|) (= 0 v_~z$r_buff0_thd3~0_140) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff0_thd1~0_226 0) (= v_~main$tmp_guard0~0_21 0) (= v_~weak$$choice2~0_109 0) (= v_~z$mem_tmp~0_19 0) (= v_~z$r_buff0_thd0~0_374 0) (= |v_#NULL.offset_4| 0) (= 0 v_~z$r_buff1_thd3~0_196) (= v_~z$r_buff0_thd2~0_140 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2025~0.base_21|) 0) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~z$w_buff0_used~0_875 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$w_buff1~0_249 0) (= 0 v_~x~0_138) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ULTIMATE.start_main_~#t2026~0.base=|v_ULTIMATE.start_main_~#t2026~0.base_20|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_206, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, ULTIMATE.start_main_~#t2026~0.offset=|v_ULTIMATE.start_main_~#t2026~0.offset_17|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_49|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~z$mem_tmp~0=v_~z$mem_tmp~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_516, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_52|, ULTIMATE.start_main_~#t2027~0.base=|v_ULTIMATE.start_main_~#t2027~0.base_20|, ~z$flush_delayed~0=v_~z$flush_delayed~0_34, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_190, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_140, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ~x~0=v_~x~0_138, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~z$w_buff1~0=v_~z$w_buff1~0_249, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_121|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_308, ULTIMATE.start_main_~#t2025~0.offset=|v_ULTIMATE.start_main_~#t2025~0.offset_17|, ~y~0=v_~y~0_34, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_140, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_875, ~z$w_buff0~0=v_~z$w_buff0~0_342, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_196, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t2025~0.base=|v_ULTIMATE.start_main_~#t2025~0.base_21|, ~z~0=v_~z~0_182, ~weak$$choice2~0=v_~weak$$choice2~0_109, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_226, ULTIMATE.start_main_~#t2027~0.offset=|v_ULTIMATE.start_main_~#t2027~0.offset_16|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2026~0.base, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2026~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2027~0.base, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t2025~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t2025~0.base, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ULTIMATE.start_main_~#t2027~0.offset] because there is no mapped edge [2019-12-07 17:03:36,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L805-1-->L807: Formula: (and (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2026~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2026~0.base_12|) |v_ULTIMATE.start_main_~#t2026~0.offset_11| 1))) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2026~0.base_12| 4)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2026~0.base_12|) 0) (not (= 0 |v_ULTIMATE.start_main_~#t2026~0.base_12|)) (= 0 |v_ULTIMATE.start_main_~#t2026~0.offset_11|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2026~0.base_12| 1) |v_#valid_34|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2026~0.base_12|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2026~0.base=|v_ULTIMATE.start_main_~#t2026~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2026~0.offset=|v_ULTIMATE.start_main_~#t2026~0.offset_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2026~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2026~0.offset, #length] because there is no mapped edge [2019-12-07 17:03:36,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P0ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_226 v_~z$w_buff1_used~0_114) (= v_P0Thread1of1ForFork0_~arg.base_20 |v_P0Thread1of1ForFork0_#in~arg.base_22|) (= 2 v_~z$w_buff0~0_55) (= v_~z$w_buff0~0_56 v_~z$w_buff1~0_53) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (= (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_225 256))) (not (= 0 (mod v_~z$w_buff1_used~0_114 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 0)) (= v_P0Thread1of1ForFork0_~arg.offset_20 |v_P0Thread1of1ForFork0_#in~arg.offset_22|) (= v_~z$w_buff0_used~0_225 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_226, ~z$w_buff0~0=v_~z$w_buff0~0_56, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_225, ~z$w_buff0~0=v_~z$w_buff0~0_55, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_114, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|, ~z$w_buff1~0=v_~z$w_buff1~0_53, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_20, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_20} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:03:36,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2027~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2027~0.base_9|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2027~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2027~0.base_9|) |v_ULTIMATE.start_main_~#t2027~0.offset_8| 2))) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2027~0.base_9| 4) |v_#length_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2027~0.base_9|)) (= 0 |v_ULTIMATE.start_main_~#t2027~0.offset_8|) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2027~0.base_9| 1) |v_#valid_27|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2027~0.base=|v_ULTIMATE.start_main_~#t2027~0.base_9|, ULTIMATE.start_main_~#t2027~0.offset=|v_ULTIMATE.start_main_~#t2027~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2027~0.base, ULTIMATE.start_main_~#t2027~0.offset] because there is no mapped edge [2019-12-07 17:03:36,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L743-->L743-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1200208163 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In-1200208163 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1200208163| 0)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1200208163 |P0Thread1of1ForFork0_#t~ite5_Out-1200208163|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1200208163, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1200208163} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1200208163|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1200208163, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1200208163} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:03:36,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L744-->L744-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd1~0_In1328825479 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In1328825479 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1328825479 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1328825479 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1328825479| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$w_buff1_used~0_In1328825479 |P0Thread1of1ForFork0_#t~ite6_Out1328825479|) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1328825479, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1328825479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1328825479, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1328825479} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1328825479|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1328825479, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1328825479, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1328825479, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1328825479} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:03:36,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L745-->L746: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In-41014310 256) 0)) (.cse0 (= ~z$r_buff0_thd1~0_In-41014310 ~z$r_buff0_thd1~0_Out-41014310)) (.cse2 (= (mod ~z$w_buff0_used~0_In-41014310 256) 0))) (or (and .cse0 .cse1) (and (not .cse1) (= ~z$r_buff0_thd1~0_Out-41014310 0) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-41014310, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-41014310} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-41014310, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-41014310|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-41014310} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L746-->L746-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1305240713 256))) (.cse3 (= (mod ~z$r_buff0_thd1~0_In-1305240713 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1305240713 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1305240713 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1305240713| ~z$r_buff1_thd1~0_In-1305240713)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-1305240713|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1305240713, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1305240713, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1305240713, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1305240713} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1305240713, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1305240713|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1305240713, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1305240713, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1305240713} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L746-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L762-2-->L762-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1996586475| |P1Thread1of1ForFork1_#t~ite9_Out1996586475|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1996586475 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1996586475 256)))) (or (and (= ~z~0_In1996586475 |P1Thread1of1ForFork1_#t~ite9_Out1996586475|) .cse0 (or .cse1 .cse2)) (and .cse0 (= ~z$w_buff1~0_In1996586475 |P1Thread1of1ForFork1_#t~ite9_Out1996586475|) (not .cse1) (not .cse2)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1996586475, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1996586475, ~z$w_buff1~0=~z$w_buff1~0_In1996586475, ~z~0=~z~0_In1996586475} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1996586475|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1996586475, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1996586475, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1996586475|, ~z$w_buff1~0=~z$w_buff1~0_In1996586475, ~z~0=~z~0_In1996586475} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd3~0_In-1669820522 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-1669820522 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1669820522| ~z$w_buff1~0_In-1669820522)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1669820522| ~z~0_In-1669820522) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1669820522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1669820522, ~z$w_buff1~0=~z$w_buff1~0_In-1669820522, ~z~0=~z~0_In-1669820522} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1669820522|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1669820522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1669820522, ~z$w_buff1~0=~z$w_buff1~0_In-1669820522, ~z~0=~z~0_In-1669820522} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_20) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_20, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:03:36,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In1797287797 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1797287797 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite17_Out1797287797| ~z$w_buff0_used~0_In1797287797) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1797287797|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1797287797, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1797287797} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1797287797, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1797287797, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1797287797|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:03:36,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In-994691513 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd3~0_In-994691513 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-994691513 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-994691513 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite18_Out-994691513| ~z$w_buff1_used~0_In-994691513) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-994691513| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-994691513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-994691513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-994691513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-994691513} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-994691513, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-994691513, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-994691513, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-994691513, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-994691513|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:03:36,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L785-->L785-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1696183501 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1696183501 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-1696183501 |P2Thread1of1ForFork2_#t~ite19_Out-1696183501|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-1696183501|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1696183501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1696183501} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1696183501, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1696183501, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1696183501|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:03:36,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L786-->L786-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1077227679 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1077227679 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1077227679 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1077227679 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1077227679| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out-1077227679| ~z$r_buff1_thd3~0_In-1077227679) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1077227679, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1077227679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1077227679, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1077227679} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1077227679, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1077227679|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1077227679, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1077227679, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1077227679} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:03:36,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork2_#t~ite20_30| v_~z$r_buff1_thd3~0_67)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_29|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_67, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:03:36,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2143732912 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In2143732912 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2143732912| ~z$w_buff0_used~0_In2143732912)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out2143732912| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2143732912, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2143732912} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2143732912, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out2143732912|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2143732912} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:03:36,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L764-->L764-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-1976259077 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-1976259077 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd2~0_In-1976259077 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-1976259077 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1976259077| ~z$w_buff1_used~0_In-1976259077)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1976259077| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976259077, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1976259077, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1976259077, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1976259077} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1976259077, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1976259077, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1976259077, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1976259077|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1976259077} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:03:36,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In2037784181 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In2037784181 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out2037784181|) (not .cse1)) (and (= ~z$r_buff0_thd2~0_In2037784181 |P1Thread1of1ForFork1_#t~ite13_Out2037784181|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2037784181, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2037784181} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2037784181, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2037784181|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2037784181} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:03:36,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L766-->L766-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-980421816 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-980421816 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-980421816 256))) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-980421816 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-980421816| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-980421816| ~z$r_buff1_thd2~0_In-980421816) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-980421816, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-980421816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-980421816, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-980421816} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-980421816, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-980421816, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-980421816, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-980421816|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-980421816} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:03:36,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork1_#t~ite14_30| v_~z$r_buff1_thd2~0_84) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_84, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:03:36,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L809-1-->L815: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:03:36,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L815-2-->L815-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite24_Out587091137| |ULTIMATE.start_main_#t~ite25_Out587091137|)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In587091137 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In587091137 256)))) (or (and .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~ite24_Out587091137| ~z$w_buff1~0_In587091137) (not .cse2)) (and .cse0 (or .cse2 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out587091137| ~z~0_In587091137)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In587091137, ~z$w_buff1_used~0=~z$w_buff1_used~0_In587091137, ~z$w_buff1~0=~z$w_buff1~0_In587091137, ~z~0=~z~0_In587091137} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In587091137, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out587091137|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In587091137, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out587091137|, ~z$w_buff1~0=~z$w_buff1~0_In587091137, ~z~0=~z~0_In587091137} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:03:36,236 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L816-->L816-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1750260021 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1750260021 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-1750260021| 0) (not .cse1)) (and (= ~z$w_buff0_used~0_In-1750260021 |ULTIMATE.start_main_#t~ite26_Out-1750260021|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1750260021, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750260021} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1750260021, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1750260021, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1750260021|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:03:36,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L817-->L817-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In929674980 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In929674980 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In929674980 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In929674980 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite27_Out929674980|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In929674980 |ULTIMATE.start_main_#t~ite27_Out929674980|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In929674980, ~z$w_buff0_used~0=~z$w_buff0_used~0_In929674980, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In929674980, ~z$w_buff1_used~0=~z$w_buff1_used~0_In929674980} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In929674980, ~z$w_buff0_used~0=~z$w_buff0_used~0_In929674980, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In929674980, ~z$w_buff1_used~0=~z$w_buff1_used~0_In929674980, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out929674980|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:03:36,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In869228053 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In869228053 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out869228053|)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In869228053 |ULTIMATE.start_main_#t~ite28_Out869228053|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869228053, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869228053} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In869228053, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out869228053|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In869228053} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:03:36,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-2081649921 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-2081649921 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-2081649921 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-2081649921 256)))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out-2081649921| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out-2081649921| ~z$r_buff1_thd0~0_In-2081649921)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2081649921, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2081649921, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2081649921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2081649921} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-2081649921, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-2081649921|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2081649921, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-2081649921, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2081649921} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:03:36,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L831-->L832: Formula: (and (= v_~z$r_buff0_thd0~0_103 v_~z$r_buff0_thd0~0_102) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_103, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_102, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:03:36,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L834-->L837-1: Formula: (and (= v_~z$mem_tmp~0_11 v_~z~0_133) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= 0 (mod v_~z$flush_delayed~0_21 256))) (= 0 v_~z$flush_delayed~0_20)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_11, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_21} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_20, ~z~0=v_~z~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:03:36,240 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:03:36,293 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_2eebad5e-e30c-4fc5-8850-0bb0329c3a9f/bin/utaipan/witness.graphml [2019-12-07 17:03:36,293 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:03:36,294 INFO L168 Benchmark]: Toolchain (without parser) took 68001.58 ms. Allocated memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: 5.8 GB). Free memory was 939.4 MB in the beginning and 3.8 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.9 GB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,295 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:03:36,295 INFO L168 Benchmark]: CACSL2BoogieTranslator took 389.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -125.3 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,295 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,296 INFO L168 Benchmark]: Boogie Preprocessor took 25.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,296 INFO L168 Benchmark]: RCFGBuilder took 405.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,296 INFO L168 Benchmark]: TraceAbstraction took 67071.52 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 996.7 MB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,296 INFO L168 Benchmark]: Witness Printer took 66.06 ms. Allocated memory is still 6.8 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 58.8 MB). Peak memory consumption was 58.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:03:36,298 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 389.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -125.3 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.33 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 405.51 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 51.9 MB). Peak memory consumption was 51.9 MB. Max. memory is 11.5 GB. * TraceAbstraction took 67071.52 ms. Allocated memory was 1.1 GB in the beginning and 6.8 GB in the end (delta: 5.7 GB). Free memory was 996.7 MB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. * Witness Printer took 66.06 ms. Allocated memory is still 6.8 GB. Free memory was 3.9 GB in the beginning and 3.8 GB in the end (delta: 58.8 MB). Peak memory consumption was 58.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 174 ProgramPointsBefore, 93 ProgramPointsAfterwards, 211 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 8 FixpointIterations, 31 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 30 ChoiceCompositions, 6114 VarBasedMoverChecksPositive, 254 VarBasedMoverChecksNegative, 80 SemBasedMoverChecksPositive, 255 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 86146 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t2025, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L807] FCALL, FORK 0 pthread_create(&t2026, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L809] FCALL, FORK 0 pthread_create(&t2027, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 z = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z)=2, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L782] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z)=2, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L783] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L784] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L785] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L815] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L815] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L816] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L817] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L818] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L819] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 z$flush_delayed = weak$$choice2 [L825] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L827] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L828] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L829] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 66.9s, OverallIterations: 24, TraceHistogramMax: 1, AutomataDifference: 11.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3696 SDtfs, 3936 SDslu, 9092 SDs, 0 SdLazy, 5739 SolverSat, 296 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 254 GetRequests, 49 SyntacticMatches, 19 SemanticMatches, 186 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 854 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=188328occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 38.2s AutomataMinimizationTime, 23 MinimizatonAttempts, 135316 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 1154 NumberOfCodeBlocks, 1154 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1063 ConstructedInterpolants, 0 QuantifiedInterpolants, 239986 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 23 InterpolantComputations, 23 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...