./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 615be391e601ddc66bb9e1155ffa2f81c07adb51 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:15:04,168 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:15:04,169 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:15:04,177 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:15:04,177 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:15:04,177 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:15:04,178 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:15:04,180 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:15:04,181 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:15:04,181 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:15:04,182 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:15:04,183 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:15:04,183 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:15:04,184 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:15:04,184 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:15:04,185 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:15:04,186 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:15:04,186 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:15:04,188 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:15:04,189 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:15:04,190 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:15:04,191 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:15:04,192 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:15:04,192 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:15:04,194 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:15:04,194 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:15:04,194 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:15:04,195 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:15:04,195 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:15:04,196 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:15:04,196 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:15:04,196 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:15:04,197 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:15:04,197 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:15:04,198 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:15:04,198 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:15:04,198 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:15:04,198 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:15:04,199 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:15:04,199 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:15:04,199 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:15:04,200 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:15:04,210 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:15:04,210 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:15:04,210 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:15:04,210 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:15:04,210 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:15:04,211 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:15:04,211 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:15:04,212 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:15:04,212 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:15:04,213 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:15:04,213 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:15:04,214 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:15:04,214 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:15:04,215 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:15:04,215 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 615be391e601ddc66bb9e1155ffa2f81c07adb51 [2019-12-07 11:15:04,315 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:15:04,323 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:15:04,326 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:15:04,328 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:15:04,328 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:15:04,329 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i [2019-12-07 11:15:04,372 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/data/28f632fba/d29d7737990d465780797e375a76f095/FLAG48f7be1d3 [2019-12-07 11:15:04,835 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:15:04,836 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i [2019-12-07 11:15:04,847 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/data/28f632fba/d29d7737990d465780797e375a76f095/FLAG48f7be1d3 [2019-12-07 11:15:04,855 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/data/28f632fba/d29d7737990d465780797e375a76f095 [2019-12-07 11:15:04,857 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:15:04,858 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:15:04,859 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:15:04,859 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:15:04,861 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:15:04,861 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:15:04" (1/1) ... [2019-12-07 11:15:04,863 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:04, skipping insertion in model container [2019-12-07 11:15:04,863 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:15:04" (1/1) ... [2019-12-07 11:15:04,867 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:15:04,895 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:15:05,148 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:15:05,155 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:15:05,194 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:15:05,239 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:15:05,239 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05 WrapperNode [2019-12-07 11:15:05,239 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:15:05,240 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:15:05,240 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:15:05,240 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:15:05,245 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,258 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,275 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:15:05,276 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:15:05,276 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:15:05,276 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:15:05,282 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,282 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,285 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,285 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,292 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,294 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,296 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... [2019-12-07 11:15:05,299 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:15:05,299 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:15:05,300 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:15:05,300 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:15:05,300 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:15:05,339 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:15:05,339 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:15:05,339 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:15:05,340 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:15:05,340 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:15:05,340 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:15:05,340 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:15:05,340 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:15:05,341 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:15:05,681 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:15:05,682 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:15:05,682 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:15:05 BoogieIcfgContainer [2019-12-07 11:15:05,683 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:15:05,683 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:15:05,683 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:15:05,685 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:15:05,685 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:15:04" (1/3) ... [2019-12-07 11:15:05,686 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51c27106 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:15:05, skipping insertion in model container [2019-12-07 11:15:05,686 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:15:05" (2/3) ... [2019-12-07 11:15:05,686 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@51c27106 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:15:05, skipping insertion in model container [2019-12-07 11:15:05,686 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:15:05" (3/3) ... [2019-12-07 11:15:05,687 INFO L109 eAbstractionObserver]: Analyzing ICFG safe013_power.oepc.i [2019-12-07 11:15:05,693 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:15:05,693 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:15:05,698 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:15:05,698 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,722 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,729 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,730 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,731 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,732 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,733 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,734 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,735 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,736 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,737 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,738 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,739 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,740 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,741 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,742 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,743 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:15:05,754 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:15:05,767 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:15:05,767 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:15:05,767 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:15:05,767 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:15:05,767 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:15:05,767 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:15:05,767 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:15:05,767 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:15:05,778 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 11:15:05,779 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 11:15:05,831 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 11:15:05,831 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:15:05,841 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:15:05,855 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 11:15:05,883 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 11:15:05,883 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:15:05,888 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:15:05,904 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 11:15:05,904 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:15:08,872 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 11:15:09,018 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66094 [2019-12-07 11:15:09,018 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 11:15:09,020 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 11:15:18,511 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 11:15:18,513 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 11:15:18,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 11:15:18,517 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:18,517 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 11:15:18,517 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:18,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:18,521 INFO L82 PathProgramCache]: Analyzing trace with hash 794637732, now seen corresponding path program 1 times [2019-12-07 11:15:18,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:18,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915931238] [2019-12-07 11:15:18,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:18,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:18,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:18,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915931238] [2019-12-07 11:15:18,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:18,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:15:18,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256700768] [2019-12-07 11:15:18,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:18,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:18,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:18,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:18,678 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 11:15:19,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:19,218 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 11:15:19,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:19,220 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 11:15:19,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:19,579 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 11:15:19,579 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 11:15:19,581 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:22,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 11:15:23,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 11:15:23,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 11:15:23,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 11:15:23,738 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 11:15:23,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:23,738 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 11:15:23,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:23,739 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 11:15:23,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:15:23,747 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:23,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:23,747 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:23,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:23,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1795694344, now seen corresponding path program 1 times [2019-12-07 11:15:23,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:23,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191588559] [2019-12-07 11:15:23,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:23,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:23,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:23,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191588559] [2019-12-07 11:15:23,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:23,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:23,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [725425538] [2019-12-07 11:15:23,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:23,827 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:23,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:23,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:23,828 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 11:15:24,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:24,524 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 11:15:24,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:24,525 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:15:24,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:24,881 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 11:15:24,881 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 11:15:24,882 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:29,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 11:15:31,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 11:15:31,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 11:15:32,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 11:15:32,132 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 11:15:32,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:32,133 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 11:15:32,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:32,133 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 11:15:32,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:15:32,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:32,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:32,136 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:32,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:32,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1307118492, now seen corresponding path program 1 times [2019-12-07 11:15:32,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:32,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875631875] [2019-12-07 11:15:32,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:32,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:32,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:32,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875631875] [2019-12-07 11:15:32,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:32,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:32,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787726229] [2019-12-07 11:15:32,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:32,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:32,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:32,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:32,190 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 11:15:32,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:32,317 INFO L93 Difference]: Finished difference Result 36525 states and 128382 transitions. [2019-12-07 11:15:32,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:15:32,318 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:15:32,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:32,373 INFO L225 Difference]: With dead ends: 36525 [2019-12-07 11:15:32,373 INFO L226 Difference]: Without dead ends: 28771 [2019-12-07 11:15:32,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:32,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28771 states. [2019-12-07 11:15:32,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28771 to 28723. [2019-12-07 11:15:32,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28723 states. [2019-12-07 11:15:32,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28723 states to 28723 states and 97157 transitions. [2019-12-07 11:15:32,868 INFO L78 Accepts]: Start accepts. Automaton has 28723 states and 97157 transitions. Word has length 13 [2019-12-07 11:15:32,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:32,868 INFO L462 AbstractCegarLoop]: Abstraction has 28723 states and 97157 transitions. [2019-12-07 11:15:32,868 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:32,869 INFO L276 IsEmpty]: Start isEmpty. Operand 28723 states and 97157 transitions. [2019-12-07 11:15:32,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:15:32,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:32,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:32,870 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:32,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:32,870 INFO L82 PathProgramCache]: Analyzing trace with hash 2137171342, now seen corresponding path program 1 times [2019-12-07 11:15:32,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:32,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488848400] [2019-12-07 11:15:32,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:32,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:32,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:32,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488848400] [2019-12-07 11:15:32,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:32,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:32,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1284984704] [2019-12-07 11:15:32,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:32,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:32,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:32,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:32,899 INFO L87 Difference]: Start difference. First operand 28723 states and 97157 transitions. Second operand 3 states. [2019-12-07 11:15:33,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:33,044 INFO L93 Difference]: Finished difference Result 42081 states and 141205 transitions. [2019-12-07 11:15:33,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:33,045 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 11:15:33,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:33,110 INFO L225 Difference]: With dead ends: 42081 [2019-12-07 11:15:33,110 INFO L226 Difference]: Without dead ends: 42081 [2019-12-07 11:15:33,110 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:33,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42081 states. [2019-12-07 11:15:33,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42081 to 32226. [2019-12-07 11:15:33,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32226 states. [2019-12-07 11:15:33,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32226 states to 32226 states and 107932 transitions. [2019-12-07 11:15:33,751 INFO L78 Accepts]: Start accepts. Automaton has 32226 states and 107932 transitions. Word has length 14 [2019-12-07 11:15:33,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:33,751 INFO L462 AbstractCegarLoop]: Abstraction has 32226 states and 107932 transitions. [2019-12-07 11:15:33,751 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:33,751 INFO L276 IsEmpty]: Start isEmpty. Operand 32226 states and 107932 transitions. [2019-12-07 11:15:33,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:15:33,752 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:33,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:33,753 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:33,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:33,753 INFO L82 PathProgramCache]: Analyzing trace with hash 2137037670, now seen corresponding path program 1 times [2019-12-07 11:15:33,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:33,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [429054847] [2019-12-07 11:15:33,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:33,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:33,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:33,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [429054847] [2019-12-07 11:15:33,787 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:33,787 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:33,787 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909296358] [2019-12-07 11:15:33,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:33,788 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:33,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:33,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:33,788 INFO L87 Difference]: Start difference. First operand 32226 states and 107932 transitions. Second operand 4 states. [2019-12-07 11:15:34,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:34,005 INFO L93 Difference]: Finished difference Result 39611 states and 130690 transitions. [2019-12-07 11:15:34,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:34,006 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 11:15:34,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:34,064 INFO L225 Difference]: With dead ends: 39611 [2019-12-07 11:15:34,064 INFO L226 Difference]: Without dead ends: 39522 [2019-12-07 11:15:34,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:34,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39522 states. [2019-12-07 11:15:34,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39522 to 34698. [2019-12-07 11:15:34,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34698 states. [2019-12-07 11:15:34,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34698 states to 34698 states and 115782 transitions. [2019-12-07 11:15:34,897 INFO L78 Accepts]: Start accepts. Automaton has 34698 states and 115782 transitions. Word has length 14 [2019-12-07 11:15:34,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:34,898 INFO L462 AbstractCegarLoop]: Abstraction has 34698 states and 115782 transitions. [2019-12-07 11:15:34,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:34,898 INFO L276 IsEmpty]: Start isEmpty. Operand 34698 states and 115782 transitions. [2019-12-07 11:15:34,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:15:34,899 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:34,899 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:34,899 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:34,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:34,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1997758702, now seen corresponding path program 1 times [2019-12-07 11:15:34,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:34,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504974098] [2019-12-07 11:15:34,900 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:34,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:34,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:34,936 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504974098] [2019-12-07 11:15:34,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:34,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:34,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932414354] [2019-12-07 11:15:34,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:15:34,936 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:34,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:15:34,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:15:34,937 INFO L87 Difference]: Start difference. First operand 34698 states and 115782 transitions. Second operand 4 states. [2019-12-07 11:15:35,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:35,169 INFO L93 Difference]: Finished difference Result 42436 states and 139747 transitions. [2019-12-07 11:15:35,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:35,169 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 11:15:35,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:35,234 INFO L225 Difference]: With dead ends: 42436 [2019-12-07 11:15:35,234 INFO L226 Difference]: Without dead ends: 42329 [2019-12-07 11:15:35,234 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:35,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42329 states. [2019-12-07 11:15:35,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42329 to 36027. [2019-12-07 11:15:35,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36027 states. [2019-12-07 11:15:35,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36027 states to 36027 states and 119643 transitions. [2019-12-07 11:15:35,875 INFO L78 Accepts]: Start accepts. Automaton has 36027 states and 119643 transitions. Word has length 14 [2019-12-07 11:15:35,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:35,875 INFO L462 AbstractCegarLoop]: Abstraction has 36027 states and 119643 transitions. [2019-12-07 11:15:35,875 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:15:35,875 INFO L276 IsEmpty]: Start isEmpty. Operand 36027 states and 119643 transitions. [2019-12-07 11:15:35,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:15:35,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:35,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:35,883 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:35,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:35,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1918737222, now seen corresponding path program 1 times [2019-12-07 11:15:35,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:35,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894690075] [2019-12-07 11:15:35,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:35,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:35,928 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:35,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894690075] [2019-12-07 11:15:35,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:35,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:35,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972109484] [2019-12-07 11:15:35,929 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:35,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:35,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:35,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:35,930 INFO L87 Difference]: Start difference. First operand 36027 states and 119643 transitions. Second operand 5 states. [2019-12-07 11:15:36,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:36,296 INFO L93 Difference]: Finished difference Result 48205 states and 157671 transitions. [2019-12-07 11:15:36,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:15:36,296 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:15:36,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:36,365 INFO L225 Difference]: With dead ends: 48205 [2019-12-07 11:15:36,366 INFO L226 Difference]: Without dead ends: 48029 [2019-12-07 11:15:36,366 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:15:36,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48029 states. [2019-12-07 11:15:36,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48029 to 36780. [2019-12-07 11:15:36,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36780 states. [2019-12-07 11:15:37,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36780 states to 36780 states and 122127 transitions. [2019-12-07 11:15:37,053 INFO L78 Accepts]: Start accepts. Automaton has 36780 states and 122127 transitions. Word has length 22 [2019-12-07 11:15:37,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:37,053 INFO L462 AbstractCegarLoop]: Abstraction has 36780 states and 122127 transitions. [2019-12-07 11:15:37,053 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:37,053 INFO L276 IsEmpty]: Start isEmpty. Operand 36780 states and 122127 transitions. [2019-12-07 11:15:37,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:15:37,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:37,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:37,060 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:37,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:37,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1233781658, now seen corresponding path program 1 times [2019-12-07 11:15:37,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:37,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276375012] [2019-12-07 11:15:37,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:37,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:37,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:37,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276375012] [2019-12-07 11:15:37,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:37,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:37,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846806228] [2019-12-07 11:15:37,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:37,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:37,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:37,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:37,096 INFO L87 Difference]: Start difference. First operand 36780 states and 122127 transitions. Second operand 5 states. [2019-12-07 11:15:37,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:37,466 INFO L93 Difference]: Finished difference Result 49034 states and 160234 transitions. [2019-12-07 11:15:37,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:15:37,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:15:37,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:37,635 INFO L225 Difference]: With dead ends: 49034 [2019-12-07 11:15:37,635 INFO L226 Difference]: Without dead ends: 48752 [2019-12-07 11:15:37,636 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:15:37,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48752 states. [2019-12-07 11:15:38,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48752 to 34955. [2019-12-07 11:15:38,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34955 states. [2019-12-07 11:15:38,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34955 states to 34955 states and 116069 transitions. [2019-12-07 11:15:38,262 INFO L78 Accepts]: Start accepts. Automaton has 34955 states and 116069 transitions. Word has length 22 [2019-12-07 11:15:38,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:38,263 INFO L462 AbstractCegarLoop]: Abstraction has 34955 states and 116069 transitions. [2019-12-07 11:15:38,263 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:38,263 INFO L276 IsEmpty]: Start isEmpty. Operand 34955 states and 116069 transitions. [2019-12-07 11:15:38,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:15:38,273 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:38,273 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:38,273 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:38,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:38,273 INFO L82 PathProgramCache]: Analyzing trace with hash 1628067424, now seen corresponding path program 1 times [2019-12-07 11:15:38,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:38,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603403654] [2019-12-07 11:15:38,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:38,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:38,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:38,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1603403654] [2019-12-07 11:15:38,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:38,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:38,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1768156601] [2019-12-07 11:15:38,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:38,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:38,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:38,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:38,309 INFO L87 Difference]: Start difference. First operand 34955 states and 116069 transitions. Second operand 5 states. [2019-12-07 11:15:38,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:38,629 INFO L93 Difference]: Finished difference Result 48013 states and 156239 transitions. [2019-12-07 11:15:38,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:15:38,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 11:15:38,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:38,698 INFO L225 Difference]: With dead ends: 48013 [2019-12-07 11:15:38,699 INFO L226 Difference]: Without dead ends: 47985 [2019-12-07 11:15:38,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:15:38,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47985 states. [2019-12-07 11:15:39,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47985 to 39324. [2019-12-07 11:15:39,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39324 states. [2019-12-07 11:15:39,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39324 states to 39324 states and 129687 transitions. [2019-12-07 11:15:39,407 INFO L78 Accepts]: Start accepts. Automaton has 39324 states and 129687 transitions. Word has length 25 [2019-12-07 11:15:39,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:39,407 INFO L462 AbstractCegarLoop]: Abstraction has 39324 states and 129687 transitions. [2019-12-07 11:15:39,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:39,407 INFO L276 IsEmpty]: Start isEmpty. Operand 39324 states and 129687 transitions. [2019-12-07 11:15:39,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:15:39,421 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:39,421 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:39,422 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:39,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:39,422 INFO L82 PathProgramCache]: Analyzing trace with hash -126544367, now seen corresponding path program 1 times [2019-12-07 11:15:39,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:39,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621725097] [2019-12-07 11:15:39,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:39,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:39,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:39,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621725097] [2019-12-07 11:15:39,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:39,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:39,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955491894] [2019-12-07 11:15:39,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:39,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:39,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:39,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:39,464 INFO L87 Difference]: Start difference. First operand 39324 states and 129687 transitions. Second operand 5 states. [2019-12-07 11:15:39,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:39,750 INFO L93 Difference]: Finished difference Result 49344 states and 161427 transitions. [2019-12-07 11:15:39,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:15:39,750 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:15:39,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:39,839 INFO L225 Difference]: With dead ends: 49344 [2019-12-07 11:15:39,839 INFO L226 Difference]: Without dead ends: 49321 [2019-12-07 11:15:39,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:15:40,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49321 states. [2019-12-07 11:15:40,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49321 to 40993. [2019-12-07 11:15:40,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40993 states. [2019-12-07 11:15:40,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40993 states to 40993 states and 135255 transitions. [2019-12-07 11:15:40,676 INFO L78 Accepts]: Start accepts. Automaton has 40993 states and 135255 transitions. Word has length 28 [2019-12-07 11:15:40,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:40,677 INFO L462 AbstractCegarLoop]: Abstraction has 40993 states and 135255 transitions. [2019-12-07 11:15:40,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:40,677 INFO L276 IsEmpty]: Start isEmpty. Operand 40993 states and 135255 transitions. [2019-12-07 11:15:40,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:15:40,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:40,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:40,692 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:40,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:40,692 INFO L82 PathProgramCache]: Analyzing trace with hash 1319845053, now seen corresponding path program 1 times [2019-12-07 11:15:40,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:40,692 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781640663] [2019-12-07 11:15:40,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:40,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:40,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:40,712 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781640663] [2019-12-07 11:15:40,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:40,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:40,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [338290459] [2019-12-07 11:15:40,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:40,712 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:40,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:40,713 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:40,713 INFO L87 Difference]: Start difference. First operand 40993 states and 135255 transitions. Second operand 3 states. [2019-12-07 11:15:40,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:40,862 INFO L93 Difference]: Finished difference Result 51955 states and 170158 transitions. [2019-12-07 11:15:40,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:40,863 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 11:15:40,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:40,946 INFO L225 Difference]: With dead ends: 51955 [2019-12-07 11:15:40,946 INFO L226 Difference]: Without dead ends: 51955 [2019-12-07 11:15:40,947 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:41,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51955 states. [2019-12-07 11:15:41,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51955 to 42744. [2019-12-07 11:15:41,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42744 states. [2019-12-07 11:15:41,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42744 states to 42744 states and 138728 transitions. [2019-12-07 11:15:41,690 INFO L78 Accepts]: Start accepts. Automaton has 42744 states and 138728 transitions. Word has length 28 [2019-12-07 11:15:41,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:41,690 INFO L462 AbstractCegarLoop]: Abstraction has 42744 states and 138728 transitions. [2019-12-07 11:15:41,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:41,690 INFO L276 IsEmpty]: Start isEmpty. Operand 42744 states and 138728 transitions. [2019-12-07 11:15:41,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:15:41,708 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:41,708 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:41,708 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:41,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:41,708 INFO L82 PathProgramCache]: Analyzing trace with hash 2057402160, now seen corresponding path program 1 times [2019-12-07 11:15:41,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:41,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181246629] [2019-12-07 11:15:41,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:41,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:41,753 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:41,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181246629] [2019-12-07 11:15:41,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:41,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:15:41,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703016001] [2019-12-07 11:15:41,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:41,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:41,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:41,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:41,754 INFO L87 Difference]: Start difference. First operand 42744 states and 138728 transitions. Second operand 5 states. [2019-12-07 11:15:42,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:42,203 INFO L93 Difference]: Finished difference Result 60921 states and 195594 transitions. [2019-12-07 11:15:42,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:15:42,204 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:15:42,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:42,302 INFO L225 Difference]: With dead ends: 60921 [2019-12-07 11:15:42,302 INFO L226 Difference]: Without dead ends: 60921 [2019-12-07 11:15:42,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:42,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60921 states. [2019-12-07 11:15:43,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60921 to 51876. [2019-12-07 11:15:43,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51876 states. [2019-12-07 11:15:43,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51876 states to 51876 states and 167683 transitions. [2019-12-07 11:15:43,231 INFO L78 Accepts]: Start accepts. Automaton has 51876 states and 167683 transitions. Word has length 28 [2019-12-07 11:15:43,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:43,231 INFO L462 AbstractCegarLoop]: Abstraction has 51876 states and 167683 transitions. [2019-12-07 11:15:43,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:43,231 INFO L276 IsEmpty]: Start isEmpty. Operand 51876 states and 167683 transitions. [2019-12-07 11:15:43,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 11:15:43,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:43,257 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:43,257 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:43,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:43,257 INFO L82 PathProgramCache]: Analyzing trace with hash 234862090, now seen corresponding path program 1 times [2019-12-07 11:15:43,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:43,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797332541] [2019-12-07 11:15:43,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:43,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:43,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:43,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797332541] [2019-12-07 11:15:43,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:43,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:15:43,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446586194] [2019-12-07 11:15:43,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:43,300 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:43,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:43,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:43,300 INFO L87 Difference]: Start difference. First operand 51876 states and 167683 transitions. Second operand 5 states. [2019-12-07 11:15:43,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:43,646 INFO L93 Difference]: Finished difference Result 63150 states and 202660 transitions. [2019-12-07 11:15:43,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:15:43,647 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 11:15:43,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:43,747 INFO L225 Difference]: With dead ends: 63150 [2019-12-07 11:15:43,747 INFO L226 Difference]: Without dead ends: 63126 [2019-12-07 11:15:43,748 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:15:44,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63126 states. [2019-12-07 11:15:44,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63126 to 51763. [2019-12-07 11:15:44,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51763 states. [2019-12-07 11:15:44,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51763 states to 51763 states and 166959 transitions. [2019-12-07 11:15:44,823 INFO L78 Accepts]: Start accepts. Automaton has 51763 states and 166959 transitions. Word has length 29 [2019-12-07 11:15:44,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:44,823 INFO L462 AbstractCegarLoop]: Abstraction has 51763 states and 166959 transitions. [2019-12-07 11:15:44,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:44,823 INFO L276 IsEmpty]: Start isEmpty. Operand 51763 states and 166959 transitions. [2019-12-07 11:15:44,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 11:15:44,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:44,844 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:44,844 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:44,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:44,844 INFO L82 PathProgramCache]: Analyzing trace with hash 1898991294, now seen corresponding path program 1 times [2019-12-07 11:15:44,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:44,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895376515] [2019-12-07 11:15:44,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:44,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:44,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:44,999 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895376515] [2019-12-07 11:15:44,999 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:44,999 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:15:44,999 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632620504] [2019-12-07 11:15:45,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:15:45,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:45,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:15:45,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:15:45,000 INFO L87 Difference]: Start difference. First operand 51763 states and 166959 transitions. Second operand 7 states. [2019-12-07 11:15:45,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:45,828 INFO L93 Difference]: Finished difference Result 109439 states and 350713 transitions. [2019-12-07 11:15:45,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 11:15:45,829 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2019-12-07 11:15:45,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:45,975 INFO L225 Difference]: With dead ends: 109439 [2019-12-07 11:15:45,975 INFO L226 Difference]: Without dead ends: 97809 [2019-12-07 11:15:45,975 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:15:46,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97809 states. [2019-12-07 11:15:47,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97809 to 87120. [2019-12-07 11:15:47,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87120 states. [2019-12-07 11:15:47,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87120 states to 87120 states and 278082 transitions. [2019-12-07 11:15:47,462 INFO L78 Accepts]: Start accepts. Automaton has 87120 states and 278082 transitions. Word has length 29 [2019-12-07 11:15:47,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:47,463 INFO L462 AbstractCegarLoop]: Abstraction has 87120 states and 278082 transitions. [2019-12-07 11:15:47,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:15:47,463 INFO L276 IsEmpty]: Start isEmpty. Operand 87120 states and 278082 transitions. [2019-12-07 11:15:47,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 11:15:47,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:47,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:47,506 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:47,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:47,507 INFO L82 PathProgramCache]: Analyzing trace with hash 429558022, now seen corresponding path program 1 times [2019-12-07 11:15:47,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:47,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296360729] [2019-12-07 11:15:47,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:47,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:47,551 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:47,551 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296360729] [2019-12-07 11:15:47,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:47,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:15:47,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1312456977] [2019-12-07 11:15:47,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:15:47,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:47,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:15:47,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:15:47,552 INFO L87 Difference]: Start difference. First operand 87120 states and 278082 transitions. Second operand 5 states. [2019-12-07 11:15:47,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:47,688 INFO L93 Difference]: Finished difference Result 42845 states and 128851 transitions. [2019-12-07 11:15:47,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:15:47,688 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 11:15:47,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:47,731 INFO L225 Difference]: With dead ends: 42845 [2019-12-07 11:15:47,731 INFO L226 Difference]: Without dead ends: 36938 [2019-12-07 11:15:47,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:15:47,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36938 states. [2019-12-07 11:15:48,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36938 to 35144. [2019-12-07 11:15:48,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35144 states. [2019-12-07 11:15:48,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35144 states to 35144 states and 105394 transitions. [2019-12-07 11:15:48,210 INFO L78 Accepts]: Start accepts. Automaton has 35144 states and 105394 transitions. Word has length 30 [2019-12-07 11:15:48,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:48,210 INFO L462 AbstractCegarLoop]: Abstraction has 35144 states and 105394 transitions. [2019-12-07 11:15:48,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:15:48,210 INFO L276 IsEmpty]: Start isEmpty. Operand 35144 states and 105394 transitions. [2019-12-07 11:15:48,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:15:48,385 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:48,385 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:48,385 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:48,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:48,386 INFO L82 PathProgramCache]: Analyzing trace with hash 483024013, now seen corresponding path program 1 times [2019-12-07 11:15:48,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:48,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56353652] [2019-12-07 11:15:48,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:48,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:48,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:48,445 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [56353652] [2019-12-07 11:15:48,445 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:48,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:15:48,446 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1576167647] [2019-12-07 11:15:48,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:15:48,446 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:48,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:15:48,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:48,446 INFO L87 Difference]: Start difference. First operand 35144 states and 105394 transitions. Second operand 6 states. [2019-12-07 11:15:48,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:48,860 INFO L93 Difference]: Finished difference Result 40466 states and 119631 transitions. [2019-12-07 11:15:48,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:15:48,860 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 11:15:48,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:48,906 INFO L225 Difference]: With dead ends: 40466 [2019-12-07 11:15:48,906 INFO L226 Difference]: Without dead ends: 40394 [2019-12-07 11:15:48,906 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:15:49,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40394 states. [2019-12-07 11:15:49,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40394 to 34981. [2019-12-07 11:15:49,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34981 states. [2019-12-07 11:15:49,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34981 states to 34981 states and 104903 transitions. [2019-12-07 11:15:49,457 INFO L78 Accepts]: Start accepts. Automaton has 34981 states and 104903 transitions. Word has length 40 [2019-12-07 11:15:49,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:49,457 INFO L462 AbstractCegarLoop]: Abstraction has 34981 states and 104903 transitions. [2019-12-07 11:15:49,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:15:49,457 INFO L276 IsEmpty]: Start isEmpty. Operand 34981 states and 104903 transitions. [2019-12-07 11:15:49,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:15:49,489 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:49,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:49,490 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:49,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:49,490 INFO L82 PathProgramCache]: Analyzing trace with hash -891252526, now seen corresponding path program 1 times [2019-12-07 11:15:49,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:49,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337878726] [2019-12-07 11:15:49,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:49,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:49,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:49,542 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337878726] [2019-12-07 11:15:49,542 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:49,542 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:15:49,542 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533468057] [2019-12-07 11:15:49,543 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:15:49,543 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:49,543 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:15:49,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:49,543 INFO L87 Difference]: Start difference. First operand 34981 states and 104903 transitions. Second operand 6 states. [2019-12-07 11:15:50,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:50,087 INFO L93 Difference]: Finished difference Result 60922 states and 182756 transitions. [2019-12-07 11:15:50,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:15:50,087 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 11:15:50,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:50,167 INFO L225 Difference]: With dead ends: 60922 [2019-12-07 11:15:50,168 INFO L226 Difference]: Without dead ends: 60922 [2019-12-07 11:15:50,168 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:15:50,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60922 states. [2019-12-07 11:15:50,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60922 to 38760. [2019-12-07 11:15:50,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38760 states. [2019-12-07 11:15:50,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38760 states to 38760 states and 116713 transitions. [2019-12-07 11:15:50,864 INFO L78 Accepts]: Start accepts. Automaton has 38760 states and 116713 transitions. Word has length 40 [2019-12-07 11:15:50,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:50,864 INFO L462 AbstractCegarLoop]: Abstraction has 38760 states and 116713 transitions. [2019-12-07 11:15:50,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:15:50,864 INFO L276 IsEmpty]: Start isEmpty. Operand 38760 states and 116713 transitions. [2019-12-07 11:15:50,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:15:50,899 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:50,900 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:50,900 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:50,900 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:50,900 INFO L82 PathProgramCache]: Analyzing trace with hash 820794198, now seen corresponding path program 2 times [2019-12-07 11:15:50,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:50,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274333711] [2019-12-07 11:15:50,900 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:50,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:50,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:50,931 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [274333711] [2019-12-07 11:15:50,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:50,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:50,931 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [74544904] [2019-12-07 11:15:50,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:50,931 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:50,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:50,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:50,932 INFO L87 Difference]: Start difference. First operand 38760 states and 116713 transitions. Second operand 3 states. [2019-12-07 11:15:51,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:51,017 INFO L93 Difference]: Finished difference Result 33220 states and 98337 transitions. [2019-12-07 11:15:51,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:51,017 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 11:15:51,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:51,057 INFO L225 Difference]: With dead ends: 33220 [2019-12-07 11:15:51,057 INFO L226 Difference]: Without dead ends: 33220 [2019-12-07 11:15:51,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:51,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33220 states. [2019-12-07 11:15:51,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33220 to 32884. [2019-12-07 11:15:51,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32884 states. [2019-12-07 11:15:51,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32884 states to 32884 states and 97451 transitions. [2019-12-07 11:15:51,486 INFO L78 Accepts]: Start accepts. Automaton has 32884 states and 97451 transitions. Word has length 40 [2019-12-07 11:15:51,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:51,486 INFO L462 AbstractCegarLoop]: Abstraction has 32884 states and 97451 transitions. [2019-12-07 11:15:51,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:51,486 INFO L276 IsEmpty]: Start isEmpty. Operand 32884 states and 97451 transitions. [2019-12-07 11:15:51,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:15:51,517 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:51,517 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:51,517 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:51,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:51,517 INFO L82 PathProgramCache]: Analyzing trace with hash -1848652026, now seen corresponding path program 1 times [2019-12-07 11:15:51,518 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:51,518 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577910375] [2019-12-07 11:15:51,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:51,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:51,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:51,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577910375] [2019-12-07 11:15:51,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:51,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:15:51,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501283450] [2019-12-07 11:15:51,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:15:51,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:51,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:15:51,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:51,588 INFO L87 Difference]: Start difference. First operand 32884 states and 97451 transitions. Second operand 6 states. [2019-12-07 11:15:51,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:51,996 INFO L93 Difference]: Finished difference Result 37882 states and 110769 transitions. [2019-12-07 11:15:51,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:15:51,996 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 11:15:51,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:52,037 INFO L225 Difference]: With dead ends: 37882 [2019-12-07 11:15:52,037 INFO L226 Difference]: Without dead ends: 37810 [2019-12-07 11:15:52,037 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:15:52,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37810 states. [2019-12-07 11:15:52,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37810 to 31236. [2019-12-07 11:15:52,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31236 states. [2019-12-07 11:15:52,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31236 states to 31236 states and 92725 transitions. [2019-12-07 11:15:52,520 INFO L78 Accepts]: Start accepts. Automaton has 31236 states and 92725 transitions. Word has length 41 [2019-12-07 11:15:52,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:52,521 INFO L462 AbstractCegarLoop]: Abstraction has 31236 states and 92725 transitions. [2019-12-07 11:15:52,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:15:52,521 INFO L276 IsEmpty]: Start isEmpty. Operand 31236 states and 92725 transitions. [2019-12-07 11:15:52,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:15:52,549 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:52,549 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:52,549 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:52,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:52,550 INFO L82 PathProgramCache]: Analyzing trace with hash -55018944, now seen corresponding path program 1 times [2019-12-07 11:15:52,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:52,550 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447631804] [2019-12-07 11:15:52,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:52,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:52,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:52,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447631804] [2019-12-07 11:15:52,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:52,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:15:52,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [430190187] [2019-12-07 11:15:52,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:15:52,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:52,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:15:52,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:52,609 INFO L87 Difference]: Start difference. First operand 31236 states and 92725 transitions. Second operand 6 states. [2019-12-07 11:15:53,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:53,284 INFO L93 Difference]: Finished difference Result 42843 states and 125225 transitions. [2019-12-07 11:15:53,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 11:15:53,284 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 11:15:53,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:53,337 INFO L225 Difference]: With dead ends: 42843 [2019-12-07 11:15:53,337 INFO L226 Difference]: Without dead ends: 42843 [2019-12-07 11:15:53,337 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:15:53,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42843 states. [2019-12-07 11:15:53,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42843 to 33178. [2019-12-07 11:15:53,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33178 states. [2019-12-07 11:15:53,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33178 states to 33178 states and 98433 transitions. [2019-12-07 11:15:53,888 INFO L78 Accepts]: Start accepts. Automaton has 33178 states and 98433 transitions. Word has length 41 [2019-12-07 11:15:53,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:53,888 INFO L462 AbstractCegarLoop]: Abstraction has 33178 states and 98433 transitions. [2019-12-07 11:15:53,888 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:15:53,888 INFO L276 IsEmpty]: Start isEmpty. Operand 33178 states and 98433 transitions. [2019-12-07 11:15:53,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:15:53,918 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:53,918 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:53,918 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:53,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:53,918 INFO L82 PathProgramCache]: Analyzing trace with hash -154907136, now seen corresponding path program 2 times [2019-12-07 11:15:53,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:53,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019889999] [2019-12-07 11:15:53,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:53,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:53,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:53,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019889999] [2019-12-07 11:15:53,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:53,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:53,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299450434] [2019-12-07 11:15:53,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:53,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:53,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:53,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:53,958 INFO L87 Difference]: Start difference. First operand 33178 states and 98433 transitions. Second operand 3 states. [2019-12-07 11:15:54,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:54,053 INFO L93 Difference]: Finished difference Result 33055 states and 98021 transitions. [2019-12-07 11:15:54,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:54,054 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 11:15:54,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:54,106 INFO L225 Difference]: With dead ends: 33055 [2019-12-07 11:15:54,107 INFO L226 Difference]: Without dead ends: 33055 [2019-12-07 11:15:54,107 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:54,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33055 states. [2019-12-07 11:15:54,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33055 to 27114. [2019-12-07 11:15:54,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27114 states. [2019-12-07 11:15:54,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27114 states to 27114 states and 81131 transitions. [2019-12-07 11:15:54,552 INFO L78 Accepts]: Start accepts. Automaton has 27114 states and 81131 transitions. Word has length 41 [2019-12-07 11:15:54,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:54,552 INFO L462 AbstractCegarLoop]: Abstraction has 27114 states and 81131 transitions. [2019-12-07 11:15:54,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:54,552 INFO L276 IsEmpty]: Start isEmpty. Operand 27114 states and 81131 transitions. [2019-12-07 11:15:54,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:15:54,577 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:54,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:54,578 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:54,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:54,578 INFO L82 PathProgramCache]: Analyzing trace with hash 838446510, now seen corresponding path program 1 times [2019-12-07 11:15:54,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:54,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738015605] [2019-12-07 11:15:54,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:54,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:54,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:54,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738015605] [2019-12-07 11:15:54,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:54,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:15:54,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423947807] [2019-12-07 11:15:54,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:15:54,643 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:54,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:15:54,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:15:54,643 INFO L87 Difference]: Start difference. First operand 27114 states and 81131 transitions. Second operand 6 states. [2019-12-07 11:15:54,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:54,755 INFO L93 Difference]: Finished difference Result 25210 states and 76748 transitions. [2019-12-07 11:15:54,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:15:54,755 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 11:15:54,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:54,784 INFO L225 Difference]: With dead ends: 25210 [2019-12-07 11:15:54,784 INFO L226 Difference]: Without dead ends: 24815 [2019-12-07 11:15:54,784 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:15:54,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24815 states. [2019-12-07 11:15:55,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24815 to 13271. [2019-12-07 11:15:55,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13271 states. [2019-12-07 11:15:55,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13271 states to 13271 states and 40650 transitions. [2019-12-07 11:15:55,035 INFO L78 Accepts]: Start accepts. Automaton has 13271 states and 40650 transitions. Word has length 42 [2019-12-07 11:15:55,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:55,036 INFO L462 AbstractCegarLoop]: Abstraction has 13271 states and 40650 transitions. [2019-12-07 11:15:55,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:15:55,036 INFO L276 IsEmpty]: Start isEmpty. Operand 13271 states and 40650 transitions. [2019-12-07 11:15:55,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:15:55,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:55,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:55,048 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:55,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:55,048 INFO L82 PathProgramCache]: Analyzing trace with hash -944534763, now seen corresponding path program 1 times [2019-12-07 11:15:55,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:55,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648220946] [2019-12-07 11:15:55,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:55,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:55,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:55,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648220946] [2019-12-07 11:15:55,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:55,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 11:15:55,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2095038975] [2019-12-07 11:15:55,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:15:55,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:55,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:15:55,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=153, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:15:55,217 INFO L87 Difference]: Start difference. First operand 13271 states and 40650 transitions. Second operand 14 states. [2019-12-07 11:15:58,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:58,266 INFO L93 Difference]: Finished difference Result 50946 states and 154643 transitions. [2019-12-07 11:15:58,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2019-12-07 11:15:58,266 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2019-12-07 11:15:58,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:58,309 INFO L225 Difference]: With dead ends: 50946 [2019-12-07 11:15:58,309 INFO L226 Difference]: Without dead ends: 36070 [2019-12-07 11:15:58,312 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2344 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=987, Invalid=5985, Unknown=0, NotChecked=0, Total=6972 [2019-12-07 11:15:58,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36070 states. [2019-12-07 11:15:58,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36070 to 14526. [2019-12-07 11:15:58,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14526 states. [2019-12-07 11:15:58,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14526 states to 14526 states and 44069 transitions. [2019-12-07 11:15:58,653 INFO L78 Accepts]: Start accepts. Automaton has 14526 states and 44069 transitions. Word has length 56 [2019-12-07 11:15:58,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:58,653 INFO L462 AbstractCegarLoop]: Abstraction has 14526 states and 44069 transitions. [2019-12-07 11:15:58,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:15:58,654 INFO L276 IsEmpty]: Start isEmpty. Operand 14526 states and 44069 transitions. [2019-12-07 11:15:58,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:15:58,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:58,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:58,667 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:58,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:58,667 INFO L82 PathProgramCache]: Analyzing trace with hash 1363835769, now seen corresponding path program 2 times [2019-12-07 11:15:58,667 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:58,667 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261348033] [2019-12-07 11:15:58,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:58,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:58,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:58,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261348033] [2019-12-07 11:15:58,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:58,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:15:58,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893701866] [2019-12-07 11:15:58,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:15:58,699 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:58,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:15:58,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:58,700 INFO L87 Difference]: Start difference. First operand 14526 states and 44069 transitions. Second operand 3 states. [2019-12-07 11:15:58,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:15:58,758 INFO L93 Difference]: Finished difference Result 26474 states and 80249 transitions. [2019-12-07 11:15:58,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:15:58,758 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 11:15:58,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:15:58,772 INFO L225 Difference]: With dead ends: 26474 [2019-12-07 11:15:58,772 INFO L226 Difference]: Without dead ends: 12426 [2019-12-07 11:15:58,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:15:58,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12426 states. [2019-12-07 11:15:58,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12426 to 12426. [2019-12-07 11:15:58,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12426 states. [2019-12-07 11:15:58,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12426 states to 12426 states and 37479 transitions. [2019-12-07 11:15:58,942 INFO L78 Accepts]: Start accepts. Automaton has 12426 states and 37479 transitions. Word has length 56 [2019-12-07 11:15:58,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:15:58,942 INFO L462 AbstractCegarLoop]: Abstraction has 12426 states and 37479 transitions. [2019-12-07 11:15:58,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:15:58,942 INFO L276 IsEmpty]: Start isEmpty. Operand 12426 states and 37479 transitions. [2019-12-07 11:15:58,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:15:58,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:15:58,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:15:58,953 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:15:58,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:15:58,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1033271685, now seen corresponding path program 3 times [2019-12-07 11:15:58,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:15:58,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [482092091] [2019-12-07 11:15:58,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:15:58,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:15:59,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:15:59,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [482092091] [2019-12-07 11:15:59,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:15:59,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:15:59,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902895749] [2019-12-07 11:15:59,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:15:59,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:15:59,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:15:59,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=194, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:15:59,327 INFO L87 Difference]: Start difference. First operand 12426 states and 37479 transitions. Second operand 16 states. [2019-12-07 11:16:02,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:02,440 INFO L93 Difference]: Finished difference Result 29087 states and 85891 transitions. [2019-12-07 11:16:02,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 11:16:02,441 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2019-12-07 11:16:02,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:02,474 INFO L225 Difference]: With dead ends: 29087 [2019-12-07 11:16:02,474 INFO L226 Difference]: Without dead ends: 19479 [2019-12-07 11:16:02,476 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1396 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=755, Invalid=3535, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 11:16:02,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19479 states. [2019-12-07 11:16:02,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19479 to 13841. [2019-12-07 11:16:02,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13841 states. [2019-12-07 11:16:02,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13841 states to 13841 states and 41652 transitions. [2019-12-07 11:16:02,701 INFO L78 Accepts]: Start accepts. Automaton has 13841 states and 41652 transitions. Word has length 56 [2019-12-07 11:16:02,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:02,701 INFO L462 AbstractCegarLoop]: Abstraction has 13841 states and 41652 transitions. [2019-12-07 11:16:02,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:16:02,701 INFO L276 IsEmpty]: Start isEmpty. Operand 13841 states and 41652 transitions. [2019-12-07 11:16:02,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:02,713 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:02,714 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:02,714 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:02,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:02,714 INFO L82 PathProgramCache]: Analyzing trace with hash -1049666311, now seen corresponding path program 4 times [2019-12-07 11:16:02,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:02,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085692590] [2019-12-07 11:16:02,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:02,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:02,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:02,963 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085692590] [2019-12-07 11:16:02,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:02,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:16:02,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389700857] [2019-12-07 11:16:02,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:16:02,964 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:02,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:16:02,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:16:02,964 INFO L87 Difference]: Start difference. First operand 13841 states and 41652 transitions. Second operand 15 states. [2019-12-07 11:16:08,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:08,455 INFO L93 Difference]: Finished difference Result 37010 states and 109894 transitions. [2019-12-07 11:16:08,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2019-12-07 11:16:08,456 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 11:16:08,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:08,485 INFO L225 Difference]: With dead ends: 37010 [2019-12-07 11:16:08,485 INFO L226 Difference]: Without dead ends: 25650 [2019-12-07 11:16:08,487 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2960 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1135, Invalid=7237, Unknown=0, NotChecked=0, Total=8372 [2019-12-07 11:16:08,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25650 states. [2019-12-07 11:16:08,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25650 to 14581. [2019-12-07 11:16:08,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14581 states. [2019-12-07 11:16:08,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14581 states to 14581 states and 43901 transitions. [2019-12-07 11:16:08,754 INFO L78 Accepts]: Start accepts. Automaton has 14581 states and 43901 transitions. Word has length 56 [2019-12-07 11:16:08,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:08,755 INFO L462 AbstractCegarLoop]: Abstraction has 14581 states and 43901 transitions. [2019-12-07 11:16:08,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:16:08,755 INFO L276 IsEmpty]: Start isEmpty. Operand 14581 states and 43901 transitions. [2019-12-07 11:16:08,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:08,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:08,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:08,768 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:08,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:08,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1822247207, now seen corresponding path program 5 times [2019-12-07 11:16:08,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:08,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593912271] [2019-12-07 11:16:08,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:08,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:08,998 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:08,999 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [593912271] [2019-12-07 11:16:08,999 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:08,999 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:16:08,999 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1741346478] [2019-12-07 11:16:08,999 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:16:08,999 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:08,999 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:16:09,000 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:16:09,000 INFO L87 Difference]: Start difference. First operand 14581 states and 43901 transitions. Second operand 15 states. [2019-12-07 11:16:12,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:12,015 INFO L93 Difference]: Finished difference Result 25013 states and 73836 transitions. [2019-12-07 11:16:12,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2019-12-07 11:16:12,015 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 11:16:12,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:12,039 INFO L225 Difference]: With dead ends: 25013 [2019-12-07 11:16:12,039 INFO L226 Difference]: Without dead ends: 23574 [2019-12-07 11:16:12,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2271 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=940, Invalid=5702, Unknown=0, NotChecked=0, Total=6642 [2019-12-07 11:16:12,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23574 states. [2019-12-07 11:16:12,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23574 to 14161. [2019-12-07 11:16:12,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14161 states. [2019-12-07 11:16:12,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14161 states to 14161 states and 42724 transitions. [2019-12-07 11:16:12,284 INFO L78 Accepts]: Start accepts. Automaton has 14161 states and 42724 transitions. Word has length 56 [2019-12-07 11:16:12,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:12,284 INFO L462 AbstractCegarLoop]: Abstraction has 14161 states and 42724 transitions. [2019-12-07 11:16:12,284 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:16:12,284 INFO L276 IsEmpty]: Start isEmpty. Operand 14161 states and 42724 transitions. [2019-12-07 11:16:12,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:12,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:12,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:12,296 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:12,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:12,296 INFO L82 PathProgramCache]: Analyzing trace with hash 93841739, now seen corresponding path program 6 times [2019-12-07 11:16:12,296 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:12,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34070727] [2019-12-07 11:16:12,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:12,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:12,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:12,629 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34070727] [2019-12-07 11:16:12,629 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:12,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:16:12,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261463759] [2019-12-07 11:16:12,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:16:12,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:12,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:16:12,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:16:12,630 INFO L87 Difference]: Start difference. First operand 14161 states and 42724 transitions. Second operand 16 states. [2019-12-07 11:16:15,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:15,682 INFO L93 Difference]: Finished difference Result 31844 states and 94735 transitions. [2019-12-07 11:16:15,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 11:16:15,682 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2019-12-07 11:16:15,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:15,704 INFO L225 Difference]: With dead ends: 31844 [2019-12-07 11:16:15,704 INFO L226 Difference]: Without dead ends: 23456 [2019-12-07 11:16:15,705 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1457 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=697, Invalid=4133, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 11:16:15,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23456 states. [2019-12-07 11:16:15,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23456 to 13977. [2019-12-07 11:16:15,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13977 states. [2019-12-07 11:16:15,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13977 states to 13977 states and 42183 transitions. [2019-12-07 11:16:15,946 INFO L78 Accepts]: Start accepts. Automaton has 13977 states and 42183 transitions. Word has length 56 [2019-12-07 11:16:15,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:15,946 INFO L462 AbstractCegarLoop]: Abstraction has 13977 states and 42183 transitions. [2019-12-07 11:16:15,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:16:15,946 INFO L276 IsEmpty]: Start isEmpty. Operand 13977 states and 42183 transitions. [2019-12-07 11:16:15,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:15,958 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:15,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:15,958 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:15,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:15,959 INFO L82 PathProgramCache]: Analyzing trace with hash 1355287643, now seen corresponding path program 7 times [2019-12-07 11:16:15,959 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:15,959 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [899060645] [2019-12-07 11:16:15,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:15,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:16,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:16,196 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [899060645] [2019-12-07 11:16:16,196 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:16,196 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 11:16:16,196 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1054195306] [2019-12-07 11:16:16,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:16:16,197 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:16,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:16:16,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:16:16,197 INFO L87 Difference]: Start difference. First operand 13977 states and 42183 transitions. Second operand 14 states. [2019-12-07 11:16:17,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:17,186 INFO L93 Difference]: Finished difference Result 18401 states and 55038 transitions. [2019-12-07 11:16:17,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 11:16:17,186 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 56 [2019-12-07 11:16:17,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:17,204 INFO L225 Difference]: With dead ends: 18401 [2019-12-07 11:16:17,204 INFO L226 Difference]: Without dead ends: 17365 [2019-12-07 11:16:17,205 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 179 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=176, Invalid=880, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 11:16:17,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17365 states. [2019-12-07 11:16:17,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17365 to 14452. [2019-12-07 11:16:17,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14452 states. [2019-12-07 11:16:17,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14452 states to 14452 states and 43624 transitions. [2019-12-07 11:16:17,417 INFO L78 Accepts]: Start accepts. Automaton has 14452 states and 43624 transitions. Word has length 56 [2019-12-07 11:16:17,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:17,417 INFO L462 AbstractCegarLoop]: Abstraction has 14452 states and 43624 transitions. [2019-12-07 11:16:17,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:16:17,417 INFO L276 IsEmpty]: Start isEmpty. Operand 14452 states and 43624 transitions. [2019-12-07 11:16:17,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:17,430 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:17,430 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:17,430 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:17,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:17,431 INFO L82 PathProgramCache]: Analyzing trace with hash 993844749, now seen corresponding path program 8 times [2019-12-07 11:16:17,431 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:17,431 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1107651386] [2019-12-07 11:16:17,431 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:17,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:17,692 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:17,692 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1107651386] [2019-12-07 11:16:17,692 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:17,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:16:17,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1109936494] [2019-12-07 11:16:17,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:16:17,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:17,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:16:17,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:16:17,693 INFO L87 Difference]: Start difference. First operand 14452 states and 43624 transitions. Second operand 15 states. [2019-12-07 11:16:20,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:20,422 INFO L93 Difference]: Finished difference Result 22063 states and 65778 transitions. [2019-12-07 11:16:20,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 11:16:20,422 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 11:16:20,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:20,441 INFO L225 Difference]: With dead ends: 22063 [2019-12-07 11:16:20,441 INFO L226 Difference]: Without dead ends: 18849 [2019-12-07 11:16:20,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 411 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=292, Invalid=1348, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 11:16:20,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18849 states. [2019-12-07 11:16:20,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18849 to 14496. [2019-12-07 11:16:20,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14496 states. [2019-12-07 11:16:20,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14496 states to 14496 states and 43741 transitions. [2019-12-07 11:16:20,668 INFO L78 Accepts]: Start accepts. Automaton has 14496 states and 43741 transitions. Word has length 56 [2019-12-07 11:16:20,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:20,669 INFO L462 AbstractCegarLoop]: Abstraction has 14496 states and 43741 transitions. [2019-12-07 11:16:20,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:16:20,669 INFO L276 IsEmpty]: Start isEmpty. Operand 14496 states and 43741 transitions. [2019-12-07 11:16:20,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:20,682 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:20,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:20,682 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:20,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:20,682 INFO L82 PathProgramCache]: Analyzing trace with hash -1089093247, now seen corresponding path program 9 times [2019-12-07 11:16:20,683 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:20,683 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839483579] [2019-12-07 11:16:20,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:20,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:20,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:20,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839483579] [2019-12-07 11:16:20,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:20,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:16:20,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420558372] [2019-12-07 11:16:20,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:16:20,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:20,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:16:20,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:16:20,935 INFO L87 Difference]: Start difference. First operand 14496 states and 43741 transitions. Second operand 15 states. [2019-12-07 11:16:25,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:25,038 INFO L93 Difference]: Finished difference Result 22528 states and 67164 transitions. [2019-12-07 11:16:25,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 11:16:25,038 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 11:16:25,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:25,057 INFO L225 Difference]: With dead ends: 22528 [2019-12-07 11:16:25,057 INFO L226 Difference]: Without dead ends: 18255 [2019-12-07 11:16:25,058 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 542 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=345, Invalid=1725, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 11:16:25,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18255 states. [2019-12-07 11:16:25,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18255 to 14454. [2019-12-07 11:16:25,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14454 states. [2019-12-07 11:16:25,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14454 states to 14454 states and 43630 transitions. [2019-12-07 11:16:25,278 INFO L78 Accepts]: Start accepts. Automaton has 14454 states and 43630 transitions. Word has length 56 [2019-12-07 11:16:25,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:25,278 INFO L462 AbstractCegarLoop]: Abstraction has 14454 states and 43630 transitions. [2019-12-07 11:16:25,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:16:25,278 INFO L276 IsEmpty]: Start isEmpty. Operand 14454 states and 43630 transitions. [2019-12-07 11:16:25,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:25,291 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:25,291 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:25,292 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:25,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:25,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1822644527, now seen corresponding path program 10 times [2019-12-07 11:16:25,292 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:25,292 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696822970] [2019-12-07 11:16:25,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:25,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:25,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:25,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696822970] [2019-12-07 11:16:25,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:25,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:16:25,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695098466] [2019-12-07 11:16:25,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:16:25,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:25,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:16:25,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:16:25,567 INFO L87 Difference]: Start difference. First operand 14454 states and 43630 transitions. Second operand 15 states. [2019-12-07 11:16:27,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:27,315 INFO L93 Difference]: Finished difference Result 18573 states and 55470 transitions. [2019-12-07 11:16:27,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 11:16:27,315 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 11:16:27,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:27,344 INFO L225 Difference]: With dead ends: 18573 [2019-12-07 11:16:27,344 INFO L226 Difference]: Without dead ends: 17537 [2019-12-07 11:16:27,345 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=180, Invalid=942, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 11:16:27,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17537 states. [2019-12-07 11:16:27,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17537 to 14603. [2019-12-07 11:16:27,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14603 states. [2019-12-07 11:16:27,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14603 states to 14603 states and 44071 transitions. [2019-12-07 11:16:27,561 INFO L78 Accepts]: Start accepts. Automaton has 14603 states and 44071 transitions. Word has length 56 [2019-12-07 11:16:27,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:27,562 INFO L462 AbstractCegarLoop]: Abstraction has 14603 states and 44071 transitions. [2019-12-07 11:16:27,562 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:16:27,562 INFO L276 IsEmpty]: Start isEmpty. Operand 14603 states and 44071 transitions. [2019-12-07 11:16:27,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:27,575 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:27,575 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:27,576 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:27,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:27,576 INFO L82 PathProgramCache]: Analyzing trace with hash -671010529, now seen corresponding path program 11 times [2019-12-07 11:16:27,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:27,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196592876] [2019-12-07 11:16:27,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:27,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:27,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:27,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196592876] [2019-12-07 11:16:27,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:27,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:16:27,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752279098] [2019-12-07 11:16:27,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:16:27,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:27,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:16:27,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:16:27,684 INFO L87 Difference]: Start difference. First operand 14603 states and 44071 transitions. Second operand 11 states. [2019-12-07 11:16:28,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:28,404 INFO L93 Difference]: Finished difference Result 23026 states and 69046 transitions. [2019-12-07 11:16:28,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 11:16:28,405 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 11:16:28,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:28,423 INFO L225 Difference]: With dead ends: 23026 [2019-12-07 11:16:28,423 INFO L226 Difference]: Without dead ends: 17305 [2019-12-07 11:16:28,424 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=127, Invalid=575, Unknown=0, NotChecked=0, Total=702 [2019-12-07 11:16:28,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17305 states. [2019-12-07 11:16:28,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17305 to 14237. [2019-12-07 11:16:28,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14237 states. [2019-12-07 11:16:28,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14237 states to 14237 states and 42900 transitions. [2019-12-07 11:16:28,637 INFO L78 Accepts]: Start accepts. Automaton has 14237 states and 42900 transitions. Word has length 56 [2019-12-07 11:16:28,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:28,637 INFO L462 AbstractCegarLoop]: Abstraction has 14237 states and 42900 transitions. [2019-12-07 11:16:28,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:16:28,637 INFO L276 IsEmpty]: Start isEmpty. Operand 14237 states and 42900 transitions. [2019-12-07 11:16:28,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:28,650 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:28,650 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:28,650 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:28,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:28,650 INFO L82 PathProgramCache]: Analyzing trace with hash 1406091659, now seen corresponding path program 12 times [2019-12-07 11:16:28,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:28,650 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156030369] [2019-12-07 11:16:28,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:28,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:16:28,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:16:28,759 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156030369] [2019-12-07 11:16:28,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:16:28,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:16:28,759 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [490225096] [2019-12-07 11:16:28,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:16:28,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:16:28,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:16:28,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:16:28,759 INFO L87 Difference]: Start difference. First operand 14237 states and 42900 transitions. Second operand 11 states. [2019-12-07 11:16:29,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:16:29,679 INFO L93 Difference]: Finished difference Result 29506 states and 88412 transitions. [2019-12-07 11:16:29,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 11:16:29,679 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 11:16:29,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:16:29,709 INFO L225 Difference]: With dead ends: 29506 [2019-12-07 11:16:29,709 INFO L226 Difference]: Without dead ends: 21832 [2019-12-07 11:16:29,709 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=248, Invalid=1012, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 11:16:29,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21832 states. [2019-12-07 11:16:29,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21832 to 13399. [2019-12-07 11:16:29,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13399 states. [2019-12-07 11:16:29,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13399 states to 13399 states and 40305 transitions. [2019-12-07 11:16:29,949 INFO L78 Accepts]: Start accepts. Automaton has 13399 states and 40305 transitions. Word has length 56 [2019-12-07 11:16:29,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:16:29,949 INFO L462 AbstractCegarLoop]: Abstraction has 13399 states and 40305 transitions. [2019-12-07 11:16:29,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:16:29,949 INFO L276 IsEmpty]: Start isEmpty. Operand 13399 states and 40305 transitions. [2019-12-07 11:16:29,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:16:29,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:16:29,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:16:29,961 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:16:29,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:16:29,962 INFO L82 PathProgramCache]: Analyzing trace with hash -1734091201, now seen corresponding path program 13 times [2019-12-07 11:16:29,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:16:29,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052304680] [2019-12-07 11:16:29,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:16:29,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:16:29,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:16:30,017 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:16:30,017 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:16:30,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2073~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30|) 0) (= v_~x$r_buff0_thd1~0_362 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| 4)) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30|) |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0))) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0) (= |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30| 1) |v_#valid_64|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_23|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t2073~0.offset=|v_ULTIMATE.start_main_~#t2073~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_14|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2073~0.base=|v_ULTIMATE.start_main_~#t2073~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t2075~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2075~0.offset, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t2073~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2074~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t2074~0.base, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t2073~0.offset, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:16:30,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10|) |v_ULTIMATE.start_main_~#t2074~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t2074~0.offset_9| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2074~0.base_10|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2074~0.base_10|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_9|, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2074~0.offset, ULTIMATE.start_main_~#t2074~0.base] because there is no mapped edge [2019-12-07 11:16:30,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:16:30,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11|) |v_ULTIMATE.start_main_~#t2075~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2075~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11|)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t2075~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2075~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2075~0.base, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2075~0.offset] because there is no mapped edge [2019-12-07 11:16:30,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-331684563 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-331684563 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-331684563| ~x~0_In-331684563)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-331684563| ~x$w_buff1~0_In-331684563) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-331684563, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-331684563, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-331684563, ~x~0=~x~0_In-331684563} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-331684563|, ~x$w_buff1~0=~x$w_buff1~0_In-331684563, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-331684563, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-331684563, ~x~0=~x~0_In-331684563} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:16:30,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-2144463238 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-2144463238 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite34_Out-2144463238| ~x$w_buff0_used~0_In-2144463238) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out-2144463238| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2144463238, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2144463238} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-2144463238|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2144463238, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2144463238} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:16:30,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In990220539 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In990220539 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In990220539 |P1Thread1of1ForFork0_#t~ite28_Out990220539|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out990220539|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In990220539, ~x$w_buff0_used~0=~x$w_buff0_used~0_In990220539} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In990220539, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out990220539|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In990220539} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:16:30,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1041582028 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1041582028 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1041582028 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In1041582028 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1041582028| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork0_#t~ite29_Out1041582028| ~x$w_buff1_used~0_In1041582028) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1041582028, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1041582028, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1041582028, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1041582028} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1041582028, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1041582028, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1041582028, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1041582028|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1041582028} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:16:30,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In360435610 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In360435610 256))) (.cse1 (= ~x$r_buff0_thd2~0_Out360435610 ~x$r_buff0_thd2~0_In360435610))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out360435610 0)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In360435610, ~x$w_buff0_used~0=~x$w_buff0_used~0_In360435610} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out360435610|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out360435610, ~x$w_buff0_used~0=~x$w_buff0_used~0_In360435610} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:16:30,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In195134002 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In195134002 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In195134002 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In195134002 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out195134002| ~x$r_buff1_thd2~0_In195134002)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite31_Out195134002| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In195134002, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In195134002, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In195134002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In195134002} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out195134002|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In195134002, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In195134002, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In195134002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In195134002} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:16:30,024 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:16:30,025 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-519157429 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In-519157429| |P0Thread1of1ForFork2_#t~ite8_Out-519157429|) (not .cse0) (= ~x$w_buff0~0_In-519157429 |P0Thread1of1ForFork2_#t~ite9_Out-519157429|)) (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-519157429 256) 0))) (or (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-519157429 256))) (= (mod ~x$w_buff0_used~0_In-519157429 256) 0) (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-519157429 256))))) (= |P0Thread1of1ForFork2_#t~ite8_Out-519157429| ~x$w_buff0~0_In-519157429) (= |P0Thread1of1ForFork2_#t~ite8_Out-519157429| |P0Thread1of1ForFork2_#t~ite9_Out-519157429|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-519157429, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-519157429, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-519157429|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-519157429, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-519157429, ~weak$$choice2~0=~weak$$choice2~0_In-519157429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519157429} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-519157429, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-519157429, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-519157429|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-519157429, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-519157429|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-519157429, ~weak$$choice2~0=~weak$$choice2~0_In-519157429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519157429} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 11:16:30,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-1660626224 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1660626224 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1660626224 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1660626224 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-1660626224 |P2Thread1of1ForFork1_#t~ite35_Out-1660626224|)) (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out-1660626224|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1660626224, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1660626224, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1660626224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1660626224} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1660626224|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1660626224, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1660626224, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1660626224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1660626224} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:16:30,026 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1549032800 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1549032800 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1549032800| ~x$r_buff0_thd3~0_In-1549032800) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1549032800| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1549032800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1549032800} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1549032800|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1549032800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1549032800} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:16:30,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-851888520 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-851888520 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-851888520 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-851888520 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out-851888520| ~x$r_buff1_thd3~0_In-851888520) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite37_Out-851888520|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-851888520, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-851888520, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-851888520, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-851888520} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-851888520|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-851888520, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-851888520, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-851888520, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-851888520} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:16:30,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:16:30,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-666659355 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out-666659355| ~x$w_buff1_used~0_In-666659355) (= |P0Thread1of1ForFork2_#t~ite17_In-666659355| |P0Thread1of1ForFork2_#t~ite17_Out-666659355|)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-666659355| |P0Thread1of1ForFork2_#t~ite18_Out-666659355|) .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-666659355| ~x$w_buff1_used~0_In-666659355) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-666659355 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-666659355 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In-666659355 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-666659355 256))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-666659355, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-666659355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-666659355, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-666659355, ~weak$$choice2~0=~weak$$choice2~0_In-666659355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666659355} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-666659355, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-666659355|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-666659355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-666659355, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-666659355, ~weak$$choice2~0=~weak$$choice2~0_In-666659355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666659355} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:16:30,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:16:30,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1135088665 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-1135088665| ~x$r_buff1_thd1~0_In-1135088665) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite23_In-1135088665| |P0Thread1of1ForFork2_#t~ite23_Out-1135088665|)) (and (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1135088665 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-1135088665 256)) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-1135088665 256) 0)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-1135088665 256) 0)))) (= |P0Thread1of1ForFork2_#t~ite24_Out-1135088665| |P0Thread1of1ForFork2_#t~ite23_Out-1135088665|) .cse0 (= |P0Thread1of1ForFork2_#t~ite23_Out-1135088665| ~x$r_buff1_thd1~0_In-1135088665)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1135088665, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1135088665, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1135088665, ~weak$$choice2~0=~weak$$choice2~0_In-1135088665, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-1135088665|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1135088665} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1135088665, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1135088665, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1135088665, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-1135088665|, ~weak$$choice2~0=~weak$$choice2~0_In-1135088665, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-1135088665|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1135088665} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 11:16:30,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:16:30,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1538098250 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1538098250 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1538098250 |ULTIMATE.start_main_#t~ite41_Out-1538098250|) (not .cse1)) (and (= ~x~0_In-1538098250 |ULTIMATE.start_main_#t~ite41_Out-1538098250|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1538098250, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1538098250, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1538098250, ~x~0=~x~0_In-1538098250} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1538098250|, ~x$w_buff1~0=~x$w_buff1~0_In-1538098250, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1538098250, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1538098250, ~x~0=~x~0_In-1538098250} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 11:16:30,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In841900933 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In841900933 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out841900933|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite43_Out841900933| ~x$w_buff0_used~0_In841900933)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In841900933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In841900933} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In841900933, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out841900933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In841900933} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:16:30,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In2028015811 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In2028015811 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In2028015811 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In2028015811 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2028015811 |ULTIMATE.start_main_#t~ite44_Out2028015811|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out2028015811|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2028015811, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2028015811, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2028015811, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2028015811} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2028015811, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2028015811, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2028015811, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2028015811|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2028015811} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:16:30,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-850412493 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-850412493 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-850412493| ~x$r_buff0_thd0~0_In-850412493) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-850412493|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-850412493, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-850412493} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-850412493, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-850412493|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-850412493} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:16:30,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In94998390 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In94998390 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In94998390 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In94998390 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out94998390|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In94998390 |ULTIMATE.start_main_#t~ite46_Out94998390|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In94998390, ~x$w_buff1_used~0=~x$w_buff1_used~0_In94998390, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In94998390, ~x$w_buff0_used~0=~x$w_buff0_used~0_In94998390} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In94998390, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out94998390|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In94998390, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In94998390, ~x$w_buff0_used~0=~x$w_buff0_used~0_In94998390} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:16:30,030 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:16:30,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:16:30 BasicIcfg [2019-12-07 11:16:30,078 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:16:30,078 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:16:30,078 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:16:30,078 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:16:30,079 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:15:05" (3/4) ... [2019-12-07 11:16:30,080 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:16:30,080 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2073~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30|) 0) (= v_~x$r_buff0_thd1~0_362 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| 4)) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30|) |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0))) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0) (= |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30| 1) |v_#valid_64|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_23|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t2073~0.offset=|v_ULTIMATE.start_main_~#t2073~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_14|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2073~0.base=|v_ULTIMATE.start_main_~#t2073~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t2075~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2075~0.offset, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t2073~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2074~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t2074~0.base, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t2073~0.offset, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:16:30,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10|) |v_ULTIMATE.start_main_~#t2074~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t2074~0.offset_9| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2074~0.base_10|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2074~0.base_10|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_9|, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2074~0.offset, ULTIMATE.start_main_~#t2074~0.base] because there is no mapped edge [2019-12-07 11:16:30,081 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:16:30,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11|) |v_ULTIMATE.start_main_~#t2075~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2075~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11|)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t2075~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2075~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2075~0.base, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2075~0.offset] because there is no mapped edge [2019-12-07 11:16:30,082 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-331684563 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-331684563 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-331684563| ~x~0_In-331684563)) (and (not .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-331684563| ~x$w_buff1~0_In-331684563) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-331684563, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-331684563, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-331684563, ~x~0=~x~0_In-331684563} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-331684563|, ~x$w_buff1~0=~x$w_buff1~0_In-331684563, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-331684563, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-331684563, ~x~0=~x~0_In-331684563} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:16:30,083 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,083 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-2144463238 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-2144463238 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite34_Out-2144463238| ~x$w_buff0_used~0_In-2144463238) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out-2144463238| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2144463238, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2144463238} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-2144463238|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2144463238, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2144463238} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:16:30,083 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In990220539 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In990220539 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In990220539 |P1Thread1of1ForFork0_#t~ite28_Out990220539|)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out990220539|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In990220539, ~x$w_buff0_used~0=~x$w_buff0_used~0_In990220539} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In990220539, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out990220539|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In990220539} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:16:30,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1041582028 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1041582028 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1041582028 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In1041582028 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1041582028| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork0_#t~ite29_Out1041582028| ~x$w_buff1_used~0_In1041582028) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1041582028, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1041582028, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1041582028, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1041582028} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1041582028, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1041582028, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1041582028, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1041582028|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1041582028} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:16:30,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In360435610 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In360435610 256))) (.cse1 (= ~x$r_buff0_thd2~0_Out360435610 ~x$r_buff0_thd2~0_In360435610))) (or (and .cse0 .cse1) (and (not .cse2) (not .cse0) (= ~x$r_buff0_thd2~0_Out360435610 0)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In360435610, ~x$w_buff0_used~0=~x$w_buff0_used~0_In360435610} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out360435610|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out360435610, ~x$w_buff0_used~0=~x$w_buff0_used~0_In360435610} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:16:30,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In195134002 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In195134002 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In195134002 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In195134002 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out195134002| ~x$r_buff1_thd2~0_In195134002)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite31_Out195134002| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In195134002, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In195134002, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In195134002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In195134002} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out195134002|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In195134002, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In195134002, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In195134002, ~x$w_buff0_used~0=~x$w_buff0_used~0_In195134002} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:16:30,084 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:16:30,085 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-519157429 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In-519157429| |P0Thread1of1ForFork2_#t~ite8_Out-519157429|) (not .cse0) (= ~x$w_buff0~0_In-519157429 |P0Thread1of1ForFork2_#t~ite9_Out-519157429|)) (and .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-519157429 256) 0))) (or (and .cse1 (= 0 (mod ~x$w_buff1_used~0_In-519157429 256))) (= (mod ~x$w_buff0_used~0_In-519157429 256) 0) (and .cse1 (= 0 (mod ~x$r_buff1_thd1~0_In-519157429 256))))) (= |P0Thread1of1ForFork2_#t~ite8_Out-519157429| ~x$w_buff0~0_In-519157429) (= |P0Thread1of1ForFork2_#t~ite8_Out-519157429| |P0Thread1of1ForFork2_#t~ite9_Out-519157429|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-519157429, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-519157429, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-519157429|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-519157429, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-519157429, ~weak$$choice2~0=~weak$$choice2~0_In-519157429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519157429} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-519157429, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-519157429, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-519157429|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-519157429, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-519157429|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-519157429, ~weak$$choice2~0=~weak$$choice2~0_In-519157429, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-519157429} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 11:16:30,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-1660626224 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In-1660626224 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1660626224 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1660626224 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In-1660626224 |P2Thread1of1ForFork1_#t~ite35_Out-1660626224|)) (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out-1660626224|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1660626224, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1660626224, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1660626224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1660626224} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-1660626224|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1660626224, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1660626224, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1660626224, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1660626224} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:16:30,086 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1549032800 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1549032800 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1549032800| ~x$r_buff0_thd3~0_In-1549032800) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out-1549032800| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1549032800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1549032800} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-1549032800|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1549032800, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1549032800} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:16:30,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-851888520 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-851888520 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-851888520 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-851888520 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite37_Out-851888520| ~x$r_buff1_thd3~0_In-851888520) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork1_#t~ite37_Out-851888520|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-851888520, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-851888520, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-851888520, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-851888520} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-851888520|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-851888520, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-851888520, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-851888520, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-851888520} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:16:30,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:16:30,087 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-666659355 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out-666659355| ~x$w_buff1_used~0_In-666659355) (= |P0Thread1of1ForFork2_#t~ite17_In-666659355| |P0Thread1of1ForFork2_#t~ite17_Out-666659355|)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-666659355| |P0Thread1of1ForFork2_#t~ite18_Out-666659355|) .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-666659355| ~x$w_buff1_used~0_In-666659355) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-666659355 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-666659355 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In-666659355 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-666659355 256))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-666659355, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-666659355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-666659355, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-666659355, ~weak$$choice2~0=~weak$$choice2~0_In-666659355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666659355} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-666659355, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-666659355|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-666659355|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-666659355, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-666659355, ~weak$$choice2~0=~weak$$choice2~0_In-666659355, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-666659355} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:16:30,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:16:30,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1135088665 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-1135088665| ~x$r_buff1_thd1~0_In-1135088665) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite23_In-1135088665| |P0Thread1of1ForFork2_#t~ite23_Out-1135088665|)) (and (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-1135088665 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-1135088665 256)) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-1135088665 256) 0)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-1135088665 256) 0)))) (= |P0Thread1of1ForFork2_#t~ite24_Out-1135088665| |P0Thread1of1ForFork2_#t~ite23_Out-1135088665|) .cse0 (= |P0Thread1of1ForFork2_#t~ite23_Out-1135088665| ~x$r_buff1_thd1~0_In-1135088665)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1135088665, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1135088665, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1135088665, ~weak$$choice2~0=~weak$$choice2~0_In-1135088665, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-1135088665|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1135088665} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1135088665, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1135088665, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1135088665, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-1135088665|, ~weak$$choice2~0=~weak$$choice2~0_In-1135088665, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-1135088665|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1135088665} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 11:16:30,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,088 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:16:30,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1538098250 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1538098250 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1538098250 |ULTIMATE.start_main_#t~ite41_Out-1538098250|) (not .cse1)) (and (= ~x~0_In-1538098250 |ULTIMATE.start_main_#t~ite41_Out-1538098250|) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1538098250, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1538098250, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1538098250, ~x~0=~x~0_In-1538098250} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1538098250|, ~x$w_buff1~0=~x$w_buff1~0_In-1538098250, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1538098250, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1538098250, ~x~0=~x~0_In-1538098250} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 11:16:30,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 11:16:30,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In841900933 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In841900933 256) 0))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out841900933|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite43_Out841900933| ~x$w_buff0_used~0_In841900933)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In841900933, ~x$w_buff0_used~0=~x$w_buff0_used~0_In841900933} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In841900933, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out841900933|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In841900933} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:16:30,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In2028015811 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In2028015811 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In2028015811 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In2028015811 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$w_buff1_used~0_In2028015811 |ULTIMATE.start_main_#t~ite44_Out2028015811|)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out2028015811|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2028015811, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2028015811, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2028015811, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2028015811} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In2028015811, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2028015811, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In2028015811, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out2028015811|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2028015811} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:16:30,089 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-850412493 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-850412493 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-850412493| ~x$r_buff0_thd0~0_In-850412493) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out-850412493|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-850412493, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-850412493} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-850412493, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-850412493|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-850412493} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:16:30,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In94998390 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In94998390 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In94998390 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In94998390 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out94998390|)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In94998390 |ULTIMATE.start_main_#t~ite46_Out94998390|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In94998390, ~x$w_buff1_used~0=~x$w_buff1_used~0_In94998390, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In94998390, ~x$w_buff0_used~0=~x$w_buff0_used~0_In94998390} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In94998390, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out94998390|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In94998390, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In94998390, ~x$w_buff0_used~0=~x$w_buff0_used~0_In94998390} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:16:30,090 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:16:30,139 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_bec11ec2-f52b-4668-934e-b05005787096/bin/utaipan/witness.graphml [2019-12-07 11:16:30,139 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:16:30,140 INFO L168 Benchmark]: Toolchain (without parser) took 85282.54 ms. Allocated memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: 4.8 GB). Free memory was 942.5 MB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,141 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:16:30,141 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.73 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 942.5 MB in the beginning and 1.1 GB in the end (delta: -119.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,141 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.95 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,141 INFO L168 Benchmark]: Boogie Preprocessor took 23.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:16:30,142 INFO L168 Benchmark]: RCFGBuilder took 383.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.3 MB). Peak memory consumption was 55.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,142 INFO L168 Benchmark]: TraceAbstraction took 84394.73 ms. Allocated memory was 1.1 GB in the beginning and 5.9 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,142 INFO L168 Benchmark]: Witness Printer took 61.35 ms. Allocated memory is still 5.9 GB. Free memory was 4.0 GB in the beginning and 3.9 GB in the end (delta: 86.6 MB). Peak memory consumption was 86.6 MB. Max. memory is 11.5 GB. [2019-12-07 11:16:30,143 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 963.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.73 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 94.4 MB). Free memory was 942.5 MB in the beginning and 1.1 GB in the end (delta: -119.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.95 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.63 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 383.17 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.3 MB). Peak memory consumption was 55.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 84394.73 ms. Allocated memory was 1.1 GB in the beginning and 5.9 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 1.8 GB. Max. memory is 11.5 GB. * Witness Printer took 61.35 ms. Allocated memory is still 5.9 GB. Free memory was 4.0 GB in the beginning and 3.9 GB in the end (delta: 86.6 MB). Peak memory consumption was 86.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 6709 VarBasedMoverChecksPositive, 292 VarBasedMoverChecksNegative, 116 SemBasedMoverChecksPositive, 259 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66094 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t2073, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t2074, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L822] FCALL, FORK 0 pthread_create(&t2075, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 z = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 84.2s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 39.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7180 SDtfs, 13469 SDslu, 29209 SDs, 0 SdLazy, 30523 SolverSat, 940 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 782 GetRequests, 41 SyntacticMatches, 44 SemanticMatches, 697 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12242 ImplicationChecksByTransitivity, 10.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=114218occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 27.7s AutomataMinimizationTime, 34 MinimizatonAttempts, 258518 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.2s InterpolantComputationTime, 1327 NumberOfCodeBlocks, 1327 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1237 ConstructedInterpolants, 0 QuantifiedInterpolants, 387523 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...